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192.168.1.100 / T800_MD / b0f5b85a5b9d69cbfa1dd990d559a4a9c7d8f2a6 / . / mcu / interface / service / nvram / d2_nvram_def.h
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rjw6c1fd8f2022-11-30 14:33:01 +0800[diff] [blame]1/*****************************************************************************
2* Copyright Statement:
3* --------------------
4* This software is protected by Copyright and the information contained
5* herein is confidential. The software may not be copied and the information
6* contained herein may not be used or disclosed except with the written
7* permission of MediaTek Inc. (C) 2005
8*
9* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
10* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
11* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
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24* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
25* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
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32* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
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34*****************************************************************************/
35
36/*****************************************************************************
37 *
38 * Filename:
39 * ---------
40 *
41 *
42 * Project:
43 * --------
44 * MAUI
45 *
46 * Description:
47 * ------------
48 *
49 *
50 * Author:
51 * -------
52 *
53 *
54 *============================================================================
55 * HISTORY
56 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
57 *------------------------------------------------------------------------------
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164 *
165 *------------------------------------------------------------------------------
166 * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
167 *============================================================================
168 ****************************************************************************/
169#ifndef __D2_NVRAM_DEF_H__
170#define __D2_NVRAM_DEF_H__
171
172#ifdef __cplusplus
173extern "C"
174{
175#endif /* __cplusplus */
176
177
178#include "nvram_defs.h"
179#include "nvram_enums.h"
180#include "ps_public_enum.h"
181#include "device.h"
182// LID Enums
183
184
185typedef enum
186{
187 NVRAM_EF_D2_START_LID = NVRAM_LID_GRP_D2(0),
188 NVRAM_EF_D2_DATA_LID = NVRAM_LID_GRP_D2(1),
189 NVRAM_EF_D2_APNINFO_LID = NVRAM_LID_GRP_D2(2),
190 NVRAM_EF_D2_FOP_LID = NVRAM_LID_GRP_D2(3),
191 NVRAM_EF_D2_DEFAULT_PDP_PROFILE_LID = NVRAM_LID_GRP_D2(4),
192 NVRAM_EF_D2_APNSETTING_LID = NVRAM_LID_GRP_D2(6),
193 NVRAM_EF_D2_CFG_LID = NVRAM_LID_GRP_D2(7),
194 NVRAM_EF_D2_IMSTEST_LID = NVRAM_LID_GRP_D2(8),
195 NVRAM_EF_D2_IMSCFG_LID = NVRAM_LID_GRP_D2(9),
196 NVRAM_EF_D2_MCF_DATARETRY_INFO_LID = NVRAM_LID_GRP_D2(11),
197 NVRAM_EF_D2_DDM_QOS_IND_LID = NVRAM_LID_GRP_D2(14),
198 NVRAM_EF_D2_MCF_APN_CFG_LID = NVRAM_LID_GRP_D2(15),
199 NVRAM_EF_D2_URSP_LID = NVRAM_LID_GRP_D2(16),
200 NVRAM_EF_D2_MCF_TEST_HO_CFG_LID = NVRAM_LID_GRP_D2(17),
201 NVRAM_EF_D2_MCF_NORMAL_HO_CFG_LID = NVRAM_LID_GRP_D2(18),
202 NVRAM_EF_D2_VZW_APN_CFG_LID = NVRAM_LID_GRP_D2(19),
203 NVRAM_EF_D2_MCF_MTU_CFG_LID = NVRAM_LID_GRP_D2(20),
204 NVRAM_EF_D2_DNS_CFG_LID = NVRAM_LID_GRP_D2(21),
205 NVRAM_EF_D2_MCF_KEEP_INTERNET_LID = NVRAM_LID_GRP_D2(22),
206 NVRAM_EF_D2_LAST_LID = NVRAM_LID_GRP_D2(63)
207} nvram_lid_d2m_enum;
208
209// VERNO
210#define NVRAM_EF_D2_DATA_LID_VERNO "001"
211#define NVRAM_EF_D2_APNINFO_LID_VERNO "003"
212#define NVRAM_EF_D2_FOP_LID_VERNO "000"
213#define NVRAM_EF_D2_DEFAULT_PDP_PROFILE_LID_VERNO "000"
214#define NVRAM_EF_D2_APNSETTING_LID_VERNO "000"
215#define NVRAM_EF_D2_CFG_LID_VERNO "000"
216#define NVRAM_EF_D2_IMSTEST_LID_VERNO "000"
217#define NVRAM_EF_D2_IMSCFG_LID_VERNO "000"
218#define NVRAM_EF_D2_MCF_APN_CFG_LID_VERNO "001"
219#define NVRAM_EF_D2_MCF_DATARETRY_INFO_LID_VERNO "000"
220#define NVRAM_EF_D2_DDM_QOS_IND_LID_VERNO "000"
221#define NVRAM_EF_D2_URSP_LID_VERNO "000"
222#define NVRAM_EF_D2_MCF_NORMAL_HO_CFG_LID_VERNO "000"
223#define NVRAM_EF_D2_MCF_TEST_HO_CFG_LID_VERNO "000"
224#define NVRAM_EF_D2_VZW_APN_CFG_LID_VERNO "000"
225#define NVRAM_EF_D2_MCF_MTU_CFG_LID_VERNO "000"
226#define NVRAM_EF_D2_DNS_CFG_LID_VERNO "000"
227#define NVRAM_EF_D2_MCF_KEEP_INTERNET_LID_VERNO "002"
228
229// Hash Key
230#define NVRAM_EF_D2_DATA_LID_HASH 0xE2120E70
231#define NVRAM_EF_D2_APNINFO_LID_HASH 0x8754028C
232#define NVRAM_EF_D2_FOP_LID_HASH 0xAF094EF7
233#define NVRAM_EF_D2_DEFAULT_PDP_PROFILE_LID_HASH 0xAD27E22E
234#define NVRAM_EF_D2_APNSETTING_LID_HASH 0xEDBEA7A8
235#define NVRAM_EF_D2_CFG_LID_HASH 0x7F267B87
236#define NVRAM_EF_D2_IMSTEST_LID_HASH 0x019A18D1
237#define NVRAM_EF_D2_IMSCFG_LID_HASH 0xF26D36EA
238#define NVRAM_EF_D2_MCF_APN_CFG_LID_HASH 0xF9BF2D63
239#define NVRAM_EF_D2_MCF_DATARETRY_INFO_LID_HASH 0x790B131C
240#define NVRAM_EF_D2_DDM_QOS_IND_LID_HASH 0x342067A4
241#define NVRAM_EF_D2_URSP_LID_HASH 0xBE69BC10
242#define NVRAM_EF_D2_MCF_NORMAL_HO_CFG_LID_HASH 0xF8D6F88E
243#define NVRAM_EF_D2_MCF_TEST_HO_CFG_LID_HASH 0x6E517E3C
244#define NVRAM_EF_D2_VZW_APN_CFG_LID_HASH 0x20845324
245#define NVRAM_EF_D2_MCF_MTU_CFG_LID_HASH 0x57FBAFEE
246#define NVRAM_EF_D2_DNS_CFG_LID_HASH 0x55596088
247#define NVRAM_EF_D2_MCF_KEEP_INTERNET_LID_HASH 0xDC04A686
248
249// Data Structure of Each LID
250typedef struct
251{
252 kal_uint8 iccid[128];
253 kal_uint8 imsi[128];
254 kal_uint8 slot_id; // ap slot view 1, 2, 3...
255} nvram_d2_data_struct;
256
257typedef struct
258{
259 kal_uint8 ID[8]; /* IE_STRING_LEN = 5 */
260 kal_uint8 contents[32]; /* EGPCO_IE_CONTENTS_STRING_LEN = 32 */
261}nvram_d2_pco_ie_struct;
262
263typedef struct
264{
265 kal_uint8 iccid[64];
266 kal_uint8 imsi[64];
267 kal_uint8 apn[128];
268 kal_uint8 apn_type[128];
269 kal_uint8 pdp_type[128];
270 kal_uint8 roam_prot[128];
271 kal_uint8 auth_type;
272 kal_uint8 username[128];
273 kal_uint8 passwd[128];
274 kal_uint8 p_cscf_discovery;
275 kal_uint8 im_cn_signalling_flag;
276 kal_uint8 emergency_flag;
277 kal_uint8 op_id;
278 kal_bool is_pco_present; /* PCO flag */
279 kal_uint8 IE_count; /* PCO IE count */
280 nvram_d2_pco_ie_struct IE[16]; /* PCO IE, MAX_IE_COUNT = 16 */
281} nvram_d2_apninfo_struct;
282
283typedef struct
284{
285 kal_uint32 fop;
286} nvram_d2_fop_struct;
287
288typedef struct
289{
290 kal_uint8 qos_enabled_value;
291 kal_uint8 qos_data_string[255];
292} nvram_ddm_qos_enable_struct;
293
294typedef struct
295{
296 kal_uint8 context_id;
297 kal_uint8 pdp_type[10];
298 kal_uint8 apn_len;
299 kal_uint8 apn[100];
300 kal_uint8 p_cscf_discovery;
301 kal_uint8 im_cn_signalling_flag;
302 kal_uint8 request_type;
303 kal_uint8 emergency_flag;
304 kal_uint8 auth_type;
305 kal_uint8 username[128];
306 kal_uint8 passwd[128];
307} nvram_d2_default_pdp_profile_struct;
308
309typedef struct
310{
311 kal_uint32 wapn;
312 kal_uint8 apn[128];
313 kal_uint8 pdp_type[128];
314 kal_uint8 roam_prot[128];
315 kal_uint8 auth_type;
316 kal_uint8 username[128];
317 kal_uint8 passwd[128];
318 kal_uint8 carrier_enabled;
319 kal_uint32 apncl;
320 kal_uint8 apnni[128];
321 kal_uint8 apn_type[128];
322 kal_uint8 apnbear[128];
323 kal_uint8 apnenable[128];
324 kal_uint32 apntime;
325 kal_uint32 max_conn;
326 kal_uint32 max_conn_t;
327 kal_uint32 wait_time;
328 kal_uint32 throttle_time;
329} nvram_d2_apnsetting_struct;
330
331typedef struct
332{
333 kal_uint8 iccid[128];
334 kal_uint8 mobile_data;
335 kal_uint8 data_roaming;
336 kal_uint8 volte;
337 kal_uint8 ims_test_mode;
338 kal_uint8 reserved[124];
339} nvram_d2_cfg_struct;
340
341typedef struct
342{
343 kal_uint8 mode;
344} nvram_d2_imstest_struct;
345
346typedef struct
347{
348 kal_uint8 iccid[128];
349 kal_uint8 volte_enable;
350 kal_uint8 vilte_enable;
351 kal_uint8 vowifi_enable;
352 kal_uint8 viwifi_enable;
353 kal_uint8 ims_sms_enable;
354 kal_uint8 eims_enable;
355} nvram_d2_imscfg_struct;
356
357typedef struct
358{
359 kal_bool is_valid; /* Whether this config. is valid or not*/
360 kal_uint32 type; /* APN Type, defined in ddm_apn_type_enum */
361 kal_uint8 protocol; /* Protocol (PDP) Type, IPV4:0x21, IPV6:0x57, IPV4V6:0x8D (enum) */
362 kal_uint8 roaming_protocol; /* Rroaming Protocol Type, IPV4:0x21, IPV6:0x57, IPV4V6:0x8D (enum) */
363 kal_uint8 authtype; /* Auth Type, 0:NONE, 1:PAP, 2:CHAP (enum) */
364 kal_uint32 network_type_bitmask; /* Network Type Bitmask */
365 kal_uint8 mvno_type; /* MVNO type {PNN, SPN, GID, IMSI} */
366 kal_uint8 mvno_match_data[100]; /* Match data of corresponding MVNO type */
367 kal_uint8 apn[128]; /* APN Name */
368 kal_uint8 user[128]; /* Username */
369 kal_uint8 password[128]; /* Password */
370} nvram_d2_mcf_apn_cfg_entry_struct;
371
372typedef struct
373{
374 nvram_d2_mcf_apn_cfg_entry_struct apn_cfg[10];
375} nvram_d2_mcf_apn_cfg_struct;
376
377typedef struct
378{
379 kal_uint8 dataretry_info[256];
380} nvram_ddm_mcf_dataretry_info_struct;
381typedef struct
382{
383 nvram_ddm_mcf_dataretry_info_struct dataretry_info;
384} nvram_ddm_mcf_pdn_dataretry_info_struct;
385
386typedef struct
387{
388 kal_uint8 data[15000];
389} nvram_d2_ursp_struct;
390
391typedef struct
392{
393 kal_uint32 ddc_time;
394 kal_uint32 retrytime[32];
395 kal_uint32 retry1stran_time;
396 kal_uint32 fail_noipv6_retrytime;
397} nvram_d2_mcf_normal_ho_cfg_struct;
398
399typedef nvram_d2_mcf_normal_ho_cfg_struct nvram_d2_mcf_test_ho_cfg_struct;
400
401typedef struct
402{
403 kal_uint32 wapn; /* WAPN, could treat it as APN index */
404 kal_uint32 apncl; /* APN Class */
405 kal_uint8 apntype; /* PDP Type */
406 kal_uint8 apnni[128]; /* APN Name */
407 kal_bool apned; /* APN Enable/Disable */
408 kal_uint8 apnb[16]; /* APN Bearer */
409 kal_uint32 apntimer; /* APN Timer */
410 kal_uint32 max_conn; /* Max Conn. */
411 kal_uint32 max_conn_t; /* Max Conn. T */
412 kal_uint32 wait_time; /* Wait Time */
413 kal_uint32 throttle_time; /* Throttle Time */
414} nvram_d2_vzw_apn_cfg_entry_struct;
415
416typedef struct
417{
418 nvram_d2_vzw_apn_cfg_entry_struct apn_cfg[8];
419} nvram_d2_vzw_apn_cfg_struct;
420
421typedef struct
422{
423 kal_uint8 apn[128];
424 kal_uint32 mtu_v4;
425 kal_uint32 mtu_v6;
426} nvram_d2_mcf_mtu_cfg_entry_struct;
427
428typedef struct
429{
430 kal_bool is_valid; /* Whether this config. is valid or not*/
431 kal_bool is_mcf_first; /* Whether this config. is first or network*/
432 kal_bool is_apn_valid; /* Whether this config. need by APN*/
433 nvram_d2_mcf_mtu_cfg_entry_struct mtu_cfg[10]; /* MTU config */
434
435} nvram_d2_mcf_mtu_cfg_struct;
436
437typedef struct
438{
439 kal_bool is_valid; /* Whether this config. is valid or not*/
440 kal_bool enable_keep; /* 0:disable, 1:enable */
441 kal_uint8 rat; /* 0:all rat, 1:2/3G, 2:4G, 3:5G */
442} nvram_d2_mcf_keep_internet_struct;
443
444typedef struct
445{
446 kal_uint8 dns_v4_prim[4];
447 kal_uint8 dns_v4_sec[4];
448 kal_uint8 dns_v6_prim[16];
449 kal_uint8 dns_v6_sec[16];
450} nvram_d2_dns_cfg_struct;
451
452// Size and Total
453#define NVRAM_EF_D2_DATA_SIZE sizeof(nvram_d2_data_struct)
454#define NVRAM_EF_D2_DATA_TOTAL 1
455#define NVRAM_EF_D2_APNINFO_SIZE sizeof(nvram_d2_apninfo_struct)
456#define NVRAM_EF_D2_APNINFO_TOTAL (1*MAX_SIM_NUM)
457#define NVRAM_EF_D2_FOP_SIZE sizeof(nvram_d2_fop_struct)
458#define NVRAM_EF_D2_FOP_TOTAL 1
459#define NVRAM_EF_D2_DEFAULT_PDP_PROFILE_SIZE sizeof(nvram_d2_default_pdp_profile_struct)
460#define NVRAM_EF_D2_DEFAULT_PDP_PROFILE_TOTAL (1*MAX_SIM_NUM)
461#define NVRAM_EF_D2_APNSETTING_SIZE sizeof(nvram_d2_apnsetting_struct)
462#define NVRAM_EF_D2_APNSETTING_TOTAL (8*MAX_SIM_NUM)
463#define NVRAM_EF_D2_CFG_SIZE sizeof(nvram_d2_cfg_struct)
464#define NVRAM_EF_D2_CFG_TOTAL (1*MAX_SIM_NUM)
465#define NVRAM_EF_D2_IMSTEST_SIZE sizeof(nvram_d2_imstest_struct)
466#define NVRAM_EF_D2_IMSTEST_TOTAL (1)
467#define NVRAM_EF_D2_IMSCFG_SIZE sizeof(nvram_d2_imscfg_struct)
468#define NVRAM_EF_D2_IMSCFG_TOTAL (1*MAX_SIM_NUM)
469#define NVRAM_EF_D2_MCF_APN_CFG_SIZE sizeof(nvram_d2_mcf_apn_cfg_struct)
470#define NVRAM_EF_D2_MCF_APN_CFG_TOTAL 1
471#define NVRAM_EF_D2_MCF_DATARETRY_INFO_SIZE sizeof(nvram_ddm_mcf_pdn_dataretry_info_struct)
472#define NVRAM_EF_D2_MCF_DATARETRY_INFO_TOTAL 1 * MAX_SIM_NUM
473#define NVRAM_EF_D2_DDM_QOS_IND_SIZE sizeof(nvram_ddm_qos_enable_struct)
474#define NVRAM_EF_D2_DDM_QOS_IND_TOTAL (1*MAX_SIM_NUM)
475#define NVRAM_EF_D2_URSP_SIZE sizeof(nvram_d2_ursp_struct)
476#define NVRAM_EF_D2_URSP_TOTAL (1*MAX_SIM_NUM)
477#define NVRAM_EF_D2_MCF_NORMAL_HO_CFG_SIZE sizeof(nvram_d2_mcf_normal_ho_cfg_struct)
478#define NVRAM_EF_D2_MCF_NORMAL_HO_CFG_TOTAL (1*MAX_SIM_NUM)
479#define NVRAM_EF_D2_MCF_TEST_HO_CFG_SIZE sizeof(nvram_d2_mcf_test_ho_cfg_struct)
480#define NVRAM_EF_D2_MCF_TEST_HO_CFG_TOTAL (1*MAX_SIM_NUM)
481#define NVRAM_EF_D2_VZW_APN_CFG_SIZE sizeof(nvram_d2_vzw_apn_cfg_struct)
482#define NVRAM_EF_D2_VZW_APN_CFG_TOTAL 1
483#define NVRAM_EF_D2_MCF_MTU_CFG_SIZE sizeof(nvram_d2_mcf_mtu_cfg_struct)
484#define NVRAM_EF_D2_MCF_MTU_CFG_TOTAL 1
485#define NVRAM_EF_D2_MCF_KEEP_INTERNET_SIZE sizeof(nvram_d2_mcf_keep_internet_struct)
486#define NVRAM_EF_D2_MCF_KEEP_INTERNET_TOTAL 1
487#define NVRAM_EF_D2_DNS_CFG_SIZE sizeof(nvram_d2_dns_cfg_struct)
488#define NVRAM_EF_D2_DNS_CFG_TOTAL (1*MAX_SIM_NUM)
489
490#ifdef __cplusplus
491}
492#endif
493
494#endif /* __D2_NVRAM_DEF_H__ */