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rjw6c1fd8f2022-11-30 14:33:01 +08001/*****************************************************************************
2* Copyright Statement:
3* --------------------
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34*****************************************************************************/
35
36/*****************************************************************************
37 *
38 * Filename:
39 * ---------
40 * errc_emacmch_msg.h
41 *
42 * Project:
43 * --------
44 * MOLY
45 *
46 * Description:
47 * ------------
48 * Define ERRC EMACMCH interface enums, structures and constants
49 *
50 * Author:
51 * -------
52 * -------
53 *
54 ****************************************************************************/
55
56#ifndef ERRC_EMACMCH_MSG_H
57#define ERRC_EMACMCH_MSG_H
58
59#include "kal_public_api.h"
60#include "el2_sap_common.h"
61#include "common_def.h"
62#include "el1_enum.h"
63
64typedef struct {
65 kal_uint8 num; //fdd: 1-6, tdd: 1-5
66 kal_uint8 sf[MAX_SF_IN_ONE_RF]; //fdd: 123678, tdd: 34789
67}sf_alloc_map_t;
68
69typedef struct {
70 kal_uint8 rf_alloc_period; /*1, 2, 4, 8, 16, 32 */
71 kal_uint8 rf_alloc_offset; /* 0.. 7*/ // TODO: if offset > period?
72 kal_bool is_one_frame_alloc;
73 sf_alloc_map_t sf_alloc_map[4];
74}sf_config_t;
75
76typedef struct {
77 kal_uint8 num_sf_config; /* 0...8 */
78 sf_config_t sf_config_list[MAX_MBSFN_ALLOCATIONS];
79}mbsfn_sf_config_list_t;
80
81// SYNCAREA_CFG
82typedef struct {
83 kal_uint8 mbsfn_area_id; // 0-255
84 kal_uint8 non_mbsfn_region_len; // 1-2
85 kal_uint8 signalMCS; // 2,7,13,19
86 kal_uint8 offset; // 0-10
87 kal_uint16 repetition_period; // 32, 64, 128, 256
88 kal_uint16 modification_period; // 512, 1024
89 sf_alloc_map_t sf_alloc_info;
90 el1_ch_mch_mcch_reception_mode_enum recv_mode; // EVY_RP, EVY_MP, CNG_DTT
91}mcch_config_t;
92
93typedef struct
94{
95 //kal_uint8 syncarea_id;
96 kal_uint8 mcch_cfg_num; // 0-8
97 mcch_config_t mcch_cfg[MAX_AREA_NUM_PER_CELL];
98 mbsfn_sf_config_list_t sib2_sf_config_list;
99
100} errc_emacmch_syncarea_cfg_t;
101
102// AREA_CFG
103typedef struct {
104 kal_uint8 pmch_id;
105 kal_bool is_cfg_pmch_info_list_ext; //MT6293
106 kal_bool is_higher_order_data_mcs; //MT6293
107 kal_uint8 dataMCS; /* 0 ..28*/
108 kal_uint8 session_num_in_pmch; //MT6293
109 kal_uint16 sf_alloc_start;
110 kal_uint16 sf_alloc_end;
111 kal_uint16 mch_sched_period; /* 8, 16, 32, 64, 128, 256, 512, 1024 */
112
113}pmch_info_t;
114
115typedef struct {
116 kal_uint8 mbsfn_area_id; /* 0 .. 255 */
117 kal_uint16 common_sf_alloc_period; /* 4, 8, 16, 32, 64, 128, 256 */
118
119 kal_uint8 num_sf_config;
120 sf_config_t sf_config_list[MAX_MBSFN_ALLOCATIONS];
121
122 kal_uint8 num_pmch_info; /* 0 represent all PMCH close */
123 pmch_info_t pmch_info_list[MAX_PMCH_PER_MBSFN];
124
125}mbsfn_area_config_t;
126
127typedef struct
128{
129 //kal_uint8 syncarea_id;
130 kal_uint8 area_cfg_num;
131 mbsfn_area_config_t area_cfg[MAX_AREA_NUM_PER_CELL];
132
133} errc_emacmch_syncarea_area_cfg_t;
134
135// MXCH_CFG
136typedef struct
137{
138 kal_uint8 area_id; // 0~255
139 kal_uint8 mcch_idx; // numbered by ERRC
140
141} errc_emacmch_establish_mcch_t;
142
143typedef struct
144{
145 kal_uint8 area_id; // 0~255, currently for debug purpose only
146 kal_uint8 mcch_idx; // numbered by ERRC
147
148} errc_emacmch_release_mcch_t;
149
150typedef struct
151{
152 kal_uint8 area_id; // 0~255
153 kal_uint8 pmch_id; // 0~15, numbered by ERRC (directly use the index in asn ie) = pmch_ie_idx
154 kal_uint8 lcid; // 0~28
155 kal_uint8 mtch_idx; // numbered by ERRC, The range of mrb_idx depends on L2 HW capability
156 kal_uint8 tmgi[6]; // tmgi info to identify MBMS session, required by VZW EM
157
158} errc_emacmch_establish_mtch_t;
159
160typedef struct
161{
162 kal_uint8 area_id; // 0~255, currently for debug purpose only
163 kal_uint8 pmch_id; // 0~15, currently for debug purpose only
164 kal_uint8 lcid; // 0~28, currently for debug purpose only
165 kal_uint8 mtch_idx; // numbered by ERRC, The range of mrb_idx depends on L2 HW capability
166 kal_uint8 tmgi[6]; // tmgi info to identify MBMS session, required by VZW EM
167
168} errc_emacmch_release_mtch_t;
169
170typedef struct
171{
172 //kal_uint8 syncarea_id;
173 kal_uint8 release_mcch_num;
174 errc_emacmch_release_mcch_t release_mcch[MAX_EMBMS_MCCH_SUPPORT];
175
176 kal_uint8 establish_mcch_num;
177 errc_emacmch_establish_mcch_t establish_mcch[MAX_EMBMS_MCCH_SUPPORT];
178
179 kal_uint8 release_mtch_num;
180 errc_emacmch_release_mtch_t release_mtch[MAX_EMBMS_MTCH_SUPPORT];
181
182 kal_uint8 establish_mtch_num;
183 errc_emacmch_establish_mtch_t establish_mtch[MAX_EMBMS_MTCH_SUPPORT];
184
185} errc_emacmch_syncarea_mxch_cfg_t;
186
187// MCCH_RCV_MODE_CHANGE
188typedef struct
189{
190 kal_uint8 mbsfn_area_id;
191 el1_ch_mch_mcch_reception_mode_enum recv_mode;
192
193}mcch_rept_mode_config_t;
194
195typedef struct
196{
197 //kal_uint8 syncarea_id;
198 kal_uint8 mcch_rcv_mode_change_num;
199 mcch_rept_mode_config_t mcch_rcv_mode_change[MAX_AREA_NUM_PER_CELL];
200
201} errc_emacmch_syncarea_mcch_rcv_mode_change_t;
202
203// MTCH_SUSPEND_IND
204typedef struct
205{
206 kal_uint8 lcid; // 0~28
207 kal_uint8 mtch_idx; // numbered by ERRC, The range of mrb_idx depends on L2 HW capability
208
209} errc_emacmch_mtch_t;
210
211
212/****************************************************************************
213 * ERRC -> EMACMCH
214 ****************************************************************************/
215
216// MSG_ID_ERRC_EMACMCH_SYNCAREA_CFG_REQ
217typedef struct
218{
219
220 LOCAL_PARA_HDR
221 kal_uint32 tid; // 0x00000000 - 0x7FFFFFFF
222 kal_bool syncarea_cfg_valid[MAX_EMBMS_FREQ_SUPPORT];
223 errc_emacmch_syncarea_cfg_t syncarea_cfg[MAX_EMBMS_FREQ_SUPPORT];
224
225} errc_emacmch_syncarea_cfg_req_struct;
226
227// MSG_ID_ERRC_EMACMCH_AREA_CFG_REQ
228typedef struct
229{
230 LOCAL_PARA_HDR
231 kal_uint32 tid; // 0x00000000 - 0x7FFFFFFF
232 kal_bool syncarea_area_cfg_valid[MAX_EMBMS_FREQ_SUPPORT];
233 errc_emacmch_syncarea_area_cfg_t syncarea_area_cfg[MAX_EMBMS_FREQ_SUPPORT];
234
235} errc_emacmch_area_cfg_req_struct;
236
237// MSG_ID_ERRC_EMACMCH_MXCH_CFG_REQ
238typedef struct
239{
240 LOCAL_PARA_HDR
241 errc_emacmch_syncarea_mxch_cfg_t syncarea_mxch_cfg[MAX_EMBMS_FREQ_SUPPORT]; // for 2 freq
242
243} errc_emacmch_mxch_cfg_req_struct;
244
245
246/* MSG_ID_ERRC_EMACMCH_MCCH_RCV_MODE_CHANGE_REQ */
247// Possible modes that could be changed by ERRC includes:
248// EL1_RECV_EVERY_REPETITION_PERIOD = 0,
249// EL1_RECV_EVERY_MODIFICATION_PERIOD = 1,
250// EL1_RECV_CHANGE_DETECTION = 2,
251
252typedef struct
253{
254 LOCAL_PARA_HDR
255 kal_uint32 tid; // 0x00000000 - 0x7FFFFFFF
256 kal_bool syncarea_mcch_rcv_mode_change_valid[MAX_EMBMS_FREQ_SUPPORT];
257 errc_emacmch_syncarea_mcch_rcv_mode_change_t syncarea_mcch_rcv_mode_change[MAX_EMBMS_FREQ_SUPPORT];
258
259} errc_emacmch_mcch_rcv_mode_change_req_struct;
260
261
262/****************************************************************************
263 * EMACMCH -> ERRC
264 ****************************************************************************/
265
266// MSG_ID_ERRC_EMACMCH_SYNCAREA_CFG_CNF
267typedef struct
268{
269 LOCAL_PARA_HDR
270 errc_el2_cfg_result_enum result;
271
272} errc_emacmch_syncarea_cfg_cnf_struct;
273
274// MSG_ID_ERRC_EMACMCH_AREA_CFG_CNF
275typedef struct
276{
277 LOCAL_PARA_HDR
278 errc_el2_cfg_result_enum result;
279
280} errc_emacmch_area_cfg_cnf_struct;
281
282// MSG_ID_ERRC_EMACMCH_MXCH_CFG_CNF
283typedef struct
284{
285 LOCAL_PARA_HDR
286 errc_el2_cfg_result_enum result;
287
288} errc_emacmch_mxch_cfg_cnf_struct;
289
290/* MSG_ID_ERRC_EMACMCH_MCCH_RCV_MODE_CHANGE_CNF */
291typedef struct
292{
293 LOCAL_PARA_HDR
294 errc_el2_cfg_result_enum result;
295
296} errc_emacmch_mcch_rcv_mode_change_cnf_struct;
297
298// MSG_ID_ERRC_EMACMCH_MTCH_SUSPEND_IND
299typedef struct
300{
301 LOCAL_PARA_HDR
302 kal_uint8 syncarea_id; // 0:PCELL 1:SCELL
303 kal_uint8 area_id; // 0~255
304 kal_uint8 pmch_id; // 0~15
305 kal_uint8 suspend_mtch_num;
306 errc_emacmch_mtch_t suspend_mtch[MAX_MTCH_NUM_PER_PMCH_29];
307
308} errc_emacmch_mtch_suspend_ind_struct;
309
310
311#endif /*ERRC_EMACMCH_MSG_H*/