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rjw6c1fd8f2022-11-30 14:33:01 +08001/*****************************************************************************
2* Copyright Statement:
3* --------------------
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7* permission of MediaTek Inc. (C) 2012
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34*****************************************************************************/
35
36/*****************************************************************************
37 *
38 * Filename:
39 * ---------
40 * el2_api.h
41 *
42 * Project:
43 * --------
44 * MOLY
45 *
46 * Description:
47 * ------------
48 * prototypes of EL2 export function
49 *
50 * Author:
51 * -------
52 * -------
53 *
54 * ==========================================================================
55 * $Log$
56 *
57 * 07 09 2019 peter.chiang
58 * [MOLY00396869] [MODIS HW Copro] Work on making Modis to run with ESL HW models and Uplane with ESL
59 * Check-in for MASE
60 *
61 * 07 08 2019 yk.liu
62 * [MOLY00419753] check in for 97 MASE
63 *
64 * Check in for MASE
65 *
66 * 01 11 2018 jia-shi.lin
67 * [MOLY00301451] [SMO release][93/95]EL1 relative interface
68 * emac/el1 interface re-arch
69 *
70 * 08 03 2017 wen-jiunn.liu
71 * [MOLY00268551] Task batch scheduling for LTE Low power
72 * [EL2] Task Rescheduling for Low Power Polling Tick Change
73 *
74 * 08 03 2017 wen-jiunn.liu
75 * [MOLY00268551] Task batch scheduling for LTE Low power
76 * [EL2] Task Rescheduling for Low Power Polling Tick Change
77 *
78 * 04 07 2017 steve.kao
79 * [MOLY00230062] [UMOLYA] M-PS related interface changes for UPCM, RATDM, and EPDCP
80 *
81 * [UMOLYA][TRUNK]
82 *
83 * [UPCM][M-PS] Code changes
84 * 1. Duplicating UPCM contexts,
85 * 2. Use protocol_idx in UL/DL callback/ILM interfaces,
86 * 3. Check protocol_idx in LHIF PIT entries,
87 * 4. Fix test mode UL data processing flow,
88 * 5. Allowing test mode on protocol 2/3/4,
89 * 6. Wrap interfaces with RATDM with __MULTIPLE_PS__,
90 *
91 * [EPDCP][L+L] Code changes
92 *
93 * [RATDM][L+L] Code changes
94 *
95 * 09 26 2016 slifer.hsueh
96 * [MOLY00205085] [MT6293][EL2] ERLC source codes integration from DEV to TRUNK
97 * ERLC source codes integration from DEV to TRUNK
98 *
99 * 01 12 2016 kathie.ho
100 * [MOLY00156229] [MT6292] Code sync from MT6291: AuDRX
101 * CodeSync from LR11 (from 2015/09/21~11/15, exclude TSTM, MBMS)PART4
102 * CL 1800644[MT6291]Autonomous DRX
103 *
104 * 09 07 2015 nienteh.hsu
105 * [MOLY00140671] [6292] ERLC code sync from LR11 to UMOLY (August)
106 * .
107 *
108 * 09 04 2015 nienteh.hsu
109 * .
110 *
111 * 09 04 2015 nienteh.hsu
112 * Code sync from LR11 to UMOLY.
113 * CL1542770: DL & UL print SDU raw data.
114 * CL1582626: Fix of DL print SDU raw data.
115 * CL1590595: ERLC build warning fix.
116 * CL1525169: EM HO duration reporting. ERLC-UL part is merged.
117 * CL1546539: Backup SIT head and tail index when copro power off.
118 * CL1564394: Avoid early return in sched_grant_main function and not trigger poll re-TX.
119 * CL1586893: Fix of EM HO duration reporting.
120 *
121 * 12 04 2014 shengyi.ho
122 * [MOLY00083854] [TK6291] eL2 development checkin CR
123 * 1) fix erlc gtest ut case HWB leakage
124 * 2) rename am/um var reset macro with ERLCUL/ERLCDL prefix
125 * 3) fix HWB C-model function of get UL/DL alloc hwb num
126 *
127 * 11 11 2014 yiting.cheng
128 * [MOLY00084042] [UMOLY] merge UMOLY_DEV to UMOLY trunk
129 * .
130 *
131 * 10 27 2014 sh.yang
132 * [MOLY00082211] [MT6291_DEV] EMBMS check-in
133 * embms check-in
134 *
135 * 10 08 2014 shengyi.ho
136 * [MOLY00077592] [TK6291] emac/erlc development check-in - 1) tti bundle/msg3 collide rv setting. 2) sr prohibit check. 3) add emac ut framework for tx req. 4) remove unused function in MT6291
137 * .
138 *
139 * 07 31 2014 yiting.cheng
140 * [MOLY00073830] [MT6291_DEV] check-in MT6291 modification
141 * for fix potential target build error
142 *
143 * 07 30 2014 yiting.cheng
144 * [MOLY00073830] [MT6291_DEV] check-in MT6291 modification
145 * MT6291 modification, using temp interface with EL1
146 *
147 * 01 15 2014 slifer.hsueh
148 * [MOLY00053104] [MT6290E2][NAS RTD][MM][FDD] Assert fail: driver/l2copro/cipher/src/cipher_common.c 196 - L2COPRO
149 * Merge codes related to L2 copro delay power off back to MOLY TRUNK in LTE domain
150 *
151 * 01 09 2014 moja.hsu
152 * [MOLY00052975] Fine tune RAR/EAR 1ms protection to prevent false alarm.
153 * .
154 *
155 * 12 03 2013 timothy.yao
156 * [MOLY00048832] power down/on in EL2 task context and refine the flow
157 * 1. power-off/on L2 copro in EL2 task context.
158 * 2. refine the flow betwwen EL1 & EL2.
159 *
160 * 09 27 2013 steve.kao
161 * [MOLY00039195] [MT6290] [Low Power] LTE L2 copro power down in LTE flight mode
162 * Unshelved from pending changelist '272199':
163 *
164 * Fix link error
165 *
166 * 08 20 2013 mf.jhang
167 * [MOLY00034292] [MT6290E1] Move PHR to SW
168 * Move PHR report to SW
169 *
170 * 07 23 2013 mf.jhang
171 * [MOLY00030911] [MT6290E1][EMAC] EMAC code enhancement
172 * Register UL LMAC error interrupt handler
173 * Update some trace
174 *
175 * 06 10 2013 mf.jhang
176 * [MOLY00025349] [MT6290E1][GCF][MD8430][LTE][TC 7.1.5.4] Assert fail driverl2coprolmacsrcl2lmac_drv.c 268 - L2COPRO
177 * Add EL2 API for DL LMAC handler
178 *
179 * 05 16 2013 moja.hsu
180 * [MOLY00007625] Maintain code
181 * fix edyn compile warning.
182 ****************************************************************************/
183
184/**
185 * @date 2012/1/10
186 */
187
188#ifndef EL2_EXPORT_API
189#define EL2_EXPORT_API
190
191//#include "drv/drv_lmac.h"
192//#include "el1_enum.h"
193#include "kal_public_api.h"
194//#include "el2_def.h"
195#include "lte_time_common.h"
196
197/* EL2 constructor */
198void el2_init();
199
200// EL2 Tick Source Handler
201void el2_tick_source_dispatch_tick();
202
203/* EMAC export API */
204kal_bool emac_drx_is_drx_sleep(); // query whether EMAC DRX sleep or not
205void emac_rcv_ilm(ilm_struct *pIlm); ///< EMAC message handler
206void emac_el2task_rcv_ilm(ilm_struct *p_ilm); ///< EMAC message handler on EL2 task
207void emac_ctrl_data_rcv(); ///< control data receiving handler TO_BE_REMOVE: please use emac_ctrl_data_check().
208void emac_ctrl_data_check(); ///< check DL control swo bits
209void emac_early_protect_cancel_reg(void(*func)(void)); //Register early protect cancel callback
210void emac_rar_protect_cancel_reg(void(*func)(void)); //Register rar protect cancel callback
211#if MBMS_SUPPORT
212void emac_mch_data_check(); ///< check MCH swo bits
213#endif
214
215#if EL2_SBP_ON_AUDRX
216void emac_audrx_rrc_cmd(kal_uint32 time);
217void emac_audrx_nas_cmd(kal_uint32 time);
218void emac_epdcp_audrx_timer_timeout(void);
219void emac_epdcp_audrx_timer_restart(void);
220kal_uint32 emac_audrx_rrc_sleep_report(void);
221#endif
222
223/**
224 * @brief emac_check_rar_protect
225 * Check if we need to RAR 1ms protection.
226 * Prevent False alarm of frame boundary
227 *
228 * @return KAL_TRUE: Need to protection.
229 * KAL_FALSE: No need to do protection.
230 */
231//kal_bool emac_check_rar_protect(void);
232
233/**
234 * @brief emac_check_ear_protect
235 * Check if we need to RAR 1ms protection.
236 * Prevent False alarm of frame boundary
237 *
238 * @param vect SWO bit to indicate which HT contain EAR LCID
239 *
240 * @return KAL_TRUE: Need to protection.
241 * KAL_FALSE: No need to do protection.
242 */
243//kal_bool emac_check_ear_protect(ht_ear_vect *vect);
244kal_int32 _lte_dl_lmac_err_hndlr(kal_uint32 vect, void *ptr); //DL LMAC error interrupt callback
245kal_int32 _lte_ul_lmac_err_hndlr(kal_uint32 vect, void *ptr); //UL LMAC error interrupt callback
246
247/* ERLC export API */
248void erlcul_rcv_ilm(ilm_struct *pIlm); ///< ERLC-UL message handler
249void erlcdl_rcv_ilm(ilm_struct *pIlm); ///< ERLC-DL message handler
250void erlcul_poll(kal_uint32 protocol_idx); ///< ERLC-UL polling
251void erlcdl_poll(); ///< ERLC-DL polling
252void erlcul_reset(); ///< ERLC-UL reset
253void erlcdl_reset(); ///< ERLC-DL reset
254
255kal_uint32 erlcul_query_sleep_allow(); ///< ERLC-UL sees if we can sleep copro
256void erlcul_copro_power_down_backup(); ///back up info used when copro power off
257
258#endif