Blame - mcu/tools/AutoGen/postBuild/update_mpu_table.pl - T800_MD

#* [MOLY00256019] [BIANCO][MT6763][RDIT][FT][FDD][CU][SH][SIM1:CU][SIM2:NA][Fatal error(task)] err_code1:0x00003104 err_code2:0x00000000 err_code3:0xCCCCCCCC

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#*

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#* .

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#*

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#* 05 18 2017 tero.jarkko

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#* [MOLY00250578] [System Software]change backdoor as UC to avoid coherence issue

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#* 05 16 2017 tero.jarkko

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#* [MOLY00249784] [Gen93][SystemService][Auto-Gen]Split static L2C LOCK and dynamic L2C LOCK section to different output section

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#* 05 03 2017 carl.kao

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#* [MOLY00245670] [Gen93] [SystemService] [Auto-Gen] (1) Reduce MPU entry and (2) Set CUIF bank6 as cacheable

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#* Set EXTSRAM as RW

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#*

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#* 05 03 2017 carl.kao

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#* [MOLY00245670] [Gen93] [SystemService] [Auto-Gen] (1) Reduce MPU entry and (2) Set CUIF bank6 as cacheable

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#* 1 MB MPU granularity taken in use

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#*

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#* 05 02 2017 carl.kao

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#* [MOLY00245670] [Gen93] [SystemService] [Auto-Gen] (1) Reduce MPU entry and (2) Set CUIF bank6 as cacheable

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#* Rollback "cross core access to I/DSPRAM enabled" to save MPU entries

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#*

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#* 05 02 2017 carl.kao

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#* [MOLY00245670] [Gen93] [SystemService] [Auto-Gen] (1) Reduce MPU entry and (2) Set CUIF bank6 as cacheable

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#* AutoGen, regioninit, DSM part

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#*

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#* 04 04 2017 tero.jarkko

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#* [MOLY00239310] [Gen93/LR13][SystemService][Auto-Gen][MT6763]Fix core1 null protection

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#* 03 02 2017 tero.jarkko

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#* [MOLY00232738] [Gen93][MT6763][SystemService][DSMGR]DSMGR support for MT6763

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#* 01 20 2017 tero.jarkko

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#* [MOLY00226093] [Gen93/LR13][SystemService][Auto-Gen][Bianco Bring-up]Modify SPRAM size and address

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#* 01 20 2017 tero.jarkko

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#* [MOLY00226093] [Gen93/LR13][SystemService][Auto-Gen][Bianco Bring-up]Modify SPRAM size and address

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#* 01 18 2017 tero.jarkko

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#* [MOLY00225658] [Gen93/LR13][SystemService][Auto-Gen][Bianco Bring-up]Modify/Add IOCU section in bank 2/3

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#* 12 13 2016 tero.jarkko

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#* [MOLY00218335] [Gen93/LR13][SystemService][Auto-Gen][MPU]Bank1 MPU protection

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#* 11 29 2016 tero.jarkko

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#* [MOLY00215759] [Gen93/LR13][SystemService][Auto-Gen][MPU] Null pointer protection

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#* 11 17 2016 tero.jarkko

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#* [MOLY00213928] [Gen93/LR13][SystemService][Auto-Gen] AutoGen generated lds file

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#* 11 08 2016 tero.jarkko

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#* [MOLY00205040] [Gen93/LR13][SystemService][Auto-Gen] AutoGen generated MPU settings

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#* 10 20 2016 tero.jarkko

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#* [MOLY00205040] [Gen93/LR13][SystemService][Auto-Gen] AutoGen generated MPU settings

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#* .

#*

#*------------------------------------------------------------------------------

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#* Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!

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#*============================================================================

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#****************************************************************************/

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#****************************************************************************

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# Included Modules

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#****************************************************************************

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use strict;

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BEGIN { push @INC, './tools/', './tools/MemoryUtility/' }

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use LinkerOutputParser;

use FileInfoParser;

use scatInfo;

use CommonUtility;

use Switch;

use constant {

MPU_NA => 0x00000038,

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MPU_RO => 0x00000018,

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MPU_ROEX => 0x00000010,

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MPU_WO => 0x00000028,

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MPU_RW => 0x00000008,

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MPU_RWEX => 0x00000000,

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MPU_CCA_UC => 0x00000002,

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MPU_CCA_WB => 0x00000003,

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MPU_CCA_CWBE => 0x00000004,

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MPU_CCA_CWB => 0x00000005,

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MPU_CCA_UCA => 0x00000007,

MPU_DYNAMIC => 0,

MPU_FIXED => 1,

MPU_NULL => 2,

};

#****************************************************************************

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# Variables

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#****************************************************************************

my @MPU_table_core0;

my @MPU_table_core1;

my @MPU_table_core2;

my @MPU_table_core3;

my $mpu_null_index = undef;

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my $g_MakeFile_ref = undef;

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my @dynamic_regions = undef;

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my $g_bb = undef;

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my $mpu_dynamic_max = 0;

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#****************************************************************************

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# Input

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#****************************************************************************

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my ($elf_file, $sym_file, $lds_file, $MakeFile) = @ARGV;

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print "Parse symbol file $sym_file\n";

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LinkerOutputParser::FileParse($sym_file);

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my $dummy_end = hex(LinkerOutputParser::Get_DUMMY_END_Base());

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print "Parse lds file $lds_file\n\n";

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my $LinkInfo = lds_new scatInfo($lds_file, "ROM");

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my %MemInfo;

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map { $MemInfo{$_->[0]} = [hex($_->[1]),hex($_->[2])] } (@{$LinkInfo->{ldsInfo}->{MEMORYInfo}});

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$g_MakeFile_ref = &FileInfo::GetMakeFileRef($MakeFile);

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$g_bb = &sysUtil::SwitchToClonedChip(&FileInfo::get("BOARD_VER"));

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print "Modem Arch: ".$g_MakeFile_ref->{MTK_MODEM_ARCH}."\n";

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print "Board ver: ".$g_bb."\n";

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if ($g_MakeFile_ref->{MTK_MODEM_ARCH} =~ /MT6295/)

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{

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$mpu_null_index =27;

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$mpu_dynamic_max = 13;

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@dynamic_regions = (

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[[0] ,["MCURO_HWRW", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,MPU_ROEX,MPU_CCA_UCA,0x111],

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[["MCURO_HWRW",LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_MCURO_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RO ,MPU_CCA_UCA,0x111,0],

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[["EXTSRAM", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["L2CACHE_LOCK", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_UCA,0x111,0],

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[["EXTSRAM_FS_ZI", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["EXTSRAM_FS_ZI", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_UCA,0x111,0],

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[["MCURO_HWRW", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_MCURO_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RO ,MPU_CCA_CWB,0x111,2],

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[["MCURO_HWRW", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_MCURO_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RO ,MPU_CCA_CWB,0x111,6],

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[["EXTSRAM", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_IOCU2_MCURW_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_CWB,0x111,2],

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[["EXTSRAM", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_IOCU3_READ_ALLOC_MCURW_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image],MPU_RW ,MPU_CCA_CWB,0x111,6],

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[["DRDI", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["DRDI", LinkerSymPostfix::Limit,LinkerSymPrefix::Image] ,MPU_RO ,MPU_CCA_CWB,0x111,6],

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[["DRDI", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["DRDI", LinkerSymPostfix::Limit,LinkerSymPrefix::Image] ,MPU_RO ,MPU_CCA_CWB,0x111,0],

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[["L2CACHE_LOCK", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["L2CACHE_LOCK", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RWEX,MPU_CCA_CWB,0x111,9],

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[["CACHED_EXTSRAM_IOCU3_READ_ALLOC_MCURW_HWRW", LinkerSymPostfix::Base,LinkerSymPrefix::Image],["CACHED_EXTSRAM_IOCU3_READ_ALLOC_MCURW_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image],MPU_RW ,MPU_CCA_CWB,0x111,3],

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[["EXTSRAM_CORE0", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_CORE0", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_WB ,0x001,2],

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[["EXTSRAM_CORE0", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_CORE0", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_NA ,MPU_CCA_UCA,0x110,0],

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[["EXTSRAM_CORE1", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_CORE1", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_WB ,0x010,2],

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[["EXTSRAM_CORE1", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_CORE1", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_NA ,MPU_CCA_UCA,0x101,0],

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[[0x1f000000] ,[0x1f020000] ,MPU_RW ,MPU_CCA_UC ,0x111],

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[[0x1fC00000] ,[0x1fC20000] ,MPU_RW ,MPU_CCA_UC ,0x111]);

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} elsif ($g_MakeFile_ref->{MTK_MODEM_ARCH} =~ /MT6297/) {

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$mpu_null_index =31;

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$mpu_dynamic_max = 19;

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if ((($g_bb =~ /MT6297_FPGA/) and (FileInfo::get("CUSTOM_FLAVOR") =~/_SAP/)) or ($g_bb =~ /MT6885_FPGA/)) {

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@dynamic_regions = (

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[[0] ,["MCURO_HWRW", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,MPU_ROEX,MPU_CCA_UCA,0x1111],

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[["MCURO_HWRW",LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_MCURO_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RO ,MPU_CCA_UCA,0x1111,0],

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[["MCURO_HWRW", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_MCURO_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RO ,MPU_CCA_CWB,0x1111,6],

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[["DRDI", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["DRDI", LinkerSymPostfix::Limit,LinkerSymPrefix::Image] ,MPU_RO ,MPU_CCA_CWB,0x1111,2],

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#[["DRDI", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["DRDI", LinkerSymPostfix::Limit,LinkerSymPrefix::Image] ,MPU_RO ,MPU_CCA_CWB,0x111,0],

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[["EXTSRAM", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_MCURW_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_UCA,0x1111,0],

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[["EXTSRAM", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_MCURW_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_CWB,0x1111,6],

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[["EXTSRAM", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_IOCU2_ULTRA_DATA", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_CWB,0x1111,2],

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[["EXTSRAM_ULTRA_DATA", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_IOCU3_MCURW_HWRW_15", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_CWB,0x1111,3],

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[["EXTSRAM_FS_ZI", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["EXTSRAM_FS_ZI", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_UCA,0x1111,0],

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[["L2SRAM_L2C_CODE", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["L2SRAM_L2C_DATA", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RWEX,MPU_CCA_CWB,0x1111,9],

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[["USPRAM_CODE", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["USPRAM_DATA", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RWEX,MPU_CCA_CWB,0x1111,9],

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[[0x1f000000] ,[0x1f020000] ,MPU_RW ,MPU_CCA_UC ,0x1111],

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[[0x1fC00000] ,[0x1fC20000] ,MPU_RW ,MPU_CCA_UC ,0x1111]);

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} elsif (FileInfo::is("PLATFORM", "MT6297")){

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@dynamic_regions = (

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[[0] ,["MCURO_HWRW", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,MPU_ROEX,MPU_CCA_UCA,0x1111],

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[["MCURO_HWRW",LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_MCURO_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RO ,MPU_CCA_UCA,0x1111,0],

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[["MCURO_HWRW", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_MCURO_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RO ,MPU_CCA_CWB,0x1111,6],

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[["DRDI", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["DRDI", LinkerSymPostfix::Limit,LinkerSymPrefix::Image] ,MPU_RO ,MPU_CCA_CWB,0x1111,2],

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#[["DRDI", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["DRDI", LinkerSymPostfix::Limit,LinkerSymPrefix::Image] ,MPU_RO ,MPU_CCA_CWB,0x111,0],

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[["EXTSRAM", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["EXTSRAM_DSP_RX_ZI", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_UCA,0x1111,0],

461

[[0x10000000] ,["CACHED_EXTSRAM_MCURW_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_UCA,0x1111,1],

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[["EXTSRAM", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["EXTSRAM_DSP_RX_ZI", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_CWB,0x1111,6],

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[[0x70000000] ,["CACHED_EXTSRAM_MCURW_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_CWB,0x1111,7],

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[["EXTSRAM", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_IOCU2_ULTRA_DATA", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_CWB,0x1111,2],

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[["EXTSRAM_ULTRA_DATA", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_IOCU3_MCURW_HWRW_15", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_CWB,0x1111,3],

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[["EXTSRAM_FS_ZI", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["EXTSRAM_FS_ZI", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_UCA,0x1111,1],

467

[["L2SRAM_L2C_CODE", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["L2SRAM_L2C_CODE", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_ROEX,MPU_CCA_CWB,0x1111,9],

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[["L2SRAM_L2C_DATA", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["L2SRAM_L2C_DATA", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_CWB,0x1111,9],

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[[0x1f000000] ,[0x1f020000] ,MPU_RW ,MPU_CCA_UC ,0x1111],

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[[0x1fC00000] ,[0x1fC20000] ,MPU_RW ,MPU_CCA_UC ,0x1111])

471

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} elsif (FileInfo::is("PLATFORM", "MT6885") || FileInfo::is("PLATFORM", "MT6873")) {

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@dynamic_regions = (

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[[0] ,["MCURO_HWRW", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,MPU_ROEX,MPU_CCA_UCA,0x1111],

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[["MCURO_HWRW",LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_MCURO_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RO ,MPU_CCA_UCA,0x1111,0],

476

[["MCURO_HWRW", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_MCURO_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RO ,MPU_CCA_CWB,0x1111,6],

477

[["EXTSRAM", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_MCURW_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_UCA,0x1111,0],

478

[["EXTSRAM", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_MCURW_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_CWB,0x1111,6],

479

[["EXTSRAM", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_IOCU2_ULTRA_DATA", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_CWB,0x1111,2],

480

[["EXTSRAM_ULTRA_DATA", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_IOCU3_MCURW_HWRW_ZI_15", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_CWB,0x1111,3],

481

[["DRDI", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["DRDI", LinkerSymPostfix::Limit,LinkerSymPrefix::Image] ,MPU_RO ,MPU_CCA_UCA,0x1111,0],

482

[["DRDI", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["DRDI", LinkerSymPostfix::Limit,LinkerSymPrefix::Image] ,MPU_RO ,MPU_CCA_CWB,0x1111,6],

483

[["EXTSRAM_FS_ZI", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["EXTSRAM_FS_ZI", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_UCA,0x1111,1],

484

[["L2SRAM_L2C_CODE", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["L2SRAM_L2C_CODE", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_ROEX,MPU_CCA_CWB,0x1111,9],

485

[["L2SRAM_L2C_DATA", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["L2SRAM_L2C_DATA", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_CWB,0x1111,9],

486

[["MCURW_HWRW_DNC_SS_EXT_CSIF", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["MCURW_HWRW_DNC_NL1_EXT_CSIF", LinkerSymPostfix::Limit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_UCA,0x1111,0],

487

[["MCURW_HWRW_DNC_SS_EXT_CSIF", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["MCURW_HWRW_DNC_NL1_EXT_CSIF", LinkerSymPostfix::Limit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_CWB,0x1111,6],

488

[[0x1f000000] ,[0x1f020000] ,MPU_RW ,MPU_CCA_UC ,0x1111],

489

[[0x1fC00000] ,[0x1fC20000] ,MPU_RW ,MPU_CCA_UC ,0x1111])

490

} else {

491

@dynamic_regions = (

492

[[0] ,["MCURO_HWRW", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,MPU_ROEX,MPU_CCA_UCA,0x1111],

493

[["MCURO_HWRW",LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_MCURO_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RO ,MPU_CCA_UCA,0x1111,0],

494

[["MCURO_HWRW", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_MCURO_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RO ,MPU_CCA_CWB,0x1111,6],

495

[["EXTSRAM", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_MCURW_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_UCA,0x1111,0],

496

[["EXTSRAM", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_MCURW_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_CWB,0x1111,6],

497

[["EXTSRAM", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_IOCU2_ULTRA_DATA", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_CWB,0x1111,2],

498

[["EXTSRAM_ULTRA_DATA", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_IOCU3_MCURW_HWRW_ZI_15", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_CWB,0x1111,3],

499

[["DRDI", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["DRDI", LinkerSymPostfix::Limit,LinkerSymPrefix::Image] ,MPU_RO ,MPU_CCA_UCA,0x1111,0],

500

[["DRDI", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["DRDI", LinkerSymPostfix::Limit,LinkerSymPrefix::Image] ,MPU_RO ,MPU_CCA_CWB,0x1111,6],

501

[["EXTSRAM_FS_ZI", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["EXTSRAM_FS_ZI", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_UCA,0x1111,1],

502

[["L2SRAM_L2C_CODE", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["L2SRAM_L2C_CODE", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_ROEX,MPU_CCA_CWB,0x1111,9],

503

[["L2SRAM_L2C_DATA", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["L2SRAM_L2C_DATA", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_CWB,0x1111,9],

504

[[0x1f000000] ,[0x1f020000] ,MPU_RW ,MPU_CCA_UC ,0x1111],

505

[[0x1fC00000] ,[0x1fC20000] ,MPU_RW ,MPU_CCA_UC ,0x1111])

506

}

507

unshift @dynamic_regions, [[0],["MCURO_HWRW", LinkerSymPostfix::Base,LinkerSymPrefix::Image],MPU_ROEX,MPU_CCA_CWB,0x1111,9] if(FileInfo::is("MTK_MODEM_ARCH", "MT6297") or FileInfo::is("MTK_MODEM_ARCH", "MT6297P"));

508

} else {

509

$mpu_null_index =21;

510

$mpu_dynamic_max = 13;

511

@dynamic_regions = (

512

[[0] ,["MCURO_HWRW", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,MPU_ROEX,MPU_CCA_UCA,0x111],

513

[["MCURO_HWRW",LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_MCURO_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RO ,MPU_CCA_UCA,0x111,0],

514

[["EXTSRAM", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["L2CACHE_LOCK", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_UCA,0x111,0],

515

[["EXTSRAM_FS_ZI", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["EXTSRAM_FS_ZI", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_UCA,0x111],

516

[["MCURO_HWRW", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_MCURO_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RO ,MPU_CCA_CWB,0x111,6],

517

[["EXTSRAM", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_IOCU3_READ_ALLOC_MCURW_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image],MPU_RW ,MPU_CCA_CWB,0x111,6],

518

[["DRDI", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["DRDI", LinkerSymPostfix::Limit,LinkerSymPrefix::Image] ,MPU_RO ,MPU_CCA_CWB,0x111,6],

519

[["DRDI", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["DRDI", LinkerSymPostfix::Limit,LinkerSymPrefix::Image] ,MPU_RO ,MPU_CCA_CWB,0x111,0],

520

[["CACHED_EXTSRAM_L2CACHE_LOCK_DATA", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["DYNAMIC_SECTION_L2CACHE_LOCK_0", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RWEX,MPU_CCA_CWB,0x111,9],

521

[["DYNAMIC_SECTION_L2CACHE_LOCK_L_IDLE", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["DYNAMIC_SECTION_L2CACHE_LOCK_C_DO_DATALINK", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image],MPU_RWEX,MPU_CCA_CWB,0x111,9],

522

[["CACHED_EXTSRAM_IOCU2_MCURW_HWRW", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_IOCU2_MCURW_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_CWB,0x111,2],

523

[["CACHED_EXTSRAM_IOCU3_READ_ALLOC_MCURW_HWRW", LinkerSymPostfix::Base,LinkerSymPrefix::Image],["CACHED_EXTSRAM_IOCU3_READ_ALLOC_MCURW_HWRW", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image],MPU_RW ,MPU_CCA_CWB,0x111,3],

524

[["EXTSRAM_CORE0", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_CORE0", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_WB ,0x001,6],

525

[["EXTSRAM_CORE0", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_CORE0", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_NA ,MPU_CCA_UCA,0x110,0],

526

[["EXTSRAM_CORE1", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_CORE1", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_RW ,MPU_CCA_WB ,0x010,6],

527

[["EXTSRAM_CORE1", LinkerSymPostfix::Base,LinkerSymPrefix::Image] ,["CACHED_EXTSRAM_CORE1", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_NA ,MPU_CCA_UCA,0x101,0],

528

[[0x1f000000] ,[0x1f020000] ,MPU_RW ,MPU_CCA_UC ,0x111],

529

[[0x1fC00000] ,[0x1fC20000] ,MPU_RW ,MPU_CCA_UC ,0x111]);

}

my @fixed_core0 = ([[0x9FB00000] ,[0x9FB3FFFF] ,MPU_ROEX ,MPU_CCA_CWB ,0x0001]);# bootslave

535

536

my @fixed_core1 = ([[0x9FB40000] ,[0x9FB7FFFF] ,MPU_ROEX ,MPU_CCA_CWB ,0x0010]);

537

538

my @fixed_core2 = ([[0x9FB80000] ,[0x9FBBFFFF] ,MPU_ROEX ,MPU_CCA_CWB ,0x0100]);

539

540

my @fixed_core3 = ([[0x9FBC0000] ,[0x9FBFFFFF] ,MPU_ROEX ,MPU_CCA_CWB ,0x1000]);

541

542

my @null_prot = ( [[0] ,["ROM", LinkerSymPostfix::ZILimit,LinkerSymPrefix::Image] ,MPU_NA ,MPU_CCA_UC ,0x1111,0]);#21

543

#****************************************************************************

544

# >>> Main Flow

545

#****************************************************************************

546

# Parse regions table and create MPU region tables

547

print "\nCalculate dynamic MPU entries:\n";

548

Parse_regions(\@dynamic_regions,MPU_DYNAMIC);

549

if(($#MPU_table_core0 >= $mpu_dynamic_max) or ($#MPU_table_core1 >= $mpu_dynamic_max) or ($#MPU_table_core2 >= $mpu_dynamic_max) or ($#MPU_table_core3 >= $mpu_dynamic_max)) {

550

print "\nERROR: Dynamic mpu entry count exceeded max count ".$mpu_dynamic_max."\n";

551

print "\nCORE 0 MPU table:\n";

552

PrintMPUTable(\@MPU_table_core0);

553

print "\nCORE 1 MPU table:\n";

554

PrintMPUTable(\@MPU_table_core1);

555

print "\nCORE 2 MPU table:\n";

556

PrintMPUTable(\@MPU_table_core2);

557

print "\nCORE 3 MPU table:\n";

558

PrintMPUTable(\@MPU_table_core3);

559

exit 1;

560

}

561

if ($g_MakeFile_ref->{MTK_MODEM_ARCH} =~ /MT6297/) {

562

FillTable(\@MPU_table_core0,19);

563

FillTable(\@MPU_table_core1,19);

564

FillTable(\@MPU_table_core2,19);

565

FillTable(\@MPU_table_core3,19);

566

567

print "\nCalculate CORE0 MPU entries:\n";

568

Parse_regions(\@fixed_core0,MPU_FIXED);

569

print "\nCalculate CORE1 MPU entries:\n";

570

Parse_regions(\@fixed_core1,MPU_FIXED);

571

print "\nCalculate CORE2 MPU entries:\n";

572

Parse_regions(\@fixed_core2,MPU_FIXED);

573

print "\nCalculate CORE3 MPU entries:\n";

574

Parse_regions(\@fixed_core3,MPU_FIXED);

575

}

576

FillTable(\@MPU_table_core0,$mpu_null_index);

577

FillTable(\@MPU_table_core1,$mpu_null_index);

578

FillTable(\@MPU_table_core2,$mpu_null_index);

579

FillTable(\@MPU_table_core3,$mpu_null_index);

580

581

Parse_regions(\@null_prot,MPU_NULL);

582

FillTable(\@MPU_table_core0,32);

583

FillTable(\@MPU_table_core1,32);

584

FillTable(\@MPU_table_core2,32);

585

FillTable(\@MPU_table_core3,32);

586

587

print "\nCORE 0 MPU table:\n";

588

PrintMPUTable(\@MPU_table_core0);

589

print "\nCORE 1 MPU table:\n";

590

PrintMPUTable(\@MPU_table_core1);

591

print "\nCORE 2 MPU table:\n";

592

PrintMPUTable(\@MPU_table_core2);

593

print "\nCORE 3 MPU table:\n";

594

PrintMPUTable(\@MPU_table_core3);

595

print "\nUpdate ELF file: $elf_file\n";

596

print "\nUpdate Core 0 MPU info to ELF file: $elf_file\n";

597

UpdateMPUtoELF($elf_file,\@MPU_table_core0,GetSymbolAddressFromElf("mpu_region_config_core0"));

598

print "\nUpdate Core 1 MPU info to ELF file: $elf_file\n";

599

UpdateMPUtoELF($elf_file,\@MPU_table_core1,GetSymbolAddressFromElf("mpu_region_config_core1"));

600

print "\nUpdate Core 2 MPU info to ELF file: $elf_file\n";

601

UpdateMPUtoELF($elf_file,\@MPU_table_core2,GetSymbolAddressFromElf("mpu_region_config_core2"));

602

print "\nUpdate Core 3 MPU info to ELF file: $elf_file\n";

603

UpdateMPUtoELF($elf_file,\@MPU_table_core3,GetSymbolAddressFromElf("mpu_region_config_core3"));

print "End\n";

exit 0;

#****************************************************************************

608

# Subroutines

609

#****************************************************************************

610

sub Parse_regions

611

{

612

my ($table_ref,$mode) = @_;

613

foreach my $region_ref (@{$table_ref}) {

my $area_begin = 0;

my $area_end = 0;

my $area_length = 0;

if(($region_ref->[0][0]^$region_ref->[0][0])) {

618

$area_begin = hex(LinkerOutputParser::GetLinkerSymbolAddress($region_ref->[0][0],$region_ref->[0][1],$region_ref->[0][2]));

619

} else {

620

$area_begin = $region_ref->[0][0];

621

}

622

if(($region_ref->[1][0]^$region_ref->[1][0])) {

623

$area_end = hex(LinkerOutputParser::GetLinkerSymbolAddress($region_ref->[1][0],$region_ref->[1][1],$region_ref->[1][2]));

624

} else {

625

$area_end = $region_ref->[1][0];

626

}

627

if (defined $region_ref->[5]) {

628

$area_begin = get_physical_address($area_begin)| $region_ref->[5]<<28;

629

$area_end = get_physical_address($area_end) | $region_ref->[5]<<28;

630

}

631

$area_length = $area_end - $area_begin;

632

633

print "Start: " .&CommonUtil::Dec2Hex($area_begin)." End: " .&CommonUtil::Dec2Hex($area_end)." Length: " .&CommonUtil::Dec2Hex($area_length). " ". get_mpu($region_ref->[2]|$region_ref->[3]) . "\n";

634

if ($area_length > 0) {

635

my @mpu_info = @{GetMPUinfo($area_begin,$area_length,$mode)};

636

foreach my $mpu (@mpu_info) {

637

my $control_reg = (0<<15)|($mpu->[1]<<10)|(($mpu->[2]-1)<<6)|$region_ref->[2]|$region_ref->[3];

638

InsertMPURegion($mpu->[0],$control_reg,$region_ref->[4]);

639

}

640

} elsif (($mode == MPU_FIXED) || ($mode == MPU_NULL)) {

641

InsertMPURegion(0,0,$region_ref->[4]);

}

}

}

sub FillTable

{

my ($table_ref, $elements) = @_;

649

my $index = $#{$table_ref};

650

for ($index+=1;$index<$elements;$index+=1) {

651

push @{$table_ref}, [0,0];

}

}

sub UpdateMPUtoELF

{

my ($elf,$table_ref,$offset) = @_;

658

if ($offset == 0) {

659

print "MPU table address invalid. $elf not updated\n";

660

return;

661

}

662

open (my $BIN_FILE, "+<$elf") or die "Open $elf file failed\n";

663

binmode $BIN_FILE;

664

seek $BIN_FILE, $offset,0;

665

foreach my $region (@$table_ref) {

666

print $BIN_FILE pack('L<[2]',@{$region});

667

}

668

close $BIN_FILE;

669

print "$elf file updated successfully\n";

}

sub InsertMPURegion

{

my ($base,$control,$core) = @_;

675

push @MPU_table_core0, [$base,$control] if ($core & 0x0001);

676

push @MPU_table_core1, [$base,$control] if ($core & 0x0010);

677

push @MPU_table_core2, [$base,$control] if ($core & 0x0100);

678

push @MPU_table_core3, [$base,$control] if ($core & 0x1000);

}

sub msb

{

my ($n, $base) = (shift, 0);

684

$base++ while $n >>= 1;

return $base;

}

sub lsb

{

my $n = shift;

return msb($n & -$n);

}

sub get_mpu

{

my ($mpu) = @_;

my $rval ="";

switch ($mpu & 0x38) {

699

case MPU_NA { $rval .= "MPU_NA "; }

700

case MPU_RO { $rval .= "MPU_RO "; }

701

case MPU_ROEX { $rval .= "MPU_ROEX"; }

702

case MPU_WO { $rval .= "MPU_WO "; }

703

case MPU_RW { $rval .= "MPU_RW "; }

704

case MPU_RWEX { $rval .= "MPU_RWEX"; }

705

}

706

switch ($mpu & 0x7) {

707

case MPU_CCA_UC { $rval .= " MPU_CCA_UC "; }

708

case MPU_CCA_WB { $rval .= " MPU_CCA_WB "; }

709

case MPU_CCA_CWBE { $rval .= " MPU_CCA_CWBE"; }

710

case MPU_CCA_CWB { $rval .= " MPU_CCA_CWB "; }

711

case MPU_CCA_UCA { $rval .= " MPU_CCA_UCA ";}

}

return $rval;

}

sub GetPageSize

{

my ($addr) = @_;

my $pagesize = 1<<$addr;

720

return sprintf("%4.dB ",$pagesize) if($pagesize <= 1024);

721

$pagesize /= 1024;

722

if ($pagesize <= 1024) {

723

return sprintf("%4.dKB",$pagesize);

724

} else {

725

return sprintf("%4.dMB",$pagesize/1024);

}

}

sub GetGran

{

my ($val) = @_;

return 28 if ($val == 0);

return lsb($val);

}

sub GetMPUinfo

{

my ($start, $length,$type) = @_;

739

my $addr_gran = GetGran($start);

740

my @mpu_pages;

741

if ($type == MPU_NULL) {

742

my $page_size = msb($length)-3;

743

$page_size = 5 if($page_size < 5);

744

if ($addr_gran >= $page_size) {

745

my $page_count = ($length>>$page_size);

746

$page_size += lsb($page_count);

747

$page_count >>= lsb($page_count);

748

push @mpu_pages,[$start, $page_size, $page_count];

}

} else {

if ($length != 0) {

#set MPU area total resrvation size to 0

753

my $reserved_size = 0;

754

#current length MPU area to be allocated

755

my $current_length = $length;

756

#initial allocated page count

757

my $page_count = 0;

758

#initial page size is determined from length

759

my $page_size = msb($current_length)-3;

760

#check that if we still need to make MPU allocation

761

while ($reserved_size < $length) {

762

#Page size cannot be less than 32 bytes

763

$page_size = 5 if($page_size < 5);

764

#Check if we are using address or length granularity to determine page size.

765

if ($addr_gran < $page_size) {

766

$page_size = $addr_gran;

767

}

768

$page_count = ($current_length>>$page_size);

769

#check do we need add one more page if we have tailing bytes in current allocation

770

$page_count += 1 if (((1<<$page_size)-1) & $current_length);

771

if (($page_count+(($start>>$page_size) &0xf)) > 16) {

772

#if we are allocating more than 16 pages we increase page_size but not exceed address granularity

773

if ($page_size<$addr_gran) {

$page_size +=1;

next;

}

#if we cannot increase page size we allocate as many pages as possible.

778

$page_count = 16-(($start>>$page_size) &0xf);

779

}

780

#check if we can use larger page granularity for allocation. Without exceeding address granularity

781

my $i = lsb($page_count);

782

if ($i!=0) {

783

if ($addr_gran < ($page_size+$i)) {

784

$i = $addr_gran-$page_size;

}

$page_count >>=$i;

$page_size +=$i;

}

push @mpu_pages,[$start, $page_size, $page_count];

790

#calculate total reservation size

791

$reserved_size += $page_count<<$page_size;

792

#calculate remaining reservation start address

793

$start += $page_count<<$page_size;

794

#calculate new address page granularity

795

$addr_gran = GetGran($start);

796

#remaining area to be allocated

797

$current_length -= $page_count<<$page_size;

798

#new initial page size

799

$page_size = msb($current_length)-3;

}

}

}

if (($type == MPU_FIXED)|| ($type == MPU_NULL)) {

804

push @mpu_pages, [0,0,0] if (@mpu_pages == undef);

}

return \@mpu_pages;

}

sub PrintMPUTable

{

my ($table_ref) = @_;

812

#Print table

813

my $index = 0;

814

print "Index Base Control Attr CCA Size Count\n";

815

foreach my $region (@$table_ref) {

816

if ($region->[1]) {

817

print " $index " .&CommonUtil::Dec2Hex($region->[0]) . " " .&CommonUtil::Dec2Hex($region->[1]). " ".&get_mpu($region->[1]);

818

my $page_size = GetPageSize(($region->[1]>>10)&0x1f);

819

my $page_count= (($region->[1]>>6)&0xf)+1;

820

print " $page_size $page_count\n";

821

} else {

822

print " $index " .&CommonUtil::Dec2Hex($region->[0]) . " " .&CommonUtil::Dec2Hex($region->[1])."\n";

}

$index +=1;

}

}

sub GetSymbolAddressFromElf

829

{

830

my ($symName) = @_;

831

my $refSymbols = LinkerOutputParser::GetSymbol();

832

my $syminfo = $refSymbols->{$symName};

833

my $nSectionOffset = hex(LinkerOutputParser::GetExeRegionInfo($syminfo->[Symbol::Region], Region::Offsets));

834

my $nSectionStart = hex(LinkerOutputParser::GetExeRegionInfo($syminfo->[Symbol::Region], Region::VMA)) & 0x0fffffff;

835

return ($nSectionOffset - $nSectionStart) + (hex($syminfo->[Symbol::Addr]) & 0x0fffffff);

836

}

837

838

sub get_physical_address

839

{

840

my ($address) = @_;

841

my $addr_mask = 0x0fffffff;

842

my $bank = $address>>28;

843

if (($bank == 1) || ($bank == 7)) {

844

$addr_mask = 0x1fffffff;

845

}

846

return ($address & $addr_mask);

847

}