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rjw6c1fd8f2022-11-30 14:33:01 +08001/*****************************************************************************
2* Copyright Statement:
3* --------------------
4* This software is protected by Copyright and the information contained
5* herein is confidential. The software may not be copied and the information
6* contained herein may not be used or disclosed except with the written
7* permission of MediaTek Inc. (C) 2012
8*
9* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
10* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
11* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
12* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
13* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
14* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
15* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
16* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
17* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
18* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
19* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
20* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
21*
22* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
23* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
24* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
25* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
26* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
27*
28* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
29* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
30* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
31* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
32* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
33*
34*****************************************************************************/
35
36/*******************************************************************************
37 * Filename:
38 * ---------
39 * drv_gpt.c
40 *
41 * Project:
42 * --------
43 * TATAKA
44 *
45 * Description:
46 * ------------
47 * Low level GPT driver
48 *
49 * Author:
50 * -------
51 * -------
52 *
53 * ==========================================================================
54 * $Log$
55 *
56 * 07 02 2019 yaoyong.ju
57 * [MOLY00418290] [VMOLY]Remove IRQ_Register_LISR() and IRQSensitivity() From IRQ Initialization Source Code
58 * .Remove IRQ_Restier_LISR and IRQSensitivity API in GPT
59 *
60 * 04 26 2019 yaoyong.ju
61 * [MOLY00399544] [MT6297][Apollo][PreSQC][MP0.5][HQ][MTBF][Lab][Ericsson][ErrorTimes:1][1][core2,vpe1,tc2(vpe7)]Assert fail: drv_gpt.c 287 - (LISR)GPT_DSCC0_Lisr for
62 * .
63 * 1.Remove the debug info
64 * 2.Remove unused code
65 *
66 * 03 25 2019 yaoyong.ju
67 * [MOLY00390408] [MT6297][Apollo][PreSQC][MP0.5][NVIOT][Nokia][Oulu][4G][Overnight]: Assert fail: nicc_ctrl.c 317 - USBCORE
68 * .Add the debug info for the MOLY
69 *
70 * 05 04 2017 way.chen
71 * [MOLY00246761] [UMOLYA] Replace PDN API with OF API, Request by PDN owner(Devin )
72 * Remove 26M on/off API.
73 *
74 * 07 06 2016 way.chen
75 * [MOLY00185478] [UMOLYA] Check in 93 serial GPT driver
76 * Add 26M clock operation.
77 *
78 * 06 20 2016 way.chen
79 * [MOLY00185478] [UMOLYA] Check in 93 serial GPT driver
80 * Check in 93 GPT driver.
81 *
82 * 01 06 2016 way.chen
83 * [MOLY00156138] [UMOLY] Patch GPT driver for U4G FPGA
84 * Patch GPT Driver for U4G FPGA, the FPGA Start Version is 20151231_u4g_ltel2_elbrus_vivado_2015.
85 *
86 * 12 10 2013 chin-chieh.hung
87 * [MOLY00049464] [Driver][GPT] Add debug GPT, request by MS Lin
88 * Add Debug GPT APIs
89 *
90 * 08 26 2013 chin-chieh.hung
91 * [MOLY00011352] [Driver] Update for common devdrv driver
92 * remove compiling warning
93 *
94 * 07 03 2013 chin-chieh.hung
95 * [MOLY00027330] [ARM7toMOLY] ARM7 Build/SYSGEN/Functions Update to TRUNK
96 * .
97 *
98 * 05 13 2013 chin-chieh.hung
99 * [MOLY00013348] [MT6290 Bring-up] Basic Platform Support
100 * MT6290E1_FristCall Branch sync back to MOLY Trunk
101 *
102 * 04 28 2013 chin-chieh.hung
103 * [MOLY00013021] [MT6290 PO admit] Move the LISR context to HISR context
104 * LISR 2 HISR support, driver part
105 *
106 * 04 23 2013 chin-chieh.hung
107 * [MOLY00013021] [MT6290 PO admit] Move the LISR context to HISR context
108 * MOLY LISR2HISR, Driver part
109 ****************************************************************************/
110
111#include "drv_features_gpt.h"
112#include "drv_comm.h"
113
114#include "drv_gpt.h"
115#include "intrCtrl.h"
116
117#include "dcl.h"
118#include "kal_general_types.h"
119#include "kal_public_api.h"
120#include "sync_data.h"
121#if !defined(DRV_GPT_OFF)
122
123/*****************************************************************************
124 * SYMBOL Definition *
125 *****************************************************************************/
126
127
128/*****************************************************************************
129 * Global/External Variable *
130 *****************************************************************************/
131static PFN_DCL_CALLBACK pfHGPTCallback[DRV_GPT_TOTAL_COUNTER];
132static DCL_EVENT eHGPTEvent[DRV_GPT_TOTAL_COUNTER];
133
134/*****************************************************************************
135 * function declaration *
136 *****************************************************************************/
137//function declaration.
138
139
140
141/*****************************************************************************
142 * LISR/HISR/Callback Functions *
143 *****************************************************************************/
144static void drv_default_callback(DCL_EVENT event)
145{
146 kal_uint32 ASSERT_IN_GPT_DEFAULT_CALLBACK = 0;
147 ASSERT(ASSERT_IN_GPT_DEFAULT_CALLBACK);
148 return;
149}
150
151/*****************************************************************************
152 * Basic Driver Implementation *
153 *****************************************************************************/
154
155/*-----------------------------------------------------------------------*
156* FUNCTION
157* drv_gpt_lisr
158*
159* DESCRIPTION
160* GPT interrupt handler (LISR)
161*
162* CALLS
163* It is called when GPT interrupt is coming
164*
165* PARAMETERS
166* None
167*
168* RETURNS
169* None
170*
171* GLOBALS AFFECTED
172* external_global
173*------------------------------------------------------------------------*/
174void drv_gpt_lisr(kal_uint32 v)
175{
176 ASSERT(MDGPT_INTR_ID(DRV_GPT_BASE_COUNTER_NUM) <= v && v <= MDGPT_INTR_ID(DRV_GPT_TOTAL_COUNTER));
177 pfHGPTCallback[MDGPT_INTR_ID2TIMER(v)-1](eHGPTEvent[MDGPT_INTR_ID2TIMER(v)-1]);
178}
179
180/*-----------------------------------------------------------------------*
181* FUNCTION
182* drv_gpt_reset
183*
184* DESCRIPTION
185* This function is to reset the hardware GPT module.
186*
187* PARAMETERS
188* None
189*
190* RETURNS
191* DCL_STATUS_OK
192*
193*------------------------------------------------------------------------*/
194void drv_gpt_reset(void)
195{
196 kal_uint32 i;
197 for(i = DRV_GPT_BASE_COUNTER_NUM; i <= DRV_GPT_TOTAL_COUNTER; i++)
198 {
199 DRV_WriteReg32(MDGPT_CTRL_REG(i), 0);
200 DRV_WriteReg32(MDGPT_CNT_REG(i), 0xFFFFF);
201 DRV_WriteReg32(MDGPT_PSR_REG(i), 0);
202 IRQClearInt(MDGPT_INTR_ID(i));
203
204 pfHGPTCallback[i-1] = drv_default_callback;
205 //IRQUnmask(MDGPT_INTR_ID(i));
206 }
207}
208
209/*-----------------------------------------------------------------------*
210* FUNCTION
211* drv_gpt_set_timer
212*
213* DESCRIPTION
214* This function is to configure the gpt timer.
215*
216* PARAMETERS
217* None
218*
219* RETURNS
220* None
221*
222*------------------------------------------------------------------------*/
223void drv_gpt_set_timer(kal_uint32 num, kal_uint32 time, kal_uint32 mode)
224{
225 ASSERT( (DRV_GPT_BASE_COUNTER_NUM <= num) && (num <= DRV_GPT_TOTAL_COUNTER) && (time <= 0xFFFFFFFUL) );
226 DRV_WriteReg32(MDGPT_CNT_REG(num), time);
227
228 mode &= MDGPT_CTRL_MODE_REPEAT | MDGPT_CTRL_MODE_ONESHOT;
229
230 DRV_WriteReg32_NPW(MDGPT_CTRL_REG(num), mode); //1<<1 enable timer
231}
232
233/*-----------------------------------------------------------------------*
234* FUNCTION
235* drv_gpt_get_data
236*
237* DESCRIPTION
238* This function is to get the current data value.
239*
240* PARAMETERS
241* None
242*
243* RETURNS
244* None
245*
246*------------------------------------------------------------------------*/
247kal_uint32 drv_gpt_get_data(kal_uint32 num)
248{
249 ASSERT( (DRV_GPT_BASE_COUNTER_NUM <= num) && (num <= DRV_GPT_TOTAL_COUNTER));
250 return DRV_Reg32(MDGPT_DATA_REG(num));
251}
252
253void drv_gpt_set_data(kal_uint32 num, kal_uint32 time)
254{
255 ASSERT( (DRV_GPT_BASE_COUNTER_NUM <= num) && (num <= DRV_GPT_TOTAL_COUNTER) && (time <= 0xFFFFFFFUL) );
256 DRV_WriteReg32(MDGPT_CNT_REG(num), time);
257}
258
259/*-----------------------------------------------------------------------*
260* FUNCTION
261* drv_gpt_start_timer
262*
263* DESCRIPTION
264* This function is to start the gpt timer.
265*
266* PARAMETERS
267* None
268*
269* RETURNS
270* None
271*
272*------------------------------------------------------------------------*/
273void drv_gpt_start_timer(kal_uint32 num)
274{
275 unsigned int timer_status;
276
277 ASSERT( (num >= DRV_GPT_BASE_COUNTER_NUM) && (DRV_GPT_TOTAL_COUNTER >= num) );
278
279 timer_status = DRV_Reg32(MDGPT_CTRL_REG(num));
280
281 if( timer_status & MDGPT_CTRL_MODE_ENABLE ){
282 //ASSERT(0);
283 return;
284 }
285 DRV_WriteReg32_NPW(MDGPT_CTRL_REG(num), timer_status | MDGPT_CTRL_MODE_ENABLE);
286 Data_Sync_Barrier();
287}
288
289/*-----------------------------------------------------------------------*
290* FUNCTION
291* drv_gpt_stop_timer
292*
293* DESCRIPTION
294* This function is to start the gpt timer.
295*
296* PARAMETERS
297* None
298*
299* RETURNS
300* None
301*
302*------------------------------------------------------------------------*/
303void drv_gpt_stop_timer(kal_uint32 num)
304{
305 unsigned int timer_status;
306
307 ASSERT( (num >= DRV_GPT_BASE_COUNTER_NUM) && (DRV_GPT_TOTAL_COUNTER >= num) );
308
309 timer_status = DRV_Reg32(MDGPT_CTRL_REG(num));
310
311 DRV_WriteReg32_NPW(MDGPT_CTRL_REG(num), timer_status & (~MDGPT_CTRL_MODE_ENABLE));
312 Data_Sync_Barrier();
313}
314
315kal_uint32 drv_gpt_get_version(void)
316{
317 return DRV_Reg32(MDGPT_BASE);
318}
319
320#if 0
321/* under construction !*/
322/* under construction !*/
323/* under construction !*/
324/* under construction !*/
325/* under construction !*/
326/* under construction !*/
327/* under construction !*/
328/* under construction !*/
329/* under construction !*/
330/* under construction !*/
331/* under construction !*/
332/* under construction !*/
333/* under construction !*/
334/* under construction !*/
335/* under construction !*/
336/* under construction !*/
337/* under construction !*/
338/* under construction !*/
339/* under construction !*/
340/* under construction !*/
341/* under construction !*/
342/* under construction !*/
343/* under construction !*/
344/* under construction !*/
345/* under construction !*/
346/* under construction !*/
347/* under construction !*/
348#endif
349
350#else /*!defined(DRV_GPT_OFF)*/
351
352#endif /*!defined(DRV_GPT_OFF)*/
353
354void startSystemTimer(void){
355 IRQUnmask(MDGPT_INTR_ID(DRV_GPT_SYSTEM_TIMER));
356 drv_gpt_start_timer(DRV_GPT_SYSTEM_TIMER);
357}
358