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192.168.1.100 / T800_MD / e71eb379e17798c74cc6cd1e7616533f5e865c67 / . / mcu / interface / l1 / ul1 / ul1_public.h
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rjw6c1fd8f2022-11-30 14:33:01 +0800[diff] [blame]1/*******************************************************************************
2* Modification Notice:
3* --------------------------
4* This software is modified by MediaTek Inc. and the information contained
5* herein is confidential. The software may not be copied and the information
6* contained herein may not be used or disclosed except with the written
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22* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
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32* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
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34*******************************************************************************/
35
36
37/*****************************************************************************
38 *
39 * Filename:
40 * ---------
41 * ul1_public.h
42 *
43 * Project:
44 * --------
45 * MT6276 Project
46 *
47 * Description:
48 * ------------
49 * UL1 exports functions which are used by other Layer 1 modules, such as L1, RTB, DM.
50 *
51 * Author:
52 * -------
53 * -------
54 *
55 *============================================================================
56 * HISTORY
57 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
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298 *============================================================================
299 ****************************************************************************/
300
301
302#ifndef UL1_PUBLIC_H
303#define UL1_PUBLIC_H
304
305#if 0
306#if defined(__UL1_GEMINI__) || defined ( __GEMINI__ )
307/* under construction !*/
308#endif
309#endif
310//#include "kal_general_types.h"
311#include "ul1_def.h"
312#if ( defined( __GEMINI__ ) && defined ( __UMTS_RAT__ ) ) && defined ( __MTK_TARGET__ )
313#include "l1_rtb.h"
314#endif
315
316#define MS_PER_FRAME 10
317#define CHIP_COUNT_PER_FRAME 38400
318#define CHIP_COUNT_PER_SLOT 2560
319#define CHIP_COUNT_PER_SYMBOL 256
320#define ECHIP_COUNT_PER_CHIP 8
321#define ECHIP_COUNT_PER_FRAME ( CHIP_COUNT_PER_FRAME*ECHIP_COUNT_PER_CHIP )
322#define ECHIP_COUNT_PER_SLOT ( CHIP_COUNT_PER_SLOT*ECHIP_COUNT_PER_CHIP )
323#define SLOTS_PER_FRAME 15
324#define SUBFRAMES_PER_FRAME 5
325#define SLOTS_PER_SUBFRAME 3
326#define ECHIP_2_SLOT( len ) ( (len) / ECHIP_COUNT_PER_SLOT )
327#define ECHIP_2_FRAME( len ) ( (len) / ECHIP_COUNT_PER_FRAME )
328#define MAX_SFN 4096
329#define MAX_CFN 256
330#define FIND_TIMER_ALL_SFN_RANGE (MAX_SFN - 1)
331#define FIND_TIMER_ALL_CFN_RANGE (MAX_CFN - 1)
332
333#define TIMER_PRIORITY_INTRABCH_LOW 0x00000001 /* SIB, SIB7, SFN, SFN meas. */
334#define TIMER_PRIORITY_INTRABCH_MED 0x00000002 /* SIB, SIB7, SFN, SFN meas. */
335#define TIMER_PRIORITY_INTRABCH_HIGH 0x00000004 /* SIB, SIB7, SFN, SFN meas. */
336#define TIMER_PRIORITY_INTERBCH_LOW 0x00000010 /* SIB, SIB7, SFN, SFN meas. */
337#define TIMER_PRIORITY_INTERBCH_MED 0x00000020 /* SIB, SIB7, SFN, SFN meas. */
338#define TIMER_PRIORITY_INTERBCH_HIGH 0x00000040 /* SIB, SIB7, SFN, SFN meas. */
339#define TIMER_PRIORITY_MAINCH 0x00000080 /* PICH(PCH), FACH, DLDCH, ULDCH. */
340#define TIMER_TRIORITY_PHASE2_PCH 0x00020000 /* Phase 2 PCH */
341#define TIMER_PRIORITY_SUBCH 0x00000100 /* CTCH, RACH. */
342#define TIMER_PRIORITY_TGPS 0x00000200
343#define TIMER_PRIORITY_CCM 0x00000400 /* Channel configuration start/stop. */
344#define TIMER_PRIORITY_BCHSTOP 0x00000800
345#define TIMER_PRIORITY_STOP_ALL 0x00002000 /* Stop all CH, CM, CS */
346#define TIMER_PRIORITY_CS_LOW 0x00001000 /* FS or CS, depending on L1 state. */
347#define TIMER_PRIORITY_CS_HIGH 0x00004000 /* SCS. */
348#define TIMER_PRIORITY_DCH_CONTROL 0x00008000
349#define TIMER_PRIORITY_HSDSCH_CONTROL 0x00000008 /* HSDSCH control */
350#define TIMER_PRIORITY_EDCH_CONTROL 0x00002000 /* EDCH control */
351#define TIMER_PRIORITY_EFACH_DRX_MEAS 0x10000000 /* Inter-F and inter-RAT CM for EFACH DRX */
352#define TIMER_PRIORITY_EM 0x00010000 /* EM usage*/
353
354#define UL1_FRAME ( 10000 )
355#define UL1_FRAME2RTB( x ) ( (x)*UL1_FRAME )
356#define UL1_ECHIP2RTB( x ) ( ((x)*25)/(2*384) )
357#define RTB2UL1_ECHIP( x ) ( ((x)*2*384)/25 )
358
359typedef kal_int16 ACT_TIME; /* -1 ~ 255 */
360typedef kal_int16 CFN; /* 0 ~ 255 */
361typedef kal_int16 SFN; /* 0 ~ 4095 */
362typedef kal_uint32 UTimeStamp;
363typedef kal_uint8 UTID;
364typedef kal_uint16 UARFCN;
365
366/* UTimer structures and API. */
367#define UL1_TIMER_TYPE(x) x
368typedef enum
369{
370#include "ul1_timertype.h"
371} UTimerType;
372#undef UL1_TIMER_TYPE
373
374typedef struct
375{
376 kal_int16 fn;
377 kal_int32 echips;
378} UTime;
379
380/* L1S use only!
381 * It is used for calculating DL TPC CER(Command Error Rate). */
382#ifdef __L1_STANDALONE__
383typedef struct
384{
385 LOCAL_PARA_HDR
386 FDD_edch_scell_E carrier;
387 kal_uint8 cfn;
388 kal_uint8 dl_tpc_result[15]; /* DL TPC result for each slot.
389 - dl_tpc_result[0]: slot 0, dl_tpc_result[1]: slot 1, dl_tpc_result[2]: slot 2,...
390 - dl_tpc_result[]: 1 -> UP; 3 -> DOWN; 0 -> HOLD */
391} ul1d_dl_tpc_result_ind_struct;
392#endif
393
394void UL1_SFNTimeAdd_Frames( UTime *time, kal_uint16 fn );
395void UL1_SFNTimeSub_Frames( UTime *time, kal_int16 fn );
396void UL1_SFNTimeAdd_EChips( UTime *time, kal_int32 tm );
397void UL1_SFNTimeSub_EChips( UTime *time, kal_int32 tm );
398void UL1_SFNTimeAdd( UTime *time, kal_int16 fn, kal_int32 tm );
399void UL1_SFNTimeSub( UTime *time, kal_int16 fn, kal_int32 tm );
400kal_int32 UL1_SFNTimeDiff( UTime timeA, UTime timeB );
401void UL1_CFNTimeAdd_EChips( UTime *time, kal_int32 tm );
402void UL1_CFNTimeSub_EChips( UTime *time, kal_int32 tm );
403void UL1_CFNTimeAdd( UTime *time, kal_int16 fn, kal_int32 tm );
404void UL1_CFNTimeSub( UTime *time, kal_int16 fn, kal_int32 tm );
405kal_int32 UL1_CFNTimeDiff( UTime timeA, UTime timeB );
406//Riley add
407void UL1_TimeAdd( UTime *time, kal_int32 fn, kal_int32 tm );
408void UL1_TimeSub( UTime *time, kal_int16 fn, kal_int32 tm, kal_int16 max_sfn_add );
409//Riley add end
410/* End of Time arithmetic. */
411void UL1_TimeAdd_EChips( UTime *time, kal_int32 tm, kal_int32 *max_sfn_add );
412#if defined( __GEMINI__ ) && defined ( __UMTS_RAT__ )
413kal_int16 UL1I_GetTimeStamp_2G( kal_int32 *tsChips );
414#endif
415
416/* Frame numbers arithmetic. */
417SFN UL1_SFNAdd( SFN a, SFN b );
418SFN UL1_SFNAdd_For_Sib( SFN a, SFN b );
419SFN UL1_SFNSub( SFN a, SFN b );
420kal_int16 UL1_SFNDiff( SFN a, SFN b );
421CFN UL1_CFNAdd( CFN a, CFN b );
422CFN UL1_CFNSub( CFN a, CFN b );
423kal_int16 UL1_CFNDiff( CFN a, CFN b );
424CFN UL1_GetCFN( SFN sfn );
425/* End of Frame numbers arithmetic. */
426
427/* L1I queue function. */
428void UL1I_QueueFunction( void ( *code )( void ) );
429void UL1I_RemoveQueueFunction( void ( *code )( void ) );
430/* End of L1I queue function. */
431
432kal_int16 UL1I_Calc_Delay_To_Next_PICH( void );
433#if defined(__UL1_GEMINI__) || defined ( __GEMINI__ )
434void *UL1I_Get_PICHUTimerAddress( void );
435#endif
436
437kal_bool UL1C_Is3GDedicated( void );
438kal_bool UL1C_CheckSleep( kal_uint32 *sn );
439#ifdef MTK_SLEEP_ENABLE
440void UL1C_RecoverTime( kal_uint16 fn );
441#endif
442
443/*Speech-Modem Resycn API*/
444void UL1D_Speech_Resync_Reset_Time_Offset( void );
445kal_int16 UL1D_Speech_Resync_Get_Time_Offset( void );
446void UL1D_Speech_Resync_Update_Time_Offset( kal_bool direction );
447
448#if ( defined( __GEMINI__ ) && defined ( __UMTS_RAT__ ) ) && defined ( __MTK_TARGET__ )
449void UL1_AssertFunction( RTB_ASSERT_CAUSE cause, RTB_SIM_INDEX SIM_Index, kal_uint32 para1, kal_uint32 para2 );
450#endif /* __UL1_GEMINI__&&__MTK_TARGET__ */
451#endif
452