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192.168.1.100 / T800_MD / refs/heads/MR3.0 / . / mcu / service / mdmp / mdmp_profile.c
blob: 2c38a88061c7a3fe990be78b90ce4226f9e5cad4 [file] [log] [blame]
rjw6c1fd8f2022-11-30 14:33:01 +0800[diff] [blame]1#include "mdmp_profile.h"
2
3unsigned int _mdmp_num_region_option = MAX_REGION_OPTION_NUM;
4unsigned int _mdmp_num_mem_type = MEM_TYPE_MAX;
5
6/////////////////////////////////////////
7// do not modify code above this line
8/////////////////////////////////////////
9
10mdmp_region_cfg_tbl region_tbl_full_dump =
11{
12 {MEM_SYS, {MEM_SYS_REGION_ALL} },
13 {MEM_SYS_SHM, {MEM_SYS_SHM_REGION_ALL} },
14 {MEM_DSP, {MEM_DSP_REGION_ALL} },
15 {MEM_SLA_CORE0, {MEM_SLA_CORE0_REGION_ALL} },
16 {MEM_SLA_CORE1, {MEM_SLA_CORE1_REGION_ALL} },
17 {MEM_SLA_CORE2, {MEM_SLA_CORE2_REGION_ALL} },
18 {MEM_SLA_CORE3, {MEM_SLA_CORE3_REGION_ALL} },
19 {MEM_SLA_BRP, {MEM_SLA_BRP_REGION_ALL} },
20 {MEM_SLA_INNER, {MEM_SLA_INNER_REGION_ALL} },
21 {MEM_SLA_FEC, {MEM_SLA_FEC_REGION_ALL} },
22 {MEM_SLA_SPEECH, {MEM_SLA_SPEECH_REGION_ALL} },
23 {MEM_SLA_MSONIC0, {MEM_SLA_MSONIC0_REGION_ALL} },
24 {MEM_SLA_MSONIC1, {MEM_SLA_MSONIC1_REGION_ALL} },
25 {MEM_SLA_VSONIC0, {MEM_SLA_VSONIC0_REGION_ALL} },
26 {MEM_USIP0, {MEM_USIP0_REGION_ALL} },
27 {MEM_USIP1, {MEM_USIP1_REGION_ALL} },
28 {MEM_SCQ16_0, {MEM_SCQ16_0_REGION_ALL} },
29 {MEM_SCQ16_1, {MEM_SCQ16_1_REGION_ALL} },
30 {MEM_SCQ16_2, {MEM_SCQ16_2_REGION_ALL} },
31 {MEM_SCQ16_3, {MEM_SCQ16_3_REGION_ALL} },
32 {MEM_MSONIC0, {MEM_MSONIC0_REGION_ALL, MEM_MSONIC0_REGION_MINI_NO_RO} },
33 {MEM_VSONIC0, {MEM_VSONIC0_REGION_ALL, MEM_VSONIC0_REGION_MINI_NO_RO} },
34 {MEM_MSONIC0_PHASE2, {MEM_MSONIC0_REGION_ALL, MEM_MSONIC0_REGION_MINI_NO_RO} },
35 {MEM_RAKE, {MEM_RAKE_REGION_ALL} },
36 {MEM_VRF, {MEM_VRF_REGION_ALL} },
37 {MEM_BB, {MEM_BB_REGION_ALL} },
38 {MEM_AST, {MEM_AST_REGION_ALL} }
39};
40
41mdmp_region_cfg_tbl region_tbl_mini_dump =
42{
43 {MEM_SYS, {MEM_SYS_REGION_WITHOUT_UC_ROM} },
44 {MEM_SYS_SHM, {MEM_SYS_SHM_REGION_APMD_CCCI_64K, MEM_SYS_SHM_REGION_APMD_CCCI_SCP, MEM_SYS_SHM_REGION_APMD_CCCI_CCB_CTRL,
45 MEM_SYS_SHM_REGION_APMD_CCCI_MDT_NETD, MEM_SYS_SHM_REGION_APMD_CCCI_MDT_USB, MEM_SYS_SHM_REGION_APMD_CCCI_AUDIO,
46 MEM_SYS_SHM_REGION_APMD_CCCI_MCU, MEM_SYS_SHM_REGION_APMD_CCCI_MCU_EXP} },
47 {MEM_DSP, {MEM_DSP_REGION_MINI} },
48 {MEM_SLA_CORE0, {MEM_SLA_CORE0_REGION_ALL} },
49 {MEM_SLA_CORE1, {MEM_SLA_CORE1_REGION_ALL} },
50 {MEM_SLA_CORE2, {MEM_SLA_CORE2_REGION_ALL} },
51 {MEM_SLA_CORE3, {MEM_SLA_CORE3_REGION_ALL} },
52 {MEM_SLA_BRP, {MEM_SLA_BRP_REGION_ALL} },
53 {MEM_SLA_INNER, {MEM_SLA_INNER_REGION_ALL} },
54 {MEM_SLA_FEC, {MEM_SLA_FEC_REGION_ALL} },
55 {MEM_SLA_SPEECH, {MEM_SLA_SPEECH_REGION_ALL} },
56 {MEM_SLA_MSONIC0, {MEM_SLA_MSONIC0_REGION_ALL} },
57 {MEM_SLA_MSONIC1, {MEM_SLA_MSONIC1_REGION_ALL} },
58 {MEM_SLA_VSONIC0, {MEM_SLA_VSONIC0_REGION_ALL} },
59 {MEM_USIP0, {MEM_USIP0_REGION_MINI} },
60 {MEM_USIP1, {MEM_USIP1_REGION_MINI} },
61 {MEM_SCQ16_0, {MEM_SCQ16_0_REGION_MINI} },
62 {MEM_SCQ16_1, {MEM_SCQ16_1_REGION_MINI} },
63 {MEM_SCQ16_2, {MEM_SCQ16_2_REGION_MINI} },
64 {MEM_SCQ16_3, {MEM_SCQ16_3_REGION_MINI} },
65 {MEM_MSONIC0, {MEM_MSONIC0_REGION_MINI_NO_RO} },
66 {MEM_VSONIC0, {MEM_VSONIC0_REGION_MINI_NO_RO} },
67 {MEM_MSONIC0_PHASE2, {MEM_MSONIC0_REGION_MINI_NO_RO} },
68 {MEM_RAKE, {MEM_RAKE_REGION_MINI} },
69 {MEM_VRF, {MEM_VRF_REGION_MINI} },
70 {MEM_BB, {NULL} },
71 {MEM_AST, {NULL} }
72};
73
74mdmp_region_cfg_tbl region_tbl_MIDR_dump =
75{
76 {MEM_SYS, {MEM_SYS_REGION_ALL} },
77 {MEM_SYS_SHM, {MEM_SYS_SHM_REGION_ALL} },
78 {MEM_DSP, {MEM_DSP_REGION_ALL} },
79 {MEM_SLA_CORE0, {MEM_SLA_CORE0_REGION_ALL} },
80 {MEM_SLA_CORE1, {MEM_SLA_CORE1_REGION_ALL} },
81 {MEM_SLA_CORE2, {MEM_SLA_CORE2_REGION_ALL} },
82 {MEM_SLA_CORE3, {MEM_SLA_CORE3_REGION_ALL} },
83 {MEM_SLA_BRP, {MEM_SLA_BRP_REGION_ALL} },
84 {MEM_SLA_INNER, {MEM_SLA_INNER_REGION_ALL} },
85 {MEM_SLA_FEC, {MEM_SLA_FEC_REGION_ALL} },
86 {MEM_SLA_SPEECH, {MEM_SLA_SPEECH_REGION_ALL} },
87 {MEM_SLA_MSONIC0, {MEM_SLA_MSONIC0_REGION_ALL} },
88 {MEM_SLA_MSONIC1, {MEM_SLA_MSONIC1_REGION_ALL} },
89 {MEM_SLA_VSONIC0, {MEM_SLA_VSONIC0_REGION_ALL} },
90 {MEM_USIP0, {MEM_USIP0_REGION_ALL} },
91 {MEM_USIP1, {MEM_USIP1_REGION_ALL} },
92 {MEM_SCQ16_0, {MEM_SCQ16_0_REGION_ALL} },
93 {MEM_SCQ16_1, {MEM_SCQ16_1_REGION_ALL} },
94 {MEM_SCQ16_2, {MEM_SCQ16_2_REGION_ALL} },
95 {MEM_SCQ16_3, {MEM_SCQ16_3_REGION_ALL} },
96 {MEM_MSONIC0, {MEM_MSONIC0_REGION_ALL, MEM_MSONIC0_REGION_MINI_NO_RO} },
97 {MEM_VSONIC0, {MEM_VSONIC0_REGION_ALL, MEM_VSONIC0_REGION_MINI_NO_RO} },
98 {MEM_MSONIC0_PHASE2, {MEM_MSONIC0_REGION_ALL, MEM_MSONIC0_REGION_MINI_NO_RO} },
99 {MEM_RAKE, {MEM_RAKE_REGION_ALL} },
100 {MEM_VRF, {MEM_VRF_REGION_ALL} },
101 {MEM_BB, {MEM_BB_REGION_ALL} },
102 {MEM_AST, {MEM_AST_REGION_ALL} }
103};
104
105extern MemDumpSymbol dhl;
106extern MemDumpSymbol g_dhl_ccb_buf_init_stage;
107
108// Example selective variable table
109mdmp_var_tbl selective_variables_oppo =
110// Format
111// Pointer to the symbol or address Size Type Access Mode
112{
113#ifdef __DHL_V2_ENABLE__
114 {&dhl, 128, MEM_SYS, ACCESS_MODE_NOT_SPECIFIED},
115#else
116#ifdef __DHL_CCB_LOGGING_SUPPORT__
117 {&g_dhl_ccb_buf_init_stage, 4, MEM_SYS, ACCESS_MODE_NOT_SPECIFIED},
118#endif
119#endif
120};
121
122
123// Configurate each memory dump profile here. The fist profile will be used as system default.
124mdmp_profile_table mdmp_profile_list =
125{
126// Format:
127// Region configuration table Selective variable table Flag
128 { &region_tbl_full_dump, NULL, 0 }, // Profile 0: full dump
129 { &region_tbl_mini_dump, NULL, 0 }, // Profile 1: mini dump
130 { &region_tbl_MIDR_dump, NULL, 0 }, // Profile 2: MIDR dump
131};