[Feature][Modem]Update MTK MODEM V1.6 baseline version: MOLY.NR15.R3.MD700.IVT.MP1MR3.MP.V1.6
MTK modem version: MT2735_IVT_MOLY.NR15.R3.MD700.IVT.MP1MR3.MP.V1.6.tar.gz
RF modem version: NA
Change-Id: I45a4c2752fa9d1a618beacd5d40737fb39ab64fb
diff --git a/mcu/interface/driver/hwdrv/b2psi_sw.h b/mcu/interface/driver/hwdrv/b2psi_sw.h
new file mode 100644
index 0000000..85c72d8
--- /dev/null
+++ b/mcu/interface/driver/hwdrv/b2psi_sw.h
@@ -0,0 +1,72 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * b2psi.c
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This file is intended for b2psi driver.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#ifndef _B2PSI_SW_H
+#define _B2PSI_SW_H
+
+extern void B2PSI_init(void);
+extern kal_uint8 B2PSI_read(kal_uint16 register_index);
+extern void B2PSI_write(kal_uint8 data, kal_uint16 register_index);
+extern void B2PSI_write_fast(kal_uint8 data, kal_uint16 register_index);
+//extern void PMIC_HISR(void);
+
+#endif
+
diff --git a/mcu/interface/driver/hwdrv/batparm.h b/mcu/interface/driver/hwdrv/batparm.h
new file mode 100644
index 0000000..27a8ead
--- /dev/null
+++ b/mcu/interface/driver/hwdrv/batparm.h
@@ -0,0 +1,82 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * batparm.h
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This file is only timer based on event scheduler
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#ifndef _BATPARM_H
+#define _BATPARM_H
+ #include "adc.h"
+#endif /*_BATPARM_H*/
+
+
diff --git a/mcu/interface/driver/hwdrv/cas_drv.h b/mcu/interface/driver/hwdrv/cas_drv.h
new file mode 100644
index 0000000..881be3f
--- /dev/null
+++ b/mcu/interface/driver/hwdrv/cas_drv.h
@@ -0,0 +1,82 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * Sd_def.h
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * Header file of SD/MMC driver
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+
+#ifndef CAS_DRV_H
+#define CAS_DRV_H
+
+#define M_CAM_CAS_BLOCK 4
+#define M_CAM_CAS_HANDLE 0xCACACACA
+
+typedef enum {
+ CAS_CMD_NO_ERROR,
+ CAS_CMD_WRITE_FAIL,
+ CAS_CMD_READ_FAIL,
+ CAS_CMD_BUSY_TIMEOUT,
+ CAS_CMD_NOT_CAS_CARD,
+ CAS_CMD_NOT_EXIST,
+ CAS_CMD_EXIST_NOT_READY
+}CAS_CMD_STA;
+
+extern CAS_CMD_STA CAS_CMD(kal_uint8 *txBuffer, kal_uint32 txSize, kal_uint8 *rxBuffer, kal_uint32 *rxSize);
+
+#endif
diff --git a/mcu/interface/driver/hwdrv/cs_fac_det.h b/mcu/interface/driver/hwdrv/cs_fac_det.h
new file mode 100644
index 0000000..d1b3624
--- /dev/null
+++ b/mcu/interface/driver/hwdrv/cs_fac_det.h
@@ -0,0 +1,133 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * cs_fac_det.h
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This file is header file of customer specific factory mode detection mechanism interface
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#ifndef __CS_FAC_DET_H__
+#define __CS_FAC_DET_H__
+
+
+// The enum lists the boot mode that the customer may request to force boot into
+// Customer may request to boot into specific boot mode for specific factory mode
+// The factory mode detection mechanism should take responsibility to link factory mode <-> factory boot mode
+// and report to PWIC at boot time (If necessary)
+typedef enum{
+ CS_FAC_BOOT_IDLE = 0,
+ CS_FAC_BOOT_CHARGING,
+ CS_FAC_BOOT_USB_CHARGING,
+ CS_FAC_BOOT_MAX
+}cs_fac_boot_mode_enum;
+
+// Currently, take these strctures as common structures
+// If there is new customer specific facroty mode SPEC
+// then we come back to review if the current definition is enough or NOT
+
+// The enum lists factory modes
+// The customer may request to have different activities according to different factory mode
+typedef enum{
+ CS_FAC_NONE = 0x00000000, // Factory NONE ==> Means NO factory mode is detected
+ CS_FAC_UART = 0x00000001, // Bit00, Factory UART
+ CS_FAC_USB = 0x00000002, // Bit01, Factory USB
+ CS_FAC_CTRL = 0x00000004, // Bit02, Factory manual ctrl mode
+ CS_FAC_MAX = 0x10000000 // Bit31, Used for error check purpose
+}cs_fac_mode_enum;
+
+#define CS_FAC_MODE_NUM 4 // Total fac modes supported
+
+
+typedef struct{
+ // Drv init
+ void (*drv_init)(void);
+
+ // Return expect boot mode according to specific customer spec
+ // The spec is implement in the function
+ cs_fac_boot_mode_enum (*factory_det_get_boot_mode)(void);
+
+ // Return whether the specific factory mode is detected or NOT
+ // KAL_TRUE: The specific fac event is detected
+ // KAL_FALSE: The specific fac event is NOT detected
+ kal_bool (*factory_det_query_fac_mode)(cs_fac_mode_enum);
+
+ // Set the factory mode by other modules
+ void (*factory_det_set_fac_mode)(cs_fac_mode_enum);
+
+ // Clear the factory mode by other modules
+ void (*factory_det_clear_fac_mode)(cs_fac_mode_enum);
+
+}cs_factory_detecter;
+
+
+extern cs_factory_detecter *cs_fac_det;
+extern cs_factory_detecter *cs_fac_det_get_interface(void);
+
+#endif // #define __CS_FAC_DET_H__
+
+
+
diff --git a/mcu/interface/driver/hwdrv/ds_if.h b/mcu/interface/driver/hwdrv/ds_if.h
new file mode 100644
index 0000000..245bca1
--- /dev/null
+++ b/mcu/interface/driver/hwdrv/ds_if.h
@@ -0,0 +1,260 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2010
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ds_if.h
+ *
+ * Project:
+ * --------
+ * ALL
+ *
+ * Description:
+ * ------------
+ * This file is intends for direct sensor interface driver.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#ifndef __DS_IF_H__
+#define __DS_IF_H__
+
+//RHR #include "kal_release.h"
+//MSBB remove #include "kal_non_specific_general_types.h"
+
+
+//Action Id
+#define DS_IF_DATA_BUS_CONTL 0x01
+#define DS_IF_SEN2LCM_SET 0x02
+#define DS_IF_FRAME_DONE_CB_REGISTER 0x04
+#define DS_IF_SENSOR_PAUSE_CB_REGISTER 0x08
+#define DS_IF_SENSOR_RESUME_CB_REGISTER 0x10
+
+
+//Error code
+#define DS_IF_SUCCEED 0x0000
+#define DS_IF_ERR_INVALID_HANDLE 0x0001
+#define DS_IF_ERR_INVALID_ACTION 0x0002
+#define DS_IF_ERR_INVALID_PARA 0x0004
+#define DS_IF_ERR_NOT_ALLOWED_STATE 0x0008
+#define DS_IF_ERR_CALLER_CONTEXT_NOT_ALLOW 0x0010
+#define DS_IF_ERR_CAL_NOT_DIRECT_SENSOR 0x0020
+#define DS_IF_ERR_CAL_NOT_CONFIG_HW_TIMING 0x0040
+#define DS_IF_ERR_NOT_REGISTERED_CB 0x0080
+#define DS_IF_ERR_TOO_MANY_USERS 0x8000
+
+
+
+#define USER_HANDLE_FOR_NON_DIRECT_SENSOR 0x0
+#define DUMMY_USER_HANDLE_FOR_TOO_MANY_USERS 0xF1
+
+
+typedef void (*DS_CB_FUNC)(void * cb_para);
+
+typedef enum
+{
+ DS_IF_STATE_INIT= 0,
+ DS_IF_STATE_READY = 1,
+ DS_IF_STATE_BUS = 2,
+ DS_IF_STATE_BUSY = 3
+} DS_IF_STATE_E;
+
+
+typedef enum
+{
+ UNKNOWN_SENSOR = 0,
+ DIRECT_SENSOR = 1,
+ SERIAL_SENSOR = 2,
+ PARALLEL_SENSOR= 3
+} SENSOR_IF_TYPE;
+
+typedef enum
+{
+ CAL_DS_IF_USER = 0,
+ LCD_DS_IF_USER,
+ MAX_DS_IF_USERS
+} DS_IF_USER;
+
+
+typedef struct
+{
+ kal_uint16 para_1;
+ kal_uint16 para_2;
+ kal_uint16 para_3;
+ kal_uint16 para_4;
+ kal_uint16 para_5;
+ kal_uint16 para_6;
+ kal_bool para_7;
+ kal_bool para_8;
+ kal_bool para_9;
+ kal_uint32 para_10;
+} DS_SEN2LCM_T;
+
+
+typedef struct
+{
+//only valid for action DS_DATA_BUS_CONTL been asserted.
+kal_bool data_bus_control_take; // KAL_TRUE for taken, KAL_FALSE for release,
+// only valid for DS_SEN2LCM_SET been asserted.
+DS_SEN2LCM_T sen2lcm_setting;
+// only valid for DS_FRAME_DONE_CB_REGISTER been asserted.
+kal_bool repeat_callback; // KAL_TRUE for repeat, KAL_FALSE for first frame only
+DS_CB_FUNC frame_done_cb_func;
+// only valid for DS_SENSOR_PAUSE_CB_REGISTER been asserted.
+DS_CB_FUNC sensor_pause;
+// only valid for DS_SENSOR_RESUME_CB_REGISTER been asserted.
+DS_CB_FUNC sensor_resume;
+} DS_CONFG_T;
+
+
+/**
+ * Get user handle for other function call usage afterwards.
+ * @param sensor : sensor type
+ * @param user_id : predefine user id
+ * @return kal_uint32 : user handle
+ * @remarks This function return user handle, which is valid on for DIRECT_SENSOR.
+ * Other sensor type returned handle is not effective in following call.
+ */
+kal_uint32 ds_if_open(SENSOR_IF_TYPE sensor, DS_IF_USER user_id);
+
+
+/**
+ * release user handle and close usage privilege.
+ * @param handle : user handle
+ * @return kal_uint32 : error code
+ * @remarks This function must call after ds_if_open() and can not call in HW interface busy state.
+ *
+ */
+kal_uint32 ds_if_close(kal_uint32 handle);
+
+
+/**
+ * configure the HW parameters or others
+ * @param handle : user handle
+ * @param action : action id
+ * @param para : parameters corresponding to action id
+ * @return kal_uint32 : error code
+ * @remarks This function must call after ds_if_open() and can not call in HW interface busy state.
+ *
+ */
+kal_uint32 ds_if_config(kal_uint32 handle, kal_uint32 action, DS_CONFG_T* para);
+
+
+/**
+ * start HW for direct sensor mode display
+ * @param handle : user handle
+ * @return kal_uint32 : error code
+ * @remarks This function must call after ds_if_open() and can not call in HW interface busy state.
+ *
+ */
+kal_uint32 ds_if_start (kal_uint32 handle);
+
+
+/**
+ * stop HW which is in direct sensor mode display
+ * @param handle : user handle
+ * @return kal_uint32 : error code
+ * @remarks This function must call after ds_if_open() and after ds_if_start( ). That is, only stop HW when HW is in busy state
+ *
+ */
+kal_uint32 ds_if_stop (kal_uint32 handle);
+
+
+
+/**
+ * query current HW(direct sensor interface) state
+ * @param
+ * @return DS_IF_STATE_E : HW state
+ * @remarks After first call ds_if_open() the state change from INIT to READY. Afterwards, BUS, or BUSY states transition depends on data bus and hw status.
+ *
+ */
+DS_IF_STATE_E ds_if_query_state (void);
+
+//only for lcd driver
+kal_uint32 ds_if_pause_sensor_cb (kal_uint32 handle);
+
+//only for lcd driver
+kal_uint32 ds_if_resume_sensor_cb (kal_uint32 handle);
+
+//only call from lcd_Hisr
+kal_uint32 ds_if_hisr(kal_uint32 intr_status);
+
+//only for lcd driver
+void lcd_set_ds_a0_polarity(unsigned long a0);
+
+//only for lcd driver
+kal_uint32 ds_if_enable_per_frame_lcm_roi_coms (kal_uint32 handle, kal_bool on_Noff);
+
+#endif /*__DS_IF_H__*/
+
diff --git a/mcu/interface/driver/hwdrv/e_compass_sensor.h b/mcu/interface/driver/hwdrv/e_compass_sensor.h
new file mode 100644
index 0000000..ce855b4
--- /dev/null
+++ b/mcu/interface/driver/hwdrv/e_compass_sensor.h
@@ -0,0 +1,219 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * e_compass_sensor.h
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This Module is for e_compass sensor driver.
+ *
+ * Author:
+ * Peter Zhang
+ *
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+
+#ifndef E_COMPASS_SENSOR_H
+#define E_COMPASS_SENSOR_H
+
+#define E_COMPASS_SENSOR_BUFFER_SIZE 0x08 /* Must be a power of 2. */
+
+typedef enum {
+ E_COMPASS_SENSOR_BUFF_EMPTY,
+ E_COMPASS_SENSOR_BUFF_DATA_EXIST,
+ E_COMPASS_SENSOR_BUFF_FULL
+} E_Compass_Sensor_BuffState_enum;
+
+/* we use this enum to save calibration state */
+typedef enum {
+ E_COMPASS_SENSOR_CALI_NONE,
+ E_COMPASS_SENSOR_START_CALI,
+ E_COMPASS_SENSOR_CALI_FINISHED,
+ E_COMPASS_SENSOR_CALI_ABORTED
+} E_Compass_Sensor_Cali_enum;
+
+/* we use this enum to save calibration result */
+typedef enum {
+ E_COMPASS_SENSOR_CALI_SUCCESS,
+ E_COMPASS_SENSOR_CALI_FAILED
+} E_Compass_Sensor_Cali_Result_enum;
+
+#if defined (E_COMPASS_MAGNETIC_DETECT)
+/* we use this enum to save magnetic state */
+typedef enum {
+ E_COMPASS_SENSOR_MAGNETIC_NORMAL,
+ E_COMPASS_SENSOR_MAGNETIC_ABNORMAL
+} E_Compass_Sensor_Magnetic_State_enum;
+#endif /* E_COMPASS_MAGNETIC_DETECT */
+
+typedef struct
+{
+ kal_uint16 angle;
+} E_CompassSensorDataStruct;
+
+typedef struct
+{
+ kal_int16 usr_moffset_x;
+ kal_int16 usr_moffset_y;
+ kal_int16 usr_moffset_z;
+ kal_bool cali_result;
+
+ kal_int32 x_axis_sensitivity; /*x axis data sensitivity*/
+ kal_int32 y_axis_sensitivity; /*y axis data sensitivity*/
+ kal_int16 x_max; /*sample point maximum of x coordinate*/
+ kal_int16 x_min; /*sample point minimum of x coordinate*/
+ kal_int16 y_max; /*sample point maximum of y coordinate*/
+ kal_int16 y_min; /*sample point minimum of y coordinate*/
+
+ kal_int32 ext_para1;
+ kal_int32 ext_para2;
+ kal_int32 ext_para3;
+ kal_int16 ext_para4;
+ kal_int16 ext_para5;
+ kal_int16 ext_para6;
+ kal_int16 ext_para7;
+ kal_int16 ext_para8;
+ kal_int16 ext_para9;
+} E_CompassSensorCalibratedDataStruct;
+
+typedef void (*EC_DATA_FUNC)(void *parameter,E_Compass_Sensor_BuffState_enum state);
+typedef void (*EC_CALI_FUNC)(void *parameter,E_Compass_Sensor_Cali_Result_enum result);
+#if defined (E_COMPASS_MAGNETIC_DETECT)
+typedef void (*EC_MAG_FUNC)(void *parameter,E_Compass_Sensor_Magnetic_State_enum state);
+#endif /* E_COMPASS_MAGNETIC_DETECT */
+
+typedef struct
+{
+ EC_DATA_FUNC data_cb_func;
+ EC_CALI_FUNC cali_cb_func;
+#if defined (E_COMPASS_MAGNETIC_DETECT)
+ EC_MAG_FUNC mag_cb_func;
+#endif /* E_COMPASS_MAGNETIC_DETECT */
+ void *data_para;
+ void *cali_para;
+#if defined (E_COMPASS_MAGNETIC_DETECT)
+ void *mag_para;
+#endif /* E_COMPASS_MAGNETIC_DETECT */
+ kal_eventgrpid event; /* event id */
+ E_Compass_Sensor_Cali_enum cali_state; /* calibration state */
+ kal_uint8 sample_handle; /* GPT timer handle for sample */
+}E_CompassSensorStruct;
+
+typedef struct
+{
+ E_CompassSensorDataStruct e_compass_sensor_data[E_COMPASS_SENSOR_BUFFER_SIZE];
+ kal_uint16 e_compass_sensor_rindex;
+ kal_uint16 e_compass_sensor_windex;
+}E_CompassSensorBufferStruct;
+
+/* customization part */
+typedef struct
+{
+ kal_uint8 calibration_sample_dura; /* GPT timer duration for calibration sample, *10ms */
+ kal_uint8 normal_sample_dura; /* GPT timer duration for normal sample, *10ms */
+ kal_uint8 poweron_delay; /* SW timer for sensor power on delay, *4.615ms */
+} E_CompassSensor_custom_data_struct;
+
+typedef struct
+{
+ E_CompassSensor_custom_data_struct * (*ec_get_data)(void); /* return configuration data */
+ void (*ec_read_adc)(kal_int16 *x,kal_int16 *y,kal_int16 *z); /* read raw data from e_compass sensor */
+#if defined (__E_COMPASS_MIDDLEWARE_DEBUG__)
+ void (*ec_middleware_dump)(kal_int16 *x,kal_int16 *y,kal_int16 *z); /* middleware parameter dump */
+#endif /* __E_COMPASS_MIDDLEWARE_DEBUG__ */
+ kal_bool (*ec_convert)(kal_int16 x, kal_int16 y, kal_int16 z,E_CompassSensorDataStruct *e_compass_data); /* convert raw data to angle */
+ E_Compass_Sensor_Cali_enum (*ec_calibrate)(kal_int16 x, kal_int16 y, kal_int16 z); /* e_compass calibration */
+ void (*ec_calibrate_cancel)(void); /* e_compass calibration cancel */
+ void (*ec_middleware_init)(void); /* sensor middleware init */
+ void (*ec_turn_on)(kal_uint8 stage); /* turn on sensor */
+ void (*ec_turn_off)(void); /* turn off sensor */
+#if defined (E_COMPASS_MAGNETIC_DETECT)
+ void (*ec_get_magnetic_data)(E_Compass_Sensor_Magnetic_State_enum *e_compass_mag_data); /* driver want to get magnetic field data */
+#endif /* E_COMPASS_MAGNETIC_DETECT */
+ void (*ec_get_calibrated_data)(E_CompassSensorCalibratedDataStruct *e_compass_calibrated_data); /* driver want to get calibrated data */
+ void (*ec_init_calibrated_data)(E_CompassSensorCalibratedDataStruct *e_compass_calibrated_data); /* driver want to init middleware calibration data */
+ void (*ec_custom_init)(void);
+ void (*ec_take_measurement)(void); /* command of fetching raw data */
+}E_CompassSensor_customize_function_struct;
+
+/* For MMI */
+extern void e_compass_sensor_power_on(void);
+extern void e_compass_sensor_power_off(void);
+extern void e_compass_enable(kal_bool enable);
+extern void e_compass_sensor_start_cali(void);
+extern void e_compass_sensor_cancel_cali(void);
+/* extern kal_bool e_compass_sensor_power(kal_bool enable); */
+/* extern void e_compass_sensor_flush_buff(void); */
+extern void e_compass_sensor_data_cb_registration(EC_DATA_FUNC cb_fun,void *para);
+extern void e_compass_sensor_cali_cb_registration(EC_CALI_FUNC cb_fun,void *para);
+#if defined (E_COMPASS_MAGNETIC_DETECT)
+extern void e_compass_sensor_mag_cb_registration(EC_MAG_FUNC cb_fun,void *para);
+#endif /* E_COMPASS_MAGNETIC_DETECT */
+extern kal_bool e_compass_sensor_get_data(E_CompassSensorDataStruct *e_compass_data);
+extern kal_bool e_compass_get_calibration_result(void);
+extern void e_compass_sensor_manual_init(void);
+
+/* For driver */
+extern void e_compass_init(void);
+extern void e_compass_main_hdr(void);
+extern void e_compass_nvram_init(void);
+
+#if defined (E_COMPASS_DRV_DEBUG)
+#define E_COMPASS_DEBUG_OUTPUT(_string,_var1,_var2,_var3,_var4) \
+{ \
+ char sTemp[100]; \
+ sprintf(sTemp,(_string),(_var1),(_var2),(_var3),(_var4)); \
+ kal_print(sTemp); \
+}
+#else
+#define E_COMPASS_DEBUG_OUTPUT(_string,_var1,_var2,_var3,_var4)
+#endif
+
+#endif
diff --git a/mcu/interface/driver/hwdrv/e_compass_sensor_buff.h b/mcu/interface/driver/hwdrv/e_compass_sensor_buff.h
new file mode 100644
index 0000000..22732a7
--- /dev/null
+++ b/mcu/interface/driver/hwdrv/e_compass_sensor_buff.h
@@ -0,0 +1,117 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * e_compass_sensor_buff.h
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This Module is for e_compass sensor driver.
+ *
+ * Author:
+ * Peter Zhang
+ *
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#ifndef E_COMPASS_SENSOR_BUFF_H
+#define E_COMPASS_SENSOR_BUFF_H
+
+#define ec_get_buf_roomleft(_left) \
+{\
+ if ( e_compass_sensor_buff.e_compass_sensor_rindex <= e_compass_sensor_buff.e_compass_sensor_windex ) \
+ {\
+ _left = E_COMPASS_SENSOR_BUFFER_SIZE - e_compass_sensor_buff.e_compass_sensor_windex + e_compass_sensor_buff.e_compass_sensor_rindex - 1;\
+ }\
+ else\
+ {\
+ _left = e_compass_sensor_buff.e_compass_sensor_rindex - e_compass_sensor_buff.e_compass_sensor_windex - 1;\
+ }\
+}
+
+#define ec_get_buf_avail(_left) \
+{\
+ if ( e_compass_sensor_buff.e_compass_sensor_windex >= e_compass_sensor_buff.e_compass_sensor_rindex ) \
+ {\
+ _left = e_compass_sensor_buff.e_compass_sensor_windex - e_compass_sensor_buff.e_compass_sensor_rindex;\
+ }\
+ else\
+ {\
+ _left = E_COMPASS_SENSOR_BUFFER_SIZE - e_compass_sensor_buff.e_compass_sensor_rindex + e_compass_sensor_buff.e_compass_sensor_windex;\
+ }\
+}
+
+#define e_compass_push_data_to_buffer(_data,_room) \
+{\
+ e_compass_sensor_buff.e_compass_sensor_data[e_compass_sensor_buff.e_compass_sensor_windex]= _data;\
+ e_compass_sensor_buff.e_compass_sensor_windex++;\
+ e_compass_sensor_buff.e_compass_sensor_windex &= (E_COMPASS_SENSOR_BUFFER_SIZE - 1);\
+ if (_room == 1)\
+ e_compass_sensor_data.data_cb_func(e_compass_sensor_data.data_para, E_COMPASS_SENSOR_BUFF_FULL);\
+ else\
+ e_compass_sensor_data.data_cb_func(e_compass_sensor_data.data_para, E_COMPASS_SENSOR_BUFF_DATA_EXIST);\
+}
+
+#define e_compass_pop_data_from_buffer(_data) \
+{\
+ (_data) = e_compass_sensor_buff.e_compass_sensor_data[e_compass_sensor_buff.e_compass_sensor_rindex];\
+ e_compass_sensor_buff.e_compass_sensor_rindex ++;\
+ e_compass_sensor_buff.e_compass_sensor_rindex &= (E_COMPASS_SENSOR_BUFFER_SIZE - 1);\
+}
+
+#define e_compass_flush_data_buffer() \
+{\
+ e_compass_sensor_buff.e_compass_sensor_rindex = 0;\
+ e_compass_sensor_buff.e_compass_sensor_windex = 0;\
+}
+
+#endif
diff --git a/mcu/interface/driver/hwdrv/ipc_msgsvc_msgid.h b/mcu/interface/driver/hwdrv/ipc_msgsvc_msgid.h
new file mode 100644
index 0000000..98171ad
--- /dev/null
+++ b/mcu/interface/driver/hwdrv/ipc_msgsvc_msgid.h
@@ -0,0 +1,100 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2001
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * ipc_msgsvc_msgid.h
+ *
+ * Project:
+ * --------
+ * Maui
+ *
+ * Description:
+ * ------------
+ * Header file of IP_MSGSVC_MODULE.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+
+#ifndef __IPC_MSGSVC_MSGID_H__
+#define __IPC_MSGSVC_MSGID_H__
+
+#include "ccci_ipc_msgid.h"
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+
+
+#endif /* !__IPC_MSGSVC_MSGID_H__ */
+
+
diff --git a/mcu/interface/driver/hwdrv/melody.h b/mcu/interface/driver/hwdrv/melody.h
new file mode 100644
index 0000000..ccca79a
--- /dev/null
+++ b/mcu/interface/driver/hwdrv/melody.h
@@ -0,0 +1,123 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * melody.h
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This file is intended for melody note table.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#ifndef MELODY_H
+#define MELODY_H
+
+typedef enum {
+ C0=0, C0sharp, D0, D0sharp, E0, F0, F0sharp, G0, G0sharp, A0, A0sharp, B0,
+ C1, C1sharp, D1, D1sharp, E1, F1, F1sharp, G1, G1sharp, A1, A1sharp, B1,
+ C2, C2sharp, D2, D2sharp, E2, F2, F2sharp, G2, G2sharp, A2, A2sharp, B2,
+ C3, C3sharp, D3, D3sharp, E3, F3, F3sharp, G3, G3sharp, A3, A3sharp, B3,
+ C4, C4sharp, D4, D4sharp, E4, F4, F4sharp, G4, G4sharp, A4, A4sharp, B4,
+ C5, C5sharp, D5, D5sharp, E5, F5, F5sharp, G5, G5sharp, A5, A5sharp, B5,
+ C6, C6sharp, D6, D6sharp, E6, F6, F6sharp, G6, G6sharp, A6, A6sharp, B6,
+ C7, C7sharp, D7, D7sharp, E7, F7, F7sharp, G7, G7sharp, A7, A7sharp, B7
+} MusicalNote; /* KEY define here!! */
+
+//=============Adaption====================================
+#define Notespace 255
+
+typedef struct
+{
+ kal_uint16 duration; /* in ms */
+ kal_uint8 pitch;
+ kal_uint8 volume;
+} MelodyNoteStruct;
+
+typedef struct
+{
+ kal_uint8 timbre;
+ kal_uint16 notesNum;
+ MelodyNoteStruct *notes;
+} MelodyTrackStruct;
+
+typedef struct
+{
+ MelodyTrackStruct *tracks[4];
+} MelodyStruct;
+
+typedef struct
+{
+ kal_uint16 frequency; /* in hz */
+ kal_uint16 on_duration; /* in ms */
+ kal_uint16 off_duration; /* in ms */
+}FreqStruct;
+
+typedef struct
+{
+ FreqStruct *f[4];
+}ToneStruct;
+#endif /* MELODY_H */
+
diff --git a/mcu/interface/driver/hwdrv/rtc_sw.h b/mcu/interface/driver/hwdrv/rtc_sw.h
new file mode 100644
index 0000000..607e1db
--- /dev/null
+++ b/mcu/interface/driver/hwdrv/rtc_sw.h
@@ -0,0 +1 @@
+/* Please do not include this file anymore */
\ No newline at end of file
diff --git a/mcu/interface/driver/hwdrv/sccb.h b/mcu/interface/driver/hwdrv/sccb.h
new file mode 100644
index 0000000..53a2d99
--- /dev/null
+++ b/mcu/interface/driver/hwdrv/sccb.h
@@ -0,0 +1,661 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * sccb.h
+ *
+ * Project:
+ * --------
+ * MT6219
+ *
+ * Description:
+ * ------------
+ * SCCB interface
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
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+ *
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+ * removed!
+ *
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+
+
+#ifndef __SCCB_H__
+#define __SCCB_H__
+
+#include "dcl.h"
+
+#include "kal_general_types.h"
+
+#if 0
+#if (defined(MT6219)||defined(MT6228)||defined(MT6226)||defined(MT6226M)||defined(MT6226D)||defined(MT6227)||defined(MT6227D)||defined(MT6229)||defined(MT6230))
+/* under construction !*/
+#endif // #if (defined(MT6219)||defined(MT6228)||defined(MT6226)||defined(MT6226M)||defined(MT6226D)||defined(MT6227)||defined(MT6227D)||defined(MT6229)||defined(MT6230))
+/* under construction !*/
+#if ( defined(MT6219)||defined(MT6228)||defined(MT6226)||defined(MT6226M)||defined(MT6226D)||defined(MT6227)||defined(MT6227D)||defined(MT6229)||defined(MT6230) ||defined(MT6225)||defined(MT6223)||defined(MT6223P)||defined(MT6235B)||defined(MT6238)||defined(MT6239)||defined(MT6268A) ||defined(MT6239)||defined(MT6253T))
+/* under construction !*/
+#endif // SCCB_XXX API supported platforms list
+/* under construction !*/
+#endif
+
+#if 0
+#if defined(__SCCB_MODULE_V1__)
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#if (!defined(MT6219))
+/* under construction !*/
+#endif // #if (!defined(MT6219))
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#if (defined(MT6226)||defined(MT6226M)||defined(MT6226D)||defined(MT6227)||defined(MT6227D)||defined(MT6229)||defined(MT6230)||defined(MT6223)||defined(MT6223P))
+/* under construction !*/
+#endif // #if (defined(MT6226)||defined(MT6226M)||defined(MT6226D)||defined(MT6227)||defined(MT6227D)||defined(MT6229)||defined(MT6230)||defined(MT6223)||defined(MT6223P))
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif // #if defined(__SCCB_MODULE_V1__)
+#endif
+
+#if 0
+#ifdef __CUST_NEW__
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#else // #ifdef __CUST_NEW__
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif // #ifdef __CUST_NEW__
+/* under construction !*/
+#endif //#if 0
+
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif //#if 0
+
+
+// SCCB PINS definition
+
+
+#ifdef __CUST_NEW__
+//#include "gpio_sw.h"
+extern const char gpio_sccb_serial_clk_pin;
+extern const char gpio_sccb_serial_data_pin;
+#endif // #ifdef __CUST_NEW__
+
+
+#if 0
+/* under construction !*/
+#if (defined(MT6219)||defined(MT6226)||defined(MT6226M)||defined(MT6226D)||defined(MT6227)||defined(MT6227D))
+ #ifdef __CUST_NEW__
+/* under construction !*/
+/* under construction !*/
+ #else // #ifdef __CUST_NEW__
+/* under construction !*/
+/* under construction !*/
+ #endif // #ifdef __CUST_NEW__
+#endif // #if (defined(MT6219)||defined(MT6226)||defined(MT6226M)||defined(MT6226D)||defined(MT6227)||defined(MT6227D))
+/* under construction !*/
+#if (defined(MT6228)||defined(MT6229)||defined(MT6230))
+ #ifdef __CUST_NEW__
+ #if (defined(DVT_TEST))
+/* under construction !*/
+/* under construction !*/
+ #else // #if (defined(DVT_TEST))
+/* under construction !*/
+/* under construction !*/
+ #endif // #if (defined(DVT_TEST))
+ #else // #ifdef __CUST_NEW__
+ #if (defined(DVT_TEST))
+/* under construction !*/
+/* under construction !*/
+ #else // #if (defined(DVT_TEST))
+/* under construction !*/
+/* under construction !*/
+ #endif // #if (defined(DVT_TEST))
+ #endif // #ifdef __CUST_NEW__
+#endif // #if (defined(MT6228)||defined(MT6229)||defined(MT6230))
+/* under construction !*/
+/* under construction !*/
+#if (defined(DRV_GPIO_REG_AS_6223))
+ #ifdef __CUST_NEW__
+/* under construction !*/
+/* under construction !*/
+ #else // #ifdef __CUST_NEW__
+/* under construction !*/
+/* under construction !*/
+ #endif // #ifdef __CUST_NEW__
+/* under construction !*/
+/* under construction !*/
+#endif // #if (defined(DRV_GPIO_REG_AS_6223))
+/* under construction !*/
+/* under construction !*/
+#if (defined(DRV_GPIO_REG_AS_6225))
+ #ifdef __CUST_NEW__
+/* under construction !*/
+/* under construction !*/
+ #else /* __CUST_NEW__ */
+/* under construction !*/
+/* under construction !*/
+ #endif /* __CUST_NEW__ */
+/* under construction !*/
+/* under construction !*/
+#endif // #if (defined(DRV_GPIO_REG_AS_6225))
+/* under construction !*/
+#if (defined(DRV_GPIO_REG_AS_6238))
+ #ifdef __CUST_NEW__
+/* under construction !*/
+/* under construction !*/
+ #else /* __CUST_NEW__ */
+/* under construction !*/
+/* under construction !*/
+ #endif /* __CUST_NEW__ */
+#endif // #if (defined(DRV_GPIO_6238_SERIES))
+/* under construction !*/
+/* under construction !*/
+#if (defined(DRV_GPIO_REG_AS_6235))
+ #ifdef __CUST_NEW__
+ #if defined(EMPTY_MMI)
+/* under construction !*/
+/* under construction !*/
+ #else // #if defined(EMPTY_MMI)
+/* under construction !*/
+/* under construction !*/
+ #endif // #if defined(EMPTY_MMI)
+ #else /* __CUST_NEW__ */
+/* under construction !*/
+/* under construction !*/
+ #endif /* __CUST_NEW__ */
+#endif // #if (defined(DRV_GPIO_6235_SERIES))
+/* under construction !*/
+#if (defined(DRV_GPIO_REG_AS_6268A))
+ #ifdef __CUST_NEW__
+/* under construction !*/
+/* under construction !*/
+ #else /* __CUST_NEW__ */
+/* under construction !*/
+/* under construction !*/
+ #endif /* __CUST_NEW__ */
+#endif // #if (defined(DRV_GPIO_REG_AS_6268A))
+/* under construction !*/
+#if(defined(DRV_GPIO_REG_AS_6268))
+ #ifdef __CUST_NEW__
+/* under construction !*/
+/* under construction !*/
+ #else // #ifdef __CUST_NEW__
+/* under construction !*/
+/* under construction !*/
+ #endif // #ifdef __CUST_NEW__
+/* under construction !*/
+/* under construction !*/
+#endif // #if(defined(DRV_GPIO_REG_AS_6268))
+/* under construction !*/
+#if (defined(DRV_GPIO_REG_AS_6253T))
+ #ifdef __CUST_NEW__
+/* under construction !*/
+/* under construction !*/
+ #else /* __CUST_NEW__ */
+/* under construction !*/
+/* under construction !*/
+ #endif /* __CUST_NEW__ */
+/* under construction !*/
+/* under construction !*/
+#endif // #if (defined(DRV_GPIO_REG_AS_6253T))
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#if (defined(DRV_GPIO_REG_AS_6253E)&&defined(MT6253L))
+ #ifdef __CUST_NEW__
+/* under construction !*/
+/* under construction !*/
+ #else /* __CUST_NEW__ */
+/* under construction !*/
+/* under construction !*/
+ #endif /* __CUST_NEW__ */
+/* under construction !*/
+/* under construction !*/
+#endif
+/* under construction !*/
+#if (defined(DRV_GPIO_REG_AS_6236))
+ #ifdef __CUST_NEW__
+/* under construction !*/
+/* under construction !*/
+ #else /* __CUST_NEW__ */
+/* under construction !*/
+/* under construction !*/
+#endif /*__CUST_NEW__*/
+/* under construction !*/
+/* under construction !*/
+#endif // #if (defined(DRV_GPIO_REG_AS_6236))
+/* under construction !*/
+#endif
+///Bin: added to patch build error
+#ifndef SCCB_SERIAL_CLK_PIN
+ #define SCCB_SERIAL_CLK_PIN gpio_sccb_serial_clk_pin
+#endif
+
+#ifndef SCCB_SERIAL_DATA_PIN
+ #define SCCB_SERIAL_DATA_PIN gpio_sccb_serial_data_pin
+#endif
+
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#if defined(__SCCB_MODULE_V1__)
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif // #if defined(__SCCB_MODULE_V1__)
+#endif //#if 0
+
+#endif // #ifndef __SCCB_H__
+
diff --git a/mcu/interface/driver/hwdrv/sccb.h_ b/mcu/interface/driver/hwdrv/sccb.h_
new file mode 100755
index 0000000..a94d9b5
--- /dev/null
+++ b/mcu/interface/driver/hwdrv/sccb.h_
@@ -0,0 +1,678 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * sccb.h
+ *
+ * Project:
+ * --------
+ * MT6219
+ *
+ * Description:
+ * ------------
+ * SCCB interface
+ *
+ * Author:
+ * -------
+ * PC Huang (mtk00548)
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * $Revision: 1.6 $
+ * $Modtime: Aug 08 2005 13:03:16 $
+ * $Log: //mtkvs01/vmdata/Maui_sw/archives/mcu/interface/hwdrv/sccb.h-arc $
+ *
+ * 04 24 2012 wcpuser_integrator
+ * [MAUI_03155806] [MSBB2] Global Revise Clear and Uniform Legacy Header File Inclusion Requested by JI Huang
+ * .
+ *
+ * 11 30 2010 guoxin.hong
+ * [MAUI_02841708] [Drv] MAUI HAL Peripheral Create
+ * .
+ *
+ * 11 17 2010 shuang.han
+ * [MAUI_02641139] [Drv][I2C] MT6253D compile option removel
+ * .
+ *
+ * 10 27 2010 shuang.han
+ * [MAUI_02638863] [I2C][6253E] fix 6253E i2c pin gpio mode
+ * .
+ *
+ * 10 18 2010 shuang.han
+ * [MAUI_02637814] [RHR][MAUIW1038OF_RHR] Integration to W10.43
+ * .
+ *
+ * 09 09 2010 vincent.liu
+ * [MAUI_02603694] [MT6253EL] [Camere] Check in code for 6253E/L
+ * modify gpio scl/sda pin define for 6253E serial sensor
+ *
+ * 08 29 2010 wy.chuang
+ * [MAUI_02397396] I2C V1 phase out
+ * .
+ *
+ * 08 17 2010 jason.chang
+ * [MAUI_02603694] [MT6253EL] [Camere] Check in code for 6253E/L
+ * .
+ *
+ * 08 16 2010 bin.han
+ * [MAUI_02631832] [I2C]Fix build error
+ * .
+ *
+ * 08 16 2010 bin.han
+ * [MAUI_02631832] [I2C]Fix build error
+ * .
+ *
+ * Jun 25 2010 mtk01973
+ * [MAUI_02563774] [6276 HQA] Check in MAUI
+ *
+ *
+ * Jun 5 2010 mtk01973
+ * [MAUI_02542177] [MT6255_DVT] The plan for merging to MAUI (For 55 MM HQA!)
+ *
+ *
+ * Apr 21 2010 mtk02787
+ * [MAUI_02399508] patch I2C CLK/DATA pin for MT6253
+ *
+ *
+ * Apr 15 2010 mtk01283
+ * [MAUI_02396917] [MT6253][GPIO] Fix GPIO_MODE11 register default value setting
+ *
+ *
+ * Feb 23 2010 mtk01845
+ * [MAUI_02360180] [Drv][I2C] I2C driver revision for new DMA architecture from MT6276
+ *
+ *
+ * Feb 20 2010 mtk01845
+ * [MAUI_02360180] [Drv][I2C] I2C driver revision for new DMA architecture from MT6276
+ *
+ *
+ * Dec 12 2009 mtk01845
+ * [MAUI_01975292] [Drv] Klockwork error fix
+ * Add MT6253D option
+ *
+ * Dec 12 2009 mtk01845
+ * [MAUI_01975292] [Drv] Klockwork error fix
+ *
+ *
+ * Oct 5 2009 mtk01845
+ * [MAUI_01963866] [Drv][I2C] sccb.h define I2C pins
+ *
+ *
+ * Jun 17 2009 syu
+ * [MAUI_01869884] [CAMERA][Driver]<S5K5BAFX> DAGIO_WISE_6235_DEMO_GPRS CAMERA driver check-in
+ * #define SCCB_SERIAL_CLK_PIN gpio_sccb_serial_clk_pin
+ * #define SCCB_SERIAL_DATA_PIN gpio_sccb_serial_data_pin
+ *
+ * So we can change codegen to match Adagio sch
+ *
+ * Jan 12 2009 mtk01845
+ * [MAUI_01307296] MT6235 charger constant current CC6 and CC7 change to internal use
+ *
+ *
+ * Nov 6 2008 mtk01845
+ * [MAUI_01269587] [Drv] MT6253T merge back to MAUI
+ *
+ *
+ * Jul 31 2008 mtk01845
+ * [MAUI_00813620] [Drv][MoDIS] Dummay APIs modification for MoDIS
+ *
+ *
+ * Jul 18 2008 mtk01845
+ * [MAUI_00786000] [Drv][General] Lint modification
+ *
+ *
+ * Jun 23 2008 mtk01283
+ * [MAUI_00761183] [Drv][GPIO] Correct GPIO usage when using driver customization tool
+ *
+ *
+ * Jun 18 2008 mtk01283
+ * [MAUI_00789872] [Drv][SCCB] Patch SCCB GPIO definition to pass the GPIO error checking
+ *
+ *
+ * Jun 12 2008 mtk01283
+ * [MAUI_00761183] [Drv][GPIO] Correct GPIO usage when using driver customization tool
+ *
+ *
+ * Jun 11 2008 mtk01283
+ * [MAUI_00761183] [Drv][GPIO] Correct GPIO usage when using driver customization tool
+ *
+ *
+ * Jun 4 2008 mtk01283
+ * [MAUI_00781398] [Drv][SCCB] Patch the sccb variable name definitioin
+ *
+ *
+ * Jun 2 2008 mtk01283
+ * [MAUI_00761183] [Drv][GPIO] Correct GPIO usage when using driver customization tool
+ *
+ *
+ * May 30 2008 mtk01283
+ * [MAUI_00761183] [Drv][GPIO] Correct GPIO usage when using driver customization tool
+ *
+ *
+ * Apr 30 2008 mtk01845
+ * [MAUI_00765087] [Drv][MISC] MT6239 compile option support
+ *
+ *
+ * Apr 10 2008 mtk01845
+ * [MAUI_00742324] Build warning fix
+ *
+ *
+ * Mar 18 2008 MTK01845
+ * [MAUI_00734333] Patch for wrong SCCB pin variable with GPIO magic number
+ *
+ *
+ * Mar 13 2008 MTK01845
+ * [MAUI_00620676] [Drv][SCCB] Add SCCB related code for MT6223P platforms
+ * Support custom tool configuration
+ *
+ * Feb 19 2008 MTK01845
+ * [MAUI_00620676] [Drv][SCCB] Add SCCB related code for MT6223P platforms
+ *
+ *
+ * Nov 9 2007 mtk01283
+ * [MAUI_00573819] [Drv][Compile option] Check in MT6235 compile option to Maui
+ *
+ *
+ * Sep 1 2007 mtk01283
+ * [MAUI_00541110] [Drv][Compile option] Check in MT6238 compile option to MainTrunk
+ *
+ *
+ * May 17 2007 mtk01454
+ * [MAUI_00393840] [camera] 6226D compiler option check in
+ *
+ *
+ * Mar 22 2007 mtk01454
+ * [MAUI_00358749] [camera]6227D DVT compiler option check in
+ *
+ *
+ * Dec 5 2006 mtk01283
+ * [MAUI_00348513] [Drv][Feature Option]Apply driver customization tool on Crystal25_Demo project
+ *
+ *
+ * Nov 2 2006 mtk01051
+ * [MAUI_00340010] [SCCB] MT6230 first check in for 06A
+ *
+ *
+ * Oct 5 2006 mtk01235
+ * [MAUI_00324378] [6225 DVT] First Check IN
+ *
+ *
+ * Sep 18 2006 mtk01051
+ * [MAUI_00329410] [1]Assert fail:0m12110.c 1136-REASM
+ * Modify gpio read/write command when __CUST_NEW__
+ *
+ * May 12 2006 mtk01051
+ * [MAUI_00193192] [Drv][Feature]check in codes modified for compile option __CUST_NEW__
+ *
+ *
+ * Apr 24 2006 mtk01051
+ * [MAUI_00188852] [Drv][New Feature] add compile option __CUST_NEW__ for new driver customization meth
+ * Add __CUST_NEW__ complier option
+ *
+ * Jan 3 2006 mtk01051
+ * [MAUI_00165680] [SCCB] Add MT6226M complier option
+ * First check in for MT6226M
+ *
+ * Rev 1.6 Aug 08 2005 13:03:30 mtk01051
+ * Add NACK_BIT Define
+ *
+ * Rev 1.5 Aug 01 2005 18:56:34 mtk01051
+ * Modify HW SCCB Interface
+ *
+ * Rev 1.4 Jul 20 2005 18:30:32 mtk01051
+ * Modify MT6228 SCCB interface pin assignment
+ *
+ * Rev 1.3 Jun 05 2005 17:20:04 mtk00747
+ * MT6228 first version
+ *
+ * Rev 1.2 May 17 2005 00:29:16 BM_Trunk
+ * Karlos:
+ * add copyright and disclaimer statement
+ *
+ * Rev 1.1 Jan 18 2005 00:34:28 BM
+ * append new line in W05.04
+ *
+ * Rev 1.0 May 28 2004 20:09:38 BM
+ * Initial revision.
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+
+
+#ifndef __SCCB_H__
+#define __SCCB_H__
+
+#if (defined(MT6219)||defined(MT6228)||defined(MT6226)||defined(MT6226M)||defined(MT6226D)||defined(MT6227)||defined(MT6227D)||defined(MT6229)||defined(MT6230))
+#define __SCCB_MODULE_V1__
+#endif // #if (defined(MT6219)||defined(MT6228)||defined(MT6226)||defined(MT6226M)||defined(MT6226D)||defined(MT6227)||defined(MT6227D)||defined(MT6229)||defined(MT6230))
+
+#if ( defined(MT6219)||defined(MT6228)||defined(MT6226)||defined(MT6226M)||defined(MT6226D)||defined(MT6227)||defined(MT6227D)||defined(MT6229)||defined(MT6230)\
+ ||defined(MT6225)||defined(MT6223)||defined(MT6223P)||defined(MT6235)||defined(MT6235B)||defined(MT6238)||defined(MT6239)||defined(MT6268A)\
+ ||defined(MT6239)||defined(MT6253T)||defined(MT6253)||defined(MT6236)||defined(MT6236B) )
+#define __SUPPORT_SCCB_XXX_API__
+#endif // SCCB_XXX API supported platforms list
+
+#if defined(__SCCB_MODULE_V1__)
+/* defination of MT6219 SCCB interface */
+
+//MSBB remove #include "kal_non_specific_general_types.h"
+
+//#define DVT_TEST
+#if (!defined(MT6219))
+#define SCCB_I2C_base (0x800A0000) /* SCCB Interface */
+#endif // #if (!defined(MT6219))
+
+/* HW SCCB Define */
+#define SCCB_READ_COMPLETE 0x01
+#define SCCB_WRITE_COMPLETE 0x02
+
+#define SCCB_CTRL_REG (SCCB_I2C_base+0x00)
+#define SCCB_DATA_LENGTH_REG (SCCB_I2C_base+0x08)
+#define SCCB_BUFFER_TIME_REG (SCCB_I2C_base+0x0C)
+#define SCCB_START_HOLD_TIME_REG (SCCB_I2C_base+0x10)
+#define SCCB_DATA_HOLD_TIME_REG (SCCB_I2C_base+0x14)
+#define SCCB_CLOCK_LOW_PERIOD_REG (SCCB_I2C_base+0x18)
+#define SCCB_CLOCK_HIGH_PERIOD_REG (SCCB_I2C_base+0x1C)
+#define SCCB_DATA_REG (SCCB_I2C_base+0x20)
+#define SCCB_START_SETUP_TIME_REG (SCCB_I2C_base+0x24)
+#define SCCB_STOP_SETUP_TIME_REG (SCCB_I2C_base+0x28)
+#define SCCB_MODE_REG (SCCB_I2C_base+0x38)
+#define SCCB_BUFFER_CLEAR_REG (SCCB_I2C_base+0x3C)
+#define SCCB_STATUS_REG (SCCB_I2C_base+0x40)
+#define SCCB_READ_DATA_REG (SCCB_I2C_base+0x44)
+#define REG_SCCB_CTRL *((volatile unsigned short *) (SCCB_I2C_base+0x00))
+#define REG_SCCB_DATA_LENGTH *((volatile unsigned short *) (SCCB_I2C_base+0x08))
+#define REG_SCCB_BUFFER_TIME *((volatile unsigned short *) (SCCB_I2C_base+0x0C))
+#define REG_SCCB_START_HOLD_TIME *((volatile unsigned short *) (SCCB_I2C_base+0x10))
+#define REG_SCCB_DATA_HOLD_TIME *((volatile unsigned short *) (SCCB_I2C_base+0x14))
+#define REG_SCCB_CLOCK_LOW_PERIOD *((volatile unsigned short *) (SCCB_I2C_base+0x18))
+#define REG_SCCB_CLOCK_HIGH_PERIOD *((volatile unsigned short *) (SCCB_I2C_base+0x1C))
+#define REG_SCCB_DATA *((volatile unsigned short *) (SCCB_I2C_base+0x20))
+#define REG_SCCB_START_SETUP_TIME *((volatile unsigned short *) (SCCB_I2C_base+0x24))
+#define REG_SCCB_STOP_SETUP_TIME *((volatile unsigned short *) (SCCB_I2C_base+0x28))
+#define REG_SCCB_MODE *((volatile unsigned short *) (SCCB_I2C_base+0x38))
+#define REG_SCCB_BUFFER_CLEAR *((volatile unsigned short *) (SCCB_I2C_base+0x3C))
+#define REG_SCCB_STATUS *((volatile unsigned short *) (SCCB_I2C_base+0x40))
+#define REG_SCCB_READ_DATA *((volatile unsigned short *) (SCCB_I2C_base+0x44))
+#if (defined(MT6226)||defined(MT6226M)||defined(MT6226D)||defined(MT6227)||defined(MT6227D)||defined(MT6229)||defined(MT6230)||defined(MT6223)||defined(MT6223P))
+#define REG_SCCB_READ_DATA_L *((volatile unsigned short *) (SCCB_base+0x48)) //MT6227 New
+#endif // #if (defined(MT6226)||defined(MT6226M)||defined(MT6226D)||defined(MT6227)||defined(MT6227D)||defined(MT6229)||defined(MT6230)||defined(MT6223)||defined(MT6223P))
+#define SCCB_DATA_REG_ID_ADDRESS 0x100
+
+#define ENABLE_SCCB REG_SCCB_CTRL = 0x01;
+#define DISABLE_SCCB REG_SCCB_CTRL = 0x00;
+#define SET_SCCB_DATA_LENGTH(n) REG_SCCB_DATA_LENGTH = (n-1);
+#define SET_SCCB_BUFFER_TIMER(n) REG_SCCB_BUFFER_TIME = (n-1);
+#define SET_SCCB_START_HOLD_TIME(n) REG_SCCB_START_HOLD_TIME =(n-1);
+#define SET_SCCB_DATA_HOLD_TIME(n) REG_SCCB_DATA_HOLD_TIME = (n-1);
+#define SET_SCCB_CLK_LOW_PERIOD(n) REG_SCCB_CLOCK_LOW_PERIOD = (n-1);
+#define SET_SCCB_CLK_HIGH_PERIOD(n) REG_SCCB_CLOCK_HIGH_PERIOD = (n-1);
+#define SET_SCCB_START_SETUP_TIME(n) REG_SCCB_START_SETUP_TIME =(n-1);
+#define SET_SCCB_STOP_SETUP_TIME(n) REG_SCCB_STOP_SETUP_TIME = (n-1);
+#define CLEAR_SCCB_BUFFER REG_SCCB_BUFFER_CLEAR =1;
+#define SET_SCCB_MASTER_MODE REG_SCCB_MODE=1;
+#define SCCB_IS_READING (!(REG_SCCB_STATUS & 0x01))
+#define SCCB_IS_WRITTING (!(REG_SCCB_STATUS & 0x02))
+
+#endif // #if defined(__SCCB_MODULE_V1__)
+
+#ifdef __CUST_NEW__
+/* SW SCCB Define */
+#define SCCB_SERIAL_SW_CLK_PIN (SCCB_SERIAL_CLK_PIN&~GPIO_MAGIC_NUM)
+#define SCCB_SERIAL_SW_DATA_PIN (SCCB_SERIAL_DATA_PIN&~GPIO_MAGIC_NUM)
+#define SET_SCCB_CLK_OUTPUT GPIO_InitIO_FAST(OUTPUT,SCCB_SERIAL_SW_CLK_PIN);
+#define SET_SCCB_DATA_OUTPUT GPIO_InitIO_FAST(OUTPUT,SCCB_SERIAL_SW_DATA_PIN);
+#define SET_SCCB_DATA_INPUT GPIO_InitIO_FAST(INPUT,SCCB_SERIAL_SW_DATA_PIN);
+#define SET_SCCB_CLK_HIGH GPIO_WriteIO_FAST(1,SCCB_SERIAL_SW_CLK_PIN);
+#define SET_SCCB_CLK_LOW GPIO_WriteIO_FAST(0,SCCB_SERIAL_SW_CLK_PIN);
+#define SET_SCCB_DATA_HIGH GPIO_WriteIO_FAST(1,SCCB_SERIAL_SW_DATA_PIN);
+#define SET_SCCB_DATA_LOW GPIO_WriteIO_FAST(0,SCCB_SERIAL_SW_DATA_PIN);
+#define GET_SCCB_DATA_BIT GPIO_ReadIO_FAST(SCCB_SERIAL_SW_DATA_PIN)
+#else // #ifdef __CUST_NEW__
+/* SW SCCB Define */
+#define SET_SCCB_CLK_OUTPUT GPIO_InitIO(OUTPUT,SCCB_SERIAL_CLK_PIN);
+#define SET_SCCB_DATA_OUTPUT GPIO_InitIO(OUTPUT,SCCB_SERIAL_DATA_PIN);
+#define SET_SCCB_DATA_INPUT GPIO_InitIO(INPUT,SCCB_SERIAL_DATA_PIN);
+#define SET_SCCB_CLK_HIGH GPIO_WriteIO(1,SCCB_SERIAL_CLK_PIN);
+#define SET_SCCB_CLK_LOW GPIO_WriteIO(0,SCCB_SERIAL_CLK_PIN);
+#define SET_SCCB_DATA_HIGH GPIO_WriteIO(1,SCCB_SERIAL_DATA_PIN);
+#define SET_SCCB_DATA_LOW GPIO_WriteIO(0,SCCB_SERIAL_DATA_PIN);
+#define GET_SCCB_DATA_BIT GPIO_ReadIO(SCCB_SERIAL_DATA_PIN)
+#endif // #ifdef __CUST_NEW__
+
+#define ACK_BIT \
+{\
+ kal_uint32 i;\
+ SET_SCCB_CLK_LOW; \
+ for (i=0; i<SCCB_DELAY; i++); \
+ SET_SCCB_DATA_OUTPUT; \
+ SET_SCCB_DATA_LOW; \
+ for (i=0; i<SCCB_DELAY; i++); \
+ SET_SCCB_CLK_HIGH; \
+ for (i=0; i<SCCB_DELAY; i++); \
+ SET_SCCB_CLK_LOW; \
+ for (i=0;i<SCCB_DELAY;i++);\
+}
+
+#define NACK_BIT \
+{\
+ kal_uint32 z;\
+ for (z=0; z<SCCB_DELAY; z++); \
+ SET_SCCB_DATA_OUTPUT; \
+ for (z=0; z<SCCB_DELAY; z++); \
+ SET_SCCB_DATA_HIGH; \
+ for (z=0; z<SCCB_DELAY; z++); \
+ SET_SCCB_CLK_HIGH; \
+ for (z=0; z<SCCB_DELAY; z++); \
+ SET_SCCB_CLK_LOW; \
+ for (z=0;z<SCCB_DELAY;z++);\
+}
+
+#define SCCB_START_TRANSMISSION \
+{\
+ kal_uint32 z;\
+ SET_SCCB_DATA_OUTPUT;\
+ SET_SCCB_DATA_LOW;\
+ for (z=0;z<SCCB_DELAY;z++);\
+ SET_SCCB_CLK_LOW;\
+ for (z=0;z<SCCB_DELAY;z++);\
+}
+
+#define SCCB_STOP_TRANSMISSION \
+{\
+ kal_uint32 z;\
+ SET_SCCB_DATA_OUTPUT;\
+ SET_SCCB_DATA_LOW;\
+ for (z=0;z<SCCB_DELAY;z++);\
+ SET_SCCB_CLK_HIGH;\
+ for (z=0;z<SCCB_DELAY;z++);\
+ SET_SCCB_DATA_HIGH;\
+ for (z=0;z<SCCB_DELAY;z++);\
+}
+
+
+/* Interface */
+typedef enum
+{
+ SCCB_SW_8BIT=1,
+ SCCB_SW_16BIT,
+ SCCB_HW_8BIT,
+ SCCB_HW_16BIT
+} SCCB_MODE_ENUM;
+
+typedef struct{
+ kal_uint8 TBUF;
+ kal_uint8 THDSTA;
+ kal_uint8 THDDTA;
+ kal_uint8 TLOW;
+ kal_uint8 THIGH;
+ //kal_uint8 TSUSTA;
+ kal_uint8 TSUSTO;
+} SCCB_FREQ_STRUCT;
+
+
+
+// SCCB PINS definition
+
+
+#ifdef __CUST_NEW__
+#include "gpio_sw.h"
+extern const char gpio_sccb_serial_clk_pin;
+extern const char gpio_sccb_serial_data_pin;
+#endif // #ifdef __CUST_NEW__
+
+#if (defined(MT6276))
+ #ifdef __CUST_NEW__
+ #define SCCB_SERIAL_CLK_PIN (76|GPIO_MAGIC_NUM)
+ #define SCCB_SERIAL_DATA_PIN (77|GPIO_MAGIC_NUM)
+ #else /* __CUST_NEW__ */
+ #define SCCB_SERIAL_CLK_PIN 76
+ #define SCCB_SERIAL_DATA_PIN 77
+ #endif /* __CUST_NEW__ */
+ #define SCCB_GPIO_SCL_MODE 1
+ #define SCCB_GPIO_SDA_MODE 1
+#elif (defined(MT6255)||defined(MT6256))
+ #ifdef __CUST_NEW__
+ #define SCCB_SERIAL_CLK_PIN (54|GPIO_MAGIC_NUM)
+ #define SCCB_SERIAL_DATA_PIN (55|GPIO_MAGIC_NUM)
+ #else /* __CUST_NEW__ */
+ #define SCCB_SERIAL_CLK_PIN 54
+ #define SCCB_SERIAL_DATA_PIN 55
+ #endif /* __CUST_NEW__ */
+ #define SCCB_GPIO_SCL_MODE 1
+ #define SCCB_GPIO_SDA_MODE 1
+#endif
+
+#if (defined(MT6219)||defined(MT6226)||defined(MT6226M)||defined(MT6226D)||defined(MT6227)||defined(MT6227D))
+ #ifdef __CUST_NEW__
+ #define SCCB_SERIAL_CLK_PIN (8|GPIO_MAGIC_NUM)
+ #define SCCB_SERIAL_DATA_PIN (9|GPIO_MAGIC_NUM)
+ #else // #ifdef __CUST_NEW__
+ #define SCCB_SERIAL_CLK_PIN 8
+ #define SCCB_SERIAL_DATA_PIN 9
+ #endif // #ifdef __CUST_NEW__
+#endif // #if (defined(MT6219)||defined(MT6226)||defined(MT6226M)||defined(MT6226D)||defined(MT6227)||defined(MT6227D))
+
+#if (defined(MT6228)||defined(MT6229)||defined(MT6230))
+ #ifdef __CUST_NEW__
+ #if (defined(DVT_TEST))
+ #define SCCB_SERIAL_CLK_PIN (8|GPIO_MAGIC_NUM)
+ #define SCCB_SERIAL_DATA_PIN (9|GPIO_MAGIC_NUM)
+ #else // #if (defined(DVT_TEST))
+ #define SCCB_SERIAL_CLK_PIN (2|GPIO_MAGIC_NUM)
+ #define SCCB_SERIAL_DATA_PIN (3|GPIO_MAGIC_NUM)
+ #endif // #if (defined(DVT_TEST))
+ #else // #ifdef __CUST_NEW__
+ #if (defined(DVT_TEST))
+ #define SCCB_SERIAL_CLK_PIN 8
+ #define SCCB_SERIAL_DATA_PIN 9
+ #else // #if (defined(DVT_TEST))
+ #define SCCB_SERIAL_CLK_PIN 2
+ #define SCCB_SERIAL_DATA_PIN 3
+ #endif // #if (defined(DVT_TEST))
+ #endif // #ifdef __CUST_NEW__
+#endif // #if (defined(MT6228)||defined(MT6229)||defined(MT6230))
+
+
+#if (defined(DRV_GPIO_REG_AS_6223))
+ #ifdef __CUST_NEW__
+ #define SCCB_SERIAL_CLK_PIN gpio_sccb_serial_clk_pin
+ #define SCCB_SERIAL_DATA_PIN gpio_sccb_serial_data_pin
+ #else // #ifdef __CUST_NEW__
+ #define SCCB_SERIAL_CLK_PIN 15
+ #define SCCB_SERIAL_DATA_PIN 19
+ #endif // #ifdef __CUST_NEW__
+ #define SCCB_GPIO_SCL_MODE 3
+ #define SCCB_GPIO_SDA_MODE 3
+#endif // #if (defined(DRV_GPIO_REG_AS_6223))
+
+
+#if (defined(DRV_GPIO_REG_AS_6225))
+ #ifdef __CUST_NEW__
+ #define SCCB_SERIAL_CLK_PIN (8|GPIO_MAGIC_NUM)
+ #define SCCB_SERIAL_DATA_PIN (9|GPIO_MAGIC_NUM)
+ #else /* __CUST_NEW__ */
+ #define SCCB_SERIAL_CLK_PIN 8
+ #define SCCB_SERIAL_DATA_PIN 9
+ #endif /* __CUST_NEW__ */
+ #define SCCB_GPIO_SCL_MODE 1
+ #define SCCB_GPIO_SDA_MODE 1
+#endif // #if (defined(DRV_GPIO_REG_AS_6225))
+
+#if (defined(DRV_GPIO_REG_AS_6238))
+ #ifdef __CUST_NEW__
+ #define SCCB_SERIAL_CLK_PIN (5|GPIO_MAGIC_NUM)
+ #define SCCB_SERIAL_DATA_PIN (6|GPIO_MAGIC_NUM)
+ #else /* __CUST_NEW__ */
+ #define SCCB_SERIAL_CLK_PIN 5
+ #define SCCB_SERIAL_DATA_PIN 6
+ #endif /* __CUST_NEW__ */
+#endif // #if (defined(DRV_GPIO_6238_SERIES))
+
+
+#if (defined(DRV_GPIO_REG_AS_6235))
+ #ifdef __CUST_NEW__
+ #if defined(EMPTY_MMI)
+ #define SCCB_SERIAL_CLK_PIN (15|GPIO_MAGIC_NUM)
+ #define SCCB_SERIAL_DATA_PIN (16|GPIO_MAGIC_NUM)
+ #else // #if defined(EMPTY_MMI)
+ #define SCCB_SERIAL_CLK_PIN gpio_sccb_serial_clk_pin
+ #define SCCB_SERIAL_DATA_PIN gpio_sccb_serial_data_pin
+ #endif // #if defined(EMPTY_MMI)
+ #else /* __CUST_NEW__ */
+ #define SCCB_SERIAL_CLK_PIN 15
+ #define SCCB_SERIAL_DATA_PIN 16
+ #endif /* __CUST_NEW__ */
+#endif // #if (defined(DRV_GPIO_6235_SERIES))
+
+#if (defined(DRV_GPIO_REG_AS_6268A))
+ #ifdef __CUST_NEW__
+ #define SCCB_SERIAL_CLK_PIN (36|GPIO_MAGIC_NUM)
+ #define SCCB_SERIAL_DATA_PIN (37|GPIO_MAGIC_NUM)
+ #else /* __CUST_NEW__ */
+ #define SCCB_SERIAL_CLK_PIN 36
+ #define SCCB_SERIAL_DATA_PIN 37
+ #endif /* __CUST_NEW__ */
+#endif // #if (defined(DRV_GPIO_REG_AS_6268A))
+
+#if(defined(DRV_GPIO_REG_AS_6268))
+ #ifdef __CUST_NEW__
+ #define SCCB_SERIAL_CLK_PIN (33|GPIO_MAGIC_NUM)
+ #define SCCB_SERIAL_DATA_PIN (34|GPIO_MAGIC_NUM)
+ #else // #ifdef __CUST_NEW__
+ #define SCCB_SERIAL_CLK_PIN 33
+ #define SCCB_SERIAL_DATA_PIN 34
+ #endif // #ifdef __CUST_NEW__
+ #define SCCB_GPIO_SCL_MODE 1
+ #define SCCB_GPIO_SDA_MODE 1
+#endif // #if(defined(DRV_GPIO_REG_AS_6268))
+
+#if (defined(DRV_GPIO_REG_AS_6253T))
+ #ifdef __CUST_NEW__
+ #define SCCB_SERIAL_CLK_PIN (24|GPIO_MAGIC_NUM)
+ #define SCCB_SERIAL_DATA_PIN (25|GPIO_MAGIC_NUM)
+ #else /* __CUST_NEW__ */
+ #define SCCB_SERIAL_CLK_PIN 24
+ #define SCCB_SERIAL_DATA_PIN 25
+ #endif /* __CUST_NEW__ */
+ #define SCCB_GPIO_SCL_MODE 2
+ #define SCCB_GPIO_SDA_MODE 2
+#endif // #if (defined(DRV_GPIO_REG_AS_6253T))
+
+
+#if (defined(DRV_GPIO_REG_AS_6253E)&&defined(MT6253E)&&defined(__SERIAL_SENSOR_V1_SUPPORT__))
+ #ifdef __CUST_NEW__
+ #define SCCB_SERIAL_CLK_PIN (24|GPIO_MAGIC_NUM)
+ #define SCCB_SERIAL_DATA_PIN (25|GPIO_MAGIC_NUM)
+ #else /* __CUST_NEW__ */
+ #define SCCB_SERIAL_CLK_PIN 24
+ #define SCCB_SERIAL_DATA_PIN 25
+ #endif /* __CUST_NEW__ */
+ #define SCCB_GPIO_SCL_MODE 2
+ #define SCCB_GPIO_SDA_MODE 2
+#elif (defined(DRV_GPIO_REG_AS_6253E)&&defined(MT6253E))
+ #ifdef __CUST_NEW__
+ #define SCCB_SERIAL_CLK_PIN (22|GPIO_MAGIC_NUM)
+ #define SCCB_SERIAL_DATA_PIN (23|GPIO_MAGIC_NUM)
+ #else /* __CUST_NEW__ */
+ #define SCCB_SERIAL_CLK_PIN 22
+ #define SCCB_SERIAL_DATA_PIN 23
+ #endif /* __CUST_NEW__ */
+ #define SCCB_GPIO_SCL_MODE 3
+ #define SCCB_GPIO_SDA_MODE 3
+#endif
+
+#if (defined(DRV_GPIO_REG_AS_6253E)&&defined(MT6253L))
+ #ifdef __CUST_NEW__
+ #define SCCB_SERIAL_CLK_PIN (24|GPIO_MAGIC_NUM)
+ #define SCCB_SERIAL_DATA_PIN (25|GPIO_MAGIC_NUM)
+ #else /* __CUST_NEW__ */
+ #define SCCB_SERIAL_CLK_PIN 24
+ #define SCCB_SERIAL_DATA_PIN 25
+ #endif /* __CUST_NEW__ */
+ #define SCCB_GPIO_SCL_MODE 2
+ #define SCCB_GPIO_SDA_MODE 2
+#endif
+
+#if (defined(DRV_GPIO_REG_AS_6236))
+ #ifdef __CUST_NEW__
+ #define SCCB_SERIAL_CLK_PIN (29|GPIO_MAGIC_NUM)
+ #define SCCB_SERIAL_DATA_PIN (30|GPIO_MAGIC_NUM)
+ #else /* __CUST_NEW__ */
+ #define SCCB_SERIAL_CLK_PIN 29
+ #define SCCB_SERIAL_DATA_PIN 30
+#endif /*__CUST_NEW__*/
+ #define SCCB_GPIO_SCL_MODE 1
+ #define SCCB_GPIO_SDA_MODE 1
+#endif // #if (defined(DRV_GPIO_REG_AS_6236))
+
+
+///Bin: added to patch build error
+#ifndef SCCB_SERIAL_CLK_PIN
+ #define SCCB_SERIAL_CLK_PIN gpio_sccb_serial_clk_pin
+#endif
+
+#ifndef SCCB_SERIAL_DATA_PIN
+ #define SCCB_SERIAL_DATA_PIN gpio_sccb_serial_data_pin
+#endif
+
+/* Extern Global Variable */
+void init_sccb(void);
+// MoDIS parser skip start
+// The following APIs are implemented in other dummy API files
+kal_uint8 sccb_config(kal_uint8 mode, kal_uint8 wid, kal_uint8 rid, SCCB_FREQ_STRUCT *freq);
+// MoDIS parser skip end
+kal_uint8 sccb_getMode(void);
+void sccb_setDelay(kal_uint32 delay);
+
+#if defined(__SCCB_MODULE_V1__)
+void sccb_write(kal_uint32 cmd, kal_uint32 param);
+void sccb_multi_write(kal_uint32 cmd, kal_uint32 *param, kal_uint8 num);
+void sccb_cont_write(kal_uint32 cmd, kal_uint32 spec_cmd, kal_uint32 param);
+kal_uint32 sccb_read (kal_uint32 cmd);
+kal_uint32 sccb_phase3_read (kal_uint32 cmd);
+kal_uint32 sccb_cont_read (kal_uint32 cmd, kal_uint32 spec_cmd);
+kal_uint8 sccb_multi_read (kal_uint32 cmd, kal_uint32 *param, kal_uint8 num);
+#endif // #if defined(__SCCB_MODULE_V1__)
+
+#endif // #ifndef __SCCB_H__
+
diff --git a/mcu/interface/driver/hwdrv/sccb_v2.h b/mcu/interface/driver/hwdrv/sccb_v2.h
new file mode 100644
index 0000000..e542fc2
--- /dev/null
+++ b/mcu/interface/driver/hwdrv/sccb_v2.h
@@ -0,0 +1,595 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * sccb_v2.h
+ *
+ *
+ * Description:
+ * ------------
+ * SCCB/I2C V2 Driver
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ *
+ *
+ * removed!
+ * removed!
+ *
+ *
+ * removed!
+ * removed!
+ *
+ *
+ * removed!
+ * removed!
+ *
+ *
+ * removed!
+ * removed!
+ *
+ *
+ * removed!
+ * removed!
+ *
+ *
+ * removed!
+ * removed!
+ *
+ *
+ * removed!
+ * removed!
+ *
+ *
+ * removed!
+ * removed!
+ *
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ *
+ *
+ * removed!
+ * removed!
+ *
+ *
+ * removed!
+ * removed!
+ *
+ *
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ *****************************************************************************/
+#ifndef __SCCB_V2_H__
+#define __SCCB_V2_H__
+
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#if (defined(DRV_I2C_25_SERIES))
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#ifndef __DRV_DEBUG_I2C_REG_READ_WRITE__
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#else // #ifndef __DRV_DEBUG_PMU_REG_READ_WRITE__
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif // #ifndef __DRV_DEBUG_PMU_REG_READ_WRITE__
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#if defined(DRV_I2C_CLOCK_RATE_15_360_MHZ)
+/* under construction !*/
+#elif defined(DRV_I2C_CLOCK_RATE_3_000_MHZ)
+/* under construction !*/
+#else // #if defined(DRV_I2C_CLOCK_RATE_15_360_MHZ)
+/* under construction !*/
+#endif // #if defined(DRV_I2C_CLOCK_RATE_15_360_MHZ)
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#if defined(__MEUT__)
+/* under construction !*/
+#endif // #if defined(__MEUT__)
+/* under construction !*/
+#ifdef I2C_V2_DVT
+ #if !defined(DRV_I2C_DMA_ENABLED)
+/* under construction !*/
+ #endif // #if !defined(DRV_I2C_DMA_ENABLED)
+#endif // #ifdef I2C_V2_DVT
+/* under construction !*/
+#if (defined(DRV_I2C_DMA_ENABLED))
+/* under construction !*/
+#endif // #if (defined(DRV_I2C_DMA_ENABLED))
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#if defined(DRV_I2C_CLOCK_RATE_15_360_MHZ)
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#elif defined(DRV_I2C_CLOCK_RATE_3_000_MHZ)
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#else // #if defined(DRV_I2C_CLOCK_RATE_15_360_MHZ)
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif // #if defined(DRV_I2C_CLOCK_RATE_15_360_MHZ)
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+ #if (defined(DRV_I2C_DMA_ENABLED))
+/* under construction !*/
+ #endif // #if (defined(DRV_I2C_DMA_ENABLED))
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+ #if (defined(DRV_I2C_DMA_ENABLED))
+/* under construction !*/
+ #endif // #if (defined(DRV_I2C_DMA_ENABLED))
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#if defined(__SUPPORT_SCCB_XXX_API__)
+/* under construction !*/
+#if(defined(DRV_GPIO_6223_SERIES))
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+ #if defined(SCCB_SERIAL_CLK_PIN)
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+ #endif // #if defined(SCCB_SERIAL_CLK_PIN)
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif // #if(defined(DRV_GPIO_6223_SERIES))
+/* under construction !*/
+#endif // #if defined(__SUPPORT_SCCB_XXX_API__)
+/* under construction !*/
+ #ifndef DRV_I2C_OFF
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif // DRV_I2C_OFF
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#if defined(DRV_I2C_DIRECT_CONFIG_DMA_REGISTER)
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif // #if defined(DRV_I2C_DIRECT_CONFIG_DMA_REGISTER)
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#if (defined(DRV_I2C_DMA_ENABLED))
+/* under construction !*/
+#endif // #if (defined(DRV_I2C_DMA_ENABLED))
+/* under construction !*/
+#if defined(DRV_I2C_25_SERIES)
+#if defined(__SUPPORT_SCCB_XXX_API__)
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif // #if defined(__SUPPORT_SCCB_XXX_API__)
+#endif // #if defined(DRV_I2C_25_SERIES)
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif // #if (defined(DRV_I2C_25_SERIES))
+/* under construction !*/
+#endif // #ifndef __SCCB_V2_H__
+
+#endif // #ifndef __SCCB_V2_H__
+
diff --git a/mcu/interface/driver/hwdrv/sccb_v2.h_ b/mcu/interface/driver/hwdrv/sccb_v2.h_
new file mode 100755
index 0000000..53481b8
--- /dev/null
+++ b/mcu/interface/driver/hwdrv/sccb_v2.h_
@@ -0,0 +1,596 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * sccb_v2.h
+ *
+ *
+ * Description:
+ * ------------
+ * SCCB/I2C V2 Driver
+ *
+ * Author:
+ * -------
+ * Scott Hung (mtk01235)
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * $Revision: $
+ * $Modtime: $
+ * $Log: $
+ *
+ * 04 24 2012 wcpuser_integrator
+ * [MAUI_03155806] [MSBB2] Global Revise Clear and Uniform Legacy Header File Inclusion Requested by JI Huang
+ * .
+ *
+ * 11 30 2010 guoxin.hong
+ * [MAUI_02841708] [Drv] MAUI HAL Peripheral Create
+ * .
+ *
+ * 11 23 2010 shuang.han
+ * [MAUI_02840976] [HAL][Drv] driver feature option files merge back to MAUI
+ * .
+ *
+ * 10 18 2010 shuang.han
+ * [MAUI_02637814] [RHR][MAUIW1038OF_RHR] Integration to W10.43
+ * .
+ *
+ * May 19 2010 mtk01845
+ * [MAUI_02529366] [Drv] I2C patch for MT6236 sanity failed
+ *
+ *
+ * May 15 2010 mtk02787
+ * [MAUI_02524954] I2C "write then read" fail
+ *
+ *
+ * May 6 2010 mtk02787
+ * [MAUI_02416501] add function definition in sccb_v2.h to avoid build warning
+ *
+ *
+ * Apr 15 2010 mtk02787
+ * [MAUI_02397396] I2C V1 phase out
+ *
+ *
+ * Apr 14 2010 mtk02787
+ * [MAUI_02392155] [MEUT] Check in driver on/off function to Maui
+ *
+ *
+ * Mar 31 2010 mtk02787
+ * [MAUI_02385929] I2C DMA mode
+ *
+ *
+ * Feb 22 2010 mtk01845
+ * [MAUI_02360180] [Drv][I2C] I2C driver revision for new DMA architecture from MT6276
+ *
+ *
+ * Feb 20 2010 mtk01845
+ * [MAUI_02360180] [Drv][I2C] I2C driver revision for new DMA architecture from MT6276
+ *
+ *
+ * Oct 12 2009 mtk01845
+ * [MAUI_01963866] [Drv][I2C] sccb.h define I2C pins
+ *
+ *
+ * May 9 2009 mtk01845
+ * [MAUI_01319629] [Drv] MEUT check in
+ *
+ *
+ * Jan 12 2009 mtk01845
+ * [MAUI_01307296] MT6235 charger constant current CC6 and CC7 change to internal use
+ *
+ *
+ * Nov 6 2008 mtk01845
+ * [MAUI_01269587] [Drv] MT6253T merge back to MAUI
+ *
+ *
+ * Jun 21 2008 mtk01845
+ * [MAUI_00791553] [Drv] MT6268A merge DVT code back to MAUI
+ *
+ *
+ * Jun 20 2008 mtk01845
+ * [MAUI_00791553] [Drv] MT6268A merge DVT code back to MAUI
+ *
+ *
+ * Apr 22 2008 mtk01845
+ * [MAUI_00760971] [Drv][MoDIS] Add driver API functions into MoDIS dummy driver
+ *
+ *
+ * Nov 9 2007 mtk01283
+ * [MAUI_00573819] [Drv][Compile option] Check in MT6235 compile option to Maui
+ *
+ *
+ * Aug 6 2007 mtk01283
+ * [MAUI_00529681] [Drv] Remove compile warning in driver codes
+ *
+ *
+ * Mar 19 2007 mtk01235
+ * [MAUI_00359681] [Drv][Compile Option] Add MT6223 and MT6223P compile option
+ *
+ *
+ * Jan 30 2007 MTK01235
+ * [MAUI_00363041] [Drv]Driver Feature Management
+ *
+ *
+ * Nov 20 2006 MTK01235
+ * [MAUI_00338437] [I2C] Check in I2C/SCCB V2 driver
+ *
+ *
+ * Oct 25 2006 mtk01235
+ * [MAUI_00338437] [I2C] Check in I2C/SCCB V2 driver
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ *****************************************************************************/
+#ifndef __SCCB_V2_H__
+#define __SCCB_V2_H__
+
+
+#include "drv_features_i2c.h"
+
+#if (defined(DRV_I2C_25_SERIES))
+//#if (defined(MT6225))
+
+#include "sccb.h"
+#include "intrCtrl.h"
+#include "drv_comm.h"
+#include "sccb_v2_custom.h"
+#define SCCB_OWNER_HEADER_FILE_INCLUDED
+
+//MSBB remove #include "kal_non_specific_general_types.h"
+#include "reg_base.h"
+
+
+#ifndef __DRV_DEBUG_I2C_REG_READ_WRITE__
+#define DRV_I2C_ClearBits16(addr, data) DRV_ClearBits(addr,data)
+#define DRV_I2C_SetBits16(addr, data) DRV_SetBits(addr,data)
+#define DRV_I2C_WriteReg16(addr, data) DRV_WriteReg(addr, data)
+#define DRV_I2C_ReadReg16(addr) DRV_Reg(addr)
+#define DRV_I2C_SetData16(addr, bitmask, value) DRV_SetData(addr, bitmask, value)
+#else // #ifndef __DRV_DEBUG_PMU_REG_READ_WRITE__
+#define DRV_I2C_ClearBits16(addr,data) DRV_DBG_ClearBits(addr,data)
+#define DRV_I2C_SetBits16(addr) DRV_DBG_SetBits(addr)
+#define DRV_I2C_WriteReg16(addr, data) DRV_DBG_WriteReg(addr, data)
+#define DRV_I2C_ReadReg16(addr) DRV_DBG_Reg(addr)
+#define DRV_I2C_SetData16(addr, bitmask, value) DRV_DBG_SetData(addr, bitmask, value)
+#endif // #ifndef __DRV_DEBUG_PMU_REG_READ_WRITE__
+
+#define I2C_MODULE_FIFO_DEPTH 8
+
+
+#define SCCB_MAXIMUM_TRANSACTION_LENGTH 8 // SCCB backward compatible
+
+
+#if defined(DRV_I2C_CLOCK_RATE_15_360_MHZ)
+#define SCCB_CLOCK_RATE 15360 //15.36MHz
+#elif defined(DRV_I2C_CLOCK_RATE_3_000_MHZ)
+#define SCCB_CLOCK_RATE 3000 //3.0MHz
+#else // #if defined(DRV_I2C_CLOCK_RATE_15_360_MHZ)
+#define SCCB_CLOCK_RATE 13000 //13MHz
+#endif // #if defined(DRV_I2C_CLOCK_RATE_15_360_MHZ)
+
+
+
+#if defined(__MEUT__)
+#define I2C_V2_DVT
+#endif // #if defined(__MEUT__)
+
+#ifdef I2C_V2_DVT
+ #if !defined(DRV_I2C_DMA_ENABLED)
+ #define DRV_I2C_DMA_ENABLED //Only used in DVT
+ #endif // #if !defined(DRV_I2C_DMA_ENABLED)
+#endif // #ifdef I2C_V2_DVT
+
+#if (defined(DRV_I2C_DMA_ENABLED))
+#include "dma_hw.h"
+#endif // #if (defined(DRV_I2C_DMA_ENABLED))
+
+// Some common structures are defined in sccb.h
+
+typedef enum
+{
+ SCCB_TRANSACTION_COMPLETE,
+ SCCB_TRANSACTION_FAIL
+}SCCB_TRANSACTION_RESULT;
+
+
+typedef enum
+{
+ SCCB_READY_STATE,
+ SCCB_BUSY_STATE
+}SCCB_STATE;
+
+/* Transaction mode for new SCCB APIs */
+typedef enum
+{
+ SCCB_TRANSACTION_FAST_MODE,
+ SCCB_TRANSACTION_HIGH_SPEED_MODE
+}SCCB_TRANSACTION_MODE;
+
+typedef enum
+{
+#if defined(DRV_I2C_CLOCK_RATE_15_360_MHZ)
+ // Module source clock is 15.36Mhz
+ SCCB_100KB, //99.74KB
+ SCCB_200KB, //196.9KB
+ SCCB_300KB, //295.4KB
+ SCCB_400KB, //384.0KB
+ /* HS Mode */
+ SCCB_960KB, //960.0KB
+ SCCB_1280KB, //1280.0KB
+ SCCB_1536KB, //1536.0KB
+ SCCB_1920KB, //1920.0KB
+ SCCB_2560KB, //2560.0KB
+ SCCB_3840KB //3840.0KB
+#elif defined(DRV_I2C_CLOCK_RATE_3_000_MHZ)
+ // Module source clock is 3.0Mhz
+ SCCB_100KB, //100.0KB
+ SCCB_200KB, //196.9KB
+ SCCB_400KB, //384.0KB
+ /* HS Mode */
+ SCCB_750KB, //750.0KB
+ SCCB_1500KB //1500.0KB
+#else // #if defined(DRV_I2C_CLOCK_RATE_15_360_MHZ)
+ // Module source clock is 13Mhz
+ SCCB_100KB, //101.5KB
+ SCCB_200KB, //203.1KB
+ SCCB_300KB, //295.5KB
+ SCCB_400KB, //382.4KB
+ /* HS Mode */
+ SCCB_460KB, //464.3KB
+ SCCB_540KB, //541.7KB
+ SCCB_650KB, //650.0KB
+ SCCB_720KB, //722.0KB
+
+ SCCB_810KB, //812.5KB
+ SCCB_930KB, //928.6KB
+ SCCB_1100KB, //1083.3KB
+ SCCB_1300KB, //1300.0KB
+ SCCB_1625KB, //1625.0KB
+ SCCB_2150KB, //2166.6KB
+ SCCB_3250KB //3250.6KB
+#endif // #if defined(DRV_I2C_CLOCK_RATE_15_360_MHZ)
+}SCCB_SPEED_ENUM;
+
+typedef struct
+{
+ kal_uint8 sccb_mode; // Transaction mode for existing SCCB APIs
+
+ kal_bool get_handle_wait; //When get handle wait until the sccb is avaliable
+
+ kal_uint8 slave_address; //the address of the slave device
+
+ kal_uint8 delay_len; //number of half pulse between transfers in a trasaction
+
+ SCCB_TRANSACTION_MODE transaction_mode; //SCCB_TRANSACTION_FAST_MODE or SCCB_TRANSACTION_HIGH_SPEED_MODE
+
+ kal_uint32 Fast_Mode_Speed; //The speed of sccb fast mode(Kb)
+
+ kal_uint32 HS_Mode_Speed; //The speed of sccb high speed mode(Kb)
+
+ #if (defined(DRV_I2C_DMA_ENABLED))
+ kal_bool is_DMA_enabled; //Transaction via DMA instead of 8-byte FIFO
+ #endif // #if (defined(DRV_I2C_DMA_ENABLED))
+
+}sccb_config_struct;
+
+typedef struct
+{
+ sccb_config_struct sccb_config;
+
+ kal_uint8 fs_sample_cnt_div; //these two parameters are used to specify sccb clock rate
+ kal_uint8 fs_step_cnt_div; //half pulse width=step_cnt_div*sample_cnt_div*(1/13Mhz)
+
+ kal_uint8 hs_sample_cnt_div; //these two parameters are used to specify sccb clock rate
+ kal_uint8 hs_step_cnt_div; //half pulse width=step_cnt_div*sample_cnt_div*(1/13Mhz)
+
+ SCCB_TRANSACTION_RESULT transaction_result; /* The result of the end of transaction
+ (SCCB_TRANSACTION_COMPLETE|SCCB_TRANSACTION_FAIL) */
+
+}sccb_handle_struct;
+
+typedef struct
+{
+ volatile SCCB_STATE state;
+ kal_uint8 owner;
+
+ kal_uint8 number_of_read;
+ kal_uint8* read_buffer;
+
+ #if (defined(DRV_I2C_DMA_ENABLED))
+ kal_bool is_DMA_enabled;
+ #endif // #if (defined(DRV_I2C_DMA_ENABLED))
+
+}sccb_status_struct;
+
+
+#if defined(__SUPPORT_SCCB_XXX_API__)
+
+#if(defined(DRV_GPIO_6223_SERIES))
+ // Need to check the history
+ // When platform is 6223, without __CUST_NEW__
+ // The SCL and SDA in sccb.h is 15, 19
+ // In spec, the SCL, SDA is 45, 46
+ #if defined(SCCB_SERIAL_CLK_PIN)
+ // It means someone include sccb_v2.h
+ // Driver should use the SCL, SDA defined in sccb_v2.h
+ #undef SCCB_SERIAL_CLK_PIN
+ #undef SCCB_SERIAL_DATA_PIN
+ #undef SCCB_GPIO_SCL_MODE
+ #undef SCCB_GPIO_SDA_MODE
+ #endif // #if defined(SCCB_SERIAL_CLK_PIN)
+
+ #define SCCB_SERIAL_CLK_PIN 45
+ #define SCCB_SERIAL_DATA_PIN 46
+ #define SCCB_GPIO_SCL_MODE 3
+ #define SCCB_GPIO_SDA_MODE 3
+#endif // #if(defined(DRV_GPIO_6223_SERIES))
+
+#endif // #if defined(__SUPPORT_SCCB_XXX_API__)
+
+ #ifndef DRV_I2C_OFF
+/* Register Definitions */
+#define REG_I2C_DATA_PORT (I2C_base + 0x00)
+#define REG_I2C_SLAVE_ADDR (I2C_base + 0x04)
+#define REG_I2C_INT_MASK (I2C_base + 0x08)
+#define REG_I2C_INT_STA (I2C_base + 0x0c)
+#define REG_I2C_CONTROL (I2C_base + 0x10)
+#define REG_I2C_TRANSFER_LEN (I2C_base + 0x14)
+#define REG_I2C_TRANSAC_LEN (I2C_base + 0x18)
+#define REG_I2C_DELAY_LEN (I2C_base + 0x1c)
+#define REG_I2C_TIMING (I2C_base + 0x20)
+#define REG_I2C_START (I2C_base + 0x24)
+#define REG_I2C_FIFO_STAT (I2C_base + 0x30)
+#define REG_I2C_FIFO_THRESH (I2C_base + 0x34)
+#define REG_I2C_FIFO_ADDR_CLR (I2C_base + 0x38)
+#define REG_I2C_IO_CONFIG (I2C_base + 0x40)
+#define REG_I2C_MULTI_MASTER (I2C_base + 0x44)
+#define REG_I2C_HS_MODE (I2C_base + 0x48)
+#define REG_I2C_SOFTRESET (I2C_base + 0x50)
+#endif // DRV_I2C_OFF
+
+/* Register masks */
+#define I2C_1_BIT_MASK 0x01
+#define I2C_3_BIT_MASK 0x07
+#define I2C_4_BIT_MASK 0x0f
+#define I2C_6_BIT_MASK 0x3f
+#define I2C_8_BIT_MASK 0xff
+
+#define I2C_RX_FIFO_THRESH_MASK 0x0007
+#define I2C_RX_FIFO_THRESH_SHIFT 0
+#define I2C_TX_FIFO_THRESH_MASK 0x0700
+#define I2C_TX_FIFO_THRESH_SHIFT 8
+
+#define I2C_AUX_LEN_MASK 0x1f00
+#define I2C_AUX_LEN_SHIFT 8
+
+#define I2C_SAMPLE_CNT_DIV_MASK 0x0700
+#define I2C_SAMPLE_CNT_DIV_SHIFT 8
+#define I2C_DATA_READ_TIME_MASK 0x7000
+#define I2C_DATA_READ_TIME_SHIFT 12
+
+#define I2C_MASTER_READ 0x01
+#define I2C_MASTER_WRITE 0x00
+
+//#define I2C_CTL_MODE_BIT 0x01
+#define I2C_CTL_RS_STOP_BIT 0x02
+#define I2C_CTL_DMA_EN_BIT 0x04
+#define I2C_CTL_CLK_EXT_EN_BIT 0x08
+#define I2C_CTL_DIR_CHANGE_BIT 0x10
+#define I2C_CTL_ACK_ERR_DET_BIT 0x20
+#define I2C_CTL_TRANSFER_LEN_CHG_BIT 0x40
+
+#define I2C_DATA_READ_ADJ_BIT 0x8000
+
+#define I2C_SCL_MODE_BIT 0x01
+#define I2C_SDA_MODE_BIT 0x02
+#define I2C_BUS_DETECT_EN_BIT 0x04
+
+#define I2C_ARBITRATION_BIT 0x01
+#define I2C_CLOCK_SYNC_BIT 0x02
+#define I2C_BUS_BUSY_DET_BIT 0x04
+
+#define I2C_HS_EN_BIT 0x01
+#define I2C_HS_NACK_ERR_DET_EN_BIT 0x02
+#define I2C_HS_MASTER_CODE_MASK 0x0070
+#define I2C_HS_MASTER_CODE_SHIFT 4
+#define I2C_HS_STEP_CNT_DIV_MASK 0x0700
+#define I2C_HS_STEP_CNT_DIV_SHIFT 8
+#define I2C_HS_SAMPLE_CNT_DIV_MASK 0x7000
+#define I2C_HS_SAMPLE_CNT_DIV_SHIFT 12
+
+/* I2C Status */
+#define I2C_FIFO_FULL_STATUS 0x01
+#define I2C_FIFO_EMPTY_STATUS 0x02
+
+/* Register Settings */
+#define SET_I2C_SLAVE_ADDRESS(n,rw) do{DRV_I2C_SetData16(REG_I2C_SLAVE_ADDR, I2C_8_BIT_MASK, (((n>>1)<<1) + rw));} while(0);
+
+#define DISABLE_I2C_INT do{DRV_I2C_WriteReg16(REG_I2C_INT_MASK, 0);} while(0);
+#define ENABLE_I2C_INT do{DRV_I2C_WriteReg16(REG_I2C_INT_MASK,I2C_1_BIT_MASK);} while(0);
+
+#define CLEAR_I2C_STA do{DRV_I2C_WriteReg16(REG_I2C_INT_STA, I2C_4_BIT_MASK);} while(0);
+
+//#define SET_I2C_FAST_SPEED_MODE REG_I2C_CONTROL &= ~I2C_CTL_MODE_BIT;
+//#define SET_I2C_HIGH_SPEED_MODE REG_I2C_CONTROL |= I2C_CTL_MODE_BIT;
+
+#define SET_I2C_ST_BETWEEN_TRANSFER do{DRV_I2C_ClearBits16(REG_I2C_CONTROL, I2C_CTL_RS_STOP_BIT);} while(0);
+#define SET_I2C_RS_BETWEEN_TRANSFER do{DRV_I2C_SetBits16(REG_I2C_CONTROL, I2C_CTL_RS_STOP_BIT);} while(0);
+#define ENABLE_I2C_DMA_TRANSFER do{DRV_I2C_SetBits16(REG_I2C_CONTROL, I2C_CTL_DMA_EN_BIT);} while(0);
+#define ENABLE_I2C_CLOCK_EXTENSION do{DRV_I2C_SetBits16(REG_I2C_CONTROL, I2C_CTL_CLK_EXT_EN_BIT);} while(0);
+#define ENABLE_I2C_DIR_CHANGE do{DRV_I2C_SetBits16(REG_I2C_CONTROL, I2C_CTL_DIR_CHANGE_BIT);} while(0);
+#define ENABLE_I2C_ACK_ERR_DET do{DRV_I2C_SetBits16(REG_I2C_CONTROL, I2C_CTL_ACK_ERR_DET_BIT);} while(0);
+#define ENABLE_I2C_TRANSFER_LEN_CHG do{DRV_I2C_SetBits16(REG_I2C_CONTROL, I2C_CTL_TRANSFER_LEN_CHG_BIT);} while(0);
+
+#define DISABLE_I2C_DMA_TRANSFER do{DRV_I2C_ClearBits16(REG_I2C_CONTROL, I2C_CTL_DMA_EN_BIT);} while(0);
+#define DISABLE_I2C_CLOCK_EXTENSION do{DRV_I2C_ClearBits16(REG_I2C_CONTROL, I2C_CTL_CLK_EXT_EN_BIT);} while(0);
+#define DISABLE_I2C_DIR_CHANGE do{DRV_I2C_ClearBits16(REG_I2C_CONTROL, I2C_CTL_DIR_CHANGE_BIT);} while(0);
+#define DISABLE_I2C_ACK_ERR_DET do{DRV_I2C_ClearBits16(REG_I2C_CONTROL, I2C_CTL_ACK_ERR_DET_BIT);} while(0);
+#define DISABLE_I2C_TRANSFER_LEN_CHG do{DRV_I2C_ClearBits16(REG_I2C_CONTROL, I2C_CTL_TRANSFER_LEN_CHG_BIT);} while(0);
+
+#define SET_I2C_TRANSFER_LENGTH(n) do{DRV_I2C_SetData16(REG_I2C_TRANSFER_LEN, I2C_8_BIT_MASK, (n));} while(0);
+#define SET_I2C_AUX_TRANSFER_LENGTH(n) do{DRV_I2C_SetData16(REG_I2C_TRANSFER_LEN, I2C_AUX_LEN_MASK, ((n)<<I2C_AUX_LEN_SHIFT));} while(0);
+
+#define SET_I2C_TRANSACTION_LENGTH(n) do{DRV_I2C_SetData16(REG_I2C_TRANSAC_LEN, I2C_8_BIT_MASK, (n));} while(0);
+#define SET_I2C_DELAY_LENGTH(n) do{DRV_I2C_SetData16(REG_I2C_DELAY_LEN, I2C_8_BIT_MASK, (n));} while(0);
+
+#define SET_I2C_STEP_CNT_DIV(n) do{DRV_I2C_SetData16(REG_I2C_TIMING, I2C_6_BIT_MASK, (n));} while(0);
+#define SET_I2C_SAMPLE_CNT_DIV(n) do{DRV_I2C_SetData16(REG_I2C_TIMING, I2C_SAMPLE_CNT_DIV_MASK, ((n)<<I2C_SAMPLE_CNT_DIV_SHIFT));} while(0);
+#define SET_I2C_DATA_READ_TIME(n) do{DRV_I2C_SetData16(REG_I2C_TIMING, I2C_DATA_READ_TIME_MASK, ((n)<<I2C_DATA_READ_TIME_SHIFT));} while(0);
+#define ENABLE_I2C_DATA_READ_ADJ do{DRV_I2C_SetBits16(REG_I2C_TIMING, I2C_DATA_READ_ADJ_BIT);} while(0);
+#define DISABLE_I2C_DATA_READ_ADJ do{DRV_I2C_ClearBits16(REG_I2C_TIMING, I2C_DATA_READ_ADJ_BIT);} while(0);
+
+#define START_I2C_TRANSACTION do{DRV_I2C_WriteReg16(REG_I2C_START, 0x01);} while(0);
+
+// #define I2C_FIFO_FULL ((REG_I2C_FIFO_STAT>>1)&0x01)
+// #define I2C_FIFO_EMPTY (REG_I2C_FIFO_STAT & 0x01)
+
+#define SET_I2C_RX_FIFO_THRESH(n) do{DRV_I2C_SetData16(REG_I2C_FIFO_THRESH, I2C_RX_FIFO_THRESH_MASK, ((n)<< I2C_RX_FIFO_THRESH_SHIFT));} while(0);
+#define SET_I2C_TX_FIFO_THRESH(n) do{DRV_I2C_SetData16(REG_I2C_FIFO_THRESH, I2C_TX_FIFO_THRESH_MASK, ((n)<< I2C_TX_FIFO_THRESH_SHIFT));} while(0);
+
+#define CLEAR_I2C_FIFO do{DRV_I2C_WriteReg16(REG_I2C_FIFO_ADDR_CLR, 0x01);} while(0);
+
+#define SET_I2C_SCL_NORMAL_MODE do{DRV_I2C_ClearBits16(REG_I2C_IO_CONFIG, I2C_SCL_MODE_BIT);} while(0);
+#define SET_I2C_SCL_WIRED_AND_MODE do{DRV_I2C_SetBits16(REG_I2C_IO_CONFIG, I2C_SCL_MODE_BIT);} while(0);
+#define SET_I2C_SDA_NORMAL_MODE do{DRV_I2C_ClearBits16(REG_I2C_IO_CONFIG, I2C_SDA_MODE_BIT);} while(0);
+#define SET_I2C_SDA_WIRED_AND_MODE do{DRV_I2C_SetBits16(REG_I2C_IO_CONFIG, I2C_SDA_MODE_BIT);} while(0);
+#define ENABLE_I2C_BUS_DETECT do{DRV_I2C_SetBits16(REG_I2C_IO_CONFIG, I2C_BUS_DETECT_EN_BIT);} while(0);
+#define DISABLE_I2C_BUS_DETECT do{DRV_I2C_ClearBits16(REG_I2C_IO_CONFIG, I2C_BUS_DETECT_EN_BIT);} while(0);
+
+#define ENABLE_I2C_CLOCK_SYNC do{DRV_I2C_SetBits16(REG_I2C_MULTI_MASTER, I2C_ARBITRATION_BIT);} while(0);
+#define ENABLE_DATA_ARBITION do{DRV_I2C_SetBits16(REG_I2C_MULTI_MASTER, I2C_CLOCK_SYNC_BIT);} while(0);
+#define ENABLE_I2C_BUS_BUSY_DET do{DRV_I2C_SetBits16(REG_I2C_MULTI_MASTER, I2C_BUS_BUSY_DET_BIT);} while(0);
+#define DISABLE_I2C_CLOCK_SYNC do{DRV_I2C_ClearBits16(REG_I2C_MULTI_MASTER, I2C_ARBITRATION_BIT);} while(0);
+#define DISABLE_DATA_ARBITION do{DRV_I2C_ClearBits16(REG_I2C_MULTI_MASTER, I2C_CLOCK_SYNC_BIT);} while(0);
+#define DISABLE_I2C_BUS_BUSY_DET do{DRV_I2C_ClearBits16(REG_I2C_MULTI_MASTER, I2C_BUS_BUSY_DET_BIT);} while(0);
+
+#define SET_I2C_HIGH_SPEED_MODE_800KB do{DRV_I2C_WriteReg16(REG_I2C_HS_MODE, 0x0703);} while(0);
+#define SET_I2C_HIGH_SPEED_MODE_1000KB do{DRV_I2C_WriteReg16(REG_I2C_HS_MODE, 0x0503);} while(0);
+
+#define SET_I2C_FAST_MODE do{DRV_I2C_ClearBits16(REG_I2C_HS_MODE, I2C_HS_EN_BIT);} while(0);
+#define SET_I2C_HS_MODE do{DRV_I2C_SetBits16(REG_I2C_HS_MODE, I2C_HS_EN_BIT);} while(0);
+#define ENABLE_I2C_NAKERR_DET do{DRV_I2C_SetBits16(REG_I2C_HS_MODE, I2C_HS_NACK_ERR_DET_EN_BIT);} while(0);
+#define DISABLE_I2C_NAKERR_DET do{DRV_I2C_ClearBits16(REG_I2C_HS_MODE, I2C_HS_NACK_ERR_DET_EN_BIT);} while(0);
+#define SET_I2C_HS_MASTER_CODE(n) do{DRV_I2C_SetData16(REG_I2C_HS_MODE, I2C_HS_MASTER_CODE_MASK, ((n)<<I2C_HS_MASTER_CODE_SHIFT));} while(0);
+
+#define SET_I2C_HS_STEP_CNT_DIV(n) do{DRV_I2C_SetData16(REG_I2C_HS_MODE, I2C_HS_STEP_CNT_DIV_MASK, ((n)<<I2C_HS_STEP_CNT_DIV_SHIFT));} while(0);
+#define SET_I2C_HS_SAMPLE_CNT_DIV(n) do{DRV_I2C_SetData16(REG_I2C_HS_MODE, I2C_HS_SAMPLE_CNT_DIV_MASK, ((n)<<I2C_HS_SAMPLE_CNT_DIV_SHIFT));} while(0);
+
+#define RESET_I2C do{DRV_I2C_WriteReg16(REG_I2C_SOFTRESET, 0x01);} while(0);
+
+//---------------- DMA ----------------
+#if defined(DRV_I2C_DIRECT_CONFIG_DMA_REGISTER)
+
+//#define DMA_base 0x80030000 -->defined in /inc/reg_base.h
+
+/* Regidter Definitions */
+#define REG_DMA_CHANNEL_CONTROL(c) *((volatile unsigned int *) (DMA_base + 0x14+ (c<<8)))
+#define REG_DMA_CHANNEL_START(c) *((volatile unsigned int *) (DMA_base + 0x18+ (c<<8)))
+#define REG_DMA_PROG_ADDR(c) *((volatile unsigned int *) (DMA_base + 0x2c+ (c<<8)))
+#define REG_DMA_TRANSFER_COUNT(c) *((volatile unsigned int *) (DMA_base + 0x10+ (c<<8)))
+
+/* Master Definitions*/
+#define DMA_MASTER_I2C_TX DMA_CON_MASTER_I2CTX
+#define DMA_MASTER_I2C_RX DMA_CON_MASTER_I2CRX
+#define DMA_MASTER_IRDA_TX 0x02
+#define DMA_MASTER_IRDA_RX 0x03
+
+#define DMA_I2C_TX_CHANNEL 4
+#define DMA_I2C_RX_CHANNEL 5
+
+/* Register masks */
+#define DMA_CON_DIR_MASK 0x40000
+#define DMA_CON_MAS_MASK 0x01f00000
+
+#define I2C_SET_TX_DMA_CONTROL(c,m) REG_DMA_CHANNEL_CONTROL(c) = 0x00000014;\
+ REG_DMA_CHANNEL_CONTROL(c) |= (((m)<<20) & DMA_CON_MAS_MASK);
+
+#define I2C_SET_RX_DMA_CONTROL(c,m) REG_DMA_CHANNEL_CONTROL(c) = 0x00040018;\
+ REG_DMA_CHANNEL_CONTROL(c) |= (((m)<<20) & DMA_CON_MAS_MASK);
+
+#define I2C_SET_DMA_PROGRAMMABLE_ADDR(c,addr) REG_DMA_PROG_ADDR(c) = (addr);
+#define I2C_SET_DMA_TRANSFER_COUNT(c,size) REG_DMA_TRANSFER_COUNT(c)= size ;
+#define I2C_START_DMA_TRANSFER(c) REG_DMA_CHANNEL_START(c) = 0x8000;
+#define I2C_STOP_DMA_TRANSFER(c) REG_DMA_CHANNEL_START(c) = 0;
+
+#endif // #if defined(DRV_I2C_DIRECT_CONFIG_DMA_REGISTER)
+
+/****** SW definitions******/
+#define I2C_READ_BIT 0x01
+#define I2C_WRITE_BIT 0x00
+
+#define I2C_TRANSAC_COMPLETE 0x01
+#define I2C_TRANSAC_ACK_ERR 0x02
+#define I2C_HS_NACK_ERR 0x04
+
+void i2c_init(void);
+void i2c_set_transaction_speed(SCCB_OWNER owner,SCCB_TRANSACTION_MODE mode,kal_uint32* Fast_Mode_Speed,kal_uint32* HS_Mode_Speed);
+void i2c_config(SCCB_OWNER owner,sccb_config_struct* para);
+void i2c_set_slave_address(SCCB_OWNER owner,kal_uint8 slave_address);
+void i2c_set_get_handle_wait(SCCB_OWNER owner,kal_bool enable);
+SCCB_TRANSACTION_MODE i2c_get_transaction_mode(SCCB_OWNER owner);
+SCCB_TRANSACTION_RESULT i2c_write(SCCB_OWNER owner,kal_uint8* para,kal_uint32 datalen);
+SCCB_TRANSACTION_RESULT i2c_read(SCCB_OWNER owner,kal_uint8* para,kal_uint32 datalen);
+SCCB_TRANSACTION_RESULT i2c_cont_write(SCCB_OWNER owner, kal_uint8* para, kal_uint32 datalen_in_transfer, kal_uint32 transfer_num);
+SCCB_TRANSACTION_RESULT i2c_cont_read(SCCB_OWNER owner, kal_uint8* para, kal_uint32 datalen_in_transfer, kal_uint32 transfer_num);
+SCCB_TRANSACTION_RESULT i2c_write_and_read(SCCB_OWNER owner, kal_uint8* write_buffer, kal_uint32 write_len, kal_uint8* read_buffer, kal_uint32 read_len);
+#if (defined(DRV_I2C_DMA_ENABLED))
+void i2c_set_DMA(SCCB_OWNER owner, kal_bool enable);
+#endif // #if (defined(DRV_I2C_DMA_ENABLED))
+
+#if defined(DRV_I2C_25_SERIES)
+#if defined(__SUPPORT_SCCB_XXX_API__)
+void sccb_write(SCCB_OWNER owner,kal_uint32 cmd, kal_uint32 param);
+void sccb_multi_write(SCCB_OWNER owner,kal_uint32 cmd, kal_uint32 *param, kal_uint8 num);
+void sccb_cont_write(SCCB_OWNER owner,kal_uint32 cmd, kal_uint32 spec_cmd, kal_uint32 param);
+kal_uint32 sccb_read (SCCB_OWNER owner,kal_uint32 cmd);
+kal_uint32 sccb_phase3_read (SCCB_OWNER owner,kal_uint32 cmd);
+kal_uint32 sccb_cont_read (SCCB_OWNER owner,kal_uint32 cmd, kal_uint32 spec_cmd);
+kal_uint8 sccb_multi_read (SCCB_OWNER owner, kal_uint32 cmd, kal_uint32 *param, kal_uint8 num);
+#endif // #if defined(__SUPPORT_SCCB_XXX_API__)
+#endif // #if defined(DRV_I2C_25_SERIES)
+
+
+
+
+#endif // #if (defined(DRV_I2C_25_SERIES))
+
+#endif // #ifndef __SCCB_V2_H__
+
diff --git a/mcu/interface/driver/hwdrv/sdio_sw.h b/mcu/interface/driver/hwdrv/sdio_sw.h
new file mode 100644
index 0000000..0070ae2
--- /dev/null
+++ b/mcu/interface/driver/hwdrv/sdio_sw.h
@@ -0,0 +1,243 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2001
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * sdio_sw.h
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * Header file of SDIO driver
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#ifndef SDIO_SW_H
+#define SDIO_SW_H
+
+/*SW*/
+
+#define SDIO_CCCR_VERISON_MASK 0xf
+#define SDIO_SD_VERISON_MASK 0xf
+#define SDIO_VERISON_MASK 0xf0
+#define SDIO_VERISON_SHIFT 4
+
+/*CIS tuple code*/
+#define CISTPL_NULL 0x0
+#define CISTPL_CHECKSUM 0x10
+#define CISTPL_VERS_1 0x15
+#define CISTPL_ALTSTR 0x16
+#define CISTPL_MANFID 0x20
+#define CISTPL_FUNCID 0x21
+#define CISTPL_FUNCE 0x22
+#define CISTPL_SDIO_STD 0x91
+#define CISTPL_SDIO_EXT 0x92
+#define CISTPL_END 0xff
+
+/*Function definition*/
+#define SDIO_CCCR_SIZE 32
+#define SDIO_FBR_SIZE 256
+#define SDIO_TUPLE_SIZE 256
+
+typedef enum{
+ SDIO_FUCN_0=0,
+ SDIO_FUCN_1,
+ SDIO_MAX_FUCN_ID,
+ SDIO_FUCN_MEM=0x1000
+}SDIO_function_id_enum;
+typedef enum{
+ SDIO_BS_FREE=0,
+ SDIO_BS_BUS
+}SDIO_bus_status_enum;
+typedef enum{
+ SDIO_INTERFACE_NULL=0,
+ SDIO_INTERFACE_UART,
+ SDIO_INTERFACE_A_BT,
+ SDIO_INTERFACE_B_BT,
+ SDIO_INTERFACE_GPS,
+ SDIO_INTERFACE_CAMERA,
+ SDIO_INTERFACE_PHS,
+ SDIO_INTERFACE_WLAN
+}SDIO_interface_code_enum;
+
+typedef enum{
+ SDIO_FIX, //multi byte r/w at fixed address
+ SDIO_INC //multi byte r/w at incrementing address
+}cmd53_op_enum;
+typedef enum{
+ SDIO_READ,
+ SDIO_WRITE
+}rw_dir_enum;
+typedef enum{
+ DIS,
+ CMD,
+ TRN,
+ RFU
+}sdio_state_enum;
+typedef struct{
+ rw_dir_enum rw; // directon (input)
+ kal_uint8 func; // function (input)
+ kal_bool raw; // read after write
+ kal_bool stop; // stop data transfer
+ kal_uint8 data; // write data or read back data (Input , output)
+ kal_uint32 adrs; // address (input)
+}cmd52_config_struct;
+
+#define SDIO_SUPPORT_FUNCTION (SDIO_MAX_FUCN_ID-1)
+typedef struct{
+ rw_dir_enum rw; // directon
+ kal_uint8 func; // function
+ kal_bool block; // block mode or not
+ cmd53_op_enum op; // operation mode
+ kal_uint16 count; // byte or block count
+ kal_uint32 adrs; // address
+ kal_uint32 buffer; // address of buffer for data transfer
+}cmd53_config_struct;
+
+typedef struct{
+ kal_uint8 num_func;
+ kal_bool mem_present;
+ kal_bool io_ready;
+ kal_bool ocr_valid;
+ kal_bool stop; // stop trans issued
+ sdio_state_enum state;
+ kal_uint8 resp;
+ kal_uint8 bit_width;
+ kal_uint8 capability;
+ kal_uint32 ocr;
+ kal_uint8 power_control;
+ kal_uint32 block_size[SDIO_MAX_FUCN_ID];
+ void (*callback[SDIO_MAX_FUCN_ID])(void);
+}sdio_dcb_struct;
+
+/*SDIO command set*/
+SDC_CMD_STATUS SDIO_Cmd5(kal_uint32 ocr);
+SDC_CMD_STATUS SDIO_Cmd52_isr(cmd52_config_struct *p);
+SDC_CMD_STATUS SDIO_Cmd52(cmd52_config_struct *p);
+SDC_CMD_STATUS SDIO_Cmd53_isr(cmd53_config_struct *p);
+SDC_CMD_STATUS SDIO_Cmd53(cmd53_config_struct *p);
+SDC_CMD_STATUS SD_Send_Cmd_poll(kal_uint32 cmd, kal_uint32 arg);
+SDC_CMD_STATUS SD_WaitCmdRdyOrTo_poll(void);
+SDC_CMD_STATUS SD_StopTrans_poll(void);
+/*Driver only*/
+SDC_CMD_STATUS SDIO_read_FBR(SDIO_function_id_enum function);
+SDC_CMD_STATUS SDIO_read_CCCR(void);
+SDC_CMD_STATUS SDIO_read_CIS(SDIO_function_id_enum function);
+SDC_CMD_STATUS SDIO_read_capacity(void);
+SDC_CMD_STATUS SDIO_abort_IO(SDIO_function_id_enum function);
+SDC_CMD_STATUS SDIO_SW_reset(void);
+SDC_CMD_STATUS SDIO_check_IO_Int(SDIO_function_id_enum function, kal_bool *pending);
+SDC_CMD_STATUS SDIO_check_IO_ready(SDIO_function_id_enum function, kal_bool *ready);
+SDC_CMD_STATUS SDIO_configure_bus(SD_BITWIDTH bus);
+SDC_CMD_STATUS SDIO_enable_E4MI(kal_bool enable);
+SDC_CMD_STATUS SDIO_read_power_control(void);
+SDC_CMD_STATUS SDIO_enable_MPS(kal_bool enable);
+kal_bool SDIO_support_MPS(void);
+kal_bool SDIO_support_SDC(void);
+kal_bool SDIO_support_SMB(void);
+kal_bool SDIO_support_SRW(void);
+kal_bool SDIO_support_SBS(void);
+kal_bool SDIO_support_S4MI(void);
+kal_bool SDIO_support_LSC(void);
+kal_bool SDIO_support_4BLS(void);
+void SDIO_HISR_Entry(void);
+kal_bool SDIO_Register_Read_poll(SDIO_function_id_enum function,
+ kal_uint32 addr,
+ kal_uint32 *data,
+ cmd53_op_enum op);
+SDC_CMD_STATUS SDIO_stop(void);
+SDC_CMD_STATUS SDIO_WaitDatRdyOrTo(void);
+/*SDIO function */
+SDC_CMD_STATUS SDIO_read_CCCR_ver(kal_uint8 *version);
+SDC_CMD_STATUS SDIO_read_SDIO_ver(kal_uint8 *version);
+SDC_CMD_STATUS SDIO_read_SD_ver(kal_uint8 *version);
+SDC_CMD_STATUS SDIO_configure_BLK_size(SDIO_function_id_enum function, kal_uint32 size);
+SDC_CMD_STATUS SDIO_get_BLK_size(SDIO_function_id_enum function, kal_uint32 *size);
+kal_uint32 SDIO_query_BLK_size(SDIO_function_id_enum function);
+SDIO_function_id_enum SDIO_query_IO_id(SDIO_interface_code_enum ap);
+SDC_CMD_STATUS SDIO_enable_IO_Int(SDIO_function_id_enum function, kal_bool enable);
+SDC_CMD_STATUS SDIO_enable_IO(SDIO_function_id_enum function, kal_bool enable);
+void SDIO_int_registration(SDIO_function_id_enum function, void (func)(void));
+/*Function for WiFi */
+/*Write Register*/
+kal_bool SDIO_Register_Write(SDIO_function_id_enum function,
+ kal_uint32 addr,
+ kal_uint32 data,
+ cmd53_op_enum op);
+kal_bool SDIO_Register_Write_isr(SDIO_function_id_enum function,
+ kal_uint32 addr,
+ kal_uint32 data,
+ cmd53_op_enum op);
+/*Write Data */
+kal_bool SDIO_Data_Write(SDIO_function_id_enum function,
+ kal_uint32 addr,
+ kal_uint8 *data,
+ cmd53_op_enum op,
+ kal_uint32 count,
+ kal_bool block);
+/*Read Register*/
+kal_bool SDIO_Register_Read(SDIO_function_id_enum function,
+ kal_uint32 addr,
+ kal_uint32 *data,
+ cmd53_op_enum op);
+kal_bool SDIO_Data_Read(SDIO_function_id_enum function,
+ kal_uint32 addr,
+ kal_uint8 *data,
+ cmd53_op_enum op,
+ kal_uint32 count,
+ kal_bool block);
+
+//guilin
+DCL_SDC_CMD_STATUS SDIO_cmd52_read(DCL_SDIO_function_id_enum function, DCL_UINT32 addr, DCL_UINT8 *rdata, DCL_UINT8 *r5resp);
+DCL_SDC_CMD_STATUS SDIO_cmd52_write(DCL_SDIO_function_id_enum function, DCL_UINT32 addr, DCL_UINT8 wdata, DCL_UINT8 *r5resp);
+DCL_SDC_CMD_STATUS SDIO_cmd52_write_read(DCL_SDIO_function_id_enum function, DCL_UINT32 addr, DCL_UINT8 wdata, DCL_UINT8 *rdata, DCL_UINT8 *r5resp);
+DCL_SDC_CMD_STATUS SDIO_cmd53_read(DCL_SDIO_function_id_enum function, DCL_UINT32 addr, DCL_UINT32 data, DCL_SDIO_cmd53_op_enum op, DCL_UINT32 count, DCL_BOOL block, DCL_UINT8 *r5resp);
+DCL_SDC_CMD_STATUS SDIO_cmd53_write(DCL_SDIO_function_id_enum function, DCL_UINT32 addr, DCL_UINT32 data, DCL_SDIO_cmd53_op_enum op, DCL_UINT32 count, DCL_BOOL block, DCL_UINT8 *r5resp);
+DCL_SDC_CMD_STATUS SDIO_mcudma_read(DCL_UINT32 *rdata);
+DCL_SDC_CMD_STATUS SDIO_mcudma_write(DCL_UINT32 wdata);
+DCL_SDC_CMD_STATUS SDIO_clkpadred_read(DCL_UINT32 *rdata);
+DCL_SDC_CMD_STATUS SDIO_clkpadred_write(DCL_UINT32 wdata);
+DCL_SDC_CMD_STATUS SDIO_forcemcu_read(DCL_UINT32 *rdata);
+DCL_SDC_CMD_STATUS SDIO_forcemcu_write(DCL_UINT32 wdata);
+DCL_SDC_CMD_STATUS SDIO_getclk(DCL_UINT32 *rdata);
+DCL_SDC_CMD_STATUS SDIO_setclk(DCL_UINT32 wdata);
+
+void SDIO_dispatch_IO(SDIO_function_id_enum function);
+void SDIO_resume_IO(SDIO_function_id_enum function);
+
+
+
+
+#ifdef __SDIO_SRW_SRW__
+SDC_CMD_STATUS SDIO_suspend_IO(SDIO_bus_status_enum *bus_status);
+SDC_CMD_STATUS SDIO_select_IO(SDIO_function_id_enum function, kal_bool *resume_data);
+SDC_CMD_STATUS SDIO_check_IO_exec(SDIO_function_id_enum function, kal_bool *execution);
+SDC_CMD_STATUS SDIO_check_IO_ready_flag(SDIO_function_id_enum function, kal_bool *ready);
+#endif
+
+/*extern varibale*/
+extern sdio_dcb_struct gSDIO;
+#endif // end of SD_DEF_H
diff --git a/mcu/interface/driver/hwdrv/spi_sw.h b/mcu/interface/driver/hwdrv/spi_sw.h
new file mode 100644
index 0000000..f45976a
--- /dev/null
+++ b/mcu/interface/driver/hwdrv/spi_sw.h
@@ -0,0 +1,79 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * spi_sw.h
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This file is intends for SPI driver.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+