[Feature][Modem]Update MTK MODEM V1.6 baseline version: MOLY.NR15.R3.MD700.IVT.MP1MR3.MP.V1.6

MTK modem version: MT2735_IVT_MOLY.NR15.R3.MD700.IVT.MP1MR3.MP.V1.6.tar.gz
RF  modem version: NA

Change-Id: I45a4c2752fa9d1a618beacd5d40737fb39ab64fb
diff --git a/mcu/interface/l1/cl1/common/cl1fhrtbadefs.h b/mcu/interface/l1/cl1/common/cl1fhrtbadefs.h
new file mode 100644
index 0000000..9cea605
--- /dev/null
+++ b/mcu/interface/l1/cl1/common/cl1fhrtbadefs.h
@@ -0,0 +1,724 @@
+/*****************************************************************************
+*  Copyright Statement:
+*  --------------------
+*  This software is protected by Copyright and the information contained
+*  herein is confidential. The software may not be copied and the information
+*  contained herein may not be used or disclosed except with the written
+*  permission of MediaTek Inc. (C) 2016
+*
+*  BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+*  THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+*  RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+*  AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+*  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+*  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+*  NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+*  SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+*  SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+*  THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+*  NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+*  SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+*  BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+*  LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+*  AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+*  OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+*  MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+*  THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+*  WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+*  LAWS PRINCIPLES.  ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+*  RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+*  THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+#ifndef  _CL1FHRTBADEFS_H_
+#define  _CL1FHRTBADEFS_H_
+
+#ifdef MTK_DEV_93M_PREIT
+
+
+#include "kal_public_defs.h"
+#include "systyp.h"
+
+/*****************************************************************************
+
+  FILE NAME: cl1fhrtbadefs.h
+
+  DESCRIPTION:
+
+     This file contains the data type definition of RTBA module in 93m
+
+*****************************************************************************/
+
+/*----------------------------------------------------------------------------
+* Definitions
+*----------------------------------------------------------------------------*/
+#if 0 
+/* under construction !*/
+#else
+#define C2K_SRLTE_RTBA_ON      C2K_SRLTE_ON
+#endif
+
+#ifndef MTK_PLT_ON_PC
+//#define MTK_DEV_93M_RTBA_BYPASS_ENABLE  
+#endif
+
+#define MTK_DEV_93M_RTBA_RBS_ENABLE
+#define MTK_DEV_93M_RTBA_HPS_TRIG_ENABLE
+#define MTK_DEV_93M_RTBA_RBS_SCENARIO_CONTROL_ENABLE
+
+#define PNULL (void*)(0)
+
+#define DUMMY_FRC_INPUT         (0xFFFFFFFF)
+#define DUMMY_FRAME_NUM_INPUT   (0xFFFFFFFF)
+#define FRAME_NUM_WRAP          (0xFFFFFFFF)
+#define MAX_FRAME_NUM           (0x100000000L)
+#define INVALID_GAP_END_FRC     (DUMMY_FRC_INPUT)
+#define INVALID_SLT_PCH_CONFIG  (0x0)
+
+
+
+#define FRC_ADD(a, b)          ((a + b)& C2K_FRC_WRAP)
+#define FRC_MINUS(late,early)  (((late) + MAX_FRC_CNT - (early))& C2K_FRC_WRAP)
+#define FRAME_ADD(a, b)          ((a + b)& FRAME_NUM_WRAP)
+#define FRAME_MINUS(late,early)  (((late) + MAX_FRAME_NUM - (early))& FRAME_NUM_WRAP)
+
+
+/** Define for the Starvation timer. */
+#define RTBA_XL1_ICS_SYNC_STARVATION_TIMER         (450)    /** The XL1 sync channel starvation timer length in ms unit. */
+#define RTBA_XL1_NSLT_PCH_OVHD_STARVATION_TIMER    (100)    /** The XL1 nslt pch channel starvation timer length in ms unit. */
+#define RTBA_STARVATION_TIMER_FACTOR               (10)                   
+#define RTBA_XL1_SLT_PCH_LOST_DET_STARVATION_TIMER (1000)   /** The XL1 slt pch lost detect channel starvation timer length in ms unit. */
+#define RTBA_XL1_CONN_PS_RX_STARVATION_TIMER       (3000)   /** The XL1 connect ps channel starvation timer length in ms unit. */
+
+#define RTBA_EVL1_ICS_SYNC_STARVATION_TIMER        (180)   /** The EvL1 sync channel starvation timer length in ms unit. */
+#define RTBA_EVL1_STDBY_LTE_IDLE_SYNC_STARVATION_TIMER        (500)   /** The EvStandby sync channel starvation timer length in ms unit. */
+#define RTBA_EVL1_CONN_RX_STARVATION_TIMER         (2000)   /** The EvL1 connect channel starvation timer length in ms unit. */
+
+#define RTBA_CMD_FIFO_NUM    (8)
+#define RTBA_TOTAL_BLOCK_NUM (2)
+#define RTBA_SCHE_BLOCK_INDEX (0)               /** This index stores the block which is to be scheduled.*/
+#define RTBA_ACTIVE_BLOCK_INDEX (1)             /** This index stores the block which is active/running.*/
+
+#define RTBA_SHIFT_NUM1     (1)                 
+#define RTBA_SHIFT_NUM2     (14)  
+#define RTBA_SECCHAN_SHIFT_NUM1  (31)
+
+#define Preempt_offset_Time_Min  (1)
+#define Preempt_offset_Time_Max  (3)
+#define Resume_offset_Time_Min   (2)
+#define Resume_offset_Time_Max   (4)
+
+/** set slt_pch_channel execute time, unit:20ms*/
+#define SLT_PCH_EXECUTE_FRAME_NUM (10)
+#define NSLT_PCH_LONG_BLOCK_EXECUTE_FRAME_NUM (17)
+#define NSLT_PCH_SHORT_BLOCK_EXECUTE_FRAME_NUM (1)
+
+
+/** Set the channel attribute flag.*/
+#define RTBA_PRIMARY_CHAN_BN               0x0001
+#define RTBA_SECONDARY_CHAN_BN             0x0002
+
+#define RTBA_RF_ON_MARGIN_INDEX            (0)
+#define RTBA_RF_OFF_MARGIN_INDEX           (1)
+
+#ifdef MTK_DEV_93M_RTBA_RBS_SCENARIO_CONTROL_ENABLE
+#define RBS_SCEN_EVDO_RTB_PREEMPTION       (0x00000001)
+#define RBS_SCEN_EVDO_RTB_RESUME           (0x00000002)
+#define RBS_SCEN_1xRTT_RESYNC_RTB_GRANT    (0x00000004)
+#define RBS_SCEN_1xRTT_RTB_PREEMPTION      (0x00000008)
+#define RBS_SCEN_1xRTT_RTB_RESUME          (0x000000010)
+#define RTBA_ABS_VALUE(a)          (((a) < 0) ? (-(a)) : (a))
+#endif
+/*----------------------------------------------------------------------------
+Macros Definition
+----------------------------------------------------------------------------*/
+#define RTBA_GET_SIM_INDEX(Mode)                (gRtbaSimIndexRecord[Mode])
+/** For RTBA to set/get the byPass interaction with RTB. */
+#define RTBA_BYPASS_SET(Mode, ByPass)           (gRtbaByPassMode[Mode] = ByPass)     
+#define RTBA_BYPASS_GET(Mode)                   (gRtbaByPassMode[Mode])
+/** For RTBA to enable/disable the starvation flag. */
+#define RTBA_STARVATION_TRIGGER(Mode, Enable)   (gRtbaScheInfo[Mode].PrimaryChanPara.StarvationTrigger = Enable)
+#define RTBA_STARVATION_STATUS(Mode)            (gRtbaScheInfo[Mode].PrimaryChanPara.StarvationTrigger)
+
+/** For RTBA to set/get the starvation timer active/inactive status. */
+#define RTBA_STARVATION_TIMER_STATUS_SET(Mode, Active)     (gRtbaStarvationFlag[Mode] = Active)
+#define RTBA_STRAVATION_TIMER_STATUS_GET(Mode)             (gRtbaStarvationFlag[Mode])
+
+/** For RTBA to set/get the gate mode. */
+#define RTBA_GATE_MODE_SET(Mode, ModeType)           (gRtbaGateModeStatus[Mode] = ModeType)     
+#define RTBA_GATE_MODE_GET(Mode)                     (gRtbaGateModeStatus[Mode])
+
+#define RTBA_RC_CONTROL_MARGIN_GET(Channel,MarginType)  (gRtbaRcMarginTbl[Channel][MarginType])
+
+#define RF_ON_MARGIN()                            (RtbaCl1GetRFOnMarginInfo())  
+#define RF_OFF_MARGIN()                           (RtbaCl1GetRFOffMarginInfo())
+
+/*----------------------------------------------------------------------------
+* Enums
+*----------------------------------------------------------------------------*/
+/** The Enum of the RTBA channel based on the schedule type. */
+typedef enum
+{
+    /****************** Schedule Type 0 ********************************************************/
+    RTBA_XL1_ICS_PILOT_CHAN = 0,                                                /** ICS Pilot Acq Channel. */  
+    RTBA_XL1_SINGLE_INTER_MEAS_CHAN,                                            /** Slotted Inter-Meas Channel after QPCH. */
+    RTBA_XL1_SLT_CCI_CHAN,                                                      /** Slotted CCI Channel. */
+    RTBA_XL1_SLT_QPCH1_CHAN,                                                    /** Slotted QPCH1 Channle. */
+    RTBA_XL1_SLT_QPCH2_CHAN,                                                    /** Slotted QPCH2 Channle. */
+    RTBA_XL1_ICS_RSSI_SCAN_CHAN,                                                /** ICS RSSI Scan Channel**/
+    RTBA_EVL1_ICS_PILOT_CHAN,                                                   /** ICS Pilot Acq Channel. */
+    RTBA_EVL1_STDBY_LTE_IDLE_MEAS_CHAN,                                         /** Standby Meas Channel in LTE Idle Gap. */
+    RTBA_EVL1_STDBY_LTE_CONN_MEAS_CHAN,                                         /** Standby Meas Channel in LTE Connect Gap. */
+    RTBA_EVL1_STDBY_CGI_MEAS_CHAN,                                              /** Standby CGI Meas Channel. */
+    
+    /****************** Schedule Type 1 ********************************************************/
+    RTBA_XL1_SLT_PCH_CHAN,                                                      /** 1xRTT's Slotted PCH Channle. */    
+    RTBA_EVL1_SLT_PCH_CHAN,                                                     /** EVDO's Slotted PCH Channle. */ 
+    
+    /****************** Schedule Type 2 ********************************************************/
+    RTBA_XL1_ICS_SYNC_CHAN,                                                     /** 1xRTT ICS Sync Acq Channel. */
+    RTBA_XL1_ICS_SYNC_OPTIMIZE_CHAN,                                            /** 1xRTT ICS Sync Acq Channel with optimization schedule manner. */
+    RTBA_EVL1_ICS_SYNC_CHAN,                                                    /** EVDO ICS Sync Acq Channel. */
+    RTBA_EVL1_STDBY_LTE_IDLE_SYNC_CHAN,                                         /** Standby Sync Channel in LTE Idle Gap. */
+    RTBA_EVL1_STDBY_LTE_CONN_SYNC_CHAN,                                         /** Standby Sync Channel in LTE Connect Auto Gap. */
+    RTBA_EVL1_STDBY_CGI_SYNC_CHAN,                                              /** Standby CGI Sync Channel. */
+
+    /****************** Schedule Type 3 ********************************************************/
+    RTBA_XL1_NSLT_PCH_OVHD_CHAN,                                                /** Non-Slotted PCh Channel. */
+
+    /****************** Schedule Type 4 ********************************************************/
+    RTBA_XL1_NSLT_PCH_EARLY_WAKUP_CHAN,                                         /** Non-Slotted PCh ChannelRegistered in early wakeup. */
+    RTBA_XL1_SLT_PCH_LOST_DET_CHAN,                                             /** Slotted PCH Lost Detect Channle. */
+    RTBA_XL1_CONN_PS_RX_CHAN,                                                   /** Connect PS Rx. */
+    RTBA_EVL1_NSLT_CC_OVHD_CHAN,                                                /** Non-Slotted CC Channel. */
+    RTBA_EVL1_CONN_RX_CHAN,                                                     /** Connect PS Rx. */
+    RTBA_EVL1_STDBY_CGI_CHAN,                                                   /** Standby CGI Channel. */
+    RTBA_PRIMARY_CHAN_END,
+
+    /****************** Secondary Channel ********************************************************/
+    RTBA_CL1_CHAN_SECONDARY_START,
+    RTBA_XL1_NSLT_INTER_MEAS_CHAN,                                              /** Non-Slotted Inter-Meas Channel. */
+    RTBA_XL1_AFLT_MEAS_CHAN,                                                    /** AFLT Meas Channel. */
+    RTBA_XL1_SLT_INTER_MEAS_CHAN,                                               /** Slotted Inter-Meas Channel with PCH_Lost channel. */
+    RTBA_XL1_CONN_INTER_MEAS_CHAN,                                              /** Connect Inter Meas. */
+    RTBA_XL1_CONN_AFLT_CHAN,                                                    /** Connect AFLT Meas. */
+    RTBA_EVL1_RAKE_DDL_CHAN,
+    RTBA_EVL1_INTER_MEAS_CHAN,                                                  /** Slotted Inter-Meas Channel. */
+    RTBA_EVL1_CONN_INTER_MEAS_CHAN,                                             /** Connect Inter Meas. */
+    RTBA_CL1_CHAN_SECONDARY_END,
+    RTBA_CL1_CHAN_NUM = RTBA_CL1_CHAN_SECONDARY_END
+}RtbaCl1ChannelTypeT;
+
+typedef enum
+{
+    RTBA_SCHEDULE_TYPE_0,     /** Schedule Type 0: Single Reservation wo retry; RF stop needed.*/
+    RTBA_SCHEDULE_TYPE_1,     /** Schedule Type 1: Single Reservation wo retry; Kick by cl1 or HSC; Small block schedule after.*/
+    RTBA_SCHEDULE_TYPE_2,     /** Schedule Type 2: Continue Reservation with retry; Small block schedule after.*/
+    RTBA_SCHEDULE_TYPE_3,     /** Schedule Type 3: Continue Reservation with retry; Small + long block switch.*/
+    RTBA_SCHEDULE_TYPE_4,     /** Schedule Type 4: Continue Reservation with retry; normal block continue reservation*/ 
+    RTBA_SCHEDULE_TYPE_NUM
+}RtbaChannelScheTypeT;
+
+/** The Enum of the protect reason. */
+typedef enum
+{
+    UNPROTECTION,
+    PROTECT_1XRTT_PS,
+    PROTECT_EVDO_PS
+}RtbaProtecReasonT;
+
+/** The Scheduled Indication Type Send by RTBA to CL1. */
+typedef enum
+{
+    RTBA_INVALID_IND,
+    RTBA_GRANT_IND,
+    RTBA_PREEMPT_IND,
+    RTBA_RESUME_IND,
+    RTBA_RF_STOP_IND,
+    RC_OFF_CMPLT_IND
+}RtbaIndTypeT;
+
+/** The RTBA reserve length calc reference type.*/
+typedef enum
+{
+    FIRST_BLOCK_SCHE,                   /** Indicate this block is the first block of RTBA register.*/
+    RESUME_BLOCK_SCHE,                  /** Indicate this block is the resume block of RTBA register.*/
+    ACTIVE_BLOCK_SCHE                   /** Indicate this block is the active block of RTBA register.*/
+}RtbaResLenScheTypeT;
+
+/** The scheduled indication sending time and type. */
+typedef struct
+{
+    RtbaCl1ChannelTypeT   Channel;                /** The RTBA Channel. */
+    RtbaIndTypeT          RtbaInd; 
+    SysSFrameTimeT        ScheTime;    
+}RtbaScheIndTypeT;
+
+/** The RTBA Channel Status Enum. */
+typedef enum
+{   
+    INACTIVE_STATUS,
+    REGISTER_PEND_STATUS,
+    PREEMPTED_STATUS,
+    GRANT_PEND_STATUS,
+    ACTIVE_STATUS,
+}RtbaChannelStatusT;
+
+/** RTBA Priority Index Enum.*/
+typedef enum
+{
+    RTBA_PRIO_INDEX_0,
+    RTBA_PRIO_INDEX_1,
+    RTBA_PRIO_INDEX_NUM
+}RtbaPriorityTypeT;
+
+typedef enum
+{
+    RTBA_GATE_MODE_ON,
+    RTBA_GATE_MODE_OFF
+}RtbaGateModeTypeT;
+
+typedef struct
+{
+	kal_uint32 GapEndTime;
+} RtbaGateModeRecordInfoT;
+
+typedef enum
+{
+    RTBA_GATE_MODE_ENABLE,
+    RTBA_GATE_MODE_DISABLE,
+    RTBA_MMO_GAP_OFFER_ENABLE,
+    RTBA_MMO_GAP_OFFER_DISABLE,
+	RTBA_MMO_GAP_OFFER_DISABLE_BY_RSVAS_SUSPEND,
+	RTBA_MMO_GAP_OFFER_DISABLE_BY_RMC_INIT_DONE
+} RtbaGateModeReasonT;
+
+/** RTBA Margin Combination for RC Control.*/
+typedef enum
+{
+    RTBA_FAKE_SCHE_MARGIN,
+    RTBA_FEC_DDL_MARGIN,
+    RTBA_CHECK_DSP_IDLE_MARGIN,
+    RC_CONTROL_MARGIN_NUM
+}RtbaRcContrilMarginT;
+
+#ifdef SYS_OPTION_TX_TAS_ENABLE
+typedef enum
+{
+   RTBA_TAS_BACK_OFF_DISABLE,
+   RTBA_TAS_BACK_OFF_ENABLE,
+   RTBA_TAS_BACK_OFF_UNKNOWN
+}RtbaTasQueryResultT;
+#endif
+
+
+/** RTBA RC Timing Structure.*/
+typedef struct
+{
+    SysSFrameTimeT          FirstEventTiming;
+    kal_bool                FakeFlag;
+    RtbaCl1ChannelTypeT     Cl1Channel;
+}RtbaRcTimingTypeT;
+
+typedef void (*RtbaCbFunc)(RtbaIndTypeT RtbaInd, RtbaRcTimingTypeT RcTiming);
+
+typedef void (*RtbaQueryRsltProcFunc)(SysAirInterfaceT Mode, kal_bool ReserveSuccess,kal_uint32 AvailableTime);
+
+typedef void (*RtbaSeFnEvtFunc) (kal_uint32 Param);
+
+/** The RTBA RC Control Reference Timing.*/
+typedef struct
+{
+    kal_uint32  RtbaRfStopRefTiming;
+    kal_uint32  RtbaPreemptRefTiming;
+    kal_uint32  RtbaResumeGrantRefTiming;
+} RtbaScheRefTimeTypeT;
+
+/** Channel's RTB block information. */
+typedef struct
+{
+    RtbaCl1ChannelTypeT     Channel;                    /** The scheduled channel type in RTBA. */
+    kal_uint32              ChannelPrio;                /** Indicate the channel priority. */
+    kal_uint32              StartTime;                  /** Indicate the start time of channel in FRC. */
+    kal_uint32              EndTime;                    /** Indicate the end time of the channel in FRC. */
+    kal_uint32              ReserveLen;                 /** Indicate the reserve length of this channel. */
+    kal_uint32              PostProcessMargin;          /** Indicate the channel post process margin.*/
+    kal_uint32              ActualReserveLen;           /** The actual reserve length of the channel. */
+}RtbaChannelBlkInfoT;
+
+
+/** The Primary Channel Specific parameters used. */
+typedef struct
+{
+    RtbaChannelStatusT      PreStatus;                                      /** Indicate the channel's previous status. */
+    RtbaChannelStatusT      Status;                                         /** Indicate the channel status. */
+    RtbaChannelBlkInfoT     PriChannelInfo[RTBA_TOTAL_BLOCK_NUM];           /** Indicate the channel information of schedule block and pending block. */
+    RtbaScheRefTimeTypeT    ScheRefTime;                                    /** The RTBA schedule reference time.*/
+    RtbaChannelScheTypeT    ScheType;                                       /** Indicate the channel schedule type.*/
+    kal_bool                LongBlk;                                        /** Indicate this is the long blk. */
+    kal_bool                StarvationTrigger;                              /** Indicate the starvation triggered. */
+    kal_bool                PriChanRegistered;                              /** Indicate the channel is registered to RTB.*/
+    RtbaCbFunc              PriCallBackFunc;                                /** The Primary channel call back function pointer.*/
+    kal_uint32              QueryFrameNum;                                  /** Indicate the query frame number.*/
+    kal_bool                ScheRangeFlag;                                  /** Indicate the RTBA needs to self-schedule the RTB block in the range of GapEndFRC.*/
+    kal_uint32              GapEndFRC;                                      /** Indicate the gap end FRC time for specific channels.*/
+    kal_bool                KickQueryByHsc;                                 /** Indicate the Kick Query is triggered by HSC, no need to call back execute.*/
+    kal_bool                ForceRtbReject;                                 /** Indicate whether to force reject the RTB query result.*/
+}RtbaPriChannelParaT;
+
+
+/** The Secondary Channel Specific parameters used. */
+typedef struct
+{
+    RtbaChannelStatusT      PreStatus;                                      /** Indicate the channel's previous status. */
+    RtbaChannelStatusT      Status;                                         /** Indicate the channel status. */
+    RtbaChannelBlkInfoT     SecChannelInfo;                                 /** Indicate the channel information of scheduled secondary block.*/    
+    RtbaCbFunc              SecCallBackFunc;                                /** The Secondary channel call back function pointer.*/
+}RtbaSecChannelParaT;
+
+/** The RTBA internal data structure for schedule including channel information. */
+typedef struct
+{
+    RtbaPriChannelParaT     PrimaryChanPara;        /** The primary channel parameters. */
+    RtbaSecChannelParaT     SecondaryChanPara;      /** The secondary channel parameters, used for inter-meas block along with PCH continues block. */    
+}RtbaScheInfoT;
+
+/** defines the RTBA API command types. */
+typedef enum 
+{
+    RTBA_CMD_NONE,
+    RTBA_CMD_REG_PRIMARY,
+    RTBA_CMD_REG_SECONDARY,
+    RTBA_CMD_CANCEL_CHANEL,
+    RTBA_CMD_PRIO_BOOST,
+    RTBA_CMD_SMALL_BLK_REG,
+    RTBA_CMD_CHANNELCHANGE,
+    RTBA_CMD_PROTECT_CFG,
+    RTBA_CMD_KICK_QUERY,
+    RTBA_CMD_CANCEL_ALL,
+    RTBA_CMD_CANCEL_QUERY,   
+    RTBA_CMD_GATE_MODE_REQ,
+    RTBA_CMD_ADJUST_CHAN_POS,
+    RTBA_CMD_CALC_PAGE_POS
+}RtbaCmdTypeT;
+
+typedef struct 
+{
+    RtbaCmdTypeT        Fifo[RTBA_CMD_FIFO_NUM];
+    kal_uint8           fifo_index;
+}RtbaCmdFifoTypeT;
+
+/** RTBA use this to record the Cl1's Primary Channel regisger information in ADS.*/
+typedef struct
+{
+    RtbaCl1ChannelTypeT     Cl1Channel;
+    kal_bool                StartTimeValid;
+    kal_uint32              StartTime;
+    kal_uint32              ReserveLen; 
+    kal_uint32              GapEndFRC;
+    kal_uint32              PostProcessMargin;
+    RtbaCbFunc              RtbaCallBackFunc;
+} RtbaPriRegisterReqAdsTypeT;
+
+/** RTBA use this to record the Cl1's Secondary Channel regisger information in ADS.*/
+typedef struct
+{
+    RtbaCl1ChannelTypeT     Cl1Channel;
+    kal_bool                StartTimeValid;
+    kal_uint32              StartTime;
+    kal_uint32              ReserveLen; 
+    RtbaCbFunc              RtbaCallBackFunc;
+} RtbaSecRegisterReqAdsTypeT;
+
+/** RTBA use this to record the Cl1's cancel information in ADS.*/
+typedef struct
+{
+    RtbaCl1ChannelTypeT     Cl1Channel;
+    kal_bool                CancelAll;
+} RtbaCancelReqAdsTypeT;
+
+/** RTBA use this to record the CL1's channel protection cfg.*/
+typedef struct
+{
+    kal_bool       ProtectionTrig;    
+} RtbaChannelProtectAdsTypeT;
+
+/** RTBA use this to record the to be changed channel protection cfg.*/
+typedef struct
+{
+   kal_bool                ChannelChangePending;
+   RtbaCl1ChannelTypeT     DestChannel; 
+} RtbaChannelChangeAdsTypeT;
+
+/** RTBA use this to record the to be changed channel priority.*/
+typedef struct
+{
+   RtbaCl1ChannelTypeT     PrioChannel; 
+} RtbaChannelPrioBoostAdsTypeT;
+
+/** RTBA use this to record the gate mode releated Ads.*/
+typedef struct
+{
+   RtbaGateModeReasonT      Reason;
+   kal_uint32               GapLen;
+} RtbaGateModeReqAdsTypeT;
+
+/** RTBA use this structure to record the channel adjust ads.*/
+typedef struct
+{
+   kal_uint32               NewStartTime;
+   kal_uint32               ReserveLen;
+} RtbaAdjustChanPosAdsTypeT;
+
+/** RTBA use this structure to record the small block register ads.*/
+typedef struct 
+{
+   kal_bool                 QueryResult;
+   kal_uint32               NextavailableTime;
+} RtbaScheSmallBlkRegTypeT;
+typedef struct 
+{
+    RtbaPriRegisterReqAdsTypeT      PriamaryRegAds;
+    RtbaSecRegisterReqAdsTypeT      SecondaryRegAds;
+    RtbaCancelReqAdsTypeT           CancelAllAds;
+    RtbaCancelReqAdsTypeT           CancelChannelAds;
+    RtbaChannelProtectAdsTypeT      ProtectAds;
+    RtbaChannelChangeAdsTypeT       ChannelChangeAds;    
+    RtbaChannelPrioBoostAdsTypeT    BoostChannelAds;   
+    RtbaGateModeReqAdsTypeT         GateModeReqAds;
+    RtbaAdjustChanPosAdsTypeT       ChannelAdjPosAds;
+    RtbaScheSmallBlkRegTypeT        SmallBlkRegAds;
+} RtbaCmdReqAdsTypeT;
+
+/** defines for RTBA Higher Timer Query Request ads send to RTB.*/
+typedef struct
+{
+    kal_int16  ChannelType;
+    kal_int32  StartTime;
+    kal_int32  CheckLen;
+    kal_int32  ChannelPrio;
+    kal_int32  PostProcessMargin;
+} RtbaHighTimerQueryInfoTypeT;
+
+typedef struct
+{
+    kal_int16  ChannelType;
+    kal_int32  StartTime;
+    kal_int32  ReserveLen;
+    kal_int32  ChannelPrio;
+} RtbaRegisrerInfoTypeT;
+
+typedef struct
+{
+    RtbaCl1ChannelTypeT Channel;
+    kal_bool            DeniedByRtb;
+    kal_bool            TimeValid;
+    kal_uint32          AvailableTime;
+} RtbaDeniedIndTypeT;
+
+typedef enum
+{
+    RTBA_SCHE_SEFN_STARTVATION,
+    RTBA_SCHE_SEFN_RF_STOP_IND,
+    RTBA_SCHE_SEFN_SYNC_RESERVE_END_IND,
+	RTBA_SCHE_SEFN_MMO_GAP_DISABLE,
+    RTBA_SEFN_SCHE_NUM
+}RtbaScheSefnTypeT;
+
+/* RTBA Gate Mode Req event structure */
+typedef struct
+{
+    SysAirInterfaceT Owner;     /* 1xRTT or EVDO */
+    RtbaGateModeReasonT Reason; /* Gate Mode Reason */
+    kal_uint32 GapLen;          /* Gap Length for MMO GAP OFFER ENABLE.*/
+}RtbaGateModeEventTypeT;
+
+typedef void (*RtbaScheSefnFunction)(kal_uint32 Parm);
+
+#define MERGE_STR(x,y)    x##y   /* ex : if x=123 and y=456, then MERGE_STR(x,y)=123456 */
+#define CL1_TIMER_TYPE(x) MERGE_STR(r,x)
+
+//MD1 and MD3 compiles independently.  Therefore, MD1 should copy the MD3's files on MD1 side.
+typedef enum
+{
+   CL1_TIMER_TYPE(CTimerInit) = -1, 
+   #include "cl1_timertype.h"
+   CL1_TIMER_TYPE(CTimerNum)
+}RtbTimerTypeT;
+
+#undef MERGE_STR
+#undef CL1_TIMER_TYPE
+
+typedef struct
+{
+    kal_uint32            ChannelBitMap;        /*mapping C2K's channel type*/
+    kal_uint16            IsPeriodic;           /*indicate the deny pattern is periodic or not*/
+    kal_uint16            PatternBitMap;        /*mapping deny pattern*/
+}RbsDenyPatternParaT;
+
+typedef struct
+{
+    kal_uint16  RbsPatternInfo[RTBA_PRIMARY_CHAN_END];        /*Record PatternBitMap bases on channel type*/
+    kal_uint32 IsPeriodicMap;                               /*mapping channel's PatternBitMap is periodic or not*/
+}RbsDenyPatternInfoTypeT;
+
+/* HSC preempt trigger action type*/
+typedef enum
+{
+    HSC_PREEMPT_HYBRID_TYPE,
+    HSC_PREEMPT_SHDR_TYPE,
+    HSC_PREEMPT_EARLY_WAKEUP_TYPE,
+    HSC_PREEMPT_TYPE_NUM
+}HscActionParaE;
+
+typedef struct
+{
+    kal_uint32            ChannelBitMap;         /* mapping C2K's channel type*/   
+    kal_bool              GrantPreemptTrig;      /* Indicate RTBA grant or preempt to trigger Hsc preempt flow*/
+    kal_uint8             TimingBitMap;          /* mapping block num and then judge whether to trigger Hsc preempt flow*/
+    kal_uint8             PreemptTimeOffset;     /* preempt timing offset after trigger*/ 
+    kal_uint8             ResumeTimeOffset;      /* resume timing offset after trigger*/
+    HscActionParaE        HscActionType;         /* indicate active type, hybrid,SHDR or early wakeup*/    
+}HscPreemptTrigParaT;
+
+typedef struct
+{ 
+    kal_bool              GrantPreemptTrig;                             /* Indicate RTBA grant or preempt to trigger Hsc preempt flow*/
+    kal_uint8             TimingBitMap[RTBA_PRIMARY_CHAN_END];          /* Record timing bit map bases on different channel type*/
+    kal_uint8             PreemptTimeOffset;                            /* preempt timing offset after trigger*/ 
+    kal_uint8             ResumeTimeOffset;                             /* resume timing offset after trigger*/
+    HscActionParaE        HscActionType;                                /* indicate active type, hybrid,SHDR or early wakeup*/    
+    kal_bool              SecChanHscTrig;                               /* indicate whether secondary channel need to trigger HSC preempt*/
+}HscPreemptTrigInfoTypeT;
+
+typedef struct
+{
+    kal_uint32            LastPagingTime;                /* Indicate Last paging receiving time*/
+    kal_uint32            Slot_cycle;                    /* Indicate 1xRTT DRX cycle*/
+    kal_bool              Calc_Page;                     /* Indicate RTBA to calculate Paging position*/
+    kal_bool              Sche_Page;                     /* Indicate RTBA to query resources without minAcceptLenght*/
+    kal_bool              Adjust_Len;                    /* Indicate RTBA to adjust Nslt_pch channel length*/
+}RtbaSltPchScheParaT;
+
+typedef struct
+{
+    kal_uint32            LastPagingTime;                /* Indicate Last paging receiving time*/
+    kal_uint32            Slot_cycle;                    /* Indicate 1xRTT DRX cycle*/
+    kal_bool              Calc_Page;                     /* Indicate RTBA to calculate Paging position*/
+}RtbaSltPchParaT;
+typedef enum
+{
+    DO_RTB_PREEMPTION_AND_1xRTT_HYBRID_RESYNC_ACCEPT,     
+    DO_RTB_PREEMPTION_AND_1xRTT_SHDR_RESYNC_ACCEPT,
+    DO_RTB_RESUME_AND_1xRTT_HYBRID_RESYNC_ACCEPT,
+    DO_RTB_RESUME_AND_1xRTT_SHDR_RESYNC_ACCEPT,
+    DO_RTB_PREEMPTION_AND_1xRTT_RTB_PREEMPT,
+    DO_RTB_RESUME_AND_1xRTT_RTB_PREEMPT,
+    DO_RTB_PREEMPTION_AND_1xRTT_RTB_RESUME,
+    DO_RTB_RESUME_AND_1xRTT_RTB_RESUME,
+    RTT_TIMING_CHANGE_SYNCTIME_CALC_TEST,
+    EVDO_TIMING_CHANGE_SYNCTIME_CALC_TEST,
+    FIRST_FRAME_TICK_POSITION_TST_1,
+    FIRST_FRAME_TICK_POSITION_TST_2,
+}RbsScenarioConfigTypeT;
+typedef struct
+{
+    RbsScenarioConfigTypeT  RbsScenCfg;
+    kal_int32               TimingOffset;
+}RbsScenConfigParaT;
+typedef enum
+{
+    /** The initial state for RBS scenario control module.*/
+    RBS_SCEN_CTRL_NULL,
+    
+    /** Indicate the RBS scenario parameter is configured but the pre-condition may not meet.*/
+    RBS_SCEN_CTRL_CONFIGED,
+
+    /** Indicate the RBS scenario pre-condition has meet, RTBA will start to re-schedule the RTB block to fulfill the RBS scenario.*/
+    RBS_SCEN_CTRL_TRIGGERED,
+
+    /** Indicate the RTB Block has been re-scheduled for scenario control.*/
+    RBS_SCEN_CTRL_RTB_RESCHED,
+
+    /** Indicate the channel has receive RTB grant.*/
+    RBS_SCEN_CTRL_SCHE_RTB_GRANT,
+
+    /** Indicate the channel has receive RTB preempt.*/
+    RBS_SCEN_CTRL_SCHE_RTB_PREEMPT,
+
+    /** Indicate the channel has receive RTB resume.*/
+    RBS_SCEN_CTRL_SCHE_RTB_RESUME,
+
+    /** Indicate the RBS scenario has achieved the scenario type configure.*/
+    RBS_SCEN_CTRL_FINISHED
+}RbsScenCtrlStateTypeT;
+
+typedef struct
+{
+    RbsScenarioConfigTypeT  RbsScenarioConfig;
+    kal_int32               TimingOffset;
+} RbsScenarioControlParaT;
+
+typedef struct
+{
+    /** The RBS scenario control parameters.*/
+    RbsScenarioControlParaT RbsScenCtrlPara;	
+    /** The Do state for RBS scenario control module.*/
+    RbsScenCtrlStateTypeT	DoRbsState;
+    /** The 1xRTT state for RBS scenario control module.*/
+    RbsScenCtrlStateTypeT	RttRbsState;
+    /** 1xRTT event reference time.*/
+    kal_uint32              RttEventRefTime;	
+    /** EVDO event reference time.*/
+    kal_uint32              EvdoEventRefTime;
+    /** 1xRTT System Event Timing.*/
+    SysSFrameTimeT          RttEventSysTime;	
+    /** EVDO System Event Timing.*/
+    SysSFrameTimeT          DoEventSysTime;
+    /** The RBS Scenario control bitmap collection.*/
+    kal_uint32              RbsScenCtrlBitmap;
+    /** The Record Target RBS scenario control bitmap.*/
+    kal_uint32              TargetRbsScenCtrlBitmap;
+    /** Indicate the event timing is adjusted by RTBA schedule.*/
+    kal_bool                SpecificEvtTimingSet;
+} RbsScenarioControlScheInfoT;
+
+typedef enum
+{
+    CTimer_None,
+    CTimer_XL1IcsPiolt,
+    CTimer_XL1IcsSync,
+    CTimer_XL1NsltPchOvhd,
+    CTimer_XL1NsltInterMeas,
+    CTimer_XL1AfltMeas,
+    CTimer_XL1SltCci,
+    CTimer_XL1SltQpch_1,
+    CTimer_XL1SltQpch_2,
+    CTimer_XL1SltPch,
+    CTimer_XL1SltPchLostDet,
+    CTimer_XL1SltnterMeas,
+    CTimer_XL1ConnectPsRx,
+    CTimer_XL1ConnectInterMeas,
+    CTimer_XL1ConnectAfltMeas,
+    CTimer_EvL1IcsPilot,
+    CTimer_EvL1IcsSync,
+    CTimer_EvL1NsltCC,
+    CTimer_EvL1SltPch,
+    CTimer_EvL1InterMeas,
+    CTimer_EvL1ConnectRx,
+    CTimer_EvL1ConnectInterMeas,
+    CTimer_EvStdbyMeas,
+    CTimer_EvStdbySync,
+    CTimer_EvStdbyCgi,
+    CTimer_End
+}RtbTimerTypeE;
+
+/*****************************************************************************
+* End of File
+*****************************************************************************/
+#endif
+#endif
+