[Feature][Modem]Update MTK MODEM V1.6 baseline version: MOLY.NR15.R3.MD700.IVT.MP1MR3.MP.V1.6
MTK modem version: MT2735_IVT_MOLY.NR15.R3.MD700.IVT.MP1MR3.MP.V1.6.tar.gz
RF modem version: NA
Change-Id: I45a4c2752fa9d1a618beacd5d40737fb39ab64fb
diff --git a/mcu/interface/l1/cl1/common/cphmdsysmdm.h b/mcu/interface/l1/cl1/common/cphmdsysmdm.h
new file mode 100644
index 0000000..f6360b1
--- /dev/null
+++ b/mcu/interface/l1/cl1/common/cphmdsysmdm.h
@@ -0,0 +1,160 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2016
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+#ifndef _CPH_MDSYS_MDM_H_
+#define _CPH_MDSYS_MDM_H_
+
+#include "kal_general_types.h"
+
+typedef volatile unsigned short* SRAMADDR; /* SRAM addr is 16 bits */
+typedef volatile unsigned short SRAMDATA; /* SRAM data is 16 bits */
+typedef volatile unsigned short* APBADDR; /* APB addr is 16 bits */
+typedef volatile unsigned short APBDATA; /* APB data is 16 bits */
+typedef volatile unsigned long* APBADDR32; /* APB addr is 32 bits */
+typedef volatile unsigned long APBDATA32; /* APB data is 32 bits */
+typedef volatile unsigned short* DPRAMADDR; /* DPRAM addr is 16 bits */
+typedef volatile signed short* DPRAMADDR_S; /* DPRAM addr is 16 bits */
+typedef volatile unsigned short DPRAMDATA; /* DPRAM data is 16 bits */
+
+
+#define MDSYS_MDM_REG_BASE (0xA0490000)
+
+#define MDSYS_MDM_end (MDSYS_MDM_REG_BASE + 0xC0 + 8*4)
+
+
+
+#define MDM_TM_ENDSIM ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x14))
+#define MDM_TM_ERRCNT ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x18))
+#define MDM_TM_DBGINFO ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x1C))
+#define MDM_TM_ENDFAIL ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x28))
+#define MDM_TM_ENDSUCC ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x2C))
+#define MDM_TM_ALLFMT32B ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x34))
+#define MDM_TM_HEXFMT32B ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x38))
+#define MDM_TM_DECFMT32B ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x3C))
+#define MDM_TM_BINFMT32B ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x40))
+#define MDM_TM_MEMDUMPSTR ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x50))
+#define MDM_TM_MEMDUMPSTOP ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x54))
+#define MDM_TM_MEMGOLDENSTR ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x58))
+#define MDM_TM_MEMGOLDENSTOP ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x5C))
+#define MDM_TM_MEMREVISESTR ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x60))
+#define MDM_TM_MEMREVISESTOP ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x64))
+#define MDM_TM_RUNTIME_USEC ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x6C))
+#define MDM_TM_STR_CLEAR ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x90))
+#define MDM_TM_STR_DISPLAY ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x94))
+#define MDM_TM_STR(n) ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x98 + (n)*4)) //n is from 0 to 7
+#define MDM_TM_DAT(n) ((APBADDR32)(MDSYS_MDM_REG_BASE + 0xC0 + (n)*4)) //n is from 0 to 7
+
+
+#define MDM_TM_ENDSIM_MDM_TM_ENDSIM_LSB (0)
+#define MDM_TM_ENDSIM_MDM_TM_ENDSIM_WIDTH (32)
+#define MDM_TM_ENDSIM_MDM_TM_ENDSIM_MASK (0xFFFFFFFF)
+
+#define MDM_TM_ERRCNT_MDM_TM_ERRCNT_LSB (0)
+#define MDM_TM_ERRCNT_MDM_TM_ERRCNT_WIDTH (32)
+#define MDM_TM_ERRCNT_MDM_TM_ERRCNT_MASK (0xFFFFFFFF)
+
+#define MDM_TM_DBGINFO_MDM_TM_DBGINFO_LSB (0)
+#define MDM_TM_DBGINFO_MDM_TM_DBGINFO_WIDTH (32)
+#define MDM_TM_DBGINFO_MDM_TM_DBGINFO_MASK (0xFFFFFFFF)
+
+#define MDM_TM_ENDFAIL_MDM_TM_ENDFAIL_LSB (0)
+#define MDM_TM_ENDFAIL_MDM_TM_ENDFAIL_WIDTH (32)
+#define MDM_TM_ENDFAIL_MDM_TM_ENDFAIL_MASK (0xFFFFFFFF)
+
+#define MDM_TM_ENDSUCC_MDM_TM_ENDSUCC_LSB (0)
+#define MDM_TM_ENDSUCC_MDM_TM_ENDSUCC_WIDTH (32)
+#define MDM_TM_ENDSUCC_MDM_TM_ENDSUCC_MASK (0xFFFFFFFF)
+
+#define MDM_TM_ALLFMT32B_MDM_TM_ALLFMT32B_LSB (0)
+#define MDM_TM_ALLFMT32B_MDM_TM_ALLFMT32B_WIDTH (32)
+#define MDM_TM_ALLFMT32B_MDM_TM_ALLFMT32B_MASK (0xFFFFFFFF)
+
+#define MDM_TM_HEXFMT32B_MDM_TM_HEXFMT32B_LSB (0)
+#define MDM_TM_HEXFMT32B_MDM_TM_HEXFMT32B_WIDTH (32)
+#define MDM_TM_HEXFMT32B_MDM_TM_HEXFMT32B_MASK (0xFFFFFFFF)
+
+#define MDM_TM_DECFMT32B_MDM_TM_DECFMT32B_LSB (0)
+#define MDM_TM_DECFMT32B_MDM_TM_DECFMT32B_WIDTH (32)
+#define MDM_TM_DECFMT32B_MDM_TM_DECFMT32B_MASK (0xFFFFFFFF)
+
+#define MDM_TM_BINFMT32B_MDM_TM_BINFMT32B_LSB (0)
+#define MDM_TM_BINFMT32B_MDM_TM_BINFMT32B_WIDTH (32)
+#define MDM_TM_BINFMT32B_MDM_TM_BINFMT32B_MASK (0xFFFFFFFF)
+
+#define MDM_TM_MEMDUMPSTR_MDM_TM_MEMDUMPSTR_LSB (0)
+#define MDM_TM_MEMDUMPSTR_MDM_TM_MEMDUMPSTR_WIDTH (32)
+#define MDM_TM_MEMDUMPSTR_MDM_TM_MEMDUMPSTR_MASK (0xFFFFFFFF)
+
+#define MDM_TM_MEMDUMPSTOP_MDM_TM_MEMDUMPSTOP_LSB (0)
+#define MDM_TM_MEMDUMPSTOP_MDM_TM_MEMDUMPSTOP_WIDTH (32)
+#define MDM_TM_MEMDUMPSTOP_MDM_TM_MEMDUMPSTOP_MASK (0xFFFFFFFF)
+
+#define MDM_TM_MEMGOLDENSTR_MDM_TM_MEMGOLDENSTR_LSB (0)
+#define MDM_TM_MEMGOLDENSTR_MDM_TM_MEMGOLDENSTR_WIDTH (32)
+#define MDM_TM_MEMGOLDENSTR_MDM_TM_MEMGOLDENSTR_MASK (0xFFFFFFFF)
+
+#define MDM_TM_MEMGOLDENSTOP_MDM_TM_MEMGOLDENSTOP_LSB (0)
+#define MDM_TM_MEMGOLDENSTOP_MDM_TM_MEMGOLDENSTOP_WIDTH (32)
+#define MDM_TM_MEMGOLDENSTOP_MDM_TM_MEMGOLDENSTOP_MASK (0xFFFFFFFF)
+
+#define MDM_TM_MEMREVISESTR_MDM_TM_MEMREVISESTR_LSB (0)
+#define MDM_TM_MEMREVISESTR_MDM_TM_MEMREVISESTR_WIDTH (32)
+#define MDM_TM_MEMREVISESTR_MDM_TM_MEMREVISESTR_MASK (0xFFFFFFFF)
+
+#define MDM_TM_MEMREVISESTOP_MDM_TM_MEMREVISESTOP_LSB (0)
+#define MDM_TM_MEMREVISESTOP_MDM_TM_MEMREVISESTOP_WIDTH (32)
+#define MDM_TM_MEMREVISESTOP_MDM_TM_MEMREVISESTOP_MASK (0xFFFFFFFF)
+
+#define MDM_TM_RUNTIME_USEC_MDM_TM_RUNTIME_USEC_LSB (0)
+#define MDM_TM_RUNTIME_USEC_MDM_TM_RUNTIME_USEC_WIDTH (32)
+#define MDM_TM_RUNTIME_USEC_MDM_TM_RUNTIME_USEC_MASK (0xFFFFFFFF)
+
+#define MDM_TM_STR_CLEAR_MDM_TM_STR_CLEAR_LSB (0)
+#define MDM_TM_STR_CLEAR_MDM_TM_STR_CLEAR_WIDTH (4)
+#define MDM_TM_STR_CLEAR_MDM_TM_STR_CLEAR_MASK (0x0000000F)
+
+#define MDM_TM_STR_DISPLAY_MDM_TM_STR_DISPLAY_LSB (0)
+#define MDM_TM_STR_DISPLAY_MDM_TM_STR_DISPLAY_WIDTH (4)
+#define MDM_TM_STR_DISPLAY_MDM_TM_STR_DISPLAY_MASK (0x0000000F)
+
+#define MDM_TM_STR_MDM_TM_STR_LSB (0)
+#define MDM_TM_STR_MDM_TM_STR_WIDTH (8)
+#define MDM_TM_STR_MDM_TM_STR_MASK (0x000000FF)
+
+#define MDM_TM_DAT_MDM_TM_DAT_LSB (0)
+#define MDM_TM_DAT_MDM_TM_DAT_WIDTH (32)
+#define MDM_TM_DAT_MDM_TM_DAT_MASK (0xFFFFFFFF)
+
+
+#endif //#ifndef _CPH_MDSYS_MDM_H_