[Feature][Modem]Update MTK MODEM V1.6 baseline version: MOLY.NR15.R3.MD700.IVT.MP1MR3.MP.V1.6
MTK modem version: MT2735_IVT_MOLY.NR15.R3.MD700.IVT.MP1MR3.MP.V1.6.tar.gz
RF modem version: NA
Change-Id: I45a4c2752fa9d1a618beacd5d40737fb39ab64fb
diff --git a/mcu/interface/layout/InputSection/SPU.ldf b/mcu/interface/layout/InputSection/SPU.ldf
new file mode 100755
index 0000000..ff52b1a
--- /dev/null
+++ b/mcu/interface/layout/InputSection/SPU.ldf
@@ -0,0 +1,174 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2018
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+[Symbol] [Obj] [Lib]
+
+//Group name is unique and must be started with 'GROUP_CFG_'
+//Alignment is optional
+******************** < GROUP_CFG_SPU_NL1_SLOT_CODE > ********************
+ALIGN:0x40
+//D fileD.obj libDLIB.a
+//E fileE.obj libELIB.a
+#if defined(MT6833)
+NL1_RFCC_Api_Get_Tx_Mimo_Cfg nr_rfcc_api.obj libnl1.a
+NL1_RFCC_UTAS_Get_Phy_By_Rx nr_rfcc_utas.obj libnl1.a
+NL1_RFCC_RFD_Get_Tx_Mimo_Cfg nr_rfcc_rfd.obj libnl1.a
+nl1_tpc_reset_runtime_param nr_tpc.obj libnl1.a
+NL1_TPC_Tti_Bdy_Utime312M_To_Utime19p5M nr_tpc.obj libnl1.a
+NL1_TX_Pathloss_Get_Rsrp_Value nr_tx_pathloss.obj libnl1.a
+NL1_TX_Pathloss_RS_Index_Update nr_tx_pathloss.obj libnl1.a
+NL1_RFCC_FR1_Api_Ant_Query_Carkit_Info nr_rfcc_api.obj libnl1.a
+NL1_RFCC_RXDFE_Get_Rx_Mimo_Cfg nr_rfcc_rxdfe.obj libnl1.a
+NL1_TX_PwrCtrl_TxChannelPwr_PostProcessing nr_tx_pwr_ctrl_mcu.obj libnl1.a
+nl1_tpc_update_p_channel_bmp nr_tpc.obj libnl1.a
+nl1_tpc_atx_param_init nr_tpc.obj libnl1.a
+NL1_TX_PwrCtrl_PUCCHTxPwr_PostProcessing nr_tx_pwr_ctrl_mcu.obj libnl1.a
+DVFS_get_global DVFS_drv.obj libdvfs_drv.a
+NL1_RFD_Api_Ant_Query_Tx_Path nr_rfd_ant.obj libnl1.a
+NL1_RFD_CA_Query_SRS_Capability_Info nr_rfd_custom_srs.obj libnl1.a
+change_mips_user_acc.constprop.6 DVFS_drv_md.obj libdvfs_drv.a
+nl1_tx_pwrctrl_set_pcmax_mcu nr_tx_pwr_ctrl_mcu.obj libnl1.a
+NL1_TPC_TX_Request_Path_Time nr_tpc.obj libnl1.a
+nl1_rfd_ca_query_search nr_rfd_customcommon.obj libnl1.a
+NL1_LPWR_TPS_Api_Collect_TPC_Info nr_lpwr_tps.obj libnl1.a
+nl1_tx_mpr_derive_contiguous_rb nr_tx_pwr_ctrl_mpr_mcu.obj libnl1.a
+NL1_TX_RFCtrl_TPC_Control nr_tx_rf_ctrl_mcu.obj libnl1.a
+nl1_tpc_update_p_sg_info nr_tpc.obj libnl1.a
+NL1_TPC_TX_Request_Path_Info nr_tpc.obj libnl1.a
+NL1_TX_PHR_NMAC_PUCCH_Tx_Or_Pusch_Retx nr_tx_nmac_phr_c.obj libnl1.a
+nl1_tx_pwrctrl_get_pathloss_mcu nr_tx_pwr_ctrl_mcu.obj libnl1.a
+memcmp lib_a-memcmp.o libc.a
+NL1_TPC_TX_Request_CC_Info nr_tpc.obj libnl1.a
+nl1_tpc_inc_idx_setgain nr_tpc.obj libnl1.a
+nl1_tpc_khz_to_atx_bw_enum nr_tpc.obj libnl1.a
+NL1_TX_PwrCtrl_Api_Read_LTE_Cell_Info nr_tx_pwr_ctrl_mcu.obj libnl1.a
+ENL1_TPC_Get_C_Tti_Info enl1_tpc.obj libmml1.a
+NL1_TX_UTAS_Ant_State_Query nr_tx_utas_mcu.obj libnl1.a
+nl1_tx_pwrctrl_inject_adj nr_tx_pwr_ctrl_mcu.obj libnl1.a
+nl1_tpc_start_rb_to_freq_cal nr_tpc.obj libnl1.a
+nl1_tpc_trig_p_time_emerg_g00_tick nr_tpc.obj libnl1.a
+NL1_TX_MNGR_Api_UL_Post nr_tx_mngr_mcu.obj libnl1.a
+ENL1_TPC_Temperature_Interpolation enl1_tpc.obj libmml1.a
+NL1_TX_PwrCtrl_Derive_AMPR nr_tx_pwr_ctrl_mpr_mcu.obj libnl1.a
+NL1_RFCC_PHYS_Get_Ucnt_By_Scnt nr_rfcc_phys.obj libnl1.a
+NL1_DVFS_Tx_Shaolin_REQ_Set_On nr_lpwr_dvfs.obj libnl1.a
+NL1_RFD_Map_CA_To_Idx nr_rfd_customcommon.obj libnl1.a
+DVFS_md_MIPS_setNRTX DVFS_drv_md.obj libdvfs_drv.a
+DVFS_acc_val_set DVFS_drv.obj libdvfs_drv.a
+NL1_TX_PwrCtrl_Derive_MPR nr_tx_pwr_ctrl_mpr_mcu.obj libnl1.a
+NL1_TX_Api_Get_Sim_Index nr_tx_database_mcu.obj libnl1.a
+NL1_TX_RFCtrl_Get_ENDC_Total nr_tx_rf_ctrl_mcu.obj libnl1.a
+MMRFD_CMR_Query_Carkit_Usage_Info_By_FeLayoutGroup mml1_rf_ant.obj libmml1_rf.a
+NL1_LPWR_TPS_Api_Collect_Tx_Info nr_lpwr_tps.obj libnl1.a
+NL1_TX_LPWR_DVFS_TPC_Rpt_G1_Start_Entry nr_tx_lpwr_mcu.obj libnl1.a
+nl1_tx_pathloss_get_trx_rsrp nr_tx_pathloss.obj libnl1.a
+ENL1_TPC_Get_Temper_Comp_Info_Path enl1_tpc.obj libmml1.a
+NL1_TX_Lisr_Post_Tpc_Irq nr_tx_mngr_mcu.obj libnl1.a
+MMRF_Query_Adie_Ucnt_InitTxOfs mml1_rf_ucnt.obj libmml1_rf.a
+NL1_FWK_LISR_DCI_UL_Post_Group1_G nr_fwk_lisr_entry.obj libnl1.a
+NL1_TX_PwrCtrl_HW_Post_Combined_Config_MCU nr_tx_pwr_ctrl_mcu.obj libnl1.a
+NL1_TX_PwrCtrl_PUSCHTxPwr_PostProcessing nr_tx_pwr_ctrl_mcu.obj libnl1.a
+NL1_TX_PwrCtrl_SRSTxPwr_PostProcessing nr_tx_pwr_ctrl_mcu.obj libnl1.a
+NL1_TX_RFCtrl_TPC_Reconfig nr_tx_rf_ctrl_mcu.obj libnl1.a
+nl1_tx_pwrctrl_prepare_ulca_info nr_tx_pwr_ctrl_mcu.obj libnl1.a
+NL1_TX_RF_Tool_dB_To_Linear nr_tx_rf_ctrl_mcu.obj libnl1.a
+NL1_TX_RF_Tool_Linear_To_dB nr_tx_rf_ctrl_mcu.obj libnl1.a
+NL1_TX_RFCtrl_ANT_Config nr_tx_rf_ctrl_mcu.obj libnl1.a
+NL1_TX_DFE_RF_CCSW_SRS_Config nr_tx_rf_ctrl_mcu.obj libnl1.a
+nl1_tx_pwrctrl_qsort_compare_channel_info nr_tx_pwr_ctrl_mcu.obj libnl1.a
+NL1_TX_RFCtrl_TPC_Judge_Emergency_Mode nr_tx_rf_ctrl_mcu.obj libnl1.a
+NL1_TX_PwrCtrl_Set_Prach_Tx_Power_MCU nr_tx_pwr_ctrl_mcu.obj libnl1.a
+NL1_TX_LPWR_DVFS_Post_TPC_G1_End_Entry nr_tx_lpwr_mcu.obj libnl1.a
+nl1_tx_lpwr_shaolin_dvfs_on_check_post_comb nr_tx_lpwr_mcu.obj libnl1.a
+nl1_tx_lpwr_shaolin_dvfs_off_check nr_tx_lpwr_mcu.obj libnl1.a
+NL1_DVFS_Tx_Shaolin_REQ_Set_Off nr_lpwr_dvfs.obj libnl1.a
+NL1_TX_PWR_CTRL_Api_Csif_Ul_Post_Combine_Rpt_Handler nr_tx_mngr_mcu.obj libnl1.a
+nl1_tx_mngr_ul_post_dep_irq_tpc nr_tx_mngr_mcu.obj libnl1.a
+nl1_tx_mngr_post_tpc_entry nr_tx_mngr_mcu.obj libnl1.a
+ENL1_TPC_Get_P_Ch enl1_tpc.obj libmml1.a
+NL1_TPC_Get_CC_TTI_INFO_Buffer nr_tpc.obj libnl1.a
+nl1_tpc_get_en_mrx nr_tpc.obj libnl1.a
+#else
+drv_spu_EventGen_Fetch_Code drv_spu.obj libsys_drv.a
+#endif
+******************** < GROUP_CFG_SPU_NL2_SLOT_CODE > ********************
+ALIGN:0x40
+
+******************** < GROUP_CFG_SPU_NL1_SLOT_RODATA > ********************
+ALIGN:0x40
+#if defined(MT6833)
+NL1_TX_PwrCtrl_TxChannelPwr_PostProcessing nr_tx_pwr_ctrl_mcu.obj libnl1.a
+nl1_tx_log2lin_pow_tab_slope_tab nr_tx_rf_ctrl_mcu.obj libnl1.a
+#endif
+******************** < GROUP_CFG_SPU_NL2_SLOT_RODATA > ********************
+ALIGN:0x40
+
+******************** < GROUP_CFG_SPU_NL1_SLOT_DATA > ********************
+ALIGN:0x40
+#if defined(MT6833)
+temp_degree_Celsius nr_tpc.obj libnl1.a
+NL1_TX_1_Trace_Filter nl1_trace_tx_1_utmd.obj libnl1_pub.a
+s_dvfs_md_acc_weight_map DVFS_drv_md.obj libdvfs_drv.a
+NL1_TC_Trace_Filter nl1_trace_tc_utmd.obj libnl1_pub.a
+#endif
+******************** < GROUP_CFG_SPU_NL2_SLOT_DATA > ********************
+ALIGN:0x40
+
+******************** < GROUP_CFG_SPU_NL1_SLOT_DATA_ZI > ********************
+ALIGN:0x40
+#if defined(MT6833)
+g_nl1_tx_offset_pwr_nr_fr1 nr_tx_nvram_read.obj libnl1.a
+read_temper_timestamp nr_tpc.obj libnl1.a
+p_lp_db nr_lpwr_tps.obj libnl1.a
+nl1_tx_pbch_pathloss_mcu nr_tx_pathloss.obj libnl1.a
+p_thiz nr_rfcc_utas.obj libnl1.a
+g_nl1_tx_pcmax_offset_cfg nr_tx_pwr_ctrl_mcu.obj libnl1.a
+NL1_TPC_CP_TYPE mml1_tpc.obj libmml1.a
+s_dvfs_md_acc_t DVFS_drv_md.obj libdvfs_drv.a
+nl1_emac_phr_trigger_ind_t nr_tx_nmac_phr_c.obj libnl1.a
+nl1_tpc_idx_setgain_cnt nr_tpc.obj libnl1.a
+nl1_dvfs_tx_shaolin_scs nr_lpwr_dvfs.obj libnl1.a
+slot_p_ctrl enl1_tpc.obj libmml1.a
+nr_power_offset nr_tpc.obj libnl1.a
+mml1_etdpd_tpc_info mml1_etdpd_common.obj libmml1_rf.a
+NL1D_ET_DBG nr_et_database.obj libnl1.a
+s_dvfs_md DVFS_drv_md.obj libdvfs_drv.a
+nr_p_mode nr_tpc.obj libnl1.a
+nl1_hrt_extra_settle_ nr_hrt_check.obj libnl1.a
+nl1_tx_mngr_ul_post_tpc_rpt_free_queue_rb nr_tx_mngr_mcu.obj libnl1.a
+NL1_TPC_TTI_BDY mml1_tpc.obj libmml1.a
+#endif
+******************** < GROUP_CFG_SPU_NL2_SLOT_DATA_ZI > ********************
+ALIGN:0x40