[Feature][Modem]Update MTK MODEM V1.6 baseline version: MOLY.NR15.R3.MD700.IVT.MP1MR3.MP.V1.6
MTK modem version: MT2735_IVT_MOLY.NR15.R3.MD700.IVT.MP1MR3.MP.V1.6.tar.gz
RF modem version: NA
Change-Id: I45a4c2752fa9d1a618beacd5d40737fb39ab64fb
diff --git a/mcu/interface/service/dhl/v2/L1Trc.h b/mcu/interface/service/dhl/v2/L1Trc.h
new file mode 100644
index 0000000..9664eb7
--- /dev/null
+++ b/mcu/interface/service/dhl/v2/L1Trc.h
@@ -0,0 +1,288 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/****************************************************************************
+ * Filename:
+ * ---------
+ * @file L1Trc.h
+ *
+ * Description:
+ * ------------
+ * @brief Layer 1 /Layer 2 common & public interface for all trace user,
+ * Detail trace macro implement will put in each module's own interface.
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 09 18 2019 victoria.wang
+ * [MOLY00416922] DHL Legacy Wrapper migration and phase-out
+ * [Remove][DHL] phase out legacy wrapper API
+ *
+ * 04 21 2019 yh.sung
+ * [MOLY00392990] [VMOLY][UTF] Phase 2 Landing
+ * [UTF][DHL] UTF Trace API - trace interface
+ *
+ * 12 05 2018 yu-hsiang.peng
+ * [MOLY00370324] NL1 timing information trace
+ * [VMOLY.EVB.SPET] [New Feature] Support NL1 time (SWRD part)
+ *
+ * 08 15 2018 yu-hsiang.peng
+ * [MOLY00343261] [MT6297] [Logging Service] DHL 2.0 Landing
+ * [DHL2.0] [ULSP] re-org file name & function pos.
+ *
+ ****************************************************************************/
+
+/*******************/
+/* CGen gen format */
+/*******************/
+typedef int cgen_use_L1ULSP;
+typedef int cgen_use_L1BitField;
+typedef int cgen_use_L1CondTrace;
+
+#if defined(__USE_ULSP_SW_SIMULATOR__)
+typedef int cgen_use_L1ULSP_Func_Impl;
+#endif
+
+
+#if defined (L1_CATCHER)
+#ifndef _L1TRC_H
+#define _L1TRC_H
+
+//#define __DHL_LEGACY_TRACE_API_ENABLE__
+
+/* for Cgen 92 SW logging, need Cgen help to remove, otherwise build error */
+typedef enum
+{
+ L1CSPM_DEFAULT,
+ SPIN_LOCK,
+ HW_ITC
+} E_DHL_TMD_CRIT_PROT;
+typedef enum
+{
+ L2_BUFFER_DEFAULT = 0,
+ L2_BUFFER_EL2 = L2_BUFFER_DEFAULT,
+ L2_BUFFER_HIF = 1,
+ L2_BUFFER_ERT = 2,
+ L2_BUFFER_END = 3
+} E_DHL_L2_BUFFER_MAPPING_TABLE;
+
+typedef enum
+{
+ MAX_L1_TRACE_CLASS_BYTE = 8
+} E_NUM_L1_TRACE_CLASS;
+
+/*******************/
+/* Include */
+/*******************/
+#include "kal_general_types.h"
+#include "kal_public_api.h"
+#if defined(__USE_ULSP__)
+#include "ulsp_mcu_logging.h"
+#endif//#if defined(__USE_ULSP__)
+
+
+/*******************/
+/* Definition - IRQ */
+/*******************/
+#if defined(__MTK_TARGET__)
+#if !defined(__L2_LOGGING_IRQ_LOC__)
+#define __L2_LOGGING_IRQ_LOC__
+#endif
+#endif
+
+#if defined(__L2_LOGGING_IRQ_LOC__)
+extern kal_uint32 dhl_SaveAndSetIRQMask_cirq_wrap(void);
+extern void dhl_RestoreIRQMask_cirq_wrap(kal_uint32 status);
+#define DHL_LOCK_CPU_INTERRUPT(oldmask) \
+ do{ \
+ oldmask = dhl_SaveAndSetIRQMask_cirq_wrap(); \
+ }while(0)
+
+#define DHL_UNLOCK_CPU_INTERRUPT(oldmask) \
+ do{ \
+ dhl_RestoreIRQMask_cirq_wrap(oldmask); \
+ }while(0)
+#elif defined(__MTK_TARGET__)
+
+extern kal_uint32 kal_hrt_SaveAndSetIRQMask(void);
+extern void kal_hrt_RestoreIRQMask(kal_uint32 irq);
+extern kal_uint32 dhl_SaveAndSetIRQMask_cirq_wrap(void);
+extern void dhl_RestoreIRQMask_cirq_wrap(kal_uint32 status);
+
+#define DHL_LOCK_CPU_INTERRUPT(oldmask) \
+ do{ \
+ oldmask = kal_hrt_SaveAndSetIRQMask(); \
+ }while(0)
+
+#define DHL_UNLOCK_CPU_INTERRUPT(oldmask) \
+ do{ \
+ kal_hrt_RestoreIRQMask(oldmask); \
+ }while(0)
+#else
+#define DHL_LOCK_CPU_INTERRUPT(oldmask) \
+ do{ \
+ oldmask = 0; \
+ }while(0)
+
+#define DHL_UNLOCK_CPU_INTERRUPT(oldmask) \
+ do{ \
+ oldmask = 0; \
+ }while(0)
+#endif /* __L2_LOGGING_IRQ_LOC__ */
+
+/************************/
+/* Definition -Trace Macro */
+/************************/
+
+
+#include "L1Trc_function.h"
+
+#if defined(L1_SIM)
+#include "dhl_ulsp_swsim_interface.h" // work around since xL1SIM can't get __USE_ULSP_SW_SIMULATOR__ option
+extern kal_bool l1_trc_assure_lisr(const char *func, const char *file, int line);
+
+#else
+
+#if defined(__USE_ULSP_L1L2SEQTEST__)
+#include "dhl_l1l2seqtest_hwulsp_interface.h"
+
+#elif defined(__USE_ULSP_SW_SIMULATOR__)
+#include "dhl_ulsp_swsim_interface.h"
+
+#elif defined(__USE_ULSP__)
+#include "dhl_ulsp_hw_interface.h"
+
+#endif
+
+#endif // L1_SIM
+
+#include "dhl_cond_l1_trace.h"
+
+/*******************/
+/* Definition - */
+/* code setting */
+/*******************/
+#if !defined(GEN_FOR_PC)
+
+#if defined(__MTK_TARGET__)
+#define __DHL_L2CACHE_LOCK_DATA __attribute__ ((section("L2CACHE_LOCK_RW")))
+#else
+#define __DHL_L2CACHE_LOCK_DATA
+#endif
+
+#define CONVERT_WORD_ALIGNMENT(val) (((val) + 4) / 4 * 4)
+
+typedef void (*trc_setfilterfunc)(unsigned char *);
+#define TRC_FILTER_FUNC_ARRAY trc_filterfuncarray
+#define TRC_NBR_MODULE trc_filterfuncnbr
+#define TRC_SET_FILTER_FUNC trc_setfilterfunc
+
+/*********************************************/
+/* Macro for declaring filter in codegen */
+/*********************************************/
+//force all to l2 cache in 93 to reduce mips, the conclusion after W16 PAE
+#define DECLARE_TMD_FILTER(VAR_TYPE, VAR_NAME, VAR_SIZE, P0, P1, P2, P3, P4, P5, P6, P7) \
+ VAR_TYPE VAR_NAME[VAR_SIZE] = {P0, P1, P2, P3, P4, P5, P6, P7};
+
+#define DECLARE_TMD_FILTER_L2SRAM(VAR_TYPE, VAR_NAME, VAR_SIZE, P0, P1, P2, P3, P4, P5, P6, P7) \
+ VAR_TYPE VAR_NAME[VAR_SIZE] = {P0, P1, P2, P3, P4, P5, P6, P7};
+
+#define DECLARE_TMD_FILTER_TCM(VAR_TYPE, VAR_NAME, VAR_SIZE, P0, P1, P2, P3, P4, P5, P6, P7) \
+ VAR_TYPE VAR_NAME[VAR_SIZE] = {P0, P1, P2, P3, P4, P5, P6, P7};
+
+/*********************************************/
+/* Macro for extern filter in codegen */
+/*********************************************/
+#define EXTERN_TMD_FILTER(VAR_TYPE, VAR_NAME, VAR_SIZE) \
+ extern VAR_TYPE VAR_NAME[VAR_SIZE];
+
+#define SET_TMD_FILTER(VAR_NAME, VAR_ARRAY_PTR, VAR_ARRAY_SIZE) \
+ do{ \
+ kal_uint32 i; \
+ for(i=0; i<VAR_ARRAY_SIZE; i++) VAR_NAME[i] = VAR_ARRAY_PTR[i]; \
+ }while(0)
+
+#define FILTER_COPY(DES_BUFFER, FILTER_NAME, FILTER_SIZE) \
+ do{ \
+ memcpy(DES_BUFFER, FILTER_NAME, FILTER_SIZE); \
+ }while(0);
+
+#define FILTER_CHECK(FILTER_NAME, FILTER_ARRAY_INDEX, FILTER_CLASS) ((FILTER_NAME[FILTER_ARRAY_INDEX] & FILTER_CLASS) != 0)
+
+//for Cgen bit encode
+#define TRC_L2_PAD (0xFA)
+#define TRC_BOXSTER_PAD (0xFA)
+//Use MACRO
+#define TRC_MERGE_2S_MACRO(v1, v2) ( (kal_uint32)(v1&0xFFFF) + ( ((kal_uint32)v2)<<16 ))
+#define TRC_MERGE_1S2C_MACRO(v1, v2, v3) ( (kal_uint32)(v1&0xFFFF) + ( ( (kal_uint32)(v2&0xFF) )<<16) + ( ((kal_uint32)v3)<<24) )
+#define TRC_MERGE_4C_MACRO(v1, v2, v3, v4) ( (kal_uint32)(v1&0xFF) + ( ((kal_uint32)(v2&0xFF))<<8) + ( ((kal_uint32)(v3&0xFF))<<16) + ( ((kal_uint32)v4)<<24))
+
+#define TRC_MERGE_2S(v1, v2) TRC_MERGE_2S_MACRO((v1), (v2))
+#define TRC_MERGE_1S2C(v1, v2, v3) TRC_MERGE_1S2C_MACRO((v1), (v2), (v3))
+#define TRC_MERGE_4C(v1, v2, v3, v4) TRC_MERGE_4C_MACRO((v1), (v2), (v3), (v4))
+
+#endif // #if !defined(GEN_FOR_PC)
+
+/************/
+/*Functions */
+/************/
+void trc_fillFrameNumber_multiple(kal_uint32 framenumber, kal_uint32 ebit, kal_uint32 time, kal_uint32 sim_index);
+void trc_UFillFrameNumber_multiple(kal_uint16 framenumber, kal_uint32 ebit, kal_int16 bsfn, kal_uint32 time, kal_uint32 sim_index);
+void trc_fill_4g_time(kal_uint32 phytimer, kal_uint16 sample, kal_uint32 time, kal_uint16 sfn, kal_uint8 subframe);
+void trc_fill_4g_time_2(kal_uint32 phytimer, kal_uint16 sample, kal_uint32 time, kal_uint16 sfn, kal_uint8 subframe, kal_uint32 _4g_time);
+void trc_fill_4g_time_gfrc2(kal_uint32 phytimer, kal_uint32 time, kal_uint16 sfn, kal_uint8 subframe, kal_uint32 absH, kal_uint32 absL);
+void trc_UpdateTimeStamp(kal_uint32 time);
+// Export for HIF GPT use
+void l2trc_fill_4G_time();
+void l2trc_update_4G_time(kal_uint32 celltime, kal_uint32 abstick);
+void l2trc_fill_23G_time();
+#if defined(__C2K_RAT__)
+extern void trc_fill_c2k_do_time(kal_uint8 fn_up, kal_uint32 fn_low, kal_uint8 slot, kal_uint32 echip, kal_uint32 frc);
+extern void trc_fill_c2k_1x_time(kal_uint8 fn_up, kal_uint32 fn_low, kal_uint8 slot, kal_uint32 echip, kal_uint32 frc);
+#endif // defined(__C2K_RAT__)
+void trc_fill_nl1_time(kal_uint8 nL1_idx, kal_uint32 timestamp, kal_uint32 abs_time, kal_uint16 cell_time, kal_uint32 sfbd_stime, kal_uint32 sfbd_frc, kal_uint32 frc);
+
+//if remove , will build error in el1
+void Trc_Init(void);
+void trc_handover(kal_uint32 handovertime, kal_uint32 framenumber);
+void trc_Uhandover(kal_uint32 handovertime, kal_uint32 framenumber);
+
+void trc_setfilter(kal_uint8 *setting, kal_uint32 len);
+void trc_set_l1_filter(kal_uint8 *setting, kal_uint32 len);
+void trc_set_l2_filter(kal_uint8 *setting, kal_uint32 len);
+kal_int32 trc_getfilter(kal_uint8 *buffer, kal_int32 len);
+
+#endif //_L1TRC_H
+#endif /* #if defined(L1_CATCHER) */