[Feature][Modem]Update MTK MODEM V1.6 baseline version: MOLY.NR15.R3.MD700.IVT.MP1MR3.MP.V1.6
MTK modem version: MT2735_IVT_MOLY.NR15.R3.MD700.IVT.MP1MR3.MP.V1.6.tar.gz
RF modem version: NA
Change-Id: I45a4c2752fa9d1a618beacd5d40737fb39ab64fb
diff --git a/mcu/interface/service/hif/ccci.h b/mcu/interface/service/hif/ccci.h
new file mode 100644
index 0000000..5c8048d
--- /dev/null
+++ b/mcu/interface/service/hif/ccci.h
@@ -0,0 +1,712 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2001
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * ccci.h
+ *
+ * Project:
+ * --------
+ * Maui
+ *
+ * Description:
+ * ------------
+ * Header file of CCCI.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
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+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+
+#ifndef __CCCI_H__
+#define __CCCI_H__
+#include "ccci_if.h"
+//#include "ccci_fs_if.h"
+
+#if 0
+#ifdef __CCCI_C_
+/* under construction !*/
+#else
+/* under construction !*/
+#endif
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#if defined(__MODEM_CCCI_EXIST__)
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+ #ifdef CCCI_INIT_HANDSHAKE_MODE1
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+ #endif
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#ifdef CCCI_INIT_HANDSHAKE_MODE1
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif /*__MODEM_CCCI_EXIST__ */
+#endif
+#endif /* !__CCCI_H__ */
+
+
diff --git a/mcu/interface/service/hif/ccci_ch_cfg.h b/mcu/interface/service/hif/ccci_ch_cfg.h
new file mode 100644
index 0000000..301c952
--- /dev/null
+++ b/mcu/interface/service/hif/ccci_ch_cfg.h
@@ -0,0 +1,197 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ccci_ch_cfg.h
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * Defines the CCCI channels
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 09 23 2019 actory.ou
+ * [MOLY00441639] [VMOLY] support 64kB logging channel
+ * [VMOLY][OA] correct peer_id and support 64kb logging channel
+ *
+ * 07 18 2019 actory.ou
+ * [MOLY00422579] [MDDP] DPFM porting to VMOLY
+ * [VMOLY][OA] support MDDP & rename to DPFM
+ *
+ * 04 19 2019 actory.ou
+ * [MOLY00395176] [Thin Modem 1.0][PCIe platform] PCIe Platform 1st Release on Apollo
+ * [PCIe][OA][CCCI] support pcie thin modem 1.0
+ *
+ * 08 21 2018 actory.ou
+ * [MOLY00346566] [Gen97][L1S_L1DISABLE_SAP] boot to idle sync
+ * [CCCI] boot to idle patch
+ *
+ * 08 16 2018 actory.ou
+ * [MOLY00345375] [Gen97] Landing NCCCI (Next gen CCCI)
+ * [VMOLY] add nccci ncccisrv nccci_it_ctrl
+ *
+ * 07 24 2018 actory.ou
+ * [MOLY00341790] [MT6295] UDC feature patch back
+ * add UDC feature ID and tty channel / replace ccci spinlock with HWITC
+ *
+ * 08 09 2017 chien-hui.lu
+ * [MOLY00268913] [BIP] BIP over Wifi
+ * [CCCI_TTY][CCCI] add CCCI TTY port for BIP.
+ *
+ * 05 24 2017 chien-hui.lu
+ * [MOLY00251469] [UMOLY] [Add Module] ssds
+ * [CCCI_TTY][CCCI] add TTY port for XUI.
+ *
+ * 04 27 2017 chien-hui.lu
+ * [MOLY00245508] [CCCI] file history log has unexpected charactor
+ * [CCCI] file history log has charactor encoding issue.
+ *
+ * 02 15 2017 chien-hui.lu
+ * [MOLY00220291] [CCCI][CCCI_TTY] add TTY port for 93 MD
+ * [CCCI TTY][CCCI] add tty port for 93 MD IMSM & WOA.
+ *
+ * 01 04 2017 chien-hui.lu
+ * [MOLY00220000] merge CSCD into trunk
+ * [CCCI][CCCI_TTY] add CCCI TTY port and CSCD Core related.
+ *
+ * 11 11 2016 cs.huang
+ * [MOLY00204430] [CCCI] MT6293 change
+ * [CCCI] Add CCMNI interface for multi IMS emerengy PDN
+ *
+ * 10 04 2016 cs.huang
+ * [MOLY00205087] [CCMNI] Add more NETIFs for multi IMS emergency PDN
+ * [CCCI] Add CCMNI interface for multi IMS emerengy PDN
+ *
+ * 07 05 2016 cs.huang
+ * [MOLY00187383] [DPFM] MD direct tethering porting to UMOLY
+ * [CCCI] DPFM support
+ *
+ *
+ *
+ * 01 25 2016 cs.huang
+ * [MOLY00162367] [CCISM] add CCISM
+ * [CCCI] Add CCISM related code
+ *
+ *
+ * 07 29 2015 hsin-jun.tang
+ * [MOLY00132873] [CCCI] DHL 2ed path channel for hugeland autotest tool
+ * [CCCI] DHL 2ed path channel - UMOLY
+ *
+ * 11 13 2014 cs.huang
+ * [MOLY00084393] [UMOLY][CCCI] CCCI common header arrangement
+ * Merging
+ *
+ * //UMOLY/TRUNK/UMOLY/mcu/pcore/interface/service/hif/ccci_ch_cfg.h
+ *
+ * to //UMOLY/TRUNK/UMOLY/mcu/common/interface/service/hif/ccci_ch_cfg.h
+ *
+ * 06 11 2014 ian.cheng
+ * [MOLY00069231] [TK6291] MOLY CCCI merge
+ * TK6291 CCCI migration
+ *
+ * 05 14 2014 ap.wang
+ * [MOLY00063866] [ROME] data/ackqueue IT
+ * CCMNI Fast Ack Patch and linkdown fast reload
+ *
+ * 03 28 2014 ian.cheng
+ * [MOLY00061219] [MT6582][SGLTE][CMCC FT][SZ][TC_3.1.8]DFTP(Fail [FOCUS ISSUE]
+ * [CCMNI ACK Fast Path]
+ *
+ * 12 05 2013 cs.huang
+ * [MOLY00049049] [MT6595] [CCCI] Add ICUSB feature
+ * [CCCI] Add ICUSB feature.
+ *
+ * 11 26 2013 box.wu
+ * [MOLY00047966] [MT6595] patch for CCCI over CLDMA
+ * add exception, tty, ICUSB.
+ *
+ * 05 30 2013 ap.wang
+ * [MOLY00024263] [CCCI IMS] Add CCCI IMS Data Control channel
+ * [CCCI_IMS] Add IMS_DCTRL channel
+ *
+ * 01 28 2013 ap.wang
+ * [MOLY00009488] [CCCI] CCCI_IMS ch rename
+ * [CCCI] CCCI_IMS channel rename
+ *
+ * 01 17 2013 ian.cheng
+ * [MOLY00008993] [CCCI_SRV] CCCI_IMS 1st version
+ * [CCCI] CCCI_IMS 1st verison loopback support
+ *
+ * 01 11 2013 ap.wang
+ * [MOLY00008683] [CCCI] CCCI new feature check in
+ * [CCCI] Modify CCCI channel config
+ ****************************************************************************/
+#ifndef _CCCI_CH_CFG_H
+#define _CCCI_CH_CFG_H
+
+#define CCCI_MD_AP_BASE (CCCI_PEER_ID_AP << 12)
+#define CCCI_MD_SCP_BASE (CCCI_PEER_ID_SCP << 12)
+#define CCCI_MD_EAP_BASE (CCCI_PEER_ID_EAP << 12)
+
+#define CCCI_MAX_TWO(a ,b) ((a>b)?(a):(b))
+#define CCCI_MAX_CHANNEL CCCI_MAX_TWO(CCCI_MAX_TWO(CCCI_MD_AP_MAX_CHANNEL, CCCI_MD_EAP_MAX_CHANNEL), CCCI_MD_SCP_MAX_CHANNEL)
+
+/*!
+ * @brief CCCI peer id enum for multi HIF
+ */
+typedef enum
+{
+ CCCI_PEER_ID_MIN = 0,
+ #include "ccci_config_peer_id.h"
+ CCCI_PEER_ID_MAX,
+} CCCI_PEER_ID_BASE_T;
+
+/*!
+ * @brief CCCI_CHANNEL_T CCCI logical channel enum
+ * NOTICE: Negotiations With AP Owner Before Modification
+ */
+typedef enum
+{
+ #include "ccci_config_channel_id.h"
+} CCCI_CHANNEL_T;
+
+
+#endif //#ifndef _CCCI_CH_CFG_H
diff --git a/mcu/interface/service/hif/ccci_config_channel_id.h b/mcu/interface/service/hif/ccci_config_channel_id.h
new file mode 100644
index 0000000..c0cb651
--- /dev/null
+++ b/mcu/interface/service/hif/ccci_config_channel_id.h
@@ -0,0 +1,665 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ccci_peer_id_config_soc.h
+ *
+ * Project:
+ * --------
+ * VMOLY
+ *
+ * Description:
+ * ------------
+ * Defines CCCI channel ID list for SOC
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 01 25 2021 adel.liao
+ * [MOLY00607924] [Nokia][ODU][Module Startup blocking] mipc_init spend 30s
+ *
+ * add mipc 10-14 interface.
+ *
+ * 12 14 2020 adel.liao
+ * [MOLY00605776] support MBIM_CID_DSS_CONNECT
+ *
+ * add DSS channels.
+ *
+ * 09 18 2020 li-cheng.tsai
+ * [MOLY00569647] [MP7.PRECHECKIN.DEV][Code sync] sync code from T700
+ * [R3.MP][OA][CCCI]code sync from T700
+ *
+ * 09 15 2020 li-cheng.tsai
+ * [MOLY00569647] [MP7.PRECHECKIN.DEV][Code sync] sync code from T700
+ * [MP7.PRECHECKIN.DEV][OA][CCCI]code sync from T700
+ *
+ * 08 10 2020 actory.ou
+ * [MOLY00556168] ¡iWN?¥Ø»Ý¨D-Sensor Hubªº?®æÚÌ?¡j
+ * [T700.MP][OA] add cellinfo2 channel
+ *
+ * 08 04 2020 actory.ou
+ * [MOLY00554534] [Colgin][Code sync] sync code from MT6880.MP
+ * [T700][OA][CCCI] sync from MT6880
+ *
+ * 07 09 2020 actory.ou
+ * [MOLY00544386] [Colgin][CCCI] add IDC wifi/bt channels
+ * [MT6880.MP][OA] add IDC wifi/bt channels
+ *
+ * 06 03 2020 actory.ou
+ * [MOLY00520040] [Gen97][CCCI] DIPC development - support port setting indication
+ * [NR15.R3.COLGIN.SB.SMT.DEV][OA] apply DIPC
+ *
+ * 05 19 2020 actory.ou
+ * [MOLY00525599] code sync for Colgin
+ * [NR15.R3.COLGIN.SB.SMT.DEV][OA][CCCI] code sync from 19NOV
+ *
+ * 04 14 2020 actory.ou
+ * [MOLY00510681] [Colgin] add MD meta port
+ * [19NOV][OA] add meta eap port
+ *
+ * 03 23 2020 actory.ou
+ * [MOLY00502858] [Gen97][Gen98] merge ccci channel id/runtime data id
+ * [19NOV][OA][NCCCI/NCCCIDEV] merge channel id table
+ *
+ * 02 26 2020 actory.ou
+ * [MOLY00502106] [CCCI] add mbim port
+ * [19NOV.DEV][OA] add MBIM port
+ *
+ * 01 08 2020 actory.ou
+ * [MOLY00465742] [Gen97] add L5 channels and change CCIF SHM layout
+ * [M70.19NOV][OA] fix SP build
+ *
+ * 01 07 2020 vend_mcd_cienet025
+ * [MOLY00470436] Colgin M70/M80 GPS port support
+ * Colgin M70/M80 GPS port support
+ *
+ * 12 18 2019 actory.ou
+ * [MOLY00465742] [Gen97] add L5 channels and change CCIF SHM layout
+ * [19NOV.DEV][OA] add L5 channels
+ *
+ * 04 15 2020 actory.ou
+ * [MOLY00479736] [Coverity Scanned Code Defect][MPD][CERT L1 for C]CID:296387 code defect happened in /mcu/service/hif/nccci/src/ccci_apis.c
+ * [NR15.R3][OA][CCCI] fix coverity
+ *
+ * 09 23 2019 actory.ou
+ * [MOLY00441639] [VMOLY] support 64kB logging channel
+ * [VMOLY][OA] correct peer_id and support 64kb logging channel
+ *
+ * 07 25 2019 actory.ou
+ * [MOLY00422649] [Gen97][EMAC][Patch back from Gen95] change uart/ccci name for network latency optimization
+ * [VMOLY][OA] sync channel
+ *
+ * 07 15 2019 actory.ou
+ * [MOLY00422040] [Gen97][VMOLY] add channel for CCCI IPC removal
+ * [VMOLY][OA] add channel for CCCI IPC removal
+ *
+ * 04 19 2019 actory.ou
+ * [MOLY00395176] [Thin Modem 1.0][PCIe platform] PCIe Platform 1st Release on Apollo
+ * [PCIe][OA][CCCI] support pcie thin modem 1.0
+ *
+ * 08 23 2018 actory.ou
+ * [MOLY00346566] [Gen97][L1S_L1DISABLE_SAP] boot to idle sync
+ * add UDC channel back
+ *
+ ****************************************************************************/
+ CCCI_MD_AP_MIN = CCCI_MD_AP_BASE,
+ CCCI_CONTROL_CHANNEL = CCCI_MD_AP_MIN, //=[00] 0x0000
+ CCCI_CONTROL_CHANNEL_ACK, //=[01] 0x0001
+ CCCI_SYSTEM_CHANNEL, //=[02] 0x0002
+ CCCI_SYSTEM_CHANNEL_ACK, //=[03] 0x0003
+ CCCI_PCM_CHANNEL, //=[04] 0x0004
+ CCCI_PCM_CHANNEL_ACK, //=[05] 0x0005
+ CCCI_TST_CHANNEL, //=[06] 0x0006
+ CCCI_TST_ACK_CHANNEL, //=[07] 0x0007
+ CCCI_TR_CHANNEL, //=[08] 0x0008
+ CCCI_TR_ACK_CHANNEL, //=[09] 0x0009
+ CCCI_AT_CHANNEL_TX, //=[10] 0x000a
+ CCCI_AT_ACK_CHANNEL_TX, //=[11] 0x000b
+ CCCI_AT_CHANNEL_RX, //=[12] 0x000c
+ CCCI_AT_ACK_CHANNEL_RX, //=[13] 0x000d
+ CCCI_FS_CHANNEL, //=[14] 0x000e
+ CCCI_FS_ACK_CHANNEL, //=[15] 0x000f
+ CCCI_PMIC_CHANNEL, //=[16] 0x0010
+ CCCI_PMIC_ACK_CHANNEL, //=[17] 0x0011
+ CCCI_UEM_CHANNEL, //=[18] 0x0012
+ CCCI_UEM_ACK_CHANNEL, //=[19] 0x0013
+ CCCI_CCMNI1_TX, CCCI_NCCMNI0_CHANNEL = CCCI_CCMNI1_TX, //=[20] 0x0014
+ CCCI_CCMNI1_TX_ACK, //=[21] 0x0015
+ CCCI_CCMNI1_RX, //=[22] 0x0016
+ CCCI_CCMNI1_RX_ACK, //=[23] 0x0017
+ CCCI_CCMNI2_TX, CCCI_NCCMNI1_CHANNEL = CCCI_CCMNI2_TX, //=[24] 0x0018
+ CCCI_CCMNI2_TX_ACK, //=[25] 0x0019
+ CCCI_CCMNI2_RX, //=[26] 0x001a
+ CCCI_CCMNI2_RX_ACK, //=[27] 0x001b
+ CCCI_CCMNI3_TX, CCCI_NCCMNI2_CHANNEL = CCCI_CCMNI3_TX, //=[28] 0x001c
+ CCCI_CCMNI3_TX_ACK, //=[29] 0x001d
+ CCCI_CCMNI3_RX, //=[30] 0x001e
+ CCCI_CCMNI3_RX_ACK, //=[31] 0x001f
+ CCCI_IPC_RPC_CHANNEL, //=[32] 0x0020
+ CCCI_IPC_RPC_ACK_CHANNEL, //=[33] 0x0021
+ CCCI_MSGSVC_SEND_CHANNEL, //=[34] 0x0022
+ CCCI_MSGSVC_SEND_ACK_CHANNEL, //=[35] 0x0023
+ CCCI_MSGSVC_RCV_CHANNEL, //=[36] 0x0024
+ CCCI_MSGSVC_RCV_ACK_CHANNEL, //=[37] 0x0025
+ CCCI_GPS_CHANNEL_TX, //=[38] 0x0026
+ CCCI_GPS_ACK_CHANNEL_TX, //=[39] 0x0027
+ CCCI_GPS_CHANNEL_RX, //=[40] 0x0028
+ CCCI_GPS_ACK_CHANNEL_RX, //=[41] 0x0029
+ CCCI_MD_LOG_RX, //=[42] 0x002a
+ CCCI_MD_LOG_TX, //=[43] 0x002b
+ CCCI_ARM7_RESERVED1_TX, //=[44] 0x002c
+ CCCI_ARM7_RESERVED1_RX, //=[45] 0x002d
+ CCCI_ARM7_RESERVED2_RX, //=[46] 0x002e
+ CCCI_ARM7_RESERVED2_TX, //=[47] 0x002f
+ CCCI_ARM7_RESERVED3_TX, //=[48] 0x0030
+ CCCI_ARM7_RESERVED3_RX, //=[49] 0x0031
+ CCCI_IT_CHANNEL_TX, //=[50] 0x0032
+ CCCI_IT_CHANNEL_RX, //=[51] 0x0033
+ CCCI_IMSV_UL, //=[52] 0x0034
+ CCCI_IMSV_DL, //=[53] 0x0035
+ CCCI_IMSC_UL, //=[54] 0x0036
+ CCCI_IMSC_DL, //=[55] 0x0037
+ CCCI_IMSA_UL, //=[56] 0x0038
+ CCCI_IMSA_DL, //=[57] 0x0039
+ CCCI_IMSD_UL, //=[58] 0x003a
+ CCCI_IMSD_DL, //=[59] 0x003b
+ CCCI_SIM_CHANNEL_TX, //=[60] 0x003c
+ CCCI_SIM_CHANNEL_RX, //=[61] 0x003d
+ CCCI_LB_IT_CHANNEL_TX, //=[62] 0x003e
+ CCCI_LB_IT_CHANNEL_RX, //=[63] 0x003f
+ CCCI_CCMNI1_DLACK_TX, //=[64] 0x0040 //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI2_DLACK_TX, //=[65] 0x0041 //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI3_DLACK_TX, //=[66] 0x0042 //__CCMNI_ACK_FAST_PATH__
+ CCCI_DEBUG_STATUS_CHANNEL_TX, //=[67] 0x0043
+ CCCI_DEBUG_STATUS_CHANNEL_RX, //=[68] 0x0044
+ CCCI_CCMNI4_TX, CCCI_NCCMNI3_CHANNEL = CCCI_CCMNI4_TX, //=[69] 0x0045
+ CCCI_CCMNI4_TX_ACK, //=[70] 0x0046
+ CCCI_CCMNI4_RX, //=[71] 0x0047
+ CCCI_CCMNI4_RX_ACK, //=[72] 0x0048
+ CCCI_CCMNI4_DLACK_TX, //=[73] 0x0049 //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI5_TX, CCCI_NCCMNI4_CHANNEL = CCCI_CCMNI5_TX, //=[74] 0x004a
+ CCCI_CCMNI5_TX_ACK, //=[75] 0x004b
+ CCCI_CCMNI5_RX, //=[76] 0x004c
+ CCCI_CCMNI5_RX_ACK, //=[77] 0x004d
+ CCCI_CCMNI5_DLACK_TX, //=[78] 0x004e //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI6_TX, CCCI_NCCMNI5_CHANNEL = CCCI_CCMNI6_TX, //=[79] 0x004f
+ CCCI_CCMNI6_TX_ACK, //=[80] 0x0050
+ CCCI_CCMNI6_RX, //=[81] 0x0051
+ CCCI_CCMNI6_RX_ACK, //=[82] 0x0052
+ CCCI_CCMNI6_DLACK_TX, //=[83] 0x0053 //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI7_TX, CCCI_NCCMNI6_CHANNEL = CCCI_CCMNI7_TX, //=[84] 0x0054
+ CCCI_CCMNI7_TX_ACK, //=[85] 0x0055
+ CCCI_CCMNI7_RX, //=[86] 0x0056
+ CCCI_CCMNI7_RX_ACK, //=[87] 0x0057
+ CCCI_CCMNI7_DLACK_TX, //=[88] 0x0058 //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI8_TX, CCCI_NCCMNI7_CHANNEL = CCCI_CCMNI8_TX, //=[89] 0x0059
+ CCCI_CCMNI8_TX_ACK, //=[90] 0x005a
+ CCCI_CCMNI8_RX, //=[91] 0x005b
+ CCCI_CCMNI8_RX_ACK, //=[92] 0x005c
+ CCCI_CCMNI8_DLACK_TX, //=[93] 0x005d //__CCMNI_ACK_FAST_PATH__
+ CCCI_MD_LOG2_RX, //=[94] 0x005e
+ CCCI_MD_LOG2_TX, //=[95] 0x005f
+ CCCI_CCMNI9_TX, CCCI_NCCMNI8_CHANNEL = CCCI_CCMNI9_TX, //=[96] 0x0060
+ CCCI_CCMNI9_TX_ACK, //=[97] 0x0061
+ CCCI_CCMNI9_RX, //=[98] 0x0062
+ CCCI_CCMNI9_RX_ACK, //=[99] 0x0063
+ CCCI_CCMNI9_DLACK_TX, //=[100] 0x0064 //__CCMNI_ACK_FAST_PATH__
+ CCCI_IMSEM_UL, //=[101] 0x0065
+ CCCI_IMSEM_DL, //=[102] 0x0066
+ CCCI_CCMNI10_TX, CCCI_NCCMNI9_CHANNEL = CCCI_CCMNI10_TX, //=[103] 0x0067
+ CCCI_CCMNI10_TX_ACK, //=[104] 0x0068
+ CCCI_CCMNI10_RX, //=[105] 0x0069
+ CCCI_CCMNI10_RX_ACK, //=[106] 0x006a
+ CCCI_CCMNI10_DLACK_TX, //=[107] 0x006b //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI11_TX, CCCI_NCCMNI10_CHANNEL = CCCI_CCMNI11_TX, //=[108] 0x006c
+ CCCI_CCMNI11_TX_ACK, //=[109] 0x006d
+ CCCI_CCMNI11_RX, //=[110] 0x006e
+ CCCI_CCMNI11_RX_ACK, //=[111] 0x006f
+ CCCI_CCMNI11_DLACK_TX, //=[112] 0x0070 //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI12_TX, CCCI_NCCMNI11_CHANNEL = CCCI_CCMNI12_TX, //=[113] 0x0071
+ CCCI_CCMNI12_TX_ACK, //=[114] 0x0072
+ CCCI_CCMNI12_RX, //=[115] 0x0073
+ CCCI_CCMNI12_RX_ACK, //=[116] 0x0074
+ CCCI_CCMNI12_DLACK_TX, //=[117] 0x0075 //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI13_TX, CCCI_NCCMNI12_CHANNEL = CCCI_CCMNI13_TX, //=[118] 0x0076
+ CCCI_CCMNI13_TX_ACK, //=[119] 0x0077
+ CCCI_CCMNI13_RX, //=[120] 0x0078
+ CCCI_CCMNI13_RX_ACK, //=[121] 0x0079
+ CCCI_CCMNI13_DLACK_TX, //=[122] 0x007a //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI14_TX, CCCI_NCCMNI13_CHANNEL = CCCI_CCMNI14_TX, //=[123] 0x007b
+ CCCI_CCMNI14_TX_ACK, //=[124] 0x007c
+ CCCI_CCMNI14_RX, //=[125] 0x007d
+ CCCI_CCMNI14_RX_ACK, //=[126] 0x007e
+ CCCI_CCMNI14_DLACK_TX, //=[127] 0x007f //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI15_TX, CCCI_NCCMNI14_CHANNEL = CCCI_CCMNI15_TX, //=[128] 0x0080
+ CCCI_CCMNI15_TX_ACK, //=[129] 0x0081
+ CCCI_CCMNI15_RX, //=[130] 0x0082
+ CCCI_CCMNI15_RX_ACK, //=[131] 0x0083
+ CCCI_CCMNI15_DLACK_TX, //=[132] 0x0084 //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI16_TX, CCCI_NCCMNI15_CHANNEL = CCCI_CCMNI16_TX, //=[133] 0x0085
+ CCCI_CCMNI16_TX_ACK, //=[134] 0x0086
+ CCCI_CCMNI16_RX, //=[135] 0x0087
+ CCCI_CCMNI16_RX_ACK, //=[136] 0x0088
+ CCCI_CCMNI16_DLACK_TX, //=[137] 0x0089 //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI17_TX, CCCI_NCCMNI16_CHANNEL = CCCI_CCMNI17_TX, //=[138] 0x008a
+ CCCI_CCMNI17_TX_ACK, //=[139] 0x008b
+ CCCI_CCMNI17_RX, //=[140] 0x008c
+ CCCI_CCMNI17_RX_ACK, //=[141] 0x008d
+ CCCI_CCMNI17_DLACK_TX, //=[142] 0x008e //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI18_TX, CCCI_NCCMNI17_CHANNEL = CCCI_CCMNI18_TX, //=[143] 0x008f
+ CCCI_CCMNI18_TX_ACK, //=[144] 0x0090
+ CCCI_CCMNI18_RX, //=[145] 0x0091
+ CCCI_CCMNI18_RX_ACK, //=[146] 0x0092
+ CCCI_CCMNI18_DLACK_TX, //=[147] 0x0093 //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI19_TX, CCCI_NCCMNI18_CHANNEL = CCCI_CCMNI19_TX, //=[148] 0x0094
+ CCCI_CCMNI19_TX_ACK, //=[149] 0x0095
+ CCCI_CCMNI19_RX, //=[150] 0x0096
+ CCCI_CCMNI19_RX_ACK, //=[151] 0x0097
+ CCCI_CCMNI19_DLACK_TX, //=[152] 0x0098 //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI20_TX, CCCI_NCCMNI19_CHANNEL = CCCI_CCMNI20_TX, //=[153] 0x0099
+ CCCI_CCMNI20_TX_ACK, //=[154] 0x009a
+ CCCI_CCMNI20_RX, //=[155] 0x009b
+ CCCI_CCMNI20_RX_ACK, //=[156] 0x009c
+ CCCI_CCMNI20_DLACK_TX, //=[157] 0x009d //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI21_TX, CCCI_NCCMNI20_CHANNEL = CCCI_CCMNI21_TX, //=[158] 0x009e
+ CCCI_CCMNI21_TX_ACK, //=[159] 0x009f
+ CCCI_CCMNI21_RX, //=[160] 0x00a0
+ CCCI_CCMNI21_RX_ACK, //=[161] 0x00a1
+ CCCI_CCMNI21_DLACK_TX, //=[162] 0x00a2 //__CCMNI_ACK_FAST_PATH__
+ CCCI_ATCP_TX, //=[163] 0x00a3
+ CCCI_ATCP_RX, //=[164] 0x00a4
+ CCCI_C2K_PPP_TX, //=[165] 0x00a5
+ CCCI_C2K_PPP_RX, //=[166] 0x00a6
+ CCCI_C2K_AGPS_TX, //=[167] 0x00a7
+ CCCI_C2K_AGPS_RX, //=[168] 0x00a8
+ CCCI_IMSM_CHANNEL_TX, //=[169] 0x00a9
+ CCCI_IMSM_CHANNEL_RX, //=[170] 0x00aa
+ CCCI_WOA_CHANNEL_TX, //=[171] 0x00ab
+ CCCI_WOA_CHANNEL_RX, //=[172] 0x00ac
+ CCCI_XUI_CHANNEL_TX, //=[173] 0x00ad
+ CCCI_XUI_CHANNEL_RX, //=[174] 0x00ae
+ CCCI_BIP_CHANNEL_TX, //=[175] 0x00af
+ CCCI_BIP_CHANNEL_RX, //=[176] 0x00b0
+ CCCI_UDC_CHANNEL_TX, //=[177] 0x00b1
+ CCCI_UDC_CHANNEL_RX, //=[178] 0x00b2
+ CCCI_MIPI_CHANNEL_TX, //=[179] 0x00b3
+ CCCI_MIPI_CHANNEL_RX, //=[180] 0x00b4
+ CCCI_NLOPT_CHANNEL_TX, //=[181] 0x00b5
+ CCCI_NLOPT_CHANNEL_RX, //=[182] 0x00b6
+ CCCI_NLOPP_CHANNEL_TX, //=[183] 0x00b7
+ CCCI_NLOPP_CHANNEL_RX, //=[184] 0x00b8
+ CCCI_CIQ_CHANNEL_TX, //=[185] 0x00b9
+ CCCI_CIQ_CHANNEL_RX, //=[186] 0x00ba
+ CCCI_WIFIPROXY_CHANNEL_TX, CCCI_WIFIPROXY_CHANNEL = CCCI_WIFIPROXY_CHANNEL_TX, //=[187] 0x00bb
+ CCCI_WIFIPROXY_CHANNEL_RX, //=[188] 0x00bc
+ CCCI_VTS_CHANNEL_TX, CCCI_VTS_CHANNEL = CCCI_VTS_CHANNEL_TX, //=[189] 0x00bd
+ CCCI_VTS_CHANNEL_RX, //=[190] 0x00be
+ CCCI_IKERAW_CHANNEL_TX, //=[191] 0x00bf
+ CCCI_IKERAW_CHANNEL_RX, //=[192] 0x00c0
+ CCCI_RIL_IPC0_CHANNEL_TX, //=[193] 0x00c1
+ CCCI_RIL_IPC0_CHANNEL_RX, //=[194] 0x00c2
+ CCCI_RIL_IPC1_CHANNEL_TX, //=[195] 0x00c3
+ CCCI_RIL_IPC1_CHANNEL_RX, //=[196] 0x00c4
+ CCCI_3G_VT_CHANNEL_TX, //=[197] 0x00c5
+ CCCI_3G_VT_CHANNEL_RX, //=[198] 0x00c6
+ CCCI_DUMMY199_CHANNEL, //=[199] 0x00c7
+ CCCI_0_200_CHANNEL_TX, CCCI_0_200_CHANNEL = CCCI_0_200_CHANNEL_TX, //=[200] 0x00c8
+ CCCI_0_200_CHANNEL_RX, //=[201] 0x00c9
+ CCCI_0_202_CHANNEL_TX, CCCI_0_202_CHANNEL = CCCI_0_202_CHANNEL_TX, //=[202] 0x00ca
+ CCCI_0_202_CHANNEL_RX, //=[203] 0x00cb
+ CCCI_0_204_CHANNEL_TX, CCCI_0_204_CHANNEL = CCCI_0_204_CHANNEL_TX, //=[204] 0x00cc
+ CCCI_0_204_CHANNEL_RX, //=[205] 0x00cd
+ CCCI_APPPRIO_CHANNEL_TX, CCCI_APPPRIO_CHANNEL = CCCI_APPPRIO_CHANNEL_TX,//=[206] 0x00ce
+ CCCI_APPPRIO_CHANNEL_RX,//=[207] 0x00cf
+ CCCI_AP_LOG_CTRL_TX, CCCI_AP_LOG_CTRL = CCCI_AP_LOG_CTRL_TX, //=[208] 0x00d0
+ CCCI_AP_LOG_CTRL_RX, //=[209] 0x00d1
+ CCCI_AP_LOG_DATA_TX, CCCI_AP_LOG_DATA = CCCI_AP_LOG_DATA_TX, //=[210] 0x00d2
+ CCCI_AP_LOG_DATA_RX, //=[211] 0x00d3
+ CCCI_DRAM_PROFILE_TX, CCCI_DRAM_PROFILE = CCCI_DRAM_PROFILE_TX, //=[212] 0x00d4
+ CCCI_DRAM_PROFILE_RX, //=[213] 0x00d5
+ CCCI_MIPC_AP0_CHANNEL_TX, //=[214] 0x00d6
+ CCCI_MIPC_AP0_CHANNEL_RX, //=[215] 0x00d7
+ CCCI_MIPC_AP1_CHANNEL_TX, //=[216] 0x00d8
+ CCCI_MIPC_AP1_CHANNEL_RX, //=[217] 0x00d9
+ CCCI_MIPC_AP2_CHANNEL_TX, //=[218] 0x00da
+ CCCI_MIPC_AP2_CHANNEL_RX, //=[219] 0x00db
+ CCCI_MIPC_AP3_CHANNEL_TX, //=[220] 0x00dc
+ CCCI_MIPC_AP3_CHANNEL_RX, //=[221] 0x00dd
+ CCCI_MIPC_AP4_CHANNEL_TX, //=[222] 0x00de
+ CCCI_MIPC_AP4_CHANNEL_RX, //=[223] 0x00df
+ CCCI_MIPC_AP5_CHANNEL_TX, //=[224] 0x00e0
+ CCCI_MIPC_AP5_CHANNEL_RX, //=[225] 0x00e1
+ CCCI_MIPC_AP6_CHANNEL_TX, //=[226] 0x00e2
+ CCCI_MIPC_AP6_CHANNEL_RX, //=[227] 0x00e3
+ CCCI_MIPC_AP7_CHANNEL_TX, //=[228] 0x00e4
+ CCCI_MIPC_AP7_CHANNEL_RX, //=[229] 0x00e5
+ CCCI_MIPC_AP8_CHANNEL_TX, //=[230] 0x00e6
+ CCCI_MIPC_AP8_CHANNEL_RX, //=[231] 0x00e7
+ CCCI_MIPC_AP9_CHANNEL_TX, //=[232] 0x00e8
+ CCCI_MIPC_AP9_CHANNEL_RX, //=[233] 0x00e9
+ CCCI_USB_FWD_CHANNEL_TX, CCCI_USB_FWD_CHANNEL = CCCI_USB_FWD_CHANNEL_TX, //=[234] 0x00ea
+ CCCI_USB_FWD_CHANNEL_RX, //=[235] 0x00eb
+ CCCI_EPDG_CHANNEL_TX, //=[236] 0x00ec
+ CCCI_EPDG_CHANNEL_RX, //=[237] 0x00ed
+ CCCI_EPDG2_CHANNEL_TX, //=[238] 0x00ee
+ CCCI_EPDG2_CHANNEL_RX, //=[239] 0x00ef
+ CCCI_EPDG3_CHANNEL_TX, //=[240] 0x00f0
+ CCCI_EPDG3_CHANNEL_RX, //=[241] 0x00f1
+ CCCI_EPDG4_CHANNEL_TX, //=[242] 0x00f2
+ CCCI_EPDG4_CHANNEL_RX, //=[243] 0x00f3
+ CCCI_IDC_WIFI_CHANNEL_TX, CCCI_IDC_WIFI_CHANNEL = CCCI_IDC_WIFI_CHANNEL_TX, //=[244] 0x00f4
+ CCCI_IDC_WIFI_CHANNEL_RX, //=[245] 0x00f5
+ CCCI_IDC_BT_CHANNEL_TX, CCCI_IDC_BT_CHANNEL = CCCI_IDC_BT_CHANNEL_TX, //=[246] 0x00f6
+ CCCI_IDC_BT_CHANNEL_RX, //=[247] 0x00f7
+ CCCI_MIPC_AP10_CHANNEL_TX, //=[248] 0x00f8
+ CCCI_MIPC_AP10_CHANNEL_RX, //=[249] 0x00f9
+ CCCI_MIPC_AP11_CHANNEL_TX, //=[250] 0x00fa
+ CCCI_MIPC_AP11_CHANNEL_RX, //=[251] 0x00fb
+ CCCI_MIPC_AP12_CHANNEL_TX, //=[252] 0x00fc
+ CCCI_MIPC_AP12_CHANNEL_RX, //=[253] 0x00fd
+ CCCI_MIPC_AP13_CHANNEL_TX, //=[254] 0x00fe
+ CCCI_MIPC_AP13_CHANNEL_RX, //=[255] 0x00ff
+ CCCI_MIPC_AP14_CHANNEL_TX, //=[256] 0x0100
+ CCCI_MIPC_AP14_CHANNEL_RX, //=[257] 0x0101
+
+ #if defined(__CCCI_UT__) //keep this UT port at the end of table
+ CCCI_NCCCI_TEST_CHANNEL_TX, CCCI_NCCCI_TEST_CHANNEL = CCCI_NCCCI_TEST_CHANNEL_TX,
+ CCCI_NCCCI_TEST_CHANNEL_RX,
+ CCCI_NCCCI_UT_CHANNEL_TX, CCCI_NCCCI_UT_CHANNEL = CCCI_NCCCI_UT_CHANNEL_TX,
+ CCCI_NCCCI_UT_CHANNEL_RX,
+ CCCI_UT_CHANNEL_TX,
+ CCCI_UT_CHANNEL_RX,
+ #endif
+ CCCI_MD_AP_MAX,
+ CCCI_MD_AP_MAX_CHANNEL = CCCI_MD_AP_MAX-CCCI_MD_AP_MIN,
+
+ CCCI_MD_SCP_MIN = CCCI_MD_SCP_BASE,
+ #if defined(__HIF_CCISM_SCP_SUPPORT__)
+ CCCI_CELLINFO_CHANNEL_TX = CCCI_MD_SCP_MIN,// =[00]
+ CCCI_CELLINFO_ACK_CHANNEL_TX,// =[01]
+ CCCI_CELLINFO_CHANNEL_RX,// =[02]
+ CCCI_CELLINFO_ACK_CHANNEL_RX,// =[03]
+ CCCI_MD_SCP_TX_LB_IT,// =[04] //CCISM LB IT Tx CHANNEL
+ CCCI_MD_SCP_RX_LB_IT,// =[05] //CCISM LB IT Rx CHANNEL
+ CCCI_MD_SCP_SAR_CHANNEL_TX, //=[06]
+ CCCI_MD_SCP_SAR_CHANNEL_RX, //=[07]
+ CCCI_MD_SCP_STATICSTATE_CHANNEL_TX, //=[08]
+ CCCI_MD_SCP_STATICSTATE_CHANNEL_RX, //=[09]
+ CCCI_MD_SCP_CC_STATE_CHANNEL_TX, //=[10]
+ CCCI_MD_SCP_CC_STATE_CHANNEL_RX, //=[11]
+ CCCI_MD_SCP_CELLINFO2_CHANNEL_TX,//=[12]
+ CCCI_MD_SCP_CELLINFO2_CHANNEL_RX,//=[13]
+ #endif
+ CCCI_MD_SCP_MAX,
+ CCCI_MD_SCP_MAX_CHANNEL = CCCI_MD_SCP_MAX-CCCI_MD_SCP_MIN,
+
+ CCCI_MD_EAP_MIN = CCCI_MD_EAP_BASE,
+ CCCI_CONTROL_CHANNEL_EAP = CCCI_MD_EAP_MIN, //=[00]
+ CCCI_CONTROL_CHANNEL_EAP_ACK, //=[01]
+ CCCI_SYSTEM_CHANNEL_EAP, //=[02]
+ CCCI_SYSTEM_CHANNEL_EAP_ACK, //=[03]
+ CCCI_RESERVE4_CHANNEL_EAP, //=[04]
+ CCCI_RESERVE5_CHANNEL_EAP, //=[05]
+ CCCI_TST_CHANNEL_EAP, //=[06]
+ CCCI_RESERVE7_CHANNEL_EAP, //=[07]
+ CCCI_TR_CHANNEL_EAP, //=[08]
+ CCCI_RESERVE9_CHANNEL_EAP, //=[09]
+ CCCI_AT_CHANNEL_EAP_TX, //=[10]
+ CCCI_AT_ACK_CHANNEL_EAP_TX, //=[11]
+ CCCI_AT_CHANNEL_EAP_RX, //=[12]
+ CCCI_AT_ACK_CHANNEL_EAP_RX, //=[13]
+ CCCI_FS_CHANNEL_EAP, //=[14]
+ CCCI_FS_ACK_CHANNEL_EAP, //=[15]
+ CCCI_RESERVE16_CHANNEL_EAP, //=[16]
+ CCCI_RESERVE17_CHANNEL_EAP, //=[17]
+ CCCI_RESERVE18_CHANNEL_EAP, //=[18]
+ CCCI_RESERVE19_CHANNEL_EAP, //=[19]
+ CCCI_CCMNI1_EAP_TX, //=[20]
+ CCCI_CCMNI1_EAP_TX_ACK, //=[21]
+ CCCI_CCMNI1_EAP_RX, //=[22]
+ CCCI_CCMNI1_EAP_RX_ACK, //=[23]
+ CCCI_CCMNI2_EAP_TX, //=[24]
+ CCCI_CCMNI2_EAP_TX_ACK, //=[25]
+ CCCI_CCMNI2_EAP_RX, //=[26]
+ CCCI_CCMNI2_EAP_RX_ACK, //=[27]
+ CCCI_CCMNI3_EAP_TX, //=[28]
+ CCCI_CCMNI3_EAP_TX_ACK, //=[29]
+ CCCI_CCMNI3_EAP_RX, //=[30]
+ CCCI_CCMNI3_EAP_RX_ACK, //=[31]
+ CCCI_RESERVE32_CHANNEL_EAP, //=[32]
+ CCCI_RESERVE33_CHANNEL_EAP, //=[33]
+ CCCI_RESERVE34_CHANNEL_EAP, //=[34]
+ CCCI_RESERVE35_CHANNEL_EAP, //=[35]
+ CCCI_RESERVE36_CHANNEL_EAP, //=[36]
+ CCCI_RESERVE37_CHANNEL_EAP, //=[37]
+ CCCI_RESERVE38_CHANNEL_EAP, //=[38]
+ CCCI_RESERVE39_CHANNEL_EAP, //=[39]
+ CCCI_RESERVE40_CHANNEL_EAP, //=[40]
+ CCCI_RESERVE41_CHANNEL_EAP, //=[41]
+
+ CCCI_MD_LOG_EAP_RX, //=[42]
+ CCCI_MD_LOG_EAP_TX, //=[43]
+ CCCI_RESERVE44_CHANNEL_EAP, //=[44]
+ CCCI_RESERVE45_CHANNEL_EAP, //=[45]
+ CCCI_RESERVE46_CHANNEL_EAP, //=[46]
+ CCCI_RESERVE47_CHANNEL_EAP, //=[47]
+ CCCI_RESERVE48_CHANNEL_EAP, //=[48]
+ CCCI_RESERVE49_CHANNEL_EAP, //=[49]
+ CCCI_IT_CHANNEL_EAP_TX, //=[50]
+ CCCI_IT_CHANNEL_EAP_RX, //=[51]
+ CCCI_RESERVE52_CHANNEL_EAP, //=[52]
+ CCCI_RESERVE53_CHANNEL_EAP, //=[53]
+ CCCI_RESERVE54_CHANNEL_EAP, //=[54]
+ CCCI_RESERVE55_CHANNEL_EAP, //=[55]
+ CCCI_RESERVE56_CHANNEL_EAP, //=[56]
+ CCCI_RESERVE57_CHANNEL_EAP, //=[57]
+ CCCI_RESERVE58_CHANNEL_EAP, //=[58]
+ CCCI_RESERVE59_CHANNEL_EAP, //=[59]
+ CCCI_RESERVE60_CHANNEL_EAP, //=[60]
+ CCCI_RESERVE61_CHANNEL_EAP, //=[61]
+ CCCI_LB_IT_CHANNEL_EAP_TX, //=[62]
+ CCCI_LB_IT_CHANNEL_EAP_RX, //=[63]
+ CCCI_CCMNI1_DLACK_EAP_TX, //=[64] //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI2_DLACK_EAP_TX, //=[65] //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI3_DLACK_EAP_TX, //=[66] //__CCMNI_ACK_FAST_PATH__
+ CCCI_RESERVE67_CHANNEL_EAP, //=[67]
+ CCCI_RESERVE68_CHANNEL_EAP, //=[68]
+ CCCI_CCMNI4_EAP_TX, //=[69]
+ CCCI_CCMNI4_EAP_TX_ACK, //=[70]
+ CCCI_CCMNI4_EAP_RX, //=[71]
+ CCCI_CCMNI4_EAP_RX_ACK, //=[72]
+ CCCI_CCMNI4_EAP_DLACK_TX, //=[73] //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI5_EAP_TX, //=[74]
+ CCCI_CCMNI5_EAP_TX_ACK, //=[75]
+ CCCI_CCMNI5_EAP_RX, //=[76]
+ CCCI_CCMNI5_EAP_RX_ACK, //=[77]
+ CCCI_CCMNI5_EAP_DLACK_TX, //=[78] //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI6_EAP_TX, //=[79]
+ CCCI_CCMNI6_EAP_TX_ACK, //=[80]
+ CCCI_CCMNI6_EAP_RX, //=[81]
+ CCCI_CCMNI6_EAP_RX_ACK, //=[82]
+ CCCI_CCMNI6_EAP_DLACK_TX, //=[83] //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI7_EAP_TX, //=[84]
+ CCCI_CCMNI7_EAP_TX_ACK, //=[85]
+ CCCI_CCMNI7_EAP_RX, //=[86]
+ CCCI_CCMNI7_EAP_RX_ACK, //=[87]
+ CCCI_CCMNI7_EAP_DLACK_TX, //=[88] //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI8_EAP_TX, //=[89]
+ CCCI_CCMNI8_EAP_TX_ACK, //=[90]
+ CCCI_CCMNI8_EAP_RX, //=[91]
+ CCCI_CCMNI8_EAP_RX_ACK, //=[92]
+ CCCI_CCMNI8_EAP_DLACK_TX, //=[93] //__CCMNI_ACK_FAST_PATH__
+ CCCI_RESERVE94_CHANNEL_EAP, //=[94]
+ CCCI_RESERVE95_CHANNEL_EAP, //=[95]
+ CCCI_CCMNI9_EAP_TX, //=[96]
+ CCCI_CCMNI9_EAP_TX_ACK, //=[97]
+ CCCI_CCMNI9_EAP_RX, //=[98]
+ CCCI_CCMNI9_EAP_RX_ACK, //=[99]
+ CCCI_CCMNI9_EAP_DLACK_TX, //=[100] //__CCMNI_ACK_FAST_PATH__
+ CCCI_RESERVE101_CHANNEL_EAP, //=[101]
+ CCCI_RESERVE102_CHANNEL_EAP, //=[102]
+ CCCI_CCMNI10_EAP_TX, //=[103]
+ CCCI_CCMNI10_EAP_TX_ACK, //=[104]
+ CCCI_CCMNI10_EAP_RX, //=[105]
+ CCCI_CCMNI10_EAP_RX_ACK, //=[106]
+ CCCI_CCMNI10_EAP_DLACK_TX, //=[107] //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI11_EAP_TX, //=[108]
+ CCCI_CCMNI11_EAP_TX_ACK, //=[109]
+ CCCI_CCMNI11_EAP_RX, //=[110]
+ CCCI_CCMNI11_EAP_RX_ACK, //=[111]
+ CCCI_CCMNI11_EAP_DLACK_TX, //=[112] //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI12_EAP_TX, //=[113]
+ CCCI_CCMNI12_EAP_TX_ACK, //=[114]
+ CCCI_CCMNI12_EAP_RX, //=[115]
+ CCCI_CCMNI12_EAP_RX_ACK, //=[116]
+ CCCI_CCMNI12_EAP_DLACK_TX, //=[117] //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI13_EAP_TX, //=[118]
+ CCCI_CCMNI13_EAP_TX_ACK, //=[119]
+ CCCI_CCMNI13_EAP_RX, //=[120]
+ CCCI_CCMNI13_EAP_RX_ACK, //=[121]
+ CCCI_CCMNI13_EAP_DLACK_TX, //=[122] //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI14_EAP_TX, //=[123]
+ CCCI_CCMNI14_EAP_TX_ACK, //=[124]
+ CCCI_CCMNI14_EAP_RX, //=[125]
+ CCCI_CCMNI14_EAP_RX_ACK, //=[126]
+ CCCI_CCMNI14_EAP_DLACK_TX, //=[127] //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI15_EAP_TX, //=[128]
+ CCCI_CCMNI15_EAP_TX_ACK, //=[129]
+ CCCI_CCMNI15_EAP_RX, //=[130]
+ CCCI_CCMNI15_EAP_RX_ACK, //=[131]
+ CCCI_CCMNI15_EAP_DLACK_TX, //=[132] //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI16_EAP_TX, //=[133]
+ CCCI_CCMNI16_EAP_TX_ACK, //=[134]
+ CCCI_CCMNI16_EAP_RX, //=[135]
+ CCCI_CCMNI16_EAP_RX_ACK, //=[136]
+ CCCI_CCMNI16_EAP_DLACK_TX, //=[137] //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI17_EAP_TX, //=[138]
+ CCCI_CCMNI17_EAP_TX_ACK, //=[139]
+ CCCI_CCMNI17_EAP_RX, //=[140]
+ CCCI_CCMNI17_EAP_RX_ACK, //=[141]
+ CCCI_CCMNI17_EAP_DLACK_TX, //=[142] //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI18_EAP_TX, //=[143]
+ CCCI_CCMNI18_EAP_TX_ACK, //=[144]
+ CCCI_CCMNI18_EAP_RX, //=[145]
+ CCCI_CCMNI18_EAP_RX_ACK, //=[146]
+ CCCI_CCMNI18_EAP_DLACK_TX, //=[147] //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI19_EAP_TX, //=[148]
+ CCCI_CCMNI19_EAP_TX_ACK, //=[149]
+ CCCI_CCMNI19_EAP_RX, //=[150]
+ CCCI_CCMNI19_EAP_RX_ACK, //=[151]
+ CCCI_CCMNI19_EAP_DLACK_TX, //=[152] //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI20_EAP_TX, //=[153]
+ CCCI_CCMNI20_EAP_TX_ACK, //=[154]
+ CCCI_CCMNI20_EAP_RX, //=[155]
+ CCCI_CCMNI20_EAP_RX_ACK, //=[156]
+ CCCI_CCMNI20_EAP_DLACK_TX, //=[157] //__CCMNI_ACK_FAST_PATH__
+ CCCI_CCMNI21_EAP_TX, //=[158]
+ CCCI_CCMNI21_EAP_TX_ACK, //=[159]
+ CCCI_CCMNI21_EAP_RX, //=[160]
+ CCCI_CCMNI21_EAP_RX_ACK, //=[161]
+ CCCI_CCMNI21_EAP_DLACK_TX, //=[162] //__CCMNI_ACK_FAST_PATH__
+ CCCI_RESERVE163_CHANNEL_EAP, //=[163]
+ CCCI_RESERVE164_CHANNEL_EAP, //=[164]
+ CCCI_RESERVE165_CHANNEL_EAP, //=[165]
+ CCCI_RESERVE166_CHANNEL_EAP, //=[166]
+ CCCI_RESERVE167_CHANNEL_EAP, //=[167]
+ CCCI_RESERVE168_CHANNEL_EAP, //=[168]
+ CCCI_RESERVE169_CHANNEL_EAP, //=[169]
+ CCCI_RESERVE170_CHANNEL_EAP, //=[170]
+ CCCI_RESERVE171_CHANNEL_EAP, //=[171]
+ CCCI_RESERVE172_CHANNEL_EAP, //=[172]
+ CCCI_RESERVE173_CHANNEL_EAP, //=[173]
+ CCCI_RESERVE174_CHANNEL_EAP, //=[174]
+ CCCI_RESERVE175_CHANNEL_EAP, //=[175]
+ CCCI_RESERVE176_CHANNEL_EAP, //=[176]
+ CCCI_RESERVE177_CHANNEL_EAP, //=[177]
+ CCCI_RESERVE178_CHANNEL_EAP, //=[178]
+ CCCI_RESERVE179_CHANNEL_EAP, //=[179]
+ CCCI_RESERVE180_CHANNEL_EAP, //=[180]
+ CCCI_RESERVE181_CHANNEL_EAP, //=[181]
+ CCCI_RESERVE182_CHANNEL_EAP, //=[182]
+ CCCI_RESERVE183_CHANNEL_EAP, //=[183]
+ CCCI_RESERVE184_CHANNEL_EAP, //=[184]
+ CCCI_RESERVE185_CHANNEL_EAP, //=[185]
+ CCCI_RESERVE186_CHANNEL_EAP, //=[186]
+ CCCI_RESERVE187_CHANNEL_EAP, //=[187]
+ CCCI_RESERVE188_CHANNEL_EAP, //=[188]
+ CCCI_RESERVE189_CHANNEL_EAP, //=[189]
+ CCCI_RESERVE190_CHANNEL_EAP, //=[190]
+ CCCI_RESERVE191_CHANNEL_EAP, //=[191]
+ CCCI_RESERVE192_CHANNEL_EAP, //=[192]
+ CCCI_RESERVE193_CHANNEL_EAP, //=[193]
+ CCCI_RESERVE194_CHANNEL_EAP, //=[194]
+ CCCI_RESERVE195_CHANNEL_EAP, //=[195]
+ CCCI_RESERVE196_CHANNEL_EAP, //=[196]
+ CCCI_RESERVE197_CHANNEL_EAP, //=[197]
+ CCCI_RESERVE198_CHANNEL_EAP, //=[198]
+ CCCI_RESERVE199_CHANNEL_EAP, //=[199]
+ CCCI_RESERVE200_CHANNEL_EAP, //=[200]
+ CCCI_RESERVE201_CHANNEL_EAP, //=[201]
+ CCCI_RESERVE202_CHANNEL_EAP, //=[202]
+ CCCI_RESERVE203_CHANNEL_EAP, //=[203]
+ CCCI_RESERVE204_CHANNEL_EAP, //=[204]
+ CCCI_RESERVE205_CHANNEL_EAP, //=[205]
+ CCCI_MIPC_EAP0_CHANNEL_TX, //=[206]
+ CCCI_MIPC_EAP0_CHANNEL_RX, //=[207]
+ CCCI_MBIM_EAP0_CHANNEL_TX, //=[208]
+ CCCI_MBIM_EAP0_CHANNEL_RX, //=[209]
+ CCCI_MBIM_DSS0_EAP_CHANNEL_TX, //=[210]
+ CCCI_MBIM_DSS0_EAP_CHANNEL_RX, //=[211]
+ CCCI_MBIM_DSS1_EAP_CHANNEL_TX, //=[212]
+ CCCI_MBIM_DSS1_EAP_CHANNEL_RX, //=[213]
+ CCCI_MBIM_DSS2_EAP_CHANNEL_TX, //=[214]
+ CCCI_MBIM_DSS2_EAP_CHANNEL_RX, //=[215]
+ CCCI_MBIM_DSS3_EAP_CHANNEL_TX, //=[216]
+ CCCI_MBIM_DSS3_EAP_CHANNEL_RX, //=[217]
+ CCCI_MBIM_DSS4_EAP_CHANNEL_TX, //=[218]
+ CCCI_MBIM_DSS4_EAP_CHANNEL_RX, //=[219]
+ CCCI_MBIM_DSS5_EAP_CHANNEL_TX, //=[220]
+ CCCI_MBIM_DSS5_EAP_CHANNEL_RX, //=[221]
+ CCCI_MBIM_DSS6_EAP_CHANNEL_TX, //=[222]
+ CCCI_MBIM_DSS6_EAP_CHANNEL_RX, //=[223]
+ CCCI_MBIM_DSS7_EAP_CHANNEL_TX, //=[224]
+ CCCI_MBIM_DSS7_EAP_CHANNEL_RX, //=[225]
+ CCCI_MD_EAP_MAX,
+ CCCI_MD_EAP_MAX_CHANNEL = CCCI_MD_EAP_MAX-CCCI_MD_EAP_MIN,
+
+ CCCI_FORCE_RESET_MODEM_CHANNEL = 20090215, //0x01328D67
diff --git a/mcu/interface/service/hif/ccci_config_feature_id.h b/mcu/interface/service/hif/ccci_config_feature_id.h
new file mode 100644
index 0000000..6a57aa9
--- /dev/null
+++ b/mcu/interface/service/hif/ccci_config_feature_id.h
@@ -0,0 +1,254 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ccci_config_feature_id.h
+ *
+ * Project:
+ * --------
+ * UMOLY
+ *
+ * Description:
+ * ------------
+ * Defines CCCI feature ID list
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 08 04 2021 li-cheng.tsai
+ * [MOLY00665029] [Gen97]AMMS DRDI new architecture porting
+ *
+ * [NR15.R3.MD700.MP] feature id and rpc op id code sync from NR15.R3.MP
+ *
+ * 11 11 2020 adel.liao
+ * [MOLY00587690] [MT6880][Colgin]Fix the method to get the mini dump flag and midr dump flag
+ *
+ * 09 18 2020 li-cheng.tsai
+ * [MOLY00569647] [MP7.PRECHECKIN.DEV][Code sync] sync code from T700
+ * [R3.MP][OA][CCCI]code sync from T700
+ *
+ * 09 15 2020 li-cheng.tsai
+ * [MOLY00569647] [MP7.PRECHECKIN.DEV][Code sync] sync code from T700
+ * [MP7.PRECHECKIN.DEV][OA][CCCI]code sync from T700
+ *
+ * 08 04 2020 actory.ou
+ * [MOLY00554534] [Colgin][Code sync] sync code from MT6880.MP
+ * [T700][OA][CCCI] sync from MT6880
+ *
+ * 07 07 2020 actory.ou
+ * [MOLY00543186] [Colgin] code sync to NR15.R3.MT6880.MP
+ * [R3.MT6880.MP][OA][CCCI] sync from COLGIN.SB.SMT.DEV
+ *
+ * 06 05 2020 actory.ou
+ * [MOLY00532117] [CCCI] support async HS on data card
+ * [COLGIN.SB.DEV][OA] enable async hs
+ *
+ * 05 19 2020 actory.ou
+ * [MOLY00525599] code sync for Colgin
+ * [NR15.R3.COLGIN.SB.SMT.DEV][OA][CCCI] code sync from 19NOV
+ *
+ * 05 08 2020 actory.ou
+ * [MOLY00521380] [CCCI] add MIDR feature ID for DHL
+ * [DIPC.DEV][OA] fix typo
+ *
+ * 05 07 2020 actory.ou
+ * [MOLY00521380] [CCCI] add MIDR feature ID for DHL
+ * [19NOV][OA] add MIDR runtime data
+ *
+ * 04 23 2020 actory.ou
+ * [MOLY00516794] [CCCI] fix CPE build
+ * [19NOV][OA] fix CPE build
+ *
+ * 03 23 2020 actory.ou
+ * [MOLY00502858] [Gen97][Gen98] merge ccci channel id/runtime data id
+ * [19NOV][OA][NCCCI/NCCCIDEV] merge channel id table
+ *
+ * 08 01 2019 actory.ou
+ * [MOLY00425364] add NVRAM static cache feature
+ * [VMOLY][OA] add nvram cache shm feature id
+ *
+ * 07 18 2019 actory.ou
+ * [MOLY00422579] [MDDP] DPFM porting to VMOLY
+ * [VMOLY][OA] support MDDP & rename to DPFM
+ *
+ * 07 15 2019 actory.ou
+ * [MOLY00422067] [Gen97][VMOLY][CCCI] add wifi proxy feature id for submarine
+ * [VMOLY][OA] add submarine setting
+ *
+ * 06 26 2019 actory.ou
+ * [MOLY00416725] [Gen97][PCIe] support channel exception flow over PCIe
+ * [VMOLY][OA] support exception flow at PCIe platform
+ *
+ * 04 19 2019 actory.ou
+ * [MOLY00395176] [Thin Modem 1.0][PCIe platform] PCIe Platform 1st Release on Apollo
+ * [PCIe][OA][CCCI] support pcie thin modem 1.0
+ *
+ * 09 20 2018 actory.ou
+ * [MOLY00347433] [VMOLY][XCAP] fix target build
+ * [VMOLY] add SIB SHM back for thin modem
+ *
+ * 09 11 2018 actory.ou
+ * [MOLY00346566] [Gen97][L1S_L1DISABLE_SAP] boot to idle sync
+ * add config for sAP dump/exception record
+ *
+ ****************************************************************************/
+#if defined(__CCCI_PRODUCT_TYPE_THIN_MODEM__) //thin modem configuration
+ ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
+ // Thin Modem Configurations //
+ ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
+ //feature id, support, version
+ CCCI_RUNTIME_FEATURE_SUPPORT_ID_ONLY(AP_CCCI_RUNTIME_FEATURE_ID_MIN)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_BOOT_INFO = AP_CCCI_RUNTIME_FEATURE_ID_MIN, CCCI_RUNTIME_FEATURE_MUST_SUPPORT, 0) //0- add for BOOT info
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_EXCEPTION_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //1- add for MD SS exception
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_CCISM_AP_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //2- add for CCCI control path HIF CCISM share memory AP<->MD
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_DHL_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //3-
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_MD1MD3_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //4-
+ // CCCI misc info
+ CCCI_RUNTIME_FEATURE_SUPPORT_ID_ONLY(CCMSG_ID_MISCINFO_START) // for misc info back compitable
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(CCMSG_ID_MISCINFO_HIF_DMA_REMAP = CCMSG_ID_MISCINFO_START, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //5- add for DMA to query HIF-DMA remap address
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(CCMSG_ID_MISCINFO_RTC_32K_LESS, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //6- add for L1 to query 32K-less information in AP
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(CCMSG_ID_MISCINFO_RANDOM_SEED_NUM, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //7- add for sram repair function to get random seed number from AP (Owner: SE7/SD3/Cindy)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(CCMSG_ID_MISCINFO_GPS_COCLOCK, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //8- add for L1D to query GPS co-clock information from AP
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(CCMSG_ID_MISCINFO_SBP_ID, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //9- add for SBP to query SBP related profile (Owner: SE3/PS8/Hong)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(CCMSG_ID_MISCINFO_CCCI, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //10- add for CCCI related feature (Owner: SE7/SD8/CS)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(CCMSG_ID_MISCINFO_CLIB_TIME, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //11- redirect to eAP in thin modem
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(CCMSG_ID_MISCINFO_C2K, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //12- add for C2K option (Owner: SE3/PS5/Ralf)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_MD_IMG_INFO, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //13- add for KAL to get MD image info (Owner: SS/KC.Tsai)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_CCISM_SCP_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //14- add for CCCI HIF CCISM share memory MD<->SCP
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_CCB_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //15- add for CCCI CCB
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_DHL_RAW_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //16- add for DHL RAW
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_DPFM_NETD_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //17- add for DT NETD
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_DPFM_USB_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //18- add for DT USB
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_EE_AFTER_EPOF, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //19- add for EPOF flow
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_NETWORK_MTU_SIZE, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //20- add for querying network MTU size
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(CCMSG_ID_MISC_INFO_CUSTOMER_PARM, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //21- add for customer
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_CCCI_FAST_HEADER, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //22- add for querying ccci fast header support
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(CCMSG_ID_MISCINFO_SLPHISTLOG, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //23- add for sleep history log
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(CCMSG_ID_MISCINFO_C2K_MEID, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //24- add for misc info aligment, c2k use
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(CCMSG_ID_MISCINFO_LWASHM, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //25- add for LWA share memory
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_AUDIO_RAW_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //26- add for Audio share memory
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_MULTI_MPU_SETTING, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //27- add for multiple MPU setting to inform AP
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_CCISM_AP_EXCEPT_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //28- add for CCCI control path HIF CCISM share memory AP<->MD for exception usage
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_MD_PHY_CAPTURE_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //29- add for 93 Modem PHY Capture, request 200MB share memory
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_MD_CONSYS_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //30- add for MD<->WiFi direct path share memory
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_MD_USIP_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //31- add for uSIP share memory (Owner: WSD/OSS8/ME9 Thomas Chen)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_MD_MTEE_SHARE_MEMORY_ENABLE, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //32- add for MD<->MTEE share memory enable flag (Owner: WCS/SE3/PS8 Allen Hsu)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_AMMS_POS_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //33- add for AMMS POS share memory (WCS_SSE_SS5: Tee-Yuen Chun)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_MD_UDC_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //34- add for UDC share memory (User: Cammie, Chi-Yen)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_MD_WIFI_PROXY_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //35- add for WiFi Proxy share memory (User: Konark Mehra)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_NVRAM_CACHE_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //36- add for NVRAM cache share memory (User: Tangping Jiang)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_SECURITY_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //37- add for secure shared memory accessed by TEE/MD (User: Andrew Koo)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_MEMORY_REMAP_INFO, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //38- add for query AP/MD memory remap info (User: Cheng-Dao Lee)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_SAP_MEMDUMP_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //39 - sAP memory dump at this share memory, and MD SS helps to dump to host side
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_SAP_EXCEPTION_RECORD_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //40 - sAP records exception info here, and MD SS helps to dump to host side
+ #if defined(__CCCI_PRODUCT_TYPE_PCIE_THIN_MODEM__)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_EAP_PRODUCT_INFO, CCCI_RUNTIME_FEATURE_MUST_SUPPORT, 0) //41- tell sAP MD's product type
+ #else
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_EAP_PRODUCT_INFO, CCCI_RUNTIME_FEATURE_NOT_SUPPORT, 0) //41- tell sAP MD's product type
+ #endif
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_DPMF_USB_PATH_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //42 - MD USB data path memory address query , allocated from AP CCCI (User: Mingchuang Qiao)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_MIDR_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //43 - DHL MIDR feature for post-reset core dump (User: YH Sung)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_DHL_MISC_INFO, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //44- add aee mini dump flag feature id for DHL. (User: Yen-Hsuan Lin)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_AMMS_DRDI_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //45- add for AMMS DRDI share memory (User: Liang Yan)
+ CCCI_RUNTIME_FEATURE_SUPPORT_ID_ONLY(AP_CCCI_RUNTIME_FEATURE_ID_MAX) //EAP runtime data is Thin modem MISC data - dummy in SOC
+ CCCI_RUNTIME_FEATURE_SUPPORT_ID_ONLY(EAP_CCCI_RUNTIME_FEATURE_ID_MIN = AP_CCCI_RUNTIME_FEATURE_ID_MAX)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(EAP_CCCI_RUNTIME_EAP_RESERVE0 = EAP_CCCI_RUNTIME_FEATURE_ID_MIN, CCCI_RUNTIME_FEATURE_NOT_EXIST, 0) //reserve (Owner: CCCI)
+ CCCI_RUNTIME_FEATURE_SUPPORT_ID_ONLY(EAP_CCCI_RUNTIME_FEATURE_ID_MAX) //EAP runtime data is Thin modem MISC data - dummy in SOC
+#else
+ ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
+ // SoC Configurations //
+ ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
+ //feature id, support, version
+ CCCI_RUNTIME_FEATURE_SUPPORT_ID_ONLY(AP_CCCI_RUNTIME_FEATURE_ID_MIN)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_BOOT_INFO = AP_CCCI_RUNTIME_FEATURE_ID_MIN, CCCI_RUNTIME_FEATURE_MUST_SUPPORT, 0) //0- add for BOOT info
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_EXCEPTION_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //1- add for MD SS exception
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_CCISM_AP_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //2- add for CCCI control path HIF CCISM share memory AP<->MD
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_DHL_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //3-
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_MD1MD3_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //4-
+ // CCCI misc info
+ CCCI_RUNTIME_FEATURE_SUPPORT_ID_ONLY(CCMSG_ID_MISCINFO_START) // for misc info back compitable
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(CCMSG_ID_MISCINFO_HIF_DMA_REMAP = CCMSG_ID_MISCINFO_START, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //5- add for DMA to query HIF-DMA remap address
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(CCMSG_ID_MISCINFO_RTC_32K_LESS, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //6- add for L1 to query 32K-less information in AP
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(CCMSG_ID_MISCINFO_RANDOM_SEED_NUM, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //7- add for sram repair function to get random seed number from AP (Owner: SE7/SD3/Cindy)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(CCMSG_ID_MISCINFO_GPS_COCLOCK, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //8- add for L1D to query GPS co-clock information from AP
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(CCMSG_ID_MISCINFO_SBP_ID, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //9- add for SBP to query SBP related profile (Owner: SE3/PS8/Hong)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(CCMSG_ID_MISCINFO_CCCI, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //10- add for CCCI related feature (Owner: SE7/SD8/CS)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(CCMSG_ID_MISCINFO_CLIB_TIME, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //11- add for KAL to get andriod time (Owner: SE7/SS/Carl)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(CCMSG_ID_MISCINFO_C2K, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //12- add for C2K option (Owner: SE3/PS5/Ralf)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_MD_IMG_INFO, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //13- add for KAL to get MD image info (Owner: SS/KC.Tsai)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_CCISM_SCP_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //14- add for CCCI HIF CCISM share memory MD<->SCP
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_CCB_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //15- add for CCCI CCB
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_DHL_RAW_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //16- add for DHL RAW
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_DPFM_NETD_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //17- add for DT NETD
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_DPFM_USB_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //18- add for DT USB
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_EE_AFTER_EPOF, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //19- add for EPOF flow
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_NETWORK_MTU_SIZE, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //20- add for querying network MTU size
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(CCMSG_ID_MISC_INFO_CUSTOMER_PARM, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //21- add for customer
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_CCCI_FAST_HEADER, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //22- add for querying ccci fast header support
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(CCMSG_ID_MISCINFO_SLPHISTLOG, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //23- add for sleep history log
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(CCMSG_ID_MISCINFO_C2K_MEID, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //24- add for misc info aligment, c2k use
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(CCMSG_ID_MISCINFO_LWASHM, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //25- add for LWA share memory
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_AUDIO_RAW_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //26- add for Audio share memory
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_MULTI_MPU_SETTING, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //27- add for multiple MPU setting to inform AP
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_CCISM_AP_EXCEPT_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //28- add for CCCI control path HIF CCISM share memory AP<->MD for exception usage
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_MD_PHY_CAPTURE_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //29- add for 93 Modem PHY Capture, request 200MB share memory
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_MD_CONSYS_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //30- add for MD<->WiFi direct path share memory
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_MD_USIP_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //31- add for uSIP share memory (Owner: WSD/OSS8/ME9 Thomas Chen)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_MD_MTEE_SHARE_MEMORY_ENABLE, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //32- add for MD<->MTEE share memory enable flag (Owner: WCS/SE3/PS8 Allen Hsu)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_AMMS_POS_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //33- add for AMMS POS share memory (WCS_SSE_SS5: Tee-Yuen Chun)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_MD_UDC_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //34- add for UDC share memory (User: Cammie, Chi-Yen)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_MD_WIFI_PROXY_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //35- add for WiFi Proxy share memory (User: Konark Mehra)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_NVRAM_CACHE_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //36- add for NVRAM cache share memory (User: Tangping Jiang)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_SECURITY_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //37- add for secure shared memory accessed by TEE/MD (User: Andrew Koo)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_MEMORY_REMAP_INFO, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //38- add for query AP/MD memory remap info (User: Cheng-Dao Lee)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_SAP_MEMDUMP_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //39 - sAP memory dump at this share memory, and MD SS helps to dump to host side
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_SAP_EXCEPTION_RECORD_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //40 - sAP records exception info here, and MD SS helps to dump to host side
+ #if defined(__CCCI_PRODUCT_TYPE_PCIE_THIN_MODEM__)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_EAP_PRODUCT_INFO, CCCI_RUNTIME_FEATURE_MUST_SUPPORT, 0) //41- tell sAP MD's product type
+ #else
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_EAP_PRODUCT_INFO, CCCI_RUNTIME_FEATURE_NOT_SUPPORT, 0) //41- tell sAP MD's product type
+ #endif
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_DPMF_USB_PATH_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //42 - MD USB data path memory address query , allocated from AP CCCI (User: Mingchuang Qiao)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_MIDR_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //43 - DHL MIDR feature for post-reset core dump (User: YH Sung)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_DHL_MISC_INFO, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //44- add aee mini dump flag feature id for DHL. (User: Yen-Hsuan Lin)
+ CCCI_RUNTIME_FEATURE_SUPPORT_CONF(AP_CCCI_RUNTIME_AMMS_DRDI_SHARE_MEMORY, CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT, 0) //45- add for AMMS DRDI share memory (User: Liang Yan)
+ CCCI_RUNTIME_FEATURE_SUPPORT_ID_ONLY(AP_CCCI_RUNTIME_FEATURE_ID_MAX)
+#endif //#if defined(__CCCI_PRODUCT_TYPE_THIN_MODEM__) //thin modem configuration
diff --git a/mcu/interface/service/hif/ccci_config_peer_id.h b/mcu/interface/service/hif/ccci_config_peer_id.h
new file mode 100644
index 0000000..2637d97
--- /dev/null
+++ b/mcu/interface/service/hif/ccci_config_peer_id.h
@@ -0,0 +1,68 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ccci_config_peer_id.h
+ *
+ * Project:
+ * --------
+ * VMOLY
+ *
+ * Description:
+ * ------------
+ * Defines CCCI feature ID list for SOC
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 09 23 2019 actory.ou
+ * [MOLY00441639] [VMOLY] support 64kB logging channel
+ * [VMOLY][OA] correct peer_id and support 64kb logging channel
+ *
+ * 04 19 2019 actory.ou
+ * [MOLY00395176] [Thin Modem 1.0][PCIe platform] PCIe Platform 1st Release on Apollo
+ * [PCIe][OA][CCCI] support pcie thin modem 1.0
+ *
+ ****************************************************************************/
+// To AP HIF support
+CCCI_PEER_ID_AP = CCCI_PEER_ID_MIN,
+CCCI_PEER_ID_SCP = 1,
+CCCI_PEER_ID_EAP = 2,
diff --git a/mcu/interface/service/hif/ccci_excep_memory_region.h b/mcu/interface/service/hif/ccci_excep_memory_region.h
new file mode 100644
index 0000000..8b96477
--- /dev/null
+++ b/mcu/interface/service/hif/ccci_excep_memory_region.h
@@ -0,0 +1,125 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * ccci_excep_memory_region.h
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * Set ccci exception memory region
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 11 02 2018 actory.ou
+ * [MOLY00362663] [Gen97][VMOLY] check-in exception flow
+ * [VMOLY][CCCI] exception shm size configuration change
+ *
+ * 04 09 2018 actory.ou
+ * [MOLY00312290] [UMOLYE][CCCI] fix legacy problem
+ * [ccci] sync share memory layout with AP side
+ *
+ * 10 20 2016 cs.huang
+ * [MOLY00204430] [CCCI] MT6293 change
+ * [CCCI] Fix build warning
+ *
+ * 02 19 2016 cs.huang
+ * [MOLY00165616] [CCCI] Change KAL exception log size for MT6292
+ * [CCCI Excep] Change CCCI exception handshake data size (Requestor : SS/Qmei)
+ *
+ * 08 06 2015 cs.huang
+ * [MOLY00135464] [CCCI] New CCCI handshake flow
+ * [CCCI] New CCCI handshake flow
+ *
+ * 08 06 2015 cs.huang
+ * [MOLY00135464] [CCCI] New CCCI handshake flow
+ * [CCCI] New CCCI handshake flow
+ *
+ * 06 02 2015 cs.huang
+ * [MOLY00117870] [CCCI] Modify exception share memory region setting for KAL & AP CCCI
+ * [CCCI] Modify exception share memory region setting for KAL & AP CCCI
+ *
+ * 05 29 2015 hsin-jun.tang
+ * [MOLY00113346] Deanli - New Sleep Mode Debug Feature
+ * [SHM] Add for low power - UMOLY
+ *
+ * 11 13 2014 cs.huang
+ * [MOLY00084393] [UMOLY][CCCI] CCCI common header arrangement
+ * Merging
+ *
+ * //UMOLY/TRUNK/UMOLY/mcu/pcore/interface/service/hif/ccci_ch_cfg.h
+ *
+ * to //UMOLY/TRUNK/UMOLY/mcu/common/interface/service/hif/ccci_ch_cfg.h
+ *
+ * 08 19 2014 cs.huang
+ * [MOLY00075740] [UMOLY][CCCI] Change exception share memory config size for UMOLY bring-up only
+ * [CCCI] Change exception share memory config size for UMOLY bring-up only
+ *
+ * 08 04 2014 ian.cheng
+ * [MOLY00074458] UMOLY CCCI service
+ * [UMOLY_DEV CCCI PCore Service]
+ *
+ *
+ ****************************************************************************/
+#if defined(__MTK_TARGET__) && defined(__HIF_CCISM_SUPPORT__)// Internal modem
+X_CCCI_EXCEP_MEMORY_CONF(CCCI_EXCEP_MEMORY_REGION_CCCI, 464) //- the region for CCCI debug
+X_CCCI_EXCEP_MEMORY_CONF(CCCI_EXCEP_MEMORY_REGION_CCCIFS_DUMP, 48) //- the region for CCCI debug
+X_CCCI_EXCEP_MEMORY_CONF(CCCI_EXCEP_MEMORY_REGION_CCCI_SEQ_DEBUG, 1536) //- the region for CCCI seq debug
+X_CCCI_EXCEP_MEMORY_CONF(CCCI_EXCEP_MEMORY_REGION_KAL , 14336) //- the region for KAL
+X_CCCI_EXCEP_MEMORY_CONF(CCCI_EXCEP_MEMORY_REGION_LOW_POWER_MONITOR, 32768) //- the region for low power monitor (SD10: EJ Farn)
+X_CCCI_EXCEP_MEMORY_CONF(CCCI_EXCEP_MEMORY_REGION_NOUSE , 10240) //- for reserved
+X_CCCI_EXCEP_MEMORY_CONF(CCCI_EXCEP_MEMORY_REGION_RUNTIME_DATA ,4096 ) //- the region for AP CCCI (runtime data)
+X_CCCI_EXCEP_MEMORY_CONF(CCCI_EXCEP_MEMORY_REGION_APCCCI , 1024) //- the region for AP CCCI (force assert)
+X_CCCI_EXCEP_MEMORY_CONF(CCCI_EXCEP_MEMORY_REGION_LOW_POWER , 1024) //- the region for low power
+#else // external modem or MoDIS
+X_CCCI_EXCEP_MEMORY_CONF(CCCI_EXCEP_MEMORY_REGION_CCCI, 464) //- the region for CCCI debug
+X_CCCI_EXCEP_MEMORY_CONF(CCCI_EXCEP_MEMORY_REGION_CCCIFS_DUMP, 48) //- the region for CCCI debug
+X_CCCI_EXCEP_MEMORY_CONF(CCCI_EXCEP_MEMORY_REGION_CCCI_SEQ_DEBUG, 1536) //- the region for CCCI seq debug
+X_CCCI_EXCEP_MEMORY_CONF(CCCI_EXCEP_MEMORY_REGION_KAL , 2048) //- the region for KAL
+X_CCCI_EXCEP_MEMORY_CONF(CCCI_EXCEP_MEMORY_REGION_APCCCI , 1024) //- the region for KAL
+X_CCCI_EXCEP_MEMORY_CONF(CCCI_EXCEP_MEMORY_REGION_LOW_POWER , 1024) //- the region for low power
+#endif
diff --git a/mcu/interface/service/hif/ccci_fs_if.h b/mcu/interface/service/hif/ccci_fs_if.h
new file mode 100644
index 0000000..0836aea
--- /dev/null
+++ b/mcu/interface/service/hif/ccci_fs_if.h
@@ -0,0 +1,272 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * ccci_fs_if.h
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * Interface of CCCI_FS service.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 09 18 2020 li-cheng.tsai
+ * [MOLY00569647] [MP7.PRECHECKIN.DEV][Code sync] sync code from T700
+ * [R3.MP][OA] NVRAM backup/restore/rebuild/backup erase
+ *
+ * 09 11 2020 actory.ou
+ * [MOLY00505884] Request for the API of nvram backup/ resotre / rebuild / backup erase.
+ * [MP7.PRECHECKIN][OA]] NVRAM backup/restore/rebuild/backup erase
+ *
+ * 05 07 2020 actory.ou
+ * [MOLY00505884] Request for the API of nvram backup/ resotre / rebuild / backup erase.
+ * [TC10.SP][OA] NVRAM backup/restore/rebuild/backup erase
+ *
+ * 07 17 2019 actory.ou
+ * [MOLY00422431] [CCCI] support CMPT_Write & CCCI FS/NVRAM decouple
+ * [VMOLY][OA] NVRAM/CCCI decouple & CMPT_Write function ready
+ *
+ * 01 16 2019 actory.ou
+ * [MOLY00379581] [Gen97][CCCI] UMOLYE patch back VMOLY activity
+ * [VMOLY.SEPT][OA] ccci patch back activity from UMOLYE
+ *
+ * 11 12 2018 actory.ou
+ * [MOLY00363567] [MCF] New normal/critical OTA file update flow
+ * [CCCIFS] add get file detail api for MCF
+ *
+ * 02 17 2016 cs.huang
+ * [MOLY00165059] [CCCI FS] Fix recursive include error
+ * [CCCI FS] Fix recursive include
+ *
+ * 09 14 2015 cs.huang
+ * [MOLY00141776] [CCCI FS] Fix CCCI FS build warning
+ * [CCCI FS] Fix CCCI FS build warning
+ *
+ * 09 14 2015 cs.huang
+ * [MOLY00141776] [CCCI FS] Fix CCCI FS build warning
+ * [CCCI FS] Fix CCCI FS build warning
+ *
+ * 01 20 2014 i-wei.tsai
+ * [MOLY00054337] [MT6582LTE][Performance] Meet Orange IoT Attach time requirement (<10s)
+ * CCCI_FS compact read and profile trace (sdio)
+ *
+ * 01 20 2014 i-wei.tsai
+ * [MOLY00054337] [MT6582LTE][Performance] Meet Orange IoT Attach time requirement (<10s)
+ * CCCI_FS compact read and profile trace
+ *
+ * 05 08 2013 i-wei.tsai
+ * [MOLY00021828] [CCCI FS] CCCIFS developement
+ * a. Check-in cccifs new features (support 16KB I/O)
+ * b. add __CCCIFS_SUPPORT__ option to related files
+ ****************************************************************************/
+#ifndef __CCCI_FS_IF_H__
+#define __CCCI_FS_IF_H__
+
+#include "fs_general_types.h"
+/*******************************************************************************
+ * File System op code
+ *******************************************************************************/
+typedef enum
+{
+ FS_CCCI_OP_OPEN = 0x1001,
+ FS_CCCI_OP_SEEK, //0x1002
+ FS_CCCI_OP_READ, //0x1003
+ FS_CCCI_OP_WRITE, //0x1004
+ FS_CCCI_OP_CLOSE, //0x1005
+ FS_CCCI_OP_CLOSEALL, //0x1006
+ FS_CCCI_OP_CREATEDIR, //0x1007
+ FS_CCCI_OP_REMOVEDIR, //0x1008
+ FS_CCCI_OP_GETFILESIZE, //0x1009
+ FS_CCCI_OP_GETFOLDERSIZE, //0x100a
+ FS_CCCI_OP_RENAME, //0x100b
+ FS_CCCI_OP_MOVE, //0x100c
+ FS_CCCI_OP_COUNT, //0x100d
+ FS_CCCI_OP_GETDISKINFO, //0x100e
+ FS_CCCI_OP_DELETE, //0x100f
+ FS_CCCI_OP_GETATTRIBUTES, //0x1010
+ FS_CCCI_OP_OPENHINT, //0x1011
+ FS_CCCI_OP_FINDFIRST, //0x1012
+ FS_CCCI_OP_FINDNEXT, //0x1013
+ FS_CCCI_OP_FINDCLOSE, //0x1014
+ FS_CCCI_OP_LOCKFAT, //0x1015
+ FS_CCCI_OP_UNLOCKALL, //0x1016
+ FS_CCCI_OP_SHUTDOWN,//0x1017
+ FS_CCCI_OP_XDELETE, //0x1018
+ FS_CCCI_OP_CLEARDISKFLAG, //0x1019
+ FS_CCCI_OP_GETDRIVE, //0x101a
+ FS_CCCI_OP_GETCLUSTERSIZE, //0x101b
+ FS_CCCI_OP_SETDISKFLAG, //0x101c
+ FS_CCCI_OP_OTPWRITE, //0x101d
+ FS_CCCI_OP_OTPREAD, //0x101e
+ FS_CCCI_OP_OTPQUERYLENGTH, //0x101f
+ FS_CCCI_OP_OTPLOCK, //0x1020
+ FS_CCCI_OP_RESTORE = 0x1021,
+ FS_CCCI_OP_CMPTREAD = 0x1022,
+ FS_CCCI_OP_BINACCESS = 0x1023,
+ FS_CCCI_OP_CMPTWRITE = 0x1024,
+ FS_CCCI_OP_GETFILEDETAIL = 0x1025
+} FS_CCCI_OP_ID_T;
+
+
+/*******************************************************************************
+ * bit map for CMPT_OP_ID & Structure for CMPT API
+ *******************************************************************************/
+#define CCCI_FS_CMPT_OPEN ((1) << 0)
+#define CCCI_FS_CMPT_GETFILESIZE ((1) << 1)
+#define CCCI_FS_CMPT_SEEK ((1) << 2)
+#define CCCI_FS_CMPT_READ ((1) << 3)
+#define CCCI_FS_CMPT_CLOSE ((1) << 4)
+#define CCCI_FS_CMPT_WRITE ((1) << 5)
+
+typedef struct CCCI_FS_PARAM_CMPT
+{
+ kal_uint32 opid_map; //operate id
+ kal_uint32 ret[2]; //first bitmap second is error code
+ kal_uint32 Flag; //fs_open [in] para
+ kal_uint32 *FileSize; //fs_getfilesize [out] param
+ kal_int32 Offset; //fs_seek [in] param
+ kal_int32 Whence; //fs_seek [in] param
+ void *DataPtr; //fs_read [out] param
+ kal_uint32 Length; //fs_read [in] param
+ kal_uint32 *Read; //fs_read [out] param
+} CCCI_FS_PARAM_CMPT_T;
+
+typedef struct CCCI_FS_PARAM_CMPTW
+{
+ kal_uint32 opid_map; //operate id
+ kal_uint32 ret[2]; //first bitmap second is error code
+ kal_uint32 Flag; //fs_open [in] para
+ kal_int32 Offset; //fs_seek [in] param
+ kal_int32 Whence; //fs_seek [in] param
+ void *DataPtr; //fs_cmpt_write [in] param
+ kal_uint32 Length; //fs_cmpt_write [in] param
+ kal_int32 file_handle; //fs_cmpt_write [in] param
+ kal_uint32 *file_handle_ptr; //fs_cmpt_write [out] param
+ kal_uint32 *act_write_size; //fs_cmpt_write [out] param
+} CCCI_FS_PARAM_CMPTW_T;
+
+/*******************************************************************************
+ * Declare function prototype.
+ *******************************************************************************/
+kal_int32 MD_FS_CMPT_Read(const WCHAR * FileName, CCCI_FS_PARAM_CMPT_T *cmpt_param);
+kal_int32 MD_FS_CMPT_Write(const WCHAR * FileName, CCCI_FS_PARAM_CMPTW_T *cmptw_param);
+// General I/O
+kal_int32 MD_FS_Open(const WCHAR * FileName, kal_uint32 Flag);
+kal_int32 MD_FS_OpenHint(const WCHAR * FileName, kal_uint32 Flag, FS_FileOpenHint * DSR_Hint);
+kal_int32 MD_FS_Close(FS_HANDLE FileHandle);
+kal_int32 MD_FS_Read(FS_HANDLE FileHandle, void * DataPtr, kal_uint32 Length, kal_uint32 * Read);
+kal_int32 MD_FS_Write(FS_HANDLE FileHandle, void * DataPtr, kal_uint32 Length, kal_uint32 * Written);
+kal_int32 MD_FS_Seek(FS_HANDLE FileHandle, kal_int32 Offset, kal_int32 Whence);
+
+//NVRAM backup/restore/erase for Titan's factory CMD
+kal_int32 MD_FS_Bin_Region_Access(kal_int32 opType);
+
+//Information
+kal_int32 MD_FS_GetFileSize(FS_HANDLE FileHandle, kal_uint32 * Size);
+
+//File Only Operation
+kal_int32 MD_FS_Delete(const WCHAR * FileName);
+
+kal_int32 MD_FS_GetAttributes(const WCHAR * FileName);
+kal_int32 MD_FS_GetFileDetail(const WCHAR *FileName, FS_FileDetail *FileDetail);
+
+
+//Folder Only Operation
+kal_int32 MD_FS_CreateDir(const WCHAR * DirName);
+
+kal_int32 MD_FS_RemoveDir(const WCHAR * DirName);
+
+kal_int32 MD_FS_GetFolderSize(const WCHAR *DirName, kal_uint32 Flag, kal_uint8 *RecursiveStack, const kal_uint32 StackSize);
+
+kal_int32 MD_FS_Rename(const WCHAR * FileName, const WCHAR * NewName);
+//File and Folder Operations
+kal_int32 MD_FS_Move(const WCHAR * SrcFullPath, const WCHAR * DstFullPath, kal_uint32 Flag, FS_ProgressCallback Progress, kal_uint8 *RecursiveStack, const kal_uint32 StackSize);
+
+kal_int32 MD_FS_Count(const WCHAR * FullPath, UINT Flag, BYTE *RecursiveStack, const UINT StackSize);
+
+kal_int32 MD_FS_XDelete(const WCHAR * FullPath, kal_uint32 Flag, kal_uint8 *RecursiveStack, const kal_uint32 StackSize);
+
+//Find File
+kal_int32 MD_FS_FindFirst(const WCHAR * NamePattern, kal_uint8 Attr, kal_uint8 AttrMask, FS_DOSDirEntry * FileInfo, WCHAR * FileName, kal_uint32 MaxLength);
+kal_int32 MD_FS_FindNext(FS_HANDLE FileHandle, FS_DOSDirEntry * FileInfo, WCHAR * FileName, kal_uint32 MaxLength);
+kal_int32 MD_FS_FindClose(FS_HANDLE FileHandle);
+
+kal_int32 MD_FS_GetDrive(kal_uint32 Type, kal_uint32 Serial, kal_uint32 AltMask);
+//Drive Management
+kal_int32 MD_FS_GetClusterSize(kal_uint32 DriveIdx);
+
+//Power Lost Detection and Recovery
+kal_int32 MD_FS_SetDiskFlag(void);
+
+kal_int32 MD_FS_CloseAll(void);
+
+//kal_int32 MD_FS_CheckDiskFlag(void);
+kal_int32 MD_FS_ClearDiskFlag(void);
+
+//Disk Management
+kal_int32 MD_FS_GetDiskInfo(const WCHAR * DriveName, FS_DiskInfo * DiskInfo, kal_int32 Flags);
+
+//Card management
+
+//File System Run-Time LifeCycle
+void MD_FS_ShutDown(void);
+kal_int32 MD_FS_UnlockAll(void);
+kal_int32 MD_FS_LockFAT(kal_uint32 Type);
+
+//File System Run-Time Debug
+
+//DirCache
+
+//Flash Device Direct IO
+kal_int32 MD_FS_OTPWrite(kal_int32 devtype, kal_uint32 Offset, void * BufferPtr, kal_uint32 Length);
+kal_int32 MD_FS_OTPRead(kal_int32 devtype, kal_uint32 Offset, void * BufferPtr, kal_uint32 Length);
+kal_int32 MD_FS_OTPQueryLength(kal_int32 devtype, kal_uint32 *Length);
+kal_int32 MD_FS_OTPLock(kal_int32 devtype);
+kal_int32 MD_FS_Restore(const WCHAR * FileName, void* pBuffer, kal_uint32 Length);
+
+#endif /* !__CCCI_FS_IF_H__ */
diff --git a/mcu/interface/service/hif/ccci_if.h b/mcu/interface/service/hif/ccci_if.h
new file mode 100644
index 0000000..3afd95a
--- /dev/null
+++ b/mcu/interface/service/hif/ccci_if.h
@@ -0,0 +1,1488 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ccci_if.h
+ *
+ * Project:
+ * --------
+ * UMOLY
+ *
+ * Description:
+ * ------------
+ * Defines the CCCI data structures and APIs
+ * This file has 7 regions, includes:
+ * CCCI header file : include header file
+ * CCCI compile option : Define CCCI related compile option
+ * CCCI structure define : Define CCCI public structure
+ * CCCI Macro : Define CCCI public Macro
+ * CCCI function pointer : Define CCCI public function pointer
+ * CCCI public API : Define CCCI public API
+ * CCCI MISC : For test propose or other use
+ *
+ * Each region includes 3 parts, includes:
+ * Common : For common use
+ * PCore : For PCore use only
+ * L1Core : For L1Core use only
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 11 11 2020 adel.liao
+ * [MOLY00587690] [MT6880][Colgin]Fix the method to get the mini dump flag and midr dump flag
+ *
+ * 09 18 2020 li-cheng.tsai
+ * [MOLY00569647] [MP7.PRECHECKIN.DEV][Code sync] sync code from T700
+ * [R3.MP][OA][CCCI]code sync from T700
+ *
+ * 09 15 2020 li-cheng.tsai
+ * [MOLY00569647] [MP7.PRECHECKIN.DEV][Code sync] sync code from T700
+ * [MP7.PRECHECKIN.DEV][OA][CCCI]code sync from T700
+ *
+ * 08 04 2020 actory.ou
+ * [MOLY00554534] [Colgin][Code sync] sync code from MT6880.MP
+ * [T700][OA][CCCI] sync from MT6880
+ *
+ * 07 23 2020 actory.ou
+ * [MOLY00549227] [Colgin] provide boot id from runtime data for USB driver
+ * [MT6880][OA] add boot mode enum (get from AP runtime data)
+ *
+ * 07 16 2020 actory.ou
+ * [MOLY00546864] [Colgin][CCCI] bring up issue patch back
+ * [MT6880.MP][OA] add host handshake done broadcast
+ *
+ * 07 08 2020 actory.ou
+ * [MOLY00541625] [Colgin][SB] DPMAIF code merge
+ * [R3.MT6880.MP][OA] add host handshake done broadcast
+ *
+ * 07 07 2020 actory.ou
+ * [MOLY00543186] [Colgin] code sync to NR15.R3.MT6880.MP
+ * [R3.MT6880.MP][OA][CCCI] sync from COLGIN.SB.SMT.DEV
+ *
+ * 06 05 2020 actory.ou
+ * [MOLY00532117] [CCCI] support async HS on data card
+ * [COLGIN.SB.DEV][OA] enable async hs
+ *
+ * 06 03 2020 actory.ou
+ * [MOLY00520040] [Gen97][CCCI] DIPC development - support port setting indication
+ * [NR15.R3.COLGIN.SB.SMT.DEV][OA] apply DIPC
+ *
+ * 05 19 2020 actory.ou
+ * [MOLY00525599] code sync for Colgin
+ * [NR15.R3.COLGIN.SB.SMT.DEV][OA][CCCI] code sync from 19NOV
+ *
+ * 03 23 2020 actory.ou
+ * [MOLY00502858] [Gen97][Gen98] merge ccci channel id/runtime data id
+ * [19NOV][OA][NCCCI/NCCCIDEV] merge channel id table
+ *
+ * 03 06 2020 actory.ou
+ * [MOLY00503617] [Gen97][Thin Modem][ccci] choose boot up handshake flow based on link status
+ * [19NOV][OA] ccci skip pcie flow if no pcie
+ *
+ * 01 06 2020 actory.ou
+ * [MOLY00467882] [TE-CAT][By ATG][MT6885][Petrus][Q0][MDST][SIM1:CT]Externel (EE),mcu/driver/ccismcore/src/ccismcore_ccci.c line:1977 pop up
+ * [M70.19NOV][OA] add exception hs timeout
+ *
+ * 12 09 2019 kyle.shin
+ * [MOLY00340001] [676X][SPR] block BIP when device connect to 56K factory cable
+ *
+ * .
+ * patch back
+ *
+ * 12 05 2019 actory.ou
+ * [MOLY00463817] [Gen97][CCCI] provide query function to get AP/MD memory mapping
+ * [VMOLY][OA] add memory remap address feature id
+ *
+ * 07 25 2019 actory.ou
+ * [MOLY00424777] [Gen97] Assertion removal & Strict aliasing warning clean-un
+ * [VMOLY][OA][CCCI] fix LTO warning
+ *
+ * 07 18 2019 actory.ou
+ * [MOLY00422579] [MDDP] DPFM porting to VMOLY
+ * [VMOLY][OA] support MDDP & rename to DPFM
+ *
+ * 07 17 2019 actory.ou
+ * [MOLY00422431] [CCCI] support CMPT_Write & CCCI FS/NVRAM decouple
+ * [VMOLY][OA] NVRAM/CCCI decouple & CMPT_Write function ready
+ *
+ * 06 26 2019 actory.ou
+ * [MOLY00416725] [Gen97][PCIe] support channel exception flow over PCIe
+ * [VMOLY][OA] support exception flow at PCIe platform
+ *
+ * 06 10 2019 actory.ou
+ * [MOLY00412620] [Gen97][LTO] fix LTO warning in link.log
+ * [VMOLY][OA] fix ccci_except_hmu_init return type
+ *
+ * 04 29 2019 actory.ou
+ * [MOLY00395176] [Thin Modem 1.0][PCIe platform] PCIe Platform 1st Release on Apollo
+ * [VMOLY][Trunk][OA] Disable assert bit for CCCI_SYSTEM_CHANNEL
+ *
+ * 04 19 2019 actory.ou
+ * [MOLY00395176] [Thin Modem 1.0][PCIe platform] PCIe Platform 1st Release on Apollo
+ * [PCIe][OA][CCCI] support pcie thin modem 1.0
+ *
+ * 01 16 2019 actory.ou
+ * [MOLY00379581] [Gen97][CCCI] UMOLYE patch back VMOLY activity
+ * [VMOLY.SEPT][OA] ccci patch back activity from UMOLYE
+ *
+ * 12 24 2018 actory.ou
+ * [MOLY00370278] MD early exception dump for P Migration
+ * [LR13.R1] add API for memdump timeout.
+ *
+ * 08 21 2018 actory.ou
+ * [MOLY00346566] [Gen97][L1S_L1DISABLE_SAP] boot to idle sync
+ * [CCCI] boot to idle patch
+ *
+ * 08 16 2018 actory.ou
+ * [MOLY00345375] [Gen97] Landing NCCCI (Next gen CCCI)
+ * [VMOLY] add nccci ncccisrv nccci_it_ctrl
+ *
+ * 07 24 2018 actory.ou
+ * [MOLY00341790] [MT6295] UDC feature patch back
+ * add UDC feature ID and tty channel / replace ccci spinlock with HWITC
+ *
+ * 04 30 2018 actory.ou
+ * [MOLY00322994] [ccci] add dummy task to help dispatch CR
+ * [dummy module] add AP CCCI/HMU/MD CCCI module ID
+ *
+ * 04 30 2018 actory.ou
+ * [MOLY00322002] [System Service][MOLY Kernel Internal Request] AMMS_POS
+ * [ccci] add POS SHM feature id
+ *
+ * 03 22 2018 actory.ou
+ * [MOLY00315592] ?M-TEE‘ã??release patchapply for mt6771 Mtee patch combined codebase - MD_CCCI
+ * [TRUNK][ccci] add for MTEE/MD SHM allocation
+ *
+ * 09 18 2017 chien-hui.lu
+ * [MOLY00278321] [CCCI][SCPCCISM] CCCI support MD<->SCP transmission on Gen93
+ * [CCCITTY][CCCI] support MD<->SCP transmission.
+ *
+ * 09 07 2017 chien-hui.lu
+ * [MOLY00276510] [CCCI][CCCI_SYS_MSG] modify CCCI system message send ilm 4 bytes
+ * [CCCI][CCCI_SYS_MSG] prevent ccci common ilm 4B potential risk.
+ *
+ * 04 05 2017 chien-hui.lu
+ * [MOLY00239611] [CCCI_IPC][CCCI] add CCCI IPC and runtime feature
+ * [CCCI][CCCI_IPC] add runtime feature and IPC config for DPFM.
+ *
+ * 01 24 2017 chien-hui.lu
+ * [MOLY00226584] [CCCI] add runtime data support feature
+ * add runtime data feature ID for Modem PHY Capture and MD<->WiFi direct path.
+ *
+ * 01 06 2017 chien-hui.lu
+ * [MOLY00220000] merge CSCD into trunk
+ * [CCCI] add CSCD compile flag for AP MD PEER ID enum.
+ *
+ * 01 06 2017 chien-hui.lu
+ * [MOLY00220000] merge CSCD into trunk
+ * [CCCI] add CSCD compile flag for AP MD PEER ID enum.
+ *
+ * 12 12 2016 chien-hui.lu
+ * [MOLY00201881] [CCISM] CCISM support in UMOLYA
+ * [CCCI][CCISM] modify feature ID for CCISM SHM support
+ *
+ * 11 23 2016 ap.wang
+ * [MOLY00210820] [HMU] Add exception step
+ * .
+ *
+ * 11 18 2016 chien-hui.lu
+ * [MOLY00201881] [CCISM] CCISM support in UMOLYA
+ * [CCISM] add CCISM exception mode share memory.
+ *
+ * 10 06 2016 cs.huang
+ * [MOLY00204808] [CCCI] Support multi-mpu setting
+ * [CCCI] multi MPU
+ *
+ * [MOLY00204430] [CCCI] MT6293 change
+ * [CCCI] Add 93 change
+ *
+ * 07 19 2016 cs.huang
+ * [MOLY00185754] [CCB] Porting to UMOLY trunk
+ * [CCCI] Support CCB
+ *
+ * 06 29 2016 ap.wang
+ * [MOLY00187298] [CCCI] LWA related check in
+ * .
+ *
+ *
+ *
+ * 06 01 2016 cs.huang
+ * [MOLY00182647] [CCCI] Fast CCCI header
+ * [CCCI] Fast CCCI header
+ *
+ * 04 20 2016 cs.huang
+ * [MOLY00173829] [CCCI] Add a new CCCI misc info for customer
+ * [CCCI] Add customer misc id
+ *
+ * 03 29 2016 cs.huang
+ * [MOLY00171352] [WW FT][MT6755][Jade-M][H3G][UK][VoLTE][SQC Excluded] No "manage conference" menu
+ * [CCCI] Add runtime data id for MTU size
+ *
+ * 01 25 2016 cs.huang
+ * [MOLY00162367] [CCISM] add CCISM
+ * [CCCI] Add CCISM related code
+ *
+ * 12 28 2015 cs.huang
+ * [MOLY00154045] [MT6797] EPOF code submission - query AP feature id
+ * [CCCI] Add runtime data AP_CCCI_RUNTIME_EE_AFTER_EPOF
+ *
+ * 12 21 2015 cs.huang
+ * [MOLY00154045] [MT6797] EPOF code submission - query AP feature id
+ * [CCCI] Add runtime data AP_CCCI_RUNTIME_EE_AFTER_EPOF
+ *
+ *
+ * 11 10 2015 cs.huang
+ * [MOLY00148746] [HMU] Check timer feature
+ * [CCCI] HMU check timer feature
+ *
+ * 11 03 2015 cs.huang
+ * [MOLY00147959] [CCCI] Support error code
+ * [CCCI] Support error code
+ *
+ * 10 27 2015 cs.huang
+ * [MOLY00146877] [CLDMA Core] Add Duplicated GPD detection mechanism
+ * [CCCI] Add HIF pattern in CCCI IOR structure
+ *
+ * 10 12 2015 cs.huang
+ * [MOLY00143927] [System Software] save MD bootup address from AP for EMI MPU violation debugging
+ * [CCCI] Add AP runtime data id : AP_CCCI_RUNTIME_MD_IMG_INFO
+ *
+ * 09 25 2015 cs.huang
+ * [MOLY00143226] [CCCI] Add boot up trace for debugging CCCI HS1
+ * [CCCI] Add boot up trace for debugging CCCI HS1
+ *
+ * 08 06 2015 cs.huang
+ * [MOLY00135464] [CCCI] New CCCI handshake flow
+ * [CCCI] New CCCI handshake flow
+ *
+ * 08 06 2015 cs.huang
+ * [MOLY00135464] [CCCI] New CCCI handshake flow
+ * [CCCI] New CCCI handshake flow
+ *
+ * 08 05 2015 cs.huang
+ * [MOLY00135462] [Jade] CLDMACORE task logging callback function activity
+ * [CCCI] Add CLDMA debug exception share memory ID.
+ *
+ * 08 04 2015 cs.huang
+ * [MOLY00122361] [6291 plus][CCCI] Merge PCore/L1Core
+ * [CCCI] Merge common header
+ *
+ *
+ * 06 18 2015 cs.huang
+ * [MOLY00122361] [6291 plus][CCCI] Merge PCore/L1Core
+ * [CCCI] Merge common header
+ * 04 13 2015 cs.huang
+ * [MOLY00106914] [C2K IRAT][CCCI] Add CCCI misc info id for C2K
+ * [CCCI] Add CCCI misc info id for C2K
+ *
+ * 01 14 2015 cs.huang
+ * [MOLY00092037] [CCCI] Fix UMOLY Trunk build error
+ * Fix build error.
+ *
+ * 01 13 2015 cs.huang
+ * [MOLY00092037] [CCCI] Fix UMOLY Trunk build error
+ * Fix build error
+ *
+ * 01 12 2015 cs.huang
+ * [MOLY00092037] [CCCI] Fix UMOLY Trunk build error
+ * Fix CCCI build error
+ *
+ * 01 12 2015 cs.huang
+ * [MOLY00092037] [CCCI] Fix UMOLY Trunk build error
+ * Fix CCCI build error
+ *
+ * 12 25 2014 i-wei.tsai
+ * [MOLY00088926] IMS dedicate mux channel support
+ * fix error
+ *
+ * 12 10 2014 cs.huang
+ * [MOLY00080351] [MT6291][CCCI] Add L1Core CCCI service (CCCI SYSMSG/RPC/IPC)
+ * [CCCI] Add L1Core RPC/IPC debug seq
+ *
+ ****************************************************************************/
+#ifndef _CCCI_IF_H
+#define _CCCI_IF_H
+
+#include "kal_public_api.h"
+#include "ccci_ch_cfg.h"
+#include "hif_ior.h"
+#include "qmu_bm.h"
+
+#define __OLD_CCCI_HS_FLOW__
+#define __NEW_CCCI_HS_FLOW__
+#define __FAST_CCCI_HEADER__
+/*!
+ * @brief __CCCI_N_USE_TGPD_EXT__
+ * 20120925 perfer to use TGPD extension for CCCI_HEADER
+ * if defined __CCCI_N_USE_GPD_EXT__, use buff part.
+ */
+//#define __CCCI_N_USE_TGPD_EXT__
+
+/*!
+ * @brief __CCCI_PERF_PROFILING__
+ * 20120924 compile option for performance profiling
+ */
+//#define __CCCI_PERF_PROFILING__
+
+/*!
+ * @brief __CCCI_LB_IT__
+ * 20120805 compile option for Smartphone AP IT
+ */
+//#define __CCCI_LB_IT__ defined in hif_ccci.mak
+
+/*!
+ * @brief __CCCI_GPD_LEAK_DBG__ debug for gpd leak
+ * 20120604 solved the leak in HIF SDIO SIM
+ */
+//#define __CCCI_GPD_LEAK_DBG__
+
+/*!
+ * @brief __SDIOC_PULL_Q_ENH_DL__
+ * 20121001 enable this to enhance the hif poll DL queue performance
+ * Do the poll queue only if the hwo gpd count > 0
+ */
+#define __SDIOC_PULL_Q_ENH_DL__
+
+/*!
+ * @brief FS_CCCI_MAX_BUF_SIZE max buffer size of CCCI_FS
+ * Note: user cannot send/request buffer larger than this size
+ * (CCCI_Header) (FS_OP_ID) (ARGC) (MAX_ARG_NUM* Len) (MAX_ARG_NUM* value_len)(FS_BUFF)
+ * (16) (4) (4) (6*4) (6*4) (16KB)
+ * Tail buffer for 4B aligned: 128
+ */
+#define FS_CCCI_MAX_USER_BUFF 16384
+#define FS_CCCI_REQ_BUFFER_NUM 5 /* support 5 concurrently request*/
+#define FS_CCCI_MAX_ARG_NUM 6 /* parameter number */
+#define FS_CCCI_MAX_BUF_SIZE (16+4+4+FS_CCCI_MAX_ARG_NUM*4*2+FS_CCCI_MAX_USER_BUFF+128)
+#define FS_CCCI_POLLING_BUFF_SIZE QBM_SIZE_CCCI_COMM
+
+/*!
+ * @brief Current MT6280 design only defines
+ * the max Tx/Rx GPD size as 4KB for non-network user
+ * the max Tx/Rx GPD size as 2KB for network user
+ */
+#define CCCI_UL_BUF_TYPE QBM_TYPE_CCCI_COMM // non-network user RGPD
+#define CCCI_DL_BUF_TYPE QBM_TYPE_CCCI_COMM // non-network user TGPD, ccci_write won't flush data must bmcfg_cache_invalid(KAL_TRUE)
+#define CCCI_DL_SYSMSG_BUF_TYPE QBM_TYPE_TGPD // for QBM pool shrink, ccci_write should flush data
+
+#define CCCI_MTU_SIZE (3584-sizeof(CCCI_BUFF_T))
+#define CCCI_HEADER_SIZE (sizeof(CCCI_BUFF_T))
+
+/*!
+ * @brief CCCI_RETURNVAL_T CCCI API return value enum
+ */
+typedef enum
+{
+ CCCI_SUCCESS = 0,
+ CCCI_FAIL = -1001,
+ CCCI_IN_USE = -1002,
+ CCCI_NOT_OWNER = -1003,
+ CCCI_INVALID_PARAM = -1004,
+ CCCI_NO_PHY_CHANNEL = -1005,
+ CCCI_IN_LISR = -1006,
+ CCCI_NO_DATA = -1007,
+ CCCI_NOT_SUPPORT = -1008
+} CCCI_RETURNVAL_T;
+
+/*!
+ * @brief CCCI_MAILBOX_T CCCI mailbox channel structure struct
+ */
+typedef struct
+{
+ kal_uint32 magic; /* 0xFFFFFFFF */
+ kal_uint32 id;
+ kal_uint32 channel:16;
+ kal_uint32 seq:15;
+ kal_uint32 assert_bit:1;
+ kal_uint32 reserved;
+} CCCI_MAILBOX_T;
+
+/*!
+ * @brief CCCI_STREAM_T CCCI stream channel structure struct
+ */
+typedef struct
+{
+ kal_uint32 addr;
+ kal_uint32 len;
+ kal_uint32 channel:16;
+ kal_uint32 seq:15;
+ kal_uint32 assert_bit:1;
+ kal_uint32 reserved;
+} CCCI_STREAM_T;
+
+/*!
+ * @brief CCCI_BUFF_T CCCI channel buffer structure struct
+ */
+typedef struct
+{
+ kal_uint32 data[2]; /* data[1]: length including the CCCI_BUFF_T*/
+ kal_uint32 channel:16;
+ kal_uint32 seq:15;
+ kal_uint32 assert_bit:1;
+ kal_uint32 reserved;
+} CCCI_BUFF_T;
+
+/*!
+ * @brief CCCI_UNION_HDR_T CCCI header union to resolve LTO issue
+ */
+typedef union{
+ CCCI_BUFF_T ccci_buff;
+ CCCI_STREAM_T ccci_stream;
+ CCCI_MAILBOX_T ccci_mailbox;
+} CCCI_UNION_HDR_U;
+
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 W0;
+} CCCI_COMMON_ILM_4B;
+
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint16 HW0;
+} CCCI_COMMON_ILM_2B;
+
+/*!
+ * @brief CCCI_SYSMSG_DEST_E CCCI SYSMSG Destination Definition enum
+ */
+typedef enum
+{
+ CCCI_SYSMSG_DEST_MIN = 0,
+ CCCI_SYSMSG_DEST_AP = CCCI_SYSMSG_DEST_MIN,
+ CCCI_SYSMSG_DEST_EAP = 1,
+ CCCI_SYSMSG_DEST_NOT_SUPPORT = 2,
+ CCCI_SYSMSG_DEST_MAX,
+} CCCI_SYSMSG_DEST_E;
+
+#undef X_CCCI_SYSMSGSVC_CONF
+#define X_CCCI_SYSMSGSVC_CONF(mSGNO, mODE, iD, dest) mSGNO,
+/*!
+ * @brief CONTROL_CHANNEL_MSG
+ * CCCI Message ID Passing Through CONTROL_CHANNEL and SYSTEM_CHANNEL
+ * NOTICE: Negotiations With AP Owner Before Modification
+ */
+typedef enum
+{
+ CCMSG_ID_START_BOOT = 0x00000000,
+ CCMSG_ID_NORMAL_BOOT_READY = 0x00000001,
+ CCMSG_ID_META_BOOT_READY = 0x00000002,
+ CCMSG_ID_RESET = 0x00000003,
+ CCMSG_ID_EXCEPTION_CHECK = 0x00000004,
+ CCMSG_ID_DRV_VERSION_ERR = 0x00000005,
+ CCMSG_ID_EXCEPTION_REC_OK = 0x00000006,
+ CCMSG_ID_EXCEPTION_PASS = 0x00000008,
+ CCMSG_ID_PORT_SETTING = 0x00000009,
+ /* System Channel */
+ CCMSG_ID_MD_L4_MOD = 0x0000000E,//add for RIL (AP task) and L4C (MD task) communication message
+ CCMSG_ID_MD_L4_MAX_TX_PWR_RED_REQ = 0x0000000F,
+
+ CCMSG_ID_MD_LEGACY_END = 0x000000FF,
+ CCMSG_ID_SYSMSGSVC_MASK = 0x00000100,
+ CCMSG_ID_SYSMSGSVC_START = 0x00000100,
+ CCMSG_ID_SYSMSGSVC_DUMMY = 0x000000FF,
+ //- section 0x100 ~ 0x1FF : reserved for system message service used
+ #include "ccci_sysmsgsvc_conf.h"
+
+ CCMSG_ID_SYSMSGSVC_END,
+
+ CCMSG_ID_MD_WDT_FLAG = 0x00001000, //- for MT6577/MT6589, AP cannot receive MD WDT interrupt issue. k2 md2 6589, for resolving wdt build error
+
+}CONTROL_CHANNEL_MSG;
+#undef X_CCCI_SYSMSGSVC_CONF
+
+typedef struct MISC_INFO_ELEMENT_T
+{
+ kal_uint32 Feature[4];
+}MISC_INFO_ELEMENT;
+
+typedef struct MISC_INFO_DATA_T
+{
+ kal_uint32 MiscPrefix; // "MISC"
+ kal_uint32 SupportMask;
+ kal_uint32 Index;
+ kal_uint32 Next;
+ MISC_INFO_ELEMENT element[16];
+ kal_uint32 Reserve[3];
+ kal_uint32 MiscPostfix; // "MISC"
+}MISC_INFO_DATA;
+
+/*!
+ * @brief MODEM_RUNTIME_DATA CCCI MD runtime enum
+ */
+typedef struct MODEM_RUNTIME_DATA_T
+{
+ kal_uint8 Prefix[4]; // "CCIF" for compatible to 6280
+ kal_uint8 Platform[8]; // Hardware Platform String ex: "MT6516E1"
+ kal_uint32 DriverVersion; // 0x00000929 since W09.29
+ kal_uint32 BootChannel; // Channel to ACK AP with boot ready
+ kal_uint32 BootingStartID; // MD is booting. NORMAL_BOOT_ID or META_BOOT_ID or early exception memory dump
+ kal_uint32 BootAttributes; // Attributes passing from AP to MD Booting
+ kal_uint32 BootReadyID; // MD response ID if boot successful and ready ,
+ // Cannot equal to CCMSG_ID_DRV_VERSION_ERR
+ kal_uint32 FileShareMemBase;
+ kal_uint32 FileShareMemSize;
+ kal_uint32 ExceShareMemBase;
+ kal_uint32 ExceShareMemSize; // 512 Bytes Required
+ kal_uint32 CCIFShareMemBase;
+ kal_uint32 CCIFShareMemSize; // CCIF share queue size
+ kal_uint32 DHLShareMemBase; // For DHL
+ kal_uint32 DHLShareMemSize;
+ kal_uint32 MD1MD3ShareMemBase; // For MD1 MD3 share memory
+ kal_uint32 MD1MD3ShareMemSize;
+ kal_uint32 CCISMShareMemBase;
+ kal_uint32 CCISMShareMemSize;
+ kal_uint32 CCISMExptShareMemBase;
+ kal_uint32 CCISMExptShareMemSize;
+ kal_uint32 TotalShareMemBase;
+ kal_uint32 TotalShareMemSize;
+ kal_uint32 CheckSum;
+ kal_uint8 Postfix[4]; //"CCIF" for compatible to 6280
+ MISC_INFO_DATA MiscInfo;
+}MODEM_RUNTIME_DATA;
+
+#define CCCI_RUNTIME_FEATURE_MAX 64
+#if defined(__CCCI_PRODUCT_TYPE_PCIE_THIN_MODEM__) //PCIe interface
+ #define CCCI_RUNTIME_FEATURE_ID_MAX EAP_CCCI_RUNTIME_FEATURE_ID_MAX
+#else //SOC configuration
+ #define CCCI_RUNTIME_FEATURE_ID_MAX AP_CCCI_RUNTIME_FEATURE_ID_MAX
+#endif
+
+//boot-up CPU(sAP/eAP)
+typedef enum{
+ CCCI_BOOT_UP_HS_HOST_MIN,
+ CCCI_BOOT_UP_HS_HOST_AP = CCCI_BOOT_UP_HS_HOST_MIN,
+ #if defined(__CCCI_PRODUCT_TYPE_PCIE_THIN_MODEM__) //PCIe Thin Modem interface
+ CCCI_BOOT_UP_HS_HOST_EAP,
+ #endif
+ CCCI_BOOT_UP_HS_HOST_MAX,
+} CCCI_BOOT_UP_HS_HOST;
+
+typedef enum {
+ CCCI_HOST_HS_DONE_BROADCAST_ID_MIN = 0,
+ CCCI_HOST_HS_DONE_BROADCAST_ID_LHIF = CCCI_HOST_HS_DONE_BROADCAST_ID_MIN,
+ CCCI_HOST_HS_DONE_BROADCAST_ID_CCCITTY,
+ CCCI_HOST_HS_DONE_BROADCAST_ID_MAX
+} CCCI_HOST_HS_DONE_BROADCAST_ID_E;
+
+typedef struct AP_RUNTIME_DATA_T
+{
+ kal_uint8 Prefix[4]; // "ICCC"
+ kal_uint8 APQueryFeature[CCCI_RUNTIME_FEATURE_MAX];
+ kal_uint32 SHMSupport;
+ kal_uint32 APRuntimeDataAddr;
+ kal_uint32 APRuntimeDataSize;
+ kal_uint32 MDRuntimeDataAddr;
+ kal_uint32 MDRuntimeDataSize;
+ kal_uint32 SetMDMPUStartAddr;
+ kal_uint32 SetMDMPUTotalSize;
+ kal_uint8 Postfix[4]; //"ICCC"
+}AP_RUNTIME_DATA;
+
+typedef struct AP_RUNTIME_DATA_V2_T
+{
+ kal_uint8 Prefix[4]; // "ICCC"
+ kal_uint8 APQueryFeature[CCCI_RUNTIME_FEATURE_MAX];
+ kal_uint32 SHMSupport;
+ kal_uint32 APRuntimeDataAddr;
+ kal_uint32 APRuntimeDataSize;
+ kal_uint32 MDRuntimeDataAddr;
+ kal_uint32 MDRuntimeDataSize;
+ kal_uint8 MPUSetting[64];
+ kal_uint8 Postfix[4]; //"ICCC"
+}AP_RUNTIME_DATA_V2;
+
+typedef struct MD_RUNTIME_DATA_T
+{
+ kal_uint8 Prefix[4]; // "CCCI"
+ kal_uint8 MDQueryFeature[CCCI_RUNTIME_FEATURE_MAX];
+ kal_uint8 Postfix[4]; //"CCCI"
+}MD_RUNTIME_DATA;
+
+#undef CCCI_RUNTIME_FEATURE_SUPPORT_CONF
+#undef CCCI_RUNTIME_FEATURE_SUPPORT_ID_ONLY
+#define CCCI_RUNTIME_FEATURE_SUPPORT_CONF(_id, _support, _version) _id,
+#define CCCI_RUNTIME_FEATURE_SUPPORT_ID_ONLY(_id) _id,
+typedef enum{
+ #include "ccci_config_feature_id.h"
+} AP_CCCI_RUNTIME_FEATURE_ID;
+#undef CCCI_RUNTIME_FEATURE_SUPPORT_CONF
+#undef CCCI_RUNTIME_FEATURE_SUPPORT_ID_ONLY
+
+typedef enum{
+ // New id add here
+#if !defined(__MTK_TARGET__) && defined(ATEST_SYS_ENABLE) // for UT
+ MD_CCCI_RUNTIME_UT_TEST,
+#endif
+ MD_CCCI_RUNTIME_FEATURE_ID_MAX,
+} MD_CCCI_RUNTIME_FEATURE_ID;
+
+typedef enum{
+ MD_EAP_CCCI_RUNTIME_PORT_SETTING,
+ // New id add here
+#if !defined(__MTK_TARGET__) && defined(ATEST_SYS_ENABLE) // for UT
+ MD_EAP_CCCI_RUNTIME_UT_TEST,
+#endif
+ MD_EAP_CCCI_RUNTIME_FEATURE_ID_MAX,
+} MD_EAP_CCCI_RUNTIME_FEATURE_ID;
+
+typedef enum{
+ CCCI_RUNTIME_FEATURE_NOT_EXIST = 0,
+ CCCI_RUNTIME_FEATURE_NOT_SUPPORT = 1,
+ CCCI_RUNTIME_FEATURE_MUST_SUPPORT = 2,
+ CCCI_RUNTIME_FEATURE_OPTIONAL_SUPPORT = 3,
+ CCCI_RUNTIME_FEATURE_SUPPORT_BACKWARD_COMPAT = 4,
+}CCCI_RUNTIME_FEATURE_SUPPORT_TYPE;
+
+typedef struct
+{
+ kal_uint8 support_mask:4;
+ kal_uint8 version:4;
+} CCCI_RUNTIME_FEATURE_SUPPORT_T;
+
+typedef struct
+{
+ kal_uint8 feature_id; // for debug only
+ CCCI_RUNTIME_FEATURE_SUPPORT_T support_info; //1B
+ kal_uint8 reserved[2];
+ kal_uint32 data_length;
+ kal_uint32 data[0];
+} CCCI_RUNTIME_FEATURE_FORMAT_T;
+
+typedef struct
+{
+ kal_uint32 addr;
+ kal_uint32 size;
+} CCCI_RUNTIME_SHARE_MEMORY_FORMAT_T;
+
+typedef struct
+{
+ CCCI_RUNTIME_SHARE_MEMORY_FORMAT_T ctrl_buffr;
+ CCCI_RUNTIME_SHARE_MEMORY_FORMAT_T data_buffr;
+} CCB_SHARE_MEMORY_FORMAT_T;
+
+typedef struct
+{
+ CCCI_RUNTIME_SHARE_MEMORY_FORMAT_T udc_buf;
+ CCCI_RUNTIME_SHARE_MEMORY_FORMAT_T udc_tbl;
+} UDC_SHARE_MEMORY_FORMAT_T; //runtime data #31- add for UDC share memory (User: Cammie, Chi-Yen)
+
+typedef struct
+{
+ kal_uint32 BootChannel; // Channel to ACK AP with boot ready
+ kal_uint32 BootingStartID; // MD is booting. NORMAL_BOOT_ID or META_BOOT_ID or early exception memory dump
+ kal_uint32 BootAttributes; // Attributes passing from AP to MD Booting
+ kal_uint32 BootReadyID; // MD response ID if boot successful and ready ,
+} CCCI_RUNTIME_BOOT_INFO_FORMAT_T;
+
+typedef struct
+{
+ kal_uint8 mini_dump_flag;
+ kal_uint8 midr_dump_flag;
+ kal_uint16 reserved;
+} CCCI_RUNTIME_DHL_MISC_INFO_T;
+
+typedef enum{
+ CCCI_FA_UNKNOWN_ERROR = 0x000,
+ CCCI_FA_MD_NO_RESPONSE = 0x100,
+ CCCI_FA_HMU_DSP_TIMER_BROKEN= 0x101,
+ CCCI_FA_HMU_GPT_TIMER_BROKEN= 0x102,
+ CCCI_FA_MD_SEQ_ERROR = 0x200,
+ CCCI_FA_AP_SEQ_ERROR = 0x201,
+ CCCI_FA_AP_DATA_PATH_ERROR = 0x300,
+ CCCI_FA_USR_TRIGGER = 0x400,
+}CCCI_FORCE_ASSERT_ERROR_CODE;
+
+/*!
+ * @brief ccci_io_req_type_e Type of operation to for requests to submit to HIF.
+ * @param CCCI_IO_TX_NO_FLUSH Transmit operation without GPD checksum calcuation and cache flush.
+ */
+typedef enum _ccci_io_req_type {
+ CCCI_IO_TX_NO_FLUSH = 0x00000010,
+ CCCI_IO_TYPE_DUMMY = 0x7fffffff
+} ccci_io_req_type_e;
+
+/*!
+ * @brief ccci_io_ext_info_t Configurations apply to the requests to submit to HIF.
+ * @param type Type of operation.
+ */
+typedef struct _ccci_io_ext_info {
+ ccci_io_req_type_e type;
+} ccci_io_ext_info_t;
+
+/*!
+ * @brief CCCI_STATE_T CCCI status enum
+ */
+typedef enum
+{
+ CCCI_IDLE = 0x00,
+ CCCI_ACTIVE_READ = 0x01,
+ CCCI_ACTIVE_WRITE = 0x02,
+ CCCI_ACTIVE_ISR = 0x04
+} CCCI_STATE_T;
+
+
+#ifdef __SDIOC_PULL_Q_ENH_DL__
+/*!
+ * @brief ccci_io_request_t is a typedef of struct _ccci_io_request_t
+ */
+typedef struct _ccci_io_request_t ccci_io_request_t;
+/*!
+ * @brief struct _ccci_io_request_t describe io request used to communicate
+ * between ccci_sdio modules
+ */
+struct _ccci_io_request_t {
+ /*!
+ * @brief next io request
+ */
+ ccci_io_request_t* next_request;
+ /*!
+ * @brief pointer to current gpd of this io request
+ */
+ qbm_gpd* first_gpd;
+ /*!
+ * @brief pointer to last gpd of this io request
+ */
+ qbm_gpd* last_gpd;
+ /*!
+ * @brief number of the gpd in this ior
+ */
+ kal_int16 num_gpd;
+ /*!
+ * @brief hif forbidden pattern for duplicated GPD detection
+ */
+ kal_uint16 hif_forbidden;
+};
+#else
+#define ccci_io_request_t hif_io_request_t
+#endif
+
+typedef enum _CCCI_EXPT_STATE
+{
+ CCCI_EXPT_INVALID_ST,
+ CCCI_EXPT_INIT_CCCITTY_DEV_ST,
+ CCCI_EXPT_INIT_ST,
+ CCCI_EXPT_CLEAR_CH_ST,
+ CCCI_EXPT_HANDSHAKE_START_ST,
+ CCCI_EXPT_HANDSHAKE_TX_START_ST,
+ CCCI_EXPT_HANDSHAKE_TX_DONE_ST,
+ CCCI_EXPT_HANDSHAKE_RX_START_ST,
+ CCCI_EXPT_HANDSHAKE_RX_DONE_ST,
+ CCCI_EXPT_HANDSHAKE_DONE_ST,
+ CCCI_EXPT_INFO_PASS_PRE_START_ST,
+ CCCI_EXPT_INFO_PASS_PRE_DONE_ST,
+ CCCI_EXPT_INFO_PASSED_START_ST,
+ CCCI_EXPT_INFO_PASSED_DONE_ST,
+ CCCI_EXPT_STATE_MAX
+} CCCI_EXPT_STATE_E;
+
+typedef enum {
+ CCCI_EXCEP_DBG_HS_CCCI_FS_WAIT_TIME_POLLING = 0,
+ CCCI_EXCEP_DBG_HS_CCCI_FS_WAIT_TIME_NORMAL_CARRY, // wait time is double, H32 is high 32 bit value
+ CCCI_EXCEP_DBG_HS_CCCI_FS_WAIT_TIME_NORMAL, // wait time is double, L32 is low 32 bit value
+ CCCI_EXCEP_DBG_HS_CCCI_FS_TRACE,
+ CCCI_EXCEP_DBG_HS_CCCI_RPC_WAIT_TIME_POLLING,
+ CCCI_EXCEP_DBG_HS_CCCI_RPC_WAIT_TIME_NORMAL_CARRY, // wait time is double, H32 is high 32 bit value
+ CCCI_EXCEP_DBG_HS_CCCI_RPC_WAIT_TIME_NORMAL, // wait time is double, L32 is low 32 bit value
+ CCCI_EXCEP_DBG_HS_CCCI_RPC_TRACE,
+ CCCI_EXCEP_DBG_HS_BOOTTRC_WAIT_TIME,
+ CCCI_EXCEP_DBG_HS_CCCI_DEBUG_CHANNEL,
+ CCCI_EXCEP_DBG_HS_CCCI_DEBUG_CURRENT_SEQ_NUM,
+ CCCI_EXCEP_DBG_HS_CCCI_DEBUG_EXPECTED_SEQ_NUM,
+ CCCI_EXCEP_DBG_HS_CMUX_GPD_PROFILE_NUM,
+ CCCI_EXCEP_DBG_HS_CCCI_FS_ERROR_LINE,
+ CCCI_EXCEP_DBG_HS_CCCI_FS_ERROR_PARAM1,
+ CCCI_EXCEP_DBG_HS_CCCI_FS_ERROR_PARAM2,
+ CCCI_EXCEP_DBG_HS_CCCI_FS_ERROR_PARAM3,
+ CCCI_EXCEP_DBG_HS_CCCI_CLDMA_TX_CB,
+ CCCI_EXCEP_DBG_HS_CCCI_CLDMA_RX_CB,
+ CCCI_EXCEP_DBG_STEP,
+ CCCI_EXCEP_DBG_EXPT_HS_CHANNEL,
+ CCCI_EXCEP_DBG_EXPT_HS_POLLING_TIMEOUT,
+ CCCI_EXCEP_DBG_HS_LOG_MAX,
+} CCCI_EXCEP_DBG_HS_INDEX;
+
+#undef X_CCCI_EXCEP_MEMORY_CONF
+#define X_CCCI_EXCEP_MEMORY_CONF(region, length) region,
+typedef enum
+{
+#include "ccci_excep_memory_region.h"
+ CCCI_EXCEP_MEMORY_REGION_MAX
+} CCCI_EXCEP_MEMORY_REGION;
+#undef X_CCCI_EXCEP_MEMORY_CONF
+
+typedef enum {
+ CCCI_EXCEP_MEMORY_TYPE_SHM,
+ CCCI_EXCEP_MEMORY_TYPE_STATIC_BUFFER,
+ CCCI_EXCEP_MEMORY_TYPE_MAX
+} CCCI_EXCEP_MEMORY_TYPE;
+
+typedef enum
+{
+ CCCI_DEBUG_GET_STATUS_MODULE_L1TIME = 0x0,
+ CCCI_DEBUG_GET_STATUS_MODULE_CCCIFS,
+ CCCI_DEBUG_GET_STATUS_MODULE_CCCIRPC,
+ CCCI_DEBUG_GET_STATUS_MODULE_CCCIIPC,
+ CCCI_DEBUG_GET_STATUS_MODULE_CCMNI,
+ CCCI_DEBUG_GET_STATUS_MODULE_CCCITTY,
+ CCCI_DEBUG_GET_STATUS_MODULE_CCCIIMS,
+ CCCI_DEBUG_GET_STATUS_MODULE_CCCISEQ,
+ CCCI_DEBUG_GET_STATUS_MODULE_MAX
+} CCCI_DEBUG_GET_STATUS_MODULE;
+
+/* CCCI boot up trace step */
+typedef enum
+{
+ CCCI_BOOT_UP_TRACE_START = 0x200, // need to align with SS
+ CCCI_BOOT_UP_TRACE_HW_INIT_ENTER = CCCI_BOOT_UP_TRACE_START, // 0x200
+ CCCI_BOOT_UP_TRACE_HW_INIT_LEAVE, // 0x201
+ CCCI_BOOT_UP_TRACE_HS1_1_ENTER, // 0x202
+ CCCI_BOOT_UP_TRACE_HS1_1_START_TX, // 0x203
+ CCCI_BOOT_UP_TRACE_HS1_1_TX_TIMEOUT, // 0x204
+ CCCI_BOOT_UP_TRACE_HS1_1_START_RX, // 0x205
+ CCCI_BOOT_UP_TRACE_HS1_1_RX_TIMEOUT, // 0x206
+ CCCI_BOOT_UP_TRACE_HS1_1_TRANSMISSION_DONE, // 0x207
+ CCCI_BOOT_UP_TRACE_HS1_1_LEAVE, // 0x208
+ CCCI_BOOT_UP_TRACE_HS1_2_ENTER, // 0x209
+ CCCI_BOOT_UP_TRACE_HS1_2_START_TX, // 0x20a
+ CCCI_BOOT_UP_TRACE_HS1_2_TX_TIMEOUT, // 0x20b
+ CCCI_BOOT_UP_TRACE_HS1_2_START_RX, // 0x20c
+ CCCI_BOOT_UP_TRACE_HS1_2_RX_TIMEOUT, // 0x20d
+ CCCI_BOOT_UP_TRACE_HS1_2_TRANSMISSION_DONE, // 0x20e
+ CCCI_BOOT_UP_TRACE_HS1_2_LEAVE, // 0x20f
+ CCCI_BOOT_UP_TRACE_HW_INIT2_ENTER, // 0x210
+ CCCI_BOOT_UP_TRACE_HW_INIT2_LEAVE, // 0x211
+ CCCI_BOOT_UP_TRACE_HS2_1_ENTER, // 0x212
+ CCCI_BOOT_UP_TRACE_HS2_1_START_TX, // 0x213
+ CCCI_BOOT_UP_TRACE_HS2_1_TX_TIMEOUT, // 0x214
+ CCCI_BOOT_UP_TRACE_HS2_1_TRANSMISSION_DONE, // 0x215
+ CCCI_BOOT_UP_TRACE_HS2_1_LEAVE, // 0x216
+ CCCI_BOOT_UP_TRACE_HS2_2_ENTER, // 0x217
+ CCCI_BOOT_UP_TRACE_HS2_2_START_TX, // 0x218
+ CCCI_BOOT_UP_TRACE_HS2_2_TX_TIMEOUT, // 0x219
+ CCCI_BOOT_UP_TRACE_HS2_2_TRANSMISSION_DONE, // 0x21a
+ CCCI_BOOT_UP_TRACE_HS2_2_LEAVE, // 0x21b
+ CCCI_BOOT_UP_TRACE_HS1_2_SKIP, // 0x21c
+ CCCI_BOOT_UP_TRACE_HS2_2_SKIP, // 0x21d
+ CCCI_BOOT_UP_TRACE_MAX = 0x2FF, // need to align with SS
+} CCCI_BOOT_UP_TRACE_STEP;
+
+typedef enum
+{
+ AP_CCCI_RUNTIME_DATA_VERSION_UNKNOWN = 0,
+ AP_CCCI_RUNTIME_DATA_VERSION_OLD,
+ AP_CCCI_RUNTIME_DATA_VERSION_NEW_V1,
+ AP_CCCI_RUNTIME_DATA_VERSION_NEW_V2,
+ AP_CCCI_RUNTIME_DATA_VERSION_NEW_V2_WITHOUT_SHM,
+} AP_CCCI_RUNTIME_DATA_VERSION;
+
+/*!
+ * @brief CCCI_INIT_MAILBOX initialize a CCCI mailbox buffer
+ */
+#define CCCI_INIT_MAILBOX(buff, mailbox_id) \
+ do { \
+ ((CCCI_MAILBOX_T *)(buff))->magic = 0xFFFFFFFF; \
+ ((CCCI_MAILBOX_T *)(buff))->id = (mailbox_id); \
+ (buff)->channel = 0; \
+ (buff)->reserved = 0; \
+ } while (0)
+
+/*!
+ * @brief CCCI_INIT_STREAM initialize a CCCI stream buffer
+ */
+#define CCCI_INIT_STREAM(buff, stream_addr, stream_len) \
+ do { \
+ ((CCCI_STREAM_T *)(buff))->addr = (stream_addr); \
+ ((CCCI_STREAM_T *)(buff))->len = (stream_len); \
+ (buff)->channel = 0; \
+ (buff)->reserved = 0; \
+ } while (0)
+/*!
+ * @brief CCCI_IS_MAILBOX check the CCCI buffer type
+ */
+#define CCCI_IS_MAILBOX(buff) ((((CCCI_MAILBOX_T *)(buff))->magic == 0xFFFFFFFF)? 1: 0)
+
+/*!
+ * @brief CCCI_MAILBOX_ID get the id of the CCCI mailbox buffer
+ */
+#define CCCI_MAILBOX_ID(buff) (((CCCI_MAILBOX_T *)(buff))->id)
+
+/*!
+ * @brief CCCI_STREAM_ADDR get the addr of the CCCI stream buffer
+ */
+#define CCCI_STREAM_ADDR(buff) (((CCCI_STREAM_T *)(buff))->addr)
+/*!
+ * @brief CCCI_STREAM_LEN get the len of the CCCI stream buffer
+ */
+#define CCCI_STREAM_LEN(buff) (((CCCI_STREAM_T *)(buff))->len)
+/*!
+ * @brief CCCI_STREAM_SET_LEN get the len of the CCCI stream buffer
+ */
+#define CCCI_STREAM_SET_LEN(buff, stream_len) \
+ do { \
+ ((CCCI_STREAM_T *)(buff))->len = (stream_len); \
+ } while (0)
+/*!
+ * @brief CCCI_GET_CH_NO obtain the CCCI channel number
+ */
+#define CCCI_GET_CH_NO(buff) (((CCCI_BUFF_T *)(buff))->channel)
+/*!
+ * @brief CCCI_SET_CH_NO set the CCCI channel number
+ */
+#define CCCI_SET_CH_NO(buff, ch_no) \
+ do { \
+ ((CCCI_BUFF_T *)(buff))->channel = ch_no; \
+ } while (0)
+/*!
+ * @brief CCCI_SET_RESERVED set the CCCI reserved
+ */
+#define CCCI_SET_RESERVED(buff, reserved_d) \
+ do { \
+ ((CCCI_BUFF_T *)(buff))->reserved = reserved_d; \
+ } while (0)
+/*!
+ * @brief CCCI_GET_RESERVED get the CCCI reserved
+ */
+#define CCCI_GET_RESERVED(buff) (((CCCI_BUFF_T *)(buff))->reserved)
+
+#define CCCI_MISC_INFO_NOT_EXIST 0x00000000
+#define CCCI_MISC_INFO_NOT_SUPPORT 0x00000001
+#define CCCI_MISC_INFO_SUPPORT 0x00000002
+#define CCCI_MISC_INFO_PARTIALLY_SUPPORT 0x00000003
+
+#define PEER_ID_MASK 0xF000 // each peer range 0x0~0xFF
+#define PEER_CH_MASK 0x0FFF // each channel range is 0x0~0xFF
+
+#define GET_PEER_ID(_ch) ((_ch & PEER_ID_MASK) >> 12 )
+#define GET_PEER_CHANNEL(_ch) (_ch & PEER_CH_MASK)
+#define GET_VIRTUAL_CHANNEL(_peer_id, _ch) ((_peer_id << 12) | _ch) // peer_id + channel
+
+#define BOOT_ATTR_IS_CLEAN_BOOT 0x00000001
+
+#define CCCI_DEBUG_ASSERT_BIT 1
+#define CCCI_DEBUG_NOT_ASSERT_BIT 0
+
+typedef void (*CCCI_SYSMSGSVC_HISR_CALLBACK)(kal_uint32 param);
+
+/*!
+ * @brief function pointer type for HIF CCCI callback function: called by HIF provided by CCCI
+ * The CCCI will registers HIF_CCCI_GPD_CALLBACK/HIF_CCCI_BUFF_CALLBACK depending on the HIG IO mode
+ */
+typedef void (*HIF_CCCI_CALLBACK)(kal_uint8 queue_no, void* pior_or_pbuff);
+/*!
+ * @brief function pointer type for HIF CCCI callback function: called by HIF provided by CCCI for CCCI_CH_HIFIO_GPD
+ */
+typedef void (*HIF_CCCI_GPD_CALLBACK)(kal_uint8 queue_no, ccci_io_request_t* ior);
+/*!
+ * @brief function pointer type for HIF CCCI callback function: called by HIF provided by CCCI for CCCI_CH_HIFIO_BUFF
+ */
+typedef void (*HIF_CCCI_BUFF_CALLBACK)(kal_uint8 queue_no, CCCI_BUFF_T* pbuff);
+
+
+/*!
+ * @brief function pointer type for CCCI callback function: called by CCCI, provided by device/user registered by ccci_init
+ */
+typedef void (*CCCI_CALLBACK)(CCCI_BUFF_T *buff);
+
+/*!
+ * @brief function pointer type for CCCI IOR callback function: called by CCCI, provided by GPD device (CCMNI/TTYCORE) registered by ccci_init_gpdior
+ */
+typedef void (*CCCI_IORCALLBACK )(CCCI_CHANNEL_T channel, ccci_io_request_t* ior);
+
+/*!
+ * @brief function pointer type for CCCI IT reload GPD.
+ */
+typedef void (*CCCI_RGPD_RELOAD_CALLBACK)();
+
+/*!
+ * @brief function pointer type for CCCI IT to generate DL traffic
+ */
+typedef void (*CCCI_DL_PKTGEN_CALLBACK)();
+
+/*!
+ * @brief function pointer type for Host HS done broadcasting
+ */
+typedef void (*CCCI_HOST_HS_DONE_CALLBACK)();
+
+typedef kal_uint32 (*CCCI_DEBUG_GET_STATUS_CALLBACK)(kal_uint32 *write_ptr, kal_uint32 available_size);
+
+/*!
+* @brief CCCI callback user's function to get runtime data and len
+* query_support - query support mask & version of this id
+* data - user needs to memcpy to data.
+* data_len - the length of users data
+ Return value - users support mask & version of this id
+*/
+typedef CCCI_RUNTIME_FEATURE_SUPPORT_T (*CCCI_RUNTIME_DATA_QUERY_REG_CB)(CCCI_RUNTIME_FEATURE_SUPPORT_T query_support, void * data, kal_uint32 * data_len);
+
+#if defined(__TC01__)
+extern kal_uint8 lge_boot_info;
+void factory_cable_qem_detect(void);
+#endif
+
+/*!
+ * @brief ccci_send_message send a message and reserved by ccci_mailbox_write_with_reserved
+ * @param message: mailbox_id
+ * @param reserved: ccci_header->reserved
+ * @return CCCI_RETURNVAL_T
+ */
+kal_bool ccci_send_message(kal_uint32 message, kal_uint32 reserved);
+kal_bool ccci_send_message_by_ilm(kal_uint32 message, kal_uint32 reserved);
+kal_int32 ccci_send_ilm(ilm_struct* ilm);
+kal_int32 ccci_register_sysmsgsvc_callback(kal_uint32 msgno, CCCI_SYSMSGSVC_HISR_CALLBACK funp);
+kal_uint32 ccci_get_current_time();
+kal_uint32 ccci_get_duration(kal_uint32 start, kal_uint32 end);
+
+kal_int32 ccci_misc_data_feature_support(kal_uint32 op_id, kal_uint32 len, void *pReturn);
+/* API for CCCI device to obtain the share memory */
+MODEM_RUNTIME_DATA* ccci_get_share_data(void);
+kal_uint8* ccci_get_ap_share_data(CCCI_BOOT_UP_HS_HOST hs_host);
+CCCI_RUNTIME_FEATURE_SUPPORT_T ccci_runtime_data_query(AP_CCCI_RUNTIME_FEATURE_ID feature_id, void *data, kal_uint32 read_len);
+/*!
+ * @brief ccci_check_maxchannel checks the channel exceed the max channel or not
+ * @param channel: ccci channel in CCCI_CHANNEL_T enumeration
+ * @return CCCI_RETURNVAL_T CCCI_SUCCESS means the channel is valid, CCCI_INVALID_PARAM means the channel is invalid
+ */
+kal_int32 ccci_check_maxchannel(CCCI_CHANNEL_T channel);
+
+#define CCCI_ERROR_CODE_END 0xFFFF
+#define CCCI_ERROR_CODE_ASSERT(error_code, ...) _ccci_error_code_assert(error_code, ##__VA_ARGS__, CCCI_ERROR_CODE_END)
+void _ccci_error_code_assert(CCCI_FORCE_ASSERT_ERROR_CODE error_code, ...);
+
+/*!
+ * @brief ccci_init: This function initializes the buffer mode logical channel.
+ * @param channel: logical channel
+ * @param funp: CCCI callback function provided by user
+ * @return CCCI error code, CCCI_RETURNVAL_T
+ */
+kal_int32 ccci_init(CCCI_CHANNEL_T channel, CCCI_CALLBACK funp);
+/*!
+ * @brief ccci_owner_init: Legacy MT6280 CCCI API, ccci_init the channel with task id set. But we don't check task id in MT6290
+ * @param channel: logical channel
+ * @param kal_taskid: task id;
+ * @param funp: CCCI callback function provided by user
+ * @return CCCI error code, CCCI_RETURNVAL_T
+ */
+kal_int32 ccci_owner_init(CCCI_CHANNEL_T channel, kal_taskid task, CCCI_CALLBACK funp);
+/*!
+ * @brief ccci_init_gpdior: This function initializes the GPD mode logical channel.
+ * @param channel: logical channel
+ * @param funp: CCCI callback function provided by user
+ * @return CCCI error code, CCCI_RETURNVAL_T
+ */
+kal_int32 ccci_init_gpdior(CCCI_CHANNEL_T channel, CCCI_IORCALLBACK ior_funp);
+/*!
+ * @brief ccci_deinit: This function de-initializes the Buffer and GPD mode logical channel.
+ * @param channel: logical channel
+ * @return CCCI error code, CCCI_RETURNVAL_T
+ */
+kal_int32 ccci_deinit(CCCI_CHANNEL_T channel);
+/*!
+ * @brief ccci_write provides the api for buffer mode user to send DL buffer to HIF transmission HW.
+ * It allocates ONE TGPD by qbmt_alloc_q_no_tail, if it fails returns CCCI_NO_PHY_CHANNEL
+ * The buff will be memcpy to TGPD->BD and submit the TGPD to HIF HW.
+ * @param channel: logical channel
+ * @param buff: pointer to buffer to be sent
+ * @return CCCI_RETURNVAL_T
+ */
+kal_int32 ccci_write(CCCI_CHANNEL_T channel, CCCI_BUFF_T *buff);
+/*!
+ * @brief ccci_write_gpd provides the api for GPD mode user to send DL buffer to HIF transmission HW.
+ * There's no memcpy in this mode but it will traverse the GPD chain to add the CCCI header.
+ * @param channel: logical channel
+ * @param buff: pointer to buffer to be sent
+ * @param pextinfo: pointer to the ccci io request extension information, ex.CCCI_IO_TX_NO_FLUSH
+ * @return CCCI_RETURNVAL_T
+ */
+kal_int32 ccci_write_gpd(CCCI_CHANNEL_T channel, ccci_io_request_t *ccci_DL_ior, ccci_io_ext_info_t* pextinfo);
+
+/*!
+ * @function ccci_polling_write_gpd
+ * @brief Hook up SDIO polling mode API
+ * Current Usage: NVRAM-->CCCI_FS during mainp()
+ * CCCI_Handshake
+ * @param channel [IN] ccci_channel
+ * @param p_gpd [IN] pointer to the gpd
+ * @param istx [IN] KAL_TRUE: Downlink/Tx KAL_FASE: Uplink/Rx
+ *
+ * @return KAL_TRUE: PASS
+ * KAL_FALSE: NG
+ */
+kal_int32 ccci_polling_io(CCCI_CHANNEL_T channel, qbm_gpd *p_gpd, kal_bool is_tx);
+
+/*!
+ * @brief ccci_ulbuff_cb is the MD side CCCI Rx callback function which registered to the buffer mode HIF driver by HIF_attach
+ * e.g. CCCI_CH_HIFIO_BUFF
+ * @param queue_no: HW queue id, backward compatible with usb core
+ * @param pbuff: pointer to Rx buffer CCCI header
+ * @return void
+ */
+void ccci_ulbuff_cb (kal_uint8 queue_no, CCCI_BUFF_T* pbuff);
+/*!
+ * @brief ccci_ulior_cb is the MD side CCCI Rx callback function which registered to the GPD mode HIF driver by HIF_attach
+ * e.g. CCCI_CH_HIFIO_GPD
+ * @param queue_no: HW queue id, backward compatible with usb core
+ * @param io_request: pointer of ior
+ * @return void
+ */
+void ccci_ulior_cb (kal_uint8 queue_no, ccci_io_request_t* ior);
+
+/*!
+ * @brief ccci_ulior_net_cb is the MD side CCCI CCMNI Rx callback function which registered to the GPD mode HIF driver by HIF_attach
+ * e.g. CCCI_CH_HIFIO_GPD
+ * @param queue_no: HW queue id, backward compatible with usb core
+ * @param io_request: pointer of ior
+ * @return void
+ */
+void ccci_ulior_net_cb (kal_uint8 queue_no, ccci_io_request_t* io_request);
+
+#define ccci_dlior_cb ccci_dlior_agg_cb
+/*!
+ * @brief ccci_dlior_agg_cb is the MD side CCCI Tx DONE aggregated callback function for deq the TGPD e.g. DHL
+ * Unlike ccci_ulior_cb, this function does NOT handle the non-CCCI_CH_USER_GPD types
+ * @param queue_no: HW queue id, backward compatible with usb core
+ * @param io_request: pointer of ior
+ * @return void
+ */
+void ccci_dlior_agg_cb(kal_uint8 queue_no, ccci_io_request_t* io_request);
+/*!
+ * @brief ccci_dlior_single_cb is the MD side CCCI Tx DONE callback function for deq the TGPD e.g. DHL
+ * Unlike ccci_ulior_cb, this function does NOT handle the non-CCCI_CH_USER_GPD types
+ * @param queue_no: HW queue id, backward compatible with usb core
+ * @param io_request: pointer of ior
+ * @return void
+ */
+void ccci_dlior_single_cb(kal_uint8 queue_no, ccci_io_request_t* io_request);
+
+/*!
+ * @brief ccci_mailbox_write formats a local buffer to mailbox format and call ccci_write
+ * @param channel: logical channel
+ * @param id: mailbox id
+ * @return CCCI_RETURNVAL_T
+ */
+kal_int32 ccci_mailbox_write(CCCI_CHANNEL_T channel, kal_uint32 id);
+/*!
+ * @brief ccci_mailbox_write formats a local buffer to mailbox format and call ccci_write
+ * @param channel: logical channel
+ * @param id: mailbox id
+ * @param reserved: ccci_header->reserved
+ * @return CCCI_RETURNVAL_T
+ */
+kal_int32 ccci_mailbox_write_with_reserved(CCCI_CHANNEL_T channel, kal_uint32 id, kal_uint32 reserved);
+/*!
+ * @brief ccci_stream_write formats a local buffer to stream format and call ccci_write
+ * @param channel: logical channel
+ * @param addr: start address of the user buffer
+ * @param len: lenght of the user buffer
+ * @return CCCI_RETURNVAL_T
+ */
+kal_int32 ccci_stream_write(CCCI_CHANNEL_T channel, kal_uint32 addr, kal_uint32 len);
+/*!
+ * @brief ccci_stream_write_with_reserved formats a local buffer to stream format and call ccci_write
+ * @param channel: logical channel
+ * @param addr: start address of the user buffer
+ * @param len: lenght of the user buffer
+ * @param reserved an additional parameter
+ * @return CCCI_RETURNVAL_T
+ */
+kal_int32 ccci_stream_write_with_reserved(CCCI_CHANNEL_T channel, kal_uint32 addr, kal_uint32 len,kal_uint32 reserved);
+
+void ccci_ut_tx_direct_user_dl_ack_dbg(CCCI_BUFF_T *buff);
+void lte_ccci_hw_init(void);
+void lte_ccci_init_handshake_phase1(void);
+void lte_ccci_hal_init(void);
+void lte_ccci_init_handshake_phase2(kal_uint16 _boot_mode);
+void lte_ccci_hw_init_phase2(void);
+/*************************************************************************/
+/* CCCI exception API */
+/*************************************************************************
+* FUNCTION
+* void ccci_exception_handshake
+*
+* DESCRIPTION
+* This function .
+*
+* PARAMETERS
+* channel - logical channel
+* *
+* RETURNS
+* The address of the share memory of the input logical channel
+*
+*************************************************************************/
+void ccci_exception_handshake(void);
+
+/*************************************************************************
+* FUNCTION
+* void ccci_exception_info_passed
+*
+* DESCRIPTION
+* This function .
+*
+* PARAMETERS
+* channel - logical channel
+* *
+* RETURNS
+* The address of the share memory of the input logical channel
+*
+*************************************************************************/
+void ccci_exception_info_passed(void);
+
+kal_bool ccci_queryBootAttributes(kal_uint32 mask);
+
+/*====================Exception Mode APIs===========================*/
+kal_bool ccci_except_init_hmu(kal_uint32 dev_mapping, kal_uint32 ext_devinfo_len, kal_char * ext_devinfo);
+kal_int32 ccci_except_init();
+kal_int32 ccci_except_clear_ch(kal_uint32 ccci_ch);
+kal_int32 ccci_except_set_gpd(kal_uint32 expt_ch, void *p_first_gpd, void *p_last_gpd);
+kal_int32 ccci_except_poll_gpd(kal_uint32 expt_ch, void **pp_first_gpd, void **pp_last_gpd, kal_uint32 *gpd_num);
+kal_int32 ccci_except_hif_st(kal_uint32 expt_dl_ch);
+kal_int32 ccci_except_hif_isr(kal_uint32 expt_dl_ch);
+
+kal_bool cccitty_dev_expt_init(void);
+void ccci_fs_svc_expt_init(void);
+void ccci_get_ccism_shm_info(void **p_membase,kal_uint32 *p_memsize);
+void ccci_get_ccism_expt_shm_info(void **p_membase,kal_uint32 *p_memsize);
+void ccci_get_ccism_scp_shm_info(void **p_membase,kal_uint32 *p_memsize);
+void ccci_get_ex_shm_info(void **p_membase, kal_uint32 *p_memsize);
+void ccci_get_md1md3_shm_info(void **p_membase, kal_uint32 *p_memsize);
+void ccci_get_dhl_shm_info(void **p_membase, kal_uint32 *p_memsize);
+void ccci_get_dhl_raw_shm_info(void **p_membase, kal_uint32 *p_memsize);
+void ccci_get_ccif_shm_info(void **p_membase, kal_uint32 *p_memsize);
+void ccci_get_ccb_data_shm_info(void **p_membase, kal_uint32 *p_memsize);
+void ccci_get_ccb_ctrl_shm_info(void **p_membase, kal_uint32 *p_memsize);
+void ccci_get_dirt_shm_info(void **p_membase, kal_uint32 *p_memsize);
+void ccci_get_dirt2_shm_info(void **p_membase, kal_uint32 *p_memsize);
+
+
+kal_bool ccci_set_ap_runtime_data(CCCI_BOOT_UP_HS_HOST hs_host, void *start_addr, kal_uint32 total_size);
+kal_uint32 ccci_runtime_data_registration(CCCI_BOOT_UP_HS_HOST hs_host, kal_int32 feature_id, CCCI_RUNTIME_DATA_QUERY_REG_CB cb);
+
+kal_int32 ccci_write_except_share_memory();
+
+/*===================FAKE API=======================================*/
+#define ccci_init_handshake_phase1(...)
+#define ccci_init_handshake_phase2(...)
+#define ccci_hal_init(...)
+
+kal_int32 ccci_excep_dbg_logging_InHS2(kal_uint32 index, void* addr);
+
+//#define __SP_BOOTTRC_ENABLE__
+#if defined(__SP_BOOTTRC_ENABLE__)
+extern void ccci_boottrc_send_log(kal_uint32 index, kal_uint32 value);
+#endif
+
+kal_int32 ccci_excep_query_shm(CCCI_EXCEP_MEMORY_REGION region, kal_uint32 *address, kal_uint32 *size, CCCI_EXCEP_MEMORY_TYPE *mem_type);
+kal_int32 ccci_excep_init_shm(CCCI_EXCEP_MEMORY_TYPE mem_type, kal_uint32 addr, kal_uint32 size);
+kal_uint32 ccci_excep_shm_get_total_size();
+
+void ccci_CalculateShareMem(kal_uint32 *start_addr, kal_uint32 *end_addr , kal_uint32 *size);
+
+kal_int32 ccci_debug_add_seq(CCCI_BUFF_T *bufp, kal_uint32 assert_bit);
+kal_int32 ccci_debug_check_seq(CCCI_BUFF_T *bufp);
+void ccci_debug_reset_seq_data();
+void ccci_debug_reset_seq_data_peer(kal_uint32 peer_id);
+kal_uint32 ccci_debug_get_status_register(CCCI_DEBUG_GET_STATUS_MODULE module_id, CCCI_DEBUG_GET_STATUS_CALLBACK funp);
+kal_uint32 ccci_debug_get_status_worker();
+void ccci_debug_set_feature();
+void ccci_write_boot_up_trace(CCCI_BOOT_UP_TRACE_STEP step);
+kal_bool ccci_check_shm_add_and_size(kal_uint32* address, kal_uint32 size);
+void ccci_set_shared_mpu(void);
+kal_uint32 ccci_get_memdump_timeout();
+kal_uint32 ccci_get_debug_assert_bit(kal_uint32 channel);
+
+#if defined (__CCCI_PERF_PROFILING__)
+#include "cpu.h"
+/*
+ * Before you start to collec data , please follow the following step
+ * step 1. change HMU_GPTIMER_PRIODIC_INTERVAL to 100000U in HMU. to make sure the process won't be interrupted
+ * step 2. enable __CCCI_LB_IT__ in hif_ccci.mak, as we need to user the IT code.
+ * step 3. for CCCI_CCMNI_DL_PERF please add monitor upcm_dlvr_dl_sdu
+ * step 4. for CCCI_CCMNI_UL_PERF please add monitor ipc_on_process_ul_queue --> upcm_rcv_ul_sdu
+ */
+#define CCCI_PERF_GET_CYCLE cpu_event_counter_get_cycle
+#define CCCI_PERF_GET_DURATION cpu_event_get_duration
+#define __CCCI_TTY_NEW_TX_DL_PERF__ /* define to profile the ccci_tty new tx dl */
+#define __CCCI_TTY_CONV_TX_DL_PERF__ /* define to profile the ccci_tty conventional tx dl */
+#define __CCCI_TTY_CONV_RX_UL_PERF__ /* define to profile the ccci_tty conventional rx ul */
+#define __CCCI_CCMNI_DL_PERF__ /* define to profile the ccmni dl */
+#define __CCCI_CCMNI_UL_PERF__ /* define to profile the ccmni ul */
+#define __CCCI_DUSER_DL_PERF__ /* define to profile the direct ccci user dl */
+#define __CCCI_DUSER_UL_PERF__ /* define to profile the direct ccci user ul */
+#define CCCI_PERF_REC_CNT 256
+#define CCCI_PERF_REC_CNT_1 CCCI_PERF_REC_CNT-1
+
+/* UL data structure*/
+typedef struct _ccci_profile_ul_t{
+ kal_uint32 sdioc_pq_num_gpd;
+
+ kal_uint32 sdioc_q_process_t;
+
+#ifdef __CCCI_CCMNI_UL_PERF__
+ kal_uint32 ccmni_ipc_on_process_ul_s;
+ kal_uint32 ccmni_upcm_rcv_ul_sdu_s;
+ kal_uint32 ccmni_ipc2upcm_t;
+#endif
+
+#ifdef __CCCI_TTY_CONV_RX_UL_PERF__
+ kal_uint32 tty_conv_rx_CMD_GB_s;
+ kal_uint32 tty_conv_rx_CMD_GB_e;
+ kal_uint32 tty_conv_rx_CMD_GB_t;
+#endif
+
+#ifdef __CCCI_DUSER_UL_PERF__
+#endif
+
+
+} ccci_profile_ul_t;
+
+/* DL data structure*/
+typedef struct _ccci_profile_dl_t{
+ kal_uint32 sdioc_pq_num_gpd;
+
+ kal_uint32 sdioc_submit_ior_s;
+ kal_uint32 sdioc_submit_ior_e;
+
+//====================global end===========================
+
+
+#ifdef __CCCI_CCMNI_DL_PERF__
+ kal_uint32 ipc_on_process_ul_s;
+ kal_uint32 upcm_rcv_ul_sdu_s;
+#endif
+
+#ifdef __CCCI_TTY_CONV_TX_DL_PERF__
+ kal_uint32 tty_conv_tx_s;
+ kal_uint32 tty_conv_tx_e;
+ kal_uint32 tty_conv_tx_t;
+ kal_uint32 tty_conv_tx_cccih_s;
+ kal_uint32 tty_conv_tx_cccih_e;
+ kal_uint32 tty_conv_tx_cccih_t;
+ kal_uint32 tty_conv_tx_sdioc_submit_ior_t;
+#endif
+
+#ifdef __CCCI_DUSER_DL_PERF__
+ kal_uint32 duser_ccci_write_s;
+ kal_uint32 duser_ccci_write_e;
+ kal_uint32 duser_ccci_write_t;
+ kal_uint32 duser_sdioc_submit_ior_t;
+#endif
+
+} ccci_profile_dl_t;
+
+extern ccci_profile_dl_t dl_prof[CCCI_PERF_REC_CNT];
+extern kal_uint32 dl_prof_id;
+extern ccci_profile_ul_t ul_prof[CCCI_PERF_REC_CNT];
+extern kal_uint32 ul_prof_id;
+
+#endif //__CCCI_PERF_PROFILING__
+
+//a structure for ATP to send AT commands to CCCI modules
+typedef struct{
+ LOCAL_PARA_HDR
+ kal_int32 cccifs_it_test_case_id;
+} atp_ccci_it_cccifs_it_ind_struct;
+
+typedef enum{
+ CCCI_CTRL_READY_TO_WRITE_ID_MIN = 0,
+ CCCI_CTRL_READY_TO_WRITE_ID_RESEND_HOST_HS_PKT = CCCI_CTRL_READY_TO_WRITE_ID_MIN,
+ CCCI_CTRL_READY_TO_WRITE_ID_MAX,
+} CCCI_CTRL_READY_TO_WRITE_ID_E;
+
+typedef struct{
+ LOCAL_PARA_HDR
+ CCCI_CTRL_READY_TO_WRITE_ID_E ccci_ctrl_write_id;
+} ccci_ctrl_ready_to_write_struct;
+
+#define CCCI_MEMORY_REMAP_MAX_ARRAY_SIZE (10)
+typedef struct{
+ kal_uint32 modem_start_addr;
+ kal_uint32 memory_size;
+ kal_uint64 ap_start_addr;
+} ccci_memory_remap_info_t;
+kal_int32 ccci_get_shm_memory_remap_info(ccci_memory_remap_info_t *p_memory_remap_info, kal_uint32 read_len);
+
+#if 0 //ccci_get_shm_memory_remap_info reference
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+
+/*!
+ * @brief CCCI_HIF_HW_TYPE_T CCCI hif transmission hw type enum
+ */
+typedef enum
+{
+ CCCI_TYPE_MIN = 0,
+ CCCI_TYPE_SDIO = 1,
+ CCCI_TYPE_CLDMA = 2,
+ CCCI_TYPE_CAIF_GPD = 3,
+ CCCI_TYPE_CAIF_BUF = 4,
+ CCCI_TYPE_CCIF_GPD_AP = 5,
+ CCCI_TYPE_CCIF_GPD_MD = 6,
+ CCCI_TYPE_CCIF_BUF = 7,
+ CCCI_TYPE_CCISM = 8,
+ CCCI_TYPE_AP = 9,
+ CCCI_TYPE_SCP = 10,
+ CCCI_TYPE_EAP = 11,
+ /* dummy interface is for those channels not used */
+ CCCI_TYPE_NOT_SUPPORT, //not support type for backward compatible behavior --> channel exists but return false to user
+ CCCI_TYPE_DUMMY, // = 3
+ CCCI_TYPE_UT_GPD, // = 4
+ CCCI_TYPE_UT_BUFF, // = 5
+ CCCI_TYPE_UT_SPD, // = 6
+ CCCI_TYPE_MAX,
+} CCCI_HIF_HW_TYPE_T;
+
+#define CCCI_NORMAL_BOOT (0)
+#define CCCI_META_BOOT (1)
+#define CCCI_FACTORY_BOOT (2)
+
+//for cccisrv to set hw status
+void ccci_hif_set_hw_status(CCCI_HIF_HW_TYPE_T hw_type, kal_bool new_status);
+//for register host handshake done broadcast CB
+void ccci_reg_host_hs_done_broadcast(CCCI_HOST_HS_DONE_BROADCAST_ID_E broadcast_id, CCCI_HOST_HS_DONE_CALLBACK p_funp);
+
+#endif //#ifndef _CCCI_IF_H
diff --git a/mcu/interface/service/hif/ccci_ims_if.h b/mcu/interface/service/hif/ccci_ims_if.h
new file mode 100644
index 0000000..5edeeec
--- /dev/null
+++ b/mcu/interface/service/hif/ccci_ims_if.h
@@ -0,0 +1,123 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ccci_ims_if.h
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * CCCI_IMS header file
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 03 23 2016 cs.huang
+ * [MOLY00169828] [IMS] EM CCCI Channel
+ * [CCCI IMS] Add IMS EM feature
+ *
+ * 03 23 2016 cs.huang
+ * [MOLY00169828] [IMS] EM CCCI Channel
+ * [CCCI IMS] Add IMS EM feature
+ *
+ * 03 23 2016 cs.huang
+ * [MOLY00169828] [IMS] EM CCCI Channel
+ * [CCCI IMS] Add IMS EM feature
+ *
+ * 12 22 2014 hsin-jun.tang
+ * [MOLY00088229] [CCCI IMS] Add latency measurement feature
+ * .
+ *
+ * 12 19 2014 hsin-jun.tang
+ * [MOLY00088228] [CCCI IMS] Add latency measurement feature
+ * [CCCI IMS] Add latency measurement feature
+ *
+ * 05 30 2013 ap.wang
+ * [MOLY00024263] [CCCI IMS] Add CCCI IMS Data Control channel
+ * [CCCI_IMS] Add IMS_DCTRL channel
+ *
+ * 01 17 2013 ian.cheng
+ * [MOLY00008993] [CCCI_SRV] CCCI_IMS 1st version
+ * [CCCI] CCCI_IMS 1st verison loopback support
+ ****************************************************************************/
+#ifndef _CCCI_IMS_IF_H
+#define _CCCI_IMS_IF_H
+#define CCCI_IMS_LATENCY_MEASUREMENT
+#include "kal_public_api.h"
+#include "ccci_if.h"
+
+typedef enum
+{
+ CCCI_IMS_CTRL = 0x00,
+ CCCI_IMS_VIDEO = 0x01,
+ CCCI_IMS_AUD = 0x02,
+ CCCI_IMS_DCTRL = 0x03,
+ CCCI_IMS_EM = 0x04,
+ CCCI_IMS_CH_MAX = 0x05,
+ CCCI_IMS_DEC_NUM = CCCI_IMS_CH_MAX
+} CCCI_IMS_CH_E;
+
+typedef void (* CCCI_IMSCALLBACK )(kal_uint8 ims_ch, ccci_io_request_t *p_ior);
+kal_bool ccci_ims_svc_init (void);
+kal_bool ccci_ims_dl_req (kal_uint32 ims_ch, ccci_io_request_t *p_ior);
+kal_bool ccci_ims_ulcb_reg (kal_uint8 ims_ch, CCCI_IMSCALLBACK ulcb_funp);
+
+typedef struct
+{
+ // IMS to CLDMA
+ kal_uint32 ccci_ims_mdims_to_hif_start;
+ kal_uint32 ccci_ims_mdims_to_hif_end;
+ kal_uint32 ccci_ims_mdims_to_hif_diff;
+ kal_uint32 ccci_ims_mdims_to_hif_count;
+
+ // CLDMA to IMS
+ kal_uint32 ccci_ims_hif_to_mdims_start;
+ kal_uint32 ccci_ims_hif_to_mdims_end;
+ kal_uint32 ccci_ims_hif_to_mdims_diff;
+ kal_uint32 ccci_ims_hif_to_mdims_count;
+ //
+ kal_uint32 ccci_ims_hif_task_interval;
+} ccci_ims_latency_t;
+
+#endif // _CCCI_IMS_IF_H
diff --git a/mcu/interface/service/hif/ccci_ipc_if.h b/mcu/interface/service/hif/ccci_ipc_if.h
new file mode 100644
index 0000000..9734d2b
--- /dev/null
+++ b/mcu/interface/service/hif/ccci_ipc_if.h
@@ -0,0 +1,165 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * ccci_ipc_if.h
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * Interface of CCCI_IPC service.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 07 18 2019 actory.ou
+ * [MOLY00422579] [MDDP] DPFM porting to VMOLY
+ * [VMOLY][OA] support MDDP & rename to DPFM
+ *
+ * 04 05 2017 chien-hui.lu
+ * [MOLY00239611] [CCCI_IPC][CCCI] add CCCI IPC and runtime feature
+ * [CCCI_IPC][CCCI] add CCCI IPC config for WIPC.
+ *
+ * 04 05 2017 chien-hui.lu
+ * [MOLY00239611] [CCCI_IPC][CCCI] add CCCI IPC and runtime feature
+ * [CCCI][CCCI_IPC] add runtime feature and IPC config for DPFM.
+ *
+ * 07 29 2015 hsin-jun.tang
+ * [MOLY00133114] [CCCI IPC] patch CCCI IPC module ID - APMOD_GF
+ * [CCCI] patch CCCI IPC module ID - garbage filter - UMOLY
+ *
+ * 12 10 2014 cs.huang
+ * [MOLY00080351] [MT6291][CCCI] Add L1Core CCCI service (CCCI SYSMSG/RPC/IPC)
+ * [CCCI] PCore/L1Core CCCI enhancement
+ *
+ * 11 13 2014 cs.huang
+ * [MOLY00084393] [UMOLY][CCCI] CCCI common header arrangement
+ * Merging
+ *
+ * //UMOLY/TRUNK/UMOLY/mcu/pcore/interface/service/hif/ccci_ch_cfg.h
+ *
+ * to //UMOLY/TRUNK/UMOLY/mcu/common/interface/service/hif/ccci_ch_cfg.h
+ *
+ * 08 04 2014 ian.cheng
+ * [MOLY00074458] UMOLY CCCI service
+ * [UMOLY_DEV CCCI PCore Service]
+ *
+ * 06 11 2014 ian.cheng
+ * [MOLY00069231] [TK6291] MOLY CCCI merge
+ * TK6291 CCCI migration
+ *
+ * 03 04 2014 ap.wang
+ * [MOLY00058262] [CCCI_IPC] Add new API for IDC
+ * Add ipc_msgsvc_send_ext_queue_no_wait API
+ *
+ * 10 08 2013 ap.wang
+ * [MOLY00040424] [CCCI_IPC] Modify for IDC
+ * Add MOD_EL1 and AP_MOD_WMT
+ *
+ * 06 04 2013 ap.wang
+ * [MOLY00024894] [CCCI IPC] Add new AP Module ID for l4c
+ * .
+ ****************************************************************************/
+
+#ifndef __CCCI_IPC_IF_H__
+#define __CCCI_IPC_IF_H__
+
+/*******************************************************************************
+ * Define constants.
+ *******************************************************************************/
+
+/* define AP side virtual module id as destination */
+#define APMOD_AGPS 0x0401
+#define APMOD_DHCP 0x0402
+#define APMOD_GPS 0x0403
+#define APMOD_WMT 0x0404
+#define APMOD_MISCTA 0x0405
+#define APMOD_CCCI 0x0406
+#define APMOD_GF 0x0407
+#define APMOD_PKTTRC 0x0408
+#define APMOD_MDDP 0x0409
+#define APMOD_LWXN 0x040A
+/*******************************************************************************
+ * Define data structures.
+ *******************************************************************************/
+
+/* Struct to define the communication ilm between two cores */
+typedef struct ipc_ilm_struct
+{
+ kal_uint32 src_mod_id;
+ kal_uint32 dest_mod_id;
+ kal_uint32 sap_id;
+ kal_uint32 msg_id;
+ local_para_struct *local_para_ptr;
+ peer_buff_struct *peer_buff_ptr;
+} ipc_ilm_t;
+
+
+/*******************************************************************************
+ * Define macros.
+ *******************************************************************************/
+
+
+/*******************************************************************************
+ * Define export variables.
+ *******************************************************************************/
+
+
+
+/*******************************************************************************
+ * Define export function.
+ *******************************************************************************/
+extern ipc_ilm_t* ipc_msgsvc_allocate_ilm(module_type module_id);
+extern kal_bool ipc_msgsvc_send_ext_queue(ipc_ilm_t*ipc_ilm_t_ptr);
+extern kal_bool ipc_msgsvc_send_ext_queue_no_wait(ipc_ilm_t*ipc_ilm_t_ptr);
+extern void ipc_msgsvc_init(void);
+typedef void (*CCCI_IPC_CB_FUNP)(ilm_struct *ilm);
+extern kal_bool ccci_register_ipc_cb_funp(kal_uint32 msg_id, CCCI_IPC_CB_FUNP funp);
+
+
+#endif /* !__CCCI_IPC_IF_H__ */
+
+
diff --git a/mcu/interface/service/hif/ccci_ipc_module_conf.h b/mcu/interface/service/hif/ccci_ipc_module_conf.h
new file mode 100644
index 0000000..e50496d
--- /dev/null
+++ b/mcu/interface/service/hif/ccci_ipc_module_conf.h
@@ -0,0 +1,257 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * ccci_ipc_module_conf.h
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * Header file of CCCI_IPC_MODULE.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 07 30 2019 actory.ou
+ * [MOLY00423305] [MCIF] Patch back - Config Files
+ * [VMOLY][OA] add dummy WFPA module to drop msg from AP
+ *
+ * 07 18 2019 actory.ou
+ * [MOLY00422579] [MDDP] DPFM porting to VMOLY
+ * [VMOLY][OA] support MDDP & rename to DPFM
+ *
+ * 04 19 2019 actory.ou
+ * [MOLY00395176] [Thin Modem 1.0][PCIe platform] PCIe Platform 1st Release on Apollo
+ * [PCIe][OA][CCCI] support pcie thin modem 1.0
+ *
+ * 06 12 2017 chien-hui.lu
+ * [MOLY00256760] [MT6763][Bianco][N1][MTBF][PHONE][Overnight][HQ][Lab][Ericsson][HCR][ASSERT] file:mcu/common/service/hif/cccisrv/ccci_ipc/src/ccci_ipc_data.c line:1103
+ * [CCCI_IPC] add for MOD_EL1_MPC.
+ *
+ * 04 06 2017 chien-hui.lu
+ * [MOLY00239611] [CCCI_IPC][CCCI] add CCCI IPC and runtime feature
+ * [CCCI_IPC] add CCCI IPC config for DPFM.
+ *
+ * 04 05 2017 chien-hui.lu
+ * [MOLY00239611] [CCCI_IPC][CCCI] add CCCI IPC and runtime feature
+ * [CCCI_IPC][CCCI] add CCCI IPC config for WIPC.
+ *
+ * 04 05 2017 chien-hui.lu
+ * [MOLY00239611] [CCCI_IPC][CCCI] add CCCI IPC and runtime feature
+ * [CCCI_IPC][CCCI] fix CCCI IPC no module DPFM build fail.
+ *
+ * 04 05 2017 chien-hui.lu
+ * [MOLY00239611] [CCCI_IPC][CCCI] add CCCI IPC and runtime feature
+ * [CCCI_IPC][CCCI] add CCCI IPC config for DPFM.
+ *
+ * 04 05 2017 chien-hui.lu
+ * [MOLY00239611] [CCCI_IPC][CCCI] add CCCI IPC and runtime feature
+ * [CCCI][CCCI_IPC] add runtime feature and IPC config for DPFM.
+ *
+ * 07 29 2015 hsin-jun.tang
+ * [MOLY00133114] [CCCI IPC] patch CCCI IPC module ID - APMOD_GF
+ * [CCCI] patch CCCI IPC module ID - garbage filter - UMOLY
+ *
+ * 12 10 2014 cs.huang
+ * [MOLY00080351] [MT6291][CCCI] Add L1Core CCCI service (CCCI SYSMSG/RPC/IPC)
+ * [CCCI] PCore/L1Core CCCI enhancement
+ *
+ * 11 25 2014 cs.huang
+ * [MOLY00084258] [MT6795][Modem][Feature]Please support Garbage filter from network
+ * [CCCI IPC] Add CCCI IPC msgid for garbage filter
+ *
+ * 11 25 2014 cs.huang
+ * [MOLY00084258] [MT6795][Modem][Feature]Please support Garbage filter from network
+ * [CCCI IPC] Add CCCI IPC msgid for garbage filter
+ *
+ * 11 13 2014 cs.huang
+ * [MOLY00084258] [MT6795][Modem][Feature]Please support Garbage filter from network
+ * [CCCI IPC] Add CCCI IPC msgid for garbage filter
+ * 11 12 2014 cs.huang
+ * [MOLY00084091] [MT6795] [SYSTEM SERVICE] [CLIB] porting C time function to MD
+ * [CCCI IPC] Support Clibtime feature
+ *
+ * 08 04 2014 ian.cheng
+ * [MOLY00074458] UMOLY CCCI service
+ * [UMOLY_DEV CCCI PCore Service]
+ *
+ * 01 21 2014 wcpuser_integrator
+ * [MOLY00054475] SGLTE option rename
+ * .
+ *
+ * 10 08 2013 ap.wang
+ * [MOLY00040424] [CCCI_IPC] Modify for IDC
+ * Fix EL1 module error
+ *
+ * 10 08 2013 ap.wang
+ * [MOLY00040424] [CCCI_IPC] Modify for IDC
+ * Add MOD_EL1 and AP_MOD_WMT
+ *
+ * 07 15 2013 ap.wang
+ * [MOLY00029794] [CCCI_IPC] Add compile option __SGLTE__ for MMDC
+ *
+ * 07 12 2013 aj.tsai
+ * [MOLY00029691] check-in AOMGR related code
+ * check-in aomgr code
+ * DHCPV4 ok
+ *
+ * 06 04 2013 ap.wang
+ * [MOLY00024894] [CCCI IPC] Add new AP Module ID for l4c
+ * .
+ ****************************************************************************/
+
+#ifndef __CCCI_IPC_MODULE_CONF_H__
+#define __CCCI_IPC_MODULE_CONF_H__
+
+#if defined(__CCCI_PRODUCT_TYPE_THIN_MODEM__) //thin modem configuration
+ // Cross Core IPC Direction : AP 2 MD
+ // Priority --> Local module ID --> External ID --> Max sent message --> Support(true) or not support(false)
+ X_IPC_MODULE_CONF(1, MOD_L4C,0,1, KAL_FALSE), //TASK_ID_1
+ #if defined(__GEMINI__)
+ X_IPC_MODULE_CONF(1, MOD_L4C_2, 1, 1, KAL_FALSE), //TASK_ID_2
+ #if (GEMINI_PLUS >= 3)
+ X_IPC_MODULE_CONF(1, MOD_L4C_3, 2, 1, KAL_FALSE), //TASK_ID_3
+ #endif /* GEMINI_PLUS >= 3 */
+ #if (GEMINI_PLUS >= 4)
+ X_IPC_MODULE_CONF(1, MOD_L4C_4, 3, 1, KAL_FALSE), //TASK_ID_4
+ #endif /* GEMINI_PLUS >= 4 */
+ #endif /* __GEMINI__ */
+ X_IPC_MODULE_CONF(1, MOD_AOMGR, 4, 1, KAL_FALSE), //TASK_ID_4
+ #if defined(__LTE_RAT__)
+ X_IPC_MODULE_CONF(1, MOD_EL1, 5, 1, KAL_FALSE), //TASK_ID_5
+ #endif
+ // TASK_ID_6 is reserved to MISCTA //TASK_ID_6
+ X_IPC_MODULE_CONF(1, MOD_CCCIIPC, 7, 1, KAL_TRUE), //TASK_ID_7
+ #if defined(__IPCORE_SUPPORT__) && !defined(IPCORE_NOT_PRESENT) && !defined(__IPCORE_TASK_DISABLE__)
+ X_IPC_MODULE_CONF(1,MOD_IPCORE, 8, 1, KAL_FALSE), //TASK_ID_8
+ #endif
+ X_IPC_MODULE_CONF(1, MOD_DPFM, 9, 1, KAL_FALSE), //TASK_ID_9
+ X_IPC_MODULE_CONF(1, MOD_UFPM, 10, 1, KAL_FALSE), //TASK_ID_10
+ X_IPC_MODULE_CONF(1, MOD_USBCLASS, 11, 1, KAL_FALSE), //TASK_ID_11
+ #ifdef WIPC_SUPPORT
+ X_IPC_MODULE_CONF(1,MOD_WIPC, 12, 1, KAL_FALSE), //TASK_ID_12
+ #endif
+ #if defined(__LTE_RAT__)
+ X_IPC_MODULE_CONF(1, MOD_EL1_MPC, 5, 1, KAL_FALSE), //TASK_ID_13
+ #endif
+ #ifdef __MCIF_WIFI_SUPPORT__
+ X_IPC_MODULE_CONF(1, MOD_WFPM, 13, 1, KAL_FALSE),
+ #else
+ X_IPC_MODULE_CONF(1, MOD_DUMMY_CCCISRV, 13, 1, KAL_FALSE),
+ #endif
+
+ // Cross Core IPC Direction : MD 2 AP
+ // Priority --> Local module ID --> External ID --> Max sent message --> Destination Chip
+ #define AP_UINFY_ID_FLAG ((kal_uint32)1<<31)
+ X_IPC_MODULE_CONF(1, APMOD_AGPS, (0|AP_UINFY_ID_FLAG), 1, KAL_FALSE),
+ X_IPC_MODULE_CONF(1, APMOD_DHCP, (1|AP_UINFY_ID_FLAG), 1, KAL_FALSE),
+ X_IPC_MODULE_CONF(1, APMOD_GPS , (2|AP_UINFY_ID_FLAG), 1, KAL_FALSE),
+ X_IPC_MODULE_CONF(1, APMOD_WMT , (3|AP_UINFY_ID_FLAG), 1, KAL_FALSE),
+ X_IPC_MODULE_CONF(1, APMOD_MISCTA , (4|AP_UINFY_ID_FLAG), 1, KAL_FALSE),
+ X_IPC_MODULE_CONF(1, APMOD_CCCI , (5|AP_UINFY_ID_FLAG), 1, KAL_TRUE),
+ X_IPC_MODULE_CONF(1, APMOD_GF , (6|AP_UINFY_ID_FLAG), 1, KAL_FALSE),
+ X_IPC_MODULE_CONF(1, APMOD_PKTTRC , (7|AP_UINFY_ID_FLAG), 1, KAL_FALSE),
+ X_IPC_MODULE_CONF(1, APMOD_MDDP , (8|AP_UINFY_ID_FLAG), 1, KAL_FALSE),
+ #ifdef WIPC_SUPPORT
+ X_IPC_MODULE_CONF(1,APMOD_LWXN, (9|AP_UINFY_ID_FLAG), 1, KAL_FALSE),
+ #endif
+
+#else //if defined(__CCCI_PRODUCT_TYPE_THIN_MODEM__)
+ // Cross Core IPC Direction : AP 2 MD
+ // Priority --> Local module ID --> External ID --> Max sent message --> Destination Chip
+ X_IPC_MODULE_CONF(1, MOD_L4C,0,1, KAL_TRUE), //TASK_ID_1
+ #if defined(__GEMINI__)
+ X_IPC_MODULE_CONF(1, MOD_L4C_2, 1, 1, KAL_TRUE), //TASK_ID_2
+ #if (GEMINI_PLUS >= 3)
+ X_IPC_MODULE_CONF(1, MOD_L4C_3, 2, 1, KAL_TRUE), //TASK_ID_3
+ #endif /* GEMINI_PLUS >= 3 */
+ #if (GEMINI_PLUS >= 4)
+ X_IPC_MODULE_CONF(1, MOD_L4C_4, 3, 1, KAL_TRUE), //TASK_ID_4
+ #endif /* GEMINI_PLUS >= 4 */
+ #endif /* __GEMINI__ */
+ X_IPC_MODULE_CONF(1, MOD_AOMGR, 4, 1, KAL_TRUE), //TASK_ID_4
+ #if defined(__LTE_RAT__)
+ X_IPC_MODULE_CONF(1, MOD_EL1, 5, 1, KAL_TRUE), //TASK_ID_5
+ #endif
+ // TASK_ID_6 is reserved to MISCTA //TASK_ID_6
+ X_IPC_MODULE_CONF(1, MOD_CCCIIPC, 7, 1, KAL_TRUE), //TASK_ID_7
+ #if defined(__IPCORE_SUPPORT__) && !defined(IPCORE_NOT_PRESENT) && !defined(__IPCORE_TASK_DISABLE__)
+ X_IPC_MODULE_CONF(1,MOD_IPCORE, 8, 1, KAL_TRUE), //TASK_ID_8
+ #endif
+ X_IPC_MODULE_CONF(1, MOD_DPFM, 9, 1, KAL_TRUE), //TASK_ID_9
+ X_IPC_MODULE_CONF(1, MOD_UFPM, 10, 1, KAL_TRUE), //TASK_ID_10
+ X_IPC_MODULE_CONF(1, MOD_USBCLASS, 11, 1, KAL_TRUE), //TASK_ID_11
+ #ifdef WIPC_SUPPORT
+ X_IPC_MODULE_CONF(1,MOD_WIPC, 12, 1, KAL_TRUE), //TASK_ID_12
+ #endif
+ #if defined(__LTE_RAT__)
+ X_IPC_MODULE_CONF(1, MOD_EL1_MPC, 5, 1, KAL_TRUE), //TASK_ID_13
+ #endif
+ #ifdef __MCIF_WIFI_SUPPORT__
+ X_IPC_MODULE_CONF(1, MOD_WFPM, 13, 1, KAL_TRUE),
+ #else
+ X_IPC_MODULE_CONF(1, MOD_DUMMY_CCCISRV, 13, 1, KAL_TRUE),
+ #endif
+
+ // Cross Core IPC Direction : MD 2 AP
+ // Priority --> Local module ID --> External ID --> Max sent message --> Destination Chip
+ #define AP_UINFY_ID_FLAG ((kal_uint32)1<<31)
+ X_IPC_MODULE_CONF(1, APMOD_AGPS, (0|AP_UINFY_ID_FLAG), 1, KAL_TRUE),
+ X_IPC_MODULE_CONF(1, APMOD_DHCP, (1|AP_UINFY_ID_FLAG), 1, KAL_TRUE),
+ X_IPC_MODULE_CONF(1, APMOD_GPS , (2|AP_UINFY_ID_FLAG), 1, KAL_TRUE),
+ X_IPC_MODULE_CONF(1, APMOD_WMT , (3|AP_UINFY_ID_FLAG), 1, KAL_TRUE),
+ X_IPC_MODULE_CONF(1, APMOD_MISCTA , (4|AP_UINFY_ID_FLAG), 1, KAL_TRUE),
+ X_IPC_MODULE_CONF(1, APMOD_CCCI , (5|AP_UINFY_ID_FLAG), 1, KAL_TRUE),
+ X_IPC_MODULE_CONF(1, APMOD_GF , (6|AP_UINFY_ID_FLAG), 1, KAL_TRUE),
+ X_IPC_MODULE_CONF(1, APMOD_PKTTRC , (7|AP_UINFY_ID_FLAG), 1, KAL_TRUE),
+ X_IPC_MODULE_CONF(1, APMOD_MDDP , (8|AP_UINFY_ID_FLAG), 1, KAL_TRUE),
+ #ifdef WIPC_SUPPORT
+ X_IPC_MODULE_CONF(1,APMOD_LWXN, (9|AP_UINFY_ID_FLAG), 1, KAL_TRUE),
+ #endif
+#endif //if defined(__CCCI_PRODUCT_TYPE_THIN_MODEM__)
+#endif /* !__CCCI_IPC_MODULE_CONF_H__ */
+
+
diff --git a/mcu/interface/service/hif/ccci_it_ctrl_if.h b/mcu/interface/service/hif/ccci_it_ctrl_if.h
new file mode 100644
index 0000000..27f1856
--- /dev/null
+++ b/mcu/interface/service/hif/ccci_it_ctrl_if.h
@@ -0,0 +1,159 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * ccci_it_ctrl_if.h
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * The API header file of CCCI IT Mode Control.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 03 27 2013 ap.wang
+ * [MOLY00012845] [CCCI_IT_CTRL] Add CCCI_IMS IT mode control and modify generator DL api
+ *
+ * 03 21 2013 ap.wang
+ * [MOLY00012408] [CCCI_IT_CTRL] Add CCCI_TTY and RT Queue IT mode control
+ *
+ * 03 18 2013 ap.wang
+ * [MOLY00012125] [CCCI_IT_CTRL] Change IT mode arrangement and Add parameter features
+ * [CCCI_IT_CTRL] Add Downlink packet gen API
+ *
+ * 03 11 2013 ap.wang
+ * [MOLY00011697] [CCCI_IPC] Modify for IT Loopback and compile warning fix
+ * [CCCI_IPC] Modify for IT Loopback and compile warning fix
+ ****************************************************************************/
+#ifndef __CCCI_IT_CTRL_IF_H__
+#define __CCCI_IT_CTRL_IF_H__
+
+/*******************************************************************************
+ * Include header files
+ *******************************************************************************/
+#include "kal_general_types.h"
+#include "ccci_if.h"
+
+
+/*******************************************************************************
+ * Data Structure Definition
+ *******************************************************************************/
+
+/*!
+ * @brief register information of a test module.
+ *
+ * @param p_ret_err_str returned string of error description.
+ * This string buffer is allocated by caller (sys_test) module,
+ * and the callee module fills in error description in this buffer.
+ * @param p_ret_err_str_sz The caller module use this parameter to define the max size of error string buffer,
+ * and the callee module fills in the actual size of error string buffer when returning.
+ * Note: The callee module CAN NOT fill into 'p_ret_err_str' with exceeding size limit.
+ * Useful function : snprintf(p_err_str, p_err_str_sz, foramt_str, ...)
+ */
+
+typedef kal_bool (*it_mode_func)(void *p_param, kal_char *p_ret_err_str, kal_uint32 *p_ret_err_str_sz);
+
+typedef struct _IT_MODE_T {
+ kal_char *it_mode_description; /* string description of it mode function */
+ it_mode_func it_mode_func; /* it mode function */
+ void *it_mode_func_param; /* parameter of it mode function */
+ kal_uint32 it_task_number; /* number of task to execute this function - no use now */
+} IT_MODE_T;
+
+/*******************************************************************************
+ * Public API
+ *******************************************************************************/
+
+/*!
+ * ccci_service_it_table_reg
+ *
+ * @brief register test function to SYS_TEST module.
+ *
+ * @param p_mod_name test module naming.
+ * @param p_tcase test function information used to register.
+ * @param tcase_num number of test function struct.
+ *
+ * @return kal_bool KAL_TRUE if success, otherwise KAL_FALSE if fail.
+ */
+kal_bool ccci_it_mode_control_table_reg(kal_char *p_module_name, IT_MODE_T *p_mode, kal_uint32 mode_num);
+
+/*!
+ * ccci_it_gen_packet
+ *
+ * @brief Downlink packet GPD generator.
+ *
+ * @param type qbm_gpd type of packet.
+ * @param p_fun generator function pointer.
+ *
+ * @return kal_bool KAL_TRUE if success, otherwise KAL_FALSE if fail.
+ */
+ccci_io_request_t ccci_it_gen_packet(qbm_type type);
+
+
+/*!
+ * Example usage:
+ *
+ * @code
+
+ #include "ccci_service_it_if.h"
+
+ IT_TEST_CASE_T it_function_table[]={
+ {"IT function 1"}, it_function_1, NULL},
+ {"IT function 2"}, it_function_2, NULL}
+ }
+
+ kal_bool "Module name"_it_create(){
+ return ccci_service_it_table_reg("Module name",
+ it_function_table,
+ sizeof(it_function_table) / sizeof(IT_TEST_CASE_T)
+ );
+ }
+
+ * @endcode
+ */
+
+#endif //__CCCI_IT_CTRL_IF_H__
diff --git a/mcu/interface/service/hif/ccci_rpc_conf.h b/mcu/interface/service/hif/ccci_rpc_conf.h
new file mode 100644
index 0000000..7a89701
--- /dev/null
+++ b/mcu/interface/service/hif/ccci_rpc_conf.h
@@ -0,0 +1,226 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * ccci_rpc_conf.h
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * CCCI RPC OP ID definition
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 08 04 2021 li-cheng.tsai
+ * [MOLY00665029] [Gen97]AMMS DRDI new architecture porting
+ *
+ * [NR15.R3.MD700.MP] feature id and rpc op id code sync from NR15.R3.MP
+ *
+ * 09 18 2020 li-cheng.tsai
+ * [MOLY00569647] [MP7.PRECHECKIN.DEV][Code sync] sync code from T700
+ * [R3.MP][OA]DATA CARD RPC OP ID config modify.
+ *
+ * 09 15 2020 li-cheng.tsai
+ * [MOLY00569647] [MP7.PRECHECKIN.DEV][Code sync] sync code from T700
+ * [MP7/PRECHECKIN.DEV][OA]DATA CARD RPC OP ID config modify.
+ *
+ * 08 19 2020 adel.liao
+ * [MOLY00557552] [MT6880][Colgin][M.2][MP6][SQC][Function][SI1]After enable PIN and restart,can not enter the PIN input interface,and camp on network directly.
+ *
+ * DATA CARD RPC OP ID config modify.
+ *
+ * 08 04 2020 li-cheng.tsai
+ * [MOLY00548378] [Gen97][Colgin] DRDI enable for MT6880_MMRF_MT6190_EVB
+ *
+ * [T700 MP][OA][MD CCCI]patch back from MT6880, open rpc service IPC_RPC_GPIO_ADC_GET_PINVALUE_OP
+ *
+ * 07 22 2020 li-cheng.tsai
+ * [MOLY00548378] [Gen97][Colgin] DRDI enable for MT6880_MMRF_MT6190_EVB
+ *
+ * [MT6880 MP][OA][MD CCCI]open rpc service IPC_RPC_GPIO_ADC_GET_PINVALUE_OP
+ *
+ * 02 28 2020 vend_mcd_cienet025
+ * [MOLY00502290] [OK] SD??SIM???????, ?????????2????SIM???NANO SD?
+ * huawei 5G project RPC request
+ *
+ * 12 06 2019 jin.lee
+ * [MOLY00457747] [6763 LG KOR project] call for LGE_SECURITY patch from LR11.W1552.MD.TC01.SP to LR12A.R3.TC01.DEV
+ *
+ * . Migrate to VOMOLY.TRUNK.VOMLY
+ *
+ * 08 08 2019 actory.ou
+ * [MOLY00427628] [MMRF] query operator index for common sar feature
+ * [VMOLY][OA] sync ccci rpc msg
+ *
+ * 04 19 2019 actory.ou
+ * [MOLY00395176] [Thin Modem 1.0][PCIe platform] PCIe Platform 1st Release on Apollo
+ * [PCIe][OA][CCCI] support pcie thin modem 1.0
+ *
+ * 08 16 2017 chien-hui.lu
+ * [MOLY00271091] [CCCI RPC] add RPC OP ID for get AP system property
+ * [CCCI_RPC] add RPC OP ID for AP system property. (OPPO feature request)
+ *
+ * 07 04 2017 chien-hui.lu
+ * [MOLY00260407] [MML1][RF] drdi index from ap dtsi
+ * [CCCI RPC] add for DTSI query.
+ *
+ * 05 23 2017 chien-hui.lu
+ * [MOLY00251502] [IPCORE][LHIFCORE] dynamic queue mapping
+ * [CCCI_RPC][LHIFCORE] dynamic queue mapping.
+ *
+ * 11 13 2014 cs.huang
+ * [MOLY00084393] [UMOLY][CCCI] CCCI common header arrangement
+ * Merging
+ *
+ * //UMOLY/TRUNK/UMOLY/mcu/pcore/interface/service/hif/ccci_ch_cfg.h
+ *
+ * to //UMOLY/TRUNK/UMOLY/mcu/common/interface/service/hif/ccci_ch_cfg.h
+ *
+ * 06 11 2014 ian.cheng
+ * [MOLY00069231] [TK6291] MOLY CCCI merge
+ * TK6291 CCCI migration
+ *
+ * 03 18 2014 cs.huang
+ * [MOLY00059872] [CCCI RPC] Add ADC/GPIO pin value op id, and adjust RF_CLK_BUFFER op id
+ * [CCCI RPC] Add ADC/GPIO pin value op id, and adjust RF_CLK_BUFFER op id.
+ *
+ ****************************************************************************/
+#if defined(__CCCI_PRODUCT_TYPE_THIN_MODEM__) //thin modem configuration
+ // Format: OPNAME, OPID (2 bytes) is support or not
+ X_CCCI_RPC_CONF(IPC_RPC_CPSVC_SECURE_ALGO_OP , 0x2001 , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_GET_SECURE_RO_OP , 0x2002 , KAL_FALSE)
+
+#ifdef LGE_FW_COMMON
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_READSIMLOCKTYPE_OP , 0x3001 , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_READFUSGFLAG_OP , 0x3002 , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_CHECKUNLOCKCODEVALIDNESS_OP , 0x3003 , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_CHECKNETWORKCODEVALIDNESS_OP , 0x3004 , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_WRITESIMLOCKTYPE_OP , 0x3005 , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_READIMEI_OP , 0x3006 , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_WRITEIMEI_OP , 0x3007 , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_READNETWORKCODELISTNUM_OP , 0x3008 , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_READNETWORKCODE_OP , 0x3009 , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_WRITE_NETWORK_CODE_LIST_NUM_OP , 0x300A , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_WRITE_UNLOCK_CODE_VERIFY_FAIL_COUNT_OP , 0x300B , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_READ_UNLOCK_CODE_VERIFY_FAIL_COUNT_OP , 0x300C , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_WRITE_UNLOCK_FAIL_COUNT_OP , 0x300D , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_READ_UNLOCK_FAIL_COUNT_OP , 0x300E , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_WRITE_UNLOCK_CODE_OP , 0x300F , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_VERIFY_UNLOCK_CODE_OP , 0x3010 , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_WRITE_NETWORK_CODE_OP , 0x3011 , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_INIT_SIM_LOCK_DATA_OP , 0x3012 , KAL_FALSE)
+#endif
+
+ X_CCCI_RPC_CONF(IPC_RPC_EINT_GETNUM_OP , 0x4001 , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_GPIO_GETPIN_OP , 0x4002 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_ADC_GETNUM_OP , 0x4003 , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_QUERY_EMI_OP , 0x4004 , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_EINT_GETATTRIBUTE_OP , 0x4005 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_GPIO_GETVALUE_OP , 0x4006 , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_ADC_GETVALUE_OP , 0x4007 , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_RF_CLK_BUFFER_OP , 0x4008 , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_GPIO_ADC_GET_PINVALUE_OP , 0x4009 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_USIM2NFC_OP , 0x400A , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_DSP_EMI_MPU_SETTING , 0x400B , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_CCCI_QUEUE_MAPPING , 0x400C , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_LHIFCORE_QUEUE_MAPPING , 0x400D , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_DTSI_QUERY_OP , 0x400E , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_QUERY_AP_SYS_PROPERTY , 0x400F , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_SAR_TABLE_IDX_QUERY_OP , 0x4010 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_EFUSE_BLOWING , 0x4011 , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_TRNG_GET_RANDOM_NUMBER , 0x4012 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_QUERY_CARD_TYPE , 0x4013 , KAL_FALSE)
+ X_CCCI_RPC_CONF(IPC_RPC_AMMS_DRDI_CONTROL , 0x4014 , KAL_FALSE)
+ X_CCCI_RPC_CONF(EEMCS_OP_IT_VAL , 0x4321 , KAL_TRUE)
+#else //if defined(__CCCI_PRODUCT_TYPE_THIN_MODEM__)
+ // Format: OPNAME, OPID (2 bytes) is support or not
+ X_CCCI_RPC_CONF(IPC_RPC_CPSVC_SECURE_ALGO_OP , 0x2001 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_GET_SECURE_RO_OP , 0x2002 , KAL_TRUE)
+
+#ifdef LGE_FW_COMMON
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_READSIMLOCKTYPE_OP , 0x3001 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_READFUSGFLAG_OP , 0x3002 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_CHECKUNLOCKCODEVALIDNESS_OP , 0x3003 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_CHECKNETWORKCODEVALIDNESS_OP , 0x3004 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_WRITESIMLOCKTYPE_OP , 0x3005 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_READIMEI_OP , 0x3006 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_WRITEIMEI_OP , 0x3007 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_READNETWORKCODELISTNUM_OP , 0x3008 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_READNETWORKCODE_OP , 0x3009 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_WRITE_NETWORK_CODE_LIST_NUM_OP , 0x300A , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_WRITE_UNLOCK_CODE_VERIFY_FAIL_COUNT_OP , 0x300B , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_READ_UNLOCK_CODE_VERIFY_FAIL_COUNT_OP , 0x300C , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_WRITE_UNLOCK_FAIL_COUNT_OP , 0x300D , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_READ_UNLOCK_FAIL_COUNT_OP , 0x300E , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_WRITE_UNLOCK_CODE_OP , 0x300F , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_VERIFY_UNLOCK_CODE_OP , 0x3010 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_WRITE_NETWORK_CODE_OP , 0x3011 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_LGESVC_FAC_INIT_SIM_LOCK_DATA_OP , 0x3012 , KAL_TRUE)
+#endif
+
+ X_CCCI_RPC_CONF(IPC_RPC_EINT_GETNUM_OP , 0x4001 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_GPIO_GETPIN_OP , 0x4002 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_ADC_GETNUM_OP , 0x4003 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_QUERY_EMI_OP , 0x4004 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_EINT_GETATTRIBUTE_OP , 0x4005 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_GPIO_GETVALUE_OP , 0x4006 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_ADC_GETVALUE_OP , 0x4007 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_RF_CLK_BUFFER_OP , 0x4008 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_GPIO_ADC_GET_PINVALUE_OP , 0x4009 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_USIM2NFC_OP , 0x400A , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_DSP_EMI_MPU_SETTING , 0x400B , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_CCCI_QUEUE_MAPPING , 0x400C , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_LHIFCORE_QUEUE_MAPPING , 0x400D , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_DTSI_QUERY_OP , 0x400E , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_QUERY_AP_SYS_PROPERTY , 0x400F , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_SAR_TABLE_IDX_QUERY_OP , 0x4010 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_EFUSE_BLOWING , 0x4011 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_TRNG_GET_RANDOM_NUMBER , 0x4012 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_QUERY_CARD_TYPE , 0x4013 , KAL_TRUE)
+ X_CCCI_RPC_CONF(IPC_RPC_AMMS_DRDI_CONTROL , 0x4014 , KAL_TRUE)
+ X_CCCI_RPC_CONF(EEMCS_OP_IT_VAL , 0x4321 , KAL_TRUE)
+#endif
diff --git a/mcu/interface/service/hif/ccci_rpc_if.h b/mcu/interface/service/hif/ccci_rpc_if.h
new file mode 100644
index 0000000..c6418e5
--- /dev/null
+++ b/mcu/interface/service/hif/ccci_rpc_if.h
@@ -0,0 +1,144 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * ccci_rpc_if.h
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * Interface of CCCI_RPC service.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 04 19 2019 actory.ou
+ * [MOLY00395176] [Thin Modem 1.0][PCIe platform] PCIe Platform 1st Release on Apollo
+ * [PCIe][OA][CCCI] support pcie thin modem 1.0
+ *
+ * 02 17 2014 cs.huang
+ * [MOLY00056246] [MT6595] [CCCI] Add CCCI RPC general group API
+ * [CCCI RPC] Add CCCI RPC general query function.
+ *
+ * 06 27 2013 ap.wang
+ * [MOLY00027544] [CCCI RPC] Add CCCI RPC SVC and API
+ * [CCCI_RPC] Modify for sceurity RPC service
+ *
+ * 05 09 2013 ap.wang
+ * [MOLY00021998] [MT6290 Bring-up][CCCI_IT] CCCI IT related code checkin
+ * [CCCI RPC] CCCI RPC IT modify and rx callback rule modify
+ *
+ * 03 18 2013 vend_brian.chiang
+ * [MOLY00010750] [CCCI_RPC] new feature check in
+ * fix compile warning and build error
+ ****************************************************************************/
+
+#ifndef __CCCI_RPC_IF_H__
+#define __CCCI_RPC_IF_H__
+
+#include "kal_general_types.h"
+
+/*******************************************************************************
+ * Define marco or constant.
+ *******************************************************************************/
+/*******************************************************************************
+ * Define data structures.
+ *******************************************************************************/
+/*******************************************************************************
+ * RPC op code
+ *******************************************************************************/
+
+#undef X_CCCI_RPC_CONF
+#define X_CCCI_RPC_CONF(OPNAME, OPID, IS_SUPPORT) OPNAME = OPID,
+typedef enum
+{
+ #include "ccci_rpc_conf.h"
+} IPC_RPC_OP_ID_T;
+#undef X_CCCI_RPC_CONF
+
+/*******************************************************************************
+ * Define macros.
+ *******************************************************************************/
+
+/*******************************************************************************
+ * Define export variables.
+ *******************************************************************************/
+
+/*******************************************************************************
+ * Declare function prototype.
+ *******************************************************************************/
+
+/* Function for rpc init*/
+kal_bool ccci_rpc_svc_init(void);
+kal_bool ccci_rpc_task_main_init(void);
+
+/* RPC service API */
+kal_int32 IPC_RPC_Wrapper(IPC_RPC_OP_ID_T rpc_op,...);
+
+/* RPC service function*/
+kal_int32 IPC_RPC_Secure_Algo (kal_uint8 Direction, kal_uint32 ContentAddr,
+ kal_uint32 ContentLen, kal_uint8 *CustomSeed,
+ kal_uint8 *ResText);
+
+kal_int32 IPC_RPC_Get_Secure_RO(kal_uint8* ResText, kal_uint32 ResLen);
+
+
+kal_int32 IPC_RPC_EINT_GetNumber(kal_uint8 *EintName, kal_uint32 EintNameLength,
+ kal_uint32 *EintNo);
+
+kal_int32 IPC_RPC_GPIO_GetPin(kal_uint8 *GPIOName, kal_uint32 GPIONameLength, kal_uint32 *GPIOPin);
+
+kal_int32 IPC_RPC_ADC_GetChannelNumber(kal_uint8 *ChannelName, kal_uint32 ChannelNameLength, kal_uint32 *ChannelNumber);
+
+kal_int32 IPC_RPC_Query_EMI(kal_uint32 *EMIType, kal_uint32 *ClockRate);
+
+#if defined(__SIM_HOT_SWAP_SUPPORT__)
+kal_int32 IPC_RPC_EINT_GetAttribute (kal_uint8 *EintName, kal_uint32 EintNameLength, kal_uint32 queryType, void *result, kal_uint32 resultLength);
+#endif
+
+kal_int32 IPC_RPC_General_Query (kal_uint32 OPID, void *input, kal_uint32 inputLength,void *result, kal_uint32 resultLength);
+
+#endif /* !__CCCI_RPC_IF_H__ */
diff --git a/mcu/interface/service/hif/ccci_shm_bm_if.h b/mcu/interface/service/hif/ccci_shm_bm_if.h
new file mode 100644
index 0000000..e2dcc57
--- /dev/null
+++ b/mcu/interface/service/hif/ccci_shm_bm_if.h
@@ -0,0 +1,168 @@
+/*******************************************************************************
+* CCCI SHM BM
+*******************************************************************************/
+//CCCI_SHM_BM IT option
+//#define CCCI_SHM_BM_IT_OPTION
+
+//CCCI_SHM_BM AP IT option
+//#define CCCI_SHM_BM_AP_IT_OPTION
+
+#ifndef _CCCI_SHM_BM_IF_H
+#define _CCCI_SHM_BM_IF_H
+
+#define CCIF_NOTIFY_CHANNEL 7
+
+typedef enum
+{
+ CCCI_SHM_BM_USER_DHL1,
+ CCCI_SHM_BM_USER_DHL2,
+ CCCI_SHM_BM_USER_DHL3,
+ CCCI_SHM_BM_USER_DHL4,
+ CCCI_SHM_BM_USER_DHL5,
+ CCCI_SHM_BM_USER_DHL6,
+ CCCI_SHM_BM_USER_DHL7,
+ CCCI_SHM_BM_USER_DHL8,
+ CCCI_SHM_BM_USER_DHL9,
+ CCCI_SHM_BM_USER_DHL10,
+ CCCI_SHM_BM_USER_DHL11,
+ CCCI_SHM_BM_USER_DHL12,
+ CCCI_SHM_BM_USER_DHL13,
+ CCCI_SHM_BM_USER_DHL14,
+ CCCI_SHM_BM_USER_DHL15,
+ CCCI_SHM_BM_USER_DHL16,
+ CCCI_SHM_BM_USER_DHL17,
+ CCCI_SHM_BM_USER_DHL18,
+ CCCI_SHM_BM_USER_DHL19,
+ CCCI_SHM_BM_USER_DHL20,
+ CCCI_SHM_BM_USER_CNT
+}CCCI_SHM_BM_USER_BUFF_ENUM;
+
+typedef enum
+{
+ CCCI_SHM_BM_BUFF_INVALID,
+ CCCI_SHM_BM_BUFF_HW,
+ CCCI_SHM_BM_BUFF_SW,
+ CCCI_SHM_BM_BUFF_EXP,
+ CCCI_SHM_BM_BUFF_HW_STOP_CALLBACK,
+ CCCI_SHM_BM_TYPE_CNT
+}CCCI_SHM_BM_BUFF_TYPE_ENUM;
+
+
+// user must configure befure using
+typedef enum
+{
+ MODULE_ID,
+ BUFFER_TYPE,
+ PAGE_SIZE_DL,
+ PAGE_SIZE_UL,
+ BUFFER_SIZE_DL,
+ BUFFER_SIZE_UL,
+ PAGE_COUNT_DL,
+ PAGE_COUNT_UL,
+ CONF_ATTRIBUTE_NUM
+}CCCI_SHM_BM_USER_CONF_ENUM;
+
+typedef enum
+{
+ CCCI_SHM_BM_DL_MD2AP,
+ CCCI_SHM_BM_UL_AP2MD
+}CCCI_SHM_BM_DIRECTION;
+
+
+typedef struct CCCI_SHM_BM_ILM_LOCAL_PARA_T_STRUCT
+{
+ LOCAL_PARA_HDR
+ kal_uint32 user_id;
+} CCCI_SHM_BM_ILM_LOCAL_PARA_T;
+
+
+#if defined (__MTK_TARGET__)
+//user ID -> {Rx module ID, buffer type, DL page size(AP), UL page size(AP), DL buffer size(AP), UL buffer size(AP)}
+//buffer and page size need to 8-byte align
+extern kal_uint32 ccci_shm_bm_conf_table [CCCI_SHM_BM_USER_CNT][CONF_ATTRIBUTE_NUM];
+#endif
+
+
+void ccci_shmctrl_timer_cb();
+//for ut
+kal_uint32* ccci_shm_move_ctrl_ptr_one_page(kal_uint32 user_id, kal_uint32* buff_ptr, kal_bool is_dl);
+kal_uint32* ccci_shm_page_num_to_addr(kal_uint32 user_id, kal_uint32 cur_page_num, kal_bool is_dl);
+kal_uint32 ccci_shm_move_ctrl_ptr_one_page_number(kal_uint32 user_id, kal_uint32 cur_page_num, kal_bool is_dl);
+
+
+//void ccci_shmctrl_ior_ul_cb(CCCI_CHANNEL_T channel, ccci_io_request_t* ior);
+kal_bool ccci_shm_srv_init();
+kal_bool ccci_shm_srv_write_notity(kal_uint32 user_id);
+
+typedef void (*CCCI_SHM_BM_TX_CALLBACK)(kal_uint32* address, kal_uint32 size); //HW Tx call back function
+
+/***********************************User API*********************************************/
+#if defined(__CCISMCORE_SUPPORT__) && defined (__MTK_TARGET__)
+
+kal_bool ccci_shm_srv_buf_register(kal_uint32 user_id, CCCI_SHM_BM_TX_CALLBACK funp);
+kal_bool ccci_shm_srv_write_alloc(kal_uint32 user_id, kal_uint32** address, kal_uint32* size);
+kal_bool ccci_shm_srv_write_done(kal_uint32 user_id, kal_uint32* address, kal_uint32 length);
+kal_bool ccci_shm_srv_read_get(kal_uint32 user_id, kal_uint32** address, kal_uint32* size);
+kal_bool ccci_shm_srv_read_done(kal_uint32 user_id);
+kal_bool ccci_shm_srv_get_hw_buffer_info(kal_uint32 user_id, kal_uint32** address, kal_uint32* size);
+kal_bool ccci_shm_srv_query_buff_status(kal_uint32 user_id);
+kal_uint32 ccci_shm_srv_query_page_size(kal_uint32 user_id, kal_bool is_dl);
+kal_uint32 ccci_shm_srv_query_page_count(kal_uint32 user_id, kal_bool is_dl);
+kal_uint32 ccci_shm_srv_query_page_status (kal_uint32 user_id, kal_uint32* address, kal_bool is_dl); //address not include page header
+kal_uint32 ccci_shm_srv_query_to_be_read_page_count(kal_uint32 user_id, kal_bool is_dl);//write done but not read done
+kal_bool ccci_shm_srv_poll_buff(kal_uint32 user_id, kal_uint32 time_out, kal_bool is_dl);//check if all pages are read with timeout
+kal_bool ccci_shm_srv_unlock_read_ilm(kal_uint32 user_id);
+void ccci_shm_srv_stop_callback(kal_uint32 user_id);
+void ccci_shm_srv_start_callback(kal_uint32 user_id);
+kal_bool ccci_shm_srv_write_alloc_single_usr(kal_uint32 user_id, kal_uint32** address, kal_uint32* size);
+kal_bool ccci_shm_srv_write_done_single_usr(kal_uint32 user_id, kal_uint32* address, kal_uint32 length);
+void ccci_shm_srv_get_data_shm_total_size(kal_uint32 *p_memsize);
+void ccci_shm_srv_get_data_shm_user_size(kal_uint32 user_id, CCCI_SHM_BM_DIRECTION dir, kal_uint32 *p_memsize);
+
+
+//Exception
+kal_bool ccci_shm_srv_init_ex();
+kal_bool ccci_shm_bm_send_notify_ex(kal_uint32 user_id);
+kal_bool ccci_shm_bm_free_dl_pages_ex(kal_uint32 user_id);
+
+kal_bool ccci_shm_srv_write_alloc_ex(kal_uint32 user_id, kal_uint32** address, kal_uint32* size);// : called by user to check and get the write address in SHM buffer
+kal_bool ccci_shm_srv_write_done_ex(kal_uint32 user_id, kal_uint32* address, kal_uint32 length);//: called by user for write done notification
+kal_bool ccci_shm_srv_read_get_ex(kal_uint32 user_id, kal_uint32** address, kal_uint32* size);//: called by user to get the readable data from SHM buffer
+kal_bool ccci_shm_srv_read_done_ex(kal_uint32 user_id);//: called by user for read done notification to free buffer
+//kal_uint32 ccci_shm_srv_query_written_page_count_ex(kal_uint32 user_id, kal_bool is_dl);//all wirte done(including read), not including allocated
+kal_bool ccci_shm_srv_get_written_page_ex(kal_uint32 user_id, kal_uint32 page_num, kal_uint32** address, kal_uint32* size, kal_bool is_dl);//get written page, not including allocated
+
+//API can both used in exception mode and normal mode
+void ccci_shm_srv_reset_read_page_ex(kal_uint32 user_id);
+void ccci_shm_srv_reset_write_page_ex(kal_uint32 user_id);
+/********************internal**********************/
+//void ccci_shm_bm_chk_is_active(kal_uint32 user_id, CCCI_SHM_BM_USER_BUFF_T* user_buff);
+kal_bool ccci_shm_bm_send_notify(kal_uint32 user_id);
+void ccci_shm_bm_stop_timer();
+void ccci_shm_bm_start_timer();
+void ccci_shm_bm_restart_timer();
+#endif
+
+
+
+kal_bool ccci_shm_srv_write_alloc_ul_UT(kal_uint32 user_id, kal_uint32** address, kal_uint32* size);
+kal_bool ccci_shm_srv_write_done_ul_UT(kal_uint32 user_id, kal_uint32* address, kal_uint32 length);
+kal_bool ccci_shm_srv_read_get_dl_UT(kal_uint32 user_id, kal_uint32** address, kal_uint32* size);
+kal_bool ccci_shm_srv_read_done_dl_UT(kal_uint32 user_id);
+
+kal_bool ccci_shm_bm_it_init();
+void ccci_shm_bm_it_tx(kal_uint32 user_id);
+void ccci_shm_bm_it_rx(kal_uint32 user_id);
+
+void ccci_shm_bm_main(ilm_struct *ilm);
+kal_bool ccci_shm_bm_it_reg(kal_uint32 user_id);
+kal_bool ccci_shm_srv_ul_cb();
+
+
+void ccci_shm_bm_dl_test(kal_uint32 user_id);
+void ccci_shm_bm_dl_test_write2(kal_uint32 user_id);
+void ccci_shm_bm_loop_back_test(kal_uint32 user_id);
+
+#endif
+
+
diff --git a/mcu/interface/service/hif/ccci_sysmsgsvc_conf.h b/mcu/interface/service/hif/ccci_sysmsgsvc_conf.h
new file mode 100644
index 0000000..028f5e1
--- /dev/null
+++ b/mcu/interface/service/hif/ccci_sysmsgsvc_conf.h
@@ -0,0 +1,142 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2001
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * ccci_sysmsgsvc_conf.h
+ *
+ * Project:
+ * --------
+ * MAUI
+ *
+ * Description:
+ * ------------
+ * user enum for ccci system message service
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ *
+ ****************************************************************************/
+
+//- flag bit mask
+//- 7 6 5 4 3 2 1 0 LSB
+//- 0 0 0 x x x x x
+//- [7] ilm needed
+//- [6] ilm local param neeeded
+
+#if defined(__CCCIDEV_SUPPORT__)
+#if defined(__CCCI_PRODUCT_TYPE_THIN_MODEM__) //thin modem configuration
+ // CCCI_MSG_ID flag ilm_msg_id default destination
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_L1_DORMANT, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT)//-0x100 add for L1 dormant mode used
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_L1_SLEEPMASKING, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT)//-0x101 add for L1 sleep/un-sleep mode used
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_MD_L4_TX_PWR_LEV_REQ, 0xC0, MSG_ID_L4C_MEAS_INFO_REQ, CCCI_SYSMSG_DEST_NOT_SUPPORT)//-0x102 add for L1 TX Power
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_RF_MAX_TEMPERATURE_SUB6, 0, 0, CCCI_SYSMSG_DEST_AP)//-0x103 add for query SUB6 RF temperature. MD window: Allen Hsu
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_RF_ALL_TEMPERATURE_MMW, 0, 0, CCCI_SYSMSG_DEST_AP)//-0x104 add for query MMW RF temperature. MD window: Allen Hsu
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_L1_QUERY_AP_VOLTAGE, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x105 add for L1 to query AP volatage. Used for TX and RX.
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_LOCK_AP_26M, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT)//-0x106 add for USB to lock 26M on AP side. Only used in MT6280
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_L4_SIM_INFO, 0xC0, MSG_ID_L4C_REGIONAL_PHONE_MODE_REQ,CCCI_SYSMSG_DEST_NOT_SUPPORT)//-0x107 add to send information to AP. Feature: Regional Animation. MD window: Hong
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_ICUSB_AP_NOTIFY, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT)//-0x108 add for ICUSB user to do error handling
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_L1_CRYSTAL_THERMAL_CHANGE, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT)//-0x109 add for L1 thermal issue in 6571. MD window: Rick.Wu
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_L4_TX_PWR_REDU_REQ, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT)//-0x10A add for L4 for TX power reduction. MD window: Bob.Chiang
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_L1_THERMAL_TX_PWR_REDU_REQ, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT)//-0x10B add for L1 Thermal Control. MD window: Chichen.Lee
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_MD_SLEEP_CONTROL, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT)//-0x10C add for CPE project for MD Sleep Control. Rounter only
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_EL1_DISABLE_MD_EMI_REQ, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT)//-0x10D add for 6595 DVFS, EL1 DISABLE MD EMI ACCESS. MD window: Lewis Yu
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_MML1_UPDATE_AP_TPO_INFO, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT)//-0x10E add for SWTP. MD window: Ryan-HN Chen
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_MD2_UPDATE_AP_TPO_INFO, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT)//-0x10F add for SWTP. MD window: Ryan-HN Chen
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_MML1_QUERY_AP_TPO_INFO, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT)//-0x110 add for SWTP. MD window: Ryan-HN Chen
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_MD2_QUERY_AP_TPO_INFO, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT)//-0x111 add for SWTP. MD window: Ryan-HN Chen
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_SW_TPUT_THROTTLING, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x112 add for SW through put throttling. MD window: Peter Hsu
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_UT_ONLY, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x113 add for UT only
+#if defined(__CCCI_TEST_EAP__)
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_TEST_MD_AP, 0, 0, CCCI_SYSMSG_DEST_EAP) //-0x114 add for IT only
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_TEST_AP_MD, 0, 0, CCCI_SYSMSG_DEST_EAP) //-0x115 add for IT only
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_TEST_MULTITASK_MD_AP, 0, 0, CCCI_SYSMSG_DEST_EAP) //-0x116 add for IT only
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_TEST_MULTITASK_AP_MD, 0, 0, CCCI_SYSMSG_DEST_EAP) //-0x117 add for IT only
+#else
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_TEST_MD_AP, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x114 add for IT only
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_TEST_AP_MD, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x115 add for IT only
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_TEST_MULTITASK_MD_AP, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x116 add for IT only
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_TEST_MULTITASK_AP_MD, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x117 add for IT only
+#endif
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_MD_UNPROTECT_PART_REQ, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT)//-0x118 add for NVRAM. MD window: Quinhua Yu (MD->AP)
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_CCISM_SCP_SHM_INIT, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT)//-0x119 add for MD<->SCP CCISM TRM Flow init MSG
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_CCISM_SCP_SHM_INIT_ACK, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT)//-0x11A add for MD<->SCP CCISM TRM Flow init ACK MSG
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_CCISM_SCP_SHM_INIT_DONE, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT)//-0x11B add for MD<->SCP CCISM TRM Flow init Done MSG
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_PMIC_INTR_MODEM_BUCK_OC, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT)//-0x11C add for PMIC over current. MD window:Yuyang Hsiao
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_EMI_ACCESS_VIOLATION_ACK, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT)//-0x11D add for EMI access violation ack. MD window: Woody.Kuo
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_LWA_DATA_PATH_CONTROL, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT)//-0x11E add for LWA data patch control. MD window: MingTsung.Sun
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_C2K_PPP_LINE_STATUS, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT)//-0x11F add for C2K PPP line status. MD window: Stun Wu
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_DISPLAY_DYNAMIC_MIPI_GSM, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT)//-0x120 add for dynamic MIPI GSM, 2G connection 2 packet/s(OPPO). ACS Window: Wiley Li
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_RF_HOPPING_NOTIFY, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT)//-0x121 add for OSC frequency jump. Owner: Jianjun Du / Weiwei Pei
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_POWEROFF_NOTIFY, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x122 add for L4 to get low battery voltage (<5%) notification. Owner: Haozhe Chang/Hong Yu
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_MD_THERM_NOTIFY, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x123 add for modem thermal notify. MD window: Chao-Kai Yu, AP window: Jerry-SC Wu
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_BC_CDP_NOTIFY, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x124 add for USB BC CDP notify. MD window: Gang Lei, AP window: Wy Chuang
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_CAMERA_HOPPING_NOTIFY, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT) //-0x125 add for camera enable/disable report. Owner: JZ Hou
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_CARKIT_DETECT, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT) //-0x126 add for carkit status. MD window: Edwin Liu
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_C2K_TX_POWER_REQ, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT) //-0x127 add for C2k thermal power msg
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_LOWPWR_APSTS_NOTIFY, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT) //-0x128 add for low power APSTS. MD user: Guo-Huei Chang
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_PCIE_PM_NOTIFY, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x129 add for PCIe PM communication. MD user: Cindy Tu
+ /* Add new msg id from here*/
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_MAX, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x12A maximum SYSMSG ID --> below here will return false
+#else //defined(__CCCI_PRODUCT_TYPE_SOC__)
+ // CCCI_MSG_ID flag ilm_msg_id CCCI_HIF_HW_TYPE_T
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_L1_DORMANT, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x100 add for L1 dormant mode used
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_L1_SLEEPMASKING, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x101 add for L1 sleep/un-sleep mode used
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_MD_L4_TX_PWR_LEV_REQ, 0xC0, MSG_ID_L4C_MEAS_INFO_REQ, CCCI_SYSMSG_DEST_AP) //-0x102 add for L1 TX Power
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_RF_MAX_TEMPERATURE_SUB6, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x103 add for query SUB6 RF temperature. MD window: Allen Hsu
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_RF_ALL_TEMPERATURE_MMW, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x104 add for query MMW RF temperature. MD window: Allen Hsu
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_L1_QUERY_AP_VOLTAGE, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x105 add for L1 to query AP volatage. Used for TX and RX.
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_LOCK_AP_26M, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x106 add for USB to lock 26M on AP side. Only used in MT6280
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_L4_SIM_INFO, 0xC0, MSG_ID_L4C_REGIONAL_PHONE_MODE_REQ,CCCI_SYSMSG_DEST_AP) //-0x107 add to send information to AP. Feature: Regional Animation. MD window: Hong
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_ICUSB_AP_NOTIFY, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x108 add for ICUSB user to do error handling
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_L1_CRYSTAL_THERMAL_CHANGE, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x109 add for L1 thermal issue in 6571. MD window: Rick.Wu
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_L4_TX_PWR_REDU_REQ, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x10A add for L4 for TX power reduction. MD window: Bob.Chiang
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_L1_THERMAL_TX_PWR_REDU_REQ, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x10B add for L1 Thermal Control. MD window: Chichen.Lee
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_MD_SLEEP_CONTROL, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x10C add for CPE project for MD Sleep Control. Rounter only
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_EL1_DISABLE_MD_EMI_REQ, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x10D add for 6595 DVFS, EL1 DISABLE MD EMI ACCESS. MD window: Lewis Yu
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_MML1_UPDATE_AP_TPO_INFO, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x10E add for SWTP. MD window: Ryan-HN Chen
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_MD2_UPDATE_AP_TPO_INFO, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x10F add for SWTP. MD window: Ryan-HN Chen
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_MML1_QUERY_AP_TPO_INFO, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x110 add for SWTP. MD window: Ryan-HN Chen
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_MD2_QUERY_AP_TPO_INFO, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x111 add for SWTP. MD window: Ryan-HN Chen
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_SW_TPUT_THROTTLING, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x112 add for SW through put throttling. MD window: Peter Hsu
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_UT_ONLY , 0, 0, CCCI_SYSMSG_DEST_AP) //-0x113 add for UT only
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_TEST_MD_AP, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x114 add for IT only
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_TEST_AP_MD, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x115 add for IT only
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_TEST_MULTITASK_MD_AP, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x116 add for IT only
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_TEST_MULTITASK_AP_MD, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x117 add for IT only
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_MD_UNPROTECT_PART_REQ, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x118 add for NVRAM. MD window: Quinhua Yu (MD->AP)
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_CCISM_SCP_SHM_INIT, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x119 add for MD<->SCP CCISM TRM Flow init MSG
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_CCISM_SCP_SHM_INIT_ACK, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x11A add for MD<->SCP CCISM TRM Flow init ACK MSG
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_CCISM_SCP_SHM_INIT_DONE, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x11B add for MD<->SCP CCISM TRM Flow init Done MSG
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_PMIC_INTR_MODEM_BUCK_OC, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x11C add for PMIC over current. MD window:Yuyang Hsiao
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_EMI_ACCESS_VIOLATION_ACK, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x11D add for EMI access violation ack. MD window: Woody.Kuo
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_LWA_DATA_PATH_CONTROL, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x11E add for LWA data patch control. MD window: MingTsung.Sun
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_C2K_PPP_LINE_STATUS, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x11F add for C2K PPP line status. MD window: Stun Wu
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_DISPLAY_DYNAMIC_MIPI_GSM, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x120 add for dynamic MIPI GSM, 2G connection 2 packet/s(OPPO). ACS Window: Wiley Li
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_RF_HOPPING_NOTIFY, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x121 add for OSC frequency jump. Owner: Jianjun Du / Weiwei Pei
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_POWEROFF_NOTIFY, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT) //-0x122 add for L4 to get low battery voltage (<5%) notification. Owner: Haozhe Chang/Hong Yu
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_MD_THERM_NOTIFY, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT) //-0x123 add for modem thermal notify. MD window: Chao-Kai Yu, AP window: Jerry-SC Wu
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_BC_CDP_NOTIFY, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT) //-0x124 add for USB BC CDP notify. MD window: Gang Lei, AP window: Wy Chuang
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_CAMERA_HOPPING_NOTIFY, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x125 add for camera enable/disable report. Owner: JZ Hou
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_CARKIT_DETECT, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x126 add for carkit status. MD window: Edwin Liu
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_C2K_TX_POWER_REQ, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x127 add for C2k thermal power msg
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_LOWPWR_APSTS_NOTIFY, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x128 add for low power APSTS. MD user: Guo-Huei Chang
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_PCIE_PM_NOTIFY, 0, 0, CCCI_SYSMSG_DEST_NOT_SUPPORT) //-0x129 add for PCIe PM communication. MD user: Cindy Tu
+ /* Add new msg id from here*/
+ X_CCCI_SYSMSGSVC_CONF(CCMSG_ID_SYSMSGSVC_MAX, 0, 0, CCCI_SYSMSG_DEST_AP) //-0x12A maximum SYSMSG ID
+#endif
+#endif //__CCCIDEV_SUPPORT__
+
+
diff --git a/mcu/interface/service/hif/cccidev_qbm.h b/mcu/interface/service/hif/cccidev_qbm.h
new file mode 100644
index 0000000..604ab33
--- /dev/null
+++ b/mcu/interface/service/hif/cccidev_qbm.h
@@ -0,0 +1,1080 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * cccidev_qbm.h
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * Defines the common qmu_bm macros or inline functions for CCCI devices
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 09 18 2020 li-cheng.tsai
+ * [MOLY00569647] [MP7.PRECHECKIN.DEV][Code sync] sync code from T700
+ * [R3.MP][OA][CCCI]code sync from T700
+ *
+ * 09 15 2020 li-cheng.tsai
+ * [MOLY00569647] [MP7.PRECHECKIN.DEV][Code sync] sync code from T700
+ * [MP7.PRECHECKIN.DEV][OA][CCCI]code sync from T700
+ *
+ * 08 04 2020 actory.ou
+ * [MOLY00554534] [Colgin][Code sync] sync code from MT6880.MP
+ * [T700][OA][CCCI] sync from MT6880
+ *
+ * 07 07 2020 actory.ou
+ * [MOLY00543186] [Colgin] code sync to NR15.R3.MT6880.MP
+ * [R3.MT6880.MP][OA][CCCI] sync from COLGIN.SB.SMT.DEV
+ *
+ * 05 19 2020 actory.ou
+ * [MOLY00525599] code sync for Colgin
+ * [NR15.R3.COLGIN.SB.SMT.DEV][OA][CCCI] code sync from 19NOV
+ *
+ * 12 18 2019 actory.ou
+ * [MOLY00465742] [Gen97] add L5 channels and change CCIF SHM layout
+ * [19NOV.DEV][OA] add L5 channels
+ *
+ * 09 15 2017 chien-hui.lu
+ * [MOLY00278317] [CCCI][LHIFCORE][CCISMCORE] Performance improvement of INT_QueryExceptionStatus
+ * [CCCI][LHIFCORE][CCISMCORE] Performance improvement of INT_QueryExceptionStatus.
+ *
+ * 08 01 2017 chien-hui.lu
+ * [MOLY00260287] MD CCCI add cache API enhance to LR12 trunk
+ * [CCCI] cache API enhancement and aggregation, porting from UMOLY.
+ *
+ * 11 08 2016 cs.huang
+ * [MOLY00204430] [CCCI] MT6293 change
+ * [CCCI] Fast CCCI header problem
+ *
+ * 08 15 2016 cs.huang
+ * [MOLY00197453] [CCCI] Fast CCCI header change SPD header size
+ * [CCCI] Fast CCCI header problem
+ *
+ * 06 07 2016 cs.huang
+ * [MOLY00183140] [Coverity Scanned Code Defect]CID:138824 code defect happened in /mcu/common/interface/service/hif/cccidev_qbm.h
+ * [CCCI] Fix coverity warning
+ * 06 01 2016 cs.huang
+ * [MOLY00182647] [CCCI] Fast CCCI header
+ * [CCCI] Fast CCCI header
+ *
+ * 06 01 2016 cs.huang
+ * [MOLY00182647] [CCCI] Fast CCCI header
+ * [CCCI] Fast CCCI header
+ *
+ * 12 28 2015 cs.huang
+ * [MOLY00155074] [CCCI] Fix CCCI header length for TTY and fix IT program
+ * [CCCI] Fix CCCI header length for TTY and fix IT program
+ *
+ * 12 28 2015 cs.huang
+ * [MOLY00155074] [CCCI] Fix CCCI header length for TTY and fix IT program
+ * [CCCI] Fix CCCI header length for TTY and fix IT program
+ * 08 07 2015 cs.huang
+ * [MOLY00136043] cccidev_qbm.h assertion
+ * [CCMNI] Fix SPD EOL problem
+ *
+ *
+ * 08 07 2015 cs.huang
+ * [MOLY00136043] cccidev_qbm.h assertion
+ * [CCMNI] Fix SPD EOL problem
+ *
+ * 08 06 2015 cs.huang
+ * [MOLY00135464] [CCCI] New CCCI handshake flow
+ * [CCCI] New CCCI handshake flow
+ *
+ * 08 06 2015 cs.huang
+ * [MOLY00135464] [CCCI] New CCCI handshake flow
+ * [CCCI] New CCCI handshake flow
+ * 07 28 2015 cs.huang
+ * [MOLY00131268] [CCMNI] Add SPD trace
+ * [CCMNI] Add SPD trace
+ *
+ * 07 28 2015 cs.huang
+ * [MOLY00131268] [CCMNI] Add SPD trace
+ * [CCMNI] Add SPD trace
+ *
+ * 07 24 2015 cs.huang
+ * [MOLY00131268] [CCMNI] Add SPD trace
+ * [CCMNI] Add SPD trace timing
+ *
+ * 07 23 2015 cs.huang
+ * [MOLY00131268] [CCMNI] Add SPD trace
+ * [CCMNI] Add SPD trace
+ *
+ * 05 08 2015 cs.huang
+ * [MOLY00112001] [CCCI] Change CCCI sequence definition in CCCI header.
+ * [CCCI] Change CCCI sequence definition in CCCI header.
+ *
+ * 05 05 2015 cs.huang
+ * [MOLY00111097] [CCCI] Modify RMPU buffer definition
+ * [CCCI] Modify polling buffer defination for RMPU
+ *
+ * 04 15 2015 i-wei.tsai
+ * [MOLY00107626] [TK6291][CCCITTY] enable sequence check and exception SPD support
+ * .
+ *
+ * 03 27 2015 ap.wang
+ * [MOLY00100246] [UMOLY] Fix SPD type3 re-layout error
+ * Add CCCI Len for SPD DL v2
+ *
+ * 03 24 2015 ap.wang
+ * [MOLY00100246] [UMOLY] Fix SPD type3 re-layout error
+ * .
+ *
+ * 01 23 2015 ap.wang
+ * [MOLY00092900] [UMOLY] L2 Copro zero len packet on SPD
+ * .
+ *
+ * 12 10 2014 cs.huang
+ * [MOLY00080351] [MT6291][CCCI] Add L1Core CCCI service (CCCI SYSMSG/RPC/IPC)
+ * [CCCI] PCore/L1Core CCCI enhancement
+ *
+ * 11 13 2014 cs.huang
+ * [MOLY00084049] [CCCI] Merging P2P CCCI related change
+ * Merging
+ *
+ * //UMOLY/DEV/MT6291_DEV/mcu/pcore/...
+ *
+ * to //UMOLY/TRUNK/UMOLY/mcu/pcore/...
+ *
+ * 11 13 2014 cs.huang
+ * [MOLY00081425] [TK6291_DEV] Add SPD sw solution
+ * Merging
+ *
+ * //UMOLY/DEV/MT6291_DEV/mcu/pcore/...
+ *
+ * to //UMOLY/TRUNK/UMOLY/mcu/pcore/...
+ *
+ * 11 13 2014 cs.huang
+ * [MOLY00075481] Add CCCI SPD DL support
+ * Merging
+ *
+ * //UMOLY/DEV/MT6291_DEV/mcu/pcore/...
+ *
+ * to //UMOLY/TRUNK/UMOLY/mcu/pcore/...
+ *
+ *
+ *
+ * 08 14 2014 ap.wang
+ * [MOLY00075481] Add CCCI SPD DL support
+ * CCCIDEV SPD DL common process
+ * 07 22 2014 cs.huang
+ * [MOLY00071952] [CCCI] Add new CCCI debug mechanism (1. CCCI seq check 2. AP polling MD status)
+ * [CCCI] ccci new debug mechanism
+ *
+ * 07 22 2014 cs.huang
+ * [MOLY00071952] [CCCI] Add new CCCI debug mechanism (1. CCCI seq check 2. AP polling MD status)
+ * [CCCI] CCCI new debug mechanism
+ * 07 09 2014 cs.huang
+ * [MOLY00071904] [WW FT][4G Gemini][FT][HK][Offical][CSL+PCCW]Externel (EE),0,0,99,/data/core/,1,modem,md0:[ASSERT] file:ccci_rpc_data.c line:587
+ * [CCCI RPC] Fix ccci rpc coding defect in ccci_rpc_receive_cb
+ *
+ * 07 09 2014 cs.huang
+ * [MOLY00071904] [WW FT][4G Gemini][FT][HK][Offical][CSL+PCCW]Externel (EE),0,0,99,/data/core/,1,modem,md0:[ASSERT] file:ccci_rpc_data.c line:587
+ * [CCCI RPC] Fix ccci rpc coding defect in ccci_rpc_receive_cb
+ *
+ * 09 06 2013 ap.wang
+ * [MOLY00036761] [CCCI] Add L2 trace log [CCCI] Add L2 trace log
+ *
+ * 06 25 2013 ian.cheng
+ * [MOLY00027392] [CCCI]CCCIDEV_GET_QBM_DATALEN should return GPD.len for DHL
+ * [MOLY][CCCI] CCCIDEV_GET_QBM_DATALEN return GPD length even when there's BD
+ *
+ * 03 14 2013 ap.wang
+ * [MOLY00011922] [CCCIDEV] Add GPD cache flush after set checksum
+ * [CCCIDEV] Add GPD cache flush after set checksum
+ *
+ * 02 21 2013 i-wei.tsai
+ * [MOLY00010624] CCCITTY integartion test code revise
+ * remove internal _reset_ccci_common
+ *
+ * 02 04 2013 i-wei.tsai
+ * [MOLY00009892] Rename as MT6290
+ * Rename project name as MT6290
+ *
+ * 01 08 2013 i-wei.tsai
+ * [MOLY00008347] [MT6290] [CCCI] CCCI re-Architecture
+ * sync latest version of new features
+ *
+ * 12 06 2012 ian.cheng
+ * [MOLY00007169] [CCCI_SDIO] MOLY phase in
+ * [MOLY][CCCI_SDIO] 1st version of MT6290 CCCI feature
+ *
+ * 12 06 2012 ian.cheng
+ * [MOLY00007169] [CCCI_SDIO] MOLY phase in
+ * [MOLY][CCCI_SDIO] 1st version of MT6290 CCCI feature
+ ****************************************************************************/
+#ifndef _CCCIDEV_QBM_H
+#define _CCCIDEV_QBM_H
+#include "kal_public_api.h"
+#include "qmu_bm.h"
+#include "qmu_bm_util.h"
+#include "ccci_if.h" /* ccci_io_request_t */
+#include "hif_spd_ext.h"
+
+#define CCCI_TTY_DEV_NUM (uart_port_ccci_end-uart_port_ccci_start+2) //+2 for uart_port_dhl_sp_expt and uart_port_dhl_ctrl_sp_expt
+
+/*!
+ * @function [INLINE] CCCICOMM_SET_QBM_DATALEN
+ * @brief Set data length for QBM_TYPE_CCCI_COMM by QBM_DES_SET_DATALEN
+ *
+ * @param gpd [IN] pointer to the GPD
+ *
+ * @return void
+ */
+static __inline void CCCICOMM_SET_QBM_DATALEN(void* gpd, kal_uint32 data_len)
+{
+ void* bd = NULL;
+
+ EXT_ASSERT(NULL != gpd, (kal_uint32)gpd, data_len, 0);
+ /*QBM_TYPE_CCCI_COMM specific function*/
+ EXT_ASSERT(QBM_TYPE_CCCI_COMM == QBM_GET_TYPE(gpd), (kal_uint32)QBM_GET_TYPE(gpd), (kal_uint32)gpd, data_len);
+ /*Must have BD*/
+ EXT_ASSERT(0 != QBM_DES_GET_BDP(gpd), (kal_uint32)QBM_DES_GET_BDP(gpd), (kal_uint32)gpd, data_len);
+
+ bd = QBM_DES_GET_DATAPTR(gpd);
+ EXT_ASSERT(NULL!=bd, (kal_uint32)gpd, (kal_uint32)bd, data_len);
+ QBM_DES_SET_DATALEN(bd, data_len);
+ qbm_cal_set_checksum((kal_uint8 *)bd);
+
+ QBM_DES_SET_DATALEN(gpd, data_len);
+ qbm_cal_set_checksum((kal_uint8 *)gpd);
+}
+
+/*!
+ * @function [INLINE] CCCIDEV_GET_QBM_DATALEN
+ * @brief Obtain the data length of first BD in GPD list.
+ * Possible application is used during inserting layer headers ex. CCCI headers.
+ *
+ * @param gpd [IN] pointer to the GPD
+ *
+ * @return Return gpd->1st_bd->data_len / gpd->data_len
+ */
+static __inline kal_uint32 CCCIDEV_GET_QBM_DATALEN(void* gpd)
+{
+ kal_uint32 data_len = 0;
+
+ EXT_ASSERT(NULL!=gpd, (kal_uint32) gpd,0 ,0);
+ /* user should put length in gpd.len
+ gpd.len = bd.ext_len + bd.len */
+ data_len = QBM_DES_GET_DATALEN(gpd);
+ return data_len;
+}
+
+#include <ex_public.h>
+/*!
+ * @function [INLINE] CCCIDEV_GET_QBM_DATAPTR
+ * @brief Obtain the pointer of data.
+ *
+ * @param gpd [IN] pointer to the GPD
+ *
+ * @return Return gpd->1st_bd->p_data_tbd / gpd->p_data_tbd
+ */
+
+static __inline void* CCCIDEV_GET_QBM_DATAPTR(void* gpd)
+{
+ void* bd = NULL;
+ void* data_ptr = NULL;
+
+ EXT_ASSERT(NULL!=gpd, (kal_uint32) gpd, 0, 0);
+ if(0 != QBM_DES_GET_BDP(gpd)){
+ //4 <case 1> GPD->BD->BUFF
+ bd = QBM_DES_GET_DATAPTR(gpd);
+ EXT_ASSERT(NULL!=bd, (kal_uint32) bd, (kal_uint32) gpd, 0);
+ data_ptr = QBM_DES_GET_DATAPTR(bd);
+ }else{
+ //4 <case 2> GPD->BUFF
+ data_ptr = QBM_DES_GET_DATAPTR(gpd);
+ }
+
+ //Note: This API is also used in exception mode
+ //In exception mode, DHL may directly dump memory address 0x0 (use 0x0 as data buffer address)
+ if(INT_QueryExceptionStatus() == KAL_FALSE)
+ {
+ EXT_ASSERT(NULL!=data_ptr, (kal_uint32) data_ptr, (kal_uint32) bd, (kal_uint32) gpd);
+ }
+ return data_ptr;
+}
+
+/*!
+ * @function [INLINE] CCCIDEV_GET_GPD_LIST_SIZE
+ * @brief Traverse the GPD chain to obtain the number of GPDs in GPD chain.
+ *
+ * @param head [IN] pointer to the head of the GPD chain
+ * @param tail [IN] pointer to the tail of the GPD chain
+ *
+ * @return Number of the GPDs in GPD chain.
+ */
+static __inline kal_uint32 CCCIDEV_GET_GPD_LIST_SIZE(qbm_gpd *head, qbm_gpd *tail)
+{
+ kal_uint32 cnt = 0;
+
+ if (tail) {
+ while (head) {
+ cnt++;
+ if (head != tail) {
+ head = QBM_DES_GET_NEXT(head);
+ } else {
+ break;
+ }
+ }
+ }
+
+ return cnt;
+}
+
+/*!
+ * @function [INLINE] CCCIDEV_GET_NONBPS_GPD_LIST_SIZE
+ * @brief Traverse the GPD chain to obtain the number of NON-bypass GPDs in GPD chain.
+ *
+ * @param head [IN] pointer to the head of the GPD chain
+ * @param tail [IN] pointer to the tail of the GPD chain
+ *
+ * @return Number of the non-bypass GPDs in GPD chain.
+ */
+static __inline kal_uint32 CCCIDEV_GET_NONBPS_GPD_LIST_SIZE(qbm_gpd *head, qbm_gpd *tail)
+{
+ kal_uint32 cnt = 0;
+
+ if (tail) {
+ while (head) {
+ cnt += (0 == QBM_DES_GET_BPS(head));
+ if (head != tail) {
+ head = QBM_DES_GET_NEXT(head);
+ } else {
+ break;
+ }
+ }
+ }
+
+ return cnt;
+}
+
+/*!
+ * @function [INLINE] CCCIDEV_PUSH_QBM_DATAHEAD
+ * @brief Push the Tx GPD/BD data pointer. i.e. increase the header room
+ * 1. move the GPD->1st_BD->data / GPD->data pointer back "offset"
+ * 2. increase the BD length
+ * 3. DO NOT flush the Tx BD header -> QMU enqueue should do it
+ * Please refer to the mail 20120606 from YiLun
+ * > Folder: 0WCP\0. important announce\programming related
+ * > [Note] CACHE op convention : upper user no need to take TX GPD/BD cache flush(clean)
+ * 4. set gpd data length
+ * 5. DO NOT flush the Tx GPD header -> QMU enqueue should do it
+ * reference : ETHC_CORE_PUSH_QBM_DATAHEAD
+ *
+ * @param gpd [IN] pointer to the GPD need modification
+ * @param offset [IN] move the data_ptr by offset
+ *
+ * @return void
+ */
+static __inline void CCCIDEV_PUSH_QBM_DATAHEAD(void* gpd, kal_uint32 offset)
+{
+ void* bd = NULL;
+ kal_uint8* data_ptr = NULL;
+ kal_uint32 data_len = 0;
+
+ if(0 != QBM_DES_GET_BDP(gpd)){
+ //4 <case 1> GPD->BD->BUFF
+ /* set bd data ptr */
+ bd = QBM_DES_GET_DATAPTR(gpd);
+ data_ptr = (kal_uint8*)QBM_DES_GET_DATAPTR(bd);
+ QBM_DES_SET_DATAPTR(bd, data_ptr-offset);
+ /* set bd data len */
+ data_len = QBM_DES_GET_DATALEN(bd);
+ QBM_DES_SET_DATALEN(bd, data_len+offset);
+ /* set bd checksum */
+ qbm_cal_set_checksum(bd);
+
+ /* set gpd data len */
+ data_len = QBM_DES_GET_DATALEN(gpd);
+ QBM_DES_SET_DATALEN(gpd, data_len+offset);
+ /* set gpd checksum */
+ //qbm_cal_set_checksum(gpd);
+ }else{
+ //4 <case 2> GPD->BUFF
+ /* set gpd data ptr */
+ data_ptr = (kal_uint8*)QBM_DES_GET_DATAPTR(gpd);
+ QBM_DES_SET_DATAPTR(gpd, data_ptr-offset);
+ /* set gpd data len */
+ data_len = QBM_DES_GET_DATALEN(gpd);
+ QBM_DES_SET_DATALEN(gpd, data_len+offset);
+ /* set gpd checksum */
+ //qbm_cal_set_checksum(gpd);
+ }
+}
+
+/*!
+ * @function [INLINE] CCCIDEV_PULL_QBM_DATAHEAD
+ * @brief Pull the Tx GPD/BD data pointer. i.e. decrease the header room
+ *
+ * <Used in non-network GPD->BD->BUFF >
+ *
+ * @param gpd [IN] pointer to the GPD need modification
+ * @param offset [IN] move the data_ptr by offset
+ *
+ * @return void
+ */
+static __inline void CCCIDEV_PULL_QBM_DATAHEAD(void* gpd, kal_uint32 offset)
+{
+ void* bd = NULL;
+ kal_uint8* data_ptr = NULL;
+ kal_uint32 data_len = 0;
+
+ if(0 != QBM_DES_GET_BDP(gpd)){
+ //4 <case 1> GPD->BD->BUFF
+ /* set bd data ptr */
+ bd = QBM_DES_GET_DATAPTR(gpd);
+ data_ptr = (kal_uint8*)QBM_DES_GET_DATAPTR(bd);
+ QBM_DES_SET_DATAPTR(bd, data_ptr+offset);
+ /* set bd data len */
+ data_len = QBM_DES_GET_DATALEN(bd);
+ QBM_DES_SET_DATALEN(bd, data_len-offset);
+ /* set bd checksum */
+ qbm_cal_set_checksum(bd);
+ QBM_CACHE_FLUSH_NO_DSR(bd, sizeof(qbm_gpd));
+
+ /* set gpd data len */
+ data_len = QBM_DES_GET_DATALEN(gpd);
+ QBM_DES_SET_DATALEN(gpd, data_len-offset);
+ /* set gpd checksum */
+ qbm_cal_set_checksum(gpd);
+ QBM_CACHE_FLUSH_NO_DSR(gpd, sizeof(qbm_gpd));
+ }else{
+ //4 <case 2> GPD->BUFF
+ /* set gpd data ptr */
+ data_ptr = (kal_uint8*)QBM_DES_GET_DATAPTR(gpd);
+ QBM_DES_SET_DATAPTR(gpd, data_ptr+offset);
+ /* set gpd data len */
+ data_len = QBM_DES_GET_DATALEN(gpd);
+ QBM_DES_SET_DATALEN(gpd, data_len-offset);
+ /* set bd checksum */
+ qbm_cal_set_checksum(gpd);
+ QBM_CACHE_FLUSH_NO_DSR(gpd, sizeof(qbm_gpd));
+ }
+ QBM_DSR();
+}
+
+/*!
+ * @function [INLINE] CCCIDEV_QBM_ENQ
+ * @brief Enqueue p_new_head/p_new_tail to pp_orig_head/pp_orig_tail
+ *
+ * @param p_new_head [IN] head of new gpd chain
+ * @param p_new_tail [IN] tail of new gpd chain
+ * @param pp_orig_head [IN/OUT] head of original gpd chain
+ * @param pp_orig_tail [IN/OUT] tail of original gpd chain
+ *
+ * @return void
+ */
+static __inline void CCCIDEV_QBM_ENQ(void *p_new_head, void *p_new_tail, void **pp_orig_head, void **pp_orig_tail)
+{
+ kal_uint8 *p_ori_tail;
+ p_ori_tail = *pp_orig_tail;
+
+ if(*pp_orig_head == NULL){
+ *pp_orig_tail = p_new_tail;
+ *pp_orig_head = p_new_head;
+ }else{
+ /* link new queue */
+ QBM_DES_SET_NEXT(p_ori_tail, p_new_head);
+ // change tail to new tail
+ *pp_orig_tail = p_new_tail;
+ }
+ QBM_DES_SET_NEXT(*pp_orig_tail, NULL);
+}
+
+/*!
+ * @function [INLINE] CCCIDEV_QBM_DEQ
+ * @brief dequeue n GPD from pp_src_head/pp_src_tail to p_new_head/p_new_tail
+ * a accelerate version of qbmt_de_q_n
+ *
+ * @param pp_src_head [IN/OUT] head of src gpd chain
+ * @param pp_src_tail [IN/OUT] tail of src gpd chain
+ * @param n [IN] dequeue count
+ * @param pp_new_head [OUT] head of dest gpd chain
+ * @param pp_new_tail [OUT] tail of dest gpd chain
+ *
+ * @return void
+ */
+static __inline kal_uint32 CCCIDEV_QBM_DEQ(
+ void **pp_src_head,
+ void **pp_src_tail,
+ kal_uint32 n,
+ void **pp_new_head,
+ void **pp_new_tail
+ )
+{
+ kal_uint32 deq_num = 0;
+
+ if(0 == n){
+ *pp_new_head = NULL;
+ *pp_new_tail = NULL;
+ return 0;
+ }
+
+ if(NULL == *pp_src_head){
+ EXT_ASSERT(NULL == *pp_src_tail, (kal_uint32)*pp_src_head, (kal_uint32) *pp_src_tail, 0);
+ *pp_new_head = NULL;
+ *pp_new_tail = NULL;
+ return 0;
+ }
+
+ *pp_new_head = *pp_src_head;
+
+
+ //for(deq_num = 0; deq_num < n; deq_num++){
+ do{
+ *pp_new_tail = *pp_src_head;
+ deq_num++;
+ *pp_src_head = QBM_DES_GET_NEXT(*pp_src_head);
+ }while((deq_num < n) && (NULL != *pp_src_head));
+
+ if(NULL == *pp_src_head){
+ *pp_src_tail = NULL;
+ }
+
+ return deq_num;
+}
+
+/*!
+ * @function [INLINE] CCCIDEV_FIX_IOR_NULL_LAST
+ * @brief if the last gpd of ior is == NULL, traverse the GPD chain to fill the last_gpd info
+ *
+ * @param ior [IN] input ior
+ *
+ * @return void
+ */
+static __inline void CCCIDEV_FIX_IOR_NULL_LAST(ccci_io_request_t* ior)
+{
+ qbm_gpd *last_gpd = ior->last_gpd;
+ qbm_gpd *first_gpd = ior->first_gpd;
+ qbm_gpd *current_gpd;
+
+ /* fix the last_gpd == NULL case */
+ if (last_gpd == NULL)
+ {
+ current_gpd = first_gpd;
+ while ( current_gpd->p_next != NULL )
+ {
+ current_gpd = current_gpd->p_next;
+ }
+ ior->last_gpd = current_gpd;
+ }
+}
+
+
+/*!
+ * @function [INLINE] CCCIDEV_RM_CCCI_HEADERS
+ * @brief Tool function to remove the CCCI header in GPD->BD->BUFF / GPD->BUFF
+ *
+ * @param channel [IN] channel number for this CCCI header
+ * @param gpd [IN] pointer to the gpd
+ *
+ * @return KAL_TRUE: success, KAL_FALSE: channel number not matched
+ */
+static __inline kal_bool CCCIDEV_RM_CCCI_HEADERS(CCCI_CHANNEL_T channel, qbm_gpd *gpd)
+{
+ CCCI_BUFF_T *pdata;
+
+ //4 <1> check gpd->bd->buff->channel = channel
+ pdata = CCCIDEV_GET_QBM_DATAPTR(gpd);
+ EXT_ASSERT(pdata, (kal_uint32)pdata, (kal_uint32)gpd, (kal_uint32)channel);
+
+ /* treat channel not match and size = 0 as invalid GPD*/
+ if(pdata->channel != channel || pdata->data[1] == sizeof(CCCI_BUFF_T)){
+ //hif_trace_error(CCCIDEV_TR_UL_CCCI_CH_ERR, pdata->channel, channel);
+ return KAL_FALSE;
+ }else{
+ //4 <2> move data pointer to raw data
+ CCCIDEV_PULL_QBM_DATAHEAD(gpd, sizeof(CCCI_BUFF_T));
+ }
+
+ return KAL_TRUE;
+}
+
+/*!
+ * @function [INLINE] ccci_dest_ior
+ * @brief Traverse ior chain to free the linked ior/GPD/BD/Buff
+ *
+ * @param ior [IN] pointer to the ior chain
+ *
+ * @return void
+ */
+static __inline void ccci_dest_ior(ccci_io_request_t *ior){
+ ccci_io_request_t *next_ior;
+ qbm_gpd* current_gpd;
+
+ EXT_ASSERT(ior, (kal_uint32)ior, 0, 0);
+ for (; ior; ior = next_ior) {
+ next_ior = ior->next_request;
+ EXT_ASSERT(ior->first_gpd, (kal_uint32)ior->first_gpd, (kal_uint32)ior, (kal_uint32)next_ior);
+
+ /* fix the last_gpd == NULL case */
+ if (ior->last_gpd == NULL)
+ {
+ current_gpd = ior->first_gpd;
+ while ( current_gpd->p_next != NULL )
+ {
+ current_gpd = current_gpd->p_next;
+ }
+ ior->last_gpd = current_gpd;
+ }
+
+ EXT_ASSERT(ior->first_gpd && ior->last_gpd, (kal_uint32)ior->first_gpd, (kal_uint32)ior->last_gpd, (kal_uint32)ior);
+ qbmt_dest_q(ior->first_gpd, ior->last_gpd);
+ }
+}
+
+/* Get address by a offset of the PD */
+#define CCCIDEV_QBM_DES_GET_ADDR_BY_OFFSET(_p, _ofst) \
+ (void*)((kal_uint8*)(_p) + (_ofst))
+
+/* Used for buffer and descriptor are in continus memory address */
+#define CCCIDEV_QBM_DES_SET_DATA_BY_OFFSET(_p, _ofst) \
+ (QBM_GET_GPD_PTR(_p)->p_data_tbd = CCCIDEV_QBM_DES_GET_ADDR_BY_OFFSET(_p, _ofst))
+
+#define CCCI_COMM_BD_OFST (64) /* p_data_tbd = 64 */
+#define CCCI_COMM_GET_BD(_p) CCCIDEV_QBM_DES_GET_ADDR_BY_OFFSET(_p, CCCI_COMM_BD_OFST)
+
+/* this code will set datalen and extlen to 0 */
+/* Because in descriptor, they are in the 12 bytes */
+#define CCCI_COMM_RESET_DATALEN_EXTLEN(_p) *(kal_uint32*)((kal_uint8*)(_p) + 12) = 0
+
+/*!
+ * @function [INLINE] CCCIDEV_RST_CCCI_COMM_GPD_LIST
+ * @brief Reset the GPD list to the default value, type has to be QBM_TYPE_CCCI_COMM
+ *
+ * @param first_gpd [IN] pointer to the first GPD in the GPD chain
+ * @param last_gpd [IN] pointer to the last GPD in the GPD chain
+ *
+ * @return void
+ */
+static __inline kal_uint32 CCCIDEV_RST_CCCI_COMM_GPD_LIST(qbm_gpd* first_gpd, qbm_gpd* last_gpd)
+{
+ qbm_gpd* current_gpd = NULL;
+ qbm_gpd* next_gpd = NULL;
+ kal_uint32 num_gpd = 0;
+
+ EXT_ASSERT(first_gpd && last_gpd, (kal_uint32)first_gpd, (kal_uint32)last_gpd, 0);
+ current_gpd = first_gpd;
+
+ do {
+ next_gpd = QBM_DES_GET_NEXT(current_gpd);
+ qbm_reset_pd(QBM_TYPE_CCCI_COMM, (void*)current_gpd);
+ qbm_cal_set_checksum((kal_uint8 *)current_gpd);
+ QBM_CACHE_FLUSH_NO_DSR(current_gpd, sizeof(qbm_gpd));
+ num_gpd ++;
+ if ( current_gpd == last_gpd )
+ {
+ break;
+ }
+ current_gpd = next_gpd;
+ } while ( current_gpd != NULL );
+ QBM_DSR();
+ return num_gpd;
+}
+
+/*!
+ * @function [Prototype] cccidev_dl_header_handle_cb
+ * @brief Prototype of function to handle each packet's CCCI Header
+ *
+ * @param pDevice [IN] pointer to the CCCIDEV device
+ * @param p_ccci_head [IN] pointer to ccci header buffer
+ * @param kal_uint8 [IN] pointer to the data buffer
+ *
+ * @return 0, unused
+ */
+typedef kal_uint32 (*cccidev_dl_header_handle_cb)(void* p_device, CCCI_BUFF_T* p_ccci_head, kal_uint8* pdata, kal_uint32 data_len);
+
+/*!
+ * @function [static] CCCIDEV_SPD_PI_RELAYOUT
+ * @brief Traverse the input GPD list and insert the CCCI header on the first BD->data
+ *
+ * @param spd [IN] pointer to the SPD in the GPD chain
+ *
+ * @return relayout success
+ */
+static __inline kal_uint32 CCCIDEV_SPD_PI_RELAYOUT(qbm_gpd* p_spd){
+ hif_spd_ext_header *p_spd_ext = (hif_spd_ext_header*)QBM_SPD_GET_EXT((qbm_spd*)p_spd);
+ hif_spd_packet_header *p_spd_ph;
+ qbm_spd_pie *p_spd_pie;
+ qbm_spd_pi *p_spd_pi = QBM_SPD_GET_PI((qbm_spd*)p_spd);
+ kal_uint16 i, pkt_num = 0, header_len = sizeof(CCCI_BUFF_T);
+
+ EXT_ASSERT(QBM_DES_GET_PDT(p_spd) == DES_FLAG_BIT_SPD3,QBM_DES_GET_PDT(p_spd), (kal_uint32)p_spd, 0);
+ p_spd_pie = QBM_SPD_PI_GET_FIRST_PIE(p_spd_pi);
+ p_spd_ph = HIF_SPD_EXT_GET_FIRST_PH(p_spd_ext);
+ pkt_num = QBM_SPD_PI_GET_PKTNUM(p_spd_pi);
+ HIF_SPD_EXT_SET_PKTNUM(p_spd_ext, pkt_num);
+ HIF_SPD_EXT_SET_SPD1_HEADERLEN(p_spd_ext , (kal_uint8)header_len);
+#ifdef CCCIDEV_SPD_RELAYOUT_SET_PKTNUM_TRACE
+ if(KAL_TRUE != kal_query_systemInit() && KAL_FALSE == INT_QueryExceptionStatus())
+ CCCIDEV_SPD_RELAYOUT_SET_PKTNUM_TRACE(pkt_num, (kal_uint32) p_spd_pi, (kal_uint32) p_spd_ext);
+#endif
+ QBM_DES_SET_SPD1(p_spd);
+ for(i = 1; i <=pkt_num; i++){
+ kal_mem_cpy(p_spd_ph, p_spd_pie, sizeof(qbm_spd_pie));
+ // @This is the last packet : check if EPDCP set the EOL correctly, if this assert happend, please contact EPDCP owner
+ if (i == pkt_num){
+ EXT_ASSERT(HIF_SPD_PH_GET_EOL(p_spd_ph), \
+ (kal_uint32)p_spd, pkt_num, (kal_uint32)p_spd_ph);
+ }
+ // @This is an EOL packet : if get EOL but not last packet, should break, no need to handle remaining packet
+ else if (HIF_SPD_PH_GET_EOL(p_spd_ph)){
+#ifdef CCCIDEV_SPD_RELAYOUT_GET_EOL_BREAK_TRACE
+ if(KAL_TRUE != kal_query_systemInit() && KAL_FALSE == INT_QueryExceptionStatus())
+ CCCIDEV_SPD_RELAYOUT_GET_EOL_BREAK_TRACE(pkt_num, i, (kal_uint32) p_spd_ph);
+#endif
+ break;
+ }
+ // @This is a normal packet : if get not last GPD, move to next ph
+ else{
+ p_spd_ph = HIF_SPD_PH_NEXT(p_spd_ph, (kal_uint8)header_len);
+ p_spd_pie = QBM_SPD_PIE_NEXT(p_spd_pie);
+ }
+ }
+ return 0;
+}
+
+
+/*!
+ * @function [static] CCCIDEV_PROCESS_DL_GPD_LIST
+ * @brief Traverse the input GPD list and insert the CCCI header on the first BD->data
+ *
+ * @param pDevice [IN] pointer to the CCCIDEV device
+ * @param first_gpd [IN] pointer to the first GPD in the GPD chain
+ * @param last_gpd [IN] pointer to the last GPD in the GPD chain
+ * @param cccidev_dl_header_handle_cb [IN] pointer of the callback function to handle each packet's CCCI Header
+ *
+ * @return number of gpd/spd in between first_gpd and last_gpd
+ */
+static __inline kal_uint32 CCCIDEV_PROCESS_DL_GPD_LIST(void* pDevice, qbm_gpd* first_gpd, qbm_gpd* last_gpd, cccidev_dl_header_handle_cb cb)
+{ /*process_tx_gpd_list*/
+ qbm_gpd* p_gpd = NULL;
+ kal_uint32 gpd_cnt = 0;
+ CCCI_BUFF_T *p_ccci_head;
+ kal_uint8 current_pdt;
+ hif_spd_packet_header *p_spd_ph, *p_spd_ph_next=NULL; //spd packet head
+ kal_uint8 *p_payload, *p_payload_next=NULL; //spd packet payload
+ hif_spd_ext_header *p_spd_ext; //spd extention
+ kal_uint16 pkt_num;
+ kal_uint32 i, payload_len, header_len=0;
+ kal_uint32 data_len = 0;
+ EXT_ASSERT(first_gpd && last_gpd, (kal_uint32)first_gpd, (kal_uint32)last_gpd, (kal_uint32)pDevice);
+
+ p_gpd = first_gpd;
+ do {
+ current_pdt = QBM_DES_GET_PDT(p_gpd);
+ if(current_pdt == DES_FLAG_BIT_SPD3){
+ CCCIDEV_SPD_PI_RELAYOUT(p_gpd);
+ current_pdt = QBM_DES_GET_PDT(p_gpd);
+ }
+
+ EXT_ASSERT((( current_pdt == DES_FLAG_BIT_SPD1) || (current_pdt == DES_FLAG_BIT_GPD)), \
+ (kal_uint32)current_pdt, (kal_uint32)pDevice, (kal_uint32)p_gpd);
+
+ if(current_pdt == DES_FLAG_BIT_SPD1){
+ //4 <1> SPD1 handling
+ p_spd_ext = (hif_spd_ext_header*)QBM_SPD_GET_EXT((qbm_spd*)p_gpd);
+ p_spd_ph = HIF_SPD_EXT_GET_FIRST_PH((hif_spd_ext_header*)p_spd_ext);
+ p_payload = QBM_DES_GET_DATAPTR((qbm_spd*)p_gpd);
+ pkt_num = HIF_SPD_EXT_GET_PKTNUM((hif_spd_ext_header*)p_spd_ext);
+ //[tk6291_mw_hif_spd_design_doc_v1.0: The packet number should be larger than 1
+ EXT_ASSERT(pkt_num >= 1, pkt_num, (kal_uint32)p_spd_ext, (kal_uint32)(qbm_spd*)p_gpd);
+
+ //4 <1.1> set spd1_header_len = sizeof(CCCI_BUFF_T);
+ //Header length fill by first user
+ header_len = HIF_SPD_EXT_GET_SPD1_HEADERLEN((hif_spd_ext_header*)p_spd_ext);
+ p_spd_ph_next = HIF_SPD_PH_NEXT(p_spd_ph, header_len); // initial
+#ifdef CCCIDEV_PROCESS_DL_SPD_TRACE
+ if(KAL_TRUE != kal_query_systemInit() && KAL_FALSE == INT_QueryExceptionStatus())
+ CCCIDEV_PROCESS_DL_SPD_TRACE(pkt_num, (kal_uint32)p_gpd);
+#endif
+ //4 <1.2> Set IGR for 1st pkt, for MBIM use only, and move to 2nd PH
+ //iterate from the 1st ph
+ for (i=1; i<=pkt_num; i++){
+ payload_len = HIF_SPD_PH_GET_PAYLOAD_LEN(p_spd_ph);
+ if (i != pkt_num){
+ p_spd_ph_next = HIF_SPD_PH_NEXT(p_spd_ph, header_len);
+ p_payload_next = QBM_SPD_PAYLOAD_NEXT(p_payload, payload_len);
+ }
+ if(0 == HIF_SPD_PH_GET_IGR(p_spd_ph)){ // if IGR bit is not set
+ //4 <1.3> append CCCI header CCCI_BUFF_T
+ p_ccci_head = (CCCI_BUFF_T *)HIF_SPD_PH_GET_HEADER(p_spd_ph);
+ // call CCCI Device CCCI header handle
+ cb(pDevice, p_ccci_head, p_payload, payload_len);
+ // payload length check, if this assert happend, please contact EPDCP owner
+ EXT_ASSERT(payload_len, \
+ (kal_uint32)p_gpd, pkt_num, (kal_uint32)p_spd_ph);
+ }
+ else{ // if IGR bit is set
+#ifdef CCCIDEV_PROCESS_DL_SPD_SET_IGR_TRACE
+ if(KAL_TRUE != kal_query_systemInit() && KAL_FALSE == INT_QueryExceptionStatus())
+ CCCIDEV_PROCESS_DL_SPD_SET_IGR_TRACE(HIF_SPD_PH_GET_IGR(p_spd_ph), i, (kal_uint32)p_spd_ph);
+#endif
+ }
+ // @This is the last packet : check if EPDCP set the EOL correctly, if this assert happend, please contact EPDCP owner
+ if (i == pkt_num)
+ {
+ EXT_ASSERT(HIF_SPD_PH_GET_EOL(p_spd_ph), \
+ (kal_uint32)p_gpd, pkt_num, (kal_uint32)p_spd_ph);
+ QBM_CACHE_FLUSH(p_spd_ext, sizeof(qbm_spd_ext));
+ }
+ // @This is an EOL packet :if get EOL but not last packet, should breakm, no need to handle remaining packet
+ else if (HIF_SPD_PH_GET_EOL(p_spd_ph)){
+#ifdef CCCIDEV_SPD_RELAYOUT_GET_EOL_BREAK_TRACE
+ if(KAL_TRUE != kal_query_systemInit() && KAL_FALSE == INT_QueryExceptionStatus())
+ CCCIDEV_SPD_RELAYOUT_GET_EOL_BREAK_TRACE(pkt_num, i, (kal_uint32) p_spd_ph);
+#endif
+ QBM_CACHE_FLUSH(p_spd_ext, sizeof(qbm_spd_ext));
+ break;
+ }
+ // @This is a normal packet : if get not last GPD, move to next ph
+ else
+ {
+ p_spd_ph = p_spd_ph_next;
+ p_payload = p_payload_next;
+ }
+ }
+ }else
+ {
+ //4 <2> GPD handling
+ /* ASSERT if not GPD type, if this assert happens meaning DL is neither SPD type1 nor GPD
+ please seek for EPDCP owner's help*/
+ EXT_ASSERT((current_pdt == DES_FLAG_BIT_GPD), \
+ (kal_uint32)current_pdt, (kal_uint32)pDevice, (kal_uint32)p_gpd);
+
+ //4 <2.1> append CCCI header CCCI_BUFF_T
+ // CCCIDEV append ccci header in BD EXT(only for CCMNI with first empty BD) or GPD EXT
+ if((0 != QBM_DES_GET_BDP(p_gpd)) && (0 == QBM_DES_GET_DATALEN (QBM_DES_GET_DATAPTR(p_gpd)))){
+ //4 <case 1> GPD->BD->BUFF
+ /* Store the DL CCCI header in the BD extention part */
+ void* bd = QBM_DES_GET_DATAPTR(p_gpd);
+ QBM_DES_SET_EXTLEN(bd, sizeof(CCCI_BUFF_T));
+ p_ccci_head = (CCCI_BUFF_T *)QBM_DES_GET_EXT(bd);
+ qbm_cal_set_checksum(bd);
+ QBM_CACHE_FLUSH(bd, sizeof(qbm_gpd));
+ QBM_DES_SET_DATALEN(p_gpd, CCCIDEV_GET_QBM_DATALEN(p_gpd)+sizeof(CCCI_BUFF_T));
+ data_len = CCCIDEV_GET_QBM_DATALEN(p_gpd);
+ }
+ else{
+ //4 <case 2> GPD->BUFF
+ /* Store the DL CCCI header in the GPD extention part */
+ QBM_DES_SET_EXTLEN(p_gpd, sizeof(CCCI_BUFF_T));
+ p_ccci_head = (CCCI_BUFF_T *)QBM_DES_GET_EXT(p_gpd);
+ data_len = CCCIDEV_GET_QBM_DATALEN(p_gpd) + sizeof(CCCI_BUFF_T);
+ }
+ p_payload = CCCIDEV_GET_QBM_DATAPTR(p_gpd);
+ // call CCCI Device CCCI header handle
+ cb(pDevice, p_ccci_head, p_payload, data_len);
+
+ }
+ gpd_cnt++;
+ if ( p_gpd == last_gpd )
+ {
+ break;
+ }
+ //make sure there is no invalid GPD in the list
+ EXT_ASSERT(QBM_DES_GET_NEXT(p_gpd) != NULL, (kal_uint32)p_gpd, (kal_uint32)first_gpd, (kal_uint32)last_gpd);
+ p_gpd = QBM_DES_GET_NEXT(p_gpd);
+ } while ( p_gpd != NULL );
+ return gpd_cnt;
+}
+
+/*!
+ * @function [Prototype] cccidev_dl_header_handle_cb
+ * @brief Prototype of function to handle each packet's CCCI Header
+ *
+ * @param pDevice [IN] pointer to the CCCIDEV device
+ * @param p_ccci_head [IN] pointer to ccci header buffer
+ * @param kal_uint8 [IN] pointer to the data buffer
+ *
+ * @return 0, unused
+ */
+typedef kal_uint32 (*cccidev_dl_header_handle_only_first_cb)(void* p_device, CCCI_BUFF_T* p_ccci_head, kal_uint8* pdata, kal_uint32 data_len, kal_uint16 rem_gpd);
+
+/*!
+ * @function [static] CCCIDEV_PROCESS_DL_GPD_LIST
+ * @brief Traverse the input GPD list and insert the CCCI header on the first BD->data
+ *
+ * @param pDevice [IN] pointer to the CCCIDEV device
+ * @param first_gpd [IN] pointer to the first GPD in the GPD chain
+ * @param last_gpd [IN] pointer to the last GPD in the GPD chain
+ * @param cccidev_dl_header_handle_cb [IN] pointer of the callback function to handle each packet's CCCI Header
+ *
+ * @return number of gpd/spd in between first_gpd and last_gpd
+ */
+static __inline kal_uint32 CCCIDEV_PROCESS_DL_GPD_LIST_ONLY_FIRST(void* pDevice, qbm_gpd* first_gpd, qbm_gpd* last_gpd, cccidev_dl_header_handle_only_first_cb cb, kal_uint16 rem_gpd)
+{ /*process_tx_gpd_list*/
+ qbm_gpd* p_gpd = NULL;
+ kal_uint32 gpd_cnt = 0;
+ CCCI_BUFF_T *p_ccci_head;
+ kal_uint8 current_pdt;
+ hif_spd_packet_header *p_spd_ph, *p_spd_ph_next=NULL; //spd packet head
+ kal_uint8 *p_payload, *p_payload_next=NULL; //spd packet payload
+ hif_spd_ext_header *p_spd_ext; //spd extention
+ kal_uint16 pkt_num;
+ kal_uint32 i, payload_len, header_len =0;
+ kal_bool is_first_SPD = KAL_TRUE;
+
+ EXT_ASSERT(first_gpd && last_gpd, (kal_uint32)first_gpd, (kal_uint32)last_gpd, (kal_uint32)pDevice);
+
+ p_gpd = first_gpd;
+ do {
+ current_pdt = QBM_DES_GET_PDT(p_gpd);
+ if(current_pdt == DES_FLAG_BIT_SPD3){
+ CCCIDEV_SPD_PI_RELAYOUT(p_gpd);
+ current_pdt = QBM_DES_GET_PDT(p_gpd);
+ }
+
+ EXT_ASSERT((( current_pdt == DES_FLAG_BIT_SPD1) || (current_pdt == DES_FLAG_BIT_GPD)), \
+ (kal_uint32)current_pdt, (kal_uint32)pDevice, (kal_uint32)p_gpd);
+
+ if(current_pdt == DES_FLAG_BIT_SPD1)
+ {
+ p_spd_ext = (hif_spd_ext_header*)QBM_SPD_GET_EXT((qbm_spd*)p_gpd);
+ p_spd_ph = HIF_SPD_EXT_GET_FIRST_PH((hif_spd_ext_header*)p_spd_ext);
+ p_spd_ph_next = HIF_SPD_PH_NEXT(p_spd_ph, 0); //initial
+ p_payload = QBM_DES_GET_DATAPTR((qbm_spd*)p_gpd);
+ pkt_num = HIF_SPD_EXT_GET_PKTNUM((hif_spd_ext_header*)p_spd_ext);
+ //[tk6291_mw_hif_spd_design_doc_v1.0: The packet number should be larger than 1
+ EXT_ASSERT(pkt_num >= 1, pkt_num, (kal_uint32)p_spd_ext, (kal_uint32)(qbm_spd*)p_gpd);
+
+ //4 <1.1> set spd1_header_len = sizeof(CCCI_BUFF_T);
+ //Header length fill by first user
+ header_len = HIF_SPD_EXT_GET_SPD1_HEADERLEN((hif_spd_ext_header*)p_spd_ext);
+#ifdef CCCIDEV_PROCESS_DL_SPD_TRACE
+ if(KAL_TRUE != kal_query_systemInit() && KAL_FALSE == INT_QueryExceptionStatus())
+ CCCIDEV_PROCESS_DL_SPD_TRACE(pkt_num, (kal_uint32)p_gpd);
+#endif
+ //4 <1.2> Set IGR for 1st pkt, for MBIM use only, and move to 2nd PH
+ //iterate from the 1st ph
+ if(is_first_SPD == KAL_TRUE){ // only add CCCI header to first SPD
+ is_first_SPD = KAL_FALSE;
+ for (i=1; i<=pkt_num; i++){
+ payload_len = HIF_SPD_PH_GET_PAYLOAD_LEN(p_spd_ph);
+ if (i != pkt_num){
+ p_spd_ph_next = HIF_SPD_PH_NEXT(p_spd_ph, header_len);
+ p_payload_next = QBM_SPD_PAYLOAD_NEXT(p_payload, payload_len);
+ }
+ if(0 == HIF_SPD_PH_GET_IGR(p_spd_ph)){ // if IGR bit is not set
+ //4 <1.3> append CCCI header CCCI_BUFF_T
+ p_ccci_head = (CCCI_BUFF_T *)HIF_SPD_PH_GET_HEADER(p_spd_ph);
+ // call CCCI Device CCCI header handle
+ cb(pDevice, p_ccci_head, p_payload, payload_len, rem_gpd);
+ // This is SPD mode
+ if(rem_gpd > 0)
+ p_ccci_head->data[1] = p_ccci_head->data[1] | (1 << 31);
+ // payload length check, if this assert happend, please contact EPDCP owner
+ EXT_ASSERT(payload_len, \
+ (kal_uint32)p_gpd, pkt_num, (kal_uint32)p_spd_ph);
+ break;//only handle first header
+ }
+ else{ // if IGR bit is set
+#ifdef CCCIDEV_PROCESS_DL_SPD_SET_IGR_TRACE
+ if(KAL_TRUE != kal_query_systemInit() && KAL_FALSE == INT_QueryExceptionStatus())
+ CCCIDEV_PROCESS_DL_SPD_SET_IGR_TRACE(HIF_SPD_PH_GET_IGR(p_spd_ph), i, (kal_uint32)p_spd_ph);
+#endif
+ }
+ // @This is a normal packet : if get not last GPD, move to next ph
+ //else
+ {
+ p_spd_ph = p_spd_ph_next;
+ p_payload = p_payload_next;
+ }
+ }
+ }
+ // Flush all spd ext
+ QBM_CACHE_FLUSH(p_spd_ext, sizeof(qbm_spd_ext));
+ }
+ else
+ {
+ //4 <2> GPD handling
+ /* ASSERT if not GPD type, if this assert happens meaning DL is neither SPD type1 nor GPD
+ please seek for EPDCP owner's help*/
+ EXT_ASSERT((current_pdt == DES_FLAG_BIT_GPD), \
+ (kal_uint32)current_pdt, (kal_uint32)pDevice, (kal_uint32)p_gpd);
+
+ //4 <2.1> append CCCI header CCCI_BUFF_T
+ // CCCIDEV append ccci header in BD EXT(only for CCMNI with first empty BD) or GPD EXT
+ if((0 != QBM_DES_GET_BDP(p_gpd)) && (0 == QBM_DES_GET_DATALEN (QBM_DES_GET_DATAPTR(p_gpd)))){
+ //4 <case 1> GPD->BD->BUFF
+ /* Store the DL CCCI header in the BD extention part */
+ void* bd = QBM_DES_GET_DATAPTR(p_gpd);
+ QBM_DES_SET_EXTLEN(bd, sizeof(CCCI_BUFF_T));
+ p_ccci_head = (CCCI_BUFF_T *)QBM_DES_GET_EXT(bd);
+ qbm_cal_set_checksum(bd);
+ QBM_CACHE_FLUSH(bd, sizeof(qbm_gpd));
+ QBM_DES_SET_DATALEN(p_gpd, CCCIDEV_GET_QBM_DATALEN(p_gpd)+sizeof(CCCI_BUFF_T));
+ CCCI_STREAM_SET_LEN(p_ccci_head, CCCIDEV_GET_QBM_DATALEN(p_gpd));
+ /* hifsdioq_set_gpd will set HWO and set checksum */
+ //qbm_cal_set_checksum(p_gpd);
+ //QBM_CACHE_FLUSH(p_gpd, sizeof(qbm_gpd));
+ }
+ else{
+ //4 <case 2> GPD->BUFF
+ /* Store the DL CCCI header in the GPD extention part */
+ QBM_DES_SET_EXTLEN(p_gpd, sizeof(CCCI_BUFF_T));
+ p_ccci_head = (CCCI_BUFF_T *)QBM_DES_GET_EXT(p_gpd);
+ CCCI_STREAM_SET_LEN(p_ccci_head, CCCIDEV_GET_QBM_DATALEN(p_gpd)+sizeof(CCCI_BUFF_T));
+ }
+ p_payload = CCCIDEV_GET_QBM_DATAPTR(p_gpd);
+ // call CCCI Device CCCI header handle
+ cb(pDevice, p_ccci_head, p_payload, CCCIDEV_GET_QBM_DATALEN(p_gpd), rem_gpd);
+ break; // GPD mode only processes first gpd
+ }
+ gpd_cnt++;
+ if ( p_gpd == last_gpd )
+ {
+ break;
+ }
+ //make sure there is no invalid GPD in the list
+ EXT_ASSERT(QBM_DES_GET_NEXT(p_gpd) != NULL, (kal_uint32)p_gpd, (kal_uint32)first_gpd, (kal_uint32)last_gpd);
+ p_gpd = QBM_DES_GET_NEXT(p_gpd);
+ } while ( p_gpd != NULL );
+ return gpd_cnt;
+}
+
+#endif //#ifndef _CCCIDEV_QBM_H
diff --git a/mcu/interface/service/hif/cccisrv_struct.h b/mcu/interface/service/hif/cccisrv_struct.h
new file mode 100644
index 0000000..ed8281d
--- /dev/null
+++ b/mcu/interface/service/hif/cccisrv_struct.h
@@ -0,0 +1,136 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * cccisrv_struct.h
+ *
+ * Project:
+ * --------
+ * UMOLY
+ *
+ * Description:
+ * ------------
+ * Defines CCCI service ILM struct for ELT logging
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ *
+ ****************************************************************************/
+#ifndef _CCCISRV_STRUCT_H
+#define _CCCISRV_STRUCT_H
+#include "ccci_if.h"
+#include "ccci_ipc_if.h"
+
+#define CCCI_IPC_SHARE_BUFFER_COUNT 10
+#define CCCI_RPC_SHARE_BUFFER_COUNT 3
+
+/**************************************************
+ * CCCI_SYSMSG ilm struct
+ **************************************************/
+typedef struct ccci_sysmsg_para_t
+{
+ LOCAL_PARA_HDR
+ CCCI_BUFF_T ccci_header;
+} CCCI_SYSMSG_PARA_T;
+/* MSG_ID_CCCI_AP_L1C_SYSMSG_IND, MSG_ID_CCCI_AP_L1C_SYSMSG_REQ */
+
+typedef CCCI_SYSMSG_PARA_T ccci_sysmsg_req_struct;
+typedef CCCI_SYSMSG_PARA_T ccci_sysmsg_ind_struct;
+
+/**************************************************
+ * CCCI_RPC ilm struct
+ **************************************************/
+#define IPC_RPC_ILM_MAX_BUF_SIZE 128 /* PCore support 2048 */
+
+typedef struct ccci_rpc_buff_t{
+ CCCI_BUFF_T ccci_header;
+ kal_uint8 buff[0];
+}CCCI_RPC_SHARE_BUFF_T;
+
+typedef struct ccci_rpc_para_t
+{
+ LOCAL_PARA_HDR
+ void* buffer; //share memory address
+} CCCI_RPC_PARA_T;
+/*MSG_ID_CCCI_PSC_L1C_RPC_IND, MSG_ID_CCCI_PSC_L1C_RPC_RSP*/
+typedef CCCI_RPC_PARA_T ccci_rpc_ind_struct;
+typedef CCCI_RPC_PARA_T ccci_rpc_rsp_struct;
+
+/**************************************************
+ * CCCI_IPC ilm struct
+ **************************************************/
+#define CCCI_IPC_ILM_MAX_BUF_SIZE 128 /* PCore support 3548 */
+
+typedef struct ccci_ipc_para_t
+{
+ LOCAL_PARA_HDR
+ void* buffer; //share memory address
+} CCCI_IPC_PARA_T;
+
+/*MSG_ID_CCCI_PSC_L1C_IPC_IND, MSG_ID_CCCI_PSC_L1C_IPC_RSP*/
+typedef CCCI_IPC_PARA_T ccci_ipc_ind_struct;
+typedef CCCI_IPC_PARA_T ccci_ipc_rsp_struct;
+
+
+/* CCCI service IT */
+#if defined(__CCCI_SRV_IT__)
+
+#define CCCI_SRV_IT_MAX_TASK 4
+typedef enum {
+ CCCISRV_IT_DISABLE,
+ CCCISRV_IT_LB,
+ CCCISRV_IT_DL,
+ CCCISRV_IT_UL,
+}CCCISRV_IT_MODE;
+
+typedef struct _ccci_serviceit_para_t
+{
+ LOCAL_PARA_HDR
+ CCCISRV_IT_MODE it_mode; /* IT mode */
+ kal_uint32 test_task_cnt; /* total it task in one time */
+ kal_uint32 param[3]; /* task 3 params to l1core */
+} ccci_serviceit_para_t;
+
+extern void cccisrvit_return_result(kal_uint32 dest_mod_id, kal_uint32 msg_id,kal_uint32 test_task_id, kal_uint32 result);
+
+#endif
+
+#endif //_CCCISRV_STRUCT_H
+
diff --git a/mcu/interface/service/hif/hif_spd_ext.h b/mcu/interface/service/hif/hif_spd_ext.h
new file mode 100644
index 0000000..245a466
--- /dev/null
+++ b/mcu/interface/service/hif/hif_spd_ext.h
@@ -0,0 +1,183 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2014
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * hif_spd_ext.h
+ *
+ * Project:
+ * --------
+ * UMOLY
+ *
+ * Description:
+ * ------------
+ * Defines the common spd ext macros for HIF middleware
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ *******************************************************************************/
+#ifndef HIF_SPD_EXT_H
+#define HIF_SPD_EXT_H
+
+#include "kal_public_api.h"
+#include "qmu_bm_spd.h"
+
+
+/*------------------------------------------------------------------------------
+ * Type definitions
+ *----------------------------------------------------------------------------*/
+typedef struct _hif_spd_ext_header hif_spd_ext_header;
+typedef struct _hif_spd_packet_header hif_spd_packet_header;
+
+/*------------------------------------------------------------------------------
+ * Data structures
+ *----------------------------------------------------------------------------*/
+struct _hif_spd_ext_header
+{
+ kal_uint16 pkt_num; //
+ kal_uint8 spd1_header_len; // the header length of SPD type 1
+ kal_uint8 reserved;
+};
+
+struct _hif_spd_packet_header
+{
+ kal_uint16 payload_len; // the length of packet payload
+ kal_uint8 spd2_header_len; // the header length of SPD type 2
+ kal_uint8 flags; // includes IGR and EOL
+};
+
+/*------------------------------------------------------------------------------
+ * Macros
+ *----------------------------------------------------------------------------*/
+#define SPD_PH_FLAG_BIT_EOL ((kal_uint8)0x40)
+#define SPD_PH_FLAG_BIT_IGR ((kal_uint8)0x80)
+
+#define HIF_SPD_PH_SET_EOL(_p) \
+ (HIF_GET_SPD_PH_PTR(_p)->flags |= SPD_PH_FLAG_BIT_EOL)
+
+#define HIF_SPD_PH_CLR_EOL(_p) \
+ (HIF_GET_SPD_PH_PTR(_p)->flags &= ~SPD_PH_FLAG_BIT_EOL)
+
+#define HIF_SPD_PH_GET_EOL(_p) \
+ (HIF_GET_SPD_PH_PTR(_p)->flags & SPD_PH_FLAG_BIT_EOL)
+
+#define HIF_SPD_PH_SET_IGR(_p) \
+ (HIF_GET_SPD_PH_PTR(_p)->flags |= SPD_PH_FLAG_BIT_IGR)
+
+#define HIF_SPD_PH_CLR_IGR(_p) \
+ (HIF_GET_SPD_PH_PTR(_p)->flags &= ~SPD_PH_FLAG_BIT_IGR)
+
+#define HIF_SPD_PH_GET_IGR(_p) \
+ (HIF_GET_SPD_PH_PTR(_p)->flags & SPD_PH_FLAG_BIT_IGR)
+
+/*------------------------------------------------------------------------------
+ * Inline functions
+ *----------------------------------------------------------------------------*/
+INLINE_MODIFIER INLINE void HIF_SPD_EXT_SET_PKTNUM(hif_spd_ext_header *p_spdext, kal_uint16 num)
+{
+ p_spdext->pkt_num = num;
+}
+
+INLINE_MODIFIER INLINE kal_uint16 HIF_SPD_EXT_GET_PKTNUM(hif_spd_ext_header *p_spdext)
+{
+ return p_spdext->pkt_num;
+}
+
+INLINE_MODIFIER INLINE void HIF_SPD_EXT_SET_SPD1_HEADERLEN(hif_spd_ext_header *p_spdext, kal_uint8 len)
+{
+ DEBUG_ASSERT( len <= QBM_SPD_MAX_HEADER_LEN );
+ p_spdext->spd1_header_len = len;
+}
+
+INLINE_MODIFIER INLINE kal_uint8 HIF_SPD_EXT_GET_SPD1_HEADERLEN(hif_spd_ext_header *p_spdext)
+{
+ return p_spdext->spd1_header_len;
+}
+
+INLINE_MODIFIER INLINE hif_spd_packet_header* HIF_SPD_EXT_GET_FIRST_PH(void *p)
+{
+ return (hif_spd_packet_header*)((kal_uint8 *)(p) + sizeof(hif_spd_ext_header));
+}
+
+INLINE_MODIFIER INLINE hif_spd_packet_header* HIF_GET_SPD_PH_PTR(void *p)
+{
+ return (hif_spd_packet_header*)p;
+}
+
+INLINE_MODIFIER INLINE void HIF_SPD_PH_SET_PAYLOAD_LEN(hif_spd_packet_header *p_spdph, kal_uint16 len)
+{
+ p_spdph->payload_len = len;
+}
+
+INLINE_MODIFIER INLINE kal_uint16 HIF_SPD_PH_GET_PAYLOAD_LEN(hif_spd_packet_header *p_spdph)
+{
+ return p_spdph->payload_len;
+}
+
+INLINE_MODIFIER INLINE void HIF_SPD_PH_SET_SPD2_HEADERLEN(hif_spd_packet_header *p_spdph, kal_uint8 len)
+{
+ p_spdph->spd2_header_len = len;
+}
+
+INLINE_MODIFIER INLINE kal_uint8 HIF_SPD_PH_GET_SPD2_HEADERLEN(hif_spd_packet_header *p_spdph)
+{
+ return p_spdph->spd2_header_len;
+}
+
+INLINE_MODIFIER INLINE kal_uint8* HIF_SPD_PH_GET_HEADER(hif_spd_packet_header *p_ph)
+{
+ return ((kal_uint8 *)(p_ph) + sizeof(hif_spd_packet_header));
+}
+
+INLINE_MODIFIER INLINE hif_spd_packet_header* HIF_SPD_PH_NEXT(hif_spd_packet_header *p_ph, kal_uint8 header_len)
+{
+ kal_uint8* addr = ((kal_uint8 *)(p_ph) + sizeof(hif_spd_packet_header) + ((header_len + 3) & ~(0x3)));// 4-bytes alignment
+
+ return (hif_spd_packet_header *)addr;
+}
+
+#endif /* HIF_SPD_EXT_H */
\ No newline at end of file
diff --git a/mcu/interface/service/hif/hif_swla.h b/mcu/interface/service/hif/hif_swla.h
new file mode 100644
index 0000000..a36ba72
--- /dev/null
+++ b/mcu/interface/service/hif/hif_swla.h
@@ -0,0 +1,30 @@
+#ifndef __INC_HIF_SWLA_H
+#define __INC_HIF_SWLA_H
+
+/*
+ * Purpose:
+ * Allow SWLA customLog profile.
+ * You can acquire the counter between HIF_SWLA_START() and HIF_SWLA_STOP().
+ *
+ * Usage:
+ * step 1. Invoke HIF_SWLA_START() to start SWLA customLog in your function.
+ *
+ * step 2. Invoke HIF_SWLA_STOP() to stop SWLA customLog in your function.
+ *
+ * step 3. Use ELT to ASSERT MTK device and then MEMDUMP SWLA result.
+ *
+ */
+
+
+#if defined HIF_SWLA_CUSTOM_LOG
+#include "swla_public.h"
+#define HIF_SWLA_START(_x) SLA_CustomLogging(_x, SA_start)
+#define HIF_SWLA_STOP(_x) SLA_CustomLogging(_x, SA_stop)
+
+#else
+#define HIF_SWLA_START(_x)
+#define HIF_SWLA_STOP(_x)
+
+#endif
+
+#endif /* __INC_HIF_SWLA_H */
diff --git a/mcu/interface/service/hif/hif_trace.h b/mcu/interface/service/hif/hif_trace.h
new file mode 100644
index 0000000..3263ddb
--- /dev/null
+++ b/mcu/interface/service/hif/hif_trace.h
@@ -0,0 +1,138 @@
+#ifndef __INC_HIF_TRACE_H
+#define __INC_HIF_TRACE_H
+
+#include "dhl_trace.h"
+
+/*
+ * Purpose:
+ * Allow DHL index trace like message can be shown in console.
+ *
+ * Limitation:
+ * 1. Not support string and floating point format specifiers.
+ *
+ * Usage:
+ * step 1. Define HIF_CONSOLE_TRACE_ENABLED to 1 if you want to print
+ * dhl_trace() message to console, otherwise, define it to 0
+ *
+ * step 2. Write your own trace message header file and use the
+ * compiler flag HIF_CONSOLE_TRACE_ENABLED to prevent including
+ * DHL realted header files.
+ *
+ * step 3. Include hif_trace.h and your trace message header file.
+ * Please note that, except for the trace message header file,
+ * you are also required to follow follow DHL logging API user
+ * guide to use DHL logging facilities.
+ *
+ * step 4. Use hif_trace_error() and hif_trace_info() to print
+ * DHL indexed trace like message to console or ELT as you
+ * specified in step 1.
+ *
+ * Example:
+ * Assume your module ID is MOD_XXX and the file and function prefix is xxx.
+ *
+ * In xxx_trace.h
+ *
+ * #if HIF_CONSOLE_TRACE_ENABLED != 1
+ * #ifndef GEN_FOR_PC
+ * #include "kal_public_defs.h"
+ * #endif
+ *
+ * #include "dhl_trace.h"
+ * #include "dhl_def.h"
+ *
+ * #if !defined(GEN_FOR_PC)
+ * #if defined(__DHL_MODULE__) || defined(__CUSTOM_RELEASE__)
+ * #include "rndis_trace_gen.h"
+ * #endif
+ * #endif
+ * #endif
+ * BEGIN_TRACE_MAP(MOD_RNDIS)
+ * TRC_MSG(XXX_SHOW_CODE_MSG_INDEX, "[XXX] xxx_func() got code(%d)")
+ * TRC_MSG(XXX_ERROR_MSG_INDEX, "[XXX] xxx_func() failed!")
+ * END_TRACE_MAP(MOD_RNDIS)
+ *
+ * In Option.mak:
+ *
+ * COMP_TRACE_DEFS += YOUR_MODULE_PATH\include\xxx_trace.h
+ *
+ * In xxx_debug.h:
+ *
+ * #define HIF_CONSOLE_TRACE_ENABLED 1
+ * #include "hif_trace.h"
+ * #include "xxx_trace.h"
+ *
+ * In xxx_yyy.c:
+ *
+ * #include "hif_debug.h"
+ *
+ * void xxx_func(int code) {
+ * hif_trace_info(XXX_SHOW_CODE_MSG_INDEX, code);
+ * if (OK != code) {
+ * hif_trace_error(XXX_ERROR_MSG_INDEX);
+ * }
+ * }
+ */
+#if HIF_CONSOLE_TRACE_ENABLED==1
+ /*
+ * Print indexed trace to console.
+ */
+ #if defined(__MTK_TARGET__)
+ #define hif_console_trace dbg_print
+ #define HIF_NEW_LINE "\r\n"
+ #else
+ #define hif_console_trace kal_printf
+ #define HIF_NEW_LINE "\n"
+ #endif
+
+ #if defined(__GNUC__)
+ #define __UNUSED_ATTR__ __attribute__ ((unused))
+ #else
+ #define __UNUSED_ATTR__
+ #endif
+
+ #define hif_trace_error(...) hif_console_trace(__VA_ARGS__)
+ #define hif_trace_info(...) hif_console_trace(__VA_ARGS__)
+
+ #if defined(BEGIN_TRACE_MAP)
+ #undef BEGIN_TRACE_MAP
+ #endif
+ #if defined(TRC_MSG)
+ #undef TRC_MSG
+ #endif
+ #if defined(END_TRACE_MAP)
+ #undef END_TRACE_MAP
+ #endif
+ #define BEGIN_TRACE_MAP(_mod)
+ #define TRC_MSG(_msg_index, _fmt) static char _msg_index [] __UNUSED_ATTR__ = _fmt HIF_NEW_LINE;
+ #define END_TRACE_MAP(_mod)
+#else
+ /*
+ * Use DHL logging.
+ */
+ #define hif_trace_error(trc_name, ...) MD_TRC_##trc_name(__VA_ARGS__)
+ #define hif_trace_info(trc_name, ...) MD_TRC_##trc_name(__VA_ARGS__)
+ #define hif_trace_debug(trc_name, ...) MD_TRC_##trc_name(__VA_ARGS__)
+#endif /* HIF_CONSOLE_TRACE_ENABLED */
+
+#if HIF_DATA_TRACE_ENABLED==1
+ #ifdef __MTK_TARGET__
+ #define hif_data_trace(FUNC_NAME, ...) do { if(KAL_FALSE == kal_query_systemInit()){FUNC_NAME ( __VA_ARGS__ ) ;} } while (0)
+ #else
+ /*
+ * (2013/08/20) Do to VC compiler bug in variadic macro replacement, it needs to divide Variadic macro into 2 parts to workaround.
+ * http://connect.microsoft.com/VisualStudio/feedback/details/380090/variadic-macro-replacement
+ */
+ #define hif_data_trace_arg(FUNC_NAME, args_list) do{ FUNC_NAME args_list ; } while (0)
+ #define hif_data_trace(FUNC_NAME, ...) do{ hif_data_trace_arg(FUNC_NAME, (__VA_ARGS__)); } while (0)
+ #endif /* __MTK_TARGET__ */
+#else
+ #define hif_data_trace(FUNC_NAME, ...)
+#endif /* HIF_DATA_TRACE_ENABLED */
+
+#if __SENSITIVE_DATA_MOSAIC__
+ #define hif_data_trace_usir(FUNC_NAME, ...) do { if(KAL_FALSE == dhl_mask_sensitive_trace_on()){hif_data_trace(FUNC_NAME, __VA_ARGS__);} } while (0)
+#else
+ #define hif_data_trace_usir(FUNC_NAME, ...) hif_data_trace(FUNC_NAME, __VA_ARGS__)
+#endif
+
+#endif /* __INC_HIF_TRACE_H */
diff --git a/mcu/interface/service/hif/hlt_if.h b/mcu/interface/service/hif/hlt_if.h
new file mode 100644
index 0000000..5f12b2a
--- /dev/null
+++ b/mcu/interface/service/hif/hlt_if.h
@@ -0,0 +1,179 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * hlt_if.h
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * Defines the HLT data structures and APIs
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 08 16 2018 actory.ou
+ * [MOLY00345375] [Gen97] Landing NCCCI (Next gen CCCI)
+ * [VMOLY] add nccci ncccisrv nccci_it_ctrl
+ *
+ * 03 26 2015 hsin-jun.tang
+ * [MOLY00104127] [HLT] Add HLT feature for CCCISRV CCCIDEV SDIOC
+ * [HLT] CCCISRV CCCIDEV SDIOC
+ *
+ ****************************************************************************/
+#ifndef _HLT_IF_H
+#define _HLT_IF_H
+#include "kal_public_api.h"
+
+/* struct define */
+typedef enum{
+ HLT_USER_ID_START =0,
+ CCCI_LATENCY_ULIOR_CB,
+ CCCI_LATENCY_ULIOR_CB_TO_USER,
+ CCCI_LATENCY_ULIOR_CB_TO_NCCCI_USER,
+ CCCI_LATENCY_ULBUFF_CB,
+ CCCI_LATENCY_ULBUFF_CB_TO_USER,
+ CCCI_LATENCY_ULNET_CB,
+ CCCI_LATENCY_ULNET_CB_TO_USER,
+ CCCI_LATENCY_WRITE_BUFF,
+ CCCI_LATENCY_WRITE_IOR,
+ CCCI_LATENCY_WRITE_IOREQ,
+ CCCI_LATENCY_DLIOR_AGG_CB,
+ CCCI_LATENCY_DLIOR_AGG_CB_TO_USER,
+ CLDMA_LATENCY_HISR,
+ CLDMA_LATENCY_DEQ,
+ CLDMA_LATENCY_ENQ,
+ CLDMA_LATENCY_ACK,
+ //SDIOC 16
+ SDIOC_DL_SUBMIT,
+ SDIOC_UL_POLL_Q,
+ //CCCI SYS MSG 18
+ CCCI_SYS_MSG_SEND_MESSAGE,
+ CCCI_SYS_MSG_UL_CB,
+ //CCCI IPC 20
+ CCCI_IPC_DL_TO_HIF,
+ CCCI_IPC_DL_WHOLE,
+ CCCI_IPC_UL_SEND_ILM,
+ CCCI_IPC_UL_WHOLE,
+ //CCCI RPC 24
+ CCCI_RPC_WRITE,
+ CCCI_RPC_PROCESS,
+ CCCI_RPC_READ,
+ CCCI_RPC_WHOLE,
+ //CCCI IMS 28
+ CCCI_IMS_DL_TO_HIF,
+ CCCI_IMS_UL_CB,
+ //CCCI FS 30
+ CCCI_FS_GET_PORT,
+ CCCI_FS_PUT_BUFF,
+ CCCI_FS_WAIT_RX,
+ CCCI_FS_GET_BUFF,
+ CCCI_FS_PUT_PORT,
+ CCCI_FS_WHOLE,
+ //CCMNI 36
+ CCMNI_DL_TO_HIF,
+ CCMNI_UL_CB,
+ CCMNI_UL_RELOAD_Q,
+ //CCCI TTY 39
+ CCCI_TTY_DL_TO_HIF,
+ CCCI_TTY_DL_RELOAD_GPD,
+ CCCI_TTY_UL_CB,
+ CCCI_TTY_UL_DEQ_ILM,
+ //NCCCI
+ CCCI_LATENCY_CB_TO_NCCCI_USER,
+ CCCI_LATENCY_NCCCI_WRITE_IOREQ,
+ CCCI_LATENCY_NCCCI_READ_RELOAD_HIF_IOREQ,
+ // user need to define here
+ HLT_USER_ID_MAX,
+}HLT_USER_ID;
+
+typedef enum{
+ /* Unit is us */
+ HLT_LATENCY_BOUND_10US = 10,
+ HLT_LATENCY_BOUND_50US = 50,
+ HLT_LATENCY_BOUND_100US = 100,
+ HLT_LATENCY_BOUND_500US = 500,
+ HLT_LATENCY_BOUND_1MS = 1000,
+ HLT_LATENCY_BOUND_5MS = 5000,
+ HLT_LATENCY_BOUND_10MS = 10000,
+ // add more
+}HLT_LATENCY_BOUND;
+
+typedef struct {
+ HLT_USER_ID id; /* The latecy trace id*/
+ kal_uint32 start_time;
+ kal_uint32 end_time;
+ HLT_LATENCY_BOUND bound; /* The latency boundary */
+ kal_uint32 reserved; /* Print this reserved to log */
+}HLT_USER_INFO_T;
+
+#if defined(__HLT_SUPPORT__) // in hif_main.mak
+
+/* API define */
+void hlt_init(HLT_USER_INFO_T *info, HLT_USER_ID id, HLT_LATENCY_BOUND bound, kal_uint32 reserved);
+void hlt_start(HLT_USER_INFO_T *info);
+kal_uint32 hlt_end(HLT_USER_INFO_T *info);
+
+#define HLT_INIT hlt_init
+#define HLT_START hlt_start
+#define HLT_END hlt_end
+
+/* Will calcualte avg when call hif_latency_trace_end */
+//#define __HLT_CALCULATE_AVG__
+
+/* Check user's input parameter, wil assert if invalid */
+//#define __HLT_CHECK_ERROR__
+#if defined (__HLT_CHECK_ERROR__)
+#define HLT_CHECK_ERROR_ASSERT EXT_ASSERT
+#else
+#define HLT_CHECK_ERROR_ASSERT(...) {}
+#endif // __HLT_CHECK_ERROR__
+
+#else // Not support HLT
+#define HLT_INIT(...) {}
+#define HLT_START(...) {}
+#define HLT_END(...) {}
+#endif // __HLT_SUPPORT__
+
+#endif //#ifndef _HLT_IF_H
diff --git a/mcu/interface/service/hif/hmu.h b/mcu/interface/service/hif/hmu.h
new file mode 100644
index 0000000..9b7e9f3
--- /dev/null
+++ b/mcu/interface/service/hif/hmu.h
@@ -0,0 +1,410 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * hmu.c
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * This file is the header file of Host Interface Management Unit.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 08 07 2017 cs.huang
+ * [MOLY00268551] Task batch scheduling for LTE Low power
+ * HMU for TG change
+ *
+ * 08 07 2017 cs.huang
+ * [MOLY00268551] Task batch scheduling for LTE Low power
+ * HMU for TG change
+ *
+ * 02 06 2017 steve.kao
+ * [MOLY00195563] [6293][EL2][UPCM][RATDM][EPDCP] Initial feature integrations
+ *
+ * [UMOLYA][TRUNK][HMU] Set HMU_GPTIMER_PRIODIC_INTERVAL as 1 ms for UESIM only
+ *
+ * 09 26 2016 cammie.yang
+ * [MOLY00195563] [6293][EL2][UPCM][RATDM][EPDCP] Initial feature integrations
+ * [TRUNK] UPCM/RATDM/EPDCP feature integrations from PS.DEV
+ *
+ * 09 19 2016 cammie.yang
+ * [MOLY00195563] [6293][EL2][UPCM][RATDM][EPDCP] Initial feature integrations
+ * [PS.DEV][HMU] modify tick uint of HMU_GPTIMER_PRIODIC_INTERVAL in modis environment for NWSIM TC_7_3_6_1
+ *
+ * 11 11 2015 ap.wang
+ * [MOLY00148947] [HMU] Change PALLADIUM GPT timer to 1ms
+ * .
+ *
+ * 11 10 2015 ap.wang
+ * [MOLY00148746] [HMU] Check timer feature
+ * .
+ *
+ * 11 10 2015 ap.wang
+ * [MOLY00148746] [HMU] Check timer feature
+ *
+ * 03 02 2015 ap.wang
+ * [MOLY00097320] [HMU] Rollback HMU 10ms patch for FPGA to 1ms
+ * Rollback HMU 10ms patch for FPGA
+ *
+ * 12 31 2014 ap.wang
+ * [MOLY00089916] [HMU] HIF ON/OFF for power saving
+ * .
+ *
+ * 11 13 2014 cs.huang
+ * [MOLY00071215] [HMU] Modify HMU tick to 10ms for 6291 FPGA freqency too slow
+ * Merging
+ *
+ * //UMOLY/DEV/MT6291_DEV/mcu/pcore/interface/service/hif/hmu.h
+ *
+ * to //UMOLY/TRUNK/UMOLY/mcu/pcore/interface/service/hif/hmu.h
+ *
+ * 07 04 2014 ap.wang
+ * [MOLY00071481] [HMU] Add HIF boot init to Application init
+ * .
+ *
+ *
+ * 06 10 2014 ap.wang
+ * [MOLY00067367] [HMU] Modify GPT timer to MS callback for R8 on MOLY
+ * .
+ *
+ * 04 28 2014 ap.wang
+ * [MOLY00063912] [HMU] HMU temp solution for K2 MD2
+ * HMU temp solution for K2 MD2
+ *
+ * 03 11 2013 ap.wang
+ * [MOLY00011696] [HMU] HMU code refine and compile warning fix
+ * [HMU] Add copyright header and change ipc_reload condition
+ ****************************************************************************/
+
+/*******************************************************************************
+ * Include header files
+ *******************************************************************************/
+
+#ifndef __HMU_H__
+#define __HMU_H__
+
+#include "hmu_conf_data.h"
+/*************************************************************************
+ * Type Definitions
+ *************************************************************************/
+
+//#if defined(__MTK_TARGET__)
+//#define hmu_printf dbg_print
+//#else
+//#define hmu_printf kal_printf
+//#endif
+#define hmu_printf
+
+#define HMU_GPTIMER_INIT_INTERVAL (100U) //100 ms
+
+#if defined(__MTK_TARGET__)
+ #if defined(__PALLADIUM__)
+ #define HMU_GPTIMER_PRIODIC_INTERVAL (1U) // 1ms
+ #elif defined(__FPGA__)
+ #define HMU_GPTIMER_PRIODIC_INTERVAL (10U) // 10ms
+ #else
+ #define HMU_GPTIMER_PRIODIC_INTERVAL (1U) // 1ms
+ #endif
+#elif defined(__U4G_ADAPTOR__)
+ #define HMU_GPTIMER_PRIODIC_INTERVAL (1U) // 1ms. to ensure that GCF TC_7_3_6_1 will pass in NWSIM
+#else
+ #define HMU_GPTIMER_PRIODIC_INTERVAL (10U) // 10ms
+#endif
+
+/**
+ * @brief enumeration for HMU API return codes
+ */
+typedef enum
+{
+ HMU_OK = 0,
+
+ HMU_INIT_NOFUNC = (-1),
+ HMU_NOT_INIT = (-2),
+ HMU_ALREADY_INIT = (-3),
+
+ HMU_QUERY_FAIL = (-10),
+ HMU_QUERY_OUTOFBUF = (-11),
+ HMU_QUERY_NVRAMFAIL = (-12),
+ HMU_QUERY_NOMATCHING = (-13),
+
+}hmuReturnCode_enum;
+
+typedef enum
+{
+ HMU_PRE_FUNC = 0,
+ HMU_MAIN_FUNC = 1,
+ HMU_POST_FUNC = 2,
+}hmuFuncType_enum;
+
+/**
+ * @brief hmu_check_timer() return value
+ */
+typedef enum
+{
+ HMU_CHECK_TIMER_SUCCESS = 0,
+ HMU_CHECK_TIMER_WARNING = 1,
+ HMU_CHECK_TIMER_ERROR = 2,
+}HMU_CHECK_TIMER_ENUM;
+
+/**
+ * @brief enumeration for HMU Boot method,
+ * Currently, we have
+ * (1) HMU_BOOT_NORMAL : this setting is for normal booting with USB,SDIO,CCIF ....
+ * When you select HMU_BOOT_NORMAL in hmu_init, the HMU configuration file will be loaded from NVRAM_EF_HMU_CONFIG_LID
+ * (2) HMU_BOOT_HD L this setting is for USB Host detection booting
+ * When you select HMU_BOOT_HD in hmu_init, the HMU configuration file will be loaded from NVRAM_EF_HMU_HD_CONFIG_LID
+ */
+typedef enum
+{
+ HMU_BOOT_NORMAL = 0,
+ HMU_BOOT_HD ,
+}hmuBootType_enum;
+
+typedef enum
+{
+ HMU_TIMER_SOURCE_DSP = 0,
+ HMU_TIMER_SOURCE_SYS ,
+}hmuTimerSource_enum;
+/**
+ * @name: _HMU_INTERNAL_STRUCT
+ * @brief the structure for Init function and hif emu device types registration table
+ */
+typedef struct _HMU_INTERNAL_STATE_STRUCT {
+ kal_bool hmuBootInit;
+ kal_bool hmuInit ;
+ kal_eventgrpid hmuHifEgId ;
+} hmu_internal_state_struct ;
+
+/*****************************************************************************
+ * FUNCTION
+ * hmu_boot_init
+ * DESCRIPTION
+ * HMU 1st boot Init function to init global mutex and gptimer
+ * PARAMETERS
+ *
+ * RETURNS
+ * success or fail
+ *****************************************************************************/
+kal_int32 hmu_boot_init(void) ;
+
+/*****************************************************************************
+ * FUNCTION
+ * hmu_hifeg_set
+ * DESCRIPTION
+ * Set one or more the events to resume the HIF task.
+ * PARAMETERS
+ * events - events to set.
+ * See also HIF_DRV_EG_XXX defined in hmu_conf_data.h for more information.
+ * RETURNS
+ * the eg set result, success or fail
+ *****************************************************************************/
+kal_status hmu_hifeg_set(kal_uint32 events);
+
+/*****************************************************************************
+ * FUNCTION
+ * hmu_hifeg_wait
+ * DESCRIPTION
+ * Wait and clear the one or more HIF events.
+ * PARAMETERS
+ * events - events to wait.
+ * See also HIF_DRV_EG_XXX defined in hmu_conf_data.h for more information.
+ * RETURNS
+ * The event happened.
+ *****************************************************************************/
+kal_uint32 hmu_hifeg_wait(kal_uint32 events);
+
+/*****************************************************************************
+ * FUNCTION
+ * hmu_start_hif_sys_timer
+ * DESCRIPTION
+ * start the sys timer for HIF tasking. This API should be called from PWSV module to restart
+ * the timer after wake up from PWSV
+ * PARAMETERS
+ * void
+ * RETURNS
+ * void
+ *****************************************************************************/
+void hmu_start_hif_sys_timer(void) ;
+
+/*****************************************************************************
+ * FUNCTION
+ * hmu_stop_hif_sys_timer
+ * DESCRIPTION
+ * stop the sys timer to pause HIF tasking. This API should be called at the beginning of
+ * PWSV procedure
+ * PARAMETERS
+ * void
+ * RETURNS
+ * void
+ *****************************************************************************/
+void hmu_stop_hif_sys_timer(void) ;
+
+
+/*****************************************************************************
+ * FUNCTION
+ * hmu_dsp_timer_kick
+ * DESCRIPTION
+ * The dsp periodical timer should kick this API to schedul the HIF tasking when the dsp
+ * timer exists.
+ * PARAMETERS
+ * void
+ * RETURNS
+ * void
+ *****************************************************************************/
+void hmu_dsp_timer_kick(void) ;
+
+/*****************************************************************************
+ * FUNCTION
+ * hmu_switch_hif_timer
+ * DESCRIPTION
+ * The dsp periodical timer should kick this API to schedul the HIF tasking when the dsp
+ * timer exists.
+ * PARAMETERS
+ * source - (1) HMU_TIMER_SOURCE_DSP
+ * (2) HMU_TIMER_SOURCE_SYS
+ * RETURNS
+ * void
+ *****************************************************************************/
+void hmu_switch_hif_timer(hmuTimerSource_enum source) ;
+
+/*****************************************************************************
+ * FUNCTION
+ * hmu_except_init
+ *
+ * DESCRIPTION
+ * Trigger an upper layer device module to hook with TTYCORE and then proceed
+ * exception flow if an exception happens before hmu_init() completes.
+ *
+ * PARAMETERS
+ * N/A
+ *
+ * RETURNS
+ * KAL_TRUE if caller is allowed to proceed the exception flow;
+ * KAL_FALSE if there's no proper callback function registered by
+ * upper layer device modules or something wrong while executing
+ * the callback function.
+ *****************************************************************************/
+kal_bool hmu_except_init(void);
+
+/*****************************************************************************
+ * FUNCTION
+ * hif_boot_init
+ * DESCRIPTION
+ * HIF boot init function to initial HIF module without task.
+ * PARAMETERS
+ *
+ * RETURNS
+ * success or fail
+ *****************************************************************************/
+kal_int32 hif_boot_init(void) ;
+
+/*****************************************************************************
+ * FUNCTION
+ * hmu_hifeg_stop
+ * DESCRIPTION
+ * stop one or more HIF events.
+ * PARAMETERS
+ * events - events to wait.
+ * See also HIF_DRV_EG_XXX defined in hmu_conf_data.h for more information.
+ * RETURNS
+ * The enabled events.
+ *****************************************************************************/
+kal_uint32 hmu_hifeg_stop(kal_uint32 events);
+
+/*****************************************************************************
+ * FUNCTION
+ * hmu_hifeg_start
+ * DESCRIPTION
+ * start one or more HIF events.
+ * PARAMETERS
+ * events - events to wait.
+ * See also HIF_DRV_EG_XXX defined in hmu_conf_data.h for more information.
+ * RETURNS
+ * The enabled events.
+ *****************************************************************************/
+kal_uint32 hmu_hifeg_start(kal_uint32 events);
+
+/*****************************************************************************
+ * FUNCTION
+ * hmu_check_timer
+ * DESCRIPTION
+ * Check HMU timer source whether is normal
+ * PARAMETERS
+ *
+ * RETURNS
+ * HMU_CHECK_TIMER_ENUM : return checking result
+ *****************************************************************************/
+kal_uint32 hmu_check_timer(kal_uint32 events);
+
+/*****************************************************************************
+ * FUNCTION
+ * hmu_check_timer_start / hmu_check_timer_stop
+ * DESCRIPTION
+ * Start / Stop HMU checking timer
+ * PARAMETERS
+ *
+ * RETURNS
+ *****************************************************************************/
+void hmu_check_timer_start();
+void hmu_check_timer_stop();
+
+/*****************************************************************************
+ * FUNCTION
+ * hmu_tg_callback
+ * DESCRIPTION
+ * Callback from task group hisr
+ * PARAMETERS
+ *
+ * RETURNS
+ *****************************************************************************/
+#if defined(__LP_SCHEDULE_ENABLE__) && defined(__LP_SCHEDULE_HMU_RESCHEDULE__)
+#define __HMU_TG_TIMER_SUPPORT__
+#endif
+void hmu_tg_timer_callback();
+
+#endif /*__HMU_H__*/
diff --git a/mcu/interface/service/hif/hmu_conf_data.h b/mcu/interface/service/hif/hmu_conf_data.h
new file mode 100644
index 0000000..80a9f86
--- /dev/null
+++ b/mcu/interface/service/hif/hmu_conf_data.h
@@ -0,0 +1,238 @@
+#ifndef __HMU_DRV_FUNC_H__
+#define __HMU_DRV_FUNC_H__
+#include "kal_general_types.h"
+#include "dcl.h"
+
+/*************************************************************************
+ * HMU Parameters Definition
+ *************************************************************************/
+ /*Maximum number of emulation devices managed by HMU in normal booting*/
+#define HMU_MAX_EMUDEVNUM 10
+ /*Maximum number of emulation devices managed by HMU in Host Detection booting*/
+#define HMU_MAX_HD_EMUDEVNUM 3
+/*Maximum length of the HIF core's extended information */
+#define HMU_MAX_HIF_EXTINFO_SIZE 512
+/*Maximum length of each emulation device's extended information */
+#define HMU_MAX_EMUDEV_EXTINFO_SIZE 64
+
+#define HMU_PREFIX "HMU"
+#define HMU_FAIL_PREFIX "HMU-FAIL"
+
+
+/* Port number for DHL debugging channel. */
+#define HMU_EXCEPT_COM_PORT uart_port_usb2
+
+/*************************************************************************
+ * Type Definitions
+ *************************************************************************/
+/*The definitions abouthe HIF event group */
+/* Name */
+#define HIF_DRV_EG_NAME "HIF_DRV_EG"
+
+/* Event */
+#define HIF_DRV_EG_HIF_TICK_EVENT 0x80000000 /* HIF tick to trigger USBCORE to check GPD. */
+#define HIF_DRV_EG_HIF_TICK_EVENT_SDIO 0x08000000 /* HIF tick to trigger SDIOCORE to check GPD. */
+#define HIF_DRV_EG_HIF_TICK_EVENT_UART 0x00800000 /* HIF tick to trigger UARTCORE to check GPD. */
+#define HIF_DRV_EG_HIF_TICK_EVENT_CLDMA 0x00080000 /* HIF tick to trigger CLDMACORE to check GPD. */
+#define HIF_DRV_EG_HIF_TICK_EVENT_CCB 0x00008000 /* HIF tick to trigger CCISMCCB. */
+#define HIF_DRV_EG_USBC_IND_EVENT 0x40000000 /* To allow USBCORE to indicate device events or setup packet up to USBCLASS in task context. */
+#define HIF_DRV_EG_UART_IND_EVENT 0x00400000 /* To allow UARTCORE to indicate port open in task context. */
+#define HIF_DRV_EG_HIF_TICK_EVENT_LHIF 0x0000800 /* HIF tick for LHIF polling UL data */
+#define HIF_DRV_EG_HIF_TICK_EVENT_LHIF_LOG 0x0000400 /* HIF tick for LHIF polling HW log */
+#define HIF_DRV_EG_ALL_EVENT 0xFFFFFFFF /* All events associated with the event group managed by HMU. */
+#define HIF_DRV_EG_HIF_RELOAD_EVNET 0x00000008 /* HIF Reload Event for HIF ON/OFF enhance, keep HMU for RGPD reload*/
+#define HIF_DRV_EG_HIF_TICK_EVENT_IPFC 0x00000001 /* HIF tick to trigger IPFCORE to check DL META or update */
+#define HIF_DRV_EG_HIF_IND_EVENT_IPFC 0x00000002 /* To allow IPFCORE to indicate internal ILM/event to itself */
+
+/* HIF tick to trigger HIFCORE to check GPD. Add HIF tick event must modify this mask*/
+#define HIF_DRV_EG_HIF_TICK_EVENT_GROUP ( HIF_DRV_EG_HIF_TICK_EVENT \
+ | HIF_DRV_EG_HIF_TICK_EVENT_SDIO \
+ | HIF_DRV_EG_HIF_TICK_EVENT_UART \
+ | HIF_DRV_EG_HIF_TICK_EVENT_CLDMA \
+ | HIF_DRV_EG_HIF_TICK_EVENT_LHIF \
+ | HIF_DRV_EG_HIF_TICK_EVENT_LHIF_LOG \
+ | HIF_DRV_EG_HIF_TICK_EVENT_CCB \
+ | HIF_DRV_EG_HIF_RELOAD_EVNET \
+ | HIF_DRV_EG_HIF_TICK_EVENT_IPFC \
+ )
+
+/**
+ * @brief enumeration for HMU Emulation Device types
+ */
+typedef enum
+{
+ HMU_USB_DEV_MIN = 0,
+ HMU_USB_DEV_ACM, hmu_usb_dev_cdcacm = HMU_USB_DEV_ACM,
+ HMU_USB_DEV_ECM, hmu_usb_dev_ecm = HMU_USB_DEV_ECM,
+ HMU_USB_DEV_MBIM, hmu_usb_dev_mbim = HMU_USB_DEV_MBIM,
+ HMU_USB_DEV_CDROM, hmu_usb_dev_cdrom = HMU_USB_DEV_CDROM,
+ HMU_USB_DEV_DISK, hmu_usb_dev_disk = HMU_USB_DEV_DISK,
+ HMU_USB_DEV_RNDIS, hmu_usb_dev_rndis = HMU_USB_DEV_RNDIS,
+#ifdef __USB_MSD_SUPPORT__
+ HMU_USB_DEV_MSD,hmu_usb_dev_msd = HMU_USB_DEV_MSD,
+#endif
+ HMU_USB_DEV_MAX,
+
+ HMU_MOBILE_DEV_MIN = 20,
+ HMU_MOBILE_DEV_COM ,
+ HMU_MOBILE_DEV_ETH ,
+ HMU_MOBILE_DEV_IP ,
+ HMU_MOBILE_DEV_IPC,
+ HMU_MOBILE_DEV_MB ,
+ HMU_MOBILE_DEV_MAX ,
+
+ HMU_EXT_DEV_MIN = 40 ,
+ HMU_EXT_DEV_UART ,
+ HMU_EXT_DEV_MAX ,
+
+ HMU_DEV_NONE = 0x7fffffff,
+}hmuEmuDeviceType_enum;
+
+/**
+ * @brief enumeration for HMU HIFCORE Init function types. Here we define both of init functions and post init functions
+ */
+typedef enum
+{
+// The declaration part for the type of init/deinit functions
+ HMU_HIFCORE_MIN = 0,
+ HMU_HIFCORE_USB ,
+ HMU_HIFCORE_SDIO ,
+ HMU_HIFCORE_CCIF ,
+ HMU_HIFCORE_CAIF ,
+ HMU_HIFCORE_CLDMA ,
+ HMU_HIFCORE_CCCI ,
+ HMU_HIFCORE_MAX ,
+
+ HMU_HIFCORE_TYPE_NONE = 0x7fffffff,
+}hmuHifCoreType_enum;
+
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+
+/*************************************************************************
+ * Struct Definitions
+ *************************************************************************/
+/**
+ * @name: HMU_EMUDEV_INFO_STRUCT
+ * @brief the hmu structure for emulation device
+ */
+typedef struct HMU_EMUDEV_INFO_STRUCT
+{
+ /* the emulation device type supported in LTE HIF */
+ hmuEmuDeviceType_enum dev_type;
+ /* the mapping between the emulation device and it's upper layer tunnel */
+ kal_uint32 dev_mapping;
+ /* reserve in NVRAM space. next pointer point to the next emulation device in device list. Null means no next device */
+ union {
+ void *reserve ;
+ struct HMU_EMUDEV_INFO_STRUCT *next ; // Not use in NVRAM
+ } u ;
+ /* the length of extra device-specific information */
+ kal_uint32 ext_devinfo_len;
+ /* the pointer to extra device-specific information */
+ kal_char ext_devinfo[HMU_MAX_EMUDEV_EXTINFO_SIZE];
+}hmu_emudev_info;
+
+/**
+ * @name: HMU_CONF_STRUCT_STRUCT
+ * @brief the hmu structure for HMU main structure in normal booting, and the configuration is loaded from NVRAM_EF_HMU_CONFIG_LID.
+ */
+typedef struct HMU_CONF_STRUCT_STRUCT
+{
+ /* total device number defined configuration files */
+ kal_uint32 dev_num;
+ /* the length of extra hif specific information*/
+ kal_uint32 ext_hifinfo_len;
+ /* the pointer to extra hif specific information*/
+ kal_char ext_hifinfo[HMU_MAX_HIF_EXTINFO_SIZE];
+ /* number of device info list to introduce the device information of the configured devices*/
+ hmu_emudev_info dev_info[HMU_MAX_EMUDEVNUM];
+}hmu_conf_struct;
+
+/**
+ * @name: HMU_HD_CONF_STRUCT_STRUCT
+ * @brief the hmu structure for HMU main structure in Host Detection booting, and the configuration is loaded from NVRAM_EF_HMU_HD_CONFIG_LID.
+ */
+typedef struct HMU_HD_CONF_STRUCT_STRUCT
+{
+ kal_uint32 dev_num;
+ kal_uint32 ext_hifinfo_len;
+ kal_char ext_hifinfo[HMU_MAX_HIF_EXTINFO_SIZE];
+ hmu_emudev_info dev_info[HMU_MAX_HD_EMUDEVNUM];
+}hmu_hd_conf_struct;
+
+/*
+ * @brief: upper layer device module exception mode initialization function
+ * it is used for the case that an exception happens before hmu_init() completed
+ *
+ * @return KAL_TRUE if caller is allowed to proceed the exception flow
+ * KAL_FALSE otherwise
+ */
+typedef kal_bool (*uldrv_except_init)(kal_uint32 dev_mapping, kal_uint32 ext_devinfo_len, kal_char *ext_devinfo);
+
+/**
+ * @name: _HMU_ULDRV_EXCEPT_INITFUNC_STRUCT
+ *
+ * @brief the structure is for upper layer device module to register its
+ * exception mode initialization callback function
+ */
+typedef struct _HMU_ULDRV_EXCEPT_INITFUNC_STRUCT {
+ kal_uint32 port_id;
+ uldrv_except_init except_init_func;
+} hmu_uldrv_except_initfunc ;
+
+typedef kal_int32 (*ul_drv_init)(kal_uint32 dev_mapping, kal_uint32 ext_devinfo_len, kal_char * ext_devinfo) ;
+
+/**
+ * @name: _HMU_HIFCORE_INITFUNC_STRUCT
+ * @brief the structure for Init function and hif emu device types registration table
+ */
+typedef struct _HMU_ULDRV_INITFUNC_STRUCT {
+ hmuEmuDeviceType_enum dev_type;
+ ul_drv_init init_func;
+} hmu_uldrv_initfunc ;
+
+typedef kal_int32 (*hif_core_init)(kal_uint32 dev_num, hmu_emudev_info *emudev_info, kal_uint32 ext_hifinfo_len, kal_char * ext_hifinfo) ;
+
+/**
+ * @name: _HMU_HIFCORE_INITFUNC_STRUCT
+ * @brief the structure for Init function and hif core types registration table
+ */
+typedef struct _HMU_HIFCORE_INITFUNC_STRUCT {
+ hmuHifCoreType_enum hifcore_type;
+ hif_core_init init_func;
+} hmu_hifcore_initfunc ;
+
+/**
+ * @name: _HMU_TICK_INTERVAL_STRUCT
+ * @brief the structure for set hif event trigger interval
+ */
+typedef struct _HMU_TICK_INTERVAL_STRUCT
+{
+ kal_uint32 hif_event;
+ kal_uint32 hif_event_tick_count;
+ kal_uint32 hif_current_tick;
+} hmu_tick_interval;
+
+
+/**
+ * @name: DECLARE_HMU_ULDRV_EXCEPT_INIT_FUNC
+ * @brief This macro is used to declare the upper layer device module exception initialization functions which will be linked in HMU registration table
+ */
+#define DECLARE_HMU_ULDRV_EXCEPT_INIT_FUNC(_funcName) \
+ extern kal_bool _funcName(kal_uint32 dev_mapping, kal_uint32 ext_devinfo_len, kal_char *ext_devinfo) ;
+
+#endif /*__HMU_DRV_FUNC_H__*/
diff --git a/mcu/interface/service/hif/nccci_if.h b/mcu/interface/service/hif/nccci_if.h
new file mode 100644
index 0000000..96399f1
--- /dev/null
+++ b/mcu/interface/service/hif/nccci_if.h
@@ -0,0 +1,103 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2001
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * nccci_if.h
+ *
+ * Project:
+ * --------
+ * UMOLYE
+ *
+ * Description:
+ * ------------
+ * Header file of NCCCI.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+
+#ifndef __NCCCI_IF_H__
+#define __NCCCI_IF_H__
+#include "ccci_if.h"
+
+#define NCCCI_GET_TX_CH(ch) nccci_get_tx_ch(ch)
+#define NCCCI_GET_RX_CH(ch) nccci_get_rx_ch(ch)
+
+#define CCCI_PAYLOAD_SIZE (CCCI_MTU_SIZE - sizeof(CCCI_BUFF_T))
+
+typedef void (*NCCCI_CALLBACK)();
+typedef void (*NCCCI_CALLBACK_WITH_CONTEXT)(void* user_context);
+
+typedef struct{
+ module_type module_id;
+ msg_type msg_id;
+ sap_type sap;
+} NCCCI_ILM_REGISTRATION_STRUCT;
+
+//define NCCCI IOCTL ENUM
+typedef enum{
+ NCCCI_IOCTL_NONE = 0,
+ NCCCI_IOCTL_SET_DL_LOG,
+ NCCCI_IOCTL_SET_UL_LOG,
+ NCCCI_IOCTL_SET_DL_CALLBACK,
+ NCCCI_IOCTL_SET_UL_CALLBACK,
+ NCCCI_IOCTL_SET_DL_CALLBACK_WITH_CONTEXT,
+ NCCCI_IOCTL_SET_UL_CALLBACK_WITH_CONTEXT,
+ NCCCI_IOCTL_SET_DL_DONE_ILM,
+ NCCCI_IOCTL_SET_UL_DONE_ILM,
+ NCCCI_IOCTL_SET_FLAG,
+} NCCCI_IOCTL_ENUM;
+
+typedef enum{
+ NCCCI_IOCTL_LOG_NONE = 0,
+ NCCCI_IOCTL_LOG_0B,
+ NCCCI_IOCTL_LOG_CCCI_HDR_ONLY,
+ NCCCI_IOCTL_LOG_16B,
+ NCCCI_IOCTL_LOG_32B,
+ NCCCI_IOCTL_LOG_64B,
+ NCCCI_IOCTL_LOG_MAX = NCCCI_IOCTL_LOG_64B,
+} NCCCI_IOCTL_LOG_ENUM;
+
+typedef enum{
+ NCCCI_IOCTL_MODE_NONE = 0,
+ NCCCI_IOCTL_MODE_BLOCKING,
+ NCCCI_IOCTL_MODE_NONBLOCKING,
+ NCCCI_IOCTL_MODE_MAX = NCCCI_IOCTL_MODE_NONBLOCKING,
+} NCCCI_IOCTL_MODE_ENUM;
+//define NCCCI IOCTL ENUM
+
+kal_int32 nccci_open(CCCI_CHANNEL_T channel);
+kal_int32 nccci_ioctl(CCCI_CHANNEL_T channel, NCCCI_IOCTL_ENUM ioctl_type, ...);
+kal_int32 nccci_write(CCCI_CHANNEL_T channel, void *buff, kal_int32 write_len);
+void ccci_write_done(CCCI_CHANNEL_T channel, ccci_io_request_t* io_request);
+void ccci_read_done(CCCI_CHANNEL_T channel, ccci_io_request_t* io_request);
+kal_int32 nccci_read(CCCI_CHANNEL_T channel, void *buff, kal_int32 buffer_size);
+kal_int32 nccci_close(CCCI_CHANNEL_T channel);
+
+CCCI_CHANNEL_T nccci_get_tx_ch(CCCI_CHANNEL_T nccci_ch);
+CCCI_CHANNEL_T nccci_get_rx_ch(CCCI_CHANNEL_T nccci_ch);
+
+kal_bool nccci_check_channel_exist(CCCI_CHANNEL_T channel);
+#endif /* __NCCCI_IF_H__ */
+
+
diff --git a/mcu/interface/service/hif/ubm_export.h b/mcu/interface/service/hif/ubm_export.h
new file mode 100644
index 0000000..75d9d9b
--- /dev/null
+++ b/mcu/interface/service/hif/ubm_export.h
@@ -0,0 +1,66 @@
+#ifndef _UBM_EXPORT_INC
+#define _UBM_EXPORT_INC
+
+#include "ubm_type.h"
+#include "usbc_custom.h"
+
+#include "lhif_if.h"
+
+#ifndef __UBM_UT__
+#include "hif_common.h"
+#include "hifusb_qmu.h"
+#endif
+
+/* Init */
+void ubm_init();
+
+/* FHB */
+kal_uint8 ubm_set_fhb(const void* headerPattern, kal_uint8 size, const char* headerName);
+kal_bool ubm_update_fhb(const void* headerPattern, kal_uint8 size, const char* headerName);
+kal_bool ubm_clean_fhb(const char* headerName);
+kal_uint8 ubm_get_fhb_type(const char* headerName);
+
+/* NFHB */
+kal_uint8* ubm_allocate_nfhb(kal_uint8 txQueNo, kal_uint32 allocSize);
+void ubm_release_nfhb(kal_uint8 txQueNo, void* nfhbAddr, kal_uint32 relSize);
+
+/* VRB address virtual/physical translate */
+ubm_vrb_phy_addr ubm_addr_vir2phy_and_save(kal_uint8 txQueNo, kal_uint32 virAddr, kal_uint16 virLen);
+kal_uint32 ubm_addr_phy2vir_and_delete(kal_uint8 txQueNo, kal_uint32 phyAddr);
+
+/* VRB release */
+void ubm_vrb_virtual_addr_release(void* vrbVirAddr, kal_uint16 relLen);
+
+/* DRB */
+void ubm_drb_init_properties();
+kal_bool ubm_drb_quest_unused(kal_uint8 txQueNo, kal_uint32 alloCount);
+kal_bool ubm_drb_submit(kal_uint8 txQueNo, kal_uint32 submitCount);
+void ubm_drb_repay(kal_uint8 txQueNo);
+kal_bool ubm_drb_release(kal_uint8 txQueNo, kal_uint32 headIdx, kal_uint32 relCount);
+kal_uint32 ubm_drb_poll(kal_uint8 txQueNo, kal_uint32* headIdx, kal_uint32* tailIdx);
+kal_bool ubm_drb_get_one_writable_Idx(kal_uint8 txQueNo, kal_uint32* writeIdx);
+kal_bool ubm_drb_revert_one_write(kal_uint8 txQueNo);
+usbq_dl_pd_drb* ubm_drb_idx2addr(kal_uint8 txQueNo, kal_uint32 drbIndex);
+kal_uint32 ubm_drb_addr2idx(kal_uint8 txQueNo, usbq_dl_pd_drb* drbPtr);
+kal_bool ubm_drb_flush(kal_uint8 txQueNo, kal_uint32* headIdx, kal_uint32* tailIdx, kal_uint32* num);
+
+/* XIT */
+kal_bool ubm_xit_release(kal_uint8 rxQueNo, kal_uint16 headIdx, kal_uint32 relCount);
+kal_uint32 ubm_xit_poll(kal_uint8 rxQueNo, kal_uint16* headIdx, kal_uint16* tailIdx, kal_uint16* relIdx);
+usbq_ul_xit* ubm_xit_idx2addr(kal_uint8 rxQueNo, kal_uint32 xitIndex);
+kal_uint32 ubm_xit_addr2idx(kal_uint8 rxQueNo, usbq_ul_xit* xitPtr);
+kal_uint32 ubm_xit_get_next_idx(kal_uint8 rxQueNo, kal_uint32 xitIndex);
+kal_bool ubm_xit_flush(kal_uint8 rxQueNo, kal_uint32* headIdx, kal_uint32* tailIdx, kal_uint32* num);
+
+/* UL META */
+lhif_meta_tbl_t* ubm_ul_meta_idx2addr(kal_uint8 rxQueNo, kal_uint16 xitIndex);
+kal_uint16 ubm_ul_meta_get_next_idx(kal_uint8 rxQueNo, kal_uint16 xitIndex);
+void ubm_ul_meta_init_properties();
+LHIF_NET_TYPE ubm_ul_meta_get_lhif_net_type(kal_uint8 rxQueNo, usb_class_type_e classType);
+kal_bool ubm_ul_meta_enqueue_lhif_ul_queue(kal_uint8 rxQueNo, LHIF_NET_TYPE lhifNetType,kal_uint8 usbclassDevId, void* dataAddr, kal_uint16 dataLen);
+kal_bool ubm_ul_meta_enqueue_lhif_ul_queue_did(kal_uint8 rxQueNo, LHIF_NET_TYPE lhifNetType, kal_uint8 usbclassDevId, LHIF_NET_IF net_if, void* did);
+lhif_meta_tbl_t* ubm_ul_meta_get_base();
+
+/****************************************************************************/
+#endif /* _UBM_EXPORT_INC */
+
diff --git a/mcu/interface/service/hif/ubm_type.h b/mcu/interface/service/hif/ubm_type.h
new file mode 100644
index 0000000..ed32bbc
--- /dev/null
+++ b/mcu/interface/service/hif/ubm_type.h
@@ -0,0 +1,49 @@
+#ifndef _UBM_TYPE_INC
+#define _UBM_TYPE_INC
+
+#define UBM_VRB_PHY_ADDR_NUM 8
+
+typedef struct _ubm_vrb_phy_addr {
+ kal_uint8 segNum; // number of segmentation
+ kal_uint32 phyAddr[UBM_VRB_PHY_ADDR_NUM];
+ kal_uint16 phyLen[UBM_VRB_PHY_ADDR_NUM];
+} ubm_vrb_phy_addr;
+
+#ifdef __UBM_UT__
+typedef struct _usbq_dl_pd_drb usbq_dl_pd_drb;
+struct _usbq_dl_pd_drb
+{
+ kal_uint8 drb_flag;
+ kal_uint8 padding_length;
+ kal_uint16 dl_data_length;
+ void *p_dl_data_addr;
+};
+
+typedef struct _usbq_dl_td_drb usbq_dl_td_drb;
+struct _usbq_dl_td_drb
+{
+ kal_uint8 drb_flag;
+ kal_uint8 reserved1;
+ kal_uint16 dl_xfer_length;
+ kal_uint32 reserved2;
+};
+
+typedef struct _usbq_ul_xit
+{
+ kal_uint16 ul_xfer_length;
+ kal_uint16 reserved;
+ void *p_ul_xfer_start_addr;
+} usbq_ul_xit;
+#endif
+
+/****************************************************************************
+ * Global variables
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function prototypes
+ ****************************************************************************/
+
+/****************************************************************************/
+#endif /* _UBM_TYPE_INC */
+