[Feature][Modem]Update MTK MODEM V1.6 baseline version: MOLY.NR15.R3.MD700.IVT.MP1MR3.MP.V1.6
MTK modem version: MT2735_IVT_MOLY.NR15.R3.MD700.IVT.MP1MR3.MP.V1.6.tar.gz
RF modem version: NA
Change-Id: I45a4c2752fa9d1a618beacd5d40737fb39ab64fb
diff --git a/mcu/l1/interface/gl1/fcs.h b/mcu/l1/interface/gl1/fcs.h
new file mode 100644
index 0000000..441bb36
--- /dev/null
+++ b/mcu/l1/interface/gl1/fcs.h
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+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * fcs.h
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This file is for FCS driver.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
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+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+
+#ifndef L1_FCS_H
+#define L1_FCS_H
+
+#include "reg_base.h"
+#include "kal_general_types.h"
+
+//#define FCS_CG_SET2 ((volatile kal_uint32*)(BASE_MADDR_CLK_CTRL+0x0004))/* FCS gate clock */
+//#define FCS_CG_CLR2 ((volatile kal_uint32*)(BASE_MADDR_CLK_CTRL+0x0008))/* FCS ungate clock */
+
+#define FCS_DATA ((volatile kal_uint16*)(FCS2G_base+0x0000))/* FCS data */
+#define FCS_DLEN ((volatile kal_uint16*)(FCS2G_base+0x0004))/* FCS data length */
+#define FCS_PAR1 ((volatile kal_uint16*)(FCS2G_base+0x0008))/* FCS parity MSB part */
+#define FCS_PAR2 ((volatile kal_uint16*)(FCS2G_base+0x000C))/* FCS parity LSB part */
+#define FCS_STAT ((volatile kal_uint16*)(FCS2G_base+0x0010))/* FCS codec status register */
+#define FCS_RST ((volatile kal_uint16*)(FCS2G_base+0x0014))/* FCS codec reset register */
+
+extern void fcs_feed_stream(kal_uint8* data,kal_uint16 len,kal_uint8 BIT_ORDER,kal_uint8 PAR_ORDER,kal_uint8 EN_DEC);
+extern void get_fcs_parity(kal_uint8* parity);
+extern kal_bool get_fcs_result(void);
+
+#define FCS_CLK_OFF() PDN_SET(PDN_FCS_SLV_DBCLK)//HW_WRITE(FCS_CG_CLR2,(1 << 15))
+#define FCS_CLK_ON() PDN_CLR(PDN_FCS_SLV_DBCLK)//HW_WRITE(FCS_CG_SET2,(1 << 15))
+
+#endif
+