[Feature][Modem]Update MTK MODEM V1.6 baseline version: MOLY.NR15.R3.MD700.IVT.MP1MR3.MP.V1.6
MTK modem version: MT2735_IVT_MOLY.NR15.R3.MD700.IVT.MP1MR3.MP.V1.6.tar.gz
RF modem version: NA
Change-Id: I45a4c2752fa9d1a618beacd5d40737fb39ab64fb
diff --git a/mcu/protocol/interface/el2/el2_api.h b/mcu/protocol/interface/el2/el2_api.h
new file mode 100644
index 0000000..ff7d105
--- /dev/null
+++ b/mcu/protocol/interface/el2/el2_api.h
@@ -0,0 +1,249 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * el2_api.h
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * prototypes of EL2 export function
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 01 11 2018 jia-shi.lin
+ * [MOLY00301451] [SMO release][93/95]EL1 relative interface
+ * emac/el1 interface re-arch
+ *
+ * 08 03 2017 wen-jiunn.liu
+ * [MOLY00268551] Task batch scheduling for LTE Low power
+ * [EL2] Task Rescheduling for Low Power Polling Tick Change
+ *
+ * 08 03 2017 wen-jiunn.liu
+ * [MOLY00268551] Task batch scheduling for LTE Low power
+ * [EL2] Task Rescheduling for Low Power Polling Tick Change
+ *
+ * 04 07 2017 steve.kao
+ * [MOLY00230062] [UMOLYA] M-PS related interface changes for UPCM, RATDM, and EPDCP
+ *
+ * [UMOLYA][TRUNK]
+ *
+ * [UPCM][M-PS] Code changes
+ * 1. Duplicating UPCM contexts,
+ * 2. Use protocol_idx in UL/DL callback/ILM interfaces,
+ * 3. Check protocol_idx in LHIF PIT entries,
+ * 4. Fix test mode UL data processing flow,
+ * 5. Allowing test mode on protocol 2/3/4,
+ * 6. Wrap interfaces with RATDM with __MULTIPLE_PS__,
+ *
+ * [EPDCP][L+L] Code changes
+ *
+ * [RATDM][L+L] Code changes
+ *
+ * 09 26 2016 slifer.hsueh
+ * [MOLY00205085] [MT6293][EL2] ERLC source codes integration from DEV to TRUNK
+ * ERLC source codes integration from DEV to TRUNK
+ *
+ * 01 12 2016 kathie.ho
+ * [MOLY00156229] [MT6292] Code sync from MT6291: AuDRX
+ * CodeSync from LR11 (from 2015/09/21~11/15, exclude TSTM, MBMS)PART4
+ * CL 1800644[MT6291]Autonomous DRX
+ *
+ * 09 07 2015 nienteh.hsu
+ * [MOLY00140671] [6292] ERLC code sync from LR11 to UMOLY (August)
+ * .
+ *
+ * 09 04 2015 nienteh.hsu
+ * .
+ *
+ * 09 04 2015 nienteh.hsu
+ * Code sync from LR11 to UMOLY.
+ * CL1542770: DL & UL print SDU raw data.
+ * CL1582626: Fix of DL print SDU raw data.
+ * CL1590595: ERLC build warning fix.
+ * CL1525169: EM HO duration reporting. ERLC-UL part is merged.
+ * CL1546539: Backup SIT head and tail index when copro power off.
+ * CL1564394: Avoid early return in sched_grant_main function and not trigger poll re-TX.
+ * CL1586893: Fix of EM HO duration reporting.
+ *
+ * 12 04 2014 shengyi.ho
+ * [MOLY00083854] [TK6291] eL2 development checkin CR
+ * 1) fix erlc gtest ut case HWB leakage
+ * 2) rename am/um var reset macro with ERLCUL/ERLCDL prefix
+ * 3) fix HWB C-model function of get UL/DL alloc hwb num
+ *
+ * 11 11 2014 yiting.cheng
+ * [MOLY00084042] [UMOLY] merge UMOLY_DEV to UMOLY trunk
+ * .
+ *
+ * 10 27 2014 sh.yang
+ * [MOLY00082211] [MT6291_DEV] EMBMS check-in
+ * embms check-in
+ *
+ * 10 08 2014 shengyi.ho
+ * [MOLY00077592] [TK6291] emac/erlc development check-in - 1) tti bundle/msg3 collide rv setting. 2) sr prohibit check. 3) add emac ut framework for tx req. 4) remove unused function in MT6291
+ * .
+ *
+ * 07 31 2014 yiting.cheng
+ * [MOLY00073830] [MT6291_DEV] check-in MT6291 modification
+ * for fix potential target build error
+ *
+ * 07 30 2014 yiting.cheng
+ * [MOLY00073830] [MT6291_DEV] check-in MT6291 modification
+ * MT6291 modification, using temp interface with EL1
+ *
+ * 01 15 2014 slifer.hsueh
+ * [MOLY00053104] [MT6290E2][NAS RTD][MM][FDD] Assert fail: driver/l2copro/cipher/src/cipher_common.c 196 - L2COPRO
+ * Merge codes related to L2 copro delay power off back to MOLY TRUNK in LTE domain
+ *
+ * 01 09 2014 moja.hsu
+ * [MOLY00052975] Fine tune RAR/EAR 1ms protection to prevent false alarm.
+ * .
+ *
+ * 12 03 2013 timothy.yao
+ * [MOLY00048832] power down/on in EL2 task context and refine the flow
+ * 1. power-off/on L2 copro in EL2 task context.
+ * 2. refine the flow betwwen EL1 & EL2.
+ *
+ * 09 27 2013 steve.kao
+ * [MOLY00039195] [MT6290] [Low Power] LTE L2 copro power down in LTE flight mode
+ * Unshelved from pending changelist '272199':
+ *
+ * Fix link error
+ *
+ * 08 20 2013 mf.jhang
+ * [MOLY00034292] [MT6290E1] Move PHR to SW
+ * Move PHR report to SW
+ *
+ * 07 23 2013 mf.jhang
+ * [MOLY00030911] [MT6290E1][EMAC] EMAC code enhancement
+ * Register UL LMAC error interrupt handler
+ * Update some trace
+ *
+ * 06 10 2013 mf.jhang
+ * [MOLY00025349] [MT6290E1][GCF][MD8430][LTE][TC 7.1.5.4] Assert fail driverl2coprolmacsrcl2lmac_drv.c 268 - L2COPRO
+ * Add EL2 API for DL LMAC handler
+ *
+ * 05 16 2013 moja.hsu
+ * [MOLY00007625] Maintain code
+ * fix edyn compile warning.
+ ****************************************************************************/
+
+/**
+ * @date 2012/1/10
+ */
+
+#ifndef EL2_EXPORT_API
+#define EL2_EXPORT_API
+
+//#include "drv/drv_lmac.h"
+//#include "el1_enum.h"
+#include "kal_public_api.h"
+//#include "el2_def.h"
+#include "lte_time_common.h"
+
+/* EL2 constructor */
+void el2_init();
+
+// EL2 Tick Source Handler
+void el2_tick_source_dispatch_tick();
+
+/* EMAC export API */
+kal_bool emac_drx_is_drx_sleep(); // query whether EMAC DRX sleep or not
+void emac_rcv_ilm(ilm_struct *pIlm); ///< EMAC message handler
+void emac_el2task_rcv_ilm(ilm_struct *p_ilm); ///< EMAC message handler on EL2 task
+void emac_ctrl_data_rcv(); ///< control data receiving handler TO_BE_REMOVE: please use emac_ctrl_data_check().
+void emac_ctrl_data_check(); ///< check DL control swo bits
+void emac_early_protect_cancel_reg(void(*func)(void)); //Register early protect cancel callback
+void emac_rar_protect_cancel_reg(void(*func)(void)); //Register rar protect cancel callback
+#if MBMS_SUPPORT
+void emac_mch_data_check(); ///< check MCH swo bits
+#endif
+
+#if EL2_SBP_ON_AUDRX
+void emac_audrx_rrc_cmd(kal_uint32 time);
+void emac_audrx_nas_cmd(kal_uint32 time);
+void emac_epdcp_audrx_timer_timeout(void);
+void emac_epdcp_audrx_timer_restart(void);
+kal_uint32 emac_audrx_rrc_sleep_report(void);
+#endif
+
+/**
+ * @brief emac_check_rar_protect
+ * Check if we need to RAR 1ms protection.
+ * Prevent False alarm of frame boundary
+ *
+ * @return KAL_TRUE: Need to protection.
+ * KAL_FALSE: No need to do protection.
+ */
+//kal_bool emac_check_rar_protect(void);
+
+/**
+ * @brief emac_check_ear_protect
+ * Check if we need to RAR 1ms protection.
+ * Prevent False alarm of frame boundary
+ *
+ * @param vect SWO bit to indicate which HT contain EAR LCID
+ *
+ * @return KAL_TRUE: Need to protection.
+ * KAL_FALSE: No need to do protection.
+ */
+//kal_bool emac_check_ear_protect(ht_ear_vect *vect);
+kal_int32 _lte_dl_lmac_err_hndlr(kal_uint32 vect, void *ptr); //DL LMAC error interrupt callback
+kal_int32 _lte_ul_lmac_err_hndlr(kal_uint32 vect, void *ptr); //UL LMAC error interrupt callback
+
+/* ERLC export API */
+void erlcul_rcv_ilm(ilm_struct *pIlm); ///< ERLC-UL message handler
+void erlcdl_rcv_ilm(ilm_struct *pIlm); ///< ERLC-DL message handler
+void erlcul_poll(); ///< ERLC-UL polling
+void erlcdl_poll(); ///< ERLC-DL polling
+void erlcul_reset(); ///< ERLC-UL reset
+void erlcdl_reset(); ///< ERLC-DL reset
+
+kal_uint32 erlcul_query_sleep_allow(); ///< ERLC-UL sees if we can sleep copro
+void erlcul_copro_power_down_backup(); ///back up info used when copro power off
+
+#endif
diff --git a/mcu/protocol/interface/el2/el2_esl_txlisr.h b/mcu/protocol/interface/el2/el2_esl_txlisr.h
new file mode 100644
index 0000000..3b45fae
--- /dev/null
+++ b/mcu/protocol/interface/el2/el2_esl_txlisr.h
@@ -0,0 +1,75 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * el2_esl_txlisr.h
+ *
+ * Project:
+ * --------
+ * UMOLYA
+ *
+ * Description:
+ * ------------
+ *
+ *
+ * Author:
+ * -------
+ *
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 02 17 2017 jia-shi.lin
+ * [MOLY00194987] [MT6293][UMOLYA/PS DEV] EMAC maintenance
+ * esl setting refinement: support multiple case running
+ *
+ * 01 06 2017 jia-shi.lin
+ * [MOLY00194987] [MT6293][UMOLYA/PS DEV] EMAC maintenance
+ * ESL: get esl scenario id for srs tx
+ *
+ ****************************************************************************/
+
+#include "el1cd_common_esl.h"
+
+void el2_esl_txlisr_init(kal_uint32 dl_cc_num, kal_uint32 ul_cc_num, kal_uint32 scenario_id);
+void el2_esl_txlisr_1st_subframe_prepare(void);
+void el2_esl_txlisr_2nd_subframe_prepare(void);
+
+void el2_esl_txlisr_subframe_post_check(void);
+
+
diff --git a/mcu/protocol/interface/el2/el2_public_api.h b/mcu/protocol/interface/el2/el2_public_api.h
new file mode 100644
index 0000000..af36d8d
--- /dev/null
+++ b/mcu/protocol/interface/el2/el2_public_api.h
@@ -0,0 +1,129 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * el2_pulbic_api.h
+ *
+ * Project:
+ * --------
+ * UMOLYA
+ *
+ * Description:
+ * ------------
+ * EL2 API for other modules
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ ****************************************************************************/
+
+#ifndef _EL2_PUBLIC_API_H_
+#define _EL2_PUBLIC_API_H_
+
+
+// ===========================================================================
+// VRB release API for other layer: ERRC
+// ===========================================================================
+
+void epdcp_errc_mcch_data_buffer_free(void *p_data, kal_uint32 data_len);
+void epdcp_errc_dcch_data_buffer_free(void *p_data, kal_uint32 data_len);
+void emac_errc_ccch_data_buffer_free(void *p_data, kal_uint32 data_len);
+
+
+// ===========================================================================
+// EL2POW API for other layer: ERRC/L1S
+// ===========================================================================
+
+void el2pow_errc_config_copro_power_on_req(kal_uint8 protocol_idx);
+void el2pow_errc_config_copro_power_off_req(kal_uint8 protocol_idx);
+
+void el2pow_l1s_power_on();
+
+// ===========================================================================
+// EL2 API for other layer: RSVAS
+// ===========================================================================
+// @brief Tell RSVAS the sequence to send SUSPEND_SERVICE_REQ for each modules
+
+// EMACDLPORTAL ID: b'01
+// EL2HPORTAL ID: b'10
+// EL2PORTAL ID: b'11
+
+// Default sequence: EL2HPORTAL -> EMACDLPORTAL -> EL2PORTAL
+// Default return value: b'00 11 01 10 (0x36)
+
+// return B7B6 B5B4 B3B2 B1B0
+// meaning N/A 3rd 2nd 1st
+// module N/A EL2PORTAL EMACDLPORTAL EL2HPORTAL
+// module id 00 11 01 10
+
+kal_uint32 el2_rsvas_forward_sequence_for_suspend_service_req();
+
+
+// ===========================================================================
+// EL2 API for other layer: ICD
+// ===========================================================================
+
+// For MAC_DL_TB record
+void el2icd_mac_dl_transport_block_paging_handler(kal_uint32 protocol_idx, kal_uint32 sfn, kal_uint32 subframe);
+void el2icd_mac_dl_transport_block_si_handler(kal_uint32 protocol_idx, kal_uint32 sfn, kal_uint32 subframe, kal_bool is_si);
+
+// ===========================================================================
+// EL2 API for other layer: UPCM
+// ===========================================================================
+
+/*
+ * @brief epdcp_is_non_ims_ul_psn_print_by_epdcp
+ * Query if EPDCP is printing PSN for uplink packets of non-IMS DRBs for the
+ * protocol_idx specified.
+ *
+ * @param protocol_idx
+ *
+ * @return kal_bool
+ * KAL_TRUE:
+ * EPDCP prints PSN for uplink packets of non-IMS DRBs periodically
+ * for the protocol_idx specified.
+ * KAL_FALSE:
+ * EPDCP dows not print PSN for uplink packets at all for the
+ * protocol_idx specified.
+ */
+kal_bool epdcp_is_non_ims_ul_psn_print_by_epdcp(kal_uint32 protocol_idx);
+
+
+#endif /* _EL2_PUBLIC_API_H_ */
+
+
diff --git a/mcu/protocol/interface/el2/el2_sap_common.h b/mcu/protocol/interface/el2/el2_sap_common.h
new file mode 100644
index 0000000..341347d
--- /dev/null
+++ b/mcu/protocol/interface/el2/el2_sap_common.h
@@ -0,0 +1,341 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * el2_sap_common.h
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * Common header file for all EL2 SAPs.
+ * This file defines the common structures used by all EL2 SAPs.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 08 17 2017 steve.kao
+ * [MOLY00271504] [6293][SRLTE Enhancement][EL2][EPDCP] Sync from LR11.MP5
+ * [UMOLYA][TRUNK][EPDCP] SRLTE enhancement.
+ *
+ * 02 06 2017 peter.yu
+ * [MOLY00207733] [MT6293][EL2] ERLCDL development
+ * [M-SIM] Sync R-SIM related interfaces, remove redundant message IDs related to ERLC.
+ *
+ * 09 26 2016 slifer.hsueh
+ * [MOLY00205085] [MT6293][EL2] ERLC source codes integration from DEV to TRUNK
+ * ERLC source codes integration from DEV to TRUNK
+ *
+ * 04 08 2015 katie.tseng
+ * [MOLY00104186] [UMOLY] UMOLY code maintenance.
+ * 1. March 2015 MOLY CR sync on ERLC-DL: (1) VoLTE early RLF (2) log reduction
+ * 2. RLC gtest UT fix: set/reset gERLC_Trap_Msg_EN at setup() and teardown()
+ *
+ * 11 11 2014 yiting.cheng
+ * [MOLY00084042] [UMOLY] merge UMOLY_DEV to UMOLY trunk
+ * .
+ *
+ * 10 27 2014 sh.yang
+ * [MOLY00082211] [MT6291_DEV] EMBMS check-in
+ * embms check-in
+ *
+ * 09 19 2014 chi-chung.lin
+ * [MOLY00073836] [MT6291][ERRC][CHM] LTE-A CHM development code check-in
+ * [CHM] MBMS interface check in
+ *
+ * 07 29 2014 sh.yang
+ * [MOLY00073922] [MT6291_DEV] EMBMS general check-in
+ * .
+ *
+ * 07 28 2014 yiting.cheng
+ * [MOLY00073830] [MT6291_DEV] check-in MT6291 modification
+ * Check-in EMAC-ERRC interface
+ ****************************************************************************/
+
+/// @date 08/10/11
+
+#ifndef _MTK_LTE_EL2_COMMON_SAP_H_
+#define _MTK_LTE_EL2_COMMON_SAP_H_
+
+#include "kal_public_api.h"
+
+/*--------------------------------------------------------------------------
+ * RBID (used RLCUL SAP, RLCDL SAP, and PDCP SAP)
+ *--------------------------------------------------------------------------*/
+
+/// RBID (radio bearer identity)
+typedef enum
+{
+ RBID_SRB0 = 0x00,
+ RBID_SRB1 = 0x01,
+ RBID_SRB2 = 0x02,
+ RBID_DRB1 = 0x10,
+ RBID_DRB2 = 0x11,
+ RBID_DRB3 = 0x12,
+ RBID_DRB4 = 0x13,
+ RBID_DRB5 = 0x14,
+ RBID_DRB6 = 0x15,
+ RBID_DRB7 = 0x16,
+ RBID_DRB8 = 0x17,
+ RBID_DRB9 = 0x18,
+ RBID_DRB10 = 0x19,
+ RBID_DRB11 = 0x1A,
+ RBID_DRB12 = 0x1B,
+ RBID_DRB13 = 0x1C,
+ RBID_DRB14 = 0x1D,
+ RBID_DRB15 = 0x1E,
+ RBID_DRB16 = 0x1F,
+ RBID_DRB17 = 0x20,
+ RBID_DRB18 = 0x21,
+ RBID_DRB19 = 0x22,
+ RBID_DRB20 = 0x23,
+ RBID_DRB21 = 0x24,
+ RBID_DRB22 = 0x25,
+ RBID_DRB23 = 0x26,
+ RBID_DRB24 = 0x27,
+ RBID_DRB25 = 0x28,
+ RBID_DRB26 = 0x29,
+ RBID_DRB27 = 0x2A,
+ RBID_DRB28 = 0x2B,
+ RBID_DRB29 = 0x2C,
+ RBID_DRB30 = 0x2D,
+ RBID_DRB31 = 0x2E,
+ RBID_DRB32 = 0x2F
+
+} errc_el2_rbid_enum;
+
+
+/*--------------------------------------------------------------------------
+ * RRC configuration result (used by all SAPs)
+ *--------------------------------------------------------------------------*/
+
+/// result of RRC configuration
+typedef enum
+{
+ ERRC_EL2_CFG_SUCCESS = 0x00,
+ ERRC_EL2_CFG_PARAM_ERR = 0x10,
+ ERRC_EL2_CFG_STATUS_ERR = 0x20
+
+} errc_el2_cfg_result_enum;
+
+
+/*--------------------------------------------------------------------------
+ * RRC configuration to enter/leave virtual connected state
+ *--------------------------------------------------------------------------*/
+
+/// command to pdcp and rlc
+typedef enum
+{
+ ERRC_EL2_VIRTUAL_CONNECTED_ENTER_PREPARE = 0, // RLC-UL
+ ERRC_EL2_VIRTUAL_CONNECTED_ENTER = 1, // PDCP, RLC-UL, RLC-DL
+ ERRC_EL2_VIRTUAL_CONNECTED_ENTER_END = 2, // PDCP
+ ERRC_EL2_VIRTUAL_CONNECTED_LEAVE_PREPARE = 3, // PDCP
+ ERRC_EL2_VIRTUAL_CONNECTED_LEAVE = 4, // PDCP, RLC-UL, RLC-DL
+ ERRC_EL2_VIRTUAL_CONNECTED_LEAVE_FAIL = 5, // PDCP, RLC-UL, RLC-DL
+ ERRC_EL2_VIRTUAL_CONNECTED_ENTER_PREPARE_FOR_SRLTE = 6, // RLC-UL
+ ERRC_EL2_VIRTUAL_CONNECTED_ENTER_FOR_SRLTE = 7, // PDCP, RLC-UL, RLC-DL
+ ERRC_EL2_VIRTUAL_CONNECTED_ENTER_END_FOR_SRLTE = 8, // PDCP
+ ERRC_EL2_VIRTUAL_CONNECTED_LEAVE_PREPARE_FOR_SRLTE = 9, // PDCP
+ ERRC_EL2_VIRTUAL_CONNECTED_LEAVE_FOR_SRLTE = 10, // PDCP, RLC-UL, RLC-DL
+ ERRC_EL2_VIRTUAL_CONNECTED_LEAVE_FAIL_FOR_SRLTE = 11, // PDCP, RLC-UL, RLC-DL
+ ERRC_EL2_VIRTUAL_CONNECTED_INVALID_CAUSE = 12,
+} errc_el2_switch_virtual_connected_enum;
+
+
+/*--------------------------------------------------------------------------
+ * EL1-EL2 result
+ *--------------------------------------------------------------------------*/
+
+/// result of EL1<->EL2 configuration
+typedef enum
+{
+ EL2_EL1_SUCCESS = 0x00,
+ EL2_EL1_PARAM_ERR = 0x10,
+ EL2_EL1_STATUS_ERR = 0x20
+
+} el2_el1_result_enum;
+
+
+/*--------------------------------------------------------------------------
+ * logical channel configuration (used by EMAC SAP and ERLCUL SAP)
+ *--------------------------------------------------------------------------*/
+
+/// prioritised bit rate (PBR)
+typedef enum
+{
+ PBR_KBPS_0 = 0x00,
+ PBR_KBPS_8 = 0x01,
+ PBR_KBPS_16 = 0x02,
+ PBR_KBPS_32 = 0x03,
+ PBR_KBPS_64 = 0x04,
+ PBR_KBPS_128 = 0x05,
+ PBR_KBPS_256 = 0x06,
+ PBR_KBPS_512 = 0x07,
+ PBR_KBPS_1024= 0x08,
+ PBR_KBPS_2048= 0x09,
+ PBR_KBPS_INF = 0x0a
+} errc_el2_pbr_enum;
+
+
+/// bucket size duration (BSD)
+typedef enum
+{
+ BSD_MS50 = 0x00,
+ BSD_MS100 = 0x01,
+ BSD_MS150 = 0x02,
+ BSD_MS300 = 0x03,
+ BSD_MS500 = 0x04,
+ BSD_MS1000 = 0x05,
+ BSD_INVALID = 0x06
+} errc_el2_bsd_enum;
+
+
+#define INVALID_LCG (0x04)
+
+/// logical channel configuration
+typedef struct
+{
+ kal_uint8 pri; ///< priority
+ errc_el2_pbr_enum pbr; ///< prioritised bit rate (PBR)
+ errc_el2_bsd_enum bsd; ///< bucket size duration (BSD)
+ kal_uint8 lcg; ///< logical channel group (LCG)
+
+} errc_el2_lch_cfg;
+
+
+
+/*--------------------------------------------------------------------------
+ * RB configuration (used by ERLCUL SAP and ERLCDL SAP)
+ *--------------------------------------------------------------------------*/
+
+/// maximum number of RBs in ERLC configured by ERRC
+#define MAX_NUM_RLC_CONFIG_RB (10)
+
+/// maximum number of MRBs in ERLC configured by ERRC
+#define MAX_NUM_RLC_CONFIG_MRB (29)
+
+/// RB configuration mode in ERLCUL and ERLCDL
+typedef enum
+{
+ ERLC_MODE_REL = 0x00,
+ ERLC_MODE_EST = 0x10,
+ ERLC_MODE_REEST = 0x20,
+ ERLC_MODE_RECFG = 0x30,
+ ERLC_MODE_REEST_NO_CFG = 0x40,
+ ERLC_MODE_EST_AND_SUSPEND = 0x50,
+ ERLC_MODE_SUSPEND = 0x60,
+ ERLC_MODE_RESUME = 0x70
+
+} errc_erlc_rb_mode_enum;
+
+
+/// RLC mode
+typedef enum
+{
+ ERLC_AM = 0,
+ ERLC_UM = 1
+
+} errc_erlc_rb_type_enum;
+
+
+/// RLC SN field length
+typedef enum
+{
+ SN_SIZE_5 = 0,
+ SN_SIZE_10 = 1
+
+} errc_erlc_sn_field_len_enum;
+
+/*--------------------------------------------------------------------------
+ * EMBMS configuration
+ *--------------------------------------------------------------------------*/
+#define MAX_EMBMS_MTCH_SUPPORT 8
+#define MAX_EMBMS_MRB_SUPPORT MAX_EMBMS_MTCH_SUPPORT
+#define MAX_EMBMS_MCCH_SUPPORT 8
+#define MAX_AREA_NUM_PER_CELL 8
+#define MAX_MTCH_NUM_PER_PMCH_29 29
+#define MAX_SF_IN_ONE_RF 6
+#define MAX_MBSFN_ALLOCATIONS 8
+#define MAX_PMCH_PER_MBSFN 15
+#define MAX_NUM_MTCH_PER_PMCH 29
+
+
+/*--------------------------------------------------------------------------
+ * radio link failure (RLF) (used by ERLCUL SAP and ERLCDL SAP)
+ *--------------------------------------------------------------------------*/
+
+/// cause of ERRC-ERLC RLF indication
+typedef enum
+{
+ ERLC_UL_MAX_RETX = 0x00, ///< max retransmission for a specific SN (TS36.322)
+ ERLC_DL_MAX_RETX = 0x01 ///< max duplication for a specific SN (MTK proprietary)
+
+} errc_erlc_rlf_enum;
+
+/// additional information about RLF indication
+typedef enum
+{
+ ERLC_RLF_ADD_INVALID = 0x00, ///< No additional information
+ ERLC_RLF_ADD_UL_EAR_REEST = 0x01, ///< UL early re-establishment
+ ERLC_RLF_ADD_DL_EAR_REEST = 0x02 ///< DL early re-establishment
+
+} errc_erlc_rlf_ind_add_enum;
+
+/// message structure of ERRC_ERLC_RLF_IND
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ errc_el2_rbid_enum rbid; // RB ID
+ kal_uint8 rb_idx; // RB index
+ kal_bool is_old_rb; // is old RB RLF or not
+ errc_erlc_rlf_enum cause; // reason of RLF
+
+ kal_uint8 add_info; // additional information (MTK proprietary)
+ kal_uint8 rsvd8; // reserved 1 byte
+ kal_uint16 rsvd16; // reserved 2 bytes
+
+} errc_erlc_rlf_ind_struct;
+
+#endif
diff --git a/mcu/protocol/interface/el2/em/el2em_legacy_stats_struct.h b/mcu/protocol/interface/el2/em/el2em_legacy_stats_struct.h
new file mode 100644
index 0000000..0769975
--- /dev/null
+++ b/mcu/protocol/interface/el2/em/el2em_legacy_stats_struct.h
@@ -0,0 +1,161 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * el2em_legacy_stats_struct.h
+ *
+ * Project:
+ * --------
+ * UMOLYA
+ *
+ * Description:
+ * ------------
+ * Define legacy statistic structures (not used in 93)
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ ****************************************************************************/
+
+#ifndef LEGACY_STATS_STRUCT_H
+#define LEGACY_STATS_STRUCT_H
+#include "kal_public_api.h"
+
+//================================== not exist for 93 ==================================//
+typedef struct
+{
+ kal_uint32 lisr_dsp_evt;
+ kal_uint32 lisr_dsp_timer;
+ kal_uint32 hisr_dsp_timer;
+ kal_uint32 hisr_ert;
+
+ kal_uint32 protect_ear;
+ kal_uint32 non_protect_ear;
+ kal_uint32 protect_rar;
+ kal_uint32 non_protect_rar;
+ kal_uint32 protect_pdcch;
+
+ kal_uint32 poll_el2;
+
+ kal_uint32 ilms_ert_int;
+ kal_uint32 ilms_ert_ext;
+ kal_uint32 ilms_el1;
+ kal_uint32 ilms_el2;
+ kal_uint32 ilms_etstm;
+
+} edyn_stats_t;
+
+typedef kal_uint64 etmr_sys_tick_t;
+typedef struct
+{
+ etmr_sys_tick_t sys_ticks;
+ kal_uint32 run_nodes;
+ kal_uint32 expires;
+ kal_uint32 expires_end;
+
+ kal_uint32 start;
+ kal_uint32 start_fail;
+ kal_uint32 stop;
+ kal_uint32 stop_fail;
+ kal_uint32 resume;
+ kal_uint32 resume_fail;
+
+ kal_uint32 set_attr;
+ kal_uint32 set_attr_fail;
+ kal_uint32 set_init_tick;
+ kal_uint32 set_init_tick_fail;
+ kal_uint32 set_remain_tick;
+ kal_uint32 set_remain_tick_fail;
+ kal_uint32 set_callback;
+ kal_uint32 set_callback_fail;
+}etmr_ov_status;
+
+#define LTM_MAX_EPSB_NUM 16
+
+typedef struct
+{
+ kal_uint32 initCnt;
+ kal_uint32 actCnt;
+ kal_uint32 deactCnt;
+
+ kal_uint32 UL_DlvrCnt;
+ kal_uint32 ULNrmQueueCnt;
+ kal_uint32 ULPriQueueCnt;
+ kal_uint32 UL_RollbackCnt;
+ kal_uint32 UL_DropCnt;
+
+ kal_uint32 DL_DlvrCnt;
+ kal_uint32 DL_QueueCnt;
+ kal_uint32 DL_DropCnt;
+} ltm_epsb_stats_t;
+
+typedef struct
+{
+ kal_uint32 ULNrmTotalBytes;
+ kal_uint32 ULNrmTotalGPDs;
+ kal_uint32 ULPriTotalBytes;
+ kal_uint32 ULPriTotalGPDs;
+
+ kal_uint32 UL_OnSuspend;
+#ifdef __GEMINI__
+ kal_uint32 UL_OnGeminiSuspend;
+#endif /* ifdef __GEMINI__ */
+ kal_uint32 UL_TrigDRXWake;
+ kal_uint32 UL_TrigIdleWake;
+
+ kal_uint32 drxIndCnt;
+ kal_uint32 idleEnterCnt;
+ kal_uint32 idleLeaveCnt;
+ kal_uint32 idleLeaveRejCnt;
+ kal_uint32 UL_SuspendCnt;
+ kal_uint32 UL_ResumeCnt;
+#ifdef __GEMINI__
+ kal_uint32 Gemini_SuspendCnt;
+ kal_uint32 Gemini_ResumeCnt;
+#endif /* ifdef __GEMINI__ */
+
+ ltm_epsb_stats_t epsb_stats[LTM_MAX_EPSB_NUM];
+} ltm_stats_t;
+
+
+#endif /*EMAC_STATS_STRUCT_H*/
+
diff --git a/mcu/protocol/interface/el2/em/el2em_report_msg.h b/mcu/protocol/interface/el2/em/el2em_report_msg.h
new file mode 100644
index 0000000..4bfdf69
--- /dev/null
+++ b/mcu/protocol/interface/el2/em/el2em_report_msg.h
@@ -0,0 +1,223 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * el2em_report_msg.h
+ *
+ * Project:
+ * --------
+ * UMOLYA
+ *
+ * Description:
+ * ------------
+ * Define message structure of EM report
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 04 09 2018 peter.yu
+ * [MOLY00318641] [MT6295][EL2] EM info structure refine
+ * [EL2] add "em_info" fields for EL2 OV STATUS.
+ *
+ * 01 11 2018 jia-shi.lin
+ * [MOLY00301451] [SMO release][93/95]EL1 relative interface
+ * emac/el1 interface re-arch
+ *
+ * 03 09 2017 nicole.hsu
+ * [MOLY00223067] [MT6293] EL2 EM implementation
+ * EL2EM re-arch/sync to LR12 CL3601142
+ *
+ * 01 25 2017 nicole.hsu
+ * [MOLY00223067] [MT6293] EL2 EM implementation
+ * fix compile option
+ *
+ ****************************************************************************/
+/**
+ * @file el2em_report_msg.h
+ * @brief Define message structure of EM report
+ *
+ * @author mtk05495
+ * @date 2016/09/08
+ *
+ **/
+
+#ifndef __EL2EM_REPORT_MSG_H__
+#define __EL2EM_REPORT_MSG_H__
+
+#include "el2_def.h"
+
+#if defined(__EL2_EM_MODE__)
+
+#include "kal_public_api.h"
+
+#include "em_el2_public_struct.h"
+#include "lte_time_common.h"
+
+#include "emac_stats_struct.h"
+#include "erlc_stats_struct.h"
+#include "epdcp_stats_struct.h"
+#include "el2em_legacy_stats_struct.h"
+
+/*---------------------------------------------------------------------------
+ * msg struct for EM report
+ *---------------------------------------------------------------------------*/
+
+//================================== EL2_OV ==================================//
+#define EL2_OV_MSG___________________________________
+typedef struct
+{
+ LOCAL_PARA_HDR
+ em_info_enum em_info;
+
+ erlc_stats_struct erlc_stats;
+ epdcp_stats_t epdcp_stats;
+ emac_stats_t emac_stats;
+
+ // No need in 93
+ edyn_stats_t edyn_stats;
+ etmr_ov_status etmr_stats;
+ ltm_stats_t ltm_stats;
+}em_el2_ov_status_ind_struct;
+
+
+//================================== EMAC EM MSG ==================================//
+#define EMAC_EM_MSG__________________________________
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ em_info_enum em_info;
+ kal_uint16 system_fn;
+ kal_uint8 sub_fn;
+ /*
+ For VzW EM, required to report avg received UL grant bytes in 500ms
+ Here we acumulate the total UL grant bytes,
+ and divide by emac_ul_grant_bytes_count
+ for 92 with UL CA, this field aggregate both cells' grant bytes
+ */
+ kal_uint32 emac_ul_grant_bytes_total;
+ /*
+ For VzW EM, required to report avg UL padding bytes in 500ms
+ Here we acumulate the total padding bytes,
+ and divide by emac_ul_grant_bytes_count
+ for 92 with UL CA, this field aggregate both cells' padding bytes
+ */
+ kal_uint32 emac_ul_padding_bytes_total;
+ /*
+ Total transmitted tb count in 500ms
+ for 92 with UL CA, this field aggregate both cells' grant count
+ */
+ kal_uint16 emac_ul_grant_bytes_count;
+
+ /*Below fields is for KOR MNO*/
+ kal_uint32 ra_rar_error_cnt;
+ kal_uint32 ra_cr_error_cnt;
+ kal_uint32 ra_error_ind_cnt;
+
+ kal_uint32 emac_rx_bits;
+ kal_uint32 emac_tx_bits;
+ kal_uint32 phich_nack_cnt;
+ kal_uint32 phich_ack_cnt;
+ kal_uint32 rx_cnt_pcell;
+ kal_uint32 rx_cnt_scell;
+ kal_uint32 rx_crc_ng_cnt_pcell;
+ kal_uint32 rx_crc_ng_cnt_scell;
+
+ /* For R12 Feature EM view, consider up to DL4CC, UL2CC in 92 gen, don't reset below regions after primitive send (refer to _edyn_em_reset_emac_ov_status_500ms),
+ EL2_OV_STATUS_IND also has similar EM info, but its access privilege is HQ_ONLY (refer to em_mapping_for_tool.h), so to allow customer/outsourcing
+ to see R12 Feature EM view working, the view needs to be binded to customer/outsourcing accessible primitives, and we choose EMAC_OV_STATUS_500_IND to do so.
+ */
+ emac_scell_state_enum state_scell_1;
+ emac_scell_state_enum state_scell_2;
+ emac_scell_state_enum state_scell_3;
+
+ kal_uint32 accumulate_rx_cnt_pcell;
+ kal_uint32 accumulate_rx_cnt_scell_1;
+ kal_uint32 accumulate_rx_cnt_scell_2;
+ kal_uint32 accumulate_rx_cnt_scell_3;
+
+ kal_uint32 accumulate_tx_cnt_pcell;
+ kal_uint32 accumulate_tx_cnt_scell;
+ kal_uint64 accumulate_tx_byte_pcell;
+ kal_uint64 accumulate_tx_byte_scell;
+ /**************/
+
+ //For titan
+ //acumulate the bsr_bytes in reporting period, report the total value
+ kal_uint32 emac_tx_bsr_bytes;
+} em_emac_ov_status_500_ind_struct;
+
+/*---------------------------------------------------------------------------
+ * EMAC event EM
+ *---------------------------------------------------------------------------*/
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ em_info_enum em_info;
+ lte_cell_time rcv_time;
+ kal_uint32 rar_ta_value;
+ kal_bool ra_type_contention;
+ kal_uint32 tc_rnti;
+} em_emac_msg2_report_ind_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ em_info_enum em_info;
+ lte_cell_time rcv_time;
+ emac_cr_result_enum cr_result;
+} em_emac_msg4_report_ind_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ em_info_enum em_info;
+ emac_timer_expiry_event_enum emac_timer_expiry;
+} em_emac_timer_expire_ind_struct;
+
+#endif
+#endif
+
diff --git a/mcu/protocol/interface/el2/em/emac_ota.h b/mcu/protocol/interface/el2/em/emac_ota.h
new file mode 100644
index 0000000..1c048b9
--- /dev/null
+++ b/mcu/protocol/interface/el2/em/emac_ota.h
@@ -0,0 +1,291 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * emac_ota.h
+ *
+ * Project:
+ * --------
+ * UMOLYA
+ *
+ * Description:
+ * ------------
+ * Define EMAC statistic structures
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 09 13 2017 nicole.hsu
+ * [MOLY00277396] [MT6293] EL2 L+L EM development
+ * [TRUNK] L+L EM - EL2EM, EMAC, EMACDL
+ *
+ * 06 29 2017 nicole.hsu
+ * [MOLY00258660] [BIANCO][MT6763][MP1][EVB][PHYTest][ASSERT] Assert fail: dpcopro_mmu_drv.c 1608
+ * [TRUNK] send rach_trigger em when PRACH is really scheduled by EL1
+ * refine EMAC DL OTA
+ *
+ * 02 09 2017 nicole.hsu
+ * [MOLY00223067] [MT6293] EL2 EM implementation
+ * modify OTA compile option
+ *
+ * 01 25 2017 nicole.hsu
+ * [MOLY00223067] [MT6293] EL2 EM implementation
+ * fix compile option
+ *
+ ****************************************************************************/
+#ifndef EMAC_OTA_H
+#define EMAC_OTA_H
+
+#if defined(__EM_MODE__)
+
+#include "kal_public_api.h"
+#include "dhl_trace.h"
+
+typedef struct
+{
+ kal_uint8 truncated:1;
+ kal_uint8 type:3;
+ kal_uint8 version:4;
+ kal_uint8 direction:1;
+ kal_uint8 transport_channel:3; // 1:bch 2:dl-sch 3:pch 4:mch 5:ul-sch 6:rach
+ kal_uint8 mac_hdr_len:4; // 1~11
+ kal_uint8 mac_hdr[11];
+}emac_ota_header_t;
+
+/**** EMAC OTA header struct (for both UL/DL EMAC TB)
+ *
+ * +-----+-----+-----+-----+-----+-----+-----+-----+
+ * | t | type | version |
+ * +-----+-----+-----+-----+-----+-----+-----+-----+
+ * | d | trch | mac_hdr_len |
+ * +-----+-----+-----+-----+-----+-----+-----+-----+
+ * | sfn[9:2] |
+ * +-----+-----+-----+-----+-----+-----+-----+-----+
+ * | sfn[1:0] | subframe number[3:0] | Reserved |
+ * +-----+-----+-----+-----+-----+-----+-----+-----+
+ *
+ * t: truncated, set to 1 if the MAC header size is larger than EMAC_OTA_MAC_HDR_LEN bytes
+ * sfn: LTE system frame number (0..1023)
+ * subframe number: LTE subframe number (0..9)
+ *
+ */
+
+// EMAC OTA: length setting
+#define EMAC_OTA_BUFFER_LEN 15
+#define EMAC_OTA_MAC_HDR_LEN 11
+#define EMAC_OTA_OVERHEAD 4
+
+// EMAC OTA: header.type
+#define EMAC_OTA_TYPE_MAC DHL_L2_PDU_MAC_TYPE
+
+// EMAC OTA: header.version
+#define EMAC_OTA_VERSION 1
+
+// EMAC OTA: header.d (direction)
+#define EMAC_OTA_DIR_UL 0
+#define EMAC_OTA_DIR_DL 1
+
+// EMAC OTA: header.trch (transport channel)
+#define EMAC_OTA_BCH 1
+#define EMAC_OTA_DLSCH 2
+#define EMAC_OTA_PCH 3
+#define EMAC_OTA_MCH 4
+#define EMAC_OTA_ULSCH 5
+#define EMAC_OTA_RACH 6
+
+#define EMAC_SUB_HDR_E (0x20) // E in MAC subheader
+#define EMAC_SUB_HDR_F (0x80) // F in MAC subheader
+
+extern kal_uint8* p_emac_dl_ota_buffer;
+extern kal_uint8 emac_dl_ota_length;
+extern kal_uint8 emac_ul_ota_buffer[];
+extern kal_uint8 emac_ul_ota_length;
+
+// 2 byte is minimum overhead for emac ota structure
+#define EMAC_DL_OTA_DECLARE(_pOta, _pCur, _bTruncate, _len, _is_dl_tb_report_needed_in, _pTb_report_in, _pidx) \
+ kal_uint8* _pOta = p_emac_dl_ota_buffer; \
+ kal_uint8* _pCur = p_emac_dl_ota_buffer + EMAC_OTA_OVERHEAD; \
+ kal_uint8 _bTruncate = 0; \
+ kal_bool _is_dl_tb_report_needed = el2em_is_em_on(EL2EM_EM_TYPE_EMAC_DL_TBS_REPORT, _pidx); \
+ kal_uint32 _len = 0; \
+ emac_el2task_dl_tb_report_ind_struct* _pTb_report = (_pTb_report_in);
+
+#define EMAC_DL_OTA_CLEAR_BUFFER()\
+ do {\
+ EMAC_MEM_SET(p_emac_dl_ota_buffer, 0, EMAC_OTA_BUFFER_LEN);\
+ } while(0);
+
+#define _FILL_EMAC_OTA_BYTE1(ota_ptr, truncated, type, version) \
+ do {\
+ *(kal_uint8 *)(ota_ptr) = (((kal_uint8)(truncated) & 0x01) << 7) | (((kal_uint8)(type) & 0x07) << 4) | ((kal_uint8)(version) & 0x0F);\
+ } while(0);
+
+#define _FILL_EMAC_OTA_BYTE2(ota_ptr, direction, tch, ota_len) \
+ do {\
+ *(kal_uint8 *)((ota_ptr)+1) = (((kal_uint8)(direction) & 0x01) << 7) | (((kal_uint8)(tch) & 0x07) << 4) | ((kal_uint8)(ota_len) & 0x0F);\
+ } while(0);
+
+#define _FILL_EMAC_OTA_BYTE3_4(ota_ptr, system_fn, sub_fn) \
+ do {\
+ *(kal_uint8 *)((ota_ptr)+2) = ((kal_uint8)((system_fn) >> 2));\
+ *(kal_uint8 *)((ota_ptr)+3) = (((kal_uint8)(system_fn) & 0x03) << 6 ) | ((((kal_uint8)(sub_fn) & 0x0F)) << 2);\
+ } while(0);
+
+#define _FILL_EMAC_OTA_LCID(cur_ptr, ota_len, _bTruncate, lcid) \
+ do {\
+ if( !(_bTruncate) && ((ota_len)+MAC_SUBHDR_L_0_SZ) <= EMAC_OTA_MAC_HDR_LEN){ \
+ *(kal_uint8 *)(cur_ptr) = ((kal_uint8)(lcid) & 0x1F);\
+ (ota_len)++;\
+ (cur_ptr)++;\
+ } \
+ else{ \
+ (_bTruncate) = 1; \
+ } \
+ } while(0);
+
+#define FILL_EMAC_OTA_E_LCID(cur_ptr, ota_len, _bTruncate, lcid) \
+ do {\
+ if(DHL_MAC_CHECK_L2_PDU() || _is_dl_tb_report_needed){\
+ if( !(_bTruncate) && ((ota_len)+MAC_SUBHDR_L_0_SZ) <= EMAC_OTA_MAC_HDR_LEN){ \
+ *(kal_uint8 *)(cur_ptr) = ((kal_uint8)EMAC_SUB_HDR_E) | (((kal_uint8)(lcid) & 0x1F));\
+ (ota_len)++;\
+ (cur_ptr)++;\
+ } \
+ else{ \
+ (_bTruncate) = 1; \
+ } \
+ }\
+ } while(0);
+
+#define FILL_EMAC_OTA_LAST_LCID(cur_ptr, ota_len, _bTruncate, lcid, ota_ptr, direction, tch, system_fn, sub_fn) \
+ do {\
+ if(DHL_MAC_CHECK_L2_PDU() || _is_dl_tb_report_needed){\
+ _FILL_EMAC_OTA_LCID((cur_ptr), (ota_len), (_bTruncate), (lcid)); \
+ _FILL_EMAC_OTA_BYTE1((ota_ptr), (_bTruncate), EMAC_OTA_TYPE_MAC, EMAC_OTA_VERSION); \
+ _FILL_EMAC_OTA_BYTE2((ota_ptr), (direction), (tch), (ota_len)); \
+ _FILL_EMAC_OTA_BYTE3_4((ota_ptr), (system_fn), (sub_fn)); \
+ emac_dl_ota_length = (ota_len) + EMAC_OTA_OVERHEAD;\
+ if(DHL_MAC_CHECK_L2_PDU()) {\
+ DHL_MAC_LOG_L2_PDU(emac_dl_ota_buffer, emac_dl_ota_length);\
+ }\
+ if(_is_dl_tb_report_needed && _pTb_report) {\
+ kal_uint32 copy_len = (ota_len) <= EM_EMAC_MAX_HEADER_LEN ?\
+ (ota_len) : EM_EMAC_MAX_HEADER_LEN;\
+ EMAC_MEM_CPY(_pTb_report->tb.mac_header_data,\
+ emac_dl_ota_buffer + EMAC_OTA_OVERHEAD, copy_len);\
+ _pTb_report->tb.mac_header_len = copy_len;\
+ }\
+ }\
+ } while(0);
+
+// requested by ERRC Paging/SIB reporting, ERRC will prepare OTA data buffer
+#define FILL_EMAC_OTA_NO_LCID(ota_len, _bTruncate, ota_ptr, direction, tch, system_fn, sub_fn) \
+ do {\
+ if(DHL_MAC_CHECK_L2_PDU()){\
+ _FILL_EMAC_OTA_BYTE1((ota_ptr), (_bTruncate), EMAC_OTA_TYPE_MAC, EMAC_OTA_VERSION); \
+ _FILL_EMAC_OTA_BYTE2((ota_ptr), (direction), (tch), (ota_len)); \
+ _FILL_EMAC_OTA_BYTE3_4((ota_ptr), (system_fn), (sub_fn)); \
+ DHL_MAC_LOG_L2_PDU(ota_ptr, (ota_len)+ EMAC_OTA_OVERHEAD);\
+ }\
+ } while(0);
+
+#define FILL_EMAC_OTA_E_SUBHDR(cur_ptr, ota_len, _bTruncate, lcid, len)\
+do {\
+ if(DHL_MAC_CHECK_L2_PDU() || _is_dl_tb_report_needed){\
+ if ((len) <= MAC_SUBHDR_L_7_MAX_VAL) {\
+ if( !(_bTruncate) && ((ota_len)+MAC_SUBHDR_L_7_SZ) <= EMAC_OTA_MAC_HDR_LEN){ \
+ *(kal_uint8 *)(cur_ptr) = ((kal_uint8)EMAC_SUB_HDR_E) | (((kal_uint8)(lcid) & 0x1F));\
+ *(kal_uint8 *)((cur_ptr)+1) = (((kal_uint8)(len) & 0x7F));\
+ (ota_len) += MAC_SUBHDR_L_7_SZ;\
+ (cur_ptr) += MAC_SUBHDR_L_7_SZ;\
+ } \
+ else{ \
+ (_bTruncate) = 1; \
+ } \
+ } else {\
+ if( !(_bTruncate) && (ota_len+MAC_SUBHDR_L_15_SZ) <= EMAC_OTA_MAC_HDR_LEN){ \
+ *(kal_uint8 *)(cur_ptr) = ((kal_uint8)EMAC_SUB_HDR_E) | (((kal_uint8)(lcid) & 0x1F));\
+ *(kal_uint8 *)((cur_ptr)+1) = ((kal_uint8)EMAC_SUB_HDR_F) | (((kal_uint8)((len)>>8)) & 0x7F);\
+ *(kal_uint8 *)((cur_ptr)+2) = ((kal_uint8)((len) & 0xFF));\
+ (ota_len) += MAC_SUBHDR_L_15_SZ;\
+ (cur_ptr) += MAC_SUBHDR_L_15_SZ;\
+ } \
+ else{ \
+ (_bTruncate) = 1; \
+ } \
+ }\
+ }\
+} while (0);
+
+#define FILL_EMAC_UL_OTA(direction, tch, mac_hdr_ptr, ota_len, system_fn, sub_fn)\
+do {\
+ if(DHL_MAC_CHECK_L2_PDU()){\
+ if((ota_len) > EMAC_OTA_MAC_HDR_LEN){\
+ _FILL_EMAC_OTA_BYTE1(emac_ul_ota_buffer, 1, EMAC_OTA_TYPE_MAC, EMAC_OTA_VERSION); \
+ _FILL_EMAC_OTA_BYTE2(emac_ul_ota_buffer, (direction), (tch), EMAC_OTA_MAC_HDR_LEN); \
+ _FILL_EMAC_OTA_BYTE3_4(emac_ul_ota_buffer, (system_fn), (sub_fn)); \
+ EMAC_MEM_CPY(emac_ul_ota_buffer+EMAC_OTA_OVERHEAD, (void*)(mac_hdr_ptr), EMAC_OTA_MAC_HDR_LEN);\
+ emac_ul_ota_length = EMAC_OTA_BUFFER_LEN;\
+ }\
+ else{\
+ _FILL_EMAC_OTA_BYTE1(emac_ul_ota_buffer, 0, EMAC_OTA_TYPE_MAC, EMAC_OTA_VERSION); \
+ _FILL_EMAC_OTA_BYTE2(emac_ul_ota_buffer, (direction), (tch), (ota_len)); \
+ _FILL_EMAC_OTA_BYTE3_4(emac_ul_ota_buffer, (system_fn), (sub_fn)); \
+ EMAC_MEM_CPY(emac_ul_ota_buffer+EMAC_OTA_OVERHEAD, (void*)(mac_hdr_ptr), (ota_len));\
+ emac_ul_ota_length = (ota_len) + EMAC_OTA_OVERHEAD;\
+ }\
+ DHL_MAC_LOG_L2_PDU(emac_ul_ota_buffer, emac_ul_ota_length);\
+ }\
+}while(0);
+
+#else
+#define EMAC_DL_OTA_DECLARE(_pOta, _pCur, _bTruncate, _len, _is_dl_tb_report_needed_in, _pTb_report_in)
+#define EMAC_DL_OTA_CLEAR_BUFFER()
+#define FILL_EMAC_OTA_E_LCID(cur_ptr, ota_len, _bTruncate, lcid)
+#define FILL_EMAC_OTA_E_SUBHDR(cur_ptr, ota_len, _bTruncate, lcid, len)
+#define FILL_EMAC_OTA_LAST_LCID(cur_ptr, ota_len, _bTruncate, lcid, ota_ptr, direction, tch, system_fn, sub_fn)
+#define FILL_EMAC_OTA_NO_LCID(ota_len, _bTruncate, ota_ptr, direction, tch, system_fn, sub_fn)
+#define FILL_EMAC_UL_OTA(direction, tch, mac_hdr_ptr, ota_len, system_fn, sub_fn)
+#endif /* __EL2_EM_MODE__ */
+
+#endif /*EMAC_STATS_STRUCT_H*/
+
diff --git a/mcu/protocol/interface/el2/em/emac_stats_struct.h b/mcu/protocol/interface/el2/em/emac_stats_struct.h
new file mode 100644
index 0000000..b1c1f5c
--- /dev/null
+++ b/mcu/protocol/interface/el2/em/emac_stats_struct.h
@@ -0,0 +1,265 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * emac_stats_struct.h
+ *
+ * Project:
+ * --------
+ * UMOLYA
+ *
+ * Description:
+ * ------------
+ * Define EMAC statistic structures
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 06 23 2017 nicole.hsu
+ * [MOLY00259119] [MT6763][EL2] EMAC/EL2EM/EL2POW maintenance
+ * [TRUNK] sync EM from LR12
+ *
+ * 03 09 2017 nicole.hsu
+ * [MOLY00223067] [MT6293] EL2 EM implementation
+ * EL2EM re-arch/sync to LR12 CL3601142
+ *
+ * 02 21 2017 jia-shi.lin
+ * [MOLY00194987] [MT6293][UMOLYA/PS DEV] EMAC maintenance
+ * emac em struct update
+ *
+ ****************************************************************************/
+#ifndef EMAC_STATS_STRUCT_H
+#define EMAC_STATS_STRUCT_H
+#include "kal_public_api.h"
+#include "lte_abs_time.h"
+#include "dhl_trace.h"
+#include "em_el2_public_struct.h"
+
+/* This constant has the same value as MAX_NUM_SCELL constant in EL1-EMAC IF. */
+#define EMAC_STATS_MAX_NUM_SCELL 7
+/* This constant has the same value as MAX_NUM_SUPPORT_UL_CELLS constant in EL1-EMAC IF. */
+#define EMAC_STATS_MAX_NUM_SUPPORT_UL_CELLS 2
+
+typedef enum
+{
+ EMAC_SCELL_STATE_NOT_CONFIG = 0,
+ EMAC_SCELL_STATE_DEACT = 1,
+ EMAC_SCELL_STATE_ACT = 2
+} emac_scell_state_enum;
+
+typedef enum
+{
+ EMAC_CR_RESULT_NONE,
+ EMAC_CR_RESULT_SUCCEEDED,
+ EMAC_CR_RESULT_FAILED
+}emac_cr_result_enum;
+
+typedef enum
+{
+ EMAC_TIMER_EXPIRY_NULL,
+ EMAC_TIMER_EXPIRY_TA,
+ EMAC_TIMER_EXPIRY_RA,
+ EMAC_TIMER_EXPIRY_CR,
+ EMAC_TIMER_EXPIRY_BACKOFF,
+ EMAC_TIMER_EXPIRY_STAG_TA
+} emac_timer_expiry_event_enum;
+
+
+
+typedef struct
+{
+ kal_uint8 ch_mode;
+ kal_uint8 fnt_status;
+
+ //CFG
+ kal_bool sr_resource_flag;
+ kal_uint8 sr_periodicity;
+ kal_uint32 sr_prohibit_timer_length;
+ kal_uint16 drx_long_cycle;
+ kal_uint16 drx_short_cycle;
+
+ //TA
+ kal_bool is_ta_running;
+ kal_bool is_stag_ta_running;
+ kal_uint32 ta_value;
+ kal_uint32 stag_ta_value;
+ kal_uint32 ta_command;
+ kal_uint32 stag_ta_command;
+
+ //RA
+ kal_uint16 earfcn; //wEarfcn for AT&T LT08, follow the EL1 type
+ kal_uint32 phys_cell_id; //wPhysCellId for AT&T LT08, follow the EL1 type
+ kal_uint32 ra_cnt;
+ kal_uint32 preamble_cnt;
+ kal_uint32 rar_cnt;
+ kal_uint32 rar_match_cnt;
+ kal_uint32 rar_mismatch_cnt;
+ kal_uint32 ra_ueid_cr_fail_cnt;
+ kal_uint32 ra_success_cnt;
+ kal_bool ra_type_contention;
+ emac_ra_result_enum ra_result;
+ kal_uint32 ra_max_preambles;
+ kal_uint8 ul_scell_ra_max_preambles;
+ kal_int8 ra_init_TXpower;
+ kal_uint8 ra_preamble_last_TXpower; //ucLastTxPower for AT&T LT08, follow the EL1 type
+ kal_int8 ul_scell_ra_init_TXpower;
+ kal_uint8 ra_ramping_step;
+ kal_uint8 ul_scell_ra_ramping_step;
+ kal_uint32 ra_preamble_fail;
+ kal_uint32 ra_preamble_success;
+ kal_uint32 ra_rapid;
+ ABS_TICK_TIME ra_start_time;
+ ABS_TICK_TIME ra_access_delay;
+ ABS_TICK_TIME ra_1st_preamble_time;
+ ABS_TICK_TIME ra_latency; // time in ms between 1st preamble and response from NW in DL
+ ABS_TICK_TIME ra_time_msg1;
+ ABS_TICK_TIME ra_time_msg2;
+ ABS_TICK_TIME ra_time_msg4;
+ emac_cr_result_enum cr_result;
+ emac_ra_reason_enum ra_reason;
+ kal_uint32 ra_rnti;
+ kal_uint32 c_rnti;
+ kal_uint32 tc_rnti;
+ kal_uint32 rar_ul_grant;
+ kal_uint32 rar_ta_value;
+ kal_uint32 rar_tc_rnti;
+ kal_uint32 rar_successed;
+ kal_uint8 ra_cell;
+ ABS_TICK_TIME ra_begin_attempt_time;
+ ABS_TICK_TIME ra_access_delay_total;
+ kal_uint32 ra_access_delay_count;
+
+ //TX
+ kal_uint64 tx_byte;
+ kal_uint32 tx_cnt;
+ kal_uint32 new_tx_cnt;
+ kal_uint64 new_tx_byte;
+ kal_uint32 adp_retx_cnt;
+ kal_uint32 non_adp_retx_cnt;
+ kal_uint32 phich_nack_cnt;
+ kal_uint32 phich_ack_cnt;
+ kal_uint64 tx_byte_ul_scell;
+ kal_uint32 tx_cnt_ul_scell;
+ kal_uint32 new_tx_cnt_ul_scell;
+ kal_uint64 new_tx_byte_ul_scell;
+ kal_uint32 adp_retx_cnt_ul_scell;
+ kal_uint32 non_adp_retx_cnt_ul_scell;
+ kal_uint32 phich_nack_cnt_ul_scell;
+ kal_uint32 phich_ack_cnt_ul_scell;
+
+ kal_uint32 bsr_lcg_buf_byte[4];
+
+ kal_uint32 sr_trigger_cnt;
+ kal_uint32 sr_tx_cnt;
+ kal_uint32 sr_success_cnt;
+ kal_uint32 sr_fail_cnt;
+ kal_int16 tx_pathloss;
+ kal_int16 scell_tx_pathloss;
+ ABS_TICK_TIME ho_time_start;
+ ABS_TICK_TIME ho_time_end;
+ kal_uint32 emac_tx_bytes;
+ kal_uint32 emac_ul_grant_bytes;
+
+ //RX
+ kal_uint32 rx_cnt_pcell;
+ kal_uint32 rx_cnt_scell;
+ kal_uint32 rx_cnt_scell_2;
+ kal_uint32 rx_cnt_scell_3;
+ kal_uint32 rx_crc_ng_cnt_pcell;
+ kal_uint32 rx_crc_ng_cnt_scell;
+ kal_uint32 rx_crc_ng_cnt_scell_2;
+ kal_uint32 rx_crc_ng_cnt_scell_3;
+ kal_uint32 emac_rx_bytes;
+
+ //MCH
+ kal_uint32 mch_cnt_pcell;
+ kal_uint32 mch_cnt_scell;
+ kal_uint32 mch_crc_ng_cnt_pcell;
+ kal_uint32 mch_crc_ng_cnt_scell;
+
+ //LTE-A CA
+ kal_bool extend_bsr_config;
+ kal_bool extend_phr_config;
+ emac_scell_state_enum scell_state;
+ emac_scell_state_enum scell_2_state;
+ emac_scell_state_enum scell_3_state;
+
+ emac_timer_expiry_event_enum emac_timer_expiry;
+
+ kal_uint16 system_fn;
+ kal_uint8 sub_fn;
+
+ // sync 90 EM
+ kal_uint32 preamble_tx_cnt;
+
+ //LTE-A CA Statistics
+ //Only sync 1 scell scenario, if more than 1 scell, need check spec.
+ ABS_TICK_TIME scell_config_time;
+ ABS_TICK_TIME time_to_scell_act_min;
+ ABS_TICK_TIME time_to_scell_act_max;
+ ABS_TICK_TIME time_to_scell_act_total;
+ kal_uint32 scell_act_cnt;
+ ABS_TICK_TIME scell_activate_time;
+ ABS_TICK_TIME scell_activate_time_total;
+} emac_stats_t;
+
+
+//=================================================================================
+// EM update use
+typedef enum
+{
+ EM_EMAC_FUNC_STATUS_BIT_DRX = 0,
+ EM_EMAC_FUNC_STATUS_BIT_PHR = 1,
+ EM_EMAC_FUNC_STATUS_BIT_SPS = 2,
+ EM_EMAC_FUNC_STATUS_BIT_TTI_BUNDLING = 3
+} em_emac_func_status_bit_e;
+
+typedef enum
+{
+ EM_EMAC_CH_MODE_CLOSE = 0,
+ EM_EMAC_CH_MODE_SRB0 = 1,
+ EM_EMAC_CH_MODE_OPEN = 2
+} em_emac_ch_mode_e;
+
+
+#endif /*EMAC_STATS_STRUCT_H*/
+
diff --git a/mcu/protocol/interface/el2/em/epdcp_ota.h b/mcu/protocol/interface/el2/em/epdcp_ota.h
new file mode 100644
index 0000000..9a1396f
--- /dev/null
+++ b/mcu/protocol/interface/el2/em/epdcp_ota.h
@@ -0,0 +1,72 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * epdcp_ota.h
+ *
+ * Project:
+ * --------
+ * UMOLYA
+ *
+ * Description:
+ * ------------
+ * ePDCP statistics
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ ****************************************************************************/
+
+#ifndef _LTE_EL2_EPDCP_OTA_H_
+#define _LTE_EL2_EPDCP_OTA_H_
+
+#include "kal_public_api.h"
+
+
+
+/*****************************************************************************
+* global variables
+*****************************************************************************/
+
+
+#endif //_LTE_EL2_EPDCP_STATS_STRUCT_H_
+
diff --git a/mcu/protocol/interface/el2/em/epdcp_stats_struct.h b/mcu/protocol/interface/el2/em/epdcp_stats_struct.h
new file mode 100644
index 0000000..58791fc
--- /dev/null
+++ b/mcu/protocol/interface/el2/em/epdcp_stats_struct.h
@@ -0,0 +1,335 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * epdcp_stats.h
+ *
+ * Project:
+ * --------
+ * UMOLYA
+ *
+ * Description:
+ * ------------
+ * ePDCP statistics
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 06 01 2017 i-feng.chen
+ * [MOLY00252815] [6293] EPDCP EM statistics
+ *
+ * [UMOLYA][TRUNK][EPDCP] EPDCP EM Statics
+ *
+ * 03 09 2017 nicole.hsu
+ * [MOLY00223067] [MT6293] EL2 EM implementation
+ * EL2EM re-arch/sync to LR12 CL3601142
+ *
+ ****************************************************************************/
+
+#ifndef _LTE_EL2_EPDCP_STATS_STRUCT_H_
+#define _LTE_EL2_EPDCP_STATS_STRUCT_H_
+
+#include "kal_public_api.h"
+
+/*****************************************************************************
+* constants
+*****************************************************************************/
+
+#define EPDCP_MAX_DRB_NUM (8)
+#define HW_CHNL_NUM (10) // SRB(2) + DRB(8)
+
+
+/*****************************************************************************
+* enum types
+*****************************************************************************/
+
+
+
+/*****************************************************************************
+* statistics structure
+*****************************************************************************/
+
+/* --------------------------
+* structure
+* ------------------------ */
+
+/* VzW MDMI: EPDCP-UL/DL-STATS */
+
+// We currently apply the LR12 implementation for MDMI EM
+// XXX: There are some potential issues / implementation notes listed below.
+// Change of EM reporting implementation needs to be synced with
+// MTK tool team Josh Lin @ WCS/ST/ST2.
+// - The definition of 'cfgIndex' in EPDCP and ERLC do not match.
+// MDMI spec:
+// cfgIndex INTEGER(0..34), -- Unique radio bearer configuration index
+// * In ERLC, the cfgIndex of
+// DRB1: 0, DRB2: 1, ..., DRB 32: 31
+// SRB0: 32, SRB1: 33, SRB2: 34
+// * In EPDCP, the cfgIndex of
+// DRB1: 16, DRB2: 17, ..., DRB 32: 47
+// SRB0: N/A, SRB1: 1, SRB2: 2
+// - The cfgIndex filled by EPDCP exceeds the range of the field
+// * Spec: 0~34
+// * EPDCP could fill in the field up to 47
+// - If an RB was released and then established bewtween two
+// consecutive EM reports, the value calcuated by the tool might overflow
+// * rb_id 0 (cfgIndex 0) is used to indicate that the current
+// reporting array entry dl_stats[x]/ul_stats[x] is invalid
+// * The reported values are saved by the tool for each
+// valid rb_id.
+// * The statistics saved in the EM database
+// (dl_stats[x]/ul_stats[x] is reset only upon EPDCP handles RB
+// addition/deletion (including fullConfig HOs).
+// * When a new report is received at t2, the latest report value
+// (say v2) is subtracted by the last report value (say v1)
+// received at t1, and v2-v1 is used as the value increased
+// within the reporting period t2-t1.
+// * So, if an RB is released and established within a single
+// reporting period, chances are that the same rb_id is used for
+// the reporting array entry, but v2 is smaller than v1 and
+// v2-v1 would be an overflow result.
+// - rb_id might be changed and restored for an rb_idx if fullConfig
+// HO had failed. The currently implementation might not update the
+// rb_id correctly.
+// - miss_sdu_to_upper is not updated at all.
+
+typedef struct
+{
+ kal_uint8 rb_id;
+ kal_uint32 tx_data_pdu_bytes;
+ kal_uint32 tx_ctrl_pdu_bytes;
+ kal_uint32 pdu_rohc_fail;
+ kal_uint32 sdu_disc_bytes;
+ kal_uint32 pdu_retx_bytes;
+ kal_uint32 num_reest;
+ kal_uint32 num_tx_data_pdus;
+ kal_uint32 num_tx_ctrl_pdus;
+ kal_uint32 num_stus_rpt_pdus;
+ kal_uint32 num_sdu_disc;
+ kal_uint32 num_pdus_retx_during_ho;
+} epdcp_ul_stats_t;
+
+typedef struct
+{
+ kal_uint8 rb_id;
+ kal_uint32 rx_data_pdu_bytes;
+ // SRB: includes only NML PDU; CTRL/OOW/PHE PDUs are considered as INVALID PDUs
+ // DRB: includes NML, OOW, DUP PDUs, but not CTRL/PHE PDUs
+ kal_uint32 rx_ctrl_pdu_bytes;
+ // SRB: should have none; CTRL PDUs are considered as INVALID PDUs
+ // DRB: includes RoHC feedbacks & PDCP Status reports
+ // CTRL PDUs received on a UM DRB without RoHC enabled are
+ // considered as INVALID PDUs
+ kal_uint32 pdu_rohc_fail;
+ // SRB: should have none
+ // DRB: PDUs that had decompression failure
+ kal_uint32 pdu_inte_fail;
+ // SRB: PDUs that had integrity check failure
+ // DRB: should have none
+ kal_uint32 miss_sdu_to_upper;
+ // SRB, DRB: should have none currently
+ kal_uint32 miss_sdu_from_lower;
+ // SRB: should have none currently
+ // DRB: SN gaps during RLC re-establishment flush
+ kal_uint32 pdu_oow_bytes;
+ // SRB: should have none; OOW PDUs are considered as INVALID PDUs
+ // DRB: OOW PDUs
+ kal_uint32 pdu_dup_bytes;
+ // SRB: should have none
+ // DRB: DUP PDUs
+ kal_uint32 pdu_invalid_bytes;
+ // SRB: includes OOW/CTRL/PHE PDUs
+ // DRB: PHE PDUs, CTRL PDUs received on a UM DRB without RoHC enabled
+ kal_uint32 num_reest;
+ // SRB, DRB: number of PDCP re-establishments occured (HO_IND)
+ kal_uint32 num_data_pdus_recv;
+ // SRB: includes only NML PDU; CTRL/OOW/PHE PDUs are considered as INVALID PDUs
+ // DRB: includes NML, OOW, DUP PDUs, but not CTRL/PHE PDUs
+ kal_uint32 num_ctrl_pdus_recv;
+ // SRB: should have none; CTRL PDUs are considered as INVALID PDUs
+ // DRB: includes RoHC feedbacks & PDCP Status reports
+ // CTRL PDUs received on a UM DRB without RoHC enabled are
+ // considered as INVALID PDUs
+ kal_uint32 num_stus_rpt_pdus_recv;
+ // SRB: should have none; CTRL PDUs are considered as INVALID PDUs
+ // DRB: PDCP Status reports
+ kal_uint32 num_dup_pdus;
+ // SRB: should have none
+ // DRB: DUP PDUs
+ kal_uint32 num_oow_pdus;
+ // SRB: should have none; OOW PDUs are considered as INVALID PDUs
+ // DRB: OOW PDUs
+ kal_uint32 num_invalid_pdus;
+ // SRB: includes OOW/CTRL/PHE PDUs
+ // DRB: PHE PDUs, CTRL PDUs received on a UM DRB without RoHC enabled
+} epdcp_dl_stats_t;
+
+typedef struct
+{
+ /* --------
+ * UL
+ * ------- */
+
+ /* read from HIF/L4 (to TFT) */
+ kal_uint32 ul_tft_total_rx_gpds;
+ /*
+ * read from TFT result or UL_RoHC result (per RB)
+ * - drop count (due to FC, or RB not exist)
+ * - accept nml_data count (allowed)
+ * - accept pri_data count (allowed)
+ */
+ kal_uint32 ul_rb_drop_gpds[HW_CHNL_NUM];
+ kal_uint32 ul_rb_que_nml_pkt[HW_CHNL_NUM];
+ kal_uint32 ul_rb_que_pri_pkt[HW_CHNL_NUM];
+ kal_uint32 ul_rb_que_fdbk_pkt[HW_CHNL_NUM];
+
+ /* sent to HW (per RB) */
+ kal_uint32 ul_hw_rb_tx_data_gpds[HW_CHNL_NUM];
+ kal_uint32 ul_hw_rb_tx_ctrl_gpds[HW_CHNL_NUM];
+ kal_uint32 ul_hw_rb_retx_gpds[HW_CHNL_NUM];
+
+ /* --------
+ * DL
+ * ------- */
+ /*
+ * read from decipher HW
+ *
+ * - total rx data_pdu count from HW (including CB)
+ * - total rx ctrl_pdu count from HW
+ */
+ kal_uint32 dlhw_datapdu_gpds; // phased out
+ kal_uint32 dlhw_ctrlpdu_gpds; // phased out
+
+ /*
+ * reestablishment flush
+ */
+ kal_uint32 dlfc_drop_flush_gpds; // phased out
+
+ /* read from SWM decipher (included in total rx_gpds) */
+ //kal_uint32 swm_total_dcip_gpds;
+
+ /*
+ * dispatch data GPDs to each RB
+ * - drop count (per channel, due to RB not exist)
+ * - rx count (HW -> RB)
+ * - rx count (HW -> SWM -> RB; due to CB)
+ */
+ kal_uint32 dlhw_ch_drop_gpds[HW_CHNL_NUM]; // phased out
+ kal_uint32 dlhw_rb_rx_gpds[HW_CHNL_NUM]; // phased out
+ kal_uint32 dlswm_rb_rx_gpds[HW_CHNL_NUM]; // phased out
+
+ /* drop due to Out-Of-Wnd */
+ kal_uint32 dl_rb_drop_oow_gpds[HW_CHNL_NUM]; // phased out
+
+ /* -------------------
+ * RoHC statistics
+ * ----------------- */
+
+ //kal_uint32 rohc_dl_in_gpds[EPDCP_NB_TOTAL_HW_CHNL];
+ kal_uint32 rohc_dl_out_gpds[HW_CHNL_NUM]; // phased out
+ kal_uint32 rohc_dl_fdbk_gpds[HW_CHNL_NUM]; // phased out
+
+ /* uplink counter */
+ kal_uint32 rohc_ul_in_gpds[HW_CHNL_NUM];
+ kal_uint32 rohc_ul_re_in_gpds[HW_CHNL_NUM];
+ kal_uint32 rohc_ul_out_gpds[HW_CHNL_NUM];
+
+ /* -----------------
+ * discard
+ * --------------- */
+ // discard by timeout
+ kal_uint32 disc_tmout[HW_CHNL_NUM];
+ kal_uint32 disc_acked[HW_CHNL_NUM];
+
+ /* -----------------
+ * eMBMS
+ * --------------- */
+ // received SDU counts
+ kal_uint32 mcch_recv_count;
+ kal_uint32 mtch_recv_count;
+
+ /* -----------------
+ * UL/DL throughput
+ * --------------- */
+ // received SDU counts
+ /* VzW MDMI: EPDCP UL/DL throughput */
+ kal_uint32 ul_cip_enqueue_bytes;
+ kal_uint32 dl_dcip_dequeue_bytes;
+ // SRB, DRB: includes NML/CTRL/OOW/INVALID PDUs
+
+ /* VzW MDMI: EPDCP-UL/DL-STATS */
+ epdcp_ul_stats_t ul_stats[HW_CHNL_NUM];
+ epdcp_dl_stats_t dl_stats[HW_CHNL_NUM];
+} epdcp_stats_t;
+
+/* VzW MDMI: EPDCP-OTA-MSG */
+typedef struct
+{
+ /* 1st-byte (DHL used) */
+ kal_uint8 version:4;
+ kal_uint8 type:3; // pdcp 100, rlc 010, mac 001
+ kal_uint8 truncate:1;
+
+ /* 2nd-byte */
+ kal_uint8 direction:1; // upstream: 0, downstream: 1
+ kal_uint8 msg_type:1; // data for drb(null for srb): 0, control for drb: 1
+ kal_uint8 pdcp_hdr_len:1; // 1-byte header: 0, 2-byte header: 1
+ kal_uint8 reserved:1;
+ kal_uint8 rb_id:4;
+
+ /* 3rd-byte */
+ kal_uint8 pdcp_sn_bit:2; // null: 0, 7-bit: 1, 12-bit: 2, 15-bit: 3
+ kal_uint8 rb_type:1; // drb: 0, srb: 1
+ kal_uint8 rlc_mode:1; // am: 0, um: 1
+
+ /* raw header */
+ kal_uint8 pdcp_hdr[2];
+} epdcp_ota_msg_t;
+
+/*****************************************************************************
+* global variables
+*****************************************************************************/
+
+
+
+#endif //_LTE_EL2_EPDCP_STATS_STRUCT_H_
+
diff --git a/mcu/protocol/interface/el2/em/erlc_ota.h b/mcu/protocol/interface/el2/em/erlc_ota.h
new file mode 100644
index 0000000..4551894
--- /dev/null
+++ b/mcu/protocol/interface/el2/em/erlc_ota.h
@@ -0,0 +1,69 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * erlc_ota.h
+ *
+ * Project:
+ * --------
+ * UMOLYA
+ *
+ * Description:
+ * ------------
+ * ERLC statistics
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 03 09 2017 nicole.hsu
+ * [MOLY00223067] [MT6293] EL2 EM implementation
+ * EL2EM re-arch/sync to LR12 CL3601142
+ *
+ ****************************************************************************/
+
+#ifndef _LTE_EL2_ERLC_OTA_H_
+#define _LTE_EL2_ERLC_OTA_H_
+
+#include "kal_public_api.h"
+
+
+#endif
diff --git a/mcu/protocol/interface/el2/em/erlc_stats_struct.h b/mcu/protocol/interface/el2/em/erlc_stats_struct.h
new file mode 100644
index 0000000..8c32aaf
--- /dev/null
+++ b/mcu/protocol/interface/el2/em/erlc_stats_struct.h
@@ -0,0 +1,132 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * erlc_stats_struct.h
+ *
+ * Project:
+ * --------
+ * UMOLYA
+ *
+ * Description:
+ * ------------
+ * ERLC statistics
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 03 09 2017 nicole.hsu
+ * [MOLY00223067] [MT6293] EL2 EM implementation
+ * EL2EM re-arch/sync to LR12 CL3601142
+ *
+ ****************************************************************************/
+
+#ifndef _LTE_EL2_ERLC_STATS_STRUCT_H_
+#define _LTE_EL2_ERLC_STATS_STRUCT_H_
+
+#include "kal_public_api.h"
+#include "common_def.h"
+#include "el2_sap_common.h"
+
+#define MAX_RLC_RB (10)
+#define EM_MAX_NUM_REASM_TBL (MAX_RLC_RB+2)
+
+
+/// ERLC-DL REASM TBL statistics
+typedef struct
+{
+ kal_uint32 reasm_desc_cntr; ///< total rsb number of descriptor
+ kal_uint32 free_desc_cntr; ///< total free number of descriptor
+} erlcdl_reasm_tbl_stats;
+
+/// ERLC-DL RB statistics
+typedef struct
+{
+ // RLC control PDU
+ kal_uint32 tx_status_pdu_trgr_cntr; ///< num trigger of UL STATUS PDU
+
+ // reassemble
+ kal_uint32 reasm_cntr; ///< reassemble trigger
+ kal_uint32 reasm_drop_pdu_cntr; ///< PDU dropped in reassembly
+} erlcdl_rb_stats;
+
+/// ERLC-UL RB statistics
+typedef struct
+{
+ /* PDU statistics */
+ kal_uint32 reseg_cntr;
+
+ /* ARQ */
+ kal_uint32 stus_pdu_expry_cntr;
+ kal_uint32 reseg_stus_pdu_cntr;
+
+} erlcul_rb_stats;
+
+/// ERLC-UL statistics
+/*
+typedef struct
+{
+
+} erlcul_comp_stats;
+*/
+
+/// ERLC-DL statisitics
+typedef struct
+{
+ erlcdl_reasm_tbl_stats reasm_tbl[EM_MAX_NUM_REASM_TBL];
+} erlcdl_comp_stats;
+
+// ERLC statistics
+typedef struct
+{
+ //erlcul_comp_stats ul;
+ erlcdl_comp_stats dl;
+
+ erlcul_rb_stats ul_rb[MAX_RLC_RB];
+ erlcdl_rb_stats dl_rb[MAX_RLC_RB];
+#if 1 /* for MBMS_SUPPORT */
+ erlcdl_rb_stats dl_mcch[MAX_EMBMS_FREQ_SUPPORT][MAX_EMBMS_MCCH_SUPPORT];
+ erlcdl_rb_stats dl_mrb[MAX_EMBMS_FREQ_SUPPORT][MAX_EMBMS_MRB_SUPPORT];
+#endif
+} erlc_stats_struct;
+
+#endif
diff --git a/mcu/protocol/interface/el2/emac_api.h b/mcu/protocol/interface/el2/emac_api.h
new file mode 100644
index 0000000..77ffa06
--- /dev/null
+++ b/mcu/protocol/interface/el2/emac_api.h
@@ -0,0 +1,536 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * emac_api.h
+ *
+ * Project:
+ * --------
+ * UMOLY
+ *
+ * Description:
+ * ------------
+ *
+ *
+ * Author:
+ * -------
+ *
+ *
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 05 25 2018 jia-shi.lin
+ * [MOLY00328472] [EIGER][MT3967][RDIT][FT][CT][Overnight][Auto][CAT][SH][SIM1:CT][SIM2:CU]md1:(MCU_core1.vpe0.tc0(VPE2)) [ASSERT] file:mcu/protocol/el2/ert/emac/src/emac_ert.c line:1383
+ * 1. rename emac_txhisr_proc as emac_tti_done_proc
+ * 2. emac_tti_done_proc move to txlisr for 95
+ *
+ * 01 11 2018 jia-shi.lin
+ * [MOLY00301451] [SMO release][93/95]EL1 relative interface
+ * emac/el1 interface re-arch
+ *
+ * 07 12 2017 jia-shi.lin
+ * [MOLY00263796] [Gen93] EL1C always ticks PCSI during DRX off period which locks sleep mode
+ * add emac api emac_slp_cqi_srs_predict_result_rxlisr
+ *
+ * 07 11 2017 jia-shi.lin
+ * [MOLY00263426] [Bianco][N1][SRLTE][CT 6M C][LTE IOT][FT][CD][HW][TC-SMFT-07005]EE md1:(MCU_core0.vpe1.tc1(VPE1)) [ASSERT] file:mcu/pcore/modem/el2/common/el2_utility.c line:509
+ * relax the 1ms timing protection for ert sf proc
+ *
+ * 06 22 2017 nicole.hsu
+ * [MOLY00259119] [MT6763][EL2] EMAC/EL2EM/EL2POW maintenance
+ * [TRUNK] potential bug fix, RSIM EM, AT&T EM
+ *
+ * 06 09 2017 jia-shi.lin
+ * [MOLY00254140] [MT6293][EL1C] Reduce processing in RRC idle
+ * check in emac_txlisr_mt_chk_stage3()
+ *
+ * 06 09 2017 mf.jhang
+ * [MOLY00254140] [MT6293][EL1C] Reduce processing in RRC idle
+ * .Provide is emac_txlisr_active for EL1
+ *
+ * 05 19 2017 jia-shi.lin
+ * [MOLY00249306] [SE2 Internal Test][MT6293][UMOLYA][ATE][20170512][1][core0,vpe1,tc2(vpe1)] Assert fail emac_drx.c 811 - (LISR)EL1_C_TX
+ * 1. drx bug fix
+ * 2. mid ind to ert
+ * 3. dl wo pdsch ind
+ *
+ * 05 19 2017 nicole.hsu
+ * [MOLY00250929] [Copy CR][BIANCO][MT6763][RDIT][PHONE][Overnight][HQ][MTBF][Lab][Ericsson][ASSERT] file:mcu/l1core/modem/el1/el1c/phs/src/el1_phs_msg.c line:2429
+ * SCell new interface/design
+ *
+ * 04 18 2017 mf.jhang
+ * [MOLY00241929] [BIANCO][MT6763][RDIT][4GPS][RTD][HEAT][LTE_04_13_02_R12_UL64QUAM_2_UL64QAMonBothCCs_Type0]Assert fail: el1_meas_ctrl.c 11916 - EL1_MPC
+ * . Add EL1C command queue
+ *
+ * 04 05 2017 jia-shi.lin
+ * [MOLY00237731] [MT6293][L+L] Feature development
+ * [EMAC] Update EL1TX EMAC interface (EMAC part).
+ *
+ * 03 02 2017 jia-shi.lin
+ * [MOLY00194987] [MT6293][UMOLYA/PS DEV] EMAC maintenance
+ * remove emac_force_phy_config_sch_close
+ *
+ * 01 19 2017 mf.jhang
+ * [MOLY00194987] [MT6293][UMOLYA/PS DEV] EMAC maintenance
+ * Split emac txlisr process into 3 stages for load balance
+ *
+ * 12 21 2016 nicole.hsu
+ * [MOLY00194987] [MT6293][UMOLYA/PS DEV] EMAC maintenance
+ * [Seamless Meta Mode] EMAC part
+ * - provide dummy API to be called in Meta Mode
+ * - provide force sch_close API to be called before leaving Meta Mode
+ *
+ * 10 18 2016 jia-shi.lin
+ * [MOLY00194987] [MT6293][UMOLYA/PS DEV] EMAC maintenance
+ * add one phich result type
+ *
+ * 10 05 2016 mf.jhang
+ * [MOLY00206476] [MT6293][NWSIM][Regression][TC_7_1_4_16] Failed at step 6
+ * add emac_ta_stag_ta_diff_exceeded
+ *
+ * 10 03 2016 nicole.hsu
+ * [MOLY00194987] [MT6293][UMOLYA/PS DEV] EMAC maintenance
+ * 1. RAR grant size check and handling
+ * 2. fix PHR api for ra group selection
+ *
+ * 08 11 2016 yu-chun.chen
+ * [MOLY00176078] [EL1C] UMOLYA code sync
+ * Back out changelist 2711251
+ *
+ * 08 11 2016 nicole.hsu
+ * [MOLY00194987] [MT6293][UMOLYA/PS DEV] EMAC maintenance
+ * 1. fix sim api warning
+ * 2. fix sim api prototype
+ * 3. provide rar_acsi_trigger assert function for el1tx
+ *
+ * 08 10 2016 shang-lun.chiu
+ * [MOLY00196539] [MT6293][EL1TX] Update comments to generate doxygen document
+ *
+ * 08 02 2016 wen-jiunn.liu
+ * [MOLY00194298] [UMOLYA] EL2 + EMAC Code Review
+ * Revise EL1-EMAC Interface
+ * - CRC Handler
+ * - DL Assignment
+ *
+ * 08 02 2016 nicole.hsu
+ * [MOLY00194987] [MT6293][PS DEV] EMAC maintenance
+ * [EMAC] ra api fix
+ *
+ * 08 01 2016 jeremy.chen
+ * [MOLY00190683] [UMOLYA][6293] EL2 merge back to UMOLYA TRUNK & PS DEV
+ *
+ * [EL2][RD domain] Sync EL2 interface from Aric CBr
+ *
+ ****************************************************************************/
+/**
+ * @file emac_api.h
+ * @brief EMAC Exported APIs to Other Libraries
+ *
+ * @author
+ * @date 2016/2/22
+ *
+ **/
+
+#ifndef __EMAC_API_H__
+#define __EMAC_API_H__
+
+#include "kal_public_api.h"
+#include "lte_time_common.h"
+#include "abs_time.h"
+#include "el1_emac_str.h"
+
+// =========================================
+// TTI Execution Process
+// =========================================
+
+/***************************************//**
+ * @brief Initialize the EMAC context before each TTI process
+ * @note Get air time from global variables / reset EMAC TTI related context
+ * @param protocol_idx
+ * @return (void)
+ ******************************************/
+void
+emac_txlisr_init_tti_proc(kal_uint32 protocol_idx);
+
+void
+emac_txlisr_proc_stage1();
+
+/***************************************//**
+ * @brief Main process for EMAC \n
+ * E.g., SCELL / TA / DL HARQ / UL HARQ / BSR / SR / RA / DRX
+ * @note Execution after all handler inputs are ready
+ * @param[in] p_sf_input Tx subframe parameter for EMAC, including information of
+ * - gap
+ * - subframe type
+ * .
+ * @return (void)
+ ******************************************/
+void
+emac_txlisr_proc_stage2(
+ emac_el1tx_tti_input_t* p_sf_input
+);
+
+void
+emac_txlisr_proc_stage3();
+
+kal_bool
+emac_txlisr_mt_chk_stage3();
+
+/***************************************//**
+ * @brief Invoke this function \@ g_abs_time to check if any
+ * EMAC handled TX requirement for tx_abs_time (g_abs_time +2)
+ * @note Called by EL1TX to query EMAC if there is any tx requirement \n
+ * One TXLISR / one TX requirement invoked (1-to-1 mapping) \n
+ * EL1 could NOT modify tx_bmp in the pointer
+ * @param (void)
+ * @return emac_el1tx_tx_req_struct* Pointer to TX request of this TTI
+ * in EMAC context \n
+ * The returned EMAC context will be cleared
+ * \@ emac_txlisr_init_tti_proc()
+ ******************************************/
+emac_el1tx_tx_req_struct*
+emac_txlisr_get_tx_req();
+
+/***************************************//**
+ * @brief Post process for EMAC \n
+ * E.g., MUX Decision / Clear UL HARQ Context / Clear TX Timeline / ...
+ * @note Execution after all handler inputs are ready
+ * @param[in] tx_results Bitmap of emac_el1tx_tx_bitmap_e
+ * @return (void)
+ ******************************************/
+void
+emac_txlisr_post_proc(
+ kal_uint32 tx_results
+);
+
+/***************************************//**
+ * @brief EMAC process in TXHISR for 93 (e.g., send ERT polling ILM)
+ * EMAC process in TXLISR for 95 (e.g., send ERT polling ILM)
+ * @note Called only in TXHISR for 93, called only in TXLISR for 95
+ * @param (void)
+ * @return (void)
+ ******************************************/
+void
+emac_tti_done_proc();
+
+// =========================================
+// TTI Input Handler Related APIs
+// =========================================
+
+/***************************************//**
+ * @brief Report n-2 or n-1 (i.e., g_abs_time -2 or -1) DCI result for DL HARQ \n
+ * Support only
+ * - C-RNTI
+ * - TC-RNTI
+ * - RA-RNTI
+ * - SPS-CRNTI (Act/Retx/Rel)
+ * .
+ * @note This function is used to update EMAC DL HARQ status \n
+ * DL unsolicited is NOT included (EMAC will calculate DL SPS) \n
+ * Indicate TB "new transmission" or not (instead of raw NDI value)
+ * @param[in] rcv_abs_time g_abs_time -1 or -2
+ * @param[in] p_pdcch_dl_info DL information carried in PDCCH
+ * @return (void)
+ ******************************************/
+void
+emac_pdcch_dl_assign_handler(
+ ABS_TICK_TIME rcv_abs_time,
+ el1tx_pdcch_dl_info_struct* p_pdcch_dl_info
+);
+
+/***************************************//**
+ * @brief Report n-2 or n-1 (i.e., g_abs_time -2 or -1) DCI result for UL HARQ \n
+ * Support only
+ * - C-RNTI
+ * - TC-RNTI
+ * - RA-RNTI
+ * - SPS-CRNTI (Act/Retx/Rel)
+ * .
+ * @note This function is used to update EMAC UL HARQ status \n
+ * UL unsolicited is NOT included (EMAC will calculate UL SPS)
+ * @param[in] ul_cc_idx UL CC index
+ * @param[in] rcv_abs_time g_abs_time -1 or -2
+ * @param[in] p_pdcch_ul_info UL information carried in PDCCH
+ * @return (void)
+ ******************************************/
+void
+emac_pdcch_ul_info_handler(
+ kal_uint8 ul_cc_idx,
+ ABS_TICK_TIME rcv_abs_time,
+ el1tx_pdcch_ul_info_struct* p_pdcch_ul_info
+);
+
+/***************************************//**
+ * @brief Report n-2 or n-1 (i.e., g_abs_time -2 or -1) PHICH result for UL HARQ
+ * @note This function is used to update EMAC UL HARQ status
+ * @param[in] ul_cc_idx UL CC index
+ * @param[in] harq_id HARQ ID
+ * @param[in] el1tx_phich_rlt_enum PHICH result
+ * @return (void)
+ ******************************************/
+void
+emac_pdcch_set_phich_result_handler(
+ kal_uint8 ul_cc_idx,
+ ABS_TICK_TIME rcv_abs_time,
+ kal_uint8 harq_id,
+ el1tx_phich_rlt_enum phich_result
+);
+
+/***************************************//**
+ * @brief - [TBC] Report n-3 or n-2 (i.e., g_abs_time -3 or -2)
+ * with each TB CRC decoding result
+ * - [TBC] Invoked after DL Assignment Handler\n
+ * With assumption of ignorance DCI for same TB within 4 subframes
+ * - [TBC] DCI v.s. CRC report is 1-to-1 mapping
+ * - Report only
+ * -- C-RNTI
+ * -- TC-RNTI
+ * -- SPS-CRNTI (Act/Retx/Config)
+ * .
+ * .
+ * @note TB information is with bitwise operation (BIT0 for TB0 : BIT1 for TB1)
+ * @param[in] p_crc_result CRC result information
+ * @return (void)
+ ******************************************/
+void
+emac_pdcch_set_crc_result_handler(
+ el1tx_pdcch_crc_result_struct* p_crc_result
+);
+
+/***************************************//**
+ * @brief Report n-2 or n-1 (i.e., g_abs_time -2 or -1) PDCCH order for RA
+ * @note If PDCCH order is received, call function to trigger PDCCH order RA process
+ * @param[in] rcv_abs_time g_abs_time -1 or -2
+ * @param[in] ul_cc_idx UL CC index
+ * @param[in] rapid RA preamble ID
+ * @param[in] mask RA mask index
+ * @return (void)
+ ******************************************/
+void
+emac_ra_pdcch_order_rcv(
+ ABS_TICK_TIME rcv_time,
+ kal_uint8 ul_cc_idx,
+ kal_uint8 rapid,
+ kal_uint8 mask
+);
+
+
+// =========================================
+// SPS Related APIs
+// =========================================
+
+/***************************************//**
+ * @brief Get UL SPS Active State in EMAC context
+ * @note This function is used to check current UL SPS state in
+ * EMAC context \@ TXLISR \n
+ * May be called in different threads, not TXLISR \n
+ * Caller should take care of multi-thread effects
+ * @param (void)
+ * @return KAL_TRUE: UL SPS is active \n
+ * KAL_FALSE: UL SPS is not active
+ ******************************************/
+kal_bool
+emac_sps_ul_get_active_state();
+
+
+// =========================================
+// UL HARQ Related APIs
+// =========================================
+
+/***************************************//**
+ * @brief Check if any UL HARQ for an UL CC is on-going
+ * @note This function is used to check PUSCH UL HARQ status \n
+ * Caller should take care of multi-thread effects \n
+ * @param[in] ul_cc_idx UL CC index
+ * @return KAL_TRUE: one or more UL HARQ are on-going \n
+ * KAL_FALSE: no UL HARQ is on-going
+ ******************************************/
+kal_bool
+emac_ul_harq_is_any_on_going(kal_uint8 ul_cc_idx);
+
+/***************************************//**
+ * @brief Predict if the grant is applied for TX based on
+ * the current UL HARQ view (Best Effort)
+ * @note This function is used to predict if the grant can be applied for TX
+ * based on the current EMAC UL HARQ view (Best Effort) \n
+ * Caller should take care of multi-thread effects \n
+ * May be called in TXLISR and RXLISR,
+ * EL1 should guarantees no simultaneous execution (no lock needed) for
+ * the same tx_abs_time
+ * @param[in] ul_cc_idx UL CC index
+ * @param[in] p_predict_req Grant to be predicted
+ * @return KAL_TRUE: grant is predicted as applied for TX in the
+ * current EMAC UL HARQ view \n
+ * KAL_FALSE: grant is predicted as NOT applied for TX in the
+ * current EMAC UL HARQ view
+ ******************************************/
+kal_bool
+emac_ul_harq_predict_grant_apply(
+ kal_uint8 ul_cc_idx,
+ el1tx_grant_apply_predict_req_struct* p_predict_req
+);
+
+/***************************************//**
+ * @brief emac_el1_txtimeline_extension_t should be defined by EL1 \n
+ * Return the EL1 extension memory (e.g., for implementing CQI only)
+ * @note Caller should take care of multi-thread effects \n
+ * EL1 extension will be cleared when TX timeline entry is cleared
+ * (\@ EMAC TXLISR post process)
+ * @param[in] ul_cc_idx UL CC index
+ * @param[in] tx_abs_time The time to refer to the timeline enrty
+ * @return Start address of EL1 extension
+ ******************************************/
+emac_el1_txtimeline_extension_t*
+emac_ul_harq_get_timeline_el1_extension(
+ kal_uint8 ul_cc_idx,
+ ABS_TICK_TIME tx_abs_time
+);
+
+
+// =========================================
+// DRX Related APIs
+// =========================================
+
+/***************************************//**
+ * @brief When EL1TX has a periodic CQI transmission on PUCCH,
+ * EL1TX needs to
+ * call this function no later than <b>cqi_tx_time - 5</b>
+ * (EL1TX does NOT support now).
+ * The reason is that EMAC needs to calculate the admission for
+ * this CQI TX
+ * @note Caller should take care of multi-thread effects \n
+ * Currently, EL1TX need not call this API since EMAC will
+ * calculate the admission for CQI TX for every TTI \n
+ * When EL1TX can support the call of this function no later
+ * than <b>cqi_tx_time -5</b>, EMAC will only calculate the admission
+ * for CQI TX in <b>cqi_tx_time</b> to save the MIPS
+ * @param[in] cqi_tx_time CQI TX time
+ * @return (void)
+ ******************************************/
+void emac_drx_set_cqi_tx_time(ABS_TICK_TIME cqi_tx_time);
+
+/***************************************//**
+ * @brief When EL1TX has a type0 SRS transmission, EL1TX needs to
+ * call this function no later than <b>type0_srs_tx_time - 5</b>.
+ * The reason is that EMAC needs to calculate the admission for this SRS TX
+ * @note Caller should take care of multi-thread effects \n
+ * Currently, EL1TX need not call this API since EMAC will
+ * calculate the admission for type0 SRS TX for every TTI \n
+ * When EL1TX can support the call of this function no later
+ * than <b>type0_srs_tx_time -5</b>, EMAC will only calculate the admission
+ * for type0 SRS TX in <b>type0_srs_tx_time</b> to save the MIPS
+ * @param[in] type0_srs_tx_time type0 SRS TX time
+ * @return (void)
+ ******************************************/
+void emac_drx_set_type0_srs_tx_time(ABS_TICK_TIME type0_srs_tx_time);
+
+/***************************************//**
+ * @brief EMAC will return the TX admission of cqi and type0 srs
+ * for tx_abs_time
+ * @note emac_drx_set_cqi_tx_time or emac_drx_set_type0_srs_tx_time should be called
+ * before emac_drx_cqi_srs_admin is called \n
+ * Caller should take care of multi-thread effects \n
+ * The timing for calling this API is expected to be after the EMAC TTI
+ * process of <b>tx_abs_time -2</b>
+ * @param[in] tx_abs_time periodic CQI and type0 SRS time
+ * @param[out] p_cqi_srs_admin_info admission information of periodic CQI and type0 SRS
+ * @return (void)
+ ******************************************/
+void emac_drx_cqi_srs_admin(ABS_TICK_TIME tx_abs_time,
+ emac_el1tx_drx_cqi_srs_admin_info_struct * p_cqi_srs_admin_info);
+
+
+/***************************************//**
+ * @brief DL without PDSCH occurs
+ * @note when DL without PDSCH occurs, call this api
+ * @param[in] rcv_abs_time the rcv_abs_time for this DL
+ * @return (void)
+ ******************************************/
+void emac_drx_dl_wo_pdsch_handler(ABS_TICK_TIME rcv_abs_time);
+
+
+
+// =========================================
+// SLEEP Related APIs
+// =========================================
+
+kal_bool emac_slp_is_prev1_dci_info_required(void);
+kal_bool emac_slp_cqi_srs_predict_result_rxlisr(ABS_TICK_TIME tx_abs_time);
+
+// =========================================
+// RA Related APIs
+// =========================================
+
+kal_bool emac_ra_is_rar_grant_valid(el1tx_pdcch_ul_info_struct* p_grant);
+void emac_ra_set_max_txpower_reached();
+void emac_ra_rar_acsi_trigger_fail();
+void emac_ra_tcrnti_ack_add_fail();
+void emac_ra_set_last_prach_tx_power(kal_uint16 prach_tx_power);
+
+// =========================================
+// PHR Related APIs
+// =========================================
+
+kal_bool emac_el1_phr_res_handler(emac_el1tx_phr_res_struct phr_content);
+
+// =========================================
+// TA Related APIs
+// =========================================
+void emac_ta_stag_ta_diff_exceeded(kal_uint32 stag_id);
+
+// =========================================
+// SCELL Related APIs
+// =========================================
+void emac_scell_el1c_cnf();
+void emac_scell_rel(kal_uint32 cc_idx);
+
+kal_bool emac_txlisr_active(ABS_TICK_TIME cur_abs_time);
+kal_bool emac_txlisr_tx_checksum_error_bypass_check(ABS_TICK_TIME tx_abs_time);
+
+// =========================================
+// META_MODE Related APIs
+// =========================================
+void emac_dummy_txlisr_init_tti_proc(kal_uint32 protocol_idx);
+void emac_dummy_txlisr_post_proc(kal_uint32 tx_results);
+void emac_dummy_txlisr_proc(emac_el1tx_tti_input_t* p_sf_input);
+void emac_dummy_tti_done_proc();
+void emac_dummy_txlisr_proc_stage1();
+void emac_dummy_txlisr_proc_stage3();
+
+
+#endif
diff --git a/mcu/protocol/interface/el2/emacmch_rxlisr_interface.h b/mcu/protocol/interface/el2/emacmch_rxlisr_interface.h
new file mode 100644
index 0000000..d242a3c
--- /dev/null
+++ b/mcu/protocol/interface/el2/emacmch_rxlisr_interface.h
@@ -0,0 +1,171 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * emacmch_rxlisr_interface.h
+ *
+ * Project:
+ * --------
+ * UMOLY
+ *
+ * Description:
+ * ------------
+ * Declare the structures/enum/functions(api)/global variables that are
+ * shared with or called by RX LISR.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 03 31 2017 eddie.wang
+ * [MOLY00236421] [MT6293][UMOLYA][TRUNK]
+ * [EMACMCH][L+L] Add pidx for RXLISR query next mch interface
+ *
+ * 12 12 2016 eddie.wang
+ * [MOLY00210650] [MT6293][UMOLYA TRUNK] EMAC maintenance
+ * [EMUX][EMACMCH] Introduce debug mode
+ *
+ * 09 23 2016 eddie.wang
+ * [MOLY00194987] [MT6293][UMOLYA/PS DEV] EMAC maintenance
+ * Sync PS.DEV to TRUNK up to CL2868873
+ *
+ * 09 20 2016 eddie.wang
+ * [MOLY00197177] Code maintenance on UMOLYA.PS.DEV
+ * EMUX and EMACMCH code/trace maintenance
+ *
+ * 07 27 2016 jeremy.chen
+ * [MOLY00190683] [UMOLYA][6293] EL2 merge back to UMOLYA TRUNK & PS DEV
+ * [EL2][RD domain] Sync latest EL2 from LTE domain
+ *
+ ****************************************************************************/
+/**
+ * @file emacmch_rxlisr_interface.h
+ * @brief Declare the structures/enum/functions(api)/global variables that are
+ * shared with or called by RX LISR
+ * @author mtk04120
+ * @date 2016/2/22
+ *
+ **/
+#ifndef EMACMCH_RXLISR_INTERFACE_H
+#define EMACMCH_RXLISR_INTERFACE_H
+
+#include "kal_public_api.h"
+
+#include "el1_enum.h"
+
+/*---------------------------------------------------------------------------
+ * DEFINITION
+ *---------------------------------------------------------------------------*/
+/* Configurable */
+
+/* User-defined */
+
+/* Constant */
+
+/*---------------------------------------------------------------------------
+ * ENUM
+ *---------------------------------------------------------------------------*/
+
+
+/*---------------------------------------------------------------------------
+ * STRUCTURE
+ *---------------------------------------------------------------------------*/
+/*---------------------------------------------------------------------------
+ * STRUCTURE
+ *---------------------------------------------------------------------------*/
+/*------------------
+ * Structure Level 3
+ *------------------*/
+
+/*------------------
+ * Structure Level 2
+ *------------------*/
+
+/*------------------
+ * Structure Level 1
+ *------------------*/
+typedef struct{
+
+ kal_uint32 tid;
+ kal_bool b_valid;
+
+ kal_uint8 syncarea_id;
+ kal_uint8 area_id; //0-255
+ kal_uint8 pmch_id; //pmch_ie_idx
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+ kal_uint8 non_mbsfn_region_len;
+
+ kal_bool is_mch_reliable; // True when MCCH, MSI, UE-interested MTCH in MSI
+
+ kal_bool is_signal_mcs;
+ kal_bool is_higher_order_mcs; // FALSE if signalMCS
+ kal_uint8 mcs;
+
+ el1_embms_gemini_priority_enum gemini_priority;
+
+ kal_uint32 sf_no;
+ kal_uint64 abs_time;
+
+}emacmch_rxlisr_sched_mch_t;
+/*---------------------------------------------------------------------------
+ * Extern global variable declarations
+ *---------------------------------------------------------------------------*/
+
+/*---------------------------------------------------------------------------
+ * public methods prototype for RX LISR
+ *---------------------------------------------------------------------------*/
+
+void
+emacmch_rxlisr_query_next_sched_mch(kal_uint64 _abs_time, //IN
+ kal_uint8 _syncarea_id, //IN
+ emacmch_rxlisr_sched_mch_t* _next_sched, //OUT
+ kal_uint32 _pidx); //IN
+
+
+#endif
diff --git a/mcu/protocol/interface/el2/errc_emac_msg.h b/mcu/protocol/interface/el2/errc_emac_msg.h
new file mode 100644
index 0000000..060645b
--- /dev/null
+++ b/mcu/protocol/interface/el2/errc_emac_msg.h
@@ -0,0 +1,922 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * errc_emac_msg.h
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * Define ERRC EMAC interface enums, structures and constants
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 11 01 2018 sc.tung
+ * [MOLY00361478] [Gen97] Gemini Compile Option Clean Up
+ *
+ * [el2][emac] Gemini compiler option clean up.
+ *
+ * 07 31 2018 guang-yu.zheng
+ * [MOLY00342112] [MT6295] ERRC-EMAC interface extend for RA/TA configuration (UL2CC->3CC)
+ * Add back legacy interface for xl1sim flow
+ *
+ * 07 27 2018 guang-yu.zheng
+ * [MOLY00342112] [MT6295] ERRC-EMAC interface extend for RA/TA configuration (UL2CC->3CC)
+ * RA/TA interface extenstion for 3CC
+ *
+ * 06 14 2018 tina-yt.wang
+ * [MOLY00333176] [ICD] stage1+stage2 ICD UMOLYE CBr patch back to LR13.R0
+ * [EL2ICD] EMAC ERT related part
+ *
+ * 06 11 2018 jia-shi.lin
+ * [MOLY00319373] [MT6295] recommended bit rate feature
+ * recommended bit rate feature: txlisr and emac design
+ *
+ * 06 05 2018 guang-yu.zheng
+ * [MOLY00331352] [MT6295] EL2 MML2 DVFS control development
+ * Add CAT16 support for MML2 DVFS Control
+ *
+ * 04 11 2018 jia-shi.lin
+ * [MOLY00319373] [MT6295] recommended bit rate feature
+ * recommended bit rate feature: errc-emac interface
+ *
+ * 04 10 2018 nicole.hsu
+ * [MOLY00314955] [Gen 95][ERRC][RCM] MP1 capability config
+ * [UMOLYE TRUNK] add RBR_enable to ERRC-EMAC interface
+ *
+ * 03 19 2018 guang-yu.zheng
+ * [MOLY00313850] [MT6295] MML2 DVFS control feature development
+ * MML2 DVFS control and MCU DVFS re-org
+ *
+ * 02 26 2018 wen-jiunn.liu
+ * [MOLY00279230] [93/95 re-arch] Gen95 Development
+ * [EMAC][ERRC] Interface for PUSCH Enhancement Mode
+ *
+ * 01 11 2018 jia-shi.lin
+ * [MOLY00301451] [SMO release][93/95]EL1 relative interface
+ * emac/el1 interface re-arch
+ *
+ * 09 20 2017 nicole.hsu
+ * [MOLY00279184] [PCT][Anritsu][CAG50C][E40][7.1.1.2] fail
+ * [TRUNK] LCID vs. support release handling
+ *
+ * 08 16 2017 guang-yu.zheng
+ * [MOLY00271123] [MT6293][EMAC] SRLTE-enhance feature code sync
+ * Add EMAC interface for SRLTE enhancement handling
+ *
+ * 01 25 2017 eddie.wang
+ * [MOLY00210650] [MT6293][UMOLYA TRUNK] EMAC maintenance
+ * [MSIM][RSIM] Add emac config req cause for remote sim scenario
+ *
+ * 12 26 2016 mf.jhang
+ * [MOLY00194987] [MT6293][UMOLYA/PS DEV] EMAC maintenance
+ * update errc_emac_ca_activate_ind_struct
+ *
+ * 11 08 2016 mf.jhang
+ * [MOLY00194987] [MT6293][UMOLYA/PS DEV] EMAC maintenance
+ * Update errc_emac_ca_activate_ind_struct
+ *
+ * 10 06 2016 eddie.wang
+ * [MOLY00206522] [MT6293][NWSIM][Regression][TC_7_1_4_18] Test failed
+ * TRUNK:Remove redundant config like extendedBSR and MBMS in emac_config_req
+ *
+ * 09 13 2016 nicole.hsu
+ * [MOLY00194987] [MT6293][UMOLYA/PS DEV] EMAC maintenance
+ * [xL1Sim] remove errc_emac_config old field - tti_bundling_flag
+ *
+ * 03 16 2016 yk.liu
+ * [MOLY00165181] Syn EMAC from LR11 TO UMOLY for CL1990358
+ * .
+ *
+ * 03 15 2016 ryan.ou
+ * [MOLY00162291] [MT6292] EMAC code sync from LR11 to UMOLY
+ * CL1867764, [MOLY00151000] [MT6755] SRVCC Enhancement.
+ *
+ * 01 11 2016 ville.pukari
+ * [MOLY00156411] [MT6292] Logical Channel SR prohibit timer: New feature
+ *
+ * 10 16 2015 panu.peisa
+ * [MOLY00145084] DE6 code merge from UMOLY_92dev CBr to UMOLY trunk
+ * Integrated LTE_SEC changes from UMOLY_92dev ( errc part ).
+ *
+ * 10 06 2015 esko.oikarinen
+ * ERRC changes for multiple TA
+ *
+ * 09 10 2015 chun-fan.tsai
+ * [MOLY00098400] [6291] eRRC CONN EM
+ * Add CCCH Data Req cause for EMAC EM
+ *
+ * 03 18 2015 chen-wei.wang
+ * [MOLY00099525] [TK6291] EMAC MDT feature check-in
+ * interface file check-in
+ *
+ * 12 03 2014 sh.yang
+ * [MOLY00084081] [UMOLY] Trunk merge back
+ * .Add carrier index in si_ind_struct
+ *
+ * 11 11 2014 yiting.cheng
+ * [MOLY00084042] [UMOLY] merge UMOLY_DEV to UMOLY trunk
+ * .
+ *
+ * 10 08 2014 henry.lai
+ * [MOLY00079071] [MT6291][U4G] Low Power Modification for CEL Paging
+ * .
+ *
+ * 09 19 2014 chi-chung.lin
+ * [MOLY00073836] [MT6291][ERRC][CHM] LTE-A CHM development code check-in
+ * [CHM] MBMS interface check in
+ *
+ * 07 28 2014 yiting.cheng
+ * [MOLY00073830] [MT6291_DEV] check-in MT6291 modification
+ * Check-in EMAC-ERRC interface
+ *
+ * 08 06 2013 stanleyhy.chen
+ * [MOLY00032633] 4G Nbr Cell Info
+ * 4G Nbr Cell Info in LTE Domain
+ *
+ * 07 22 2013 stanleyhy.chen
+ * [MOLY00029602] [New Feature] NBR_CELL_INFO and TA_INFO related interfaces
+ * Add ERRC_EMAC_TA_INFO_INVALID_IND
+ *
+ * 07 12 2013 stanleyhy.chen
+ * [MOLY00029602] [New Feature] NBR_CELL_INFO and TA_INFO related interfaces
+ * TA_INFO and NBR_CELL_INFO interfaces for LPP feature
+ ****************************************************************************/
+
+#ifndef ERRC_EMAC_MSG_H
+#define ERRC_EMAC_MSG_H
+
+
+#include "kal_public_api.h"
+#include "el2_sap_common.h"
+#include "qmu_bm.h"
+#include "lte_time_common.h"
+#include "common_def.h"
+
+#if !defined(__XL1SIM_EL1__) && defined(__LTE_L1SIM__)
+#define __XL1SIM_EL1__
+#endif
+////////////////////////////////////////////////////////////////
+// MAC configuration request
+////////////////////////////////////////////////////////////////
+
+//mac config request info bitmap
+#define EMAC_CONFIG_INFO_RA_MASK 0x01
+#define EMAC_CONFIG_INFO_SCHED_MASK 0x02
+#define EMAC_CONFIG_INFO_DRX_MASK 0x04
+#define EMAC_CONFIG_INFO_PHR_MASK 0x08
+#define EMAC_CONFIG_INFO_CRNTI_MASK 0x10
+
+#define ERRC_EMAC_CCCH_SZ (6)
+
+//max number of RB
+#define ERRC_EMAC_MAX_RB_NB (10)
+
+//max number of STAG/SCell
+#if(CUR_GEN >= MD_GEN95)
+#define ERRC_EMAC_MAX_STAG_NB (1)
+#define ERRC_EMAC_MAX_SCELL_NB (3)
+#else
+#define ERRC_EMAC_MAX_STAG_NB (1)
+#define ERRC_EMAC_MAX_SCELL_NB (1)
+#endif
+
+
+
+typedef enum
+{
+ ERRC_EMAC_CONFIG_CAUSE_NON_HO = 0,
+ ERRC_EMAC_CONFIG_CAUSE_HO = 1,
+ ERRC_EMAC_CONFIG_CAUSE_RESET = 2,
+//#if defined(__REMOTE_SIM__)
+#if defined(__GEMINI__)
+ ERRC_EMAC_CONFIG_CAUSE_RESET_VIRTUAL_CONNECTED_ENTER = 3,
+ ERRC_EMAC_CONFIG_CAUSE_VIRTUAL_CONNECTED_LEAVE_PREPARE = 4,
+ ERRC_EMAC_CONFIG_CAUSE_VIRTUAL_CONNECTED_LEAVE = 5,
+ ERRC_EMAC_CONFIG_CAUSE_RESET_VIRTUAL_CONNECTED_LEAVE_FAIL = 6,
+//#if defined(__SRLTE_ENHANCE__)
+#if defined(__GEMINI__)
+ //The design for SRLTE enhancement will be the same as RSIM, but we still seperate the cause
+ ERRC_EMAC_CONFIG_CAUSE_RESET_VIRTUAL_CONNECTED_ENTER_FOR_SRLTE = 7,
+ ERRC_EMAC_CONFIG_CAUSE_VIRTUAL_CONNECTED_LEAVE_PREPARE_FOR_SRLTE = 8,
+ ERRC_EMAC_CONFIG_CAUSE_VIRTUAL_CONNECTED_LEAVE_FOR_SRLTE = 9,
+ ERRC_EMAC_CONFIG_CAUSE_RESET_VIRTUAL_CONNECTED_LEAVE_FAIL_FOR_SRLTE = 10,
+#endif
+#endif
+} errc_emac_config_cause_enum;
+
+//For ICD MAC_RESET_EVENT and MAC_CONFIGURATION_EVENT
+typedef enum
+{
+ ERRC_EMAC_ICD_RESET_CAUSE_OTHERS = 0,
+ ERRC_EMAC_ICD_RESET_CAUSE_RELEASE = 1,
+ ERRC_EMAC_ICD_RESET_CAUSE_HO = 2,
+ ERRC_EMAC_ICD_RESET_CAUSE_RLF = 3,
+ ERRC_EMAC_ICD_CONFIG_CAUSE_NORMAL = 4,
+ ERRC_EMAC_ICD_CONFIG_CAUSE_HO = 5,
+} errc_emac_icd_event_cause_enum;
+
+typedef enum
+{
+ ERRC_EMAC_TA_TIMER_500, ERRC_EMAC_TA_TIMER_750, ERRC_EMAC_TA_TIMER_1280, ERRC_EMAC_TA_TIMER_1920,
+ ERRC_EMAC_TA_TIMER_2560, ERRC_EMAC_TA_TIMER_5120, ERRC_EMAC_TA_TIMER_10240, ERRC_EMAC_TA_TIMER_INF
+} errc_emac_ta_timer_enum;
+
+typedef enum
+{
+ RA_PREAMBLE_NB_4, RA_PREAMBLE_NB_8, RA_PREAMBLE_NB_12, RA_PREAMBLE_NB_16,
+ RA_PREAMBLE_NB_20, RA_PREAMBLE_NB_24, RA_PREAMBLE_NB_28, RA_PREAMBLE_NB_32,
+ RA_PREAMBLE_NB_36, RA_PREAMBLE_NB_40, RA_PREAMBLE_NB_44, RA_PREAMBLE_NB_48,
+ RA_PREAMBLE_NB_52, RA_PREAMBLE_NB_56, RA_PREAMBLE_NB_60,RA_PREAMBLE_NB_64
+} errc_emac_ra_preamble_nb_enum;
+
+typedef enum
+{
+ RA_GROUP_A_SZ_4, RA_GROUP_A_SZ_8, RA_GROUP_A_SZ_12, RA_GROUP_A_SZ_16,
+ RA_GROUP_A_SZ_20, RA_GROUP_A_SZ_24, RA_GROUP_A_SZ_28, RA_GROUP_A_SZ_32,
+ RA_GROUP_A_SZ_36, RA_GROUP_A_SZ_40, RA_GROUP_A_SZ_44, RA_GROUP_A_SZ_48,
+ RA_GROUP_A_SZ_52, RA_GROUP_A_SZ_56, RA_GROUP_A_SZ_60
+} errc_emac_ra_group_a_sz_enum;
+
+typedef enum
+{
+ RA_GROUP_A_MSG_SZ_56, RA_GROUP_A_MSG_SZ_144, RA_GROUP_A_MSG_SZ_208, RA_GROUP_A_MSG_SZ_256
+} errc_emac_ra_msg_sz_group_a_enum;
+
+typedef enum
+{
+ MSG_POW_OFFSET_GROUP_B_MINUS_INF, MSG_POW_OFFSET_GROUP_B_0, MSG_POW_OFFSET_GROUP_B_5,
+ MSG_POW_OFFSET_GROUP_B_8, MSG_POW_OFFSET_GROUP_B_10, MSG_POW_OFFSET_GROUP_B_12,
+ MSG_POW_OFFSET_GROUP_B_15, MSG_POW_OFFSET_GROUP_B_18
+} errc_emac_msg_pow_offset_group_b_enum;
+
+typedef enum
+{
+ RA_POW_RAMPING_0, RA_POW_RAMPING_2, RA_POW_RAMPING_4, RA_POW_RAMPING_6
+} errc_emac_ra_pow_ramping_enum;
+
+typedef enum
+{
+ PREAMBLE_INIT_POW_MINUS120, PREAMBLE_INIT_POW_MINUS118, PREAMBLE_INIT_POW_MINUS116,
+ PREAMBLE_INIT_POW_MINUS114, PREAMBLE_INIT_POW_MINUS112, PREAMBLE_INIT_POW_MINUS110,
+ PREAMBLE_INIT_POW_MINUS108, PREAMBLE_INIT_POW_MINUS106, PREAMBLE_INIT_POW_MINUS104,
+ PREAMBLE_INIT_POW_MINUS102, PREAMBLE_INIT_POW_MINUS100,
+ PREAMBLE_INIT_POW_MINUS98, PREAMBLE_INIT_POW_MINUS96, PREAMBLE_INIT_POW_MINUS94,
+ PREAMBLE_INIT_POW_MINUS92, PREAMBLE_INIT_POW_MINUS90
+} errc_emac_preamble_init_pow_enum;
+
+typedef enum
+{
+ PREAMBLE_TX_MAX_3, PREAMBLE_TX_MAX_4, PREAMBLE_TX_MAX_5, PREAMBLE_TX_MAX_6,
+ PREAMBLE_TX_MAX_7, PREAMBLE_TX_MAX_8, PREAMBLE_TX_MAX_10, PREAMBLE_TX_MAX_20,
+ PREAMBLE_TX_MAX_50, PREAMBLE_TX_MAX_100, PREAMBLE_TX_MAX_200
+} errc_emac_preamble_tx_max_enum;
+
+typedef enum
+{
+ RAR_WND_SZ_2, RAR_WND_SZ_3, RAR_WND_SZ_4, RAR_WND_SZ_5, RAR_WND_SZ_6, RAR_WND_SZ_7,
+ RAR_WND_SZ_8, RAR_WND_SZ_10
+} errc_emac_rar_wnd_sz_enum;
+
+typedef enum
+{
+ CR_TIMER_8, CR_TIMER_16, CR_TIMER_24, CR_TIMER_32, CR_TIMER_40, CR_TIMER_48, CR_TIMER_56, CR_TIMER_64
+} errc_emac_cr_timer_enum;
+
+
+typedef enum
+{
+ MAX_HARQ_TX_1, MAX_HARQ_TX_2, MAX_HARQ_TX_3, MAX_HARQ_TX_4, MAX_HARQ_TX_5, MAX_HARQ_TX_6,
+ MAX_HARQ_TX_7, MAX_HARQ_TX_8, MAX_HARQ_TX_10, MAX_HARQ_TX_12, MAX_HARQ_TX_16, MAX_HARQ_TX_20,
+ MAX_HARQ_TX_24, MAX_HARQ_TX_28
+} errc_emac_max_harq_tx_enum;
+
+typedef enum
+{
+ PERIODIC_BSR_5, PERIODIC_BSR_10, PERIODIC_BSR_16, PERIODIC_BSR_20, PERIODIC_BSR_32,
+ PERIODIC_BSR_40, PERIODIC_BSR_64, PERIODIC_BSR_80, PERIODIC_BSR_128, PERIODIC_BSR_160,
+ PERIODIC_BSR_320, PERIODIC_BSR_640, PERIODIC_BSR_1280, PERIODIC_BSR_2560, PERIODIC_BSR_INF
+} errc_emac_periodic_bsr_timer_enum;
+
+typedef enum
+{
+ RETX_BSR_320, RETX_BSR_640, RETX_BSR_1280, RETX_BSR_2560, RETX_BSR_5120, RETX_BSR_10240
+} errc_emac_retx_bsr_timer_enum;
+
+typedef enum
+{
+ ON_DURATION_PS1, ON_DURATION_PS2, ON_DURATION_PS3, ON_DURATION_PS4, ON_DURATION_PS5, ON_DURATION_PS6,
+ ON_DURATION_PS8, ON_DURATION_PS10, ON_DURATION_PS20, ON_DURATION_PS30, ON_DURATION_PS40,
+ ON_DURATION_PS50, ON_DURATION_PS60, ON_DURATION_PS80, ON_DURATION_PS100, ON_DURATION_PS200,
+ ON_DURATION_PS300, ON_DURATION_PS400, ON_DURATION_PS500, ON_DURATION_PS600,
+ ON_DURATION_PS800, ON_DURATION_PS1000, ON_DURATION_PS1200, ON_DURATION_PS1600
+} errc_emac_on_duration_timer_enum;
+
+typedef enum
+{
+ DRX_INACTIVITY_PS1, DRX_INACTIVITY_PS2, DRX_INACTIVITY_PS3, DRX_INACTIVITY_PS4, DRX_INACTIVITY_PS5,
+ DRX_INACTIVITY_PS6, DRX_INACTIVITY_PS8, DRX_INACTIVITY_PS10, DRX_INACTIVITY_PS20, DRX_INACTIVITY_PS30,
+ DRX_INACTIVITY_PS40, DRX_INACTIVITY_PS50, DRX_INACTIVITY_PS60, DRX_INACTIVITY_PS80, DRX_INACTIVITY_PS100,
+ DRX_INACTIVITY_PS200, DRX_INACTIVITY_PS300, DRX_INACTIVITY_PS500, DRX_INACTIVITY_PS750, DRX_INACTIVITY_PS1280,
+ DRX_INACTIVITY_PS1920, DRX_INACTIVITY_PS2560, DRX_INACTIVITY_PS0
+} errc_emac_drx_inactivity_timer_enum;
+
+typedef enum
+{
+ DRX_RETX_TIMER_PS1, DRX_RETX_TIMER_PS2, DRX_RETX_TIMER_PS4, DRX_RETX_TIMER_PS6, DRX_RETX_TIMER_PS8,
+ DRX_RETX_TIMER_PS16, DRX_RETX_TIMER_PS24, DRX_RETX_TIMER_PS33, DRX_RETX_TIMER_PS0,
+ DRX_RETX_TIMER_PS40, DRX_RETX_TIMER_PS64, DRX_RETX_TIMER_PS80, DRX_RETX_TIMER_PS96,
+ DRX_RETX_TIMER_PS112, DRX_RETX_TIMER_PS128, DRX_RETX_TIMER_PS160, DRX_RETX_TIMER_PS320
+} errc_emac_drx_retx_timer_enum;
+
+typedef enum
+{
+ DRX_UL_RETX_TIMER_PS0, DRX_UL_RETX_TIMER_PS1, DRX_UL_RETX_TIMER_PS2, DRX_UL_RETX_TIMER_PS4, DRX_UL_RETX_TIMER_PS6, DRX_UL_RETX_TIMER_PS8,
+ DRX_UL_RETX_TIMER_PS16, DRX_UL_RETX_TIMER_PS24, DRX_UL_RETX_TIMER_PS33, DRX_UL_RETX_TIMER_PS40, DRX_UL_RETX_TIMER_PS64,
+ DRX_UL_RETX_TIMER_PS80, DRX_UL_RETX_TIMER_PS96, DRX_UL_RETX_TIMER_PS112, DRX_UL_RETX_TIMER_PS128, DRX_UL_RETX_TIMER_PS160, DRX_UL_RETX_TIMER_PS320
+} errc_emac_drx_ul_retx_timer_enum;
+
+typedef enum
+{
+ LONG_DRX_CYCLE_10, LONG_DRX_CYCLE_20, LONG_DRX_CYCLE_32, LONG_DRX_CYCLE_40, LONG_DRX_CYCLE_64,
+ LONG_DRX_CYCLE_80, LONG_DRX_CYCLE_128, LONG_DRX_CYCLE_160, LONG_DRX_CYCLE_256, LONG_DRX_CYCLE_320,
+ LONG_DRX_CYCLE_512, LONG_DRX_CYCLE_640, LONG_DRX_CYCLE_1024, LONG_DRX_CYCLE_1280, LONG_DRX_CYCLE_2048,
+ LONG_DRX_CYCLE_2560, LONG_DRX_CYCLE_60, LONG_DRX_CYCLE_70
+} errc_emac_long_drx_cycle_enum;
+
+typedef enum
+{
+ SHORT_DRX_CYCLE_2, SHORT_DRX_CYCLE_5, SHORT_DRX_CYCLE_8, SHORT_DRX_CYCLE_10, SHORT_DRX_CYCLE_16,
+ SHORT_DRX_CYCLE_20, SHORT_DRX_CYCLE_32, SHORT_DRX_CYCLE_40, SHORT_DRX_CYCLE_64, SHORT_DRX_CYCLE_80,
+ SHORT_DRX_CYCLE_128, SHORT_DRX_CYCLE_160, SHORT_DRX_CYCLE_256, SHORT_DRX_CYCLE_320, SHORT_DRX_CYCLE_512,
+ SHORT_DRX_CYCLE_640, SHORT_DRX_CYCLE_4
+} errc_emac_short_drx_cycle_enum;
+
+
+
+typedef enum
+{
+ PERIODIC_PHR_10, PERIODIC_PHR_20, PERIODIC_PHR_50, PERIODIC_PHR_100,
+ PERIODIC_PHR_200, PERIODIC_PHR_500, PERIODIC_PHR_1000, PERIODIC_PHR_INF
+} errc_emac_periodic_phr_timer_enum;
+
+typedef enum
+{
+ PROHIBIT_PHR_0, PROHIBIT_PHR_10, PROHIBIT_PHR_20, PROHIBIT_PHR_50,
+ PROHIBIT_PHR_100, PROHIBIT_PHR_200, PROHIBIT_PHR_500, PROHIBIT_PHR_1000
+} errc_emac_prohibit_phr_timer_enum;
+
+typedef enum
+{
+ DL_PATHLOSS_CHANGE_1, DL_PATHLOSS_CHANGE_3, DL_PATHLOSS_CHANGE_6, DL_PATHLOSS_CHANGE_INF
+} errc_emac_phr_dl_pathloss_change_enum;
+
+typedef enum
+{
+ BRQ_PROHIBIT_S0, BRQ_PROHIBIT_S0DOT4, BRQ_PROHIBIT_S0DOT8, BRQ_PROHIBIT_S1DOT6,
+ BRQ_PROHIBIT_S3, BRQ_PROHIBIT_S6, BRQ_PROHIBIT_S12, BRQ_PROHIBIT_S30
+} errc_emac_brq_prohibit_timer_enum;
+
+typedef enum
+{
+ ERRC_EMAC_TA_INFO_REQ_TYPE_STOP,
+ ERRC_EMAC_TA_INFO_REQ_TYPE_START
+} errc_emac_ta_info_req_type_enum;
+
+typedef enum
+{
+ EMAC_ERRC_RA_ERROR_ERRC_TRIGGER = 0,
+ EMAC_ERRC_RA_ERROR_NON_ERRC_TRIGGER = 0x01
+} emac_errc_ra_error_cause_enum;
+
+typedef enum
+{
+ EMAC_ERRC_L1_REL_CAUSE_TA = 0,
+ EMAC_ERRC_L1_REL_CAUSE_SR = 0x01,
+} emac_errc_ul_rel_cause_enum;
+
+typedef enum
+{
+ EMAC_ERRC_DRX_INC_GAP_REQ_TYPE_STOP,
+ EMAC_ERRC_DRX_INC_GAP_REQ_TYPE_START
+} errc_emac_drx_inc_gap_req_type_enum;
+
+typedef enum
+{
+ ERRC_EMAC_CCCH_CAUSE_CONN_REQ = 0,
+ ERRC_EMAC_CCCH_CAUSE_REEST_REQ = 0x01
+} errc_emac_ccch_cause_enum;
+
+typedef enum
+{
+ EMAC_SCELL_DEACTIVATION_TIMER_INFINITY, // defalut value
+ EMAC_SCELL_DEACTIVATION_TIMER_RF2,
+ EMAC_SCELL_DEACTIVATION_TIMER_RF4,
+ EMAC_SCELL_DEACTIVATION_TIMER_RF8,
+ EMAC_SCELL_DEACTIVATION_TIMER_RF16,
+ EMAC_SCELL_DEACTIVATION_TIMER_RF32,
+ EMAC_SCELL_DEACTIVATION_TIMER_RF64,
+ EMAC_SCELL_DEACTIVATION_TIMER_RF128
+}emac_scell_deactivation_timer_enum;
+
+typedef enum
+{
+ ERRC_EMAC_TTI_BUNDLING_DISABLED,
+ ERRC_EMAC_TTI_BUNDLING_NORMAL,
+ ERRC_EMAC_TTI_BUNDLING_ENHANCED_FDD
+} errc_emac_tti_bundling_mode_enum;
+
+#if defined(__XL1SIM_EL1__)
+// old struct for XL1Sim test case use
+typedef struct
+{
+ errc_emac_ra_pow_ramping_enum power_ramping_step;
+ errc_emac_preamble_init_pow_enum preamble_init_rec_target_power;
+ errc_emac_preamble_tx_max_enum preamble_trans_max;
+} errc_emac_ul_scell_params_struct;
+#endif
+
+typedef struct
+{
+ kal_uint8 scell_index;
+ errc_emac_ra_pow_ramping_enum power_ramping_step;
+ errc_emac_preamble_init_pow_enum preamble_init_rec_target_power;
+ errc_emac_preamble_tx_max_enum preamble_trans_max;
+} errc_emac_scell_ul_params_struct;
+
+typedef enum
+{
+ ERRC_EMAC_SCELL_NOT_CONFIGURED = 0,
+ ERRC_EMAC_SCELL_ALL_DEACTIVATED = 1,
+ ERRC_EMAC_1_SCELL_ACTIVATED = 2
+}errc_emac_ca_activate_state_enum;
+
+typedef struct
+{
+ errc_emac_ra_preamble_nb_enum ra_preamble_nb_index;
+ errc_emac_ra_pow_ramping_enum ra_pow_ramping_index;
+ errc_emac_preamble_init_pow_enum ra_preamble_init_pow_index;
+ errc_emac_preamble_tx_max_enum ra_preamble_tx_max_index;
+ errc_emac_rar_wnd_sz_enum ra_rar_wnd_sz_index;
+ errc_emac_cr_timer_enum ra_cr_timer_index;
+
+ kal_uint8 ra_msg3_tx_max;
+
+ kal_bool group_a_valid;
+ errc_emac_ra_group_a_sz_enum ra_group_a_sz_index;
+ errc_emac_ra_msg_sz_group_a_enum ra_msg_sz_group_a_index;
+ errc_emac_msg_pow_offset_group_b_enum ra_msg_pow_offset_group_b_index;
+ kal_bool ra_dedicated_valid;
+ kal_uint8 rapid;
+ kal_uint8 prach_mask;
+
+#if defined(__XL1SIM_EL1__)
+ // old struct for XL1Sim test case use
+ errc_emac_ul_scell_params_struct ul_scell_params;
+ kal_bool ul_scell_params_are_valid;
+#else
+ errc_emac_scell_ul_params_struct scell_params[ERRC_EMAC_MAX_SCELL_NB];
+ kal_uint8 valid_scell_param_num;
+#endif
+} emac_ra_config_info_struct;
+
+
+typedef struct
+{
+ errc_emac_max_harq_tx_enum max_harq_tx_index;
+ errc_emac_periodic_bsr_timer_enum periodic_bsr_timer_index;
+ errc_emac_retx_bsr_timer_enum retx_bsr_timer_index;
+ errc_emac_tti_bundling_mode_enum tti_bundling;
+
+ kal_bool extended_bsr_sizes;
+} emac_sched_config_info_struct;
+
+
+
+typedef struct
+{
+ errc_emac_on_duration_timer_enum on_duration_timer_index;
+ errc_emac_drx_inactivity_timer_enum drx_inactivity_timer_index;
+ errc_emac_drx_retx_timer_enum drx_retx_timer_index;
+ errc_emac_long_drx_cycle_enum long_drx_cycle_index;
+
+ kal_bool drx_ul_retx_timer_valid;
+ errc_emac_drx_ul_retx_timer_enum drx_ul_retx_timer_index;
+
+ kal_bool short_cycle_valid;
+ errc_emac_short_drx_cycle_enum short_drx_cycle_index;
+ kal_uint8 drx_short_cycle_timer;
+
+ kal_uint16 drx_start_offset;
+} emac_drx_config_info_struct;
+
+
+typedef struct
+{
+ errc_emac_periodic_phr_timer_enum periodic_phr_timer_index;
+ errc_emac_prohibit_phr_timer_enum prohibit_phr_timer_index;
+ errc_emac_phr_dl_pathloss_change_enum phr_dl_pathloss_change_index;
+
+ kal_bool extended_phr;
+} emac_phr_config_info_struct;
+
+
+typedef struct
+{
+ kal_bool sr_mask; //r9 sr mask
+ kal_uint8 lcid;
+ kal_uint8 rb_idx;
+ errc_el2_rbid_enum rb_id;
+
+ ///RB direction
+ ///UL: 0x01 DL: 0x02 Bi-direction 0x03
+ ///EMAC_RB_UL_MASK 0x01
+ ///EMAC_RB_DL_MASK 0x02
+ kal_uint8 direction;
+ kal_uint8 lcg;
+ kal_uint8 ul_priority;
+ kal_bool logical_channel_sr_prohibit_timer_is_used;
+ kal_bool logical_channel_brq_prohibit_timer_index_is_valid;
+ errc_emac_brq_prohibit_timer_enum logical_channel_brq_prohibit_timer_index;
+} errc_emac_open_rb_struct;
+
+typedef struct
+{
+ kal_uint8 rb_idx;
+ errc_el2_rbid_enum rb_id;
+ kal_uint8 direction;
+} errc_emac_close_rb_struct;
+
+// MSG_ID_ERRC_EMAC_MEAS_GAP_IND
+typedef struct
+{
+ LOCAL_PARA_HDR
+ kal_uint8 gap_pattern; //0: gap=40, 1: gap=80
+ kal_uint8 offset; //0xFF: no gap
+} errc_emac_meas_gap_ind_struct;
+
+/* CHM MBMS support start */
+typedef enum
+{
+ ERRC_EMAC_CONFIG_TYPE_ALL = 0, // configure SCH only, or configure both SCH+MCH
+ ERRC_EMAC_CONFIG_TYPE_MCH_ONLY = 1 // configure MCH only
+} errc_emac_config_type_enum;
+
+typedef struct
+{
+ kal_uint8 mbsfn_area_id; // 0~255
+
+ // numbered by eRRC and not from NW,
+ // If one carrier is supported, range 0~7
+ // If two carriers are supported, range 0~15
+ kal_uint8 mcch_idx;
+} errc_emac_open_mcch_struct;
+
+typedef struct
+{
+ kal_uint8 mbsfn_area_id; // 0~255, currently for debug purpose only
+ kal_uint8 mcch_idx;
+} errc_emac_close_mcch_struct;
+
+typedef struct
+{
+ kal_uint8 mbsfn_area_id; // 0~255
+ kal_uint8 pmch_id; // 0~15, numbered by eRRC and not from NW (directly use the index in asn)
+ kal_uint8 lcid; // 0~28
+ kal_uint8 mrb_idx; // numbered by eRRC, The range of mrb_idx depends on L2 HW capability
+} errc_emac_open_mrb_struct;
+
+typedef struct
+{
+ kal_uint8 mbsfn_area_id; // 0~255, currently for debug purpose only
+ kal_uint8 pmch_id; // 0~15, currently for debug purpose only
+ kal_uint8 lcid; // 0~28, currently for debug purpose only
+ kal_uint8 mrb_idx; // numbered by eRRC, The range of mrb_idx depends on L2 HW capability
+} errc_emac_close_mrb_struct;
+
+/* CHM MBMS support end */
+
+typedef struct
+{
+ kal_uint8 stag_id;
+ errc_emac_ta_timer_enum s_tag_ta_timer;
+} errc_emac_stag_timer_info_struct;
+
+// MSG_ID_ERRC_EMAC_CONFIG_REQ
+typedef struct
+{
+ LOCAL_PARA_HDR
+ errc_emac_config_type_enum config_type; //configure either MCH only or all
+ errc_emac_config_cause_enum cause; //HO or RESET or not
+ errc_emac_ta_timer_enum ta_timer_index; //TA timer index
+ kal_uint8 sr_prohibit_timer; //SR prohibit timer index
+ kal_uint8 open_rb_nb; //number of open RB
+ kal_uint8 close_rb_nb; //number of close RB
+ errc_emac_open_rb_struct open_rb[ERRC_EMAC_MAX_RB_NB];
+ errc_emac_close_rb_struct close_rb[ERRC_EMAC_MAX_RB_NB];
+
+ errc_emac_icd_event_cause_enum icd_event_cause; //ICD MAC_RESET_EVENT and MAC_CONFIGURATION_EVENT
+
+ //EMAC_CONFIG_INFO_RA_MASK
+ //EMAC_CONFIG_INFO_SCHED_MASK
+ //EMAC_CONFIG_INFO_DRX_MASK
+ //EMAC_CONFIG_INFO_PHR_MASK
+ //EMAC_CONFIG_INFP_CRNTI_MASK
+ kal_uint8 info_bitmap;
+ emac_ra_config_info_struct ra_config_info;
+ emac_sched_config_info_struct schd_config_info;
+ emac_drx_config_info_struct drx_config_info;
+ emac_phr_config_info_struct phr_config_info;
+ kal_uint16 c_rnti; //new C-RNTI value
+ kal_bool dl_data_sus_flg;
+
+ emac_scell_deactivation_timer_enum scell_deactivation_timer;
+ kal_uint8 configured_scell_bitmap;
+ kal_bool simultaneous_pucch_pusch;
+ kal_bool pusch_enhancement_mode;
+
+/* CHM MBMS support start */
+ //kal_uint8 open_mcch_nb[MAX_EMBMS_FREQ_SUPPORT]; // for 2 freq
+ //kal_uint8 close_mcch_nb[MAX_EMBMS_FREQ_SUPPORT]; // for 2 freq
+ //errc_emac_open_mcch_struct open_mcch[MAX_EMBMS_FREQ_SUPPORT][MAX_EMBMS_MCCH_SUPPORT];
+ //errc_emac_close_mcch_struct close_mcch[MAX_EMBMS_FREQ_SUPPORT][MAX_EMBMS_MCCH_SUPPORT];
+
+ //kal_uint8 open_mrb_nb[MAX_EMBMS_FREQ_SUPPORT]; // for 2 freq
+ //kal_uint8 close_mrb_nb[MAX_EMBMS_FREQ_SUPPORT]; // for 2 freq
+ //errc_emac_open_mrb_struct open_mrb[MAX_EMBMS_FREQ_SUPPORT][MAX_EMBMS_MRB_SUPPORT];
+ //errc_emac_close_mrb_struct close_mrb[MAX_EMBMS_FREQ_SUPPORT][MAX_EMBMS_MRB_SUPPORT];
+/* CHM MBMS support end */
+
+ #if defined(__XL1SIM_EL1__)
+ // old struct for XL1Sim test case use
+ errc_emac_ta_timer_enum s_tag_ta_timer;
+ kal_bool s_tag_ta_timer_is_valid;
+ #else
+ kal_uint8 s_tag_ta_timer_valid_nb; //number of valid stag timer info nb
+ errc_emac_stag_timer_info_struct s_stag_ta_timer_info[ERRC_EMAC_MAX_STAG_NB];
+ #endif
+
+ kal_bool logical_channel_sr_prohibit_timer_is_valid;
+ kal_uint16 logical_channel_sr_prohibit_timer; /* Value in subframes */
+
+} errc_emac_config_req_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+ errc_el2_cfg_result_enum result;
+} errc_emac_config_cnf_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+ emac_errc_ra_error_cause_enum cause;
+} errc_emac_ra_error_ind_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+ kal_uint16 crnti;
+ kal_uint8 preamble_tx_nb;
+ kal_bool contention_ind;
+} errc_emac_contention_ind_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+ kal_uint8 preamble_tx_nb;
+ kal_bool contention_ind;
+} errc_emac_ra_info_ind_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+ kal_uint8 preamble_tx_nb;
+ kal_bool contention_ind;
+ kal_bool max_txpower_reached;
+} errc_emac_estfail_report_cnf_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+ emac_errc_ul_rel_cause_enum cause;
+ kal_bool s_tag_is_valid;
+ kal_uint8 s_tag;
+} errc_emac_l1_ul_rel_ind_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+ kal_uint8 ccch_size;
+ kal_uint8 ccch[6];
+ errc_emac_ccch_cause_enum cause;
+} errc_emac_ccch_data_req_struct;
+
+/* Need to remove for TK6291 U4G */
+typedef struct
+{
+ LOCAL_PARA_HDR
+ kal_uint32 paging_ctrl_info;
+ qbm_gpd* p_rgpd;
+ ABS_TICK_TIME proc_abs_time;
+ lte_cell_time proc_lte_time;
+} errc_emac_paging_ind_struct;
+
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+ kal_uint32 si_ctrl_info;
+ qbm_gpd* p_rgpd;
+ ABS_TICK_TIME proc_abs_time;
+ lte_cell_time proc_lte_time;
+
+ kal_uint8 carrier_info; //Carrier Index, only valid for 0 and 1
+} errc_emac_si_ind_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ void* p_data; //93, start address of SRB data in VRB
+ kal_uint32 data_len; //93, length of SRB data in VRB
+
+} errc_emac_ccch_data_ind_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+ errc_emac_ta_info_req_type_enum req_type;
+} errc_emac_ta_info_req_struct;
+
+typedef struct
+{
+ kal_uint32 ta;
+ kal_uint8 s_tag_id;
+} errc_emac_s_tag_ta_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+ kal_bool is_valid;
+ kal_uint32 ta;
+ kal_bool s_tag_ta_is_valid;
+ errc_emac_s_tag_ta_struct s_tag_ta;
+} errc_emac_ta_info_cnf_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+ kal_uint32 ta;
+ kal_uint8 tag_id;
+} errc_emac_ta_info_ind_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+ kal_uint8 tag_id;
+} errc_emac_ta_info_invalid_ind_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+ errc_emac_drx_inc_gap_req_type_enum req_type;
+ kal_uint32 max_interval;
+} errc_emac_drx_inc_gap_req_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+ kal_uint8 scell_activate_bmp_dl;
+ kal_uint8 scell_activate_bmp_ul;
+} errc_emac_ca_activate_ind_struct;
+
+
+typedef enum
+{
+ ERRC_EMAC_SUPPORT_REL_R9,
+ ERRC_EMAC_SUPPORT_REL_R10,
+ ERRC_EMAC_SUPPORT_REL_R11,
+ ERRC_EMAC_SUPPORT_REL_R12,
+ ERRC_EMAC_SUPPORT_REL_R13,
+ ERRC_EMAC_SUPPORT_REL_INVALID
+} errc_emac_support_release_enum;
+
+
+typedef enum
+{
+ ERRC_EMAC_DL_QAM_64 = 0,
+ ERRC_EMAC_DL_QAM_256 = 1,
+ ERRC_EMAC_DL_QAM_NUM = 2,
+ ERRC_EMAC_DL_QAM_INVALID
+} errc_emac_dl_modulation_enum;
+
+
+typedef enum
+{
+ ERRC_EMAC_UL_QAM_16 = 0,
+ ERRC_EMAC_UL_QAM_64 = 1,
+ ERRC_EMAC_UL_QAM_256 = 2,
+ ERRC_EMAC_UL_QAM_NUM = 3,
+ ERRC_EMAC_UL_QAM_INVALID
+} errc_emac_ul_modulation_enum;
+
+typedef enum
+{
+ ERRC_EMAC_DL_CAT_1 = 0,
+ ERRC_EMAC_DL_CAT_2 = 1,
+ ERRC_EMAC_DL_CAT_3 = 2,
+ ERRC_EMAC_DL_CAT_4 = 3,
+ ERRC_EMAC_DL_CAT_6 = 4,
+ ERRC_EMAC_DL_CAT_7 = 5,
+ ERRC_EMAC_DL_CAT_9 = 6,
+ ERRC_EMAC_DL_CAT_10 = 7,
+ ERRC_EMAC_DL_CAT_11 = 8,
+ ERRC_EMAC_DL_CAT_12 = 9,
+ ERRC_EMAC_DL_CAT_13 = 10,
+ ERRC_EMAC_DL_CAT_16 = 11,
+ ERRC_EMAC_DL_CAT_NUM = 12,
+ ERRC_EMAC_DL_CAT_INVALID
+} errc_emac_dl_category_enum;
+
+typedef enum
+{
+ ERRC_EMAC_UL_CAT_1 = 0,
+ ERRC_EMAC_UL_CAT_2 = 1,
+ ERRC_EMAC_UL_CAT_3 = 2,
+ ERRC_EMAC_UL_CAT_4 = 3,
+ ERRC_EMAC_UL_CAT_5 = 4,
+ ERRC_EMAC_UL_CAT_6 = 5,
+ ERRC_EMAC_UL_CAT_7 = 6,
+ ERRC_EMAC_UL_CAT_9 = 7,
+ ERRC_EMAC_UL_CAT_10 = 8,
+ ERRC_EMAC_UL_CAT_11 = 9,
+ ERRC_EMAC_UL_CAT_12 = 10,
+ ERRC_EMAC_UL_CAT_13 = 11,
+ ERRC_EMAC_UL_CAT_15 = 12,
+ ERRC_EMAC_UL_CAT_NUM = 13,
+ ERRC_EMAC_UL_CAT_INVALID
+} errc_emac_ul_category_enum;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ // Support Release
+ errc_emac_support_release_enum support_release;
+
+ // Capability
+ errc_emac_dl_category_enum dl_category;
+ errc_emac_ul_category_enum ul_category;
+ errc_emac_dl_modulation_enum highest_dl_modulation;
+ errc_emac_ul_modulation_enum highest_ul_modulation;
+
+ // Features
+ kal_bool recommendBitRate_enable;
+
+} errc_emac_support_capability_ind_struct;
+
+#endif /*ERRC_EMAC_INTERFACE_H*/
diff --git a/mcu/protocol/interface/el2/errc_emacmch_msg.h b/mcu/protocol/interface/el2/errc_emacmch_msg.h
new file mode 100644
index 0000000..76664e2
--- /dev/null
+++ b/mcu/protocol/interface/el2/errc_emacmch_msg.h
@@ -0,0 +1,311 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * errc_emacmch_msg.h
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * Define ERRC EMACMCH interface enums, structures and constants
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ ****************************************************************************/
+
+#ifndef ERRC_EMACMCH_MSG_H
+#define ERRC_EMACMCH_MSG_H
+
+#include "kal_public_api.h"
+#include "el2_sap_common.h"
+#include "common_def.h"
+#include "el1_enum.h"
+
+typedef struct {
+ kal_uint8 num; //fdd: 1-6, tdd: 1-5
+ kal_uint8 sf[MAX_SF_IN_ONE_RF]; //fdd: 123678, tdd: 34789
+}sf_alloc_map_t;
+
+typedef struct {
+ kal_uint8 rf_alloc_period; /*1, 2, 4, 8, 16, 32 */
+ kal_uint8 rf_alloc_offset; /* 0.. 7*/ // TODO: if offset > period?
+ kal_bool is_one_frame_alloc;
+ sf_alloc_map_t sf_alloc_map[4];
+}sf_config_t;
+
+typedef struct {
+ kal_uint8 num_sf_config; /* 0...8 */
+ sf_config_t sf_config_list[MAX_MBSFN_ALLOCATIONS];
+}mbsfn_sf_config_list_t;
+
+// SYNCAREA_CFG
+typedef struct {
+ kal_uint8 mbsfn_area_id; // 0-255
+ kal_uint8 non_mbsfn_region_len; // 1-2
+ kal_uint8 signalMCS; // 2,7,13,19
+ kal_uint8 offset; // 0-10
+ kal_uint16 repetition_period; // 32, 64, 128, 256
+ kal_uint16 modification_period; // 512, 1024
+ sf_alloc_map_t sf_alloc_info;
+ el1_ch_mch_mcch_reception_mode_enum recv_mode; // EVY_RP, EVY_MP, CNG_DTT
+}mcch_config_t;
+
+typedef struct
+{
+ //kal_uint8 syncarea_id;
+ kal_uint8 mcch_cfg_num; // 0-8
+ mcch_config_t mcch_cfg[MAX_AREA_NUM_PER_CELL];
+ mbsfn_sf_config_list_t sib2_sf_config_list;
+
+} errc_emacmch_syncarea_cfg_t;
+
+// AREA_CFG
+typedef struct {
+ kal_uint8 pmch_id;
+ kal_bool is_cfg_pmch_info_list_ext; //MT6293
+ kal_bool is_higher_order_data_mcs; //MT6293
+ kal_uint8 dataMCS; /* 0 ..28*/
+ kal_uint8 session_num_in_pmch; //MT6293
+ kal_uint16 sf_alloc_start;
+ kal_uint16 sf_alloc_end;
+ kal_uint16 mch_sched_period; /* 8, 16, 32, 64, 128, 256, 512, 1024 */
+
+}pmch_info_t;
+
+typedef struct {
+ kal_uint8 mbsfn_area_id; /* 0 .. 255 */
+ kal_uint16 common_sf_alloc_period; /* 4, 8, 16, 32, 64, 128, 256 */
+
+ kal_uint8 num_sf_config;
+ sf_config_t sf_config_list[MAX_MBSFN_ALLOCATIONS];
+
+ kal_uint8 num_pmch_info; /* 0 represent all PMCH close */
+ pmch_info_t pmch_info_list[MAX_PMCH_PER_MBSFN];
+
+}mbsfn_area_config_t;
+
+typedef struct
+{
+ //kal_uint8 syncarea_id;
+ kal_uint8 area_cfg_num;
+ mbsfn_area_config_t area_cfg[MAX_AREA_NUM_PER_CELL];
+
+} errc_emacmch_syncarea_area_cfg_t;
+
+// MXCH_CFG
+typedef struct
+{
+ kal_uint8 area_id; // 0~255
+ kal_uint8 mcch_idx; // numbered by ERRC
+
+} errc_emacmch_establish_mcch_t;
+
+typedef struct
+{
+ kal_uint8 area_id; // 0~255, currently for debug purpose only
+ kal_uint8 mcch_idx; // numbered by ERRC
+
+} errc_emacmch_release_mcch_t;
+
+typedef struct
+{
+ kal_uint8 area_id; // 0~255
+ kal_uint8 pmch_id; // 0~15, numbered by ERRC (directly use the index in asn ie) = pmch_ie_idx
+ kal_uint8 lcid; // 0~28
+ kal_uint8 mtch_idx; // numbered by ERRC, The range of mrb_idx depends on L2 HW capability
+ kal_uint8 tmgi[6]; // tmgi info to identify MBMS session, required by VZW EM
+
+} errc_emacmch_establish_mtch_t;
+
+typedef struct
+{
+ kal_uint8 area_id; // 0~255, currently for debug purpose only
+ kal_uint8 pmch_id; // 0~15, currently for debug purpose only
+ kal_uint8 lcid; // 0~28, currently for debug purpose only
+ kal_uint8 mtch_idx; // numbered by ERRC, The range of mrb_idx depends on L2 HW capability
+ kal_uint8 tmgi[6]; // tmgi info to identify MBMS session, required by VZW EM
+
+} errc_emacmch_release_mtch_t;
+
+typedef struct
+{
+ //kal_uint8 syncarea_id;
+ kal_uint8 release_mcch_num;
+ errc_emacmch_release_mcch_t release_mcch[MAX_EMBMS_MCCH_SUPPORT];
+
+ kal_uint8 establish_mcch_num;
+ errc_emacmch_establish_mcch_t establish_mcch[MAX_EMBMS_MCCH_SUPPORT];
+
+ kal_uint8 release_mtch_num;
+ errc_emacmch_release_mtch_t release_mtch[MAX_EMBMS_MTCH_SUPPORT];
+
+ kal_uint8 establish_mtch_num;
+ errc_emacmch_establish_mtch_t establish_mtch[MAX_EMBMS_MTCH_SUPPORT];
+
+} errc_emacmch_syncarea_mxch_cfg_t;
+
+// MCCH_RCV_MODE_CHANGE
+typedef struct
+{
+ kal_uint8 mbsfn_area_id;
+ el1_ch_mch_mcch_reception_mode_enum recv_mode;
+
+}mcch_rept_mode_config_t;
+
+typedef struct
+{
+ //kal_uint8 syncarea_id;
+ kal_uint8 mcch_rcv_mode_change_num;
+ mcch_rept_mode_config_t mcch_rcv_mode_change[MAX_AREA_NUM_PER_CELL];
+
+} errc_emacmch_syncarea_mcch_rcv_mode_change_t;
+
+// MTCH_SUSPEND_IND
+typedef struct
+{
+ kal_uint8 lcid; // 0~28
+ kal_uint8 mtch_idx; // numbered by ERRC, The range of mrb_idx depends on L2 HW capability
+
+} errc_emacmch_mtch_t;
+
+
+/****************************************************************************
+ * ERRC -> EMACMCH
+ ****************************************************************************/
+
+// MSG_ID_ERRC_EMACMCH_SYNCAREA_CFG_REQ
+typedef struct
+{
+
+ LOCAL_PARA_HDR
+ kal_uint32 tid; // 0x00000000 - 0x7FFFFFFF
+ kal_bool syncarea_cfg_valid[MAX_EMBMS_FREQ_SUPPORT];
+ errc_emacmch_syncarea_cfg_t syncarea_cfg[MAX_EMBMS_FREQ_SUPPORT];
+
+} errc_emacmch_syncarea_cfg_req_struct;
+
+// MSG_ID_ERRC_EMACMCH_AREA_CFG_REQ
+typedef struct
+{
+ LOCAL_PARA_HDR
+ kal_uint32 tid; // 0x00000000 - 0x7FFFFFFF
+ kal_bool syncarea_area_cfg_valid[MAX_EMBMS_FREQ_SUPPORT];
+ errc_emacmch_syncarea_area_cfg_t syncarea_area_cfg[MAX_EMBMS_FREQ_SUPPORT];
+
+} errc_emacmch_area_cfg_req_struct;
+
+// MSG_ID_ERRC_EMACMCH_MXCH_CFG_REQ
+typedef struct
+{
+ LOCAL_PARA_HDR
+ errc_emacmch_syncarea_mxch_cfg_t syncarea_mxch_cfg[MAX_EMBMS_FREQ_SUPPORT]; // for 2 freq
+
+} errc_emacmch_mxch_cfg_req_struct;
+
+
+/* MSG_ID_ERRC_EMACMCH_MCCH_RCV_MODE_CHANGE_REQ */
+// Possible modes that could be changed by ERRC includes:
+// EL1_RECV_EVERY_REPETITION_PERIOD = 0,
+// EL1_RECV_EVERY_MODIFICATION_PERIOD = 1,
+// EL1_RECV_CHANGE_DETECTION = 2,
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+ kal_uint32 tid; // 0x00000000 - 0x7FFFFFFF
+ kal_bool syncarea_mcch_rcv_mode_change_valid[MAX_EMBMS_FREQ_SUPPORT];
+ errc_emacmch_syncarea_mcch_rcv_mode_change_t syncarea_mcch_rcv_mode_change[MAX_EMBMS_FREQ_SUPPORT];
+
+} errc_emacmch_mcch_rcv_mode_change_req_struct;
+
+
+/****************************************************************************
+ * EMACMCH -> ERRC
+ ****************************************************************************/
+
+// MSG_ID_ERRC_EMACMCH_SYNCAREA_CFG_CNF
+typedef struct
+{
+ LOCAL_PARA_HDR
+ errc_el2_cfg_result_enum result;
+
+} errc_emacmch_syncarea_cfg_cnf_struct;
+
+// MSG_ID_ERRC_EMACMCH_AREA_CFG_CNF
+typedef struct
+{
+ LOCAL_PARA_HDR
+ errc_el2_cfg_result_enum result;
+
+} errc_emacmch_area_cfg_cnf_struct;
+
+// MSG_ID_ERRC_EMACMCH_MXCH_CFG_CNF
+typedef struct
+{
+ LOCAL_PARA_HDR
+ errc_el2_cfg_result_enum result;
+
+} errc_emacmch_mxch_cfg_cnf_struct;
+
+/* MSG_ID_ERRC_EMACMCH_MCCH_RCV_MODE_CHANGE_CNF */
+typedef struct
+{
+ LOCAL_PARA_HDR
+ errc_el2_cfg_result_enum result;
+
+} errc_emacmch_mcch_rcv_mode_change_cnf_struct;
+
+// MSG_ID_ERRC_EMACMCH_MTCH_SUSPEND_IND
+typedef struct
+{
+ LOCAL_PARA_HDR
+ kal_uint8 syncarea_id; // 0:PCELL 1:SCELL
+ kal_uint8 area_id; // 0~255
+ kal_uint8 pmch_id; // 0~15
+ kal_uint8 suspend_mtch_num;
+ errc_emacmch_mtch_t suspend_mtch[MAX_MTCH_NUM_PER_PMCH_29];
+
+} errc_emacmch_mtch_suspend_ind_struct;
+
+
+#endif /*ERRC_EMACMCH_MSG_H*/
diff --git a/mcu/protocol/interface/el2/errc_epdcp_msg.h b/mcu/protocol/interface/el2/errc_epdcp_msg.h
new file mode 100644
index 0000000..ced76fa
--- /dev/null
+++ b/mcu/protocol/interface/el2/errc_epdcp_msg.h
@@ -0,0 +1,812 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * errc_epdcp_msg.h
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * eRRC-ePDCP SAP message structure definition
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 07 24 2018 cammie.yang
+ * [MOLY00341790] [MT6295] UDC feature patch back
+ * [UDC][95FPB][Phase 3] UDC feature patch back -- common structures and interfaces
+ *
+ * 07 18 2018 steve.kao
+ * [MOLY00339307] The handling of energy depletion attack by STMSI paging from fake cell
+ * Inactivity Detection Timer 2
+ *
+ * 02 06 2018 yi-shing.liou
+ * [MOLY00299866] [UMOLYE][ERRC/El2][R13]FeMDT UL PDCP delay measurement report
+ * [EPDCP] PDCP queuing delay (EMDT), common part.
+ *
+ * 10 31 2017 mazi.yu
+ * [MOLY00286412] [MT6293] Change EPDCP ERRC RB add/mod interface
+ * Change epdcp_rb_addmod_struct interface and support new qci value
+ *
+ * 09 18 2017 timothy.yao
+ * [MOLY00274939] patch back bugfix of RoHC-TCP IOT
+ * for UL-ROHC:
+ * 1) RoHC TCP bugfix patch
+ * 2) UL-ROHC interface
+ *
+ * 07 13 2017 steve.kao
+ * [MOLY00264004] [6293] EPDCP R-SIM code changes and UT with bugfixes
+ *
+ * [UMOLYA][TRUNK] EPDCP changes for L+L, R-SIM, UT, and bugfixes.
+ *
+ * 02 10 2017 steve.kao
+ * [MOLY00228972] [UMOLYA][EPDCP][R-SIM] Interface with ERRC for Remote SIM
+ * [EPDCP][R-SIM] Interface with ERRC for Remote SIM.
+ *
+ * 11 15 2016 cammie.yang
+ * [MOLY00211938] [UMOLYA][EM][AT&T] EUTRA air message
+ * [TRUNK][EPDCP]
+ * 1. Modification of ERRC-EPDCP interface for change of RRC buffer type (non-cachable AFM will be used)
+ * 2. Add handling for NULL Alogrithm in EPDCP UL
+ *
+ * 11 10 2016 steve.kao
+ * [MOLY00195563] [6293][EL2][UPCM][RATDM][EPDCP] Initial feature integrations
+ * [UMOLYA_TRUNK][EPDCP] Fix MCCH delivery interface.
+ *
+ * 09 26 2016 cammie.yang
+ * [MOLY00195563] [6293][EL2][UPCM][RATDM][EPDCP] Initial feature integrations
+ * [TRUNK] UPCM/RATDM/EPDCP feature integrations from PS.DEV
+ *
+ * 01 21 2016 mingtsung.sun
+ * [MOLY00160421] [MT6292] ePDCP CE RAM Optimization
+ * [EPDCP] CE RAM OPT
+ *
+ * 01 04 2016 tero.miettinen
+ * [MOLY00155820] ERRC UMOLY updates
+ * NVRAM IF, ERRC - EL2 IF and ERRC update for 15 bit RLC LI field length.
+ *
+ * 06 03 2015 mingtsung.sun
+ * [MOLY00118161] [MT6291] EPDCP CR Sync - Early reestablishment to prevent certain kind of VoLTE call drop
+ * LTE domain
+ *
+ * 02 05 2015 cooper.lin
+ * [MOLY00090532] [MT6291] Change Feature Check-in
+ * Code sync from MOLY (W15.06)
+ * 1. Not check in C2K related code because 91 C2K is under implementation and not checked in yet
+ * 2. Not check in VSIM related code, need to further discuss
+ * 3. Comment some DETECTION_TIMER related code, will confirm soon and patch it
+ *
+ * 11 12 2014 chi-chung.lin
+ * [MOLY00068710] [MT6291_DEV] Sync MOLY to MT6291_DEV
+ * [CHM] code sync from MT6291_DEV to UMOLY
+ *
+ * 11 11 2014 andrew.wu
+ * [MOLY00084096] [UMOLY]MT6291_DEV sync to UMOLY TRUNK
+ * MT6291_DEV sync to UMOLY
+ *
+ * 02 25 2013 timothy.yao
+ * [MOLY00007127] [MT7208] EL2 enhancement in MOLY
+ * [merged from L1SL2S-IT CBr]
+ * 1. modify the MACROs checking SIT index in ePDCP.
+ * 2. [bugfix] update BD chksum after removing PDCP header.
+ * 3. [bugfix] fix assert when deactivating loopback test mode
+ * -> also fix UT cases.
+ * 4. [bugfix] cache flush for the scaled data
+ * 5. [modify] patch the random method in freerun.
+ * 6. [modify] set the padding enums as 0x7fffffff for cgen.
+ ****************************************************************************/
+
+/*
+* mtk02353, 2011/07/28
+*
+* eRRC-ePDCP SAP message structure definition
+*
+* - the file only defines the message structure.
+* - naming rule : similar to message id
+* (a) exclude the prefix "MSG_ID_"
+* (b) add the postfix "_struct"
+* - message id is defined in epdcp_sap.h
+* MSG_ID_ERRC_EPDCP_DCCH_DATA_REQ,
+* MSG_ID_ERRC_EPDCP_DCCH_DATA_CNF,
+* MSG_ID_ERRC_EPDCP_DCCH_DATA_IND,
+* MSG_ID_ERRC_EPDCP_DCCH_DATA_RES,
+* MSG_ID_ERRC_EPDCP_TEST_REQ,
+* MSG_ID_ERRC_EPDCP_TEST_CNF,
+* MSG_ID_ERRC_EPDCP_CONFIG_REQ,
+* MSG_ID_ERRC_EPDCP_CONFIG_CNF,
+* MSG_ID_ERRC_EPDCP_CNTINFO_REQ,
+* MSG_ID_ERRC_EPDCP_CNTINFO_CNF,
+* MSG_ID_ERRC_EPDCP_EXCESS_DELAY_IND
+*
+* history:
+* 2011/11/16 - timothy
+* seperate the configuration array of CONFIG_REQ into 2 arrays,
+* one is for add_and_modify, and the other is for deletion.
+*/
+#ifndef _LTE_ERRC_EPDCP_SAP_STRUCT_DEF_H_
+#define _LTE_ERRC_EPDCP_SAP_STRUCT_DEF_H_
+
+#include "kal_public_api.h"
+
+#include "qmu_bm.h"
+#include "el2_sap_common.h"
+#include "common_def.h"
+
+/*****************************************************************************
+* constants
+*****************************************************************************/
+
+/* numbers */
+#define EPDCP_SAP_MAX_NUM_CFG_RB (10) //2 //2 SRB + 8 DRBs
+#define EPDCP_SAP_MAX_NUM_DRB (8) //8 DRBs
+#define EPDCP_SAP_MAX_NUM_ROHC_PROF (9)
+#define EPDCP_SAP_MAX_NUM_QUEUING_DELAY_RSLT (6)
+
+
+/* RB types */
+//#define EPDCP_SAP_DRB_TYPE_DRB_AM (1)
+//#define EPDCP_SAP_DRB_TYPE_DRB_UM (2)
+
+
+/*****************************************************************************
+* enum types
+*****************************************************************************/
+
+/*
+* dcch_data_req flag_bmp bit index definition
+*/
+typedef enum
+{
+ EPDCP_SAP_DATAREQ_FLAG_SMC = 0,
+ EPDCP_SAP_DATAREQ_FLAG_DRX_NO_WAKEUP = 1,
+ EPDCP_SAP_DATAREQ_FLAG_TIME_BOUND = 2
+} epdcp_datareq_flag_enum;
+
+/*
+* dcch_data_req result
+*/
+typedef enum
+{
+ EPDCP_SAP_DATAREQ_OK = 0,
+ EPDCP_SAP_DATAREQ_FAILURE,
+ EPDCP_SAP_DATAREQ_UNSENT,
+
+ EPDCP_SAP_DATAREQ_PAD = 0x7fffffff
+}epdcp_datareq_result_enum;
+
+
+/*
+* integrity check result
+*/
+typedef enum
+{
+ EPDCP_SAP_INTCHK_OK = 0,
+ EPDCP_SAP_INTCHK_FAILURE, //integrity check failure
+ EPDCP_SAP_INTCHK_SKIPPED, //integrity check is not applied
+
+ EPDCP_SAP_INTCHK_PAD = 0x7fffffff
+} epdcp_intchk_result_enum;
+
+
+/* QoS label of RB */
+typedef enum
+{
+ EPDCP_SAP_RB_QOS_0 = 0, //none (SRB)
+ EPDCP_SAP_RB_QOS_1, //high (DRB)
+ EPDCP_SAP_RB_QOS_2, //middle (DRB)
+ EPDCP_SAP_RB_QOS_3, //low (DRB)
+
+ EPDCP_SAP_RB_QOS_NUM,
+ EPDCP_SAP_RB_QOS_PAD = 0x7fffffff
+} epdcp_rb_qos_enum;
+
+
+/* command for RB */
+typedef enum
+{
+ EPDCP_SAP_RB_CMD_ESTABLISH = 0,
+ EPDCP_SAP_RB_CMD_EST_N_SUSP,
+ EPDCP_SAP_RB_CMD_SUSPEND,
+ EPDCP_SAP_RB_CMD_RECONFIG,
+ EPDCP_SAP_RB_CMD_HO_IND,
+ EPDCP_SAP_RB_CMD_RESUME,
+ EPDCP_SAP_RB_CMD_RELEASE,
+ EPDCP_SAP_RB_CMD_RELEASE_FROM_LTE, //inter-RAT (from LTE)
+
+ EPDCP_SAP_RB_CMD_NUM,
+ EPDCP_SAP_RB_CMD_PAD = 0x7fffffff
+} epdcp_rb_cmd_enum;
+
+
+/* LB command for PDCP */
+typedef enum
+{
+ EPDCP_SAP_LB_CMD_MODE_A_DEACTIVATE = 0,
+ EPDCP_SAP_LB_CMD_MODE_A_ACTIVATE,
+ EPDCP_SAP_LB_CMD_MODE_B_DEACTIVATE,
+ EPDCP_SAP_LB_CMD_MODE_B_ACTIVATE,
+ EPDCP_SAP_LB_CMD_MODE_C_DEACTIVATE,
+ EPDCP_SAP_LB_CMD_MODE_C_ACTIVATE,
+
+ EPDCP_SAP_LB_CMD_NUM,
+ EPDCP_SAP_LB_CMD_PAD = 0x7fffffff
+} epdcp_lb_cmd_enum;
+
+
+/* integrity algorithm enum */
+typedef enum
+{
+ EPDCP_SAP_INT_ALG_EIA0 = 0,
+ EPDCP_SAP_INT_ALG_EIA1,
+ EPDCP_SAP_INT_ALG_EIA2,
+ EPDCP_SAP_INT_ALG_EIA3, // ZUC algorithm
+
+ EPDCP_SAP_INT_ALG_NUM,
+ EPDCP_SAP_INT_ALG_PAD = 0x7fffffff
+} epdcp_int_alg_enum;
+
+
+/* cipher algorithm enum */
+typedef enum
+{
+ EPDCP_SAP_CIP_ALG_EEA0 = 0,
+ EPDCP_SAP_CIP_ALG_EEA1, // SNOW 3G
+ EPDCP_SAP_CIP_ALG_EEA2, // AES-based
+ EPDCP_SAP_CIP_ALG_EEA3, // ZUC algorithm
+
+ EPDCP_SAP_CIP_ALG_NUM,
+ EPDCP_SAP_CIP_ALG_PAD = 0x7fffffff
+} epdcp_cip_alg_enum;
+
+
+typedef enum
+{
+ EPDCP_SAP_MEASUREMENT_OFF = 0,
+ EPDCP_SAP_MEASUREMENT_ON,
+ EPDCP_SAP_MEASUREMENT_MODIFY
+} epdcp_delay_measurement_enum;
+
+
+typedef enum
+{
+ EPDCP_SAP_DELAY_THRESH_MS_30 = 0,
+ EPDCP_SAP_DELAY_THRESH_MS_40,
+ EPDCP_SAP_DELAY_THRESH_MS_50,
+ EPDCP_SAP_DELAY_THRESH_MS_60,
+ EPDCP_SAP_DELAY_THRESH_MS_70,
+ EPDCP_SAP_DELAY_THRESH_MS_80,
+ EPDCP_SAP_DELAY_THRESH_MS_90,
+ EPDCP_SAP_DELAY_THRESH_MS_100,
+ EPDCP_SAP_DELAY_THRESH_MS_150,
+ EPDCP_SAP_DELAY_THRESH_MS_300,
+ EPDCP_SAP_DELAY_THRESH_MS_500,
+ EPDCP_SAP_DELAY_THRESH_MS_750,
+ EPDCP_SAP_DELAY_THRESH_MS_PAD = 0x7fffffff
+} epdcp_delay_thresh_enum;
+
+
+typedef enum
+{
+ EPDCP_SAP_DELAY_RPT_INTV_MS_1024 = 0,
+ EPDCP_SAP_DELAY_RPT_INTV_MS_2048,
+ EPDCP_SAP_DELAY_RPT_INTV_MS_5120,
+ EPDCP_SAP_DELAY_RPT_INTV_MS_10240,
+ EPDCP_SAP_DELAY_RPT_INTV_PAD = 0x7fffffff
+} epdcp_delay_rpt_intv_enum;
+
+
+/* UDC enum */
+typedef enum
+{
+ EPDCP_SAP_UDC_BUF_SZ_KBYTE_2 = 0,
+ EPDCP_SAP_UDC_BUF_SZ_KBYTE_4,
+ EPDCP_SAP_UDC_BUF_SZ_KBYTE_8,
+
+ EPDCP_SAP_UDC_BUF_SZ_KBYTE_PAD = 0x7fffffff
+} epdcp_udc_buf_sz_enum;
+
+typedef enum
+{
+ EPDCP_SAP_UDC_DIC_INVALID = 0,
+ EPDCP_SAP_UDC_DIC_STANDARD,
+ EPDCP_SAP_UDC_DIC_OPERATOR,
+
+ EPDCP_SAP_UDC_DIC_PAD = 0x7fffffff
+} epdcp_udc_dic_enum;
+
+
+/* discard timer enum */
+typedef enum
+{
+ EPDCP_SAP_DISC_TMR_MS_50 = 0,
+ EPDCP_SAP_DISC_TMR_MS_100,
+ EPDCP_SAP_DISC_TMR_MS_150,
+ EPDCP_SAP_DISC_TMR_MS_300,
+ EPDCP_SAP_DISC_TMR_MS_500,
+ EPDCP_SAP_DISC_TMR_MS_750,
+ EPDCP_SAP_DISC_TMR_MS_1500,
+ EPDCP_SAP_DISC_TMR_MS_INFINITY,
+
+ EPDCP_SAP_DISC_TMR_MS_PAD = 0x7fffffff
+} epdcp_disc_tmr_enum;
+
+typedef enum
+{
+ EPDCP_SAP_ROHC_EN_DISABLED = 0,
+ EPDCP_SAP_ROHC_EN_ENABLED_BIDIR,
+ EPDCP_SAP_ROHC_EN_ENABLED_UL_ONLY
+} epdcp_rohc_en_enum;
+
+typedef enum
+{
+ EPDCP_SAP_DRB_TYPE_LTE = 0,
+ EPDCP_SAP_DRB_TYPE_LWA
+} epdcp_drb_type_enum;
+
+typedef enum
+{
+ EPDCP_SAP_STUS_PDU_ON_POLL_TYPE_1 = 0,
+ EPDCP_SAP_STUS_PDU_ON_POLL_TYPE_2
+} epdcp_stus_rpt_type_on_poll_enum;
+
+/* DRB direction definition */
+#define EPDCP_DRB_DIR_UL (0x01)
+#define EPDCP_DRB_DIR_DL (0x02)
+#define EPDCP_DRB_DIR_ULDL (EPDCP_DRB_DIR_UL | EPDCP_DRB_DIR_DL)
+
+/*****************************************************************************
+* structures
+*****************************************************************************/
+
+typedef struct
+{
+ /* polling param */
+ kal_bool type_on_poll_valid;
+ epdcp_stus_rpt_type_on_poll_enum type_on_poll;
+
+ /* periodic param */
+ kal_bool type1_periodicity_valid;
+ kal_bool type2_periodicity_valid;
+ kal_bool offset_valid;
+ kal_bool type1_periodicity_recfg;
+ kal_bool type2_periodicity_recfg;
+ kal_uint32 type1_periodicity;
+ kal_uint32 type2_periodicity;
+ kal_uint32 offset;
+} epdcp_stus_rpt_param_struct;
+
+/* PDCP-config (RB property) */
+typedef struct
+{
+ epdcp_drb_type_enum drb_type;
+ kal_uint8 flag_rlc_um;
+ kal_uint8 flag_um_long_sn; // UM only
+ kal_uint8 bmp_um_dir; // UM only : bit#0:UL, bit#1:DL
+
+
+ kal_uint8 flag_am_stus_rpt; // AM only
+ kal_uint8 flag_am_long_sn; // AM only
+ kal_bool flag_am_rlc_li_field_15_bit; // AM only
+ kal_uint8 pad1;
+
+ epdcp_rohc_en_enum rohc_enabled;
+ kal_uint16 rohc_max_cid;
+ kal_uint8 rohc_profs[EPDCP_SAP_MAX_NUM_ROHC_PROF];
+
+ kal_bool udc_enabled;
+ epdcp_udc_buf_sz_enum udc_buf_sz;
+ epdcp_udc_dic_enum udc_dic;
+
+ kal_bool reorder_tmr_is_valid;
+ kal_uint32 reorder_tmr;
+ epdcp_disc_tmr_enum disc_tmr; // spec-enum
+
+ epdcp_stus_rpt_param_struct stus_rpt_param;
+} epdcp_drb_attr_struct;
+
+
+/* RB addition/modification config structure */
+typedef struct
+{
+ kal_uint8 rb_idx; //primary index
+ kal_uint8 rb_id;
+ kal_uint8 eps_br_id;
+ kal_uint8 qci;
+ kal_bool is_gbr_bearer;
+
+ epdcp_rb_cmd_enum cmd;
+ epdcp_drb_attr_struct drb_attr;
+} epdcp_rb_addmod_struct;
+
+
+/* RB deletion config */
+typedef struct
+{
+ kal_uint8 rb_idx;
+ kal_uint8 rb_id;
+ kal_uint8 ho_failure; //if failure, remove the new RB.
+ kal_uint8 pad;
+
+ epdcp_rb_cmd_enum cmd;
+} epdcp_rb_del_struct;
+
+
+/* PDCP security config structure */
+typedef struct
+{
+ kal_uint8 valid;
+ kal_uint8 cip_key_up_idx;
+ kal_uint8 cip_key_cp_idx;
+ kal_uint8 int_key_idx;
+ epdcp_int_alg_enum int_alg; //integrity algorithm
+ epdcp_cip_alg_enum cip_alg; //cipher algorithm
+} epdcp_sec_cfg_struct;
+
+
+/* queuing delay result structure */
+typedef struct
+{
+ kal_uint8 qci;
+ kal_uint32 excess_delay_num;
+ kal_uint32 total_num;
+} epdcp_delay_result_struct;
+
+
+/* PDCP queuing delay config structure */
+typedef struct{
+ kal_bool valid;
+ epdcp_delay_measurement_enum measurement_status; // if valid=false, delay_theshold and delay_report_interval should be ignored
+ epdcp_delay_thresh_enum threshold;
+ epdcp_delay_rpt_intv_enum report_interval;
+} epdcp_delay_cfg_struct;
+
+
+/* RB loopback config structure */
+typedef struct
+{
+ kal_uint8 rb_idx; //RB index
+ kal_uint8 rb_id;
+ kal_uint8 pad;
+
+ kal_uint8 scaling; //need scaling or not?
+ kal_uint16 size; //scaling size
+} epdcp_rb_lbcfg_struct;
+
+
+/* RB COUNT info structure */
+typedef struct
+{
+ kal_uint8 rb_idx; //RB index
+ kal_uint8 rb_id;
+ kal_uint16 pad;
+
+ kal_uint32 rx_count; //HFN + SN
+ kal_uint32 tx_count; //HFN + SN
+} epdcp_rb_cntinfo_struct;
+
+typedef struct
+{
+ kal_uint8 mbsfn_area_id; // 0~255
+ kal_uint8 mcch_idx; //numbered by eRRC(not from NW), range 0~7
+}epdcp_mcch_add_struct;
+
+typedef struct
+{
+ kal_uint8 mbsfn_area_id; // 0~255, currently for debug purpose only
+ kal_uint8 mcch_idx;
+}epdcp_mcch_del_struct;
+
+typedef struct
+{
+ kal_uint8 mbsfn_area_id;
+ kal_uint8 pmch_id; //0~15
+ kal_uint16 sessionId; // 0xFFFF means no configure session id
+ kal_uint8 TMGI[6];
+ kal_uint8 lc_id; //0~28
+ kal_uint8 mrb_idx; //numbered by eRRC(not from NW), range depends on L2 HW capability
+}epdcp_mrb_add_struct;
+
+typedef struct
+{
+ kal_uint8 mbsfn_area_id; //currently for debug usage only
+ kal_uint8 pmch_id; //0~15, currently for debug usage only
+ kal_uint16 sessionId; //currently for debug usage only
+ kal_uint8 TMGI[6]; //currently for debug usage only
+ kal_uint8 lc_id; //0~28, currently for debug usage only
+ kal_uint8 mrb_idx;
+}epdcp_mrb_del_struct;
+
+/*****************************************************************************
+* message structure
+*****************************************************************************/
+
+//MSG_ID_ERRC_EPDCP_CONFIG_REQ,
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 add_num;
+ kal_uint8 mod_num;
+ kal_uint8 del_num;
+ kal_bool drb_continue_rohc;
+
+ epdcp_rb_addmod_struct rb_add[EPDCP_SAP_MAX_NUM_CFG_RB];
+ epdcp_rb_addmod_struct rb_mod[EPDCP_SAP_MAX_NUM_CFG_RB];
+ epdcp_rb_del_struct rb_del[EPDCP_SAP_MAX_NUM_CFG_RB];
+
+ epdcp_sec_cfg_struct sec_cfg;
+ epdcp_delay_cfg_struct delay_cfg;
+
+ //for eMBMS related
+ kal_uint8 mcch_add_num[MAX_EMBMS_FREQ_SUPPORT];
+ kal_uint8 mcch_del_num[MAX_EMBMS_FREQ_SUPPORT];
+ epdcp_mcch_add_struct mcch_add[MAX_EMBMS_FREQ_SUPPORT][MAX_EMBMS_MCCH_SUPPORT];
+ epdcp_mcch_del_struct mcch_del[MAX_EMBMS_FREQ_SUPPORT][MAX_EMBMS_MCCH_SUPPORT];
+
+ kal_uint8 mrb_add_num[MAX_EMBMS_FREQ_SUPPORT];
+ kal_uint8 mrb_del_num[MAX_EMBMS_FREQ_SUPPORT];
+ epdcp_mrb_add_struct mrb_add[MAX_EMBMS_FREQ_SUPPORT][MAX_EMBMS_MRB_SUPPORT];
+ epdcp_mrb_del_struct mrb_del[MAX_EMBMS_FREQ_SUPPORT][MAX_EMBMS_MRB_SUPPORT];
+} errc_epdcp_config_req_struct;
+
+
+//MSG_ID_ERRC_EPDCP_CONFIG_CNF,
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ errc_el2_cfg_result_enum result;
+} errc_epdcp_config_cnf_struct;
+
+//MSG_ID_ERRC_EPDCP_SWITCH_VIRTUAL_CONNECTED_REQ
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ errc_el2_switch_virtual_connected_enum status;
+} errc_epdcp_switch_virtual_connected_req_struct;
+
+/*
+* MSG_ID_ERRC_EPDCP_DCCH_DATA_REQ
+*
+* note: read peer_buffer_pointer to get tgpd pointer.
+*/
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 rb_id;
+ kal_uint8 rb_idx;
+ kal_uint16 trans_id;
+ kal_uint16 flag_bmp;
+
+ void *p_addr;
+ kal_uint32 data_len;
+
+ // this is used during buffer release
+ KAL_AFM_ID afm_id;
+
+} errc_epdcp_dcch_data_req_struct;
+
+
+//MSG_ID_ERRC_EPDCP_DCCH_DATA_CNF,
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 rb_id;
+ kal_uint8 rb_idx;
+ kal_uint16 trans_id;
+ epdcp_datareq_result_enum result;
+} errc_epdcp_dcch_data_cnf_struct;
+
+
+/*
+* MSG_ID_ERRC_EPDCP_DCCH_DATA_IND,
+*
+* note: read peer_buffer_pointer to get rgpd pointer
+*/
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 rb_id;
+ kal_uint8 rb_idx;
+ kal_uint16 pad02;
+ epdcp_intchk_result_enum result;
+ kal_uint32 pdcp_count; // XXX: not needed if DL security is activated?
+ void *p_data;
+ kal_uint32 data_len; // including RRC message & MAC-I
+
+ qbm_gpd *p_rgpd; //TODO: to be removed
+} errc_epdcp_dcch_data_ind_struct;
+
+/*
+ * MSG_ID_ERRC_EPDCP_MCCH_DATA_IND,
+ */
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 ci; //0~MAX_EMBMS_FREQ_SUPPORT-1
+ kal_uint8 mcch_idx;
+ kal_uint8 mcch_mp_id;
+ kal_uint8 pad0;
+ void *p_data;
+ kal_uint32 data_len; // including RRC message & MAC-I
+} errc_epdcp_mcch_data_ind_struct;
+
+//MSG_ID_ERRC_EPDCP_DCCH_DATA_RES,
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 rb_id;
+ kal_uint8 rb_idx;
+ kal_uint16 pad02;
+} errc_epdcp_dcch_data_res_struct;
+
+
+//MSG_ID_ERRC_EPDCP_TEST_REQ,
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 rb_num; // only valid for mode A
+ kal_uint8 pad0;
+ kal_uint16 pad1;
+ epdcp_rb_lbcfg_struct rb_cfg[EPDCP_SAP_MAX_NUM_DRB]; // only valid for mode A
+ kal_uint8 mbsfn_area_id; //0~255, only valid for mode C
+ kal_uint8 pmch_id; //0~15, only valid for mode C
+ kal_uint8 lcid; //0~28, only valid for mode C
+ kal_uint8 ci; //0~MAX_EMBMS_FREQ_SUPPORT-1, only valid for mode C
+ epdcp_lb_cmd_enum cmd;
+} errc_epdcp_test_req_struct;
+
+
+//MSG_ID_ERRC_EPDCP_TEST_CNF,
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ errc_el2_cfg_result_enum result;
+} errc_epdcp_test_cnf_struct;
+
+
+/*
+* MSG_ID_ERRC_EPDCP_CNTINFO_REQ
+*
+* - null message
+*/
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ /* nothing */
+
+} errc_epdcp_cntinfo_req_struct;
+
+
+
+/*
+* MSG_ID_ERRC_EPDCP_CNTINFO_CNF
+*
+* - return the PDCP COUNT of each DRB
+*/
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 rb_num;
+ kal_uint8 pad01;
+ kal_uint16 pad02;
+ epdcp_rb_cntinfo_struct rb_cntinfo[EPDCP_SAP_MAX_NUM_DRB];
+} errc_epdcp_cntinfo_cnf_struct;
+
+/*
+ * MSG_ID_ERRC_EPDCP_DETECTION_TIMER_START_REQ,
+ *
+ * note: ERRC configure EPDPC detection timer value
+ */
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint32 detection_time_value; // in seconds
+} errc_epdcp_detection_timer_start_req_struct;
+
+/*
+ * MSG_ID_ERRC_EPDCP_DETECTION_TIMER_2_START_REQ,
+ *
+ * note: ERRC configure EPDPC detection timer value
+ */
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint32 detection_time_value; // in seconds
+} errc_epdcp_detection_timer_2_start_req_struct;
+
+
+/*
+ * MSG_ID_ERRC_EPDCP_PS_DATA_INACTIVE_TIME_IND,
+ *
+ * note: EPDCP response ERRC the inactive time of last PS data
+ */
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint32 inactive_time;
+} errc_epdcp_ps_data_inactive_time_ind_struct;
+
+
+/*
+* MSG_ID_ERRC_EPDCP_MTCH_PC_CNF
+*
+* - return the PDCP COUNT of each DRB
+*/
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint32 packet_count;
+} errc_epdcp_mtch_pc_cnf_struct;
+
+
+/*
+ * MSG_ID_ERRC_EPDCP_EXCESS_DELAY_IND
+ */
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 list_num;
+ epdcp_delay_result_struct result_list[EPDCP_SAP_MAX_NUM_QUEUING_DELAY_RSLT];
+ epdcp_delay_thresh_enum threshold;
+ epdcp_delay_rpt_intv_enum report_interval;
+} errc_epdcp_excess_delay_ind_struct;
+
+#endif //_LTE_ERRC_EPDCP_SAP_STRUCT_DEF_H_
diff --git a/mcu/protocol/interface/el2/errc_erlcdl_msg.h b/mcu/protocol/interface/el2/errc_erlcdl_msg.h
new file mode 100644
index 0000000..aaeb4b7
--- /dev/null
+++ b/mcu/protocol/interface/el2/errc_erlcdl_msg.h
@@ -0,0 +1,435 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * errc_erlcdl_msg.h
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * ERRC-ERLCDL SAP header file.
+ * This file defines the structures and enumerations for the SAP between ERRC and ERLCDL
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 02 06 2017 peter.yu
+ * [MOLY00207733] [MT6293][EL2] ERLCDL development
+ * [M-SIM] Sync R-SIM related interfaces, remove redundant message IDs related to ERLC.
+ *
+ * 10 07 2016 chih-cheng.yang
+ * [MOLY00206307] [MT6293][NWSIM][Regression][FDD][TC_17_4_1] error in CONN_CHM_LPBK_CNF
+ * fix loop mode C
+ *
+ * 10 06 2016 chih-cheng.yang
+ * [MOLY00206307] [MT6293][NWSIM][Regression][FDD][TC_17_4_1] error in CONN_CHM_LPBK_CNF
+ * changes for loop mode C
+ *
+ * 09 26 2016 slifer.hsueh
+ * [MOLY00205085] [MT6293][EL2] ERLC source codes integration from DEV to TRUNK
+ * ERLC source codes integration from DEV to TRUNK
+ *
+ * 01 04 2016 tero.miettinen
+ * [MOLY00155820] ERRC UMOLY updates
+ * NVRAM IF, ERRC - EL2 IF and ERRC update for 15 bit RLC LI field length.
+ *
+ * 07 03 2015 chi-chung.lin
+ * [MOLY00123918] [MT6291] Modify CHM code to provide eps_br_id in errc_erlcdl_rb_cfg_struct/errc_erlcul_rb_cfg_struct and fix compile warning
+ * [CHM] Code sync. from TK6291_DEV
+ *
+ * 02 02 2015 chi-chung.lin
+ * [MOLY00068710] [MT6291_DEV] Sync MOLY to MT6291_DEV
+ * MOLY->UMOLY code sync.
+ *
+ * 11 11 2014 yiting.cheng
+ * [MOLY00084042] [UMOLY] merge UMOLY_DEV to UMOLY trunk
+ * .
+ *
+ * 09 19 2014 chi-chung.lin
+ * [MOLY00073836] [MT6291][ERRC][CHM] LTE-A CHM development code check-in
+ * [CHM] MBMS interface check in
+ ****************************************************************************/
+
+/// @author mtk01733
+/// @date 08/10/11
+
+#ifndef _MTK_LTE_ERRC_ERLCDL_SAP_H_
+#define _MTK_LTE_ERRC_ERLCDL_SAP_H_
+
+
+#include "el2_sap_common.h"
+#include "common_def.h"
+
+/*--------------------------------------------------------------------------
+ * MSG_ID_ERLCDL_ERRC_CCCH_DATA_IND
+ *--------------------------------------------------------------------------*/
+// no local parameters
+
+
+/*--------------------------------------------------------------------------
+ * MSG_ID_ERRC_ERLCDL_CONFIG_REQ (enum)
+ *--------------------------------------------------------------------------*/
+
+// t-Reordering
+typedef enum
+{
+ T_REORDER_MS0 = 0x00,
+ T_REORDER_MS5 = 0x01,
+ T_REORDER_MS10 = 0x02,
+ T_REORDER_MS15 = 0x03,
+ T_REORDER_MS20 = 0x04,
+ T_REORDER_MS25 = 0x05,
+ T_REORDER_MS30 = 0x06,
+ T_REORDER_MS35 = 0x07,
+ T_REORDER_MS40 = 0x08,
+ T_REORDER_MS45 = 0x09,
+ T_REORDER_MS50 = 0x0A,
+ T_REORDER_MS55 = 0x0B,
+ T_REORDER_MS60 = 0x0C,
+ T_REORDER_MS65 = 0x0D,
+ T_REORDER_MS70 = 0x0E,
+ T_REORDER_MS75 = 0x0F,
+ T_REORDER_MS80 = 0x10,
+ T_REORDER_MS85 = 0x11,
+ T_REORDER_MS90 = 0x12,
+ T_REORDER_MS95 = 0x13,
+ T_REORDER_MS100 = 0x14,
+ T_REORDER_MS110 = 0x15,
+ T_REORDER_MS120 = 0x16,
+ T_REORDER_MS130 = 0x17,
+ T_REORDER_MS140 = 0x18,
+ T_REORDER_MS150 = 0x19,
+ T_REORDER_MS160 = 0x1A,
+ T_REORDER_MS170 = 0x1B,
+ T_REORDER_MS180 = 0x1C,
+ T_REORDER_MS190 = 0x1D,
+ T_REORDER_MS200 = 0x1E,
+ T_REORDER_MS1600 = 0x1F
+} errc_erlcdl_t_reorder_enum;
+
+// t-StatusProhibit
+typedef enum
+{
+ T_STUS_PROH_MS0 = 0x00,
+ T_STUS_PROH_MS5 = 0x01,
+ T_STUS_PROH_MS10 = 0x02,
+ T_STUS_PROH_MS15 = 0x03,
+ T_STUS_PROH_MS20 = 0x04,
+ T_STUS_PROH_MS25 = 0x05,
+ T_STUS_PROH_MS30 = 0x06,
+ T_STUS_PROH_MS35 = 0x07,
+ T_STUS_PROH_MS40 = 0x08,
+ T_STUS_PROH_MS45 = 0x09,
+ T_STUS_PROH_MS50 = 0x0A,
+ T_STUS_PROH_MS55 = 0x0B,
+ T_STUS_PROH_MS60 = 0x0C,
+ T_STUS_PROH_MS65 = 0x0D,
+ T_STUS_PROH_MS70 = 0x0E,
+ T_STUS_PROH_MS75 = 0x0F,
+ T_STUS_PROH_MS80 = 0x10,
+ T_STUS_PROH_MS85 = 0x11,
+ T_STUS_PROH_MS90 = 0x12,
+ T_STUS_PROH_MS95 = 0x13,
+ T_STUS_PROH_MS100 = 0x14,
+ T_STUS_PROH_MS105 = 0x15,
+ T_STUS_PROH_MS110 = 0x16,
+ T_STUS_PROH_MS115 = 0x17,
+ T_STUS_PROH_MS120 = 0x18,
+ T_STUS_PROH_MS125 = 0x19,
+ T_STUS_PROH_MS130 = 0x1A,
+ T_STUS_PROH_MS135 = 0x1B,
+ T_STUS_PROH_MS140 = 0x1C,
+ T_STUS_PROH_MS145 = 0x1D,
+ T_STUS_PROH_MS150 = 0x1E,
+ T_STUS_PROH_MS155 = 0x1F,
+ T_STUS_PROH_MS160 = 0x20,
+ T_STUS_PROH_MS165 = 0x21,
+ T_STUS_PROH_MS170 = 0x22,
+ T_STUS_PROH_MS175 = 0x23,
+ T_STUS_PROH_MS180 = 0x24,
+ T_STUS_PROH_MS185 = 0x25,
+ T_STUS_PROH_MS190 = 0x26,
+ T_STUS_PROH_MS195 = 0x27,
+ T_STUS_PROH_MS200 = 0x28,
+ T_STUS_PROH_MS205 = 0x29,
+ T_STUS_PROH_MS210 = 0x2A,
+ T_STUS_PROH_MS215 = 0x2B,
+ T_STUS_PROH_MS220 = 0x2C,
+ T_STUS_PROH_MS225 = 0x2D,
+ T_STUS_PROH_MS230 = 0x2E,
+ T_STUS_PROH_MS235 = 0x2F,
+ T_STUS_PROH_MS240 = 0x30,
+ T_STUS_PROH_MS245 = 0x31,
+ T_STUS_PROH_MS250 = 0x32,
+ T_STUS_PROH_MS300 = 0x33,
+ T_STUS_PROH_MS350 = 0x34,
+ T_STUS_PROH_MS400 = 0x35,
+ T_STUS_PROH_MS450 = 0x36,
+ T_STUS_PROH_MS500 = 0x37,
+ T_STUS_PROH_MS800 = 0x38,
+ T_STUS_PROH_MS1000 = 0x39,
+ T_STUS_PROH_MS1200 = 0x3A,
+ T_STUS_PROH_MS1600 = 0x3B,
+ T_STUS_PROH_MS2000 = 0x3C,
+ T_STUS_PROH_MS2400 = 0x3D,
+
+} errc_erlcdl_t_stus_proh_enum;
+
+
+/*--------------------------------------------------------------------------
+ * MSG_ID_ERRC_ERLCDL_CONFIG_REQ (struct)
+ *--------------------------------------------------------------------------*/
+
+/// structure for AM entity (receiving side)
+typedef struct
+{
+ errc_erlcdl_t_reorder_enum t_reorder;
+ errc_erlcdl_t_stus_proh_enum t_stus_proh;
+ kal_bool li_field_len_15_bit;
+} errc_erlcdl_am_struct;
+
+
+/// configuration for DL UM entity
+typedef struct
+{
+ errc_erlc_sn_field_len_enum snf_len;
+ errc_erlcdl_t_reorder_enum t_reorder;
+ kal_uint8 flag_pdcp_long_sn;
+ kal_uint8 rsvd[3];
+
+} errc_erlcdl_um_struct;
+
+
+/// DL RB configuration (for RB establish/re-establish/re-configure)
+typedef struct
+{
+ errc_el2_rbid_enum rbid;
+ kal_uint8 lcid;
+ kal_uint8 rb_idx;
+ kal_uint8 rsvd;
+
+ errc_erlc_rb_mode_enum mode;
+ errc_erlc_rb_type_enum type;
+
+ /// RLC configuration
+ union {
+ errc_erlcdl_am_struct am_cfg;
+ errc_erlcdl_um_struct um_cfg;
+ } am_um_cfg;
+
+ /// eps bearer id, valid only when DRB and ERLC_MODE_EST/REEST/RECFG
+ kal_uint8 eps_br_id;
+
+} errc_erlcdl_rb_cfg_struct;
+
+
+/// DL RB configuration (for RB release)
+typedef struct
+{
+ kal_uint8 rb_idx; ///< RB index
+ errc_el2_rbid_enum rbid;
+ kal_bool ho_failure; ///< if HO failure, remove the new RB.
+ kal_uint8 rsvd;
+
+} errc_erlcdl_rb_rel_struct;
+
+/* CHM MBMS support start */
+typedef struct
+{
+
+ kal_uint8 mcch_idx;
+
+} errc_erlcdl_mcch_cfg_struct;
+
+typedef struct
+{
+
+ kal_uint8 mcch_idx;
+
+} errc_erlcdl_mcch_rel_struct;
+
+typedef struct
+{
+
+ // numbered by eRRC and not from NW,
+ // If one carrier is supported, range 0~7
+ // If two carriers are supported, range 0~15
+ kal_uint8 mrb_idx;
+ kal_uint8 loop_mode_c;
+
+} errc_erlcdl_mrb_cfg_struct;
+
+typedef struct
+{
+
+ kal_uint8 mrb_idx;
+
+} errc_erlcdl_mrb_rel_struct;
+
+/* CHM MBMS support end */
+
+/// MSG_ID_ERRC_ERLCDL_CONFIG_REQ structure
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 n_est_rb; // the number of RBs to be established
+ kal_uint8 n_mod_rb; // the number of RBs to be modified
+ kal_uint8 n_rel_rb; // the number of RBs to be released
+ kal_uint8 rsvd;
+
+ /** RB configurations for the RB to be established */
+ errc_erlcdl_rb_cfg_struct est_rb[MAX_NUM_RLC_CONFIG_RB];
+
+ /** RB configurations for the RB to be modified */
+ errc_erlcdl_rb_cfg_struct mod_rb[MAX_NUM_RLC_CONFIG_RB];
+
+ /** RB configurations for the RB to be released */
+ errc_erlcdl_rb_rel_struct rel_rb[MAX_NUM_RLC_CONFIG_RB];
+
+
+/* CHM MBMS support start */
+ kal_uint8 n_est_mcch[MAX_EMBMS_FREQ_SUPPORT];
+ kal_uint8 n_rel_mcch[MAX_EMBMS_FREQ_SUPPORT];
+ errc_erlcdl_mcch_cfg_struct est_mcch[MAX_EMBMS_FREQ_SUPPORT][MAX_EMBMS_MCCH_SUPPORT];
+ errc_erlcdl_mcch_rel_struct rel_mcch[MAX_EMBMS_FREQ_SUPPORT][MAX_EMBMS_MCCH_SUPPORT];
+
+ kal_uint8 n_est_mrb[MAX_EMBMS_FREQ_SUPPORT];
+ kal_uint8 n_rel_mrb[MAX_EMBMS_FREQ_SUPPORT];
+ errc_erlcdl_mrb_cfg_struct est_mrb[MAX_EMBMS_FREQ_SUPPORT][MAX_EMBMS_MRB_SUPPORT];
+ errc_erlcdl_mrb_rel_struct rel_mrb[MAX_EMBMS_FREQ_SUPPORT][MAX_EMBMS_MRB_SUPPORT];
+/* CHM MBMS support end */
+} errc_erlcdl_config_req_struct;
+
+
+
+/*--------------------------------------------------------------------------
+ * MSG_ID_ERRC_ERLCDL_CONFIG_CNF
+ * MSG_ID_ERRC_ERLCDL_TEST_CNF
+ *--------------------------------------------------------------------------*/
+
+/// MSG_ID_ERRC_ERLCDL_CONFIG_CNF structure
+/// MSG_ID_ERRC_ERLCDL_TEST_CNF structure
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ errc_el2_cfg_result_enum result;
+
+} errc_erlcdl_config_cnf_struct;
+
+
+
+/*--------------------------------------------------------------------------
+ * MSG_ID_ERRC_ERLCDL_SWITCH_VIRTUAL_CONNECTED_REQ
+ *--------------------------------------------------------------------------*/
+typedef struct
+{
+ LOCAL_PARA_HDR
+ errc_el2_switch_virtual_connected_enum status;
+
+} errc_erlcdl_switch_virtual_connected_req_struct;
+
+/*--------------------------------------------------------------------------
+ * MSG_ID_ERRC_ERLCDL_SWITCH_VIRTUAL_CONNECTED_CNF
+ *--------------------------------------------------------------------------*/
+
+//no contents in this CNF, success only
+
+
+
+/*--------------------------------------------------------------------------
+ * MSG_ID_ERRC_ERLCDL_TESTG_REQ (enum)
+ *--------------------------------------------------------------------------*/
+typedef enum
+{
+ ERLCDL_SAP_LB_CMD_MODE_C_DEACTIVATE = 0,
+ ERLCDL_SAP_LB_CMD_MODE_C_ACTIVATE,
+ ERLCDL_SAP_LB_CMD_MODE_NUM,
+ ERLCDL_SAP_LB_CMD_PAD = 0X7FFFFFFF
+}erlcdl_lb_cmd_enum;
+
+/*--------------------------------------------------------------------------
+ * MSG_ID_ERRC_ERLCDL_TEST_REQ (struct)
+ *--------------------------------------------------------------------------*/
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 ci;
+ kal_uint8 mrb_idx;
+
+ erlcdl_lb_cmd_enum cmd;
+}errc_erlcdl_test_req_struct;
+
+/*--------------------------------------------------------------------------
+ * MSG_ID_ERRC_ERLCDL_TEST_CNF
+ *--------------------------------------------------------------------------*/
+
+/// MSG_ID_ERRC_ERLCDL_CONFIG_CNF structure
+/// MSG_ID_ERRC_ERLCDL_TEST_CNF structure
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ errc_el2_cfg_result_enum result;
+
+} errc_erlcdl_test_cnf_struct;
+
+
+/*--------------------------------------------------------------------------
+ * MSG_ID_ERRC_ERLCDL_MTCH_PC_CNF (struct)
+ *--------------------------------------------------------------------------*/
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint32 packet_count;
+} errc_erlcdl_mtch_pc_cnf_struct;
+
+
+#endif
diff --git a/mcu/protocol/interface/el2/errc_erlcul_msg.h b/mcu/protocol/interface/el2/errc_erlcul_msg.h
new file mode 100644
index 0000000..fa7083c
--- /dev/null
+++ b/mcu/protocol/interface/el2/errc_erlcul_msg.h
@@ -0,0 +1,470 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * errc_erlcul_msg.h
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * ERRC-ERLCUL SAP file
+ * This file defines the structures and enumerations for the SAP between ERRC and ERLCUL
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 04 15 2020 lien-chih.hsu
+ * [MOLY00505240] [6297] EN-DC gaming HO enhancement
+ *
+ * [Gen97][R3MP][CHM] Gaming - Bring (earfcn,pci) in rlcul_config_req
+ *
+ * 12 04 2019 sh.pan
+ * [MOLY00462979] [Gen97]MOB/MEAS/NL1MOB 1001DEV to VMOLY patch back
+ *
+ * .
+ *
+ * 11 13 2019 tsung-ming.lee
+ * [MOLY00441387] [Gen97][ERRC][MOB] NSA& LTE Gaming cell list for mobility enhancement
+ *
+ * -new gaming proposal.
+ *
+ * 09 19 2019 tsung-ming.lee
+ * [MOLY00441387] [Gen97][ERRC][MOB] NSA& LTE Gaming cell list for mobility enhancement
+ * [NSA]Gaming cell offset.
+ *
+ * 07 24 2018 slifer.hsueh
+ * [MOLY00341790] [MT6295] UDC feature patch back
+ * Add udc_en field in errc_erlcul_rb_cfg_struct
+ *
+ * 02 06 2017 peter.yu
+ * [MOLY00207733] [MT6293][EL2] ERLCDL development
+ * [M-SIM] Sync R-SIM related interfaces, remove redundant message IDs related to ERLC.
+ *
+ * 09 26 2016 slifer.hsueh
+ * [MOLY00205085] [MT6293][EL2] ERLC source codes integration from DEV to TRUNK
+ * ERLC source codes integration from DEV to TRUNK
+ *
+ * 08 04 2016 wei.liao
+ * [MOLY00194969] [MT6293][EL2] ERLC-UL source codes integration from LTE to RD domain
+ * 1.Bug fix: Setup function ptr for retx port.
+ * 2.Bug fix: Fix lsf/rf info registeration for nack.
+ * 3.Add timer enum and config setting in ERLCUL for R13
+ * 4.Init D_ADDR=NULL to prevent the case first desc is normal
+ * (original queue encounter CLDMBA buffer shortage and stop processing)g
+ *
+ * 07 27 2016 jeremy.chen
+ * [MOLY00190683] [UMOLYA][6293] EL2 merge back to UMOLYA TRUNK & PS DEV
+ * [EL2][RD domain] Sync latest EL2 from LTE domain
+ *
+ * 01 04 2016 tero.miettinen
+ * [MOLY00155820] ERRC UMOLY updates
+ * NVRAM IF, ERRC - EL2 IF and ERRC update for 15 bit RLC LI field length.
+ *
+ * 07 03 2015 chi-chung.lin
+ * [MOLY00123918] [MT6291] Modify CHM code to provide eps_br_id in errc_erlcdl_rb_cfg_struct/errc_erlcul_rb_cfg_struct and fix compile warning
+ * [CHM] Code sync. from TK6291_DEV
+ *
+ * 04 08 2015 katie.tseng
+ * [MOLY00104186] [UMOLY] UMOLY code maintenance.
+ * 1. March 2015 MOLY CR sync on ERLC-DL: (1) VoLTE early RLF (2) log reduction
+ * 2. RLC gtest UT fix: set/reset gERLC_Trap_Msg_EN at setup() and teardown()
+ *
+ * 01 22 2014 jeremy.chen
+ * [MOLY00054589] [MT6290E2] add RLF indication from ERLC-DL
+ * rename ERRC_ERLCUL_STATUS_IND to ERRC_ERLC_RLF_IND and modify the interface for both ERLC-UL and ERLC-DL use
+ *
+ * 02 18 2013 jeremy.chen
+ * [MOLY00007127] [MT7208] EL2 enhancement in MOLY
+ * update the comments.
+ ****************************************************************************/
+
+/// @author mtk01733
+/// @date 08/10/11
+
+#ifndef _MTK_LTE_ERRC_ERLCUL_SAP_H_
+#define _MTK_LTE_ERRC_ERLCUL_SAP_H_
+
+
+#include "el2_sap_common.h"
+
+
+/*--------------------------------------------------------------------------
+ * MSG_ID_ERRC_ERLCUL_CONFIG_REQ (enum)
+ *--------------------------------------------------------------------------*/
+
+/// t-PollRetransmit
+typedef enum
+{
+ T_POLL_RETX_MS5 = 0x00,
+ T_POLL_RETX_MS10 = 0x01,
+ T_POLL_RETX_MS15 = 0x02,
+ T_POLL_RETX_MS20 = 0x03,
+ T_POLL_RETX_MS25 = 0x04,
+ T_POLL_RETX_MS30 = 0x05,
+ T_POLL_RETX_MS35 = 0x06,
+ T_POLL_RETX_MS40 = 0x07,
+ T_POLL_RETX_MS45 = 0x08,
+ T_POLL_RETX_MS50 = 0x09,
+ T_POLL_RETX_MS55 = 0x0A,
+ T_POLL_RETX_MS60 = 0x0B,
+ T_POLL_RETX_MS65 = 0x0C,
+ T_POLL_RETX_MS70 = 0x0D,
+ T_POLL_RETX_MS75 = 0x0E,
+ T_POLL_RETX_MS80 = 0x0F,
+ T_POLL_RETX_MS85 = 0x10,
+ T_POLL_RETX_MS90 = 0x11,
+ T_POLL_RETX_MS95 = 0x12,
+ T_POLL_RETX_MS100 = 0x13,
+ T_POLL_RETX_MS105 = 0x14,
+ T_POLL_RETX_MS110 = 0x15,
+ T_POLL_RETX_MS115 = 0x16,
+ T_POLL_RETX_MS120 = 0x17,
+ T_POLL_RETX_MS125 = 0x18,
+ T_POLL_RETX_MS130 = 0x19,
+ T_POLL_RETX_MS135 = 0x1A,
+ T_POLL_RETX_MS140 = 0x1B,
+ T_POLL_RETX_MS145 = 0x1C,
+ T_POLL_RETX_MS150 = 0x1D,
+ T_POLL_RETX_MS155 = 0x1E,
+ T_POLL_RETX_MS160 = 0x1F,
+ T_POLL_RETX_MS165 = 0x20,
+ T_POLL_RETX_MS170 = 0x21,
+ T_POLL_RETX_MS175 = 0x22,
+ T_POLL_RETX_MS180 = 0x23,
+ T_POLL_RETX_MS185 = 0x24,
+ T_POLL_RETX_MS190 = 0x25,
+ T_POLL_RETX_MS195 = 0x26,
+ T_POLL_RETX_MS200 = 0x27,
+ T_POLL_RETX_MS205 = 0x28,
+ T_POLL_RETX_MS210 = 0x29,
+ T_POLL_RETX_MS215 = 0x2A,
+ T_POLL_RETX_MS220 = 0x2B,
+ T_POLL_RETX_MS225 = 0x2C,
+ T_POLL_RETX_MS230 = 0x2D,
+ T_POLL_RETX_MS235 = 0x2E,
+ T_POLL_RETX_MS240 = 0x2F,
+ T_POLL_RETX_MS245 = 0x30,
+ T_POLL_RETX_MS250 = 0x31,
+ T_POLL_RETX_MS300 = 0x32,
+ T_POLL_RETX_MS350 = 0x33,
+ T_POLL_RETX_MS400 = 0x34,
+ T_POLL_RETX_MS450 = 0x35,
+ T_POLL_RETX_MS500 = 0x36,
+ T_POLL_RETX_MS800 = 0x37,
+ T_POLL_RETX_MS1000 = 0x38,
+ T_POLL_RETX_MS2000 = 0x39,
+ T_POLL_RETX_MS4000 = 0x3A
+
+} errc_erlcul_t_pollretx_enum;
+
+/// Poll PDU counter
+typedef enum
+{
+ POLL_PDU_P4 = 0x00,
+ POLL_PDU_P8 = 0x01,
+ POLL_PDU_P16 = 0x02,
+ POLL_PDU_P32 = 0x03,
+ POLL_PDU_P64 = 0x04,
+ POLL_PDU_P128 = 0x05,
+ POLL_PDU_P256 = 0x06,
+ POLL_PDU_PINF = 0x07
+} errc_erlcul_poll_pdu_enum;
+
+
+/// Poll byte counter
+typedef enum
+{
+ POLL_BYTE_KB25 = 0x00,
+ POLL_BYTE_KB50 = 0x01,
+ POLL_BYTE_KB75 = 0x02,
+ POLL_BYTE_KB100 = 0x03,
+ POLL_BYTE_KB125 = 0x04,
+ POLL_BYTE_KB250 = 0x05,
+ POLL_BYTE_KB375 = 0x06,
+ POLL_BYTE_KB500 = 0x07,
+ POLL_BYTE_KB750 = 0x08,
+ POLL_BYTE_KB1000 = 0x09,
+ POLL_BYTE_KB1250 = 0x0A,
+ POLL_BYTE_KB1500 = 0x0B,
+ POLL_BYTE_KB2000 = 0x0C,
+ POLL_BYTE_KB3000 = 0x0D,
+ POLL_BYTE_KBINF = 0x0E
+
+} errc_erlcul_poll_byte_enum;
+
+
+/// maximum retranmsission threshold
+typedef enum
+{
+ MAX_RETX_T1 = 0x00,
+ MAX_RETX_T2 = 0x01,
+ MAX_RETX_T3 = 0x02,
+ MAX_RETX_T4 = 0x03,
+ MAX_RETX_T6 = 0x04,
+ MAX_RETX_T8 = 0x05,
+ MAX_RETX_T16 = 0x06,
+ MAX_RETX_T32 = 0x07
+
+} errc_erlcul_max_retx_enum;
+
+
+
+/// PDCP SN length
+typedef enum
+{
+ PDCP_SN_LEN_05 = 05, // PDCP SN length = 05 bits (SRB)
+ PDCP_SN_LEN_07 = 07, // PDCP SN length = 07 bits (DRB UM)
+ PDCP_SN_LEN_12 = 12, // PDCP SN length = 12 bits (DRB AM or UM)
+ PDCP_SN_LEN_15 = 15, // PDCP SN length = 15 bits (DRB AM)
+// PDCP_SN_LEN_18 = 18, // PDCP SN length = 18 bits (DRB AM)
+
+} errc_erlcul_pdcp_sn_len_enum;
+
+typedef enum
+{
+ CELL_STATUS_INVALID = 0,
+ CELL_STATUS_NEW = 1,
+ CELL_STATUS_LONG_GOOD = 2,
+ CELL_STATUS_GOOD = 3,
+ CELL_STATUS_BAD = 4,
+ CELL_STATUS_VERY_BAD = 5,
+ CELL_STATUS_LONG_VERY_BAD = 6
+} errc_erlcul_gaming_status_enum;
+
+/*--------------------------------------------------------------------------
+ * MSG_ID_ERRC_ERLCUL_CONFIG_REQ (struct)
+ *--------------------------------------------------------------------------*/
+
+/// configuration AM entity (transmitting side)
+typedef struct
+{
+ errc_erlcul_t_pollretx_enum t_pollretx;
+ errc_erlcul_poll_pdu_enum poll_pdu;
+ errc_erlcul_poll_byte_enum poll_byte;
+ errc_erlcul_max_retx_enum max_retx;
+ kal_bool li_field_len_15_bit;
+} errc_erlcul_am_struct;
+
+
+/// configuration for UL UM entity
+typedef struct
+{
+ errc_erlc_sn_field_len_enum snf_len;
+
+} errc_erlcul_um_struct;
+
+
+/// UL RB configuration (for RB establish/re-establish/re-configure)
+typedef struct
+{
+ errc_el2_rbid_enum rbid;
+ kal_uint8 lcid;
+ kal_uint8 rb_idx;
+
+ // implementation note
+ // --------------------------------------------------------
+ // In MT6293, ERLCUL will assign PDCP SN for PDCP data PDU.
+ // Therefore, ERLCUL must obtain PDCP SN length from configuration.
+ // ----------------------------------------------------------------
+ // pdcp_sn_len = PDCP_SN_LEN_05/07/12/15
+
+ errc_erlcul_pdcp_sn_len_enum pdcp_sn_len;
+
+ // implementation note
+ // ----------------------------------------------------------------
+ // In MT6293, ERLCUL will describe PDCP data PDU depending on ROHC.
+ // Therefore, ERLCUL must identify ROHC enable status from configuration.
+ // ----------------------------------------------------------------------
+ // rohc_en = ROHC enable? KAL_TRUE: KAL_FALSE
+
+ kal_bool rohc_en;
+
+ errc_erlc_rb_mode_enum mode;
+ errc_erlc_rb_type_enum type;
+
+ /// RLC configuration
+ union {
+ errc_erlcul_am_struct am_cfg;
+ errc_erlcul_um_struct um_cfg;
+ } am_um_cfg;
+
+ /// logical channel configuration
+ errc_el2_lch_cfg lch_cfg;
+
+ /// eps bearer id, valid only when DRB and ERLC_MODE_EST/REEST/RECFG
+ kal_uint8 eps_br_id;
+
+ // implementation note
+ // ----------------------------------------------------------------
+ // In MT6293, ERLCUL will describe PDCP data PDU depending on UDC.
+ // Therefore, ERLCUL must identify such enable status from configuration.
+ // ----------------------------------------------------------------------
+ // udc_en = UDC enable? KAL_TRUE: KAL_FALSE
+
+ kal_bool udc_en;
+
+ kal_uint16 rsvd_2;
+
+} errc_erlcul_rb_cfg_struct;
+
+
+/// UL RB configuration (for RB release)
+typedef struct
+{
+ kal_uint8 rb_idx; ///< RB index
+ errc_el2_rbid_enum rbid; ///< RBID
+ kal_bool ho_failure; ///< if HO failure, remove the new RB.
+ kal_uint8 rsvd;
+
+} errc_erlcul_rb_rel_struct;
+
+
+/// MSG_ID_ERRC_ERLCDL_CONFIG_REQ structure
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 n_est_rb; // the number of RBs to be established
+ kal_uint8 n_mod_rb; // the number of RBs to be modified
+ kal_uint8 n_rel_rb; // the number of RBs to be released
+ kal_uint8 rsvd;
+
+ /** RB configurations for the RB to be established */
+ errc_erlcul_rb_cfg_struct est_rb[MAX_NUM_RLC_CONFIG_RB];
+
+ /** RB configurations for the RB to be modified */
+ errc_erlcul_rb_cfg_struct mod_rb[MAX_NUM_RLC_CONFIG_RB];
+
+ /** RB configurations for the RB to be released */
+ errc_erlcul_rb_rel_struct rel_rb[MAX_NUM_RLC_CONFIG_RB];
+
+ kal_uint16 pci;
+ kal_uint32 earfcn;
+
+} errc_erlcul_config_req_struct;
+
+
+
+/*--------------------------------------------------------------------------
+ * MSG_ID_ERRC_ERLCUL_CONFIG_CNF
+ *--------------------------------------------------------------------------*/
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ errc_el2_cfg_result_enum result;
+
+} errc_erlcul_config_cnf_struct;
+
+
+
+/*--------------------------------------------------------------------------
+ * MSG_ID_ERRC_ERLCUL_SRB1_ACK_REQ
+ *--------------------------------------------------------------------------*/
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ /// report control flag
+ /// - KAL_TRUE: start report
+ /// - KAL_FALSE: stop report
+ kal_bool report;
+
+ kal_uint8 rsvd_1;
+ kal_uint16 rsvd_2;
+
+} errc_erlcul_srb1_ack_req_struct;
+
+
+/*--------------------------------------------------------------------------
+ * MSG_ID_ERLCUL_ERRC_SRB1_ACK_CNF
+ *--------------------------------------------------------------------------*/
+// no local parameters
+
+
+/*--------------------------------------------------------------------------
+ * MSG_ID_ERRC_ERLCUL_SWITCH_VIRTUAL_CONNECTED_REQ
+ *--------------------------------------------------------------------------*/
+typedef struct
+{
+ LOCAL_PARA_HDR
+ errc_el2_switch_virtual_connected_enum status;
+
+} errc_erlcul_switch_virtual_connected_req_struct;
+
+/*--------------------------------------------------------------------------
+ * MSG_ID_ERRC_ERLCUL_SWITCH_VIRTUAL_CONNECTED_CNF
+ *--------------------------------------------------------------------------*/
+
+//no contents in this CNF, success only
+
+/*--------------------------------------------------------------------------
+ * MSG_ID_ERRC_ERLCUL_GAMING_CELL_INFO_NTF
+ *--------------------------------------------------------------------------*/
+
+#define MAX_REPORTED_CELL_NUM (10)
+
+typedef struct
+{
+ kal_uint16 pci;
+ kal_uint16 rsvd;
+ kal_uint32 earfcn;
+ errc_erlcul_gaming_status_enum cell_status;
+
+} errc_erlcul_gaming_cell_info_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 cell_num;
+ kal_uint16 rsvd;
+ errc_erlcul_gaming_cell_info_struct cell_info[MAX_REPORTED_CELL_NUM];
+
+} errc_erlcul_gaming_cell_info_ntf_struct;
+
+#endif
diff --git a/mcu/protocol/interface/el2/etc_upcm_struct.h b/mcu/protocol/interface/el2/etc_upcm_struct.h
new file mode 100644
index 0000000..9f932f9
--- /dev/null
+++ b/mcu/protocol/interface/el2/etc_upcm_struct.h
@@ -0,0 +1,92 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * etc_upcm_struct.h
+ *
+ * Project:
+ * --------
+ * TATAKA
+ *
+ * Description:
+ * ------------
+ * message and common structure definition between ETC and UPCM module
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ ****************************************************************************/
+
+#ifndef ETC_UPCM_STRUCT_INC
+#define ETC_UPCM_STRUCT_INC
+
+#include "l3_inc_local.h"
+
+/***** message structure definition *****/
+typedef struct
+{
+ LOCAL_PARA_HDR
+ kal_bool is_activate; /* KAL_TRUE: activate, KAL_FALSE: deactivate */
+} etc_upcm_testmode_req_struct;
+
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+ kal_uint8 result; /* 0: success, 1: status error */
+} etc_upcm_testmode_cnf_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+ kal_bool is_close; /* KAL_TRUE: close loop, KAL_FALSE: open loop */
+ kal_uint8 delay_time;
+} etc_upcm_testloop_req_struct;
+
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+ kal_uint8 result; /* 0: success, 1: status error */
+} etc_upcm_testloop_cnf_struct;
+
+
+#endif /* ----- #ifndef ETC_UPCM_STRUCT_INC ----- */
+
diff --git a/mcu/protocol/interface/el2/l1sp_el2_struct.h b/mcu/protocol/interface/el2/l1sp_el2_struct.h
new file mode 100644
index 0000000..de976bf
--- /dev/null
+++ b/mcu/protocol/interface/el2/l1sp_el2_struct.h
@@ -0,0 +1,168 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * l1sp_el2_struct.h
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * message and common structure definition between LTM and EL2 modules.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 08 24 2017 jia-shi.lin
+ * [MOLY00273519] [MT6763] volte data prediction design change
+ * volte data prediction design change
+ *
+ * 07 26 2017 jia-shi.lin
+ * [MOLY00266995] [MT6763] add normal mode for AAM report
+ * add normal mode for AAM report
+ *
+ * 05 23 2017 fu-shing.ju
+ * [MOLY00241210] [6293][Speech Driver]EVS Speech Driver
+ * EVS speech driver.
+ *
+ * 10 28 2016 jia-shi.lin
+ * [MOLY00194987] [MT6293][UMOLYA/PS DEV] EMAC maintenance
+ * emac timing report for volte dsp
+ *
+ * 10 28 2016 fu-shing.ju
+ * [MOLY00210308] [93MD]early porting.
+ * Modify AAM interface.
+ *
+ * 06 10 2015 fu-shing.ju
+ * [MOLY00091627] TK6291 development
+ * Add time information in l1sp_emac_volte_timing_info_struct.
+ ****************************************************************************/
+
+
+#ifndef _L1SP_EL2_STRUCT_H_
+#define _L1SP_EL2_STRUCT_H_
+
+/*
+2017/03/14 Add comment to clarify interface
+
+1. drx_period
+This field is same with long cycle period defined in 3GPP spec.
+The value means how often UE need to wake-up, 0 = no DRX configuration, possible value are 10,20,32,40,64,80,128,160,256,320,512,640,1024,1280,2048,2560.
+
+2. sr_period
+The value means how often UE can send SR, possible value are 1,2,5,10,20,40,80.
+This field value will be modified when this change will reduce UE power-consumption.
+When VSR is trigger, sr_period will possibly change into 20/40 ms in silence mode and 20ms in talking mode.
+When EVSR is trigger, sr_period will possibly change into 40ms in talking mode.
+
+ a. VSR
+ If DRX cycle < 20 ms || DRX cycle < SR period
+ Do not trigger VSR. use original SR period.
+ If DRX cycle < 40ms
+ If SR period >= 20 then use SR period, otherwise set period=20
+ If DRX cycle >= 40ms
+ Silence: if SR period >= 40 then use SR period, otherwise set period=40
+ Talking: if SR period >= 20 then use SR period, otherwise set period=20
+ b. eVSR
+ b.1 Base condition
+ CDRX cycle length == 40ms && SR periodicity < 40ms
+ b.2 Dynamic start condition
+ UL grant received in on duration && UL grant TBS > threshold for consecutive NSTART times
+ b.3 Dynamic stop condition
+ Data exists in VoLTE RB > 30ms
+
+ If (b.1 && b.2 && !b.3)
+ Talking mode will also set SR period = 40.
+
+3. time_to_next_on
+Define as the time duration between current time and next DRX on duration (wake-up).
+
+4. time_to_trigger_sr
+Define as the time duration between current time and next SR.
+
+5. current_time_us
+Define as current time that use ust_get_current_time to get.
+*/
+#include "kal_public_api.h"
+
+typedef enum{
+ SP4G_AAMPLUS_STA_SILENCE = 0,
+ SP4G_AAMPLUS_STA_TALK,
+ SP4G_AAMPLUS_STA_SID_FIRST
+}SP4G_AAMPlus_State_t;
+
+typedef enum{
+ L1SP_EMAC_REPORT_MODE_SR_0_AFTER_HO = 0,
+ L1SP_EMAC_REPORT_MODE_NORMAL = 1
+}l1sp_emac_report_mode_e;
+
+typedef struct{
+ LOCAL_PARA_HDR
+ //raw information from speech driver
+ SP4G_AAMPlus_State_t silence_talk;
+ kal_uint32 notify_to_data_ms;
+ kal_uint32 issue_time;
+}l1sp_emac_volte_notify_mode_change_struct;
+
+
+typedef struct{
+ LOCAL_PARA_HDR
+ //raw information from eMAC
+ kal_uint32 RX_period; //ms
+ kal_uint32 TX_period; //ms
+ kal_uint32 time2nextRX; //ms
+ kal_uint32 time2nextTX; //ms
+ kal_uint32 issueTime; //ms
+}l1sp_emac_resync_info_struct;
+
+
+typedef struct{
+ kal_uint32 drx_period;
+ kal_uint32 sr_period;
+ kal_uint32 time_to_next_on;
+ kal_uint32 time_to_trig_sr;
+ kal_uint32 current_time_us;
+}l1sp_emac_volte_timing_info_struct;
+
+#endif /* ----- #ifndef _L1SP_EL2_STRUCT_H_ ----- */
+
diff --git a/mcu/protocol/interface/el2/ltm.h b/mcu/protocol/interface/el2/ltm.h
new file mode 100644
index 0000000..4596c71
--- /dev/null
+++ b/mcu/protocol/interface/el2/ltm.h
@@ -0,0 +1,152 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ltm.h
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ *
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 12 17 2012 moja.hsu
+ * [MOLY00007625] Maintain code
+ * adjust interface usage.
+ ****************************************************************************/
+/*
+ * =====================================================================================
+ *
+ * Filename: ltm.h
+ *
+ * Description: LTM (LTE traffic manager exported header file)
+ *
+ * Created: 2011/10/28 ¤U¤È 07:03:55
+ * Author: mtk01641 (moja)
+ * =====================================================================================
+ */
+#ifndef LTM_INC
+#define LTM_INC
+
+#include "kal_public_api.h"
+#include "ratcommon.h"
+
+/*
+ * lte tick source notify callback prototype.
+ * is_lte_tick: KAL_TRUE - has LTE tick.
+ * KAL_FLAE - may no LTE tick.
+ */
+typedef void (*ltm_multi_notify_lte_tick_f)(kal_bool is_lte_tick);
+
+/**
+ * @brief ltm_multiinit
+ * Init LTM module.
+ *
+ * @return TRUE
+ */
+kal_bool ltm_multi_init(void);
+
+/**
+ * @brief ltm_multiinit
+ * Reset LTM module.
+ *
+ * @return TRUE
+ */
+kal_bool ltm_multi_reset(void);
+
+/**
+ * @brief ltm_multion_ilm
+ * Receive ILM message
+ *
+ * @param ilm
+ */
+void ltm_multi_on_ilm(ilm_struct *p_ilm);
+
+/**
+ * @brief ltm_multircv_ul_sdu
+ * Receive UL SDUs. UL SDU are GPD list.
+ *
+ * @param ebi EPSB ID
+ * @param p_head SDU list head. (GPD based)
+ * @param p_tail SDU list tail. (GPD based)
+ */
+void ltm_multi_rcv_ul_sdu(kal_uint32 ebi, ratcmn_ul_sdu_t *p_sdus);
+
+/**
+ * @brief ltm_multireg_cbk_notify_lte_tick
+ * Register callback function.
+ * For get if there is a LTE tick source.
+ *
+ * @param pf_notify callback function.
+ */
+void ltm_multi_reg_cbk_notify_lte_tick(ltm_multi_notify_lte_tick_f pf_notify);
+
+/**
+ * @brief ltm_multireg_cbk_dlvr_dl_sdu
+ * Register callback for deliver DL SDUs.
+ *
+ * @param pf_dlvr_sdu
+ */
+void ltm_multi_reg_cbk_dlvr_dl_sdu(ratcmn_dlvr_dl_sdu_f pf_dlvr_sdu);
+
+/**
+ * @brief ltm_multi_reg_cbk_hook_ul
+ * Register callback for LTE UL traffic.
+ *
+ * @param pf_hook
+ */
+void ltm_multi_reg_cbk_hook_ul(ratcmn_hook_ul_f pf_hook);
+
+/**
+ * @brief ltm_multi_reg_cbk_rollback_ul_sdu
+ * Register callback for LTE UL traffic rollback.
+ *
+ * @param pf_hook
+ */
+void ltm_multi_reg_cbk_rollback_ul_sdu(ratcmn_rollback_sdu_f pf_rollback);
+#endif /* ----- #ifndef LTM_INC ----- */
+
diff --git a/mcu/protocol/interface/el2/ltm_el2_struct.h b/mcu/protocol/interface/el2/ltm_el2_struct.h
new file mode 100644
index 0000000..e853777
--- /dev/null
+++ b/mcu/protocol/interface/el2/ltm_el2_struct.h
@@ -0,0 +1,133 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ltm_el2_struct.h
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * message and common structure definition between LTM and EL2 modules.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 12 13 2013 steve.kao
+ * [MOLY00048789] [MT6290E2][EL2 RTD] UE not triggering UL data transmission
+ * Integrate change for using OS tick in OA domain
+ *
+ * 11 22 2013 timothy.yao
+ * [MOLY00047052] add trace/code for LV
+ * modify ulsdu_info structure for ipid
+ *
+ * 06 17 2013 clark.peng
+ * [MOLY00025883] [MT6290][EL2] Move shared definitions in ROHC and EL2 to OA domain
+ *
+ ****************************************************************************/
+
+
+#ifndef LTM_EL2_STRUCT_INC
+#define LTM_EL2_STRUCT_INC
+
+#include "qmu_bm.h"
+
+/**
+ * @brief DRB UL-SDU info Header
+ *
+ * note:
+ * - location : in SW control field of BM-header
+ */
+typedef struct
+{
+ /*** this 4 bytes is reserved for UPCM, DO NOT change the location ***/
+ kal_uint16 ipid;
+ kal_uint16 rsvd;
+
+ /*** Don't change the following 4 bytes layout, because ltm will use 4 bytes write to clean it***/
+#define ULSDU_INFO_HEAD_FLAG_PRIORITY 0x01
+#define ULSDU_INFO_HEAD_FLAG_CTRL_PDU 0x02
+#define ULSDU_INFO_HEAD_FLAG_RETX_WI_SN 0x04
+ kal_uint8 flag_bmp;
+ kal_uint8 rsv1;
+ kal_uint16 ori_hdr_sz;
+ /*** Don't change the above 4 bytes layout, because ltm will use 4 bytes write to clean it***/
+ /* pad for maintaining original structure when ABS TICK was used */
+ kal_uint32 rsv2;
+ /* entry tick, it will be filled by ltm using 32-bit OS tick */
+ kal_uint32 tick;
+
+ /* Tx HFN & SN */
+ kal_uint32 pdcp_count;
+}drb_ulsdu_info_head_t;
+#define GET_ULSDU_INFO_HEAD(_p) ((drb_ulsdu_info_head_t*)QBM_DES_GET_SW_CTRL_FIELD(_p))
+
+/* Get Macros */
+#define GET_DRB_ULSDU_PRIDATA(_p) \
+ (GET_ULSDU_INFO_HEAD(_p)->flag_bmp & ULSDU_INFO_HEAD_FLAG_PRIORITY)
+#define GET_DRB_ULSDU_CTRLPDU(_p) \
+ (GET_ULSDU_INFO_HEAD(_p)->flag_bmp & ULSDU_INFO_HEAD_FLAG_CTRL_PDU)
+#define GET_DRB_ULSDU_RETX(_p) \
+ (GET_ULSDU_INFO_HEAD(_p)->flag_bmp & ULSDU_INFO_HEAD_FLAG_RETX_WI_SN)
+
+/* Set Macros */
+#define SET_DRB_ULSDU_PRIDATA(_p) \
+ (GET_ULSDU_INFO_HEAD(_p)->flag_bmp |= ULSDU_INFO_HEAD_FLAG_PRIORITY)
+#define SET_DRB_ULSDU_CTRLPDU(_p) \
+ (GET_ULSDU_INFO_HEAD(_p)->flag_bmp |= ULSDU_INFO_HEAD_FLAG_CTRL_PDU)
+#define SET_DRB_ULSDU_RETX(_p) \
+ (GET_ULSDU_INFO_HEAD(_p)->flag_bmp |= ULSDU_INFO_HEAD_FLAG_RETX_WI_SN)
+
+/* Clear Macros */
+#define CLR_DRB_ULSDU_PRIDATA(_p) \
+ (GET_ULSDU_INFO_HEAD(_p)->flag_bmp &= ~ULSDU_INFO_HEAD_FLAG_PRIORITY)
+#define CLR_DRB_ULSDU_CTRLPDU(_p) \
+ (GET_ULSDU_INFO_HEAD(_p)->flag_bmp &= ~ULSDU_INFO_HEAD_FLAG_CTRL_PDU)
+#define CLR_DRB_ULSDU_RETX(_p) \
+ (GET_ULSDU_INFO_HEAD(_p)->flag_bmp &= ~ULSDU_INFO_HEAD_FLAG_RETX_WI_SN)
+#define CLR_DRB_ULSDU_FLAG_BMP(_p) \
+ (GET_ULSDU_INFO_HEAD(_p)->flag_bmp = 0)
+
+
+#endif /* ----- #ifndef LTM_EL2_STRUCT_INC ----- */
+
diff --git a/mcu/protocol/interface/el2/trace/el2_trc.h b/mcu/protocol/interface/el2/trace/el2_trc.h
new file mode 100644
index 0000000..1a794aa
--- /dev/null
+++ b/mcu/protocol/interface/el2/trace/el2_trc.h
@@ -0,0 +1,95 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * el2_trc.h
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * LTE Layer 2 trace definition.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 12 14 2017 i-feng.chen
+ * [MOLY00295624] [EPDCP][RJIL] Print ROHC compression and decompression info on PS integrated
+ *
+ * [R3][EPDCP][RJIL] Print ROHC compression and decompression info on PS integrated
+ *
+ * 06 22 2017 nicole.hsu
+ * [MOLY00259119] [MT6763][EL2] EMAC/EL2EM/EL2POW maintenance
+ * [TRUNK] add emacdl trace dump
+ *
+ * 03 30 2017 mf.jhang
+ * [MOLY00194987] [MT6293][UMOLYA/PS DEV] EMAC maintenance
+ * . Add PS trace while assert
+ *
+ ****************************************************************************/
+#ifndef _EL2_TRC_H
+#define _EL2_TRC_H
+#ifndef GEN_FOR_PC
+ #include "stack_config.h"
+#endif
+#include "kal_public_defs.h"
+#include "dhl_trace.h"
+#if !defined(GEN_FOR_PC)
+#if defined(__DHL_MODULE__) || defined(__CUSTOM_RELEASE__)
+#endif
+#endif
+/* ---------------------- Trace Function ------------------ */
+/*#define EL2_PUBLIC_TRACE0(msg_index) dhl_internal_trace(TRACE_INFO, 0, DHL_ACCESS_LEVEL_1_ALL_USER, msg_index)*/
+/*#define EL2_PUBLIC_TRACE1(msg_index, a1) dhl_internal_trace(TRACE_INFO, 0, DHL_ACCESS_LEVEL_1_ALL_USER, msg_index, a1)*/
+/*#define EL2_PUBLIC_TRACE2(msg_index, a1, a2) dhl_internal_trace(TRACE_INFO, 0, DHL_ACCESS_LEVEL_1_ALL_USER, msg_index, a1, a2) */
+/*#define EL2_PUBLIC_TRACE3(msg_index, a1, a2, a3) dhl_internal_trace(TRACE_INFO, 0, DHL_ACCESS_LEVEL_1_ALL_USER, msg_index, a1, a2, a3) */
+/*#define EL2_PUBLIC_TRACE4(msg_index, a1, a2, a3, a4) dhl_internal_trace(TRACE_INFO, 0, DHL_ACCESS_LEVEL_1_ALL_USER, msg_index, a1, a2, a3, a4)*/
+/*#define EL2_PUBLIC_TRACE5(msg_index, a1, a2, a3, a4, a5) dhl_internal_trace(TRACE_INFO, 0, DHL_ACCESS_LEVEL_1_ALL_USER, msg_index, a1, a2, a3, a4, a5)*/
+/*#define EL2_PUBLIC_TRACE6(msg_index, a1, a2, a3, a4, a5, a6) dhl_internal_trace(TRACE_INFO, 0, DHL_ACCESS_LEVEL_1_ALL_USER, msg_index, a1, a2, a3, a4, a5, a6)*/
+/*#define EL2_PUBLIC_TRACE7(msg_index, a1, a2, a3, a4, a5, a6, a7) dhl_internal_trace(TRACE_INFO, 0, DHL_ACCESS_LEVEL_1_ALL_USER, msg_index, a1, a2, a3, a4, a5, a6, a7)*/
+/*#define EL2_PUBLIC_TRACE8(msg_index, a1, a2, a3, a4, a5, a6, a7, a8) dhl_internal_trace(TRACE_INFO, 0, DHL_ACCESS_LEVEL_1_ALL_USER, msg_index, a1, a2, a3, a4, a5, a6, a7, a8)*/
+/*#define EL2_PUBLIC_TRACE9(msg_index, a1, a2, a3, a4, a5, a6, a7, a8, a9) dhl_internal_trace(TRACE_INFO, 0, DHL_ACCESS_LEVEL_1_ALL_USER, msg_index, a1, a2, a3, a4, a5, a6, a7, a8, a9)*/
+#if !defined(GEN_FOR_PC)
+#include"el2_trc_mod_el2portal_utmd.h"
+#endif
+#endif /* _EL2_TRC_H */
diff --git a/mcu/protocol/interface/el2/trace/el2_trc_mod_el2portal_utmd.json b/mcu/protocol/interface/el2/trace/el2_trc_mod_el2portal_utmd.json
new file mode 100644
index 0000000..6a8def1
--- /dev/null
+++ b/mcu/protocol/interface/el2/trace/el2_trc_mod_el2portal_utmd.json
@@ -0,0 +1,273 @@
+{
+ "endGen": "Legacy",
+ "startGen": "Legacy",
+ "legacyParameters": {},
+ "module": "MOD_EL2PORTAL",
+ "traceClassDefs": [
+ {
+ "TRACE_INFO": {
+ "debugLevel": "Ultra-Low",
+ "tag": [
+ "Baseline",
+ "TRACE_INFO"
+ ],
+ "traceType": "Public"
+ }
+ },
+ {
+ "TRACE_WARNING": {
+ "debugLevel": "Ultra-Low",
+ "tag": [
+ "Baseline",
+ "TRACE_WARNING"
+ ],
+ "traceType": "Public"
+ }
+ },
+ {
+ "TRACE_ERROR": {
+ "debugLevel": "Ultra-Low",
+ "tag": [
+ "Baseline",
+ "TRACE_ERROR"
+ ],
+ "traceType": "Public"
+ }
+ },
+ {
+ "TRACE_FUNC": {
+ "debugLevel": "Ultra-Low",
+ "tag": [
+ "Baseline",
+ "TRACE_FUNC"
+ ],
+ "traceType": "Public"
+ }
+ },
+ {
+ "TRACE_STATE": {
+ "debugLevel": "Ultra-Low",
+ "tag": [
+ "Baseline",
+ "TRACE_STATE"
+ ],
+ "traceType": "Public"
+ }
+ },
+ {
+ "TRACE_GROUP_1": {
+ "debugLevel": "Ultra-Low",
+ "tag": [
+ "Baseline",
+ "TRACE_GROUP1"
+ ],
+ "traceType": "Public"
+ }
+ },
+ {
+ "TRACE_GROUP_2": {
+ "debugLevel": "Ultra-Low",
+ "tag": [
+ "Baseline",
+ "TRACE_GROUP2"
+ ],
+ "traceType": "Public"
+ }
+ },
+ {
+ "TRACE_GROUP_3": {
+ "debugLevel": "Ultra-Low",
+ "tag": [
+ "Baseline",
+ "TRACE_GROUP3"
+ ],
+ "traceType": "Public"
+ }
+ },
+ {
+ "TRACE_GROUP_4": {
+ "debugLevel": "Ultra-Low",
+ "tag": [
+ "Baseline",
+ "TRACE_GROUP4"
+ ],
+ "traceType": "Public"
+ }
+ },
+ {
+ "TRACE_GROUP_5": {
+ "debugLevel": "Ultra-Low",
+ "tag": [
+ "Baseline",
+ "TRACE_GROUP5"
+ ],
+ "traceType": "Public"
+ }
+ },
+ {
+ "TRACE_GROUP_6": {
+ "debugLevel": "Ultra-Low",
+ "tag": [
+ "Baseline",
+ "TRACE_GROUP6"
+ ],
+ "traceType": "Public"
+ }
+ },
+ {
+ "TRACE_GROUP_7": {
+ "debugLevel": "Ultra-Low",
+ "tag": [
+ "Baseline",
+ "TRACE_GROUP7"
+ ],
+ "traceType": "Public"
+ }
+ },
+ {
+ "TRACE_GROUP_8": {
+ "debugLevel": "Ultra-Low",
+ "tag": [
+ "Baseline",
+ "TRACE_GROUP8"
+ ],
+ "traceType": "Public"
+ }
+ },
+ {
+ "TRACE_GROUP_9": {
+ "debugLevel": "Ultra-Low",
+ "tag": [
+ "Baseline",
+ "TRACE_GROUP9"
+ ],
+ "traceType": "Public"
+ }
+ },
+ {
+ "TRACE_GROUP_10": {
+ "debugLevel": "Ultra-Low",
+ "tag": [
+ "Baseline",
+ "TRACE_GROUP10"
+ ],
+ "traceType": "Public"
+ }
+ }
+ ],
+ "traceDefs": [
+ {
+ "EL2_ASSERT_LOG_ENTER": {
+ "_comment": "Trace reference not found",
+ "format": "Enter el2_exception_custom_logging ",
+ "traceClass": "TRACE_INFO"
+ }
+ },
+ {
+ "EL2_ASSERT_LOG_EXIT": {
+ "apiType": "index",
+ "format": "Exit el2_exception_custom_logging",
+ "traceClass": "TRACE_ERROR"
+ }
+ },
+ {
+ "EL2_TRACE_TIME": {
+ "_comment": "Trace reference not found",
+ "format": "abs_time: %u, cell_time %u",
+ "traceClass": "TRACE_INFO"
+ }
+ },
+ {
+ "EMAC_TRACE_INPUT_0001": {
+ "_comment": "Trace reference not found",
+ "format": "[EMAC][DL-HARQ] \\n<crc: cc_idx=%u, dl_harq_id=%u, tb_valid=%u%u, rlt=%u%u>",
+ "traceClass": "TRACE_INFO"
+ }
+ },
+ {
+ "EMAC_TRACE_INPUT_0010": {
+ "_comment": "Trace reference not found",
+ "format": "[EMAC][UL-HARQ] \\n<phich: ul_cc_idx=%u, harq_id=%u, rlt=%u>",
+ "traceClass": "TRACE_INFO"
+ }
+ },
+ {
+ "EMAC_TRACE_INPUT_0100": {
+ "_comment": "Trace reference not found",
+ "format": "[EMAC][DL-HARQ] \\n<dldci: t-%u, cc_idx=%u, dl_harq_id=%u, type=1, sps=0, tb_valid=%u%u, new=%u%u>",
+ "traceClass": "TRACE_INFO"
+ }
+ },
+ {
+ "EMAC_TRACE_INPUT_1000": {
+ "_comment": "Trace reference not found",
+ "format": "[EMAC][UL-HARQ] \\n<uldci: t-%u, ul_cc_idx=%u, type=0, ndi=%u, rv=%u, tbs=%u, k=%u>",
+ "traceClass": "TRACE_INFO"
+ }
+ },
+ {
+ "EMAC_TRACE_UL_HARQ_TL_INFO": {
+ "_comment": "Trace reference not found",
+ "format": "[EMAC][UL-HARQ] ul_cc_idx=%u <ul status=%X, type=%u, harq_id=%u, ndi=%u, mode=%u, ack=%u, tx=%u, mux=%u>",
+ "traceClass": "TRACE_INFO"
+ }
+ },
+ {
+ "EMAC_TRACE_UL_HARQ_TX_INFO": {
+ "_comment": "Trace reference not found",
+ "format": "[EMAC][UL-HARQ] ul_cc_idx=%u <harq status=%X, buffer=%u, bundle=%u, rv=%u, cnt=%u, tbs=%u>",
+ "traceClass": "TRACE_INFO"
+ }
+ },
+ {
+ "EMAC_TRACE_UL_HARQ_RETX_INFO": {
+ "_comment": "Trace reference not found",
+ "format": "[EMAC][UL-HARQ] ul_cc_idx=%u <retx time=%u, phich time=%u, uldci num=%u, uldci1=%u, uldci2=%u>",
+ "traceClass": "TRACE_INFO"
+ }
+ },
+ {
+ "EMAC_TRACE_UL_HARQ_CLOSE": {
+ "_comment": "Trace reference not found",
+ "format": "[EMAC][UL-HARQ] ul_cc_idx=%u <harq_id=%u close>",
+ "traceClass": "TRACE_INFO"
+ }
+ },
+ {
+ "EMAC_TRACE_UL_HARQ_ACTIVATE": {
+ "_comment": "Trace reference not found",
+ "format": "[EMAC][UL-HARQ] ul_cc_idx=%u <harq_id=%u activate>",
+ "traceClass": "TRACE_INFO"
+ }
+ },
+ {
+ "EMAC_TRACE_DRX_STATUS": {
+ "_comment": "Trace reference not found",
+ "format": "[EMAC][TTI] <dci_decode_time_diff=%u> <drx_status: n1=%u, n2=%u> <slp_status: r_n1=%u, r_n2=%u, c_n1=%u, c_n2=%u>",
+ "traceClass": "TRACE_INFO"
+ }
+ },
+ {
+ "EMAC_TRACE_DL_TB_INFO": {
+ "_comment": "Trace reference not found",
+ "format": "[EMAC][DL][TB] \\n<TB %u: %X>",
+ "traceClass": "TRACE_INFO"
+ }
+ },
+ {
+ "EPDCP_TRACE_UL_ROHC_C_INFO": {
+ "_comment": "Trace reference not found",
+ "format": "[EPDCP][UL][ROHC] DRB RoHC data compressed: rb_idx=%d, ori hdr sz =%u, compr hdr sz=%u",
+ "traceClass": "TRACE_INFO"
+ }
+ },
+ {
+ "EPDCP_TRACE_DL_ROHC_IN_OUT": {
+ "_comment": "Trace reference not found",
+ "format": "[EPDCP][DL][ROHC] DRB RoHC data processed: rb_idx=%d, input num=%u, output num=%u",
+ "traceClass": "TRACE_INFO"
+ }
+ }
+ ],
+ "traceFamily": "PS"
+}
\ No newline at end of file
diff --git a/mcu/protocol/interface/el2/trace/emac_trace_1_utmd.json b/mcu/protocol/interface/el2/trace/emac_trace_1_utmd.json
new file mode 100644
index 0000000..186bab4
--- /dev/null
+++ b/mcu/protocol/interface/el2/trace/emac_trace_1_utmd.json
@@ -0,0 +1,1918 @@
+{
+ "endGen": "Legacy",
+ "startGen": "Legacy",
+ "legacyParameters": {
+ "codeSection": "TCMFORCE",
+ "l2BufferSetting": "L2_BUFFER_EL2",
+ "l2MaxArg": 15,
+ "modemType": "LTE_L2"
+ },
+ "module": "EMAC_1",
+ "stringTranslationDefs": [],
+ "traceClassDefs": [
+ {
+ "EMAC_LV1": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "EMAC_LV2": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "EMAC_LV3": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "EMAC_WARN": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "EMAC_ERROR": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "EMAC_DEBUG": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ }
+ ],
+ "traceDefs": [
+ {
+ "EMAC_LOG_DUMMY_4": {
+ "format": "[EMAC] Dummy Log %l, %l, %l, %l",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_DUMP_4": {
+ "format": "[EMAC] Dump: %xl %xl %xl %xl",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_GROUP_ASSERT": {
+ "format": "[EMAC] group_assert_id=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_ALL_INFO": {
+ "format": "[EMAC][TTI] \\n<dci_decode_time_diff=%ul:2> \\n<drx_status: n1=%ul:2, n2=%ul:2> \\n<slp_status: r_n1=%ul:3, r_n2=%ul:3, c_n1=%ul:3, c_n2=%ul:3> \\n<drx_inact_tmr_start: p1=%ul:1, p2=%ul:1%pl:12>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TX_REQ_CHANGE": {
+ "format": "[EMAC][WARN][UL-HARQ][RA][SR] TX REQ BMP %xl changed by L1 to %xl",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_LOG_PROTOCOL_IDX_CHANGE": {
+ "format": "[EMAC] old el1_protocol_idx=%ub, new el1_protocol_idx=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_PROTOCOL_IDX_RRC_EL1_MISMATCH": {
+ "format": "[EMAC][WARN] protocol_idx mismatch during rrc non-reset, el1_protocol_idx=%ub, errc_protocol_idx=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_LOG_ERT_SF_PROC_ONGOING": {
+ "format": "[EMAC][WARN] ert sf proc is still on-going, abs_time=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_LOG_CHECKSUM_ERROR_BYPASS": {
+ "format": "[EMAC][WARN] tx checksum error bypass, tx_abs_time=%ul, bypass=%ub",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_LOG_HRT_PROFILE_START": {
+ "format": "[EMAC][HRT] start: %Memac_txlisr_func_e, frc=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_HRT_PROFILE_END": {
+ "format": "[EMAC][HRT] end: %Memac_txlisr_func_e, frc=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_ERT_LOG_OUTPUT_BMP": {
+ "format": "[EMAC][ERT] TXLISR output bitmap: %xl:4 %xl:4 %xl:4 %xl:4 %xl:4 %xl:4 %xl:4 %xl:4",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_EL2_SBP_FEAT": {
+ "format": "[EMAC][SBP] el2 SBP feature: protocol_idx_0=%xl, protocol_idx_1=%xl, protocol_idx_2=%xl, protocol_idx_3=%xl",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_EMAC_EDYN_FEAT": {
+ "format": "[EMAC][FEAT] emac dynamic feature=%xl",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_PDCCH_WARN___PHICH_TARGET_INVALID": {
+ "format": "[EMAC][PDCCH][PHICH] invalid target harq",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_PDCCH_WARN___DCI_SLEEP_DROP": {
+ "format": "[EMAC][PDCCH] dci sleep state drop",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_PDCCH_WARN___ASYNC_SYNC_MODE_DCI_DROP": {
+ "format": "[EMAC][PDCCH] async-sync mode dci drop: reason=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___INIT": {
+ "format": "[EMAC][UL-HARQ] initialization",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___GRANT_RESOLUTION": {
+ "format": "[EMAC][UL-HARQ][GRANT] resolve with ulsch_grant_type=%ub, discard_input_grant=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___GRANT_CLEAR_RAR": {
+ "format": "[EMAC][UL-HARQ][GRANT] clear rar grant: ul_cc_idx=%ub, tx_abs_time_32=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___HARQ_TX_MAX_REACHED": {
+ "format": "[EMAC][UL-HARQ] harq last tx: tx max reached: ul_cc_idx=%ub, harq_id=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___HARQ_TX_MAX_REACHED_SKIP_RETX": {
+ "format": "[EMAC][UL-HARQ] harq last tx: tx max reached after skip retx: ul_cc_idx=%ub, harq_id=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___HARQ_TX_MAX_REACHED_REPETITION": {
+ "format": "[EMAC][UL-HARQ] harq last tx: tx max reached for async harq repetition: ul_cc_idx=%ub, harq_id=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___HARQ_MSG3_RETX_COLLISION": {
+ "format": "[EMAC][UL-HARQ] harq last tx: msg3 harq collision: ul_cc_idx=%ub, harq_id=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___HARQ_PRONE_TO_UNSUCCESS": {
+ "format": "[EMAC][UL-HARQ] harq last tx: prone to unsuccess: ul_cc_idx=%ub, harq_id=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___HARQ_L2_LATENCY_REDUCTION": {
+ "format": "[EMAC][UL-HARQ] harq last tx: l2 latency reduction: ul_cc_idx=%ub, harq_id=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___HARQ_FLUSH_MSG3": {
+ "format": "[EMAC][UL-HARQ] harq flush msg3",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___HARQ_CLOSE_ALL": {
+ "format": "[EMAC][UL-HARQ] harq close all",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___HARQ_CLOSE_SCELL_ALL": {
+ "format": "[EMAC][UL-HARQ] harq close scell all: cc_idx=%ub, ul_cc_idx=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___HARQ_CLOSE": {
+ "format": "[EMAC][UL-HARQ] ul_cc_idx=%ub <harq_id=%ub close>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___HARQ_DETACH": {
+ "format": "[EMAC][UL-HARQ] ul_cc_idx=%ub <harq_id=%ub detach>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___TTI_PCELL_TA_NOT_RUNNING": {
+ "format": "[EMAC][UL-HARQ][TTI] pcell ta timer not running",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___TTI_NO_TX_OPPORTUNITY": {
+ "format": "[EMAC][UL-HARQ][TTI] ul_cc_idx=%ub, cell_active=%ub, ta_running=%ub, b_ul_sf=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___TX_MODE_GRANT_TCRNTI_AS_NEW_CRNTI": {
+ "format": "[EMAC][UL-HARQ][TM] grant only: tc-rnti as new c-rnti",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___TX_MODE_CRNTI_GRANT_AS_TCRNTI": {
+ "format": "[EMAC][UL-HARQ][TM] c-rnti grant: as for tc-rnti harq",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___TX_MODE_TCRNTI_GRANT_AS_CRNTI": {
+ "format": "[EMAC][UL-HARQ][TM] tc-rnti grant: as c-rnti",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___TX_MODE_RV0_TBS_MISMATCHED_RETX_AS_NEW": {
+ "format": "[EMAC][UL-HARQ][TM] rv0 tbs mismatched retx as new",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___TX_MODE_DROP_GRANT_FOR_NONADP_RETX": {
+ "format": "[EMAC][UL-HARQ][TM] drop configured grant for non-adaptive retx",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___SETTING_NEW_MSG3": {
+ "format": "[EMAC][UL-HARQ][RA][SETTING] new msg3",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___RETX_INFO_FOR_CANCELLED_RETX": {
+ "format": "[EMAC][UL-HARQ][RETX] for cancelled retx: time_to_retx=%ub, pdcch_num=%ub, time_to_phich=%ub, time_to_pdcch[0]=%ub, time_to_pdcch[1]=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___RETX_NON_MSG3_HARQ_COLLISION": {
+ "format": "[EMAC][UL-HARQ][RETX] non-msg3 harq collision : close collided harq",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___ACKED_HARQ_WITH_RETX_GRANT": {
+ "format": "[EMAC][UL-HARQ][KPI] acked harq with retx grant",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_WARN___TX_MODE_GRANT_INVALID": {
+ "format": "[EMAC][UL-HARQ][TM] discard grant: grant only: invalid grant",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_WARN___TX_MODE_CRNTI_GRANT_RETX_INVALID": {
+ "format": "[EMAC][UL-HARQ][TM] discard grant: c-rnti grant: retx invalid",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_WARN___TX_MODE_CRNTI_GRANT_AS_TCRNTI_RETX_INVALID": {
+ "format": "[EMAC][UL-HARQ][TM] discard grant: c-rnti grant: as for tc-rnti retx invalid",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_WARN___TX_MODE_CRNTI_GRANT_DROP": {
+ "format": "[EMAC][UL-HARQ][TM] discard grant: c-rnti grant: harq: rnti_type=%ub, b_same_ndi=%ub, b_index=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_WARN___TX_MODE_TCRNTI_GRANT_DROP": {
+ "format": "[EMAC][UL-HARQ][TM] discard grant: tc-rnti grant: harq: rnti_type=%ub, b_same_ndi=%ub, grant: rv=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_WARN___TX_MODE_SPS_RETX_TARGET_INVALID": {
+ "format": "[EMAC][UL-HARQ][TM] discard grant: sps retx grant: target invalid",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_WARN___TX_MODE_SPS_RETX_GRANT_INVALID": {
+ "format": "[EMAC][UL-HARQ][TM] discard grant: sps retx grant: rv=%ub, b_tbs_matched=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_WARN___TX_MODE_SPS_NEWTX_COLLISION_WITH_TCRNTI": {
+ "format": "[EMAC][UL-HARQ][TM] discard grant: sps newtx grant: collision with tc-rnti",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_WARN___TX_MODE_ASYNC_GRANT_COLLISION_WITH_HARQ": {
+ "format": "[EMAC][UL-HARQ][TM] discard grant: async grant: collision with online harq",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___IM_BUFFER_RESET": {
+ "format": "[EMAC][UL-HARQ][IM] reset",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___IM_BUFFER_RENEW": {
+ "format": "[EMAC][UL-HARQ][IM] renew: ul_cc_idx=%ub, harq_id=%ub, im_buffer_idx=%ub, lost_im_buffer_user=%xl",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___IM_BUFFER_GET_MSG3_BUFFER": {
+ "format": "[EMAC][UL-HARQ][IM] msg3_harq_user=%xl, msg3_tbs=%ud, b_reconstruct_msg3=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_WARN___IM_BUFFER_INVALID_MSG3_HARQ_USER": {
+ "format": "[EMAC][UL-HARQ][IM] invalid msg3 harq user",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_GEMINI_LOG___GEMINI_INIT": {
+ "format": "[EMAC][Gemini] initialization: retx_mode=%ub",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_GEMINI_LOG___GEMINI_RETX_MODE_CHANGE": {
+ "format": "[EMAC][Gemini] change retx_mode=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_GEMINI_LOG___GEMINI_SKIP_TX": {
+ "format": "[EMAC][Gemini] tx not allowed: tx_skip_reason=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_GEMINI_LOG___GEMINI_EXACT_GAP_START": {
+ "format": "[EMAC][Gemini] exact gap start: gemini_gap_rx_start_time_32=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_GEMINI_LOG___GEMINI_EXACT_GAP_END": {
+ "format": "[EMAC][Gemini] exact gap end: gemini_gap_rx_end_time_32=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_GEMINI_LOG___GEMINI_PREDICTED_GAP_INFO": {
+ "format": "[EMAC][Gemini] predicted gap info: gap0_start_time_32=%ul, gap0_len=%ub, gap1_start_time_32=%ul, gap1_len=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_CFG_RRC_RESET_VIRTUAL_CONNECTED_ENTER": {
+ "format": "[EMAC][CFG] EMAC reset cause=VIRTUAL_CONNECTED_ENTER",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_CFG_RRC_RESET_VIRTUAL_CONNECTED_LEAVE_FAIL": {
+ "format": "[EMAC][CFG] EMAC reset cause=VIRTUAL_CONNECTED_LEAVE_FAIL",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DL_HARQ_LOG___INIT": {
+ "format": "[EMAC][DL-HARQ] initialization",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DL_HARQ_LOG___CRC_TARGET_ORIGINAL_STATE": {
+ "format": "[EMAC][DL-HARQ][CRC] original state: cc_idx=%ud:2, dl_harq_id=%ud:4, status=%xd:2, tb_crc_0=%ud:2, tb_crc_1=%ud:2%pd:4",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DL_HARQ_LOG___DCI_TARGET_HARQ_ORIGINAL_STATE": {
+ "format": "[EMAC][DL-HARQ][DCI] original state: cc_idx=%ud:2, dl_harq_id=%ud:4, status=%xd:2, tb_crc_0=%ud:2, tb_crc_1=%ud:2%pd:4",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DL_HARQ_LOG___DCI_TB_FLUSH_REQUESTED": {
+ "format": "[EMAC][DL-HARQ][DCI] tb flush requested: b_different_rnti=%ub, b_spsc_rnti=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DL_HARQ_LOG___FALSE_ALARM_TB_DETECTED": {
+ "format": "[EMAC][DL-HARQ] false alarm tb detected: cc_idx=%ub, harq_id=%ub, tb_id=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DL_HARQ_LOG___CLOSE_TB": {
+ "format": "[EMAC][DL-HARQ] close tb: cc_idx=%ub, harq_id=%ub, tb_id=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DL_HARQ_LOG___CLOSE_HARQ": {
+ "format": "[EMAC][DL-HARQ] close harq: cc_idx=%ub, harq_id=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DL_HARQ_LOG___CLOSE_HARQ_ALL": {
+ "format": "[EMAC][DL-HARQ] close harq all",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DL_HARQ_LOG___CLOSE_HARQ_SCELL": {
+ "format": "[EMAC][DL-HARQ] close harq scell: cc_idx=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DL_HARQ_WARN___CRC_TARGET_INVALID": {
+ "format": "[EMAC][DL-HARQ][CRC] invalid for target dci: tb_id=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_SPS_LOG___INIT": {
+ "format": "[EMAC][SPS] initialization",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SPS_LOG___DEACTIVATE": {
+ "format": "[EMAC][SPS] deactivate ul/dl sps",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SPS_LOG___DL_RELEASE": {
+ "format": "[EMAC][SPS][DL-HARQ] release",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SPS_LOG___DL_ACTIVATION": {
+ "format": "[EMAC][SPS][DL-HARQ] activation: current_dl_sps_abs_tx_time_32=%ul, next_dl_sps_abs_tx_time_32=%ul, dl_harq_id=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SPS_LOG___DL_UPDATE_NEXT": {
+ "format": "[EMAC][SPS][DL-HARQ] update next: next_dl_sps_abs_tx_time_32=%ul, dl_harq_id=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SPS_LOG___UL_RELEASE": {
+ "format": "[EMAC][SPS][UL-HARQ] release",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SPS_LOG___UL_ACTIVATION": {
+ "format": "[EMAC][SPS][UL-HARQ] activation: next_ul_sps_abs_tx_time_32=%ul, ul_sps_two_interval_offset=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SPS_LOG___UL_UPDATE_NEXT": {
+ "format": "[EMAC][SPS][UL-HARQ] update next: next_ul_sps_abs_tx_time_32=%ul, ul_sps_n_toggle=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SPS_LOG___UL_GRANT_INPUT": {
+ "format": "[EMAC][SPS][UL-HARQ] <uldci: t-0, ul_cc_idx=0, type=%ub, ndi=%ub, rv=%ub, tbs=%ud, k=%ul>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SPS_LOG___UL_MONITOR_MUX_REQ": {
+ "format": "[EMAC][SPS][UL-HARQ] monitor mux: newtx",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SPS_LOG___UL_MONITOR_MUX_RESULTS": {
+ "format": "[EMAC][SPS][UL-HARQ] monitor mux: result: b_ul_sps_active=%ub, b_mux_with_sdu=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SPS_LOG___UL_GRANT_PHICH_RX_TIME_INFO": {
+ "format": "[EMAC][SPS][UL-HARQ] grant phich rx info: pdcch_num=%ub, time_to_phich=%ub, time_to_pdcch[0]=%ub, time_to_pdcch[1]=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SPS_LOG___UL_IMPLICIT_RELEASE_REACHED": {
+ "format": "[EMAC][SPS][UL-HARQ] implicit release reached",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SPS_LOG___UL_CONFIRMATION_TRIGGER": {
+ "format": "[EMAC][SPS][UL-HARQ] SPS Confirmation is triggered",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SPS_WARN___DL_DROP_COMMAND": {
+ "format": "[EMAC][SPS][DL-HARQ] drop dl sps command: sps_cmd=%xb",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_SPS_WARN___UL_DROP_COMMAND": {
+ "format": "[EMAC][SPS][UL-HARQ] drop ul sps command: sps_cmd=%xb",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_LATRED_LOG___SKIP_TX_BUFFER_INFO": {
+ "format": "[EMAC][LATRED][SKIP] Buffer INFO: BSR_size=%ul, PHR_size=%ul, Buffer_size=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LATRED_LOG___SKIP_TX_CC_IDX": {
+ "format": "[EMAC][LATRED][SKIP] skip cc_idx: %xb",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_SCELL_ENQUEUE_EL1CMD": {
+ "format": "[EMAC][SCELL] enqueue el1c cmd w_idx %d, r_idx %d",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_SCELL_DEQUEUE_EL1CMD": {
+ "format": "[EMAC][SCELL] dequeue el1c cmd w_idx %d, r_idx %d",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_SCELL_DROP_DUP_EL1CMD": {
+ "format": "[EMAC][SCELL] drop duplicate el1c cmd type %d, cc_idx %d",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_SR_NO_TX": {
+ "format": "[EMAC][SR] SR no tx due to gap, reset count/tx_time",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_LOG_SR_CFG_TA_EXIPIRED": {
+ "format": "[EMAC][SR] SR resource cfg during TA timer expired! action=%ub (0: Wait until SR trigger, 1: Notify ERRC TA expired)",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_LOG_SR_NEXT_SR_OCCASION_INFO": {
+ "format": "[EMAC][SR][SLP] next sr occasion info, next_tick_time=%ul, next_pdcch_time=%ul, sched_result_bmp=%ud",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_SR_UNEXPECTED_SLP_TX_STATUS": {
+ "format": "[EMAC][SR][SLP] unexpected slp and tx_status=%ub (0: tx forbidden in sleep, 1: pdcch off after sr tx, 2: tx forbidden in wakingup)",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_ERT_LOG_SR_NEXT_SR_OCCASION_INFO": {
+ "format": "[EMAC][ERT][SR][SLP] next sr occasion info, delay_time=%ud, next_tick_time=%ul, next_pdcch_time=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_ERT_LOG_SR_MEAS_CONFLICT": {
+ "format": "[EMAC][ERT][SR] SR occasion in meas gap, meas_pattern=%ub, meas_offset=%ub, SR_period=%ub, SR_offset=%ub",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_INIT": {
+ "format": "[EMAC][RA] init",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_RESET": {
+ "format": "[EMAC][RA][CFG] <state = NO_RA> RA reset",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_TRIG_FAIL": {
+ "format": "[EMAC][RA] %Memac_ra_event_e trigger fail, collides with IDC=%b",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_TRIG": {
+ "format": "[EMAC][RA] %Memac_ra_event_e trigger, current trigger event=%Memac_ra_event_e",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_GAP_STOP_SEND": {
+ "format": "[EMAC][RA] <state = WAIT_GAP_STOP> send GAP_STOP_REQ",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_GAP_STOP_RCV": {
+ "format": "[EMAC][RA] <state = WAIT_PREAMBLE_TX> rcv GAP_STOP_CNF",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_GAP_RESUME_RCV": {
+ "format": "[EMAC][RA] <state = NO_RA> rcv GAP_RESUME_CNF",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_PREAM_TRIG_NOT_READY": {
+ "format": "[EMAC][RA] trigger event not ready yet",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_PREAM_TX_NOT_READY": {
+ "format": "[EMAC][RA] TX not ready yet due to=%d (0: earliest_tx_avail_time, 1: sleep_status)",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_PREAM_CB_RAPID_SELECT": {
+ "format": "[EMAC][RA] msg3_valid=%d, group_b=%d, pathloss=%d",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_PREAM_GROUPB_SZ_0": {
+ "format": "[EMAC][RA] preamble group b size = 0, use group a",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV3",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_PREAM_POW_CHK_PASS": {
+ "format": "[EMAC][RA] pathloss (%d) < pmax (%b) - init_pow (%b) - delta_msg3 (%b) - pow_oft_b (%b)",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV3",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_PREAM_POW_CHK_FAIL": {
+ "format": "[EMAC][RA] pathloss (%d) >= pmax (%b) - init_pow (%b) - delta_msg3 (%b) - pow_oft_b (%b), use group a",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV3",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_PREAM_POTENTIAL_MSG_SZ": {
+ "format": "[EMAC][RA] msg_sz_group_a=%b, potential_msg_sz=%l",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV3",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_PREAM_VALID_INFO": {
+ "format": "[EMAC][RA] preamble valid: rapid=%b, prefer_tx_time=%l, prach_tx_time=%l",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_RAR_RCV_DCI": {
+ "format": "[EMAC][RA] rcv %ubth DCI for ra-rnti, update rar_delay_time=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_RAR_RCV_DCI_OUT_WND": {
+ "format": "[EMAC][RA][WARN] rcv %ubth DCI for ra-rnti at %ul outside RAR WND",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_RAR_MISMATCH": {
+ "format": "[EMAC][RA] RAR mismatch, misatch_rapid=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_RAR_TB_RCV": {
+ "format": "[EMAC][RA] rcv RAR, match=%b, at subframe=%ub, abs_time=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV3",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_CR_RCV_TCRNTI_DCI": {
+ "format": "[EMAC][RA] rcv tc-rnti DL DCI, update cr_delay_time=%l",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_MAX_POW_REACHED": {
+ "format": "[EMAC][RA][WARN] preamble max tx power reached",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_RAR_TIMING_FAIL": {
+ "format": "[EMAC][RA][ERROR] RAR too late for acsi el1d rx timing",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "EMAC_RA_LOG_TCRNTI_TIMING_FAIL": {
+ "format": "[EMAC][RA][ERROR] tc-rnti too late for ack add el1d tx timing",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "EMAC_RA_LOG_RCV_TCRNTI_CR_CNF": {
+ "format": "[EMAC][RA] rcv tc-rnti CR: result=%b at %l",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV3",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_RCV_RA_RESTART": {
+ "format": "[EMAC][RA] <state = WAIT_PREAMBLE_TX> RA restart",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_RA_ABORT": {
+ "format": "[EMAC][RA][WARN] <state = WAIT_GAP_RESUME> RA abort (directly clear RA status)",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_TA_TIMEOUT_PCELL_RETRY": {
+ "format": "[EMAC][RA][WARN] <state = WAIT_CR> TA Timeout, RA retry on PCell (leave WAIT_MSG3 or WAIT_CR)",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_PDCCH_ORDER_FOR_TA_RUNNING": {
+ "format": "[EMAC][RA][WARN] rcv PDCCH order for TA timer running, ul_cc_idx=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_LOG_IDC_INIT": {
+ "format": "[EMAC][IDC] init",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_IDC_IDC_STATE_UPDATE": {
+ "format": "[EMAC][IDC] IDC state update: ul_cc_idx=%ub, state=%Memac_idc_state_enum",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_IDC_FORCE_REGULAR_BSR_TRIGGER": {
+ "format": "[EMAC][IDC][BSR] IDC forces regular BSR trigger",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_LOG_IDC_TDM_IDC_IND_IGNORE": {
+ "format": "[EMAC][IDC] ignore IDC ind info due to emac reset or sch close",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_LOG_IDC_TDM_IDC_IND_INFO": {
+ "format": "[EMAC][IDC] rcv IDC ind info, cc_idx=%ub, start_time=%ul, lead_time=%ul, duration=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_ERT_LOG_SR_VOLTE_MODE": {
+ "format": "[EMAC][VOLTE][SR] volte prediction mode: mode=%ub (0: silence mode, 1: talk mode, 2: sid first mode, 3: invalid mode)",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_ERT_LOG_SR_VOLTE_RB_STATUS": {
+ "format": "[EMAC][VOLTE][SR] volte rb_idx=%ub, config=%ub (0: activation, 1: deactivation, 2: reactivation)",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_ERT_LOG_SR_VOLTE_PREDICTION": {
+ "format": "[EMAC][VOLTE][SR] volte prediction: \\npredicted air_abs_time=%ul, \\npredicted_next_volte_time=%ul, \\ntype=%ub:1 (0: data, 1: mode change notify), \\nhit=%ub:1, \\nvolte_mode=%ub:2, \\nis_sent_to_txlisr=%ub:1%pb:3",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TRIGGERD_BY_CONFIG": {
+ "format": "[EMAC][PHR] PHR triggered by reconfig or scell activate",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TRIGGERD_BY_PERIOD_TIMER": {
+ "format": "[EMAC][PHR] PHR triggered by periodic timer",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TRIGGERD_BY_PATHLOSS": {
+ "format": "[EMAC][PHR] PHR triggered by pathloss ul_cc_idx=%ub, previous pathloss=%b, current pathloss=%b",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TRIGGERD_BY_MPR": {
+ "format": "[EMAC][PHR] PHR triggered by MPR ul_cc_idx=%ub, previous MPR=%b, current MPR=%b",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TRIGGERD_IF_PUCCH_BY_MPR": {
+ "format": "[EMAC][PHR] PHR triggered by MPR if has PUCCH ul_cc_idx=%ub, previous MPR=%b, current MPR=%b",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_PHR_RES": {
+ "format": "[EMAC][PHR] PHR response: length=%ub, has pucch=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_INIT_RESET": {
+ "format": "[EMAC][DRX] situation: initialization or reset",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_NON_RESET": {
+ "format": "[EMAC][DRX] situation: non reset",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_TTI_RETX_TMR_STATUS_1CC": {
+ "format": "[EMAC][DRX] tti retx status: rtt0_status=%xd, retx0_status=%xd, ear_fut_retx_start_time=%ul, n1_retx_tmr_flag=%ub, n2_retx_tmr_flag=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_TTI_RETX_TMR_STATUS_2CC": {
+ "format": "[EMAC][DRX] tti retx status: rtt0_status=%xd, retx0_status=%xd, rtt1_status=%xd, retx1_status=%xd, ear_fut_retx_start_time=%ul, n1_retx_tmr_flag=%ub, n2_retx_tmr_flag=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_TTI_RETX_TMR_STATUS_3CC": {
+ "format": "[EMAC][DRX] tti retx status: rtt0_status=%xd, retx0_status=%xd, rtt1_status=%xd, retx1_status=%xd, rtt2_status=%xd, retx2_status=%xd, ear_fut_retx_start_time=%ul, n1_retx_tmr_flag=%ub, n2_retx_tmr_flag=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_TTI_RETX_TMR_STATUS_4CC": {
+ "format": "[EMAC][DRX] tti retx status: rtt0_status=%xd, retx0_status=%xd, rtt1_status=%xd, retx1_status=%xd, rtt2_status=%xd, retx2_status=%xd, rtt3_status=%xd, retx3_status=%xd, ear_fut_retx_start_time=%ul, n1_retx_tmr_flag=%ub, n2_retx_tmr_flag=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_UL_RETX_TMR_INFO": {
+ "format": "[EMAC][DRX] ul retx tmr info: ul_cc_idx=%ub, harq_id=%ub, start_time=%ul, expired_time=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_MIB_INVALID": {
+ "format": "[EMAC][DRX] mib invalid",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_CYC_CHANGE_NEXT_ONDU_INFO": {
+ "format": "[EMAC][DRX] (cycle change)ondu tmr: start_time=%ul and expired_time=%ul, next ondu tmr: start_time=%ul and expired_time=%ul, cur_cycle=%Memac_drx_cycle_type_e, next_predict_cycle=%Memac_drx_cycle_type_e",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_SHORT_CYC_TMR_RESET_TMR_END": {
+ "format": "[EMAC][DRX] short cycle tmr reset: short cycle tmr end",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_SHORT_CYC_TMR_RESET_LONG_DRX_CMD": {
+ "format": "[EMAC][DRX] short cycle tmr reset: rcv long drx cmd",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_TURN_OFF_PAST_SHORT_CYCLE_ONDU_TMR_LONG_DRX_CMD": {
+ "format": "[EMAC][DRX] turn off past short cycle ondu tmr: rcv long drx cmd",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_N5_DRX_STATUS_PREDICTION": {
+ "format": "[EMAC][DRX] n5 drx status prediction: n5_time=%ul, n5_status_bmp=%ub, rest_active_event_code=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_DCI_RCV_NEW_CRNTI_DCI_FOR_CF_RAR": {
+ "format": "[EMAC][DRX] rcv new c-rnti dci for cf rar: new c-rnti dci rcv_time=%ul, cf rar rcv_time=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_DCI_RCV_NEW_CRNTI_DCI_BEFORE_CF_RAR_DECODED": {
+ "format": "[EMAC][DRX] rcv new c-rnti dci before cf rar is decoded: new c-rnti dci rcv_time=%ul, cf rar rcv_time=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_N5_DRX_STATUS_UPDATE_CF_RAR": {
+ "format": "[EMAC][DRX] n5 drx status update (cf rar): n5_time=%ul, n5_status_bmp=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_N5_DRX_STATUS_UPDATE_DRX_CMD": {
+ "format": "[EMAC][DRX] n5 drx status update (drx/long drx cmd): n5_time=%ul, n5_status_bmp=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_DRX_CMD_ONDU_TMR_STOP": {
+ "format": "[EMAC][DRX] drx/long drx cmd stops ondu tmr",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_DRX_CMD_DRX_INACT_TMR_STOP": {
+ "format": "[EMAC][DRX] drx/long drx cmd stops drx inact tmr",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_DRX_CMD_DRX_SHORT_CYC_TMR_START": {
+ "format": "[EMAC][DRX] drx cmd starts short cycle tmr: start_time=%ul, expired_time=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_CQI_SRS_TX_ADMIN": {
+ "format": "[EMAC][DRX] tx time=%ul: cqi_tx_admin=%ub, type0-srs_tx_admin=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_NEXT_ONDU_CONSIDERING_INACT_SHORT_TMR_EXPIRY": {
+ "format": "[EMAC][DRX] next ondu info considering drx inact/short cycle tmr: next ondu start_time=%ul and expired_time=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_DRX_DISABLE_POST_PROC": {
+ "format": "[EMAC][DRX] drx disable post proc: status=%ub (0: enable, 1: disable)",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_PSF_MAPPING_TBL_UPDATE_DUMP": {
+ "format": "[EMAC][DRX] dump psf mapping table %ub (0: ondu, 1: retx, 2: inact, 3: ul_retx)=%3ud %3ud %3ud %3ud %3ud %3ud %3ud %3ud %3ud %3ud",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_DL_WO_PDCCH_IND": {
+ "format": "[EMAC][DRX][WARN] dl without pdsch ind: rcv_abs_time=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_CHK_DRX_CYCLE_NTF": {
+ "format": "[EMAC][DRX] DRX_CYCLE_NTF: start_time=%ul, ondu_len=%ud, cycle_len=%ud, is_cycle_changed=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV3",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SLP_LOG_SITUATION": {
+ "format": "[EMAC][SLP] situation: %ub (0: initialization, 1: reset, 2: non reset, 3: drx disable)",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SLP_LOG_SLP_LAST_PDCCH_ON_TIME": {
+ "format": "[EMAC][SLP] last pdcch_on_time=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SLP_LOG_TICK_OPERATION": {
+ "format": "[EMAC][SLP] txlisr tick operation: status=%ub (0: lock, 1: unlock), errc_protocol_idx=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SLP_LOG_SLP_STATUS_CHANGE_TO_AWAKE": {
+ "format": "[EMAC][SLP] slp status changes to EMAC_SLP_STATUS_AWAKE: reason=%ub (0: normal wakeup, 1: dynamic wakeup, 2: force awake)",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SLP_LOG_SLP_STATUS_CHANGE_TO_TX_READY": {
+ "format": "[EMAC][SLP] slp status changes to EMAC_SLP_STATUS_TX_READY",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SLP_LOG_SLP_STATUS_CHANGE_TO_WAKINGUP": {
+ "format": "[EMAC][SLP] slp status changes to EMAC_SLP_STATUS_WAKINGUP",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SLP_LOG_SLP_STATUS_PREDICT_RESULT": {
+ "format": "[EMAC][SLP] slp status changes to %Memac_slp_status_e from EMAC_SLP_STATUS_WAITING_SLEEP_WITH_PREDICT_MSG",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SLP_LOG_NEXT_WAKEUP_TIME_INFO": {
+ "format": "[EMAC][SLP] next wakeup time info: \\ntick_updated=%ub:1, \\npredicted=%ub:1, \\nnext2_off=%ub:1, \\ncycle_type=%ub:1%pb:4, \\ntick_awake_type=%Memac_slp_awake_type_e, next_tick_time=%ul, \\npdcch_awake_type=%Memac_slp_awake_type_e, next_pdcch_time=%ul \\n(note: <drx_tick_awake_type=%Memac_slp_awake_type_e, drx_tick_awake_time=%ul, drx_pdcch_awake_type=%Memac_slp_awake_type_e, drx_pdcch_awake_time=%ul> <ul_harq_tick_awake_type=%Memac_slp_awake_type_e, ul_harq_tick_awake_time=%ul, ul_harq_pdcch_awake_type=%Memac_slp_awake_type_e, ul_harq_pdcch_awake_time=%ul> <sr_tick_awake_time=%ul, sr_pdcch_awake_time=%ul>)",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SLP_LOG_NEXT_SPS_WAKEUP_TIME_INFO": {
+ "format": "[EMAC][SLP][SPS] (note: <sps_tick_awake_time=%ul, sps_pdcch_awake_time=%ul>)",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SLP_LOG_RCV_DYNAMIC_REQ": {
+ "format": "[EMAC][SLP] rcv dynamic_wakeup_req",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SLP_LOG_RCV_DYNAMIC_TX_READY": {
+ "format": "[EMAC][SLP] rcv dynamic_wakeup_tx_ready: dynamic_wakeup_tick_time=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SLP_LOG_RCV_DYNAMIC_CNF": {
+ "format": "[EMAC][SLP] rcv dynamic_wakeup_cnf: dynamic_wakeup_pdcch_time=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SLP_LOG_UNEXPECTED_SLEEP_STATUS_DURING_AWAKE": {
+ "format": "[EMAC][SLP][WARN] unexpected EMAC_SLP_STATUS_SLEEP during awake",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_SLP_LOG_UNEXPECTED_DCI_DURING_SLEEP": {
+ "format": "[EMAC][SLP][WARN] unexpected dci during EMAC_SLP_STATUS_SLEEP",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_SLP_LOG_UL_HARQ_SPS_CHANGE_PDCCH_TIME_DUR_SLEEP": {
+ "format": "[EMAC][SLP][WARN] pdcch time is changed during sleep: source=%ub (0: ul harq, 1: sps), original_tick_time=%ul, original_pdcch_time=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_ERT_SLP_LOG_INIT": {
+ "format": "[EMAC][ERT][SLP] initialization",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_ERT_SLP_LOG_SLP_STATUS_CHANGE_TO_SLEEP": {
+ "format": "[EMAC][ERT][SLP] slp status changes to EMAC_ERT_SLP_STATUS_SLEEP: cur_os_tick=%ul, air_abs_time=%ul, cell_time_cnt=%ud",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_ERT_SLP_LOG_RCV_DYNAMIC_WAKEUP_REQ": {
+ "format": "[EMAC][ERT][SLP] rcv dynamic wakeup req: module=%ub (0: without wakeup time, 1: with wakeup time)",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_ERT_SLP_LOG_CUR_TIME_INFO_PREDICT": {
+ "format": "[EMAC][ERT][SLP] timer prediction: cur_os_tick=%ul, predicted air_abs_time=%ul, predicted cell_time_cnt=%ud",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_ERT_SLP_LOG_DYNAMIC_WAKEUP_DROP": {
+ "format": "[EMAC][ERT][SLP] drop dynamic wakeup: reason=%ub (0: no need, 1: not in EMAC_ERT_SLP_STATUS_SLEEP, 2: close to next_pdcch_time, 3: sch is closed or mac reset)",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_ERT_SLP_LOG_SLP_STATUS_CHANGE_TO_AWAKE": {
+ "format": "[EMAC][ERT][SLP] slp status changes to EMAC_ERT_SLP_STATUS_AWAKE",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_ERT_SLP_LOG_UPPER_LAYER_DYNAMIC_WAKEUP_CTRL": {
+ "format": "[EMAC][ERT][SLP] upper layer dynamic wakeup operation: status=%ub (0: enable, 1: disable)",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_ERT_SLP_LOG_SEND_HOST_DATA_REQ": {
+ "format": "[EMAC][ERT][SLP] send host data request: cnt=%ub, msg_sent_time=%ul, dynamic_wakeup_tick_time=%ul, dynamic_wakeup_pdcch_time=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_ERT_SLP_LOG_RCV_HOST_DATA_READY": {
+ "format": "[EMAC][ERT][SLP] rcv host data ready",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_ERT_SLP_LOG_RCV_HOST_DATA_CNF": {
+ "format": "[EMAC][ERT][SLP] rcv host data cnf",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_ERT_SLP_LOG_ENQUEUE_HOST_DATA_REQ": {
+ "format": "[EMAC][ERT][SLP] enqueue host data req",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_ERT_SLP_LOG_TICK_OPERATION": {
+ "format": "[EMAC][ERT][SLP] ert tick operation: status=%ub (0: lock, 1: unlock)",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_WAR___PRINT_E": {
+ "format": "[EMAC][EMUX][WARN] %Memux_log_e",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMUX_ERR___PRINT_E": {
+ "format": "[EMAC][EMUX][ERROR] %Memux_log_e",
+ "traceClass": "EMAC_ERROR",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "EMUX_DBG___PRINT_E1_I4": {
+ "format": "[EMAC][EMUX][DBG] %Memux_log_e %l %l %l %l",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___PRINT_E": {
+ "format": "[EMAC][EMUX][LOG] %Memux_log_e",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___PROCESS": {
+ "format": "[EMAC][EMUX][MR] MUX_REQ: cc_idx=%ub, need_lcp=%Mkal_bool, need_gen_front_tb=%Mkal_bool, need_mux=%Mkal_bool",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___SYNC_BUFF_STATUS": {
+ "format": "[EMAC][EMUX][LCP] Sync buff status: [IN] lcg_buf_inc_opt=%Memux_rb_group_e, lcp_opt=%Memux_rb_group_e, [OUT] lcg_buf_num=%ub",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___AFTER_MAC_LCP_B": {
+ "format": "[EMAC][EMUX][LCP] After mac lcp: c-rnti=%Memux_crnti_status_e, bsr=%Memux_bsr_status_e(%Memux_bsr_format_e), phr=%Memux_phr_status_e, ccch=%Memux_ccch_status_e",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___AFTER_MAC_LCP_C": {
+ "format": "[EMAC][EMUX][LCP] After mac lcp: r_tbs=%ud, last_shdr_type=%Memux_last_shdr_type_e, last_shdr_format=%Memux_last_shdr_format_e",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___AFTER_RLC_LCP_B": {
+ "format": "[EMAC][EMUX][LCP] After rlc lcp: bsr=%Memux_bsr_status_e(%Memux_bsr_format_e), pad=%Memux_pad_status_e, dxch=%Memux_dxch_status_e, post_pad_len=%ud",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___AFTER_RLC_LCP_C": {
+ "format": "[EMAC][EMUX][LCP] After rlc lcp: r_tbs=%ud, last_shdr_type=%Memux_last_shdr_type_e, last_shdr_format=%Memux_last_shdr_format_e",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_WAR___RAR_GRANT_TOO_SMALL": {
+ "format": "[EMAC][EMUX][LCP][WARN] RAR grant is too small(<7bytes) for CCCH: r_tbs=%ud",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMUX_LOG___MUX_BUF_2": {
+ "format": "[EMAC][EMUX][TB] %xb %xb %xb %xb",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___MUX_BUF_3": {
+ "format": "[EMAC][EMUX][TB] %xb %xb %xb %xb",
+ "traceClass": "EMAC_LV3",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___MUX_BUF_4": {
+ "format": "[EMAC][EMUX][TB] %xb %xb %xb %xb",
+ "traceClass": "EMAC_LV3",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___PAD_BUF_2": {
+ "format": "[EMAC][EMUX][TB] %xb %xb %xb %xb",
+ "traceClass": "EMAC_LV3",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___INIT_HARQ_INFO_QUICK": {
+ "format": "[EMAC][EMUX][UL-HARQ] Init harq_info(quick): cc_idx=%ub, harq_id=%ub",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___OPTION": {
+ "format": "[EMAC][EMUX][IF] Option: pidx=%b, lcg_buf_inc_opt=%Memux_rb_group_e, lcp_opt=%Memux_rb_group_e",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___FORCE_ALL_PAD": {
+ "format": "[EMAC][EMUX][IF] Force all pad: pidx=%b, ul_cc_idx=%ub, harq_id=%ub",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___EMAC_RESET": {
+ "format": "[EMAC][EMUX][IF] EMAC reset: pidx=%b",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___INIT": {
+ "format": "[EMAC][EMUX][IF] EMUX init",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___CMPL_DATE": {
+ "format": "[EMAC][EMUX][INFO] cmpl_date=%c%c%c/%c%c",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___CMPL_TIME": {
+ "format": "[EMAC][EMUX][INFO] cmpl_time=%c%c:%c%c:%c%c",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___CURR_TIME": {
+ "format": "[EMAC][EMUX][INFO] curr_time=%ul/%ul/%ul %ul:%ul:%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___FEATURE": {
+ "format": "[EMAC][EMUX][INFO] Feature: UL_CC_NUM=%ub, PN31_PAD=%ub, BSR_CONSIDER_SUSPEND_RB=%ub, GEMINI=%ub, L+W=%ub, MPS=%ub, L+L=%ub, RSIM=%ub, LTE_NUM=%ub",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___CONTEXT": {
+ "format": "[EMAC][EMUX][INFO] Context: g_emux=%xl, cc0(harq0-3,muxbuf)=(%xl,%xl)(%xl,%xl)(%xl,%xl)(%xl,%xl), cotfq=%xl, cotfq_num=%ul, g_pad_buf=%xl",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___INIT_HARQ_INFO": {
+ "format": "[EMAC][EMUX][UL-HARQ] Init harq_info: cc_idx=%ub, harq_id=%ub",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___GEN_PAD_BUF_PN31": {
+ "format": "[EMAC][EMUX][PAD] Generate pad_buf: PN31",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___GEN_PAD_BUF_ALL0": {
+ "format": "[EMAC][EMUX][PAD] Generate pad_buf: ALL0",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___RESET": {
+ "format": "[EMAC][EMUX][IF] EMUX reset",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_RESET": {
+ "format": "[EMAC][DL][CFG] reset",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_DRB_CFG": {
+ "format": "[EMAC][DL][CFG] close_rb_num=%ub, open_rb_num=%ub",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_SUPPORT_REL": {
+ "format": "[EMAC][DL][CFG] protocol %ub, support release %Merrc_emac_support_release_enum, start fix lcid %ub, RBR enable %ub",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_HDR_LEN_ERROR": {
+ "format": "[EMAC][DL][TB][ERROR] TB %ub: accu_len %ud > tb_len=%ud",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_CE_AFTER_SDU": {
+ "format": "[EMAC][DL][TB][ERROR] TB %ub: CE %ub after SDU",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_INVALID_LCID": {
+ "format": "[EMAC][DL][TB][ERROR] TB %ub: logical channel %ub not open",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_UEID_IN_C_SPS_TB": {
+ "format": "[EMAC][DL][TB][ERROR] TB %ub: UEID exists in C/SPS TB",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_SUBHDR_EXCEEDS_TABLE": {
+ "format": "[EMAC][DL][TB] TB %ub: subheader number=%ud exceeds pre-record table",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_CE_OUT_RECORD": {
+ "format": "[EMAC][DL][TB][ERROR] TB %ub: CE %ub falls out of record table",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_PADDING_BYTES": {
+ "format": "[EMAC][DL][TB] TB %ub: padding len %ul after last lcid %ub",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_TOO_MANY_SUBHDR": {
+ "format": "[EMAC][DL][TB][ERROR] TB %ub: too many subheader, last lcid %ub",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_RCV_4BYTE_SCELL": {
+ "format": "[EMAC][DL][WARN] TB %ub: 4-byte SCell MAC CE inside, won't handle it",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_CR_TIMER_NOT_START_YET": {
+ "format": "[EMAC][DL][RA][WARN] Rcv tc-rnti TB before CR timer start at abs=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_UEID_EXIST_WHEN_NO_RA": {
+ "format": "[EMAC][DL][RA][WARN] UEID exists when not in WAIT_CR",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_TA_LOG_TA_VALUE": {
+ "format": "[EMAC][TA] Result: tag_id=%ub, value=%l",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ }
+ ],
+ "traceFamily": "L2"
+}
\ No newline at end of file
diff --git a/mcu/protocol/interface/el2/trace/emac_trace_2_utmd.json b/mcu/protocol/interface/el2/trace/emac_trace_2_utmd.json
new file mode 100644
index 0000000..bff7ea7
--- /dev/null
+++ b/mcu/protocol/interface/el2/trace/emac_trace_2_utmd.json
@@ -0,0 +1,1069 @@
+{
+ "endGen": "Legacy",
+ "startGen": "Legacy",
+ "legacyParameters": {
+ "codeSection": "TCMFORCE",
+ "l2BufferSetting": "L2_BUFFER_EL2",
+ "l2MaxArg": 15,
+ "modemType": "LTE_L2"
+ },
+ "module": "EMAC_2",
+ "stringTranslationDefs": [],
+ "traceClassDefs": [
+ {
+ "EMAC_LV1": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "EMAC_LV2": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "EMAC_LV3": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "EMAC_WARN": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "EMAC_ERROR": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "EMAC_DEBUG": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ }
+ ],
+ "traceDefs": [
+ {
+ "EMBMS_LOG_RESET_SYNC_AREA_INIT": {
+ "format": "[EMAC][MBMS][CFG] reset_sync_area_info called, reset sync_area_id: %ul, area_num: %ul, onging_flag: %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_DELETE_ACTIVE_AREA": {
+ "format": "[EMAC][MBMS][CFG] idx_map: %ud, area_num: %ul, area_idx: %ul, areainfo_vaild: %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_MCCH_CONFIG_INIT": {
+ "format": "[EMAC][MBMS][CFG] mcch_config called, sync_area_id: %ul, num_mcch_cfg: %ud, num_active_area: %ul, onging_flag: %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_EXIST_MCCH": {
+ "format": "[EMAC][MBMS][CFG] existed mcch config with %ud.idx_map: %ud, area_idx: %ul, area_id: %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_NEW_CFG_MCCH": {
+ "format": "[EMAC][MBMS][CFG] new mcch config with %ud. area_id: %ul, offset: %ul, RP: %ud, MP: %ud, sf_num: %ul, recv_mode: %Mel1_ch_mch_mcch_reception_mode_enum",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_ADD_MCCH": {
+ "format": "[EMAC][MBMS][CFG] add new mcch, sync_area_id: %ul, idx_map: %ud, area_idx: %ul, area_id: %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_UPDATE_MCCH": {
+ "format": "[EMAC][MBMS][CFG] update current mcch, sync_area_id: %ul, area_id: %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_DELETE_MCCH": {
+ "format": "[EMAC][MBMS][CFG] delete current mcch, sync_area_id: %ul, area_id: %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_MCCH_CFG_IDX": {
+ "format": "[EMAC][MBMS][CFG] area_info_idx: %ul, mcch_cfg_idx: %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_PMCH_CONFIG_INIT": {
+ "format": "[EMAC][MBMS][CFG] pmch_config called, sync_area_id: %ul, area_id: %ul, CSA: %ud, sf_num: %ul, num_pmch_info: %ul, onging_flag: %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_PMCH_AREA_ID": {
+ "format": "[EMAC][MBMS][CFG] area_idx: %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_PMCH_RESET": {
+ "format": "[EMAC][MBMS][CFG] pmch info reset, is_vaild: %ul, area_id: %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_ADD_PMCH": {
+ "format": "[EMAC][MBMS][CFG] add new pmch, area_id: %ul, pmch_id: %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_PMCH_SF_LIST": {
+ "format": "[EMAC][MBMS][CFG] pmch sf list: %ul: %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_PMCH_CFG_ERR_ALLOC_END": {
+ "format": "[EMAC][MBMS][CFG] invalid sf-alloc end: %ul, num_csa_sf: %ud, pmch_id: %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMBMS_LOG_UPDATE_MSI_INIT": {
+ "format": "[EMAC][MBMS][CFG] update_msi called, sync_area_id: %ul, area_id: %ul, pmch_id: %ul, sf_no %ul, num_mch_sched: %ud",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_INVAILD_AREA_INFO_ID": {
+ "format": "[EMAC][MBMS][CFG] Do not have vaild area_info_idx!!!",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMBMS_LOG_RECEPTION_MODE_INIT": {
+ "format": "[EMAC][MBMS][CFG] reception_mode_config called, sync_area_id: %ul, sf_no: %ud, onging_flag: %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_CFG_RECEPTION_MODE": {
+ "format": "[EMAC][MBMS][CFG] el1 config mbms mcch reception mode, current mode: %ul, assigned mode: %ul, area_id: %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_QUERY_IDX": {
+ "format": "[EMAC][MBMS][CFG] query_index called, sync_area_id: %ul, area_id: %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_UPDATE_SCHED_INIT": {
+ "format": "[EMAC][MBMS][SCHED] update_schedule called, sync_area_id: %ul, sf_no: %ud, force: %ul, onging_flag: %ul, num_active_area: %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_SCHED_NO_VALID_RESULT": {
+ "format": "[EMAC][MBMS][SCHED][RESULT] update sched at sf_no %ud but no valid sched result returned",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_UPDATE_SCHED_RESULT": {
+ "format": "[EMAC][MBMS][SCHED][RESULT] update sched result, sync_area_id: %ul, area_id: %ul, sf_no: %ud, is_mcch: %ul, mcch_mp_id: %ul, pmch_id: %ul, mcs: %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_UPDATE_SCHED_RESULT_GEMINI": {
+ "format": "[EMAC][MBMS][SCHED][RESULT][Gemini] update sched result, sync_area_id: %ul, area_id: %ul, sf_no: %ud, is_mcch: %ul, mcch_mp_id: %ul, pmch_id: %ul, mcs: %ul, priority: %Mel1_embms_gemini_priority_enum",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_MCCH_UPDATE_SCHED": {
+ "format": "[EMAC][MBMS][SCHED] update mcch sched, area_id: %ul, sf_no: %ud, force: %ul, mode change: %ul, valid: %ul or passed",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_MCCH_SCHED_RESULT": {
+ "format": "[EMAC][MBMS][SCHED] mcch sched, area_id: %ul, sf_no: %ud, recv_mode: %ul, valid: %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_MCCH_SCHED_NEXT": {
+ "format": "[EMAC][MBMS][SCHED] mcch final update, area_id: %ul, sf_no: %ud, area_idx: %ul, mcch_mp_id: %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_MCCH_NO_VAILD_NEXT": {
+ "format": "[EMAC][MBMS][SCHED] mcch final update, no vaild next mcch",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMBMS_LOG_RPID_MPID": {
+ "format": "[EMAC][MBMS][SCHED][MP_ID] sf_no %ud, rp_id_in_mp %ul, mp_id %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_FORCE_RECV_MCCH": {
+ "format": "[EMAC][MBMS][SCHED][MP_ID] force to recv mcch when delay across mp, current sf_no %ud, last mcch sf_no %ud, rp_id_in_mp %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_PMCH_UPDATE_SCHED": {
+ "format": "[EMAC][MBMS][SCHED] update pmch sched, area_id: %ul, pmch_id: %ul, sf_no: %ud, force: %ul, valid: %ul or passed",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_PMCH_SCHED_RESULT": {
+ "format": "[EMAC][MBMS][SCHED] pmch sched, area_id: %ul, pmch_id: %ul, sf_no: %ud, b_msi_checked: %ud, valid: %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_MSI_HANDLE_CSA_IDX": {
+ "format": "[EMAC][MBMS][SCHED] MSI handling... find_next_res: %ul, CSA_id: %ud, CSA_id_in_mp: %ud, sf_idx: %ud, cur_sf_no: %ud, sf_idx_in_msp: %ud, num_csa_sf_res: %ud",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_PMCH_SCHED_NEXT": {
+ "format": "[EMAC][MBMS][SCHED] pmch final update, pmch_idx: %ul, sf_no: %ud, cas_idx: %ud",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_SCHED_NEXT_INIT": {
+ "format": "[EMAC][MBMS][SCHED] schedule_next called, sync_area_id: %ul, onging_flag: %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_REDUNDANT_SCHED_NEXT": {
+ "format": "[EMAC][MBMS][SCHED] redundant schedule next, sync_area_id: %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_SCHED_NEXT_RESULT": {
+ "format": "[EMAC][MBMS][SCHED][RESULT] sched next result, sync_area_id: %ul, area_id: %ul, sf_no: %ud, is_mcch: %ul, mcch_mp_id %ul, pmch_id: %ul, mcs: %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_SCHED_NEXT_RESULT_2": {
+ "format": "[EMAC][MBMS][SCHED][RESULT] is_pmch: %Mkal_bool, csap_id: %ud, is_mch_reliable: %Mkal_bool",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_SCHED_NEXT_RESULT_GEMINI": {
+ "format": "[EMAC][MBMS][SCHED][RESULT][Gemini] sched next result, sync_area_id: %ul, area_id: %ul, sf_no: %ud, is_mcch: %ul, mcch_mp_id %ul, pmch_id: %ul, mcs: %ul, priority: %Mel1_embms_gemini_priority_enum",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_NUM_MTCH_RESOURCE": {
+ "format": "[EMAC][MBMS][SCHED][Gemini] num_mtch_resource: %ul, threshold: %ul, priority: %Mel1_embms_gemini_priority_enum",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_SIB2_MBSFN_CFG_UPDATE": {
+ "format": "[EMAC][MBMS][CFG] After SIB2 MBSFN Subframe Cfg update, sync_area_id: %ub, SIB2 valid: %Mkal_bool, period: %ud, num_sf_in_list: %ud",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_SF_CFG_INVALID_WITH_SIB2": {
+ "format": "[EMAC][MBMS][CFG][WARN] detect invalid mbsfn sf ocnfig with SIB2, mbsfn_sync_area_id: %ub, is_mcch: %Mkal_bool",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMBMS_LOG_MBSFN_CFG_UNPACK_SF_LIST_PERIOD_RF": {
+ "format": "[EMAC][MBMS][CFG] mbsfn sf config unpack, sf_list_period_rf: %ud",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_MBSFN_SF_CONFIG_INFO": {
+ "format": "[EMAC][MBMS][CFG] MBSFN SF Config[%ub], rf_alloc_period: %ub, rf_alloc_offset: %ub, is_one_frame: %Mkal_bool",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_MBSFN_SF_CONFIG_SF_LIST_INFO": {
+ "format": "[EMAC][MBMS][CFG] MBSFN SF LIST[%ub]: %ub, %ub, %ub, %ub, %ub, %ub",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMBMS_LOG_MCCH_SF_LIST_INFO": {
+ "format": "[EMAC][MBMS][CFG] MCCH SF num: %ub, LIST: %ub, %ub, %ub, %ub, %ub, %ub",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_WAR___PRINT_E": {
+ "format": "[EMAC][MCH][T][WARN] %Memacmch_log_e",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMACMCH_T_ERR___PRINT_E": {
+ "format": "[EMAC][MCH][T][ERROR] %Memacmch_log_e",
+ "traceClass": "EMAC_ERROR",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "EMACMCH_T_DBG___PRINT_E1_I4": {
+ "format": "[EMAC][MCH][T][LOG] %Memacmch_log_e %l, %l, %l, %l",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___PRINT_E": {
+ "format": "[EMAC][MCH][T][LOG] %Memacmch_log_e",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___PRINT_BYTE": {
+ "format": "[EMAC][MCH][T][LOG] %xb",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___INIT": {
+ "format": "[EMAC][MCH][T][IF] Init",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___CMPL_DATE": {
+ "format": "[EMAC][MCH][T][INFO] cmpl_date=%c%c%c/%c%c",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___CMPL_TIME": {
+ "format": "[EMAC][MCH][T][INFO] cmpl_time=%c%c:%c%c:%c%c",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___CURR_TIME": {
+ "format": "[EMAC][MCH][T][INFO] curr_time=%ul/%ul/%ul %ul:%ul:%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___INIT_G_EMACMCH_TASK": {
+ "format": "[EMAC][MCH][T][INIT] Init g_emacmch_task",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___INIT_G_EMACMCH_CMN": {
+ "format": "[EMAC][MCH][T][INIT] Init g_emacmch_cmn",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___RESET": {
+ "format": "[EMAC][MCH][T][IF] Reset",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___SUSPEND": {
+ "format": "[EMAC][MCH][T][IF] Suspend: trans_pid=%ub, active_pid=%ub",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___RCV_SA_CFG_REQ": {
+ "format": "[EMAC][MCH][T][ILM] Rcv SA_CFG_REQ: active_pidx=%ub, trans_pidx=%ub, cfg_valid=[%Mkal_bool, %Mkal_bool], tid=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___SND_SA_CFG_CNF": {
+ "format": "[EMAC][MCH][T][ILM] Snd SA_CFG_CNF: result=%Merrc_el2_cfg_result_enum",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___RCV_A_CFG_REQ": {
+ "format": "[EMAC][MCH][T][ILM] Rcv A_CFG_REQ: active_pidx=%ub, trans_pidx=%ub, cfg_valid=[%Mkal_bool, %Mkal_bool], tid=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___SND_A_CFG_CNF": {
+ "format": "[EMAC][MCH][T][ILM] Snd A_CFG_CNF: result=%Merrc_el2_cfg_result_enum",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___RCV_MXCH_CFG_REQ": {
+ "format": "[EMAC][MCH][T][ILM] Rcv MXCH_CFG_REQ: active_pidx=%ub, trans_pidx=%ub",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___SND_MXCH_CFG_CNF": {
+ "format": "[EMAC][MCH][T][ILM] Snd MXCH_CFG_CNF: result=%Merrc_el2_cfg_result_enum",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___RELEASE_TMGI": {
+ "format": "[EMAC][MCH][T][MXCH] Release MTCH: tmgi=[%xb %xb %xb %xb %xb %xb]",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___ESTABLISH_TMGI": {
+ "format": "[EMAC][MCH][T][MXCH] Establish MTCH: tmgi=[%xb %xb %xb %xb %xb %xb]",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___ACTIVE_MCCH_NUM": {
+ "format": "[EMAC][MCH][T][MXCH] active_mcch_num=%ub",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___ACTIVE_MTCH_NUM": {
+ "format": "[EMAC][MCH][T][MXCH] active_mtch_num=%ub",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_ERR___MCCH_NOT_FOUND": {
+ "format": "[EMAC][MCH][T][MXCH][ERROR] Cannot find mcch_idx",
+ "traceClass": "EMAC_ERROR",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "EMACMCH_T_ERR___MTCH_NOT_FOUND": {
+ "format": "[EMAC][MCH][T][MXCH][ERROR] Cannot find mtch_idx",
+ "traceClass": "EMAC_ERROR",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___RCV_MCCH_RMC_REQ": {
+ "format": "[EMAC][MCH][T][ILM] Rcv MCCH_RMC_CFG_REQ(RRC): active_pidx=%ub, trans_pidx=%ub, cfg_valid=[%Mkal_bool, %Mkal_bool], tid=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___SND_MCCH_RMC_CNF": {
+ "format": "[EMAC][MCH][T][ILM] Snd MCCH_RMC_CFG_CNF: result=%Merrc_el2_cfg_result_enum",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___RCV_MCCH_RMC_IND": {
+ "format": "[EMAC][MCH][T][ILM] Rcv MCCH_RMC_IND_REQ(EL1): active_pidx=%ub, trans_pidx=%ub, said=%ub, tid=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___RCV_POLL_REQ": {
+ "format": "[EMAC][MCH][T][ILM] Rcv POLL_REQ: active_pidx=%ub, trans_pidx=%ub, cell_time_cnt=%ul, abs_time=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_WAR___MCH_NOT_RCV": {
+ "format": "[EMAC][MCH][T][WARN] MCH not received: cell_time=%ul, abs_time=%ul, said=%ub, aid=%ub, pmch_id=%ub, is_mcch_occasion=%Mkal_bool, intr_ch=%Memacmch_ch_group_e",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___START_PRE_SCHED": {
+ "format": "[EMAC][MCH][T][PRES] Start pre-sched process: said=%ub",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___CONDITION_A": {
+ "format": "[EMAC][MCH][T][PRES] Meet condition A: poll time <= last ps time",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___CONDITION_B": {
+ "format": "[EMAC][MCH][T][PRES] Meet condition B: last ps time < poll time < last ps time + 5120",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___CONDITION_C": {
+ "format": "[EMAC][MCH][T][PRES] Meet condition C: poll time >= last ps time + 5120",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___UPDATE_SCHEDULE": {
+ "format": "[EMAC][MCH][T][PRES] Update sched() input: said=%ub, clear_stored_info=%Mkal_bool, cell_time=%ul, abs_time=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___SCHEDULE_NEXT": {
+ "format": "[EMAC][MCH][T][PRES] Schedule next() input: said=%ub, abs_time=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___FILL_PSQ_A": {
+ "format": "[EMAC][MCH][T][PRES] Fill PSQ: said=%ub, aid=%ub, pmch_id=%ub, sf_idx_in_msp=%ud, mcch_mp_id=%ub",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___FILL_PSQ_B": {
+ "format": "[EMAC][MCH][T][PRES] Fill PSQ: intr_ch=%Memacmch_ch_group_e, is_mcch_occasion=%Mkal_bool, mcs=%ub, non_mbsfn_region_len=%ub",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___FILL_PSQ_C": {
+ "format": "[EMAC][MCH][T][PRES] Fill PSQ: gemini_priority=%Mel1_embms_gemini_priority_enum, atm_filterout=%ul, atm_mch_reliable=%ul",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___FILL_PSQ_D": {
+ "format": "[EMAC][MCH][T][PRES] Fill PSQ: cell_time=%ul, abs_time=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___ENOUGH_VALID_PS_NUM": {
+ "format": "[EMAC][MCH][T][PRES] Enough valid_ps_num or large time diff",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___STOT_PRE_SCHED": {
+ "format": "[EMAC][MCH][T][PRES] Stop pre-sched process",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_WAR___CANNOT_FIND_CANDID": {
+ "format": "[EMAC][MCH][T][PRES][WARN] Cannot find any candidate",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___TRAVERSE_HSQ_BEFORE": {
+ "format": "[EMAC][MCH][T][PDU] Before traverse HSQ: atm_hsq_r_idx=%ul, atm_hsq_w_idx=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___HS_FOUND": {
+ "format": "[EMAC][MCH][T][PDU] HS found: hs_idx=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___PDU_INFO_BY_HS_A": {
+ "format": "[EMAC][MCH][T][PDU] HS: aid=%ub, pmch_id=%ub, mcch_mp_id=%ub",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___PDU_INFO_BY_HS_B": {
+ "format": "[EMAC][MCH][T][PDU] HS: intr_ch=%Memacmch_ch_group_e, is_mcch_occasion=%Mkal_bool",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___PDU_INFO_BY_HS_C": {
+ "format": "[EMAC][MCH][T][PDU] HS: session_num_in_pmch=%ub, is_cfg_pmch_info_list_ext=%Mkal_bool",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___TRAVERSE_HSQ_AFTER": {
+ "format": "[EMAC][MCH][T][PDU] After traverse HSQ: atm_hsq_r_idx=%ul, atm_hsq_w_idx=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_WAR___HS_NOT_FOUND_A": {
+ "format": "[EMAC][MCH][T][PDU][WARN] HS not found: hs abs_time > pdu rcv_abs_time",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMACMCH_T_WAR___HS_NOT_FOUND_B": {
+ "format": "[EMAC][MCH][T][PDU][WARN] HS not found: no hs match",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMACMCH_T_WAR___UNKNOWN_PDU": {
+ "format": "[EMAC][MCH][T][PDU][WARN] Unknown PDU: cannot find the associated HS",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMACMCH_T_WAR___MSI_IGNORE_A": {
+ "format": "[EMAC][MCH][T][PDU][WARN] MSI is ignored because intr_ch does not include MTCH",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMACMCH_T_WAR___MSI_IGNORE_B": {
+ "format": "[EMAC][MCH][T][PDU][WARN] MSI is ignored because it locates after MSI or MCCH or MTCH",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMACMCH_T_WAR___MSI_IGNORE_C": {
+ "format": "[EMAC][MCH][T][PDU][WARN] MSI is ignored because msi length does not match session num: msi_len=%ub, session_num=%ub",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMACMCH_T_WAR___MSI_IGNORE_PAIR": {
+ "format": "[EMAC][MCH][T][PDU][WARN] MSI: schedule pair is ignored because MTCH is not activated or reserved stop_mtch",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMACMCH_T_WAR___UPDATE_MSI_FAILURE": {
+ "format": "[EMAC][MCH][T][PDU][WARN] Update msi() failed: Ignore this MSI",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___SND_MTCH_SUS_IND": {
+ "format": "[EMAC][MCH][T][ILM] Snd MTCH_SUSPEND_IND: said=%ub, aid=%ub, pmch_id=%ub, suspend_mtch_num=%b",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___SET_MCH_RELIABLE": {
+ "format": "[EMAC][MCH][T][PDU] MSI: Set mch reliable to ps_idx=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___SET_PS_FILTEROUT": {
+ "format": "[EMAC][MCH][T][PDU] MSI: Set ps filterout to ps_idx=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_WAR___MCCH_IGNORE_A": {
+ "format": "[EMAC][MCH][T][PDU][WARN] MCCH is ignored because mcch_idx not found",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMACMCH_T_WAR___MCCH_IGNORE_B": {
+ "format": "[EMAC][MCH][T][PDU][WARN] MCCH is ignored because intr_ch not include MCCH",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMACMCH_T_WAR___MTCH_IGNORE_A": {
+ "format": "[EMAC][MCH][T][PDU][WARN] MTCHs are all ignored because intr_ch not include MTCH",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMACMCH_T_WAR___MTCH_IGNORE_B": {
+ "format": "[EMAC][MCH][T][PDU][WARN] MTCH is ignored because mtch_idx not found (not interested ny UE)",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMACMCH_T_WAR___MTCH_IGNORE_C": {
+ "format": "[EMAC][MCH][T][PDU][WARN] MTCH is ignored because lcid=31(pad) or lcid=29(rsv)",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMACMCH_T_WAR___MTCH_IGNORE_D": {
+ "format": "[EMAC][MCH][T][PDU][WARN] MTCH is ignored because lcid out of range",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___PSQ_IDX": {
+ "format": "[EMAC][MCH][T][PSQ] PSQ: atm_psq_idx=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___PSQ_RW_IDX": {
+ "format": "[EMAC][MCH][T][PSQ] PSQ: atm_psq_r_idx=%ul, atm_psq_w_idx=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___DISABLE_PSQ": {
+ "format": "[EMAC][MCH][T][PSQ] Disable PSQ",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___SWAP_PSQ": {
+ "format": "[EMAC][MCH][T][PSQ] Swap PSQ",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___PSQ_INFO": {
+ "format": "[EMAC][MCH][T][PSQ] PSQ: atm_psq_idx=%ul, atm_psq_r_idx=%ul, atm_psq_w_idx=%ul, valid_ps_num=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___PSQ_EMPTY": {
+ "format": "[EMAC][MCH][T][PSQ] PSQ is empty",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_ERR___PSQ_FULL": {
+ "format": "[EMAC][MCH][T][PSQ][ERROR] PSQ is full",
+ "traceClass": "EMAC_ERROR",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___HSQ_RW_IDX": {
+ "format": "[EMAC][MCH][T][HSQ] HSQ: atm_hsq_r_idx=%ul, atm_hsq_w_idx=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___CLEAR_HSQ": {
+ "format": "[EMAC][MCH][T][HSQ] Clear all HSQ",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___CLEAR_HSQ_BEFORE": {
+ "format": "[EMAC][MCH][T][HSQ] Before clear HSQ: said=%ub, atm_hsq_r_idx=%ul, atm_hsq_w_idx=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___CLEAR_HSQ_AFTER": {
+ "format": "[EMAC][MCH][T][HSQ] After clear HSQ: said=%ub, atm_hsq_r_idx=%ul, atm_hsq_w_idx=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___UPDATE_RRC_TID": {
+ "format": "[EMAC][MCH][T][TID] Update RRC TID: atm_rrc_tid=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___UPDATE_EL1_TID": {
+ "format": "[EMAC][MCH][T][TID] Update EL1 TID: atm_el1_tid=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_WAR___PIDX_MISMATCH": {
+ "format": "[EMAC][MCH][T][L+L][WARN] pidx mismatch: active_pidx=%ub, trans_pidx=%ub",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMACMCH_L_WAR___PRINT_E": {
+ "format": "[EMAC][MCH][L][WARN] %Memacmch_log_e",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMACMCH_L_LOG___QUERY_OUTPUT_A": {
+ "format": "[EMAC][MCH][L][QURY] next mch: tid=%ul el1_tid=%ul rrc_tid=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_L_LOG___QUERY_OUTPUT_D": {
+ "format": "[EMAC][MCH][L][QURY] next mch: gemini_priority=%Mel1_embms_gemini_priority_enum",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_L_WAR___QUERY_FAILURE_A": {
+ "format": "[EMAC][MCH][L][WARN] next mch fail due to ongoing configuration in task(T->L). psq_idx=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMACMCH_L_WAR___QUERY_FAILURE_B": {
+ "format": "[EMAC][MCH][L][WARN] next mch fail due to empty PSQ.",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMACMCH_L_WAR___QUERY_FAILURE_C": {
+ "format": "[EMAC][MCH][L][WARN] next mch fail due to ongoing configuration in task(L->T).",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMACMCH_L_WAR___QUERY_FAILURE_D": {
+ "format": "[EMAC][MCH][L][WARN] next mch fail due to no valid PS.",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMACMCH_L_WAR___QUERY_FAILURE_E": {
+ "format": "[EMAC][MCH][L][WARN] QUERY_NEXT_MCH is received but active_pidx=INVALID.",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMACMCH_L_WAR___QUERY_FAILURE_F": {
+ "format": "[EMAC][MCH][L][WARN] next mch fail due to active_pidx and input_pidx mismatch.",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMACMCH_L_LOG___PSQ_IDX": {
+ "format": "[EMAC][MCH][L][PSQ] PSQ: atm_psq_idx=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_L_LOG___PSQ_RW_IDX": {
+ "format": "[EMAC][MCH][L][PSQ] PSQ: atm_psq_r_idx=%ul atm_psq_w_idx=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_L_LOG___HSQ_RW_IDX": {
+ "format": "[EMAC][MCH][L][HSQ] HSQ: atm_hsq_r_idx=%ul atm_hsq_w_idx=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_L_ERR___HSQ_FULL": {
+ "format": "[EMAC][MCH][L][HSQ][ERROR] HSQ is full",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_ERROR",
+ "traceHighlightOption": "error"
+ }
+ }
+ ],
+ "traceFamily": "L2"
+}
\ No newline at end of file
diff --git a/mcu/protocol/interface/el2/trace/emac_trace_internal_utmd.json b/mcu/protocol/interface/el2/trace/emac_trace_internal_utmd.json
new file mode 100644
index 0000000..80cb029
--- /dev/null
+++ b/mcu/protocol/interface/el2/trace/emac_trace_internal_utmd.json
@@ -0,0 +1,485 @@
+{
+ "endGen": "Legacy",
+ "startGen": "Legacy",
+ "legacyParameters": {
+ "codeSection": "TCMFORCE",
+ "l2BufferSetting": "L2_BUFFER_EL2",
+ "l2MaxArg": 15,
+ "modemType": "LTE_L2"
+ },
+ "module": "EMAC_INTERNAL",
+ "stringTranslationDefs": [],
+ "traceClassDefs": [
+ {
+ "EMAC_LV1": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "EMAC_LV2": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "EMAC_LV3": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "EMAC_WARN": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "EMAC_ERROR": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "EMAC_DEBUG": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ }
+ ],
+ "traceDefs": [
+ {
+ "EMUX_LOG___CACHE_FLUSH_MUX_BUF": {
+ "format": "[EMAC][EMUX][TB] Cache flush for mux_buf",
+ "traceClass": "EMAC_LV3",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___CACHE_FLUSH_PAD_BUF": {
+ "format": "[EMAC][EMUX][PAD] Cache flush for pad_buf",
+ "traceClass": "EMAC_LV3",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___SYSTEM": {
+ "format": "[EMAC][EMUX][INFO] System: LV1_CACHE=%ub, LV2_CACHE=%ub",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___FILL_IB_COTF": {
+ "format": "[EMAC][EMUX][DSC] Fill IB COTF =[%xl %xl %xl]",
+ "traceClass": "EMAC_LV3",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___FILL_IB_TM": {
+ "format": "[EMAC][EMUX][DSC] Fill IB TM =[%xl %xl]",
+ "traceClass": "EMAC_LV3",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___FILL_NM_MUXBUF": {
+ "format": "[EMAC][EMUX][DSC] Fill NM MUXBUF =[%xl %xl]",
+ "traceClass": "EMAC_LV3",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___FILL_RLC_DSCS": {
+ "format": "[EMAC][EMUX][DSC] Fill RLC DSCs",
+ "traceClass": "EMAC_LV3",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___FILL_NM_PADBUF": {
+ "format": "[EMAC][EMUX][DSC] Fill NM PADBUF =[%xl %xl]",
+ "traceClass": "EMAC_LV3",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___QP_START": {
+ "format": "[EMAC][EMUX][DSC] QP Start: write_inc_num=%ud",
+ "traceClass": "EMAC_LV3",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_RX_PROC": {
+ "format": "[EMAC][DL][Poll] rcv Poll at abs %ul, cell_cnt %ud, DL LMAC r_idx %ud, w_idx %ud",
+ "traceClass": "EMAC_LV3",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_RCV_LMAC_RAR_INT": {
+ "format": "[EMAC][DL][INT] rcv LMAC RAR interrupt, notify EMACDL",
+ "traceClass": "EMAC_LV3",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_RCV_LMAC_TC_INT": {
+ "format": "[EMAC][DL][INT] rcv LMAC TC-RNTI interrupt, notify EMACDL",
+ "traceClass": "EMAC_LV3",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_RCV_LMAC_DATA_READY_INT": {
+ "format": "[EMAC][DL][INT] rcv LMAC Data Ready interrupt, notify EMACDL",
+ "traceClass": "EMAC_LV3",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___RELEASE_VRB": {
+ "format": "[EMAC][MCH][T][VRB] Release RLC DL VRB: addr=%xl, len=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EL2POW_LOG_RCV_EL1_POWER_ON_REQ": {
+ "format": "[EL2POW] Rcv on_req from EL1, cause %Mel1_power_on_cause_e, old_bmp %ul",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EL2POW_LOG_RCV_POWER_ON_REQ": {
+ "format": "[EL2POW] Rcv on_req from %Mel2pow_user_event_e, old_bmp %ul",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EL2POW_LOG_RCV_EL1_POWER_OFF_REQ": {
+ "format": "[EL2POW] Rcv off_req from EL1, cause %Mel1_power_off_cause_e, cur_bmp %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EL2POW_LOG_RCV_POWER_OFF_REQ": {
+ "format": "[EL2POW] Rcv off_req from %Mel2pow_user_event_e, cur_bmp %ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EL2POW_LOG_POWER_ON": {
+ "format": "[EL2POW] <Copro on> by %Mel2pow_user_event_e",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EL2POW_LOG_POWER_OFF_PENDING": {
+ "format": "[EL2POW] <Copro off pending> by %Mel2pow_pending_chk_e",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EL2POW_LOG_POWER_OFF_PENDING_ONE_MORE_TICK": {
+ "format": "[EL2POW] <Copro off pending> off ready, wait for one more tick",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EL2POW_LOG_POWER_OFF": {
+ "format": "[EL2POW] <Copro off>",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EL2POW_LOG_TICK_OFF_PENDING": {
+ "format": "[EL2POW] <Tick off pending> by %Mel2pow_pending_chk_e",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EL2POW_LOG_TICK_OFF": {
+ "format": "[EL2POW] <Tick off>",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EL2POW_LOG_TICK_ON": {
+ "format": "[EL2POW] <Tick on>",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EL2POW_LOG_RCV_TICK": {
+ "format": "[EL2POW] Rcv Tick %ub, expect %ub",
+ "traceClass": "EMAC_LV3",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EL2POW_LOG_RCV_EL1_SCH_CLOSE_RXBRP_IDLE": {
+ "format": "[EL2POW] EL1 notify SCH close and RXBRP idle",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EL2POW_LOG_RCV_LMAC_HARQ_RESET_REQ": {
+ "format": "[EL2POW] Rcv LMAC HARQ reset req from EMAC",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EL2POW_LOG_RCV_VA_SHORTAGE_NTF": {
+ "format": "[EL2POW] Rcv DL MAC VRB VA shortage ntf, addr=%xl",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EL2EM_LOG_UPDATE_PER_EM_STATUS": {
+ "format": "[EL2EM] %Mel2em_em_type_e status update to %Mem_info_status_enum",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EL2EM_LOG_CUR_PER_EM_TYPE_BMP": {
+ "format": "[EL2EM] %Mel2em_em_type_e current status %ub",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EL2EM_LOG_CUR_PER_REG_SRC_BMP": {
+ "format": "[EL2EM] %Mel2em_reg_src_e current bmp %ud, current periodic bmp %ud",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EL2EM_LOG_DUMMY4": {
+ "format": "[EL2EM] dummy log %ul, %ul, %ul, %ul",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EL2ICD_LOG_CTRL_NTF": {
+ "format": "[EL2ICD] ctrl cause %Mel2icd_ctrl_cause_e, to task %Mel2icd_task_e",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EL2ICD_LOG_TMR_NTF": {
+ "format": "[EL2ICD] tmr period %Mel2icd_period_e expire, to task %Mel2icd_task_e",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EL2ICD_LOG_DUMMY4": {
+ "format": "[EL2ICD] dummy log %ul, %ul, %ul, %ul",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EL2ICD_LOG_SPS_DL_TB_INFO": {
+ "format": "[EL2ICD] SPS DL INFO: cell_time_cnt=%ul, dl_harq_id=%ub",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EL2ICD_LOG_RECORD_LOGGING_ERROR": {
+ "format": "[EL2ICD] ICD record %ud: logging error %ub, icd_protocol_id %ub, ptr %ul, len/num %ud",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "EL2ICD_LOG_EVENT_LOGGING_ERROR": {
+ "format": "[EL2ICD] ICD event %ud: logging error %ub, icd_protocol_id %ub, ptr %ul, len/num %ud",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "EL2ICD_LOG_REGISTER_CB_FAIL": {
+ "format": "[EL2ICD] SYSTEM_NTF CB register fail",
+ "traceClass": "EMAC_LV2",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "EL2DVFS_MCU_GEAR_NOT_MEET_REQUIREMENT": {
+ "format": "[EL2DVFS] MCU gear not meet el2 requirement! current_md_gear=%ul, el2_gear=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EL2DVFS_MCU_GEAR_INFO": {
+ "format": "[EL2DVFS] el2 gear change: current_md_gear=%ul, el2_gear=%ul, required_gear=%ul, reason=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_ERT_LOG_CFG_VOLTE_TIMING_REPORT_REQ": {
+ "format": "[EMAC][VOLTE][CFG] volte_timing_report_req=%ub (0: disable, 1: enable), period=%ul, report_mode=%ub",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_ERT_LOG_CFG_VOLTE_TIMING_REPORT": {
+ "format": "[EMAC][VOLTE] volte timing report: time_to_sr=%ul, sr_period=%ul, time_to_ondu=%ul, drx_cycle=%ul, us_time=%ul",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_ERT_LOG_SR_VSR_CONFIG": {
+ "format": "[EMAC][VOLTE][SR] vsr config: drx_cycle=%ud, drx_offset=%ud, sr_period=%ud, sr_offset=%ud, vsr_period=%ud, vsr_offset=%ud, timing_report_vsr_period=%ud, timing_report_vsr_offset=%ud",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_ERT_LOG_SR_VSR_COVER": {
+ "format": "[EMAC][VOLTE][SR] vsr cover computation: vsr_offset=%ud, vsr_cover=%ud",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_VOLTE_POW_ENH_EVENT": {
+ "format": "[EMAC][VOLTE][POW] volte power enhance event=%Memac_volte_pow_enh_event_e, combo_in_ondu=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___CFG_EARLY_CLOSE_UL_HARQ_REQ": {
+ "format": "[EMAC][UL-HARQ][CFG] early close ul harq req, type=%Memac_early_close_ul_harq_type_bit_e, operation=%ub (0: stop, 1: start), interval=%ul, early_ul_harq_max_nb=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___HARQ_EARLY_CLOSE_REACHED": {
+ "format": "[EMAC][UL-HARQ] harq last tx: early close: reach rule=%ub, ul_cc_idx=%ub, harq_id=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___EARLY_CLOSE_UL_HARQ_OPERATION": {
+ "format": "[EMAC][UL-HARQ] early close ul harq operation=%ub (0: disable, 1: enable)",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_LOG___EARLY_CLOSE_UL_HARQ_EXPIRY": {
+ "format": "[EMAC][UL-HARQ] early close ul harq expiry: type=%Memac_early_close_ul_harq_type_bit_e",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_UL_HARQ_WARN___CFG_EARLY_CLOSE_UL_HARQ_WARN": {
+ "format": "[EMAC][UL-HARQ][CFG] early close ul harq is not enabled, reason=%ub (0: sch close, 1: drx is not enabled or tti bundling is enabled)",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_WARN",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_LOG_TMC_THERMAL_CTRL": {
+ "format": "[EMAC][SCELL][TMC] rcv thermal_ctrl_req=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_LOG_TMC_THERMAL_CTRL_95": {
+ "format": "[EMAC][SCELL][TMC] rcv thermal_ctrl_req %Mtmc_ctrl_cmd_enum, pa_ctrl=%Mtmc_pa_ctrl_enum, ca_ctrl=%Mtmc_ca_ctrl_enum",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_LOG_TMC_DROP_CMD": {
+ "format": "[EMAC][SCELL][TMC] drop scell_cmd due to thermal ctrl enable, cmd=%xb, rcv_time=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_LOG_TMC_DROP_CMD_INTERBAND": {
+ "format": "[EMAC][SCELL][TMC] drop inter-band cc_idx=%xb due to thermal ctrl enable",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV1",
+ "traceHighlightOption": "warn"
+ }
+ }
+ ],
+ "traceFamily": "L2"
+}
\ No newline at end of file
diff --git a/mcu/protocol/interface/el2/trace/emac_trace_public_utmd.json b/mcu/protocol/interface/el2/trace/emac_trace_public_utmd.json
new file mode 100644
index 0000000..1bc5aa4
--- /dev/null
+++ b/mcu/protocol/interface/el2/trace/emac_trace_public_utmd.json
@@ -0,0 +1,1607 @@
+{
+ "endGen": "Legacy",
+ "startGen": "Legacy",
+ "legacyParameters": {
+ "codeSection": "TCMFORCE",
+ "l2BufferSetting": "L2_BUFFER_EL2",
+ "l2MaxArg": 15,
+ "modemType": "LTE_L2"
+ },
+ "module": "EMAC_PUBLIC",
+ "stringTranslationDefs": [],
+ "traceClassDefs": [
+ {
+ "EMAC_LV0": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ }
+ ],
+ "traceDefs": [
+ {
+ "EMAC_LOG_CRNTI_DL_ASSIGNMENT": {
+ "format": "[EMAC][DL-HARQ] \\n<dldci: t-%ud:2, cc_idx=%ud:2, dl_harq_id=%ud:4, type=1, sps=0, tb_valid=%ud:1%ud:1, new=%ud:1%ud:1%pd:4>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_DL_ASSIGNMENT": {
+ "format": "[EMAC][DL-HARQ] \\n<dldci: t-%ul:2, cc_idx=%ul:2, dl_harq_id=%ul:4, type=%ul:4, sps=%ul:2, tb_valid=%ul:1%ul:1, new=%ul:1%ul:1%pl:14>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_UL_GRANT": {
+ "format": "[EMAC][UL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=%ul:2, type=%ul:8, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_ASYNC_UL_GRANT": {
+ "format": "[EMAC][UL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=%ul:2, type=%ul:8, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3, async_harq_id=%ub, repetition=%ub>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_PHICH": {
+ "format": "[EMAC][UL-HARQ] \\n<phich: ul_cc_idx=%ud:2, harq_id=%ud:3, rlt=%ud:2%pd:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_CRC_RESULT": {
+ "format": "[EMAC][DL-HARQ] \\n<crc: cc_idx=%ud:2, dl_harq_id=%ud:4, tb_valid=%ud:1%ud:1, rlt=%ud:1%ud:1%pd:6>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=0, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3> \\n<dldci: t-%ul:2, cc_idx=0, dl_harq_id=%ul:4, type=1, sps=0, tb_valid=%ul:1%ul:1, new=%ul:1%ul:1> \\n<phich:%pb:1 ul_cc_idx=0, harq_id=%ub:3, rlt=%ub:2%pb:2> \\n<crc: cc_idx=0, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1> \\n<uldci: t-%ul:2, ul_cc_idx=1, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3> \\n<dldci: t-%ul:2, cc_idx=1, dl_harq_id_id=%ul:4, type=1, sps=0, tb_valid=%ul:1%ul:1, new=%ul:1%ul:1> \\n<phich:%pb:1 ul_cc_idx=1, harq_id=%ub:3, rlt=%ub:2%pb:2> \\n<crc: cc_idx=1, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC0_0001": {
+ "format": "[EMAC][DL-HARQ] \\n<crc: cc_idx=0, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC0_0010": {
+ "format": "[EMAC][UL-HARQ] \\n<phich:%pb:1 ul_cc_idx=0, harq_id=%ub:3, rlt=%ub:2%pb:2>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC0_0011": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<phich:%pb:1 ul_cc_idx=0, harq_id=%ub:3, rlt=%ub:2%pb:2> \\n<crc: cc_idx=0, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC0_0100": {
+ "format": "[EMAC][DL-HARQ] \\n<dldci: t-%ud:2, cc_idx=0, dl_harq_id=%ud:4, type=1, sps=0, tb_valid=%ud:1%ud:1, new=%ud:1%ud:1%pd:6>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC0_0101": {
+ "format": "[EMAC][DL-HARQ] \\n<dldci: t-%ud:2, cc_idx=0, dl_harq_id=%ud:4, type=1, sps=0, tb_valid=%ud:1%ud:1, new=%ud:1%ud:1%pd:6> \\n<crc: cc_idx=0, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC0_0110": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<dldci: t-%ud:2, cc_idx=0, dl_harq_id=%ud:4, type=1, sps=0, tb_valid=%ud:1%ud:1, new=%ud:1%ud:1%pd:6> \\n<phich:%pb:1 ul_cc_idx=0, harq_id=%ub:3, rlt=%ub:2%pb:2>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC0_0111": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<dldci: t-%ud:2, cc_idx=0, dl_harq_id=%ud:4, type=1, sps=0, tb_valid=%ud:1%ud:1, new=%ud:1%ud:1%pd:6> \\n<phich:%pb:1 ul_cc_idx=0, harq_id=%ub:3, rlt=%ub:2%pb:2> \\n<crc: cc_idx=0, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC0_1000": {
+ "format": "[EMAC][UL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=0, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3%pl:10>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC0_1001": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=0, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3%pl:2> \\n<crc: cc_idx=0, dl_harq_id=%ul:4, tb_valid=%ul:1%ul:1, rlt=%ul:1%ul:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC0_1010": {
+ "format": "[EMAC][UL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=0, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3%pl:2> \\n<phich:%pl:1 ul_cc_idx=0, harq_id=%ul:3, rlt=%ul:2%pl:2>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC0_1011": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=0, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3%pl:10> \\n<phich:%pb:1 ul_cc_idx=0, harq_id=%ub:3, rlt=%ub:2%pb:2> \\n<crc: cc_idx=0, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC0_1100": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=0, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3> \\n<dldci: t-%ul:2, cc_idx=0, dl_harq_id=%ul:4, type=1, sps=0, tb_valid=%ul:1%ul:1, new=%ul:1%ul:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC0_1101": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=0, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3> \\n<dldci: t-%ul:2, cc_idx=0, dl_harq_id=%ul:4, type=1, sps=0, tb_valid=%ul:1%ul:1, new=%ul:1%ul:1> \\n<crc: cc_idx=0, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC0_1110": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=0, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3> \\n<dldci: t-%ul:2, cc_idx=0, dl_harq_id=%ul:4, type=1, sps=0, tb_valid=%ul:1%ul:1, new=%ul:1%ul:1> \\n<phich:%pb:1 ul_cc_idx=0, harq_id=%ub:3, rlt=%ub:2%pb:2>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC0_1111": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=0, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3> \\n<dldci: t-%ul:2, cc_idx=0, dl_harq_id=%ul:4, type=1, sps=0, tb_valid=%ul:1%ul:1, new=%ul:1%ul:1> \\n<phich:%pb:1 ul_cc_idx=0, harq_id=%ub:3, rlt=%ub:2%pb:2> \\n<crc: cc_idx=0, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC1_0001": {
+ "format": "[EMAC][DL-HARQ] \\n<crc: cc_idx=1, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC1_0010": {
+ "format": "[EMAC][UL-HARQ] \\n<phich:%pb:1 ul_cc_idx=1, harq_id=%ub:3, rlt=%ub:2%pb:2>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC1_0011": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<phich:%pb:1 ul_cc_idx=1, harq_id=%ub:3, rlt=%ub:2%pb:2> \\n<crc: cc_idx=1, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC1_0100": {
+ "format": "[EMAC][DL-HARQ] \\n<dldci: t-%ud:2, cc_idx=1, dl_harq_id=%ud:4, type=1, sps=0, tb_valid=%ud:1%ud:1, new=%ud:1%ud:1%pd:6>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC1_0101": {
+ "format": "[EMAC][DL-HARQ] \\n<dldci: t-%ud:2, cc_idx=1, dl_harq_id=%ud:4, type=1, sps=0, tb_valid=%ud:1%ud:1, new=%ud:1%ud:1%pd:6> \\n<crc: cc_idx=1, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC1_0110": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<dldci: t-%ud:2, cc_idx=1, dl_harq_id=%ud:4, type=1, sps=0, tb_valid=%ud:1%ud:1, new=%ud:1%ud:1%pd:6> \\n<phich:%pb:1 ul_cc_idx=1, harq_id=%ub:3, rlt=%ub:2%pb:2>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC1_0111": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<dldci: t-%ud:2, cc_idx=1, dl_harq_id=%ud:4, type=1, sps=0, tb_valid=%ud:1%ud:1, new=%ud:1%ud:1%pd:6> \\n<phich:%pb:1 ul_cc_idx=1, harq_id=%ub:3, rlt=%ub:2%pb:2> \\n<crc: cc_idx=1, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC1_1000": {
+ "format": "[EMAC][UL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=1, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3%pl:10>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC1_1001": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=1, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3%pl:2> \\n<crc: cc_idx=1, dl_harq_id=%ul:4, tb_valid=%ul:1%ul:1, rlt=%ul:1%ul:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC1_1010": {
+ "format": "[EMAC][UL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=1, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3%pl:2> \\n<phich:%pl:1 ul_cc_idx=1, harq_id=%ul:3, rlt=%ul:2%pl:2>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC1_1011": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=1, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3%pl:10> \\n<phich:%pb:1 ul_cc_idx=1, harq_id=%ub:3, rlt=%ub:2%pb:2> \\n<crc: cc_idx=1, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC1_1100": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=1, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3> \\n<dldci: t-%ul:2, cc_idx=1, dl_harq_id=%ul:4, type=1, sps=0, tb_valid=%ul:1%ul:1, new=%ul:1%ul:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC1_1101": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=1, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3> \\n<dldci: t-%ul:2, cc_idx=1, dl_harq_id=%ul:4, type=1, sps=0, tb_valid=%ul:1%ul:1, new=%ul:1%ul:1> \\n<crc: cc_idx=1, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC1_1110": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=1, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3> \\n<dldci: t-%ul:2, cc_idx=1, dl_harq_id=%ul:4, type=1, sps=0, tb_valid=%ul:1%ul:1, new=%ul:1%ul:1> \\n<phich:%pb:1 ul_cc_idx=1, harq_id=%ub:3, rlt=%ub:2%pb:2>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC1_1111": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=1, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3> \\n<dldci: t-%ul:2, cc_idx=1, dl_harq_id=%ul:4, type=1, sps=0, tb_valid=%ul:1%ul:1, new=%ul:1%ul:1> \\n<phich:%pb:1 ul_cc_idx=1, harq_id=%ub:3, rlt=%ub:2%pb:2> \\n<crc: cc_idx=1, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC2_0001": {
+ "format": "[EMAC][DL-HARQ] \\n<crc: cc_idx=2, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC2_0010": {
+ "format": "[EMAC][UL-HARQ] \\n<phich:%pb:1 ul_cc_idx=2, harq_id=%ub:3, rlt=%ub:2%pb:2>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC2_0011": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<phich:%pb:1 ul_cc_idx=2, harq_id=%ub:3, rlt=%ub:2%pb:2> \\n<crc: cc_idx=2, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC2_0100": {
+ "format": "[EMAC][DL-HARQ] \\n<dldci: t-%ud:2, cc_idx=2, dl_harq_id=%ud:4, type=1, sps=0, tb_valid=%ud:1%ud:1, new=%ud:1%ud:1%pd:6>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC2_0101": {
+ "format": "[EMAC][DL-HARQ] \\n<dldci: t-%ud:2, cc_idx=2, dl_harq_id=%ud:4, type=1, sps=0, tb_valid=%ud:1%ud:1, new=%ud:1%ud:1%pd:6> \\n<crc: cc_idx=2, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC2_0110": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<dldci: t-%ud:2, cc_idx=2, dl_harq_id=%ud:4, type=1, sps=0, tb_valid=%ud:1%ud:1, new=%ud:1%ud:1%pd:6> \\n<phich:%pb:1 ul_cc_idx=2, harq_id=%ub:3, rlt=%ub:2%pb:2>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC2_0111": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<dldci: t-%ud:2, cc_idx=2, dl_harq_id=%ud:4, type=1, sps=0, tb_valid=%ud:1%ud:1, new=%ud:1%ud:1%pd:6> \\n<phich:%pb:1 ul_cc_idx=2, harq_id=%ub:3, rlt=%ub:2%pb:2> \\n<crc: cc_idx=2, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC2_1000": {
+ "format": "[EMAC][UL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=2, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3%pl:10>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC2_1001": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=2, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3%pl:2> \\n<crc: cc_idx=2, dl_harq_id=%ul:4, tb_valid=%ul:1%ul:1, rlt=%ul:1%ul:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC2_1010": {
+ "format": "[EMAC][UL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=2, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3%pl:2> \\n<phich:%pl:1 ul_cc_idx=2, harq_id=%ul:3, rlt=%ul:2%pl:2>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC2_1011": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=2, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3%pl:10> \\n<phich:%pb:1 ul_cc_idx=2, harq_id=%ub:3, rlt=%ub:2%pb:2> \\n<crc: cc_idx=2, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC2_1100": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=2, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3> \\n<dldci: t-%ul:2, cc_idx=2, dl_harq_id=%ul:4, type=1, sps=0, tb_valid=%ul:1%ul:1, new=%ul:1%ul:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC2_1101": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=2, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3> \\n<dldci: t-%ul:2, cc_idx=2, dl_harq_id=%ul:4, type=1, sps=0, tb_valid=%ul:1%ul:1, new=%ul:1%ul:1> \\n<crc: cc_idx=2, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC2_1110": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=2, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3> \\n<dldci: t-%ul:2, cc_idx=2, dl_harq_id=%ul:4, type=1, sps=0, tb_valid=%ul:1%ul:1, new=%ul:1%ul:1> \\n<phich:%pb:1 ul_cc_idx=2, harq_id=%ub:3, rlt=%ub:2%pb:2>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC2_1111": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=2, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3> \\n<dldci: t-%ul:2, cc_idx=2, dl_harq_id=%ul:4, type=1, sps=0, tb_valid=%ul:1%ul:1, new=%ul:1%ul:1> \\n<phich:%pb:1 ul_cc_idx=2, harq_id=%ub:3, rlt=%ub:2%pb:2> \\n<crc: cc_idx=2, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC3_0001": {
+ "format": "[EMAC][DL-HARQ] \\n<crc: cc_idx=3, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC3_0010": {
+ "format": "[EMAC][UL-HARQ] \\n<phich:%pb:1 ul_cc_idx=3, harq_id=%ub:3, rlt=%ub:2%pb:2>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC3_0011": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<phich:%pb:1 ul_cc_idx=3, harq_id=%ub:3, rlt=%ub:2%pb:2> \\n<crc: cc_idx=3, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC3_0100": {
+ "format": "[EMAC][DL-HARQ] \\n<dldci: t-%ud:2, cc_idx=3, dl_harq_id=%ud:4, type=1, sps=0, tb_valid=%ud:1%ud:1, new=%ud:1%ud:1%pd:6>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC3_0101": {
+ "format": "[EMAC][DL-HARQ] \\n<dldci: t-%ud:2, cc_idx=3, dl_harq_id=%ud:4, type=1, sps=0, tb_valid=%ud:1%ud:1, new=%ud:1%ud:1%pd:6> \\n<crc: cc_idx=3, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC3_0110": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<dldci: t-%ud:2, cc_idx=3, dl_harq_id=%ud:4, type=1, sps=0, tb_valid=%ud:1%ud:1, new=%ud:1%ud:1%pd:6> \\n<phich:%pb:1 ul_cc_idx=3, harq_id=%ub:3, rlt=%ub:2%pb:2>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC3_0111": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<dldci: t-%ud:2, cc_idx=3, dl_harq_id=%ud:4, type=1, sps=0, tb_valid=%ud:1%ud:1, new=%ud:1%ud:1%pd:6> \\n<phich:%pb:1 ul_cc_idx=3, harq_id=%ub:3, rlt=%ub:2%pb:2> \\n<crc: cc_idx=3, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC3_1000": {
+ "format": "[EMAC][UL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=3, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3%pl:10>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC3_1001": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=3, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3%pl:2> \\n<crc: cc_idx=3, dl_harq_id=%ul:4, tb_valid=%ul:1%ul:1, rlt=%ul:1%ul:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC3_1010": {
+ "format": "[EMAC][UL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=3, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3%pl:2> \\n<phich:%pl:1 ul_cc_idx=3, harq_id=%ul:3, rlt=%ul:2%pl:2>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC3_1011": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=3, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3%pl:10> \\n<phich:%pb:1 ul_cc_idx=3, harq_id=%ub:3, rlt=%ub:2%pb:2> \\n<crc: cc_idx=3, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC3_1100": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=3, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3> \\n<dldci: t-%ul:2, cc_idx=3, dl_harq_id=%ul:4, type=1, sps=0, tb_valid=%ul:1%ul:1, new=%ul:1%ul:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC3_1101": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=3, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3> \\n<dldci: t-%ul:2, cc_idx=3, dl_harq_id=%ul:4, type=1, sps=0, tb_valid=%ul:1%ul:1, new=%ul:1%ul:1> \\n<crc: cc_idx=3, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC3_1110": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=3, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3> \\n<dldci: t-%ul:2, cc_idx=3, dl_harq_id=%ul:4, type=1, sps=0, tb_valid=%ul:1%ul:1, new=%ul:1%ul:1> \\n<phich:%pb:1 ul_cc_idx=3, harq_id=%ub:3, rlt=%ub:2%pb:2>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_INPUT_CC3_1111": {
+ "format": "[EMAC][UL-HARQ][DL-HARQ] \\n<uldci: t-%ul:2, ul_cc_idx=3, type=0, ndi=%ul:1, rv=%ul:2, tbs=%ul:14, k=%ul:3> \\n<dldci: t-%ul:2, cc_idx=3, dl_harq_id=%ul:4, type=1, sps=0, tb_valid=%ul:1%ul:1, new=%ul:1%ul:1> \\n<phich:%pb:1 ul_cc_idx=3, harq_id=%ub:3, rlt=%ub:2%pb:2> \\n<crc: cc_idx=3, dl_harq_id=%ub:4, tb_valid=%ub:1%ub:1, rlt=%ub:1%ub:1>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_UL_HARQ_INFO_REACTIVE": {
+ "format": "[EMAC][UL-HARQ] tx_req: ul_cc_idx=%ud:1 \\n<ul status=%xd:2, type=%ud:4, harq_id=%ud:3, ndi=%ud:1, mode=%ud:2, ack=%ud:1, tx=%ud:1, mux=%ud:1> \\n<harq status=%xl:5, buffer=%ul:3, bundle=%ul:3, rv=%ul:2, cnt=%ul:5, tbs=%ul:14> \\n<retx time=%ul:5, phich time=%ul:5, uldci num=%ul:2, uldci1=%ul:5, uldci2=%ul:5%pl:10> \\n<harq_id=%ub:4 close> \\n<harq_id=%ub:4 activate>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_UL_HARQ_INFO_NEW_HARQ": {
+ "format": "[EMAC][UL-HARQ] tx_req: ul_cc_idx=%ud:1 \\n<ul status=%xd:2, type=%ud:4, harq_id=%ud:3, ndi=%ud:1, mode=%ud:2, ack=%ud:1, tx=%ud:1, mux=%ud:1> \\n<harq status=%xl:5, buffer=%ul:3, bundle=%ul:3, rv=%ul:2, cnt=%ul:5, tbs=%ul:14> \\n<retx time=%ul:5, phich time=%ul:5, uldci num=%ul:2, uldci1=%ul:5, uldci2=%ul:5%pl:10%pb:4> \\n<harq_id=%ub:4 activate>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_UL_HARQ_INFO_RETX": {
+ "format": "[EMAC][UL-HARQ] tx_req: ul_cc_idx=%ud:1 \\n<ul status=%xd:2, type=%ud:4, harq_id=%ud:3, ndi=%ud:1, mode=%ud:2, ack=%ud:1, tx=%ud:1, mux=%ud:1> \\n<harq status=%xl:5, buffer=%ul:3, bundle=%ul:3, rv=%ul:2, cnt=%ul:5, tbs=%ul:14> \\n<retx time=%ul:5, phich time=%ul:5, uldci num=%ul:2, uldci1=%ul:5, uldci2=%ul:5%pl:10>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_UL_HARQ_INFO_FINAL": {
+ "format": "[EMAC][UL-HARQ] tx_req: ul_cc_idx=%ud:1 \\n<ul status=%xd:2, type=%ud:4, harq_id=%ud:3, ndi=%ud:1, mode=%ud:2, ack=%ud:1, tx=%ud:1, mux=%ud:1> \\n<harq status=%xl:5, buffer=%ul:3, bundle=%ul:3, rv=%ul:2, cnt=%ul:5, tbs=%ul:14> \\n<harq_id=%ub:4 close%pb:4>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_UL_HARQ_INFO_NEW_LAST": {
+ "format": "[EMAC][UL-HARQ] tx_req: ul_cc_idx=%ud:1 \\n<ul status=%xd:2, type=%ud:4, harq_id=%ud:3, ndi=%ud:1, mode=%ud:2, ack=%ud:1, tx=%ud:1, mux=%ud:1> \\n<harq status=%xl:5, buffer=%ul:3, bundle=%ul:3, rv=%ul:2, cnt=%ul:5, tbs=%ul:14> \\n<harq_id=%ub:4 close> \\n<harq_id=%ub:4 activate>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_UL_HARQ_INFO_RETX_NOTX": {
+ "format": "[EMAC][UL-HARQ] tx_req: ul_cc_idx=%ud:1 \\n<ul status=%xd:2, type=%ud:4, harq_id=%ud:3, ndi=%ud:1, mode=%ud:2, ack=%ud:1, tx=%ud:1, mux=%ud:1> \\n<retx time=%ul:5, phich time=%ul:5, uldci num=%ul:2, uldci1=%ul:5, uldci2=%ul:5%pl:10>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_UL_HARQ_INFO_FINAL_NOTX": {
+ "format": "[EMAC][UL-HARQ] tx_req: ul_cc_idx=%ud:1 \\n<ul status=%xd:2, type=%ud:4, harq_id=%ud:3, ndi=%ud:1, mode=%ud:2, ack=%ud:1, tx=%ud:1, mux=%ud:1> \\n<harq_id=%ub:4 close>%pb:4",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TTI_UL_HARQ_INFO_DEFAULT": {
+ "format": "[EMAC][UL-HARQ][WARN] tx_req: ul_cc_idx=%ud:2 <ul status=%xd:2, type=%ud:4, harq_id=%ud:3, mode=%ud:2, tx=%ud:1, mux=%ud:1%pd:1> \\n<harq status=%xl:5, buffer=%ul:3, bundle=%ul:3, rv=%ul:2, cnt=%ul:5, tbs=%ul:14> \\n<retx time=%ul:5, phich time=%ul:5, uldci num=%ul:2, uldci1=%ul:5, uldci2=%ul:5%pl:10> \\n<harq_id=%ub:4 close> \\n<harq_id=%ub:4 activate>",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_LOG_CFG_RRC_RESET": {
+ "format": "[EMAC][CFG] EMAC reset",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_RA_CFG": {
+ "format": "[EMAC][CFG][RA] preamble_nb=%ub, group_a_size=%ub, group_b_size=%ub, msg_sz_group_a=%ub, rar_wnd=%ub, cr_timer=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_RA_CFG2": {
+ "format": "[EMAC][CFG][RA] msg3_tx_max=%ub, pow_offset_b=%ub, pmax=%b, delta_msg3=%b",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_RA_CFG3": {
+ "format": "[EMAC][CFG][RA] cc_idx=%ub, pow_ramping=%b, preamble_tx_max=%ub, preamble_init_pow=%b",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_CFG_SET_HO_CRNTI": {
+ "format": "[EMAC][CFG][HO] HO set c-rnti=%ud",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_CFG_SET_CRNTI": {
+ "format": "[EMAC][CFG] set c-rnti=%ud",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_CFG_STAG_TMR": {
+ "format": "[EMAC][CFG][TA] Config stag TA timer: tag_id=%ub, length=%ud",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_RRC_CFG": {
+ "format": "[EMAC][CFG] Function status=%xb, sr_prohibit_cnt=%ub, sr_prohibit_tmr=%ul, ta_timer_len=%ud",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_CFG_SR": {
+ "format": "[EMAC][CFG][SR] SR resource config: sr_offset=%ub, sr_period=%ub, sr_max=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_CFG_SR_RELEASE": {
+ "format": "[EMAC][CFG][SR] SR resource released",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_CFG_UL_SPS": {
+ "format": "[EMAC][CFG][SPS] UL SPS enable: ul_interval=%ud, imp_rel=%ub, two_interval=%ub, skip_tx=%ub, fixed_rv=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_CFG_UL_SPS_DISABLE": {
+ "format": "[EMAC][CFG][SPS] UL SPS disable",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_CFG_DL_SPS": {
+ "format": "[EMAC][CFG][SPS] DL SPS enable: dl_interval=%ud, dl_harq_num=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_CFG_DL_SPS_DISABLE": {
+ "format": "[EMAC][CFG][SPS] DL SPS disable",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_CFG_SET_SPSCRNTI": {
+ "format": "[EMAC][CFG][SPS] Set spsc-rnti=%ud",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_CFG_CLR_SPSCRNTI": {
+ "format": "[EMAC][CFG][SPS] Clear spsc-rnti",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_CFG_PCELL_CFG": {
+ "format": "[EMAC][CFG] Pcell subframe_cfg=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_CFG_SCELL_UPDATE": {
+ "format": "[EMAC][CFG][SCELL] Update cc_idx=%ub, corss_sched_idx=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_CFG_PHR": {
+ "format": "[EMAC][CFG][PHR] phr_config=%ub (0: disable, 1: phr, 2: extend_phr)",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_CFG_UL_HARQ": {
+ "format": "[EMAC][CFG][UL-HARQ] max_harq_tx=%ub, tti_bundling_config=%ub (0: disable, 1: normal bundling, 2: enhanced fdd)",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_CFG_UL_HARQ_PUSCH_ENHANCEMENT": {
+ "format": "[EMAC][CFG][UL-HARQ] pusch enhancement mode=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_CFG_UL_HARQ_SKIP_DYNAMIC_TX": {
+ "format": "[EMAC][CFG][UL-HARQ] skip dynamic tx: %ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_CELL_INFO": {
+ "format": "[EMAC][CFG]sch_open=%ub, earfcn=%ul, pci=%ud",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_RCV_TA_CMD": {
+ "format": "[EMAC][TA] ta_cmd: ta_value=%ub:6, tag_id=%ub:2, rcv_time=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_P_TA_EXP": {
+ "format": "[EMAC][TA] ptag TA timer expired",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_RAR_TA_CMD": {
+ "format": "[EMAC][TA] RAR ta_cmd: ta_value=%ub, tag_id=%ub, rcv_time=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TA_STOP_FOR_CR_FAIL": {
+ "format": "[EMAC][TA] Stop ptag TA timer for RA CR fail",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_S_TA_EXP": {
+ "format": "[EMAC][TA] stag TA timer expire: tag_id=%ub, cc_idx_bmp=%xb, cur_cc_idx_bmp=%xb",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TA_ADD_STAG_CC": {
+ "format": "[EMAC][CFG][TA] Add stag CC: tag_id=%ub, cc_idx=%ub, stag_idx=%ub, cc_idx_bmp=%xb",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TA_ADD_PTAG_CC": {
+ "format": "[EMAC][CFG][TA] Add ptag CC: cc_idx=%ub, cc_idx_bmp=%xb",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TA_DEL_PTAG_CC": {
+ "format": "[EMAC][CFG][TA] Del ptag CC: cc_idx=%ub, cc_idx_bmp=%xb",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TA_DEL_STAG_CC": {
+ "format": "[EMAC][CFG][TA] Del stag CC: tag_id=%ub, cc_idx=%b, stag_idx=%b, cc_idx_bmp=%xb",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TA_P_TIMER_START": {
+ "format": "[EMAC][TA] ptag TA timer start=%ul, length=%ud, cc_idx_bmp=%xb",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TA_S_TIMER_START": {
+ "format": "[EMAC][TA] stag TA timer tag_id=%ub start=%ul, length=%ud, cc_idx_bmp=%xb",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_TA_S_TA_ALL_EXP": {
+ "format": "[EMAC][TA] all stag TA timers expire",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_SCELL_DEACT": {
+ "format": "[EMAC][SCELL] Scell deactivate: cc_idx=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_SCELL_DEACT_TIMER_EXP": {
+ "format": "[EMAC][SCELL] Scell deactivation timer expired: cc_idx=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_SCELL_ACT": {
+ "format": "[EMAC][SCELL] Scell activate: cc_idx=%ub, deactivation timer start=%ul, length=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_SCELL_RCV_CMD": {
+ "format": "[EMAC][SCELL] Rcv scell act_cmd=%xb: rcv_time=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_SCELL_ADD_CC": {
+ "format": "[EMAC][SCELL][CFG] Add CC: scell_idx=%ub, cc_idx=%ub, tag_id=%ub, corss_sched_idx=%ub, subframe_cfg=%ub, ul_ref_cfg=%ub, ul_supported=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_SCELL_REL_CC": {
+ "format": "[EMAC][SCELL][CFG] Rel CC: cc_idx=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_BSR_TRIGGER": {
+ "format": "[EMAC][BSR] BSR triggered: regular=%ub:1, retx_regular=%ub:1, period=%ub:1%pb:5, top_rb=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_BSR_CANCEL": {
+ "format": "[EMAC][BSR] BSR cancel",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_BSR_LC_SR_TMR_START": {
+ "format": "[EMAC][BSR][SR] LC SR prohibit timer start=%ul, length=%ud",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_BSR_LC_SR_TMR_STOP": {
+ "format": "[EMAC][BSR][SR] LC SR prohibit timer stopped",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_BSR_LC_SR_TMR_EXPIRE": {
+ "format": "[EMAC][BSR][SR] LC SR prohibit timer expired",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_SR_TRIGGERED": {
+ "format": "[EMAC][SR] SR triggered",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_SR_CANCEL": {
+ "format": "[EMAC][SR] SR cancel: sr_count=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_SR_TX": {
+ "format": "[EMAC][SR] SR tx_cnt=%ub, prohibit timer start=%ul, length=%ud (0: no prohibit)",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_SR_LOG_SR_TX_MAX": {
+ "format": "[EMAC][SR][WARN] SR tx max, tx_cnt=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_RA_LOG_TRIG_READY": {
+ "format": "[EMAC][RA] RA trigger ready: ra_event=%Memac_ra_event_e, ra_type=%Memac_ra_type_e, preamble_tx_max=%b",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_PREAM_SCHED_TX": {
+ "format": "[EMAC][RA] schedule preamble tx: ul_cc_idx=%b, rapid=%b, preamble_tx_cnt=%l, format=%b, tx_prb=%b",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_PREAM_TX": {
+ "format": "[EMAC][RA] <state = WAIT_RAR> preamble tx, ra-rnti=%d, RAR WND start=%l, end=%l",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_RAR_WND_END": {
+ "format": "[EMAC][RA] RAR WND end, RAR fail",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_RAR_MATCH_INFO_CF": {
+ "format": "[EMAC][RA][UL-HARQ] RAR matched: ta_cmd=%l, tc-rnti=%d, tx_time=%ul, tbs=%ud",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_RAR_MATCH_INFO_CB": {
+ "format": "[EMAC][RA][UL-HARQ] <state = WAIT_MSG3_TX> RAR matched: ta_cmd=%ul, tc-rnti=%ud, msg3_tx_time=%ul, tbs=%ud",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_MSG3_TX": {
+ "format": "[EMAC][RA] <state = WAIT_CR> MSG3 TX, CR timer start=%l, end=%l",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_MSG3_RETX": {
+ "format": "[EMAC][RA][UL-HARQ] MSG3 RETX: CR timer restart end=%l",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_CR_EXPIRE": {
+ "format": "[EMAC][RA] CR timer expire",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_RETRY": {
+ "format": "[EMAC][RA] <state = WAIT_PREAMBLE_TX> RA retry, preamble_tx_cnt=%l, ra_error_cnt=%l, backoff_time=%l",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_COMPLETE": {
+ "format": "[EMAC][RA] <state = WAIT_GAP_RESUME> RA complete, is_success=%b",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_PDCCH_ORDER_INACT_CC": {
+ "format": "[EMAC][RA][WARN] rcv PDCCH order for inactive Scell: ul_cc_idx=%b",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_PDCCH_ORDER_INVALID": {
+ "format": "[EMAC][RA][WARN] rcv invalid PDCCH order: ul_cc_idx=%b, rapid=%b",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_PDCCH_ORDER_WHEN_RESET": {
+ "format": "[EMAC][RA][WARN] rcv PDCCH order in MAC reset: ul_cc_idx=%b, rapid=%b",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_PDCCH_ORDER_INFO": {
+ "format": "[EMAC][RA] rcv PDCCH order: ul_cc_idx=%b, rapid=%b, mask=%b, tx_time=%l",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_HO_CFG": {
+ "format": "[EMAC][RA] rcv HO RA cfg: rapid=%b, mask=%b",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_RA_LOG_RA_ERROR_IND": {
+ "format": "[EMAC][RA][WARN] RA error ind",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EMAC_LOG_PHR_TRIGGERED": {
+ "format": "[EMAC][PHR] PHR triggered type=%Memac_phr_triggered_enum",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_NORMAL_NEXT_ONDU_INFO": {
+ "format": "[EMAC][DRX] (normal) ondu tmr: start_time=%ul and expired_time=%ul, next ondu tmr: start_time=%ul and expired_time=%ul, cur_predict_cycle=%Memac_drx_cycle_type_e, next_predict_cycle=%Memac_drx_cycle_type_e",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_DCI_START_DRX_INACT_TMR": {
+ "format": "[EMAC][DRX] dci starts drx inact tmr: start_time=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_DRX_INACT_TMR_END": {
+ "format": "[EMAC][DRX] drx inact tmr ends, expired_time=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_SHORT_CYC_TMR_START": {
+ "format": "[EMAC][DRX] short cycle tmr: start_time=%ul, expired_time=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_DRX_CONFIG": {
+ "format": "[EMAC][DRX][CFG] drx_config=%ub (0: enable, 1: reconfig, 2: disable): \\ncqi_mask=%ub, \\nshort_cycle_valid=%ub, \\ndrx_ul_retx_tmr_valid=%ub, \\ndrx_ul_retx_tmr_psf_len=%ud, \\ndrx_retx_tmr_psf_len=%ud, \\ndrx_short_cycle_num=%ub, \\nondu_tmr_psf_len=%ud, \\ndrx_short_cycle_tmr_len=%ud, \\ndrx_inact_tmr_psf_len=%ud, \\ndrx_long_cycle=%ud, \\ndrx_short_cycle=%ud, \\ndrx_long_offset=%ud, \\ndrx_short_offset=%ud",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_CRC_SET_RTT_RETX_STATUS": {
+ "format": "[EMAC][DRX] sets rtt/retx status: cc_idx=%ub, dl_harq_id=%ub, retx tmr start_time=%ul, retx tmr expired_time=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_CLR_RETX_STATUS": {
+ "format": "[EMAC][DRX] clears retx status: cc_idx=%ub, dl_harq_id=%ub, source=%ub (0: dci, 1: crc)",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_DRX_LOG_CLR_RTT_STATUS": {
+ "format": "[EMAC][DRX] clears rtt status: cc_idx=%ub, dl_harq_id=%ub, source=%ub (0: dci, 1: crc)",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_RBRQ_TRIGGERED": {
+ "format": "[EMAC][RBRQ] rbrq is triggered: rb_idx=%ub, is_ul=%ub, rbrq=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_LOG_RBRQ_SCHEDULED": {
+ "format": "[EMAC][RBRQ] rbrq is sched: rb_idx=%ub, lcid=%ub, is_ul=%ub, rbrq=%ul, prohibit_time=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMAC_ERT_LOG_RBRQ_SUPPORT_BITMAP": {
+ "format": "[EMAC][RBRQ] rbrq support_rb_idx_bitmap=%ul",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___MUX_REQ": {
+ "format": "[EMAC][EMUX][IF] MUX_REQ: pidx=%ub, cc_idx=%ub, harq_id=%ub, tbs=%ud, first_mux=%Mkal_bool",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___MUX_BUF_1": {
+ "format": "[EMAC][EMUX][TB] tbs_in_mux_buf=%ul mux_buf= %xb %xb %xb %xb",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___PAD_BUF_1": {
+ "format": "[EMAC][EMUX][TB] post_pad_len =%ul pad_buf= %xb %xb %xb %xb",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___LCP_REQ": {
+ "format": "[EMAC][EMUX][LCP] Lcp req: c-rnti=%Memux_crnti_status_e, bsr=%Memux_bsr_status_e, phr=%Memux_phr_status_e, phr_len=%ub, ccch=%Memux_ccch_status_e",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___LCG_AFTER_LCP": {
+ "format": "[EMAC][EMUX][LCP] After lcp: lcg_buf_num=%ub, lcg_buf_size=[%ul, %ul, %ul, %ul], top_lcg_id=%ub, top_priority=%ub",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___AFTER_MAC_LCP_A": {
+ "format": "[EMAC][EMUX][LCP] After mac lcp: cc_idx=%ub, harq_id=%ub",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___AFTER_RLC_LCP_A": {
+ "format": "[EMAC][EMUX][LCP] After rlc lcp: cc_idx=%ub, harq_id=%ub",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___MUX_RSP": {
+ "format": "[EMAC][EMUX][MR] MUX_RSP: cc_idx=%ub, c-rnti=%Memux_crnti_status_e, bsr=%Memux_bsr_status_e(%Memux_bsr_format_e), phr=%Memux_phr_status_e, ccch=%Memux_ccch_status_e, dxch=%Memux_dxch_status_e",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___CLOSE_UL_HARQ": {
+ "format": "[EMAC][EMUX][IF] Close UL harq: pidx=%ub, ul_cc_idx=%ub, harq_id=%ub",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMUX_LOG___CFG": {
+ "format": "[EMAC][EMUX][IF] Config: pidx=%ub, ebsr=%Mkal_bool",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_TB_TYPE_REF": {
+ "format": "[EMAC][DL][INFO] TB type mapping - 0:C/SPS, 1:MCH, 4:RAR, 7:TC",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_TB_INFO_SINGLE": {
+ "format": "[EMAC][DL][TB] \\n<TB %ub: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16>",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_TB_INFO_1": {
+ "format": "[EMAC][DL][TB] \\n<TB 1: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16>",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_TB_INFO_2": {
+ "format": "[EMAC][DL][TB] \\n<TB 1: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 2: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16>",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_TB_INFO_3": {
+ "format": "[EMAC][DL][TB] \\n<TB 1: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 2: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 3: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16>",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_TB_INFO_4": {
+ "format": "[EMAC][DL][TB] \\n<TB 1: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 2: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 3: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 4: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16>",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_TB_INFO_5": {
+ "format": "[EMAC][DL][TB] \\n<TB 1: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 2: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 3: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 4: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 5: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16>",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_TB_INFO_6": {
+ "format": "[EMAC][DL][TB] \\n<TB 1: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 2: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 3: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 4: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 5: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 6: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16>",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_TB_INFO_7": {
+ "format": "[EMAC][DL][TB] \\n<TB 1: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 2: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 3: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 4: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 5: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 6: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 7: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16>",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_TB_INFO_8": {
+ "format": "[EMAC][DL][TB] \\n<TB 1: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 2: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 3: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 4: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 5: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 6: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 7: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16> \\n<TB 8: crc=%ul:1,%pl:3 type=%ul:3,%pl:1 tb=%ul:1, cc=%ul:3, harq=%ul:4, len=%ul:16>",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_UEID_MISMATCH": {
+ "format": "[EMAC][DL][RA] UEID mismatch at abs_time=%ul",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_UEID_MATCH": {
+ "format": "[EMAC][DL][RA] UEID match at abs_time=%ul",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_RCV_TCRNTI_NO_UEID": {
+ "format": "[EMAC][DL][RA][WARN] No UEID at abs_time=%ul",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACDL_LOG_RCV_TCRNTI_INVALID_TB": {
+ "format": "[EMAC][DL][RA][WARN] TC-RNTI header parse fail at abs_time=%ul",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___RELEASE_MCCH": {
+ "format": "[EMAC][MCH][T][MXCH] Release MCCH: said=%ub, aid=%ub, mcch_idx=%ub",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___RELEASE_MTCH": {
+ "format": "[EMAC][MCH][T][MXCH] Release MTCH: said=%ub, aid=%ub, pmch_id=%ub, lcid=%ub, mtch_idx=%ub",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___ESTABLISH_MCCH": {
+ "format": "[EMAC][MCH][T][MXCH] Establish MCCH: said=%ub, aid=%ub, mcch_idx=%ub",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___ESTABLISH_MTCH": {
+ "format": "[EMAC][MCH][T][MXCH] Establish MTCH: said=%ub, aid=%ub, pmch_id=%ub, lcid=%ub, mtch_idx=%ub",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___RCV_DATA_IND": {
+ "format": "[EMAC][MCH][T][ILM] Rcv DATA_IND: active_pidx=%ub, trans_pidx=%ub, tb_rcv_abs_time=%ul",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___PDU_INFO_BY_TB_INFO": {
+ "format": "[EMAC][MCH][T][PDU] TB_INFO: said=%ub, tbs=%ul, rcv_cell_time=%ul",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___SHDR_PRE_PAD": {
+ "format": "[EMAC][MCH][T][PDU] Shdr: pre-padding shdr=%xb",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___SHDR_3OCT": {
+ "format": "[EMAC][MCH][T][PDU] Shdr : lcid=%ub, len=%ul, payload_ofs=%ul, shdr=%xb %xb %xb",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___SHDR_2OCT": {
+ "format": "[EMAC][MCH][T][PDU] Shdr : lcid=%ub, len=%ul, payload_ofs=%ul, shdr=%xb %xb",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___SHDR_LAST": {
+ "format": "[EMAC][MCH][T][PDU] ShdrLast: lcid=%ub, len=%ul, payload_ofs=%ul, shdr=%xb",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___MSI_PROCESS": {
+ "format": "[EMAC][MCH][T][PDU] MSI processing: msi_len=%ul",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___MSI_SCHED_PAIR_NUM": {
+ "format": "[EMAC][MCH][T][PDU] MSI: schedule_pair_num=%ul",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___MSI_SCHED_PAIR": {
+ "format": "[EMAC][MCH][T][PDU] MSI: lcid=%ub, stop_mtch=%ud",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___UPDATE_MSI_INPUT_B": {
+ "format": "[EMAC][MCH][T][PDU] Update msi(): mi=%ul, start=%ud, end=%ud",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___UPDATE_MSI_INPUT_A": {
+ "format": "[EMAC][MCH][T][PDU] Update msi(): said=%ub, aid=%ub, pmch_id=%ub, sf_no=%ul",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___MSI_SUSPEND_PAIR_NUM": {
+ "format": "[EMAC][MCH][T][PDU] MSI: suspend_pair_num=%ul, is_cfg_pmch_info_list_ext=%Mkal_bool",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___MSI_SUSPEND_PAIR": {
+ "format": "[EMAC][MCH][T][PDU] MSI: lcid=%ub",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___MCCH_PROCESS": {
+ "format": "[EMAC][MCH][T][PDU] MCCH processing: mcch_idx=%ub, mxch_info=%ub",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___MTCH_PROCESS": {
+ "format": "[EMAC][MCH][T][PDU] MTCH processing: mtch_idx=%ub, mxch_info=%ub",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_T_LOG___SND_MCH_DATA_IND": {
+ "format": "[EMAC][MCH][T][ILM] Snd MCH_DATA_IND: mbms_pdu_num=%ub",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_L_LOG___QUERY_NEXT_MCH": {
+ "format": "[EMAC][MCH][L][IF] Query next mch: abs_time=%ul, sa_id=%ub, active_pidx=%ub, input_pidx=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_L_LOG___LOOK_UP_NEXT_PS": {
+ "format": "[EMAC][MCH][L][QURY] Skip this ps due to filterout or out-of-date",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_L_LOG___QUERY_OUTPUT_B": {
+ "format": "[EMAC][MCH][L][QURY] Next mch: said=%ub aid=%ub, pmch_id=%ub, non_mbsfn_region_len=%ub, is_mch_reliable=%Mkal_bool",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_L_LOG___QUERY_OUTPUT_C": {
+ "format": "[EMAC][MCH][L][QURY] Next mch: is_higher_order_mcs=%Mkal_bool, is_signal_mcs=%Mkal_bool, mcs=%ub",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EMACMCH_L_LOG___QUERY_OUTPUT_E": {
+ "format": "[EMAC][MCH][L][QURY] Next mch: sf_no=%ul, abs_time=%ul",
+ "smpProperty": "non_smp",
+ "traceClass": "EMAC_LV0",
+ "traceHighlightOption": "info"
+ }
+ }
+ ],
+ "traceFamily": "L2"
+}
\ No newline at end of file
diff --git a/mcu/protocol/interface/el2/trace/epdcp_trace_internal_utmd.json b/mcu/protocol/interface/el2/trace/epdcp_trace_internal_utmd.json
new file mode 100644
index 0000000..b443e3c
--- /dev/null
+++ b/mcu/protocol/interface/el2/trace/epdcp_trace_internal_utmd.json
@@ -0,0 +1,530 @@
+{
+ "legacyParameters": {
+ "codeSection": "TCMFORCE",
+ "l2BufferSetting": "L2_BUFFER_EL2",
+ "l2MaxArg": 8,
+ "modemType": "LTE_L2"
+ },
+ "module": "EPDCP_INTERNAL",
+ "stringTranslationDefs": [
+ {
+ "EPDCP_COMM_LOG_STR_SDU_QUEUING_DELAY_CFG": [
+ "off",
+ "on",
+ "modify"
+ ]
+ }
+ ],
+ "traceClassDefs": [
+ {
+ "WARNING": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "CONFIG": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "COMM_IRREG_INFO": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "UL_IRREG_INFO": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "DL_IRREG_INFO": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "LOG_CTRL": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "OFF",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "UL_BKT_DBG": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "OFF",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "UDC_INFO": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "UDC_DBG": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ }
+ ],
+ "traceDefs": [
+ {
+ "EPDCP_COMM_LOG_LINK_DB_WITH_PROTOCOL": {
+ "format": "[EPDCP][CFG] Link DB with protocol: db_idx=%ub, protocol_idx=%ub",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_UNLINK_DB_WITH_PROTOCOL": {
+ "format": "[EPDCP][CFG] Unlink DB with protocol: db_idx=%ub, protocol_idx=%ub",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_NO_MORE_DB_AVAILABLE": {
+ "format": "[EPDCP][CFG][ERROR] No more DB available for linking",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_SDU_QUEUING_DELAY_CFG": {
+ "format": "[EPDCP][CFG] sdu queuing delay cfg: cmd=%s, period=%ud, threshold=%ud",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_PS_DATA_INACTIVE_TIME": {
+ "format": "[EPDCP] PS data inactive time: SRB=%dms, DRB=%dms",
+ "traceClass": "COMM_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_VA_SHORTAGE_NTF": {
+ "format": "[EPDCP][WARN] VRB_id(%b) virtual address shortage (addr=%xl)",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_DCIP_SET_NEXT_COUNT": {
+ "format": "[EPDCP][CFG][RB] SET next_rx_pc=%ul",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_DCIP_SET_LAST_SUBM_SN": {
+ "format": "[EPDCP][CFG][RB] SET last_subm_sn=%ud",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_RESTORE_SRB_DCIP_STATES": {
+ "format": "[EPDCP][CFG][RB] Restore DCIP states for SRB: rb_idx=%ub, next_rx_pc=%ul",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_RESTORE_DRB_DCIP_STATES": {
+ "format": "[EPDCP][CFG][RB] Restore DCIP states for DRB: rb_idx=%ub, next_rx_pc=%ul, last_subm_sn=%ud",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_VA_SHORTAGE": {
+ "format": "[EPDCP][UL][WARN] VA shortage: protocol_idx=%b, rb_valid_bmp=%xl",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_VA_SHORTAGE_HNDL": {
+ "format": "[EPDCP][UL][WARN] VA shortage handling: rb_idx=%ub, sit_type=%ub, replace and release [%ud, %ud) SDUs VRB",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_VA_SHORTAGE_NO_ACT_PRTCL": {
+ "format": "[EPDCP][UL][WARN] VA shortage: no protocol has been activated",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_ADV_BUF_CTRL": {
+ "format": "[EPDCP][UL][WARN] Advnaced buffer control: is SDU released=%b",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_VRB_BUF_CTRL_ON": {
+ "format": "[EPDCP][UL][VRB][OOB] buffer control on, threshold=%ul, remaining buffer size=%ul",
+ "traceClass": "UL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_PRB_BUF_CTRL_ON": {
+ "format": "[EPDCP][UL][PRB][OOB] buffer control on, threshold=%ul, remaining buffer size=%ul",
+ "traceClass": "UL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_VRB_RLC_EPOLL": {
+ "format": "[EPDCP][UL][VRB] Request ERLCUL to early poll, rb_bmp=%xl, remaining buffer size=%ul",
+ "traceClass": "UL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_REAL_DATA_EXIST": {
+ "format": "[EPDCP][UL] real data exist (rb_idx=%ub), do not send invalid control pdu",
+ "traceClass": "UL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_SIT_INFO_SEC": {
+ "format": "[EPDCP][UL][DBG] SIT info: epdcp_head=%ud, ack=%ud, sch=%ud, new=%ud, udc=%ud, epdcp_tail=%ud, sync=%b",
+ "traceClass": "UL_BKT_DBG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_NO_SHM_FOR_UDC": {
+ "format": "[EPDCP][UDC][WARN] No SHM allocated for UDC",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_VIRTUAL_N_PHY_ADDR": {
+ "format": "[EPDCP][UL][UDC] buffer info of 1st packet: si_idx=%ud, v_addr=%xl, p_addr[0]=%xl, p_addr[1]=%xl, p_addr[2]=%xl, p_addr[3]=%xl, p_addr[4]=%xl",
+ "traceClass": "UDC_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_MAP_HDR_TBL_IDX": {
+ "format": "[EPDCP][UL][UDC] map rb_idx=%b to udc hdr_tbl_idx=%b",
+ "traceClass": "UDC_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_CLR_HDR_TBL_IDX": {
+ "format": "[EPDCP][UL][UDC] clear map of rb_idx=%b and udc hdr_tbl_idx=%b",
+ "traceClass": "UDC_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_PRI_CANNOT_CMPRS": {
+ "format": "[EPDCP][UL][UDC] PRI SDUs (rb_idx=%b) cannot be compressed since NML SDUs are not scheduled yet (sched=%d, new=%d, udc=%d, epdcp_tail=%d)",
+ "traceClass": "UDC_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_DETAIL_W_CMP_REQ": {
+ "format": "[EPDCP][UL][UDC] write SDU (sdu_idx=%d) to cmp_req (inst_id=%b, r_idx=%d, w_idx=%d, desc_need=%d)",
+ "traceClass": "UDC_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_DBG_DUMP_INIT_BASE_ADDR": {
+ "format": "[EPDCP][UL][UDC][DBG] base addr: buf_addr:%xl, tbl_addr:%xl, cmp_buf_addr:%xl",
+ "traceClass": "UDC_DBG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_DBG_DB_INIT_DUMP": {
+ "format": "[EPDCP][UL][UDC][DBG] db init for inst %b: cmp_req desc_addr=%xl, (r,w)=(%d,%d); cmp_rslt meta_addr=%xl, (r,w)=(%d,%d)",
+ "traceClass": "UDC_DBG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_KICK": {
+ "format": "[EPDCP][UL][UDC] kick AP for UDC compression (inst_id=%b, pri_udc=%d, nml_udc=%d)",
+ "traceClass": "UDC_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_DUP_KICK_DONE": {
+ "format": "[EPDCP][UL][UDC][WARN] kick done received when kick_done is set (inst_id=%b)",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_RCVD_KICK_DONE": {
+ "format": "[EPDCP][UL][UDC] kick done received (inst_id=%b, pri_udc=%d, nml_udc=%d)",
+ "traceClass": "UDC_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_KICK_AGAIN": {
+ "format": "[EPDCP][UL][UDC] kick AP again (inst_id=%b, kicked_pri_udc=%d, kicked_nml_udc=%d)",
+ "traceClass": "UDC_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_UPDT_RSLT_R": {
+ "format": "[EPDCP][UL][UDC] update cmp_rslt(inst_id=%b) read=%d",
+ "traceClass": "UDC_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_SND_INVALID_MSG": {
+ "format": "[EPDCP][UL][UDC][WARN] send invalid command!",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_CMD_SND_FAIL": {
+ "format": "[EPDCP][UL][UDC] fail to send command; queue command for retry (cmd_q_num=%b)",
+ "traceClass": "UDC_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_SDU_ACKED": {
+ "format": "[EPDCP][UL][UDC] update rslt_r of inst %b since SDU (rb_idx=%b, sit_type=%b, sdu_idx=%d) with rslt_idx=%d is acked",
+ "traceClass": "UDC_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_DISC_SIT_INFO": {
+ "format": "[EPDCP][UL][UDC] handle discard with UDC enabled; SIT info: rb_idx=%b, sit_type=%b, epdcp_head=%d, sched=%d, new=%d, udc=%d, epdcp_tail=%d",
+ "traceClass": "UDC_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_SCHED_AHEAD": {
+ "format": "[EPDCP][UL][UDC] sched is ahead of udc; no need to undo! update udc=new=%d",
+ "traceClass": "UDC_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_DUMP_HDR": {
+ "format": "[EPDCP][UL][UDC][DBG] SDU (rb_idx=%b, sit_type=%b, sdu_idx=%d) header=%xl",
+ "traceClass": "UDC_DBG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_REASSEMBLE_INACTIVE_RB": {
+ "format": "[EPDCP][DL][WARN] Reassemble for inactive RB: rb_idx=%ub",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_SOME_RB_DCIP_SUSPENDED": {
+ "format": "[EPDCP][DL] DCIP for some RB is suspended: rb_dcip_susp_bmp=%xd",
+ "traceClass": "DL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_CHECK_IP_NUM": {
+ "format": "[EPDCP][DL] Check IP Version: rb_idx=%ub, bogus_ip_num=%ub, chk_ip_num=%ub, hfn_retry_num=%ub",
+ "traceClass": "DL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_IP_DATA_DUMP": {
+ "format": "[EPDCP][DL][warn] IP Version Check: Bogus IP Ver, Data Dump: %xb %xb %xb %xb",
+ "traceClass": "DL_IRREG_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_HFN_SYNC_STG_CHNG": {
+ "format": "[EPDCP][DL] HFN SYNC Stage Change: ori stg=%Mepdcp_drb_dl_hfn_sync_stg_e, new stg=%Mepdcp_drb_dl_hfn_sync_stg_e",
+ "traceClass": "DL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_DCIP_VRB_OOB_HANDLING": {
+ "format": "[EPDCP][DL][WARN][VRB][OOB] db_idx=%ub, %ul bytes dropped from %ud SDUs",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_CFG_STG_CHNG": {
+ "format": "[EPDCP][CFG] DL Configuration Stage Change: rb_idx=%ub, ori stg=%Mepdcp_drb_dl_cfg_stg_e, new stg=%Mepdcp_drb_dl_cfg_stg_e",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UDC_DBG_LOG_CMPRS_INFO": {
+ "format": "[EPDCP][UDC][DBG] Compression info: inst_id=%ub, buf_w_addr=%xl, read req=[%ud, %ud), written rslt=[%ud, %ud)",
+ "traceClass": "UDC_DBG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UDC_DBG_LOG_FREE_BUF": {
+ "format": "[EPDCP][UDC][DBG] Free buffer: inst_id=%ub, rslt_idx=[%ud, %ud), rmn sz=%xl",
+ "traceClass": "UDC_DBG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UDC_DBG_LOG_CMPRS_BUF_W_ADDR_WRAP": {
+ "format": "[EPDCP][UDC][DBG] w_addr of compression buffer is wrapped: w_addr_ori=%xl, f_addr=%xl, s_addr=%xl, e_addr=%xl",
+ "traceClass": "UDC_DBG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UDC_DBG_LOG_CMPRS_BUF_S_ADDR_FREE": {
+ "format": "[EPDCP][UDC][DBG] s_addr of compression buffer is freed: freed sz=%xl",
+ "traceClass": "UDC_DBG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UDC_DBG_LOG_AP_BUSY": {
+ "format": "[EPDCP][UDC][DBG] AP is busy: processing num=%ud",
+ "traceClass": "UDC_DBG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UDC_DBG_LOG_CMPRS_BUF_SHORTAGE": {
+ "format": "[EPDCP][UDC][DBG][WARN] Compression buffer is not enough: rmm sz=%xl, seq_len=%ud",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_UDC_DBG_LOG_RSLT_TBL_FULL": {
+ "format": "[EPDCP][UDC][DBG][WARN] Result table is full: rslt_f=%ud, rslt_r=%ud, rslt_w=%ud",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_DCIP_LBT_CLOGGING": {
+ "format": "[EPDCP][DL][LBT] DCIP buffer is clogged, remaining DCIP allowance=%l, event count=%ub",
+ "traceClass": "DL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_DCIP_LBT_CLOGGING_HANDLE": {
+ "format": "[EPDCP][DL][LBT][WARN] DCIP buffer clogging handler activated, clear all RSMT entries except flush done",
+ "traceClass": "DL_IRREG_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_CURRENT_UL_LOG_BW": {
+ "format": "[EPDCP][LOG] Current UL log bandwidth: %ul",
+ "traceClass": "LOG_CTRL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_CURRENT_DL_LOG_BW": {
+ "format": "[EPDCP][LOG] Current DL log bandwidth: %ul",
+ "traceClass": "LOG_CTRL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_UPDATE_UL_LOG_LEVEL": {
+ "format": "[EPDCP][LOG] Update UL log level: %Mepdcp_ul_log_level_e",
+ "traceClass": "LOG_CTRL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_UPDATE_DL_LOG_LEVEL": {
+ "format": "[EPDCP][LOG] Update DL log level: %Mepdcp_dl_log_level_e",
+ "traceClass": "LOG_CTRL",
+ "traceHighlightOption": "info"
+ }
+ }
+ ],
+ "traceFamily": "L2",
+ "startGen": "Legacy",
+ "endGen": "Legacy"
+}
\ No newline at end of file
diff --git a/mcu/protocol/interface/el2/trace/epdcp_trace_public_utmd.json b/mcu/protocol/interface/el2/trace/epdcp_trace_public_utmd.json
new file mode 100644
index 0000000..efce58c
--- /dev/null
+++ b/mcu/protocol/interface/el2/trace/epdcp_trace_public_utmd.json
@@ -0,0 +1,934 @@
+{
+ "legacyParameters": {
+ "codeSection": "TCMFORCE",
+ "l2BufferSetting": "L2_BUFFER_EL2",
+ "l2MaxArg": 16,
+ "modemType": "LTE_L2"
+ },
+ "module": "EPDCP_PUBLIC",
+ "stringTranslationDefs": [
+ {
+ "EPDCP_DL_LOG_STR_DRB_CTRL_PKT_TYPE": [
+ "PDCP_REPORT",
+ "LWA_REPORT",
+ "ROHC_FEEDBACK"
+ ]
+ },
+ {
+ "EPDCP_DL_LOG_STR_PDN_ID_INFO_STATUS": [
+ "INVALID",
+ "VALID"
+ ]
+ }
+ ],
+ "traceClassDefs": [
+ {
+ "WARNING": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "CONFIG": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "SRB_DATA": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "IMS_DATA": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "WRAPPED": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "REFINED": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "UL_IRREG_INFO": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "DL_IRREG_INFO": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "DID_PROC": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "MCCH_DATA": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "TEST_MODE_DATA": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "IS_FORCED_RAW_MODE": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "OFF",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "IS_FORCED_REFINED_MODE": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "OFF",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "IS_MINI_MODE": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "OFF",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ }
+ ],
+ "traceDefs": [
+ {
+ "EPDCP_COMM_LOG_ENABLE_DL_SECURITY": {
+ "format": "[EPDCP][CFG] DL security enabled; parameters: EIA=%ub, EEA=%ub",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_ENABLE_UL_SECURITY": {
+ "format": "[EPDCP][CFG] UL security enabled",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_EXEC_RB_CFG": {
+ "format": "[EPDCP][CFG][RB] RB configuration: rb_idx=%ub, state=%Mepdcp_rb_st_e, cmd=%Mepdcp_rb_cmd_enum",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_HO_FAILURE": {
+ "format": "[EPDCP][CFG][RB] Handover failure occured",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_SRB_RELEASED": {
+ "format": "[EPDCP][CFG][RB] SRB released: rb_idx=%ub",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_DRB_RELEASED": {
+ "format": "[EPDCP][CFG][RB] DRB released: rb_idx=%ub, state=%Mepdcp_rb_st_e",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_DRB_REESTABLISHED": {
+ "format": "[EPDCP][CFG][RB] DRB re-established: rb_idx=%ub, ul_next_tx_pc=%ul, dl_next_rx_pc=%ul, dl_cfg_stg=%Mepdcp_drb_dl_cfg_stg_e, cur_dl_mode=%Mepdcp_rb_dl_mode_e",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_DRB_REEST_NML_SIT_INFO": {
+ "format": "[EPDCP][CFG][RB] DRB re-establish NML SIT info: ack=%ud, sched=%ud, new=%ud, epdcp_tail=%ud",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_DRB_REEST_PRI_SIT_INFO": {
+ "format": "[EPDCP][CFG][RB] DRB re-establish PRI SIT info: ack=%ud, sched=%ud, new=%ud, epdcp_tail=%ud",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_DRB_RESUMED": {
+ "format": "[EPDCP][CFG][RB] DRB resumed: rb_idx=%ub, state=%Mepdcp_rb_st_e, ul_next_tx_pc=%ul, dl_next_rx_pc=%ul, dl_cfg_stg=%Mepdcp_drb_dl_cfg_stg_e, cur_dl_mode=%Mepdcp_rb_dl_mode_e",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_DRB_RESM_NML_SIT_INFO": {
+ "format": "[EPDCP][CFG][RB] DRB resume NML SIT info: ack=%ud, sched=%ud, new=%ud, epdcp_tail=%ud",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_DRB_RESM_PRI_SIT_INFO": {
+ "format": "[EPDCP][CFG][RB] DRB resume PRI SIT info: ack=%ud, sched=%ud, new=%ud, epdcp_tail=%ud",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_DRB_OLD_AM_ENT_DL_SN": {
+ "format": "[EPDCP][CFG][RB] DRB old entity DL INFO: next_rx_pc=%ul, last_subm_cntl=%ud",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_DRB_CUR_AM_ENT_DL_SN": {
+ "format": "[EPDCP][CFG][RB] DRB current entity DL INFO: next_rx_pc=%ul, last_subm_cntl=%ud",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_DRB_RECONFIGURED": {
+ "format": "[EPDCP][CFG][RB] DRB reconfigured: rb_idx=%ub, dl_cfg_stg=%Mepdcp_drb_dl_cfg_stg_e, cur_dl_mode=%Mepdcp_rb_dl_mode_e",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_DRB_PARAMETERS_1": {
+ "format": "[EPDCP][CFG][RB] DRB parameters: ebi=%ub, rb_id=%ub, is UM=%ub, SN=%ub bits, Status Report enabled=%ub, QCI=%ub, QoS level=%ub, discardTimer length=%ud ms",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_DRB_PARAMETERS_2": {
+ "format": "[EPDCP][CFG][RB] DRB parameters: is RoHC enabled=%ub, RoHC profile bitmap=%xd, max_Cid=%b, is UDC enabled=%ub, buf_sz=%d, dic_opt=%d",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_DRB_ESTABLISHED": {
+ "format": "[EPDCP][CFG][RB] DRB established: rb_idx=%ub, state=%Mepdcp_rb_st_e, dl_cfg_stg=%Mepdcp_drb_dl_cfg_stg_e, cur_dl_mode=%Mepdcp_rb_dl_mode_e",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_DRB_COUNT_INFO": {
+ "format": "[EPDCP][CFG][RB] DRB PDCP count info: rb_idx=%ub, dl_pc=%ul, ul_pc=%ul",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_BIND_NTF": {
+ "format": "[EPDCP][CFG] BIND notification: pdn_id=%ub, netif=%ub, protocol_idx=%ub",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_UNBIND_NTF": {
+ "format": "[EPDCP][CFG] UNBIND notification: pdn_id=%ub, protocol_idx=%ub",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_BEARER_ACT_NTF": {
+ "format": "[EPDCP][CFG] Bearer Activation notification: ebi=%ub, pdn_id=%ub, protocol_idx=%ub",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_BEARER_DEACT_NTF": {
+ "format": "[EPDCP][CFG] Bearer Deactivation notification: ebi=%ub, pdn_id=%ub, protocol_idx=%ub",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_CLOSE_TEST_LOOP_A": {
+ "format": "[EPDCP][CFG][LBT] Close Test Loop A for DRB: rb_idx=%ub, without scaling",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_CLOSE_TEST_LOOP_A_SCALE": {
+ "format": "[EPDCP][CFG][LBT] Close Test Loop A for DRB: rb_idx=%ub, scale to %ud bytes",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_TEST_CNF_PENDING": {
+ "format": "[EPDCP][CFG][LBT] TEST_CNF pending, wait for TESTLOOP_RSP from RATDM",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_SEND_TEST_CNF": {
+ "format": "[EPDCP][CFG][LBT] Send ERRC_EPDCP_TEST_CNF: result=%Merrc_el2_cfg_result_enum",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_RCV_TEST_REQ": {
+ "format": "[EPDCP][CFG][LBT] Recv ERRC_EPDCP_TEST_REQ: cmd=%Mepdcp_lb_cmd_enum",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_SEND_TESTLOOP_IND": {
+ "format": "[EPDCP][CFG][LBT] Send RATDM_EPDCP_TESTLOOP_IND",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_SND_DCCH_DATA_CNF": {
+ "format": "[EPDCP][UL] send DCCH_DATA_CNF to ERRC (rb_idx=%ub, trans_id=%ub, result=%Mepdcp_datareq_result_enum)",
+ "traceClass": "SRB_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_REL_SDUS_IN_NONE_STATE": {
+ "format": "[EPDCP][UL] release SDUs due to rb_state=NONE (rb_idx=%ub, sit_type=%ub, sdu_idx=[%ul, %ul), rel_sz=%ul)",
+ "traceClass": "UL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_DISC_DRB_SDUS": {
+ "format": "[EPDCP][UL] discard DRB unscheduled SDUs (rb_idx=%ub, cause=%ub| pri: s_idx=%ud, req_num=%ud, rel_num=%ud, sz=%ul| nml: s_idx=%ud, req_num=%ud, rel_num=%ud, sz=%ul)",
+ "traceClass": "UL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_DISC_DRB_SDUS_ABORT": {
+ "format": "[EPDCP][UL] discarding DRB unscheduled SDUs aborted (rb_idx=%ub, cause=%ub, pri: s_idx=%ud, req_num=%ud, nml: s_idx=%ud, req_num=%ud)",
+ "traceClass": "UL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_REL_SDUS_INAC_PROTOCOL": {
+ "format": "[EPDCP][UL][WARN] release SDUs for inactive protocol (protocol_idx=%ub, rb_idx=%ub, sit_type=%ub, sdu_idx=[%ul, %ul), rel_sz=%ul)",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_PRI_DATA_SENT_TO_ERLCUL": {
+ "format": "[EPDCP][UL] PRI PDUs sent to ERLCUL: rb_idx=%ub, %ul bytes in %ud PDUs, entry [%ud, %ud), psn_head=%xd",
+ "traceClass": "REFINED",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_NML_DATA_SENT_TO_ERLCUL": {
+ "format": "[EPDCP][UL] NML PDUs sent to ERLCUL: rb_idx=%ub, %ul bytes in %ud PDUs, entry [%ud, %ud), psn_head=%xd",
+ "traceClass": "REFINED",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_SND_PRI_PDUS_TO_RLC": {
+ "format": "[EPDCP][UL] PRI PDUs sent to ERLCUL: rb_idx=%ub, %ul bytes in %ud PDUs, new=%d, tmtbl_tail=%ud",
+ "traceClass": "WRAPPED",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_SND_NML_PDUS_TO_RLC": {
+ "format": "[EPDCP][UL] NML PDUs sent to ERLCUL: rb_idx=%ub, %ul bytes in %ud PDUs, new=%d, tmtbl_tail=%ud",
+ "traceClass": "WRAPPED",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_SND_IMS_PRI_PDUS_TO_RLC": {
+ "format": "[EPDCP][UL] PRI PDUs sent to ERLCUL: rb_idx=%ub, %ul bytes in %ud PDUs, new=%d, tmtbl_tail=%ud",
+ "traceClass": "IMS_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_SND_IMS_NML_PDUS_TO_RLC": {
+ "format": "[EPDCP][UL] NML PDUs sent to ERLCUL: rb_idx=%ub, %ul bytes in %ud PDUs, new=%d, tmtbl_tail=%ud",
+ "traceClass": "IMS_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_POLL_ROHC_PRI_RSLT_TO_RLC": {
+ "format": "[EPDCP][UL] PRI PDUs sent to ERLCUL: rb_idx=%ub, (orig) new=%d, epdcp_tail=%d, total_sz=%d",
+ "traceClass": "WRAPPED",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_POLL_ROHC_NML_RSLT_TO_RLC": {
+ "format": "[EPDCP][UL] NML PDUs sent to ERLCUL: rb_idx=%ub, (orig) new=%d, epdcp_tail=%d, total_sz=%d",
+ "traceClass": "WRAPPED",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_POLL_IMS_ROHC_PRI_RSLT_TO_RLC": {
+ "format": "[EPDCP][UL] PRI PDUs sent to ERLCUL: rb_idx=%ub, (orig) new=%d, epdcp_tail=%d, total_sz=%d",
+ "traceClass": "IMS_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_POLL_IMS_ROHC_NML_RSLT_TO_RLC": {
+ "format": "[EPDCP][UL] NML PDUs sent to ERLCUL: rb_idx=%ub, (orig) new=%d, epdcp_tail=%d, total_sz=%d",
+ "traceClass": "IMS_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_SND_CTRL_PDUS_TO_RLC": {
+ "format": "[EPDCP][UL] CTRL PDUs sent to ERLCUL: rb_idx=%ub, pdu_sz=%ul, head=%ub, tail=%ub",
+ "traceClass": "UL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_SND_UDC_PRI_PDUS_TO_RLC": {
+ "format": "[EPDCP][UL][UDC] PRI PDUs sent to ERLCUL: rb_idx=%ub, num=%ud, total_sz=%ul, new=%d, udc=%d)",
+ "traceClass": "WRAPPED",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_SND_UDC_NML_PDUS_TO_RLC": {
+ "format": "[EPDCP][UL][UDC] NML PDUs sent to ERLCUL: rb_idx=%ub, num=%ud, total_sz=%ul, new=%d, udc=%d)",
+ "traceClass": "WRAPPED",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_SND_IMS_UDC_PRI_PDUS_TO_RLC": {
+ "format": "[EPDCP][UL][UDC] PRI PDUs sent to ERLCUL: rb_idx=%ub, num=%ud, total_sz=%ul, new=%d, udc=%d)",
+ "traceClass": "IMS_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_SND_IMS_UDC_NML_PDUS_TO_RLC": {
+ "format": "[EPDCP][UL][UDC] NML PDUs sent to ERLCUL: rb_idx=%ub, num=%ud, total_sz=%ul, new=%d, udc=%d)",
+ "traceClass": "IMS_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_SRB_DLVR_DATA": {
+ "format": "[EPDCP][DL] Deliver SRB DATA: rb_id=%ub, result=%Mepdcp_intchk_result_enum, cnt=%ul, MAC-I=%xl, len=%ud",
+ "traceClass": "SRB_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_SRB_INT_CHECK_FAILED": {
+ "format": "[EPDCP][DL] SRB data integrity check failed: X-MAC=%xl, MAC-I=%xl",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_SRB_DISCARD_SDU": {
+ "format": "[EPDCP][DL] Discard SRB SDU: rb_id=%ub, cnt=%ul, len=%ud, MAC-I=%xl",
+ "traceClass": "SRB_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_SRB_CPQ_GET_HANDLE": {
+ "format": "[EPDCP][DL] Get SRB CPQ handle: rb_id=%ub, hid=%ub, cnt=%ul",
+ "traceClass": "SRB_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_SRB_CPQ_HANDLE_TBL_FULL": {
+ "format": "[EPDCP][DL][WARN] SRB CPQ handle table is full",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_SRB_CPQ_HANDLE_NOT_DONE": {
+ "format": "[EPDCP][DL] SRB CPQ handle is not yet done: rb_id=%ub, hid=%ub",
+ "traceClass": "SRB_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_DRB_PROC_NML_SDUS": {
+ "format": "[EPDCP][DL] normal SDUs processed: rb_idx=%ub, cntl=%6ud ~%6ud",
+ "traceClass": "WRAPPED",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_IMS_DRB_PROC_NML_SDUS": {
+ "format": "[EPDCP][DL] normal SDUs processed: rb_idx=%ub, cntl=%6ud ~%6ud",
+ "traceClass": "IMS_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_NORMAL_SDUS_PROCESSED": {
+ "format": "[EPDCP][DL] normal SDUs processed: rb_idx=%ub, cntl=%6ud ~%6ud",
+ "traceClass": "REFINED",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_DATA_SDU_STATS": {
+ "format": "[EPDCP][DL] %ul bytes in %ud SDUs",
+ "traceClass": "REFINED",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_DATA_SDU_STATS_WITH_LOSS": {
+ "format": "[EPDCP][DL] %ul bytes in %ud SDUs, %ud SDUs lost",
+ "traceClass": "REFINED",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_DRB_ROHC_D_FAILURE": {
+ "format": "[EPDCP][DL] DRB RoHC decompression failure: rb_idx=%ub, cntl=%ud",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_DRB_NML_SDU_CNTL_GAP": {
+ "format": "[EPDCP][DL] DRB normal SDU CNTL gap: rb_idx=%ub, previous cntl=%ud, current cntl=%ud",
+ "traceClass": "DL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_RCV_OOW_DATA_PDU": {
+ "format": "[EPDCP][DL] OOW data PDU: rb_idx=%ub, len=%ul:14, state=%ul:2, cntl=%ul:16",
+ "traceClass": "DL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_DRB_GEN_STATUS_REPORT": {
+ "format": "[EPDCP][DL] DRB gen Status Report: rb_id=%ub, len=%ub, fms=%d, 1st_word=%xl",
+ "traceClass": "DL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_RCV_DUPLICATED_DATA_PDU": {
+ "format": "[EPDCP][DL] Duplicated data PDUs: cntl=%6ud ~%6ud",
+ "traceClass": "DL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_MCCH_DLVR_DATA": {
+ "format": "[EPDCP][DL] Deliver MCCH DATA: len=%ud",
+ "traceClass": "MCCH_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_MTCH_UNBOUND_NETIF_DROP": {
+ "format": "[EPDCP][DL][WARN] Drop MTCH DATA due to NETIF unbound: len=%ud",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_CHECK_CLDMA_NOT_READY": {
+ "format": "[EPDCP][DL][WARN] DCIT entry is pending and CLDMA is not ready",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_WRITE_DCIT_ENTRY": {
+ "format": "[EPDCP][DL] Write DCIT entry: rb_idx=%ub, flags=%xb (flags=v|x|roT|dummy|susp|flush|rel|src)",
+ "traceClass": "DL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_DCIT_FULL": {
+ "format": "[EPDCP][DL][WARN] DCIT is full",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_DCIT_ENTRY_FINISHED": {
+ "format": "[EPDCP][DL] DCIT entry finished: r_idx=%ub, flags=%xl:8, rb_idx=%ul:8, n_sdu=%ul:16 (flags=v|x|roT|dummy|susp|flush|rel|src)",
+ "traceClass": "WRAPPED",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_DCIT_ENTRY_NOT_FINISHED": {
+ "format": "[EPDCP][DL] DCIT entry pending: r_idx=%ub, flags=%xl:8, rb_idx=%ul:8, n_sdu=%ul:16, pending n_sdu=%ub (flags=v|x|roT|dummy|susp|flush|rel|src)",
+ "traceClass": "WRAPPED",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_NON_IMS_DRB_DCIT_ENTRY_FINISHED": {
+ "format": "[EPDCP][DL] DCIT entry finished: r_idx=%ub, flags=%xl:8, rb_idx=%ul:8, n_sdu=%ul:16, in-window=%ul byte, oow=0 byte (flags=v|x|roT|dummy|susp|flush|rel|src)",
+ "traceClass": "WRAPPED",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_IMS_DRB_DCIT_ENTRY_FINISHED": {
+ "format": "[EPDCP][DL] DCIT entry finished: r_idx=%ub, flags=%xl:8, rb_idx=%ul:8, n_sdu=%ul:16, in-window=%ul byte, oow=0 byte (flags=v|x|roT|dummy|susp|flush|rel|src)",
+ "traceClass": "IMS_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_NON_IMS_DRB_DCIT_ENTRY_FINISHED_OOW": {
+ "format": "[EPDCP][DL] DCIT entry finished: r_idx=%ub, flags=%xl:8, rb_idx=%ul:8, n_sdu=%ul:16, in-window=%ul byte, oow=%ul byte (flags=v|x|roT|dummy|susp|flush|rel|src)",
+ "traceClass": "WRAPPED",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_IMS_DRB_DCIT_ENTRY_FINISHED_OOW": {
+ "format": "[EPDCP][DL] DCIT entry finished: r_idx=%ub, flags=%xl:8, rb_idx=%ul:8, n_sdu=%ul:16, in-window=%ul byte, oow=%ul byte (flags=v|x|roT|dummy|susp|flush|rel|src)",
+ "traceClass": "IMS_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_NON_IMS_DRB_DCIT_ENTRY_NOT_FINISHED": {
+ "format": "[EPDCP][DL] DCIT entry pending: r_idx=%ub, flags=%xl:8, rb_idx=%ul:8, n_sdu=%ul:16, pending n_sdu=%ub; in-window=%ul byte, oow=0 byte (flags=v|x|roT|dummy|susp|flush|rel|src)",
+ "traceClass": "WRAPPED",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_IMS_DRB_DCIT_ENTRY_NOT_FINISHED": {
+ "format": "[EPDCP][DL] DCIT entry pending: r_idx=%ub, flags=%xl:8, rb_idx=%ul:8, n_sdu=%ul:16, pending n_sdu=%ub; in-window=%ul byte, oow=0 byte (flags=v|x|roT|dummy|susp|flush|rel|src)",
+ "traceClass": "IMS_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_NON_IMS_DRB_DCIT_ENTRY_NOT_FINISHED_OOW": {
+ "format": "[EPDCP][DL] DCIT entry pending: r_idx=%ub, flags=%xl:8, rb_idx=%ul:8, n_sdu=%ul:16, pending n_sdu=%ub, in-window=%ul byte, oow=%ul byte (flags=v|x|roT|dummy|susp|flush|rel|src)",
+ "traceClass": "WRAPPED",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_IMS_DRB_DCIT_ENTRY_NOT_FINISHED_OOW": {
+ "format": "[EPDCP][DL] DCIT entry pending: r_idx=%ub, flags=%xl:8, rb_idx=%ul:8, n_sdu=%ul:16, pending n_sdu=%ub, in-window=%ul byte, oow=%ul byte (flags=v|x|roT|dummy|susp|flush|rel|src)",
+ "traceClass": "IMS_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_ABNORMAL_PIT_ENTRY": {
+ "format": "[EPDCP][DL][WARN] Abnormal PIT entry (rb_idx=%ub): len=%ul:14, state=%ul:2, cntl=%ul:16, addr=%xl",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_PROC_PIT_OF_INACTV_RB": {
+ "format": "[EPDCP][DL][WARN] Processing PIT entries of an inactive RB",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_HANDLE_DELIVERABLE_RODS": {
+ "format": "[EPDCP][DL] Handle deliverable RODs: rb_idx=%ub",
+ "traceClass": "DID_PROC",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_FILL_DID_FOR_ROD": {
+ "format": "[EPDCP][DL] Fill DID for ROD: cntl=%6ud ~%6ud",
+ "traceClass": "DID_PROC",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_TERMINATE_DID": {
+ "format": "[EPDCP][DL] Terminate DID: pkt_num=%ub, seg_num=%ub",
+ "traceClass": "DID_PROC",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_NO_DID_CAN_BE_ALLOCATED": {
+ "format": "[EPDCP][DL][ERROR] No DID can be allocated: rb_idx=%ub, failed for cntl=%6ud",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_UPDATE_ROD_CNTL_S": {
+ "format": "[EPDCP][DL] Update ROD info: starting cntl=%ud",
+ "traceClass": "DID_PROC",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_LOAD_EXISTING_DID": {
+ "format": "[EPDCP][DL] Load existing DID: starting cntl=%ud, pkt_num=%ub, seg_num=%ub",
+ "traceClass": "DID_PROC",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_ROD_SHORTAGE": {
+ "format": "[EPDCP][DL][WARN] ROD shortage: rb_idx=%ub, failed for cntl=%6ud",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_PD_SHORTAGE": {
+ "format": "[EPDCP][DL][WARN] PD shortage: rb_idx=%ub, required=%d, allocated=%d",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_RELEASE_ROD_WITH_SDU": {
+ "format": "[EPDCP][DL] Release ROD with SDU: rb_idx=%ub, cntl=%ul:16 ~%ul:16",
+ "traceClass": "DL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_DELIVER_DIDS": {
+ "format": "[EPDCP][DL] Deliver DIDs: rb_idx=%ub",
+ "traceClass": "DID_PROC",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_DLVR_DID_LHIF_INCAPABLE": {
+ "format": "[EPDCP][DL][WARN] Delivering DID for LHIF-mode incapable DRB: rb_idx=%ub, PDN ID Info=%s",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_DLVR_DID_FOR_LHIF_MODE_DRB": {
+ "format": "[EPDCP][DL][WARN] Delivering DID for LHIF mode DRB: rb_idx=%ub",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_DROP_PKT_0_LEN_SCALE": {
+ "format": "[EPDCP][DL] Drop packets for 0-length scaling DRB: rb_idx=%ub",
+ "traceClass": "TEST_MODE_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_SCALE_FOR_DID": {
+ "format": "[EPDCP][DL][LB] Scale for DID: rb_idx=%ub, starting cntl=%ud, pkt_num=%ub, seg_num=%ub",
+ "traceClass": "TEST_MODE_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_SCALE_PKT_DTL": {
+ "format": "[EPDCP][DL][LB] Packet details: ori_pkt_size=%ud, ori_seg_num=%ub, scaled_seg_num=%ub",
+ "traceClass": "TEST_MODE_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_DRB_DL_MODE_UPDATED": {
+ "format": "[EPDCP][DL] DRB DL mode updated: rb_idx=%ub, DL mode=%Mepdcp_rb_dl_mode_e",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_SWITCHED_TO_NON_REEST_ORD": {
+ "format": "[EPDCP][DL] DRB DL mode switched to non-reest ordinary mode: rb_idx=%ub, DL mode=%Mepdcp_rb_dl_mode_e, cause=%Mdl_mode_switch_cause_e",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_SWITCHED_TO_NON_REEST_VRB": {
+ "format": "[EPDCP][DL] DRB DL mode switched to non-reest VRB mode: rb_idx=%ub, DL mode=%Mepdcp_rb_dl_mode_e",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_DECIPHERING_SUSPENDED": {
+ "format": "[EPDCP][DL] Deciphering suspended: rb_dcip_susp_bmp=%xd",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_DECIPHERING_RESUMED": {
+ "format": "[EPDCP][DL] Deciphering resumed: rb_dcip_susp_bmp=%xd",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_VOLTE_EBI": {
+ "format": "[EPDCP][CFG] volte_ebi=%b",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_VOLTE_RB_IDX": {
+ "format": "[EPDCP][CFG] volte_rb_idx=%b",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_DRB_RX_CTRL_PKT": {
+ "format": "[EPDCP][DL] Receive control packet: rb_idx=%ub, type=%s",
+ "traceClass": "DL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_DROP_INVALID_CTRL_PDU": {
+ "format": "[EPDCP][DL][WARN] Drop invalid CTRL PDU: rb_idx=%ub ,1st-2-byte=%xb %xb",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_REL_IN_WND_SDU_PD_ROD_SHORAGE": {
+ "format": "[EPDCP][DL] Release in-window SDUs due to PD/ROD shortage: cntl=[%ul, %ul]",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ }
+ ],
+ "traceFamily": "L2",
+ "startGen": "Legacy",
+ "endGen": "Legacy"
+}
\ No newline at end of file
diff --git a/mcu/protocol/interface/el2/trace/epdcp_trace_utmd.json b/mcu/protocol/interface/el2/trace/epdcp_trace_utmd.json
new file mode 100644
index 0000000..ae949a2
--- /dev/null
+++ b/mcu/protocol/interface/el2/trace/epdcp_trace_utmd.json
@@ -0,0 +1,581 @@
+{
+ "legacyParameters": {
+ "codeSection": "TCMFORCE",
+ "l2BufferSetting": "L2_BUFFER_EL2",
+ "l2MaxArg": 16,
+ "modemType": "LTE_L2"
+ },
+ "module": "EPDCP",
+ "stringTranslationDefs": [
+ {
+ "EPDCP_COMM_LOG_STR_POSTPONE_RX_ILM_MSG_ID": [
+ "MSG_ID_ERRC_EPDCP_CONFIG_REQ",
+ "MSG_ID_ERRC_EPDCP_TEST_REQ",
+ "MSG_ID_RATDM_EPDCP_BEARER_ACT_NTF",
+ "MSG_ID_RATDM_EPDCP_BIND_NTF"
+ ]
+ }
+ ],
+ "traceClassDefs": [
+ {
+ "WARNING": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "CONFIG": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "SRB_DATA": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "IMS_DATA": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "WRAPPED": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "REFINED": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "UL_IRREG_INFO": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "DL_IRREG_INFO": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "POLL_DBG": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "OFF",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "UL_BKT_DBG": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "OFF",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "UDC_INFO": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ }
+ ],
+ "traceDefs": [
+ {
+ "EPDCP_COMM_LOG_RESET": {
+ "format": "[EPDCP][CFG] EPDCP initializing (reset)",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_POLLING": {
+ "format": "[EL2] EPDCP polling handler: rb_valid_bmp(%xd), rohc_en_bmp(%xd), reest_flush(%xd), flags(%xl), comm_flags(%xl), protocol_idx=%ub",
+ "traceClass": "POLL_DBG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_DB_FLAG_BMP_DUMP": {
+ "format": "[EL2] EPDCP flag and bitmap dump: rb_valid_bmp(%xd), rohc_en_bmp(%xd), reest_flush(%xd), flags(%xl), comm_flags(%xl), protocol_idx=%ub",
+ "traceClass": "REFINED",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_POLL_IGNORED": {
+ "format": "[EPDCP][WARN] EPDCP poll ignored: num_db_activated=%ub, active_protocol_idx=%ub",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_GEMINI_GUARD_ILM": {
+ "format": "[EPDCP][WARN] Gemini Guard ILM: protocol_idx=%ub, msg_id=%ud, active_protocol_idx=%ub, ilm_status=%Mepdcp_ilm_check_enum",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_DL_PATH_SWITCH_REQ": {
+ "format": "[EPDCP][CFG] DL Path Switch Request: ebi=%ub, is_forced_indirect_path=%ub, protocol_idx=%ub",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_POSTPONE_RX_ILM": {
+ "format": "[EPDCP][CFG] Postpone Rx ILM: msg_id=%s",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_EXEC_POSTPONE_RX_ILM": {
+ "format": "[EPDCP][CFG] Execute postponed Rx ILM: msg_id=%s",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_INVALID_VOLTE_EBI_IND": {
+ "format": "[EPDCP][CFG][WARN] An invalid VoLTE EBI indication is received: callback mod_id:%l, volte_ebi_valid:%b, volte_ebi:%l, protocol_idx:%b",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_STOP_TIMETBL_EVENT": {
+ "format": "[EPDCP][UL][TMR] stop UL timer",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_SDU_TIMEOUT_DISCARD": {
+ "format": "[EPDCP][UL][TMR] UL SDU timeout discard: cur_tick=%ud, disc_req_rbidx: pri=%xd, nml=%xd)",
+ "traceClass": "UL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_DATA_PROCESSINGS_REMAINING": {
+ "format": "[EPDCP][UL] Data processings remaining: integrity=%Mkal_bool",
+ "traceClass": "UL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_DATA_PROCESSINGS_FINISHED": {
+ "format": "[EPDCP][UL] All data processings finished",
+ "traceClass": "UL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_TMTBL_FULL_HANDLING": {
+ "format": "[EPDCP][UL][TMTBL] time table full handling (old tm_h info: tm_h_idx=%ub, sit_idx=%ud; new tm_h info: tm_h_idx=%ub, sit_idx=%ud)",
+ "traceClass": "UL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_TMTBL_DISC_UNSCHED_SDU": {
+ "format": "[EPDCP][UL][TMTBL] discard unscheduled SDUs (rb_idx=%ub, sit_type=%ub, old tm_h =%ud, new tm_h=%ud)",
+ "traceClass": "UL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_ADD_SRB_DATA_SDU": {
+ "format": "[EPDCP][UL] add SRB SDU to SIT (rb_idx=%ub, trans_id=%ub, SN=%ub, len=%ud, MACI=%xl, sdu_idx=%d)",
+ "traceClass": "SRB_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_REL_ACKED_SDUS_SRB": {
+ "format": "[EPDCP][UL] release SRB acked SDUs (rb_idx=%ub, sit_type=%b, head=%d, ack=%d)",
+ "traceClass": "SRB_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_CNF_SRB_SDUS_BY_RLC": {
+ "format": "[EPDCP][UL] confirm SRB SDUs by ERLCUL (rb_idx=%ub, update nxt_cnf=%d)",
+ "traceClass": "SRB_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_DISC_SRB_SDUS": {
+ "format": "[EPDCP][UL] discard SRB SDUs (rb_idx=%ub, nxt_cnf=%d, tail=%d)",
+ "traceClass": "SRB_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_PRI_DATA_ACKED": {
+ "format": "[EPDCP][UL] PRI PDUs acked by ERLCUL: rb_idx=%ub, %ud PDUs from entry [%ud, %ud)",
+ "traceClass": "REFINED",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_NML_DATA_ACKED": {
+ "format": "[EPDCP][UL] NML PDUs acked by ERLCUL: rb_idx=%ub, %ud PDUs from entry [%ud, %ud)",
+ "traceClass": "REFINED",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_REL_ACKED_PRI_SDUS_DRB": {
+ "format": "[EPDCP][UL] PRI PDUs acked by ERLCUL: rb_idx=%ub, head=%d, ack=%d, tmtbl_head=%ud",
+ "traceClass": "WRAPPED",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_REL_ACKED_NML_SDUS_DRB": {
+ "format": "[EPDCP][UL] NML PDUs acked by ERLCUL: rb_idx=%ub, head=%d, ack=%d, tmtbl_head=%ud",
+ "traceClass": "WRAPPED",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_REL_ACKED_PRI_SDUS_IMS_DRB": {
+ "format": "[EPDCP][UL] PRI PDUs acked by ERLCUL: rb_idx=%ub, head=%d, ack=%d, tmtbl_head=%ud",
+ "traceClass": "IMS_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_REL_ACKED_NML_SDUS_IMS_DRB": {
+ "format": "[EPDCP][UL] NML PDUs acked by ERLCUL: rb_idx=%ub, head=%d, ack=%d, tmtbl_head=%ud",
+ "traceClass": "IMS_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_REL_ACKED_CTRL_PDUS_DRB": {
+ "format": "[EPDCP][UL] CTRL PDUs acked by ERLCUL (rb_idx=%ub, head=%d, ack=%d)",
+ "traceClass": "UL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_REL_CTRL_PDUS_DRB": {
+ "format": "[EPDCP][UL] release DRB CTRL PDUs (rb_idx=%ub, start=%d, end=%d)",
+ "traceClass": "UL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_REL_EBI_MISMATCH_DRB": {
+ "format": "[EPDCP][UL][WARN] release DRB EBI Mismatched PDUs (ebi=%ub, sit_type=%ub, sdu_idx=[%ul, %ul), rel_sz=%ul)",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_SIT_INFO_DESYNCED": {
+ "format": "[EPDCP][UL][WARN] SIT info desynced (rb_idx=%ub, sit_type=%ub, head=%ud, epdcp_head=%ud, epdcp_tail=%ud, tail=%ud, data_req_idx=[%ud, %ud)",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_HNDL_GAP_SDU": {
+ "format": "[EPDCP][UL] handle a gap SDU (si_idx=%ud, original f-bit=%b, sdu_sz=%ud)",
+ "traceClass": "UL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_QUE_SDUS_IN_EPDCP": {
+ "format": "[EPDCP][UL] queue SDUs in EPDCP (rb_idx=%ub, sit_type=%ub, num=%ub, sdu_sz=%ul, epdcp_tail=%d, tmtbl_tail=%ud, rb_state=%Mepdcp_rb_st_e)",
+ "traceClass": "UL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_ROLLBACK_SDUS_WO_ROHC": {
+ "format": "[EPDCP][UL] rollback SDUs wo RoHC (rb_idx=%ub, undo:[%d,%d), undo_sz=%d)",
+ "traceClass": "UL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UNDO_ROHC_SDUS": {
+ "format": "[EPDCP][UL] rollback to un-RoHC SDUs (rb_idx=%ub, sdu_idx=%d~%d, undo_sz=%d)",
+ "traceClass": "UL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_PREDO_ROHC_SDUS": {
+ "format": "[EPDCP][UL] predo RoHC SDUs (rb_idx=%ub, sit=%ub, re-RoHC:[%d,%d), epdcp_tail=%d, rohc_sz=%d)",
+ "traceClass": "UL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_RETX_ROHC_SDUS": {
+ "format": "[EPDCP][UL] retx RoHC SDUs (rb_idx=%ub, sit=%ub, ack_idx=%d, sched_idx=%d)",
+ "traceClass": "UL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_CTRL_SIT_FULL": {
+ "format": "[EPDCP][UL][WARN] Control PDU SIT full (rb_idx=%ub)",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_RESYNC_EL2_SIT_START": {
+ "format": "[EPDCP][UL] resync DRB(rb_idx=%b) SIT(sit_idx=%b, type=%b) start index to %d",
+ "traceClass": "UL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_RECORD_DRB_REL_SIT_INFO": {
+ "format": "[EPDCP][UL] record DRB rel SIT info (rb_idx=%ub, sit_type=%b, rel_start=%d, rel_end=%d)",
+ "traceClass": "UL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_SDU_QUEUING_DELAY_TMR_ON_OFF": {
+ "format": "[EPDCP][UL][TMR] start/stop sdu queuing delay timer (cmd = %ub, 0:stop, 1:start)",
+ "traceClass": "UL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_INST_ACTIVATING": {
+ "format": "[EPDCP][UL][UDC] activating UDC instance (rb_idx=%ub, inst_id=%ub)",
+ "traceClass": "UDC_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_INST_ACTIVATED": {
+ "format": "[EPDCP][UL][UDC] activated UDC instance (rb_idx=%ub, inst_id=%ub)",
+ "traceClass": "UDC_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_INST_DEACTIVATING": {
+ "format": "[EPDCP][UL][UDC] deactivating UDC instance (rb_idx=%ub, inst_id=%ub)",
+ "traceClass": "UDC_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_INST_DEACTIVATED": {
+ "format": "[EPDCP][UL][UDC] deactivated UDC instance (rb_idx=%ub, inst_id=%ub)",
+ "traceClass": "UDC_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_UNDO_UDC_SDUS": {
+ "format": "[EPDCP][UL][UDC] rollback to un-UDC SDUs (rb_idx=%ub, sdu_idx=%d~%d, undo_sz=%d)",
+ "traceClass": "UDC_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_W_CMP_REQ": {
+ "format": "[EPDCP][UL][UDC] write cmp_req (inst_id=%ub) from SIT (rb_idx=%b, type=%b) for sdu_idx=[%d,%d)",
+ "traceClass": "UDC_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_ACTVING_UPDT_NEW": {
+ "format": "[EPDCP][UL][UDC] DRB (rb_idx=%b) current ACT_ST=ACTIVATING, update SIT (type=%b, new=udc=epdcp_tail=%d)",
+ "traceClass": "UDC_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_CUR_ACT_ST": {
+ "format": "[EPDCP][UL][UDC] DRB (rb_idx=%b) current ACT_ST=%b (0:DEACTIVATED, 1:ACTIVATING, 2:ACTIVATED, 3:DEACTIVATING)",
+ "traceClass": "UDC_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_CUR_RST_ST": {
+ "format": "[EPDCP][UL][UDC] DRB(rb_idx=%b) current UDC_RST_ST=%b (0:NONE, 1:TO_BE_RST, 2:WAIT_FOR_RST)",
+ "traceClass": "UDC_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_SET_RST": {
+ "format": "[EPDCP][UL][UDC] Reset bit on cmp_req is set, UDC_RST_ST=WAIT_FOR_RST (inst_id=%b, rb_idx=%b, type=%b, sdu_idx=%d)",
+ "traceClass": "UDC_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_CLR_RST_ST": {
+ "format": "[EPDCP][UL][UDC] Rst bit is set in rcvd cmp_rslt (inst_id=%b, rb_idx=%b, type=%b, sdu_idx=%d), set RST_ST=RST_ST_NONE",
+ "traceClass": "UDC_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_PUT_SDUS_IN_UDC_Q": {
+ "format": "[EPDCP][UL][UDC] queue SDUs in EPDCP for UDC compression (rb_idx=%ub, sit_type=%ub, num=%ub, sdu_sz=%ul, epdcp_tail=%d, tmtbl_tail=%ud, rb_state=%ub)",
+ "traceClass": "UDC_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_CMP_REQ_FULL": {
+ "format": "[EPDCP][UL][UDC][WARN] cmp_req tbl full (inst_id=%b, rb_idx=%b, type=%b, sdu_idx=%d)",
+ "traceClass": "WARNING",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_UDC_PREDO_UDC_SDUS": {
+ "format": "[EPDCP][UL][UDC] predo UDC SDUs (rb_idx=%ub, sit_type=%ub, predo SDUs:[%d,%d), udc=%d, epdcp_tail=%d)",
+ "traceClass": "UDC_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_SRB_CPQ_DISCARD_RESULT": {
+ "format": "[EPDCP][DL] Discard SRB SDU: rb_id=%ub, cnt=%ul, len=%ud, hid=%ub, X-MAC=%xl, MAC-I=%xl",
+ "traceClass": "SRB_DATA",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_DATA_PROCESSINGS_REMAINING": {
+ "format": "[EPDCP][DL] Data processings remaining: integrity=%Mkal_bool, RSMT=%Mkal_bool, DCIT=%Mkal_bool",
+ "traceClass": "DL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_DL_LOG_DATA_PROCESSINGS_FINISHED": {
+ "format": "[EPDCP][DL] All data processings finished",
+ "traceClass": "DL_IRREG_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_READD_ROHC_INST_FOR_DRB": {
+ "format": "[EPDCP][CFG][RB] Re-add RoHC instance for DRB: rb_idx=%ub",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_COMM_LOG_VIRTUAL_CONNECTED_SWITCH_REQ": {
+ "format": "[EPDCP][CFG] Virtual Connectivity Switch: state=%Mepdcp_rb_st_e, cmd=%Merrc_el2_switch_virtual_connected_enum",
+ "traceClass": "CONFIG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_SIT_INFO": {
+ "format": "[EPDCP][UL][DBG] SIT info: epdcp_head=%ud, ack=%ud, sch=%ud, new=%ud, udc=%d, epdcp_tail=%ud, sync=%b",
+ "traceClass": "UL_BKT_DBG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_BKT_INFO": {
+ "format": "[EPDCP][UL][DBG] Bucket info: in-bkt=%ul, sched=%ul, disc=%ul, rlc_retx=%ul, pdcp_retx=%ul",
+ "traceClass": "UL_BKT_DBG",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_SIT_INFO_PERIODIC_DUMP": {
+ "format": "[EPDCP][UL][DBG] SIT info: epdcp_head=%ud, ack=%ud, sch=%ud, new=%ud, udc=%d, epdcp_tail=%ud, sync=%b",
+ "traceClass": "REFINED",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "EPDCP_UL_LOG_BKT_INFO_PERIODIC_DUMP": {
+ "format": "[EPDCP][UL][DBG] Bucket info: in-bkt=%ul, sched=%ul, disc=%ul, rlc_retx=%ul, pdcp_retx=%ul",
+ "traceClass": "REFINED",
+ "traceHighlightOption": "info"
+ }
+ }
+ ],
+ "traceFamily": "L2",
+ "startGen": "Legacy",
+ "endGen": "Legacy"
+}
\ No newline at end of file
diff --git a/mcu/protocol/interface/el2/trace/erlcdl_trace_internal_utmd.json b/mcu/protocol/interface/el2/trace/erlcdl_trace_internal_utmd.json
new file mode 100644
index 0000000..3cda25f
--- /dev/null
+++ b/mcu/protocol/interface/el2/trace/erlcdl_trace_internal_utmd.json
@@ -0,0 +1,407 @@
+{
+ "legacyParameters": {
+ "codeSection": "TCMFORCE",
+ "l2BufferSetting": "L2_BUFFER_EL2",
+ "l2MaxArg": 16,
+ "modemType": "LTE_L2"
+ },
+ "module": "ERLCDL_INTERNAL",
+ "stringTranslationDefs": [],
+ "traceClassDefs": [
+ {
+ "ERLCDL_INFO": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "ERLCDL_DUMP": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "ERLCDL_DEV": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ }
+ ],
+ "traceDefs": [
+ {
+ "ERLCDL_LOG_DLSCH_DATA_IND": {
+ "format": "[ERLCDL] DL-SCH data indication (pdu_num=%ub)",
+ "traceClass": "ERLCDL_DEV",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_MCH_DATA_IND": {
+ "format": "[ERLCDL] MCH data indication (pdu_num=%ub)",
+ "traceClass": "ERLCDL_DEV",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_FORCE_SET_UM_REODR_TMR": {
+ "format": "[ERLCDL][RB][WARN] Force set UM t-Reordering timer (rb_idx=%ub,old_tmr=%ud,new_tmr=%ud,case=%ub)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_EXT_PDU_BUF_SHORTAGE": {
+ "format": "[ERLCDL][PDU][WARN] ext PDU buffer shortage",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_EXT_SLI_BUF_OVERFLOW": {
+ "format": "[ERLCDL][PDU][WARN] ext SLI buffer overflow",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_SLI_OVERFLOW": {
+ "format": "[ERLCDL][PDU][WARN] discard SDU SEGs (hdr_len=%ud,data_len=%ud,disc_len=%ud,disc_sdu_cnt=%ud)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_SLI_BUF_OVERFLOW": {
+ "format": "[ERLCDL][PDU][WARN] SLI buf overflow",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_SRB_PDU_BUF_SHORTAGE": {
+ "format": "[ERLCDL][PDU][WARN] SRB PDU buffer shortage, try DRB PDU pool (rb_idx=%ub)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_PDU_BUF_WARNNING_1": {
+ "format": "[ERLCDL][PDU][WARN] PDU buffer allocation failed but there are PDU buffers (cur_used=%ud/%ud)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_UM5_PDU_ODR_TS_PDCP_SN": {
+ "format": "[ERLCDL][PDU] UM5 PDU order inspect: dump information (rb_idx=%ub,rlc_sn=%ub,pdu_ts=%ul,pdcp_sn_first=%ud,pdcp_sn_last=%ud)",
+ "traceClass": "ERLCDL_DEV",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_UM5_PDU_ODR_NO_PDCP_HDR": {
+ "format": "[ERLCDL][PDU] UM5 PDU order inspect: no PDCP header (rb_idx=%ub,rlc_sn=%ub,pdu_ts=%ul)",
+ "traceClass": "ERLCDL_DEV",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_UM5_PDU_ODR_PDCP_OOW": {
+ "format": "[ERLCDL][PDU][WARN] UM5 PDU order inspect: PDCP SN OOW (rb_idx=%ub,rlc_sn=%ub,pdcp_sn_next=%ud,pdcp_sn_first=%ud,pdcp_sn_last=%ud)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_PRSB_UNDO1": {
+ "format": "[ERLCDL][RSB][DISC] discard incomplete SDU (len=%ud,n_seg=%ud) before PDU(sn=%ud)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_PRSB_DISC_1st_SDU": {
+ "format": "[ERLCDL][RSB][DISC] discard the first SDU segment(len=%ud) of PDU(sn=%ud)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_PRSB_DISC_INVALID_PDU": {
+ "format": "[ERLCDL][RSB][WARN] skip invalid pdu (sn=%ud)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_PRSB_INCMPLT_SEG": {
+ "format": "[ERLCDL][RSB][WARN] pdu so(%ud) is not expected so(%ud)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_PRSB_FILL_RSMT": {
+ "format": "[ERLCDL][RSB] write a reassemble entry (flow_idx=%ud:8,rsb_idx=%ud:8,sdu_num=%ul:16,seg_num=%ul:16,sdu_len=%ul)(incmplt seg=%ul:16, len=%ul:16)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_PRSB_FILL_FLUSH": {
+ "format": "[ERLCDL][RSB] write a reassemble entry for re-establish (flow_idx=%ud:8, rsb_idx=%ud:8)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_PRSB_RSMT_FULL": {
+ "format": "[ERLCDL][RSB][WARN] RSMT full!! (flow_idx=%ub, rsb_next_idx=%ud)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_PRSB_DISC_REASM_PDU": {
+ "format": "[ERLCDL][RSB][WARN] discard all pending PDUs during flush procedure (flow_idx=%ub,sdu_num=%d, seg_num=%ud,sdu_len=%ul)(incmplt seg=%ud, len=%ud)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_CRSB_REL_RSMT_EL2": {
+ "format": "[ERLCDL][RSB] release remaining rsmt entries (flow_idx=%ub,release range=[%ub,%ub))",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_CRSB_REL_RSMT_EL2H": {
+ "format": "[ERLCDL][RSB] release remaining rsmt entries (flow_idx=%ub,release range=[%ub,%ub))",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_CRSB_NML_RSB": {
+ "format": "[ERLCDL][RSB] reassemble RLC SDU(flow_idx=%ud:4,v=%ud:1,rsb_next_idx=%ud:11,dcit_write_idx=%ub)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_CRSB_MBMS_RSB": {
+ "format": "[ERLCDL][MBMS][RSB] reassemble MBMS SDU(flow_idx=%ud:4,v=%ud:1,rsb_next_idx=%ud:11,dcit_write_idx=%ub)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_CRSB_SRB_RSB": {
+ "format": "[ERLCDL][RSB] reassemble one SRB RLC SDU(flow_idx=%ud:4,v=%ud:1,rsb_next_idx=%ud:11,dcit_write_idx=%ub)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_CRSB_LWA_RSB": {
+ "format": "[ERLCDL][RSB] reassemble LWA SDU(flow_idx=%ud:5,lwa_next_idx=%ud:11,dcit_write_idx=%ub)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_CRSB_NML_DESC1": {
+ "format": "[ERLCDL][RSB] start fill normal descriptor for pdu (n_skip=%ub,n_sli=%ub,vrb_len=%ud,vrb_addr=%xl)",
+ "traceClass": "ERLCDL_DEV",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_CRSB_NML_DESC2": {
+ "format": "[ERLCDL][RSB] fill normal descriptor (len=%ul:15,free=%ul:1,vrb_ofst=%ul:14,cont=%ul:2)",
+ "traceClass": "ERLCDL_DEV",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_CRSB_START_DECIP": {
+ "format": "[ERLCDL][RSB] start cipher copro (wc=%ud, dec_write_idx=%ud)",
+ "traceClass": "ERLCDL_DEV",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_CRSB_NML_LIST": {
+ "format": "[ERLCDL][RSB] start to reassemble a rsmt (rsmt_idx=%ud,dec_write_idx=%ud)",
+ "traceClass": "ERLCDL_DEV",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_CRSB_WC_SHORTAGE1": {
+ "format": "[ERLCDL][RSB][WARN] cannot completely serve the entry (flags=%xl:8,flow_idx=%ul:8,n_sdu=%ul:16,n_seg=%ud,sdu_len=%ul)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_CRSB_WC_SHORTAGE2": {
+ "format": "[ERLCDL][RSB][WARN] truncate result (flags=%xl:8,flow_idx=%ul:8,n_sdu=%ul:16,n_seg=%ud,sdu_len=%ul)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_CRSB_WC_SHORTAGE3": {
+ "format": "[ERLCDL][RSB][WARN] not enough word count(remain_wc=%ud, dec_write_idx=%ud, allow_len=%ul)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_CRSB_MBMS_INFO": {
+ "format": "[ERLCDL][RSB] fill mbms info (mcch_mp_id=%ul:8,mcch_idx=%ul:8,ci=%ul:16)",
+ "traceClass": "ERLCDL_DEV",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_CRSB_LWA_CHG_RB_IDX": {
+ "format": "[ERLCDL][RSB] change rb_idx(flags=%xl:8,rb_idx=%ul:8,n_sdu=%ul:16)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_CLDMA_NOT_READY": {
+ "format": "[ERLCDL][RSB][WARN] CLDMA not ready!",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_VA_CHK_CNTX_IN": {
+ "format": "[ERLCDL][VA] check shortage VA in context (vrb_id=%ub,next_add_fail_addr=%xl)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_VA_CHK_CNTX_HIT_LIST_1": {
+ "format": "[ERLCDL][VA][WARN] hit shortage VA in context - reassemble list (rb_idx=%ub,p_pdu=%xl,p_vrb=%xl,len=%ud)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_VA_CHK_CNTX_HIT_LIST_2": {
+ "format": "[ERLCDL][VA][WARN] hit shortage VA in context - reassemble list (rb_idx=%ub:3,ci=%ub:1,mrb=%ub:1,%pb:3p_pdu=%xl,p_vrb=%xl,len=%ud)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_VA_CHK_CNTX_HIT_RO": {
+ "format": "[ERLCDL][VA][WARN] hit shortage VA in context - reordering window (rb_idx=%ub,sn=%ud,p_pdu=%xl,p_vrb=%xl,len=%ud)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_VA_CHK_RSMT_IN": {
+ "format": "[ERLCDL][VA] check shortage VA in RSMT (vrb_id=%ub,next_add_fail_addr=%xl)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_VA_CHK_RSMT_HIT": {
+ "format": "[ERLCDL][VA][WARN] hit shortage VA in RSMT (flow_idx=%ub,cur_idx=%ub,p_pdu=%xl,p_vrb=%xl,len=%ud)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_VA_CHK_INVAL_VRB_ID": {
+ "format": "[ERLCDL][VA][WARN] check shortage VA - invalid VRB ID (vrb_id=%ub,next_add_fail_addr=%xl)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_VA_CHK_REL_RB_DATA": {
+ "format": "[ERLCDL][VA] Start to clear data (flow_idx=%ub,rb_idx=%ub,sn_r=%ud,sn_h=%ud)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_VA_CHK_REL_PDU_DATA": {
+ "format": "[ERLCDL][VA] free PDU (sn=%ud,so=%ud)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_VRB_SHORTAGE": {
+ "format": "[ERLCDL][VRB][WARN] VRB shortage status (mode=%ub,remain_size=%ul)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_VRB_SHORTAGE_TMR_START": {
+ "format": "[ERLCDL][VRB][TMR] VRB shortage protect timer start (mode=%ub)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_VRB_SHORTAGE_TMR_EXPIRE": {
+ "format": "[ERLCDL][VRB][TMR] VRB shortage protect timer expire (mode=%ub)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_ENTER_V_CONN": {
+ "format": "[ERLCDL][RB][VCONN] enter virtual-connected state (rb_idx=%ub)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_LEAVE_V_CONN": {
+ "format": "[ERLCDL][RB][VCONN] leave virtual-connected state (rb_idx=%ub)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_STATUS_PDU_TX_FAIL": {
+ "format": "[ERLCDL][RPT] STATUS PDU tx failure (rb_idx=%ub)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ }
+ ],
+ "traceFamily": "L2",
+ "startGen": "Legacy",
+ "endGen": "Legacy"
+}
\ No newline at end of file
diff --git a/mcu/protocol/interface/el2/trace/erlcdl_trace_public_utmd.json b/mcu/protocol/interface/el2/trace/erlcdl_trace_public_utmd.json
new file mode 100644
index 0000000..e26c509
--- /dev/null
+++ b/mcu/protocol/interface/el2/trace/erlcdl_trace_public_utmd.json
@@ -0,0 +1,453 @@
+{
+ "legacyParameters": {
+ "codeSection": "TCMFORCE",
+ "l2BufferSetting": "L2_BUFFER_EL2",
+ "l2MaxArg": 16,
+ "modemType": "LTE_L2"
+ },
+ "module": "ERLCDL_PUBLIC",
+ "stringTranslationDefs": [
+ {
+ "ERLCDL_RB_CFG_TYPE": [
+ "release",
+ "establish",
+ "re-establish",
+ "re-config",
+ "re-establish(without config)"
+ ]
+ },
+ {
+ "ERLCDL_RB_MODE_Type": [
+ "AM10 with LI11",
+ "AM10 with LI15",
+ "UM5",
+ "UM10"
+ ]
+ }
+ ],
+ "traceClassDefs": [
+ {
+ "ERLCDL_INFO": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "ERLCDL_DUMP": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "ERLCDL_DEV": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ }
+ ],
+ "traceDefs": [
+ {
+ "ERLCDL_LOG_PUBLIC_DUMMY": {
+ "format": "[ERLCDL]dummy trace : %ul",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_RB_CFG": {
+ "format": "[ERLCDL][RB] %s RB (rb_idx=%ub,rbid=%ub)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_DEL_OLD_DRB": {
+ "format": "[ERLCDL][RB] release old DRB (rb_idx=%ud,new_rbid=%ud,old_rbid=%ud)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_DEL_NEW_DRB": {
+ "format": "[ERLCDL][RB] release new DRB (rb_idx=%ud,new_rbid=%ud,old_rbid=%ud)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_ADD_2ND_DRB": {
+ "format": "[ERLCDL][RB] establish DRB (rb_idx=%ub,old_rbid=%ub,new_rbid=%ub)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_SETUP_AM_TIMER": {
+ "format": "[ERLCDL][RB][CFG] %s RB info (rb_idx=%ub,t-Reordering=%ud,t-StatusProhibit=%ud)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_SETUP_UM_TIMER": {
+ "format": "[ERLCDL][RB][CFG] %s RB info (rb_idx=%ub,t-Reordering=%ud)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_RB_PARAM_ERR": {
+ "format": "[ERLCDL][RB][WARN] RB parameter error",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_RB_STUS_ERR": {
+ "format": "[ERLCDL][RB][WARN] RB status error",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_MBMS_ADD_MCCH": {
+ "format": "[ERLCDL][RB][MBMS] establish MCCH (mcch_idx=%ub:3,ci=%ub:1)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_MBMS_DEL_MCCH": {
+ "format": "[ERLCDL][RB][MBMS] release MCCH (mcch_idx=%ub:3,ci=%ub:1)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_MBMS_ADD_MRB": {
+ "format": "[ERLCDL][RB][MBMS] establish MRB (mrb_idx=%ub:3,ci=%ub:1)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_MBMS_DEL_MRB": {
+ "format": "[ERLCDL][RB][MBMS] release MRB (mrb_idx=%ub:3,ci=%ub:1)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_MBMS_PC_REQ": {
+ "format": "[ERLCDL][LBC] receive total %ud MRB SDUs (mrb_idx=%ub:3,ci=%ub:1%pb:4)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_MBMS_LB_ACT": {
+ "format": "[ERLCDL][LBC] activate loop mode C (mrb_idx=%ub:3,ci=%ub:1)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_MBMS_LB_DEACT": {
+ "format": "[ERLCDL][LBC] deactivate loop mode C (mrb_idx=%ub:3,ci=%ub:1)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_SLI_LI11_1": {
+ "format": "[ERLCDL][PDU] SDU info: (len x num) (%ud:11x%ud:5)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_SLI_LI11_2": {
+ "format": "[ERLCDL][PDU] SDU info: (len x num) (%ul:11x%ul:5,%ul:11x%ul:5)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_SLI_LI11_3": {
+ "format": "[ERLCDL][PDU] SDU info: (len x num) (%ul:11x%ul:5,%ul:11x%ul:5,%ud:11x%ud:5)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_SLI_LI11_4": {
+ "format": "[ERLCDL][PDU] SDU info: (len x num) (%ul:11x%ul:5,%ul:11x%ul:5,%ul:11x%ul:5,%ul:11x%ul:5)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_SLI_LI15_1": {
+ "format": "[ERLCDL][PDU] SDU info: (len)x(num) (%ud)x(%ub)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_SLI_LI15_2": {
+ "format": "[ERLCDL][PDU] SDU info: (len)x(num) (%ul:16,%ul:16)x(%ud:8,%ud:8)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_SLI_LI15_3": {
+ "format": "[ERLCDL][PDU] SDU info: (len)x(num) (%ul:16,%ul:16,%ud)x(%uf:8,%uf:8,%uf:8)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_SLI_LI15_4": {
+ "format": "[ERLCDL][PDU] SDU info: (len)x(num) (%ul:16,%ul:16,%ul:16,%ul:16)x(%ul:8,%ul:8,%ul:8,%ul:8)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_RX_AM_PDU": {
+ "format": "[ERLCDL][PDU] rx AM PDU (rb_idx=%ud:6,sn=%ud:10,len=%ud,%pb:2e=%ub:1,fi=%ub:2,p=%ub:1)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_RX_AM_SEG": {
+ "format": "[ERLCDL][PDU] rx AM SEG (rb_idx=%ud:6,sn=%ud:10,len=%ud,so=%ud,%pb:1lsf=%ub:1,e=%ub:1,fi=%ub:2,p=%ub:1)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_RX_UM10_PDU": {
+ "format": "[ERLCDL][PDU] rx UM10 PDU (rb_idx=%ud:6,sn=%ud:10,len=%ud,%pb:2e=%ub:1,fi=%ub:2)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_RX_UM5_PDU": {
+ "format": "[ERLCDL][PDU] rx UM5 PDU (rb_idx=%ud:6,sn=%ud:10,len=%ud,%pb:2e=%ub:1,fi=%ub:2,%pb:3pdu_ts=%l)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_RX_MBMS_PDU": {
+ "format": "[ERLCDL][PDU] rx MBMS PDU (rb_idx=%ud:3,ci=%ud:1,mrb=%ud:2,sn=%ud:10,len=%ud,%pb:2e=%ub:1,fi=%ub:2)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_DISC_OLD_DUP_SEG": {
+ "format": "[ERLCDL][PDU] discard old duplicate SEG (so=%ud,len=%ud,%pb:1lsf=%ub:1)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_TRUNC_OLD_DUP_SEG": {
+ "format": "[ERLCDL][PDU] truncate old duplicate SEG (so=%ud,len=%ud)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_TRUNC_NEW_DUP_SEG": {
+ "format": "[ERLCDL][PDU] truncate new duplicate SEG (so=%ud,len=%ud)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_TRUNC_RESULT": {
+ "format": "[ERLCDL][PDU] truncate result (so=%ud,len=%ud,n_skip=%ub,first SDU portion len=%ud)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_DISC_OOW": {
+ "format": "[ERLCDL][PDU] discard PDU due to out-of-window (SN >= VR(MR))",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_DISC_OOD": {
+ "format": "[ERLCDL][PDU] discard PDU due to out-of-date (SN < VR(UR))",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_DISC_DUP": {
+ "format": "[ERLCDL][PDU] discard PDU due to duplicate (already received)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_UM_PDU_LOSS": {
+ "format": "[ERLCDL][PDU] UM PDU loss (rb_idx=%ud:6,loss_num=%ud:10)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_AM_STATE_VAR_1": {
+ "format": "[ERLCDL][VAR] AM state variables (rb_idx=%ud:6,vr_r=%ud:10,vr_ms=%uf:10,vr_h=%uf:10)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_AM_STATE_VAR_2": {
+ "format": "[ERLCDL][VAR] AM state variables (rb_idx=%ud:6,vr_r=vr_ms=vr_h=%ud:10)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_UM_STATE_VAR_1": {
+ "format": "[ERLCDL][VAR] UM state variables (rb_idx=%ud:6,vr_ur=%ud:10,vr_uh=%ud)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_UM_STATE_VAR_2": {
+ "format": "[ERLCDL][VAR] UM state variables (rb_idx=%ud:6,vr_ur=vr_uh=%ud:10)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_AM_RO_TMR_START": {
+ "format": "[ERLCDL][TMR][VAR] t-Reordering timer start (rb_idx=%ud:6,vr_x=%ud:10)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_AM_RO_TMR_EXPIRE": {
+ "format": "[ERLCDL][TMR][VAR] t-Reordering timer expire (rb_idx=%ud:6,vr_ms=%ud:10)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_UM_RO_TMR_START": {
+ "format": "[ERLCDL][TMR][VAR] t-Reordering timer start (rb_idx=%ud:6,vr_ux=%ud:10)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_UM_RO_TMR_EXPIRE": {
+ "format": "[ERLCDL][TMR][VAR] t-Reordering timer expire (rb_idx=%ud:6,vr_ur=%ud:10)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_XM_RO_TMR_STOP": {
+ "format": "[ERLCDL][TMR] t-Reordering timer stop (rb_idx=%ub)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_STATUS_PROH_TMR_EXPIRE": {
+ "format": "[ERLCDL][TMR] t-StatusProhibit timer expire (rb_idx=%ub)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_STATUS_PROH_TMR_STOP": {
+ "format": "[ERLCDL][TMR] t-StatusProhibit timer stop (rb_idx=%ub)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_AM_FLUSH": {
+ "format": "[ERLCDL][PDU] flush AM PDU (rb_idx=%ud:6,vr_r=%ud:10,vr_h=%ud)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_UM_FLUSH": {
+ "format": "[ERLCDL][PDU] flush UM PDU (rb_idx=%ud:6,vr_ur=%ud:10,vr_uh=%ud)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_GEN_STATUS_PDU": {
+ "format": "[ERLCDL][RPT] generate STATUS PDU\t(rb_idx=%ud:6,ack_sn=%ud:10,len=%ub)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_REGEN_STATUS_PDU": {
+ "format": "[ERLCDL][RPT] re-generate STATUS PDU (rb_idx=%ud:6,ack_sn=%ud:10,len=%ub)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_RESEG_STATUS_PDU": {
+ "format": "[ERLCDL][RPT] re-segment STATUS PDU\t(rb_idx=%ud:6,ack_sn=%ud:10,len=%ub)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_RPT_NACK_PDU": {
+ "format": "[ERLCDL][RPT] report NACK PDU (rb_idx=%ud:6,sn=%ud:10)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_RPT_NACK_SEG": {
+ "format": "[ERLCDL][RPT] report NACK SEG (rb_idx=%ud:6,sn=%ud:10,so_s=%ud,so_e=%ud:15)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ }
+ ],
+ "traceFamily": "L2",
+ "startGen": "Legacy",
+ "endGen": "Legacy"
+}
\ No newline at end of file
diff --git a/mcu/protocol/interface/el2/trace/erlcdl_trace_utmd.json b/mcu/protocol/interface/el2/trace/erlcdl_trace_utmd.json
new file mode 100644
index 0000000..e173f0e
--- /dev/null
+++ b/mcu/protocol/interface/el2/trace/erlcdl_trace_utmd.json
@@ -0,0 +1,197 @@
+{
+ "legacyParameters": {
+ "codeSection": "TCMFORCE",
+ "l2BufferSetting": "L2_BUFFER_EL2",
+ "l2MaxArg": 16,
+ "modemType": "LTE_L2"
+ },
+ "module": "ERLCDL",
+ "stringTranslationDefs": [],
+ "traceClassDefs": [
+ {
+ "ERLCDL_INFO": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "ERLCDL_DUMP": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "ERLCDL_DEV": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ }
+ ],
+ "traceDefs": [
+ {
+ "ERLCDL_LOG_INIT": {
+ "format": "[ERLCDL] initialization",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_VOLTE_RB_NTF": {
+ "format": "[ERLCDL][RB] VoLTE RB notification (cur_pid=%ub,cur_volte_rb_idx=%ub,pid=%ub,volte_rb_idx=%ub)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_INVALID_PID": {
+ "format": "[ERLCDL][RB] receive configuration with invalid PID (cur_pid=%ub,trans_pid=%ub)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "ERLCDL_LOG_MBMS_SUSPEND": {
+ "format": "[ERLCDL][RB][MBMS] release all MCCH and MRB by RSVAS (mbms_bmp=%ul)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_MBMS_SUSPEND_SKIP": {
+ "format": "[ERLCDL][RB][MBMS] skip the service suspend",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCDL_LOG_PDU_INVALID_RB": {
+ "format": "[ERLCDL][PDU][ERROR] drop PDU: invalid RB (rb_idx=%ub,len=%ud)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "ERLCDL_LOG_PDU_INVALID_MBMS_RB": {
+ "format": "[ERLCDL][PDU][ERROR] drop PDU: invalid MBMS RB (rb_idx=%ub,len=%ud)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "ERLCDL_LOG_PDU_ZERO_LEN": {
+ "format": "[ERLCDL][PDU][ERROR] drop PDU: zero length (rb_idx=%ub)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "ERLCDL_LOG_PDU_BUF_SHORTAGE": {
+ "format": "[ERLCDL][PDU][ERROR] drop PDU: PDU buffer shortage (rb_idx=%ub,len=%ud)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "ERLCDL_LOG_PDU_LEN_ERROR": {
+ "format": "[ERLCDL][PDU][ERROR] drop PDU: length error (rb_idx=%ub,len=%ud<=%ud)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "ERLCDL_LOG_PDU_PARSE_ERROR": {
+ "format": "[ERLCDL][PDU][ERROR] drop PDU: header parsing error (rb_idx=%ub,len=%ud,sn=%ud)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "ERLCDL_LOG_PDU_SO_ERROR": {
+ "format": "[ERLCDL][PDU][ERROR] drop PDU: invalid SO error (rb_idx=%ub,len=%ud,sn=%ud,so=%ud)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "ERLCDL_LOG_PDU_SEG_ERROR": {
+ "format": "[ERLCDL][PDU][ERROR] drop PDU: invalid PDU SEG (rb_idx=%ub,old_lsf%ub,old_soe=%ud,new_lsf%ub,new_soe=%ud)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "ERLCDL_LOG_EXT_PDU_HDR_ERROR_1": {
+ "format": "[ERLCDL][PDU][ERROR] zero LI",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "ERLCDL_LOG_EXT_PDU_HDR_ERROR_2": {
+ "format": "[ERLCDL][PDU][ERROR] invalid length of last SDU portion",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "ERLCDL_LOG_SDU_LEN_OVERFLOW": {
+ "format": "[ERLCDL][PDU][WARN] SDU len overflow (len=%ud)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_PDU_SO_UNREASN": {
+ "format": "[ERLCDL][PDU][WARN] unreasonable SO (rb_idx=%ub,len=%ud,sn=%ud,so=%ud)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_MBMS_INVALID_PID": {
+ "format": "[ERLCDL][PDU][WARN] rx mbms with invalid PID (cur_pid=%ub,trans_pid=%ub)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCDL_LOG_REPEAT_PDU_RLF": {
+ "format": "[ERLCDL][PDU][ERROR] repeat PDU RLF (rb_idx=%ud:6,sn=%ud:10,so=%ud,repeat_cnt=%ub)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "ERLCDL_LOG_UM5_PDU_ODR_TS_INVALID": {
+ "format": "[ERLCDL][PDU][ERROR] UM5 PDU order inspect: invalid timestamp (rb_idx=%ub,rlc_sn=%ub,reasm_ts_last=%ul,pdu_ts=%ul)",
+ "traceClass": "ERLCDL_INFO",
+ "traceHighlightOption": "error"
+ }
+ },
+ {
+ "ERLCDL_LOG_PRSB_LARGER_SDU": {
+ "format": "[ERLCDL][RSB][WARN][DISC] SDU len overflow (len=%ud>%ud)",
+ "traceClass": "ERLCDL_DUMP",
+ "traceHighlightOption": "warn"
+ }
+ }
+ ],
+ "traceFamily": "L2",
+ "startGen": "Legacy",
+ "endGen": "Legacy"
+}
\ No newline at end of file
diff --git a/mcu/protocol/interface/el2/trace/erlcul_trace_internal_utmd.json b/mcu/protocol/interface/el2/trace/erlcul_trace_internal_utmd.json
new file mode 100644
index 0000000..cb2411d
--- /dev/null
+++ b/mcu/protocol/interface/el2/trace/erlcul_trace_internal_utmd.json
@@ -0,0 +1,155 @@
+{
+ "legacyParameters": {
+ "codeSection": "TCMFORCE",
+ "l2BufferSetting": "L2_BUFFER_ERT",
+ "l2MaxArg": 5,
+ "modemType": "LTE_L2"
+ },
+ "module": "ERLCUL_INTERNAL",
+ "stringTranslationDefs": [],
+ "traceClassDefs": [
+ {
+ "ERLCUL_INFO": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "ERLCUL_DUMP": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "ERLCUL_DEV": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ }
+ ],
+ "traceDefs": [
+ {
+ "ERLCUL_LOG_HEAD_IDX_UPDATE": {
+ "format": "[ERLCUL][POLL] update head index to 1st unrelease SIT entry (rb_idx=%ub,ctrl=%ul:5,prio=%ul:12,nrml=%ul:15)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_UPDATE_PDCP_RETX": {
+ "format": "[ERLCUL][RB][PDCP] update PDCP retx list head (tid=%ul:2,idx=%ul:14,num=%ul:16,len=%uf)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_PDU_CUR_IDX": {
+ "format": "[ERLCUL][DISC][PDCP] update a_curr_idx for PDU (sn=%ud)(sdu_idx:ctrl=%ul:5,prio=%ul:12,nrml=%ul:15)",
+ "traceClass": "ERLCUL_DEV",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_BLOCK_DISCARD": {
+ "format": "[ERLCUL][DISC][PDCP] block pdcp discard due to RB suspended (rb_idx=%ub)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_TIMER_CFG": {
+ "format": "[ERLCUL][CFG][TMR] set t-PollRetransmit config (rb_idx=%ud:4,length=%ud:12)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_POLLNACK_EXIST": {
+ "format": "[ERLCUL][RPT] pollnack exists in old nacklist (sn=%ud)",
+ "traceClass": "ERLCUL_DEV",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_SRB_DATA_CNF": {
+ "format": "[ERLCUL][RPT] SRB data confirm (rb_idx=%ub:1,sit_idx=%ub:7)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_SRB_CNF": {
+ "format": "[ERLCUL][RPT] n_ack update for SRB (n_ack=%ub:4,new n_ack=%ub:4)",
+ "traceClass": "ERLCUL_DEV",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_NO_SRB_CNF": {
+ "format": "[ERLCUL][RPT] not any new SRB data confirmed (n_ack=%ud,new n_ack=%ud)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_UL_RB_LOCK": {
+ "format": "[ERLCUL][RB] lock RB (rb_idx=%ub)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_UL_RB_UNLOCK": {
+ "format": "[ERLCUL][RB] unlock RB (rb_idx=%ub)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_UL_ADD_LL_RB": {
+ "format": "[ERLCUL][RB][WARN] L+L RB establish detected (protocol_idx=%ub,feature=%ub)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCUL_LOG_UL_RB_VCON_ENTER": {
+ "format": "[ERLCUL][RB] enter virtual-connected state (rb_idx=%ub)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_UL_RB_VCON_LEAVE": {
+ "format": "[ERLCUL][RB] leave virtual-connected state (rb_idx=%ub)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_CONSTRUCT_RETX_ENTRY": {
+ "format": "[ERLCUL][RB][PDCP] link PDCP retx entry (tid=%ul:2,idx=%ul:14,len=%ul:16,pdcp_cnt=%ul)",
+ "traceClass": "ERLCUL_DEV",
+ "traceHighlightOption": "info"
+ }
+ }
+ ],
+ "traceFamily": "L2",
+ "startGen": "Legacy",
+ "endGen": "Legacy"
+}
\ No newline at end of file
diff --git a/mcu/protocol/interface/el2/trace/erlcul_trace_public_utmd.json b/mcu/protocol/interface/el2/trace/erlcul_trace_public_utmd.json
new file mode 100644
index 0000000..be6f174
--- /dev/null
+++ b/mcu/protocol/interface/el2/trace/erlcul_trace_public_utmd.json
@@ -0,0 +1,474 @@
+{
+ "legacyParameters": {
+ "codeSection": "TCMFORCE",
+ "l2BufferSetting": "L2_BUFFER_ERT",
+ "l2MaxArg": 5,
+ "modemType": "LTE_L2"
+ },
+ "module": "ERLCUL_PUBLIC",
+ "stringTranslationDefs": [
+ {
+ "ERLCUL_RB_CFG_STRING": [
+ "release RB",
+ "establish RB",
+ "re-establish RB with config",
+ "re-config RB",
+ "re-establish RB without config",
+ "establish and suspend RB",
+ "suspend RB",
+ "resume RB"
+ ]
+ },
+ {
+ "ERLCUL_LI_FMT_STRING": [
+ "11",
+ "15"
+ ]
+ },
+ {
+ "ERLCUL_SN_LEN_STRING": [
+ "05",
+ "10"
+ ]
+ }
+ ],
+ "traceClassDefs": [
+ {
+ "ERLCUL_INFO": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "ERLCUL_DUMP": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "ERLCUL_DEV": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ }
+ ],
+ "traceDefs": [
+ {
+ "ERLCUL_LOG_PUBLIC_DUMMY": {
+ "format": "[ERLCUL]dummy trace : %ul",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_DISCARD_SIT_RANGE": {
+ "format": "[ERLCUL][DISC][PDCP] SDU discard confirmed (rb_idx=%ul:5)(sdu_idx:prio=%ul:12,nrml=%ul:15)(sdu_num:prio=%uf:12,nrml=%uf:12)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_RX_STUS_PDU": {
+ "format": "[ERLCUL][RPT] pre-process: rx UL STATUS PDU (rb_idx=%uf:4,pdu_sz=%uf:10,ack_sn=%uf:10)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_RX_STUS_PDU_DUP": {
+ "format": "[ERLCUL][RPT] pre-process: rx UL STATUS PDU but duplicate (rb_idx=%uf:4,pdu_sz=%uf:10,ack_sn=%uf:10,vt_a=%uf:10,vt_s=%uf:10)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_RX_STUS_PDU_BAD_E": {
+ "format": "[ERLCUL][RPT][WARN] rx UL STATUS PDU but size unmatched (rb_idx=%uf:4,ind_sz=%uf:10,total_sz=%uf:10)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCUL_LOG_RX_STUS_PDU_BAD_SZ": {
+ "format": "[ERLCUL][RPT][WARN] rx UL STATUS PDU but bad size (rb_idx=%ub,pdu_sz=1)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCUL_LOG_RX_STUS_PDU_BAD_CPT": {
+ "format": "[ERLCUL][RPT][WARN] rx UL STATUS PDU but bad CPT (rb_idx=%ul:6,pdu_sz=%ul:10,ack_sn=%ul:10,cpt=%ul:3)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCUL_LOG_RX_STUS_PDU_INACTIVE": {
+ "format": "[ERLCUL][RPT][WARN] rx UL STATUS PDU for an inactive RB (rb_idx=%ul)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCUL_LOG_STUS_PDU_IND": {
+ "format": "[ERLCUL][RPT][VAR] main process: rx UL STATUS PDU (rb_idx=%uf:4,vt_a=%uf:10,vt_s=%uf:10,poll_sn=%ud)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_NACK_INVALID": {
+ "format": "[ERLCUL][RPT][WARN] rx NACK but invalid SN (sn=%ul:10,vt_a=%ul:10,vt_s=%ul:10)",
+ "traceClass": "ERLCUL_DUMP",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCUL_LOG_NACK_OUT_ORDER": {
+ "format": "[ERLCUL][RPT][WARN] rx NACK but out of order (sn=%ud)",
+ "traceClass": "ERLCUL_DUMP",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCUL_LOG_NACK_BAD_SO": {
+ "format": "[ERLCUL][RPT][WARN] rx NACK SEG with invalid SO (sn=%uf:10,data_sz=%uf:14,so_s=%ul:16,so_e=%ul:16)",
+ "traceClass": "ERLCUL_DUMP",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCUL_LOG_RX_NACK_PDU": {
+ "format": "[ERLCUL][RPT] rx NACK PDU (sn=%ud:10)",
+ "traceClass": "ERLCUL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_RX_NACK_SEG": {
+ "format": "[ERLCUL][RPT] rx NACK SEG (sn=%ud:10,rf=%ud:1,lsf=%ud:5,so_s=%ul:16,so_e=%ul:16)",
+ "traceClass": "ERLCUL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_PDU_RETX_CNTR": {
+ "format": "[ERLCUL][RPT] PDU retx count++ (rb_idx=%uf:6,sn=%uf:10,retx_cnt=%uf:6)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_MAX_RETX_CNTR": {
+ "format": "[ERLCUL][RPT] max retx count reached (rb_idx=%ud:6,sn=%ud:10)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_UL_RB_CFG": {
+ "format": "[ERLCUL][RB] %s (rb_idx=%ud:8,rbid=%ud:8)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_UL_ADD_NEW_DRB": {
+ "format": "[ERLCUL][RB] establish and suspend new DRB (rb_idx=%uf:8,old_rbid=%uf:8,new_rbid=%uf:8)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_UL_DEL_OLD_DRB": {
+ "format": "[ERLCUL][RB] release old DRB (rb_idx=%uf:8,old_rbid=%uf:8,new_rbid=%uf:8)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_UL_DEL_NEW_DRB": {
+ "format": "[ERLCUL][RB] release new DRB (rb_idx=%uf:8,old_rbid=%uf:8,new_rbid=%uf:8)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_UL_CFG_AM": {
+ "format": "[ERLCUL][RB][CFG] AM10 with LI%s RB info (t-PollRetransmit=%ul:16,pollPDU=%ul:16,pollByte=%ul:24,maxRetxThreshold=%ul:8)",
+ "traceClass": "ERLCUL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_UL_CFG_UM": {
+ "format": "[ERLCUL][RB][CFG] UM%s with LI11 RB info",
+ "traceClass": "ERLCUL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_UL_CFG_LCG": {
+ "format": "[ERLCUL][RB][CFG] LCH info (priority=%ub,prioritisedBitRate=%ul:16,bucketSizeDuration=%ul:10,logicalChannelGroup=%ul:3)",
+ "traceClass": "ERLCUL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_UL_RB_PARAM_ERR": {
+ "format": "[ERLCUL][RB][WARN] RB parameter error",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCUL_LOG_UL_RB_STUS_ERR": {
+ "format": "[ERLCUL][RB][WARN] RB status error",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCUL_LOG_POLL_RETX_START": {
+ "format": "[ERLCUL][TMR] t-PollRetransmit timer start (rb_idx=%ub)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_POLL_RETX_STOP": {
+ "format": "[ERLCUL][TMR] t-PollRetransmit timer stop (rb_idx=%ub)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_POLL_RETX_EXPIRE": {
+ "format": "[ERLCUL][TMR] t-PollRetransmit timer expire (rb_idx=%ub)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_STATUS_PROH_START": {
+ "format": "[ERLCUL][TMR] t-StatusProhibit timer start (rb_idx=%ub)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_STATUS_PROH_STOP": {
+ "format": "[ERLCUL][TMR] t-StatusProhibit timer stop (rb_idx=%ub)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_STATUS_PROH_EXPIRE": {
+ "format": "[ERLCUL][TMR] t-StatusProhibit timer expire (rb_idx=%ub)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_PDCP_STATUS_ACK": {
+ "format": "[ERLCUL][RPT][PDCP] rx PDCP status ack (tid=%ud:2,idx=%ud:14,count=%ul)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_PDCP_STATUS_FMS": {
+ "format": "[ERLCUL][RPT][PDCP] rx PDCP status report (fms=%ul:24,valid=%ul:1)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCUL_LOG_RB_UL_SNAPSHOT": {
+ "format": "[ERLCUL][LCP] RB UL snapshot (rb_idx=%ul:5,pending_sz=%ul:24)(pdu_bmp:ctrl=%ul:1,retx=%ul:1,data=%ul:1)(sdu_num:left=%ud:1,ctrl=%ud:5,retx=%ud:10,prio=%uf:12,nrml=%uf:12)(next_cnt=%ul)",
+ "traceClass": "ERLCUL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_START_RESOURCE": {
+ "format": "[ERLCUL][LCP] start resource (tb_idx=%ul:2,sub_hdr_sz=%ul:8,bsr_sz=%ul:8,r_tbs=%ul:14)",
+ "traceClass": "ERLCUL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_FINAL_RESOURCE": {
+ "format": "[ERLCUL][LCP] final resource (tb_idx=%ul:2,sub_hdr_sz=%ul:8,bsr_sz=%ul:8,r_tbs=%ul:14)",
+ "traceClass": "ERLCUL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_SERVE_RB_UM_05": {
+ "format": "[ERLCUL][LCP] serve UM05 LCH (rb_idx=%ub)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_SERVE_RB_UM_10": {
+ "format": "[ERLCUL][LCP] serve UM10 LCH (rb_idx=%ub)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_SERVE_RB_AM_10": {
+ "format": "[ERLCUL][LCP] serve AM10 LCH (rb_idx=%ub)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_CHECK_DATA_SDU": {
+ "format": "[ERLCUL][LCP] data SDU (tid=%ud:2,idx=%ud:14)",
+ "traceClass": "ERLCUL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_CHECK_RETX_SDU": {
+ "format": "[ERLCUL][LCP] retx SDU (tid=%ud:2,idx=%ud:14,pdcp_cnt=%ul)",
+ "traceClass": "ERLCUL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_BUILD_DATA_PDU": {
+ "format": "[ERLCUL][LCP] data PDU (rb_idx=%ul:6,tb_idx=%ul:2,sz=%ul:14,sn=%ul:10,e=%ul:1,fi=%ul:2,tid=%ul:2,idx=%ul:14,sso=%ul:13)(sdu_idx:ctrl=%ul:5,prio=%ul:12,nrml=%ul:15)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_BUILD_RETX_PDU": {
+ "format": "[ERLCUL][LCP] retx PDU (rb_idx=%ul:6,tb_idx=%ul:2,sz=%ul:14,sn=%ul:10,e=%ul:1,fi=%ul:2,tid=%ul:2,idx=%ul:14,sso=%ul:13)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_BUILD_RETX_SEG": {
+ "format": "[ERLCUL][LCP] retx SEG (rb_idx=%ul:6,tb_idx=%ul:2,sz=%ul:14,sn=%ul:10,e=%ul:1,fi=%ul:2,tid=%ul:2,idx=%ul:14,sso=%ul:13,pso=%ud:15,lsf=%ud:1)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_BUILD_CTRL_PDU": {
+ "format": "[ERLCUL][LCP][RPT] ctrl PDU (rb_idx=%ud:6,tb_idx=%ud:2,sz=%ud:8)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_HDR_16": {
+ "format": "[ERLCUL][LCP] HDR (%xl:8,%xl:8,%xl:8,%xl:8,%xl:8,%xl:8,%xl:8,%xl:8,%xl:8,%xl:8,%xl:8,%xl:8,%xl:8,%xl:8,%xl:8,%xl:8)",
+ "traceClass": "ERLCUL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_SDU_SZ": {
+ "format": "[ERLCUL][LCP] SDU (%udx1)(len x num)",
+ "traceClass": "ERLCUL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_SDU_SZ_12": {
+ "format": "[ERLCUL][LCP] SDU (%ul:11x%ul:5,%ul:11x%ul:5,%ul:11x%ul:5,%ul:11x%ul:5)(len x num)",
+ "traceClass": "ERLCUL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_SDU_SZ_16": {
+ "format": "[ERLCUL][LCP] SDU (%ul:16,%ul:16,%ul:16,%ul:16)x(%uf:5,%uf:5,%uf:5,%uf:5)(len x num)",
+ "traceClass": "ERLCUL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_SDU_SZ_12_1": {
+ "format": "[ERLCUL][LCP] SDU (%ud:11x%ud:5)(len x num)",
+ "traceClass": "ERLCUL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_SDU_SZ_12_2": {
+ "format": "[ERLCUL][LCP] SDU (%ul:11x%ul:5,%ul:11x%ul:5)(len x num)",
+ "traceClass": "ERLCUL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_SDU_SZ_12_3": {
+ "format": "[ERLCUL][LCP] SDU (%ul:11x%ul:5,%ul:11x%ul:5,%ud:11x%ud:5)(len x num)",
+ "traceClass": "ERLCUL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_SDU_SZ_12_4": {
+ "format": "[ERLCUL][LCP] SDU (%ul:11x%ul:5,%ul:11x%ul:5,%ul:11x%ul:5,%ul:11x%ul:5)(len x num)",
+ "traceClass": "ERLCUL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_SDU_SZ_16_1": {
+ "format": "[ERLCUL][LCP] SDU (%ud)x(%ub:5)(len x num)",
+ "traceClass": "ERLCUL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_SDU_SZ_16_2": {
+ "format": "[ERLCUL][LCP] SDU (%ul:16,%ul:16)x(%ud:5,%ud:5)(len x num)",
+ "traceClass": "ERLCUL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_SDU_SZ_16_3": {
+ "format": "[ERLCUL][LCP] SDU (%ul:16,%ul:16,%ud)x(%ud:5,%ud:5,%ud:5)(len x num)",
+ "traceClass": "ERLCUL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_SDU_SZ_16_4": {
+ "format": "[ERLCUL][LCP] SDU (%ul:16,%ul:16,%ul:16,%ul:16)x(%uf:5,%uf:5,%uf:5,%uf:5)(len x num)",
+ "traceClass": "ERLCUL_DUMP",
+ "traceHighlightOption": "info"
+ }
+ }
+ ],
+ "traceFamily": "L2",
+ "startGen": "Legacy",
+ "endGen": "Legacy"
+}
\ No newline at end of file
diff --git a/mcu/protocol/interface/el2/trace/erlcul_trace_utmd.json b/mcu/protocol/interface/el2/trace/erlcul_trace_utmd.json
new file mode 100644
index 0000000..b84f65b
--- /dev/null
+++ b/mcu/protocol/interface/el2/trace/erlcul_trace_utmd.json
@@ -0,0 +1,127 @@
+{
+ "legacyParameters": {
+ "codeSection": "TCMFORCE",
+ "l2BufferSetting": "L2_BUFFER_ERT",
+ "l2MaxArg": 5,
+ "modemType": "LTE_L2"
+ },
+ "module": "ERLCUL",
+ "stringTranslationDefs": [],
+ "traceClassDefs": [
+ {
+ "ERLCUL_INFO": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "ERLCUL_DUMP": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ },
+ {
+ "ERLCUL_DEV": {
+ "_comment": "filterDefaulValue is used in xl1sim, will be phased out later",
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ }
+ ],
+ "traceDefs": [
+ {
+ "ERLCUL_LOG_RELSN_UPDATE": {
+ "format": "[ERLCUL][POLL] PDU release (rb_idx=%ud:6,rel_sn=%ud:10)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_CANCEL_POLL_TRGR": {
+ "format": "[ERLCUL][DISC][PDCP] cancel poll trigger due to no SDU",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_STATUS_FDBK_START": {
+ "format": "[ERLCUL][TMR] t-StatusFeedback timer start (rb_idx=%ub)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_STATUS_FDBK_STOP": {
+ "format": "[ERLCUL][TMR] t-StatusFeedback timer stop (rb_idx=%ub)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_STATUS_FDBK_EXPIRE": {
+ "format": "[ERLCUL][TMR] t-StatusFeedback timer expire (rb_idx=%ub)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_ADD_POLL_NACK": {
+ "format": "[ERLCUL][TMR] add a retx AMD PDU for poll retry (rb_idx=%ul:6,sn=%ul:10,len=%ul:16)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_DEL_POLL_NACK": {
+ "format": "[ERLCUL][RPT] remove pollnack due to all ack or new SDU (rb_idx=%ub)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_NACK_TUPLE": {
+ "format": "[ERLCUL][RPT] nack tuple info (tid=%ul:2,idx=%ul:14,sso=%ul:16,len=%ul:16,num=%ul:16)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_FREE_NACK": {
+ "format": "[ERLCUL][RPT] deregister invalid old nack (sn=%ud)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "ERLCUL_LOG_FAIL_TO_ALLOC_NACK": {
+ "format": "[ERLCUL][RPT][WARN] fail to allocate NACK (rb_idx=%uf:4,ack_sn=%uf:10,nack_sn=%uf:10,so_s=%ul:16,so_e=%ul:16)",
+ "traceClass": "ERLCUL_DUMP",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "ERLCUL_LOG_SMART_SCHEDULE": {
+ "format": "[ERLCUL][LCP] smart schedule (do_seg=%ub)",
+ "traceClass": "ERLCUL_INFO",
+ "traceHighlightOption": "info"
+ }
+ }
+ ],
+ "traceFamily": "L2",
+ "startGen": "Legacy",
+ "endGen": "Legacy"
+}
\ No newline at end of file
diff --git a/mcu/protocol/interface/el2/upcm_emac_struct.h b/mcu/protocol/interface/el2/upcm_emac_struct.h
new file mode 100644
index 0000000..db3a214
--- /dev/null
+++ b/mcu/protocol/interface/el2/upcm_emac_struct.h
@@ -0,0 +1,93 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * upcm_emac_struct.h
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * struct between emac and upcm.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ ****************************************************************************/
+
+/// @date 2018/3/15
+
+#ifndef __UPCM_EMAC_STRUCT__
+#define __UPCM_EMAC_STRUCT__
+
+#include "kal_public_api.h"
+
+#define UPCM_EMAC_MAX_RB_NUM (10) //this value should be the same as MAX_RB_NUM
+#define UPCM_EMAC_INVALID_RBR (0xFFFF)
+
+typedef struct{
+ LOCAL_PARA_HDR
+ kal_uint8 rb_idx;
+ kal_bool is_ul;
+ kal_uint16 rbrq;
+}upcm_emac_rbrq_req_struct;
+
+typedef struct{
+ LOCAL_PARA_HDR
+ kal_uint8 inactive_num;
+ kal_uint8 active_num;
+
+ kal_uint8 inactive_rb[UPCM_EMAC_MAX_RB_NUM];
+ kal_uint8 active_rb[UPCM_EMAC_MAX_RB_NUM];
+}upcm_emac_rbrq_support_rel_ind_struct;
+
+typedef struct{
+ LOCAL_PARA_HDR
+ kal_uint8 rb_idx;
+ kal_bool is_ul;
+ kal_uint16 rbr;
+}upcm_emacdl_rbr_ind_struct;
+
+
+#endif