[Feature][Modem]Update MTK MODEM V1.6 baseline version: MOLY.NR15.R3.MD700.IVT.MP1MR3.MP.V1.6
MTK modem version: MT2735_IVT_MOLY.NR15.R3.MD700.IVT.MP1MR3.MP.V1.6.tar.gz
RF modem version: NA
Change-Id: I45a4c2752fa9d1a618beacd5d40737fb39ab64fb
diff --git a/mcu/service/dhl/database/EM_INFO.csv b/mcu/service/dhl/database/EM_INFO.csv
new file mode 100755
index 0000000..ad23a04
--- /dev/null
+++ b/mcu/service/dhl/database/EM_INFO.csv
@@ -0,0 +1,116 @@
+Category,ILM_ID,Field_ID,Internal Parameter,Bytes,Description,Note
+,MSG_ID_TDD_EM_CSCE_SERV_CELL_S_STATUS_IND,IDLE_SCELL_UARFCN,serv_cell.uarfcn_DL,2,unsigned,0
+,MSG_ID_TDD_EM_CSCE_SERV_CELL_S_STATUS_IND,IDLE_SCELL_CPI,serv_cell.psc,2,unsigned,0
+,MSG_ID_TDD_EM_CSCE_SERV_CELL_S_STATUS_IND,IDLE_SCELL_RSCP,serv_cell.rscp,4,signed,0
+,MSG_ID_TDD_EM_CSCE_NEIGH_CELL_S_STATUS_IND,CELL_RAT_TYPE,RAT_type,1,enum,0
+,MSG_ID_TDD_EM_CSCE_NEIGH_CELL_S_STATUS_IND,IDLE_NCELL_NUM,neigh_cell_count,1,unsigned,0
+,MSG_ID_TDD_EM_CSCE_NEIGH_CELL_S_STATUS_IND,IDLE_NCELL_UARFCN,choice.neigh_cells[16].uarfcn_DL,2,unsigned,0
+,MSG_ID_TDD_EM_CSCE_NEIGH_CELL_S_STATUS_IND,IDLE_NCELL_CPI,choice.neigh_cells[16].psc,2,unsigned,0
+,MSG_ID_TDD_EM_CSCE_NEIGH_CELL_S_STATUS_IND,IDLE_NCELL_RSCP,choice.neigh_cells[16].rscp,4,signed,0
+,MSG_ID_TDD_EM_MEME_DCH_UMTS_CELL_INFO_IND,DCH_TCELL_NUM,num_cells,1,unsigned,0
+,MSG_ID_TDD_EM_MEME_DCH_UMTS_CELL_INFO_IND,DCH_TCELL_UARFCN,umts_cell_list[64].UARFCN,2,unsigned,0
+,MSG_ID_TDD_EM_MEME_DCH_UMTS_CELL_INFO_IND,DCH_TCELL_CPI,umts_cell_list[64].CELLPARAID,2,unsigned,0
+,MSG_ID_TDD_EM_MEME_DCH_UMTS_CELL_INFO_IND,DCH_TCELL_RSCP,umts_cell_list[64].RSCP,4,signed,0
+,MSG_ID_TDD_EM_MEME_DCH_UMTS_CELL_INFO_IND,DCH_SCELL_ISCP[6],umts_cell_list[64].ISCP[6],4,signed,0
+,MSG_ID_TDD_EM_MEME_DCH_UMTS_CELL_INFO_IND,IS_DCH_SCELL,umts_cell_list[64].isServingCell,1,bool,0
+
+,MSG_ID_TDD_EM_CSCE_NEIGH_CELL_S_STATUS_IND,CELL_RAT_TYPE,RAT_type,1,enum,0
+,MSG_ID_TDD_EM_CSCE_NEIGH_CELL_S_STATUS_IND,IDLE_LTE_NCELL_NUM,neigh_cell_count,1,unsigned,0
+,MSG_ID_TDD_EM_CSCE_NEIGH_CELL_S_STATUS_IND,IDLE_LTE_NCELL_EARFCN,choice.LTE_neigh_cells[16].earfcn,2,unsigned,0
+,MSG_ID_TDD_EM_CSCE_NEIGH_CELL_S_STATUS_IND,IDLE_LTE_NCELL_PCI,choice.LTE_neigh_cells[16].pci,2,unsigned,0
+,MSG_ID_TDD_EM_CSCE_NEIGH_CELL_S_STATUS_IND,IDLE_LTE_NCELL_RSRP,choice.LTE_neigh_cells[16].rsrp,4,signed,0
+,MSG_ID_TDD_EM_CSCE_NEIGH_CELL_S_STATUS_IND,IDLE_LTE_NCELL_RSRQ,choice.LTE_neigh_cells[16].rsrq,4,signed,0
+,MSG_ID_TDD_EM_MEME_DCH_LTE_CELL_INFO_IND,DCH_LTE_NCELL_NUM,num_cells,1,unsigned,0
+,MSG_ID_TDD_EM_MEME_DCH_LTE_CELL_INFO_IND,DCH_LTE_NCELL_EARFCN,lte_cell_list[32].EARFCN,2,unsigned,0
+,MSG_ID_TDD_EM_MEME_DCH_LTE_CELL_INFO_IND,DCH_LTE_NCELL_PCI,lte_cell_list[32].PCI,2,unsigned,0
+,MSG_ID_TDD_EM_MEME_DCH_LTE_CELL_INFO_IND,DCH_LTE_NCELL_RSRP,lte_cell_list[32].RSRP,2,signed,0
+,MSG_ID_TDD_EM_MEME_DCH_LTE_CELL_INFO_IND,DCH_LTE_NCELL_RSRQ,lte_cell_list[32].RSRQ,2,signed,0
+
+,MSG_ID_TDD_EM_CSCE_NEIGH_CELL_S_STATUS_IND,CELL_RAT_TYPE,RAT_type,1,enum,0
+,MSG_ID_TDD_EM_CSCE_NEIGH_CELL_S_STATUS_IND,IDLE_GSM_NCELL_NUM,neigh_cell_count,1,unsigned,0
+,MSG_ID_TDD_EM_CSCE_NEIGH_CELL_S_STATUS_IND,IDLE_GSM_NCELL_ARFCN,choice.GSM_neigh_cells[16].arfcn,2,unsigned,0
+,MSG_ID_TDD_EM_CSCE_NEIGH_CELL_S_STATUS_IND,IDLE_GSM_NCELL_BSIC,choice.GSM_neigh_cells[16].bsic,1,unsigned,0
+,MSG_ID_TDD_EM_CSCE_NEIGH_CELL_S_STATUS_IND,IDLE_GSM_NCELL_RSSI,choice.GSM_neigh_cells[16].rssi,4,signed,0
+
+,MSG_ID_TDD_EM_MEME_DCH_GSM_CELL_INFO_IND,DCH_GSM_NCELL_NUM,num_cells,1,unsigned,0
+,MSG_ID_TDD_EM_MEME_DCH_GSM_CELL_INFO_IND,DCH_GSM_NCELL_ARFCN,gsm_cell_list[6].arfcn,2,unsigned,0
+,MSG_ID_TDD_EM_MEME_DCH_GSM_CELL_INFO_IND,DCH_GSM_NCELL_BSIC,gsm_cell_list[6].bsic,1,unsigned,0
+,MSG_ID_TDD_EM_MEME_DCH_GSM_CELL_INFO_IND,DCH_GSM_NCELL_RSSI,gsm_cell_list[6].rssi,2,signed,0
+,MSG_ID_TDD_EM_URR_3G_GENERAL_STATUS_IND,3G_RRC_STATE,uas_3g_general_status.umts_rrc_state,1,enum,0
+,,,,,,0
+,MSG_ID_EM_RRM_MEASUREMENT_REPORT_INFO_IND,SCELL_ARFCN,rr_em_measurement_report_info.serving_arfcn,2,unsigned,0
+,MSG_ID_EM_RRM_MEASUREMENT_REPORT_INFO_IND,SCELL_BSIC,rr_em_measurement_report_info.serving_bsic,1,unsigned,0
+,MSG_ID_EM_RRM_MEASUREMENT_REPORT_INFO_IND,SCELL_RSSI,rr_em_measurement_report_info.serv_rla_in_quarter_dbm,2,signed,0
+,MSG_ID_EM_RRM_MEASUREMENT_REPORT_INFO_IND,GSM_NCELL_NUM,rr_em_measurement_report_info.num_of_carriers,1,unsigned,0
+,MSG_ID_EM_RRM_MEASUREMENT_REPORT_INFO_IND,GSM_NCELL_ARFCN,rr_em_measurement_report_info.nc_arfcn[32],2,unsigned,0
+,MSG_ID_EM_RRM_MEASUREMENT_REPORT_INFO_IND,GSM_NCELL_BSIC,rr_em_measurement_report_info.nc_bsic[32],1,unsigned,0
+,MSG_ID_EM_RRM_MEASUREMENT_REPORT_INFO_IND,GSM_NCELL_RSSI,rr_em_measurement_report_info.rla_in_quarter_dbm[32],2,signed,0
+
+,MSG_ID_EM_RRM_IR_4G_NEIGHBOR_MEAS_STATUS_IND,LTE_NCELL_NUM,ir_4g_neighbor_meas_status[6].is_valid,1,bool,0
+,MSG_ID_EM_RRM_IR_4G_NEIGHBOR_MEAS_STATUS_IND,LTE_NCELL_EARFCN,ir_4g_neighbor_meas_status[6].earfcn,2,unsigned,0
+,MSG_ID_EM_RRM_IR_4G_NEIGHBOR_MEAS_STATUS_IND,LTE_NCELL_PCI,ir_4g_neighbor_meas_status[6].pci,2,unsigned,0
+,MSG_ID_EM_RRM_IR_4G_NEIGHBOR_MEAS_STATUS_IND,LTE_NCELL_RSRQ,ir_4g_neighbor_meas_status[6].rsrp,2,signed,0
+,MSG_ID_EM_RRM_IR_4G_NEIGHBOR_MEAS_STATUS_IND,LTE_NCELL_RSRP,ir_4g_neighbor_meas_status[6].rsrq,2,signed,0
+
+,MSG_ID_EM_RRM_IR_3G_NEIGHBOR_MEAS_STATUS_IND,TDS_NCELL_NUM,ir_3g_neighbor_meas_status[6].is_valid,1,bool,0
+,MSG_ID_EM_RRM_IR_3G_NEIGHBOR_MEAS_STATUS_IND,TDS_NCELL_UARFCN,ir_3g_neighbor_meas_status[6].uarfcn,2,unsigned,0
+,MSG_ID_EM_RRM_IR_3G_NEIGHBOR_MEAS_STATUS_IND,TDS_NCELL_PCI,ir_3g_neighbor_meas_status[6].phy_id,2,unsigned,0
+,MSG_ID_EM_RRM_IR_3G_NEIGHBOR_MEAS_STATUS_IND,TDS_NCELL_RSCP,ir_3g_neighbor_meas_status[6].strength,2,signed,0
+,,,,,,0
+,MSG_ID_EM_ERRC_MOB_MEAS_INTRARAT_INFO_IND,LTE_SERVING_EARFCN,serving_info.earfcn,2,unsigned,0
+,MSG_ID_EM_ERRC_MOB_MEAS_INTRARAT_INFO_IND,LTE_SERVING_PCI,serving_info.pci,2,unsigned,0
+,MSG_ID_EM_EL1_STATUS_IND,LTE_SERVING_RSRP_RX,dl_info[2].dl_rsrp[2],2*2,signed,0
+,MSG_ID_EM_EL1_STATUS_IND,LTE_SERVING_RSRP,dl_info[2].rsrp,2,signed,0
+,MSG_ID_EM_EL1_STATUS_IND,LTE_SERVING_RSRQ_RX,dl_info[2].dl_rsrq[2],2*2,signed,0
+,MSG_ID_EM_EL1_STATUS_IND,LTE_SERVING_RSRQ,dl_info[2].rsrq,2,signed,0
+,MSG_ID_EM_EL1_STATUS_IND,LTE_SERVING_SINR_RX,dl_info[2].dl_sinr[2],2*2,signed,0
+,MSG_ID_EM_EL1_STATUS_IND,LTE_SERVING_SINR,dl_info[2].sinr,2,signed,0
+,MSG_ID_EM_EL1_STATUS_IND,LTE_SERVING_RSSI_RX,dl_info[2].dl_rssi[2],2*2,signed,0
+,MSG_ID_EM_ERRC_MOB_MEAS_INTRARAT_INFO_IND,LTE_INTRA_NEIGHBOR_CELL_NUM,intra_info.cell_num,1,unsigned,0
+,MSG_ID_EM_ERRC_MOB_MEAS_INTRARAT_INFO_IND,LTE_INTRA_NEIGHBOR_EARFCN,serving_info.earfcn,2,unsigned,0
+,MSG_ID_EM_ERRC_MOB_MEAS_INTRARAT_INFO_IND,LTE_INTRA_NEIGHBOR_PCI,intra_info.intra_cell[16].pci,2,unsigned,0
+,MSG_ID_EM_ERRC_MOB_MEAS_INTRARAT_INFO_IND,LTE_INTRA_NEIGHBOR_RSRP,intra_info.intra_cell[16].rsrp,4,signed,0
+,MSG_ID_EM_ERRC_MOB_MEAS_INTRARAT_INFO_IND,LTE_INTRA_NEIGHBOR_RSRQ,intra_info.intra_cell[16].rsrq,4,signed,0
+,MSG_ID_EM_ERRC_MOB_MEAS_INTRARAT_INFO_IND,LTE_INTER_NEIGHBOR_Freq_NUM,inter_info.freq_num,1,unsigned,0
+,MSG_ID_EM_ERRC_MOB_MEAS_INTRARAT_INFO_IND,LTE_INTER_NEIGHBOR_CELL_NUM,inter_info.inter_freq[4].cell_num,1,unsigned,0
+,MSG_ID_EM_ERRC_MOB_MEAS_INTRARAT_INFO_IND,LTE_INTER_NEIGHBOR_EARFCN,inter_info.inter_freq[4].earfcn,2,unsigned,0
+,MSG_ID_EM_ERRC_MOB_MEAS_INTRARAT_INFO_IND,LTE_INTER_NEIGHBOR_PCI,inter_info.inter_freq[4].inter_cell[6].pci,2,unsigned,0
+,MSG_ID_EM_ERRC_MOB_MEAS_INTRARAT_INFO_IND,LTE_INTER_NEIGHBOR_RSRP,inter_info.inter_freq[4].inter_cell[6].rsrp,4,signed,0
+,MSG_ID_EM_ERRC_MOB_MEAS_INTRARAT_INFO_IND,LTE_INTER_NEIGHBOR_RSRQ,inter_info.inter_freq[4].inter_cell[6].rsrq,4,signed,0
+,MSG_ID_EM_ERRC_MOB_MEAS_INTERRAT_UTRAN_INFO_IND,LTE_3GNEIGHBOR_FREQ_NUM,freq_num,1,unsigned,0
+,MSG_ID_EM_ERRC_MOB_MEAS_INTERRAT_UTRAN_INFO_IND,LTE_3GNEIGHBOR_CELL_NUM,inter_freq[16].ucell_num,1,unsigned,0
+,MSG_ID_EM_ERRC_MOB_MEAS_INTERRAT_UTRAN_INFO_IND,LTE_3GNEIGHBOR_UARFCN,inter_freq[16].uarfcn,2,unsigned,0
+,MSG_ID_EM_ERRC_MOB_MEAS_INTERRAT_UTRAN_INFO_IND,LTE_3GNEIGHBOR_CPI,inter_freq[16].ucell[6].psc,2,unsigned,0
+,MSG_ID_EM_ERRC_MOB_MEAS_INTERRAT_UTRAN_INFO_IND,LTE_3GNEIGHBOR_RSCP,inter_freq[16].ucell[6].rscp,4,signed,0
+,MSG_ID_EM_ERRC_MOB_MEAS_INTERRAT_GERAN_INFO_IND,LTE_2GNEIGHBOR_NUM,total_gcell_num,1,unsigned,0
+,MSG_ID_EM_ERRC_MOB_MEAS_INTERRAT_GERAN_INFO_IND,LTE_2GNEIGHBOR_ARFCN,gcell[6].arfcn,2,unsigned,0
+,MSG_ID_EM_ERRC_MOB_MEAS_INTERRAT_GERAN_INFO_IND,LTE_2GNEIGHBOR_BSIC,gcell[6].bsic,1,unsigned,0
+,MSG_ID_EM_ERRC_MOB_MEAS_INTERRAT_GERAN_INFO_IND,LTE_2GNEIGHBOR_RXLV,gcell[6].rssi,4,signed,0
+
+,MSG_ID_EM_ERRC_STATE_IND,LTE_RRC_STATE,errc_sts,1,enum,0
+,,,,,,0
+,MSG_ID_EM_L4C_RAT_CHANGE_IND,SOURCE_RAT,source_rat,1,unsigned,0
+,MSG_ID_EM_L4C_RAT_CHANGE_IND,TARGET_RAT,target_rat,1,unsigned,0
+,MSG_ID_EM_L4C_RAT_CHANGE_IND,INTERRAT_TYPE,irat_type,1,unsigned,0
+,MSG_ID_EM_NWSEL_PLMN_LOSS_INFO_IND,PLMN_LOSS_RAT,loss_rat,1,unsigned,0
+,MSG_ID_EM_NWSEL_PLMN_SEARCH_CNF_INFO_IND,PLMN_SEARCH_RAT,search_rat,1,unsigned,0
+,MSG_ID_EM_NWSEL_PLMN_SEARCH_CNF_INFO_IND,PLMN_SEARCH_RESULT,result,1,unsigned,0
+,MSG_ID_EM_NWSEL_PLMN_SEARCH_CNF_INFO_IND,PLMN_SEARCH_MODE,plmn_sel_mode,1,unsigned,0
+,,,,,,0
+,,,,,,0
+,MSG_ID_EM_IMC_IPSEC_INFO_FLUSH_IND,FLUSH_ALL_POLICY_INDEX,ref_count,1,unsigned,0
+,MSG_ID_EM_IMC_IPSEC_INFO_ADD_IND,SA_SOURCE_IP,ipsec_info[4].src_ip[64],1,unsigned,0
+,MSG_ID_EM_IMC_IPSEC_INFO_ADD_IND,SA_DEST_IP,ipsec_info[4].dst_ip[64],1,unsigned,0
+,MSG_ID_EM_IMC_IPSEC_INFO_ADD_IND,SA_SOURCE_PORT,ipsec_info[4].src_port[16],1,unsigned,0
+,MSG_ID_EM_IMC_IPSEC_INFO_ADD_IND,SA_DEST_PORT,ipsec_info[4].dst_port[16],1,unsigned,0
+,MSG_ID_EM_IMC_IPSEC_INFO_ADD_IND,SA_SPI,ipsec_info[4].spi[32],1,unsigned,0
+,MSG_ID_EM_IMC_IPSEC_INFO_ADD_IND,SA_DIRECTION,ipsec_info[4].dir,1,unsigned,0
+,MSG_ID_EM_IMC_IPSEC_INFO_ADD_IND,IPSEC POLICY_INDEX,index,1,unsigned,0
+,MSG_ID_EM_IMC_IPSEC_INFO_ADD_IND,TRANSPORT,transport,1,unsigned,0
+,MSG_ID_EM_IMC_IPSEC_INFO_ADD_IND,MODE,mode,1,unsigned,0
+,MSG_ID_EM_IMC_IPSEC_INFO_ADD_IND,PROTOCOL,protocol,1,unsigned,0
+,MSG_ID_EM_IMC_IPSEC_INFO_ADD_IND,ENCRY_ALGO,encry_algo,1,unsigned,0
+,MSG_ID_EM_IMC_IPSEC_INFO_ADD_IND,INTEGRITY_ALGO,integrity_algo,1,unsigned,0
+,MSG_ID_EM_IMC_IPSEC_INFO_ADD_IND,CIPHER_KEY,ck[256],1,unsigned,0
+,MSG_ID_EM_IMC_IPSEC_INFO_ADD_IND,INTEGRITY_KEY,ik[256],1,unsigned,0
+,MSG_ID_EM_IMC_IPSEC_INFO_DELETE_IND,REMOVED_POLICY_INDEX,index,1,unsigned,0
diff --git a/mcu/service/dhl/database/GLOBAL_ID_INFO.csv b/mcu/service/dhl/database/GLOBAL_ID_INFO.csv
new file mode 100755
index 0000000..2005b3f
--- /dev/null
+++ b/mcu/service/dhl/database/GLOBAL_ID_INFO.csv
@@ -0,0 +1,103 @@
+OTA_GLOBAL_ID,Description,Note
+PROTOCOL_SECTION__GAN_TCP,,used by current real MD case?
+PROTOCOL_SECTION__GAN_UDP,,used by current real MD case?
+PROTOCOL_SECTION__GSM_RLCMAC_DL,gsm_rlcmac_dl,
+PROTOCOL_SECTION__GSM_RLCMAC_UL,gsm_rlcmac_ul,
+PROTOCOL_SECTION__LLC,llcgprs,
+PROTOCOL_SECTION__NAS,gsm_a_dtap,
+PROTOCOL_SECTION__NAS_MM_UL,gsm_a_dtap,
+PROTOCOL_SECTION__NAS_MM_DL,gsm_a_dtap,
+PROTOCOL_SECTION__NAS_GMM_UL,gsm_a_dtap,
+PROTOCOL_SECTION__NAS_GMM_DL,gsm_a_dtap,
+PROTOCOL_SECTION__NAS_SMS_RPDU,gsm_a_rp,
+PROTOCOL_SECTION__NAS_SMS_TPDU,gsm_sms,
+PROTOCOL_SECTION__NAS_SMS_TPDU_DELIVER,gsm_sms,
+PROTOCOL_SECTION__NAS_SMS_TPDU_DELIVER_REPORT_ACK,gsm_sms,
+PROTOCOL_SECTION__NAS_SMS_TPDU_DELIVER_REPORT_NACK,gsm_sms,
+PROTOCOL_SECTION__NAS_SMS_TPDU_STATUS_REPORT,gsm_sms,
+PROTOCOL_SECTION__NAS_SMS_TPDU_COMMAND,gsm_sms,
+PROTOCOL_SECTION__NAS_SMS_TPDU_SUBMIT,gsm_sms,
+PROTOCOL_SECTION__NAS_SMS_TPDU_SUBMIT_REPORT_ACK,gsm_sms,
+PROTOCOL_SECTION__NAS_SMS_TPDU_SUBMIT_REPORT_NACK,gsm_sms,
+PROTOCOL_SECTION__NAS_SMS_TPDU_END,gsm_sms,
+PROTOCOL_SECTION__NAS_CC_UL,gsm_a_dtap,
+PROTOCOL_SECTION__NAS_CC_DL,gsm_a_dtap,
+PROTOCOL_SECTION__NAS_SM,gsm_a_dtap,
+PROTOCOL_SECTION__NAS_END,gsm_a_dtap,
+PROTOCOL_SECTION__RR,gsm_a_dtap,
+PROTOCOL_SECTION__RR_with_pseudolength,gsm_a_ccch,
+PROTOCOL_SECTION__RR_short_PD,gsm_a_sacch,
+PROTOCOL_SECTION__RR_dl_with_pseudolength,gsm_a_ccch,
+PROTOCOL_SECTION__RR_ul_with_pseudolength,gsm_a_ccch,
+PROTOCOL_SECTION__RR_end,,
+PROTOCOL_SECTION__SNDCP,,used by current real MD case?
+PROTOCOL_SECTION__SNDCPXID,,used by current real MD case?
+PROTOCOL_SECTION__LTE_RRC_BCCH_BCH,lte-rrc.bcch.bch,
+PROTOCOL_SECTION__LTE_RRC_BCCH_DL_SCH,lte-rrc.bcch.dl.sch,
+PROTOCOL_SECTION__LTE_RRC_DL_CCCH,lte-rrc.dl.ccch,
+PROTOCOL_SECTION__LTE_RRC_DL_DCCH,lte-rrc.dl.dcch,
+PROTOCOL_SECTION__LTE_RRC_PCCH,lte-rrc.pcch,
+PROTOCOL_SECTION__LTE_RRC_UL_CCCH,lte-rrc.ul.ccch,
+PROTOCOL_SECTION__LTE_RRC_UL_DCCH,lte-rrc.ul.dcch,
+PROTOCOL_SECTION__NAS_EPS,nas-eps,
+PROTOCOL_SECTION__NAS_EPS_PLAIN,nas-eps_plain,
+PROTOCOL_SECTION__RRC_BCCH_BCH,,used by current real MD case?
+PROTOCOL_SECTION__RRC_BCCH_FACH,rrc.bcch.fach,
+PROTOCOL_SECTION__RRC_DL_CCCH,rrc.dl.ccch,
+PROTOCOL_SECTION__RRC_DL_DCCH,rrc.dl.dcch,
+PROTOCOL_SECTION__RRC_DL_SHCCH,,used by current real MD case?
+PROTOCOL_SECTION__RRC_MCCH,,used by current real MD case?
+PROTOCOL_SECTION__RRC_MSCH,,used by current real MD case?
+PROTOCOL_SECTION__RRC_PCCH,rrc.pcch,
+PROTOCOL_SECTION__RRC_UL_CCCH,rrc.ul.ccch,
+PROTOCOL_SECTION__RRC_UL_DCCH,rrc.ul.dcch,
+PROTOCOL_SECTION__RRC_UL_SHCCH,,used by current real MD case?
+PROTOCOL_SECTION__RRC_HANDOVER_TO_UTRAN_COMMAND,rrc.irat.ho_to_utran_cmd,
+PROTOCOL_SECTION__RRC_IRAT_HO_INFO,rrc.irat.irat_ho_info,
+PROTOCOL_SECTION__RRC_SI_MIB,rrc.si.mib,
+PROTOCOL_SECTION__RRC_SI_SB1,rrc.si.sb1,
+PROTOCOL_SECTION__RRC_SI_SB2,rrc.si.sb2,
+PROTOCOL_SECTION__RRC_SI_SIB1,rrc.si.sib1,
+PROTOCOL_SECTION__RRC_SI_SIB2,rrc.si.sib20,
+PROTOCOL_SECTION__RRC_SI_SIB3,rrc.si.sib3,
+PROTOCOL_SECTION__RRC_SI_SIB4,rrc.si.sib4,
+PROTOCOL_SECTION__RRC_SI_SIB5,rrc.si.sib5,
+PROTOCOL_SECTION__RRC_SI_SIB5bis,rrc.si.sib5bis,
+PROTOCOL_SECTION__RRC_SI_SIB6,rrc.si.sib6,
+PROTOCOL_SECTION__RRC_SI_SIB7,rrc.si.sib7,
+PROTOCOL_SECTION__RRC_SI_SIB8,,used by current real MD case?
+PROTOCOL_SECTION__RRC_SI_SIB9,,used by current real MD case?
+PROTOCOL_SECTION__RRC_SI_SIB10,,used by current real MD case?
+PROTOCOL_SECTION__RRC_SI_SIB11,rrc.si.sib11,
+PROTOCOL_SECTION__RRC_SI_SIB11bis,rrc.si.sib11bis,
+PROTOCOL_SECTION__RRC_SI_SIB12,rrc.si.sib12,
+PROTOCOL_SECTION__RRC_SI_SIB13,,used by current real MD case?
+PROTOCOL_SECTION__RRC_SI_SIB13_1,,used by current real MD case?
+PROTOCOL_SECTION__RRC_SI_SIB13_2,,used by current real MD case?
+PROTOCOL_SECTION__RRC_SI_SIB13_3,,used by current real MD case?
+PROTOCOL_SECTION__RRC_SI_SIB13_4,,used by current real MD case?
+PROTOCOL_SECTION__RRC_SI_SIB14,,used by current real MD case?
+PROTOCOL_SECTION__RRC_SI_SIB15,,used by current real MD case?
+PROTOCOL_SECTION__RRC_SI_SIB15bis,,used by current real MD case?
+PROTOCOL_SECTION__RRC_SI_SIB15_1,,used by current real MD case?
+PROTOCOL_SECTION__RRC_SI_SIB15_1bis,,used by current real MD case?
+PROTOCOL_SECTION__RRC_SI_SIB15_2,,used by current real MD case?
+PROTOCOL_SECTION__RRC_SI_SIB15_2bis,,used by current real MD case?
+PROTOCOL_SECTION__RRC_SI_SIB15_3,,used by current real MD case?
+PROTOCOL_SECTION__RRC_SI_SIB15_3bis,,used by current real MD case?
+PROTOCOL_SECTION__RRC_SI_SIB15_4,,used by current real MD case?
+PROTOCOL_SECTION__RRC_SI_SIB15_5,,used by current real MD case?
+PROTOCOL_SECTION__RRC_SI_SIB15_6,,used by current real MD case?
+PROTOCOL_SECTION__RRC_SI_SIB15_7,,used by current real MD case?
+PROTOCOL_SECTION__RRC_SI_SIB15_8,,used by current real MD case?
+PROTOCOL_SECTION__RRC_SI_SIB16,rrc.si.sib16,
+PROTOCOL_SECTION__RRC_SI_SIB17,rrc.si.sib17,
+PROTOCOL_SECTION__RRC_SI_SIB18,rrc.si.sib18,
+PROTOCOL_SECTION__RRC_SI_SIB19,rrc.si.sib19,
+PROTOCOL_SECTION__RRC_SI_SIB20,rrc.si.sib20,
+PROTOCOL_SECTION__LTE_LPP_UL,,used by current real MD case?
+PROTOCOL_SECTION__LTE_LPP_DL,,used by current real MD case?
+PROTOCOL_SECTION__RRC_SI_SIB21,
+PROTOCOL_SECTION__RRC_SI_SIB22,
+PROTOCOL_SECTION__LTE_RRC_MCCH,
+
diff --git a/mcu/service/dhl/database/OTA_INFO.csv b/mcu/service/dhl/database/OTA_INFO.csv
new file mode 100755
index 0000000..aa2fb33
--- /dev/null
+++ b/mcu/service/dhl/database/OTA_INFO.csv
@@ -0,0 +1,194 @@
+Category,OTA_TRACE_ID,Field_ID,Internal Parameter,Description,Note
+3G Sys Info,TDD_SIBE_PEER_MSG_RRC_SI,OTA_MSG_OFFSET,,,
+,TDD_SIBE_PEER_MSG_RRC_SI,OTA_PARAM_0,1,UARFCN,
+,TDD_SIBE_PEER_MSG_RRC_SI,OTA_PARAM_1,2,PSC,
+2G Sys Info,RR_NW_TO_MS_SI_MSG_TDD,OTA_MSG_OFFSET,,,
+,RR_NW_TO_MS_SI_MSG_TDD,OTA_PARAM_0,1,ARFCN,
+,RR_NW_TO_MS_SI_MSG_TDD,OTA_PARAM_1,2,TC,
+4G Sys Info,ERRC_SYS_SI_SIB_PEER,OTA_MSG_OFFSET,,,
+,ERRC_SYS_SI_SIB_PEER,OTA_PARAM_0,1,EARFCN,
+,ERRC_SYS_SI_SIB_PEER,OTA_PARAM_1,2,PCI,
+Air Messages,LPP_SEND_PEER_MSG_ACK,OTA_MSG_OFFSET,,,
+,LPP_SEND_PEER_MSG_WITH_PARAMS,OTA_MSG_OFFSET,,,
+,LPP_RECEIVE_PEER_MSG_WITH_PARAMS,OTA_MSG_OFFSET,,,
+,LPP_RECEIVE_PEER_MSG_ACK,OTA_MSG_OFFSET,,,
+,RR_MS_TO_NW_PEER_MSG_TDD,OTA_MSG_OFFSET,,,
+,RR_NW_TO_MS_PEER_MSG_TDD,OTA_MSG_OFFSET,,,
+,RR_GPRS_RECEV_PEER_MSG_TRACE_TDD,OTA_MSG_OFFSET,,,
+,RR_GPRS_SEND_PEER_MSG_TRACE_TDD,OTA_MSG_OFFSET,,,
+,MRS_PEER_MSG_RRC_IRAT_HO_INFO_MSG,OTA_MSG_OFFSET,,,
+,LLC_MS_TO_NW_PEER_MSG_SUB_FORMAT,OTA_MSG_OFFSET,,,
+,LLC_NW_TO_MS_PEER_MSG_SUB_FORMAT,OTA_MSG_OFFSET,,,
+,MM_SEND_PEER_MSG_TRACE,OTA_MSG_OFFSET,,,
+,MM_RECEV_PEER_MSG_TRACE,OTA_MSG_OFFSET,,,
+,MM_SEND_LU_PEER_MSG_TRACE,OTA_MSG_OFFSET,,,
+,MM_SEND_IDENTITY_MSG_TRACE,OTA_MSG_OFFSET,,,
+,GMM_SEND_PEER_MSG_TRACE,OTA_MSG_OFFSET,,,
+,GMM_RECEV_PEER_MSG_TRACE,OTA_MSG_OFFSET,,,
+,SM_SEND_PEER_MSG_TRACE,OTA_MSG_OFFSET,,,
+,SM_RECEV_PEER_MSG_TRACE,OTA_MSG_OFFSET,,,
+,IMCSMS_NW_TO_MS_PEER_MSG,OTA_MSG_OFFSET,,,
+,IMCSMS_MS_TO_NW_PEER_MSG,OTA_MSG_OFFSET,,,
+,IMCSMS_MO_MS_TO_NW_PEER_MSG,OTA_MSG_OFFSET,,,
+,IMCSMS_MO_NW_TO_MS_PEER_MSG,OTA_MSG_OFFSET,,,
+,IMCSMS_MT_NW_TO_MS_PEER_MSG,OTA_MSG_OFFSET,,,
+,IMCSMS_MT_MS_TO_NW_PEER_MSG,OTA_MSG_OFFSET,,,
+,SMSAL_MS_TO_NW_PEER_MSG,OTA_MSG_OFFSET,,,
+,SMSAL_NW_TO_MS_PEER_MSG,OTA_MSG_OFFSET,,,
+,CC_MS_TO_NW_PEER_MSG,OTA_MSG_OFFSET,,,
+,CC_NW_TO_MS_PEER_MSG,OTA_MSG_OFFSET,,,
+,SMS_MS_TO_NW_PEER_MSG,OTA_MSG_OFFSET,,,
+,SMS_NW_TO_MS_PEER_MSG,OTA_MSG_OFFSET,,,
+,SMS_MO_NW_TO_MS_RL_PEER_MSG,OTA_MSG_OFFSET,,,
+,SMS_MO_MS_TO_NW_RL_PEER_MSG,OTA_MSG_OFFSET,,,
+,SMS_MT_NW_TO_MS_RL_PEER_MSG,OTA_MSG_OFFSET,,,
+,SMS_MT_MS_TO_NW_RL_PEER_MSG,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_CCCH_MSG,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTRA_FREQ_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTRA_FREQ_xD_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTRA_FREQ_xD_xD_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTRA_FREQ_xD_xD_xD_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTRA_FREQ_xD_xD_xD_xD_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTRA_FREQ_xD_xD_xD_xD_xD_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTRA_FREQ_xD_xD_xD_xD_xD_xD_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTRA_FREQ_xD_xD_xD_xD_xD_xD_xD_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTRA_FREQ,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTER_FREQ_xD_PSC_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTER_FREQ_xD_xD_PSC_xD_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTER_FREQ_xD_xD_xD_PSC_xD_xD_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTER_FREQ,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTER_RAT_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTER_RAT_xD_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTER_RAT_xD_xD_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTER_RAT_xD_xD_xD_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTER_RAT_xD_xD_xD_xD_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTER_RAT_xD_xD_xD_xD_xD_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTER_RAT_xD_xD_xD_xD_xD_xD_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTER_RAT_xD_xD_xD_xD_xD_xD_xD_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTER_RAT,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_TVM_DCH_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_TVM_RACH,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_QM_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_QM_xD_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_QM_xD_xD_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_QM_xD_xD_xD_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_QM_xD_xD_xD_xD_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_QM_xD_xD_xD_xD_xD_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_QM_xD_xD_xD_xD_xD_xD_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_QM_xD_xD_xD_xD_xD_xD_xD_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_QM,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_UE_INTERNAL_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_UE_INTERNAL,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTER_RAT_EUTRA_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTER_RAT_EUTRA_xD_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTER_RAT_EUTRA_xD_xD_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTER_RAT_EUTRA_xD_xD_xD_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_INTER_RAT_EUTRA,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_EVENT_UE_POSITIONING,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_TYPE_UNSPECIFIED,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_PERIODIC,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_PERIODIC_INTER_RAT_EUTRA,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG_MEAS_REPORT_TYPE_UNSPECIFIED,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_UL_DCCH_MSG,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_DL_DCCH_MSG_REPLACE_ASU,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_DL_DCCH_MSG_ADD_PSC_1_ASU,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_DL_DCCH_MSG_ADD_PSC_2_ASU,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_DL_DCCH_MSG_ADD_PSC_3_ASU,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_DL_DCCH_MSG_REMOVE_PSC_1_ASU,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_DL_DCCH_MSG_REMOVE_PSC_2_ASU,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_DL_DCCH_MSG_REMOVE_PSC_3_ASU,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_DL_DCCH_MSG_MEAS_CONTROL_SETUP_xD_xM,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_DL_DCCH_MSG_MEAS_CONTROL_MODIFY_xD_xM,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_DL_DCCH_MSG_MEAS_CONTROL_MODIFY_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_DL_DCCH_MSG_MEAS_CONTROL_RELEASE_xD,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_DL_DCCH_MSG_MEAS_CONTROL_UNSPECIFIED,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_DL_DCCH_MSG,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_BCCH_FACH_MSG,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_PCCH_MSG,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_DL_CCCH_MSG,OTA_MSG_OFFSET,,,
+,TDD_ADR_PEER_MSG_DL_DCCH_MSG_TRANSPORT_FORMAT_COMBINATION_CONTROL_TM,OTA_MSG_OFFSET,,,
+,TDD_URR_PEER_MSG_HANDOVER_TO_UTRAN_COMMAND_MSG,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_ATTACH_REQUEST,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_ATTACH_COMPLETE,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_UL_DETACH_REQUEST,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_UL_DETACH_ACCEPT,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_TAU_REQUEST,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_TAU_COMPLETE,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_EX_SERVICE_REQUEST,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_GUTI_REALLOCATION_COMPLETE,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_AUTHENTICATION_RESPONSE,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_AUTHENTICATION_FAILURE,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_IDENTITY_RESPONSE,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_SECURITY_MODE_COMPLETE,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_SECURITY_MODE_REJECT,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_UL_EMM_STATUS,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_UL_NAS_TRANSPORT,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_UL_GENERIC_NAS_TRANSPORT,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_SERVICE_REQUEST,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_SECURITY_MODE_COMMAND,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_ATTACH_ACCEPT,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_SERVICE_REJECT,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_ATTACH_REJECT,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_TAU_REJECT,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_TAU_ACCEPT,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_DL_DETACH_REQUEST,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_DL_DETACH_ACCEPT,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_IDENTITY_REQUEST,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_EMM_INFORMATION,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_DL_EMM_STATUS,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_GUTI_REALLOCATION_COMMAND,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_AUTHENTICATION_REQUEST,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_AUTHENTICATION_REJECT,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_CS_SERVICE_NOTIFICATION,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_DL_NAS_TRANSPORT,OTA_MSG_OFFSET,,,
+,EMM_NASMSG_PEER_DL_GENERIC_NAS_TRANSPORT,OTA_MSG_OFFSET,,,
+,ESM_TRACE_SEND_AIR_MSG,OTA_MSG_OFFSET,,,
+,ESM_TRACE_SEND_REJ_MSG,OTA_MSG_OFFSET,,,
+,ESM_TRACE_RECV_AIR_MSG,OTA_MSG_OFFSET,,,
+,ESM_TRACE_RECV_REJ_MSG,OTA_MSG_OFFSET,,,
+,ETC_PEER_DATA_REQ,OTA_MSG_OFFSET,,,
+,ETC_PEER_DATA_IND,OTA_MSG_OFFSET,,,
+,ETC_PEER_CLOSE_UE_TEST_LOOP,OTA_MSG_OFFSET,,,
+,ETC_PEER_OPEN_UE_TEST_LOOP,OTA_MSG_OFFSET,,,
+,ETC_PEER_ACTIVATE_TEST_MODE,OTA_MSG_OFFSET,,,
+,ETC_PEER_DEACTIVATE_TEST_MODE,OTA_MSG_OFFSET,,,
+,ETC_PEER_RESET_UE_POSITIONING_STORED_INFORMATION,OTA_MSG_OFFSET,,,
+,ERRC_CEL_PEER_TRC_PAGING,OTA_MSG_OFFSET,,,
+,ERRC_MOB_PRT_PEER_TRC_MEAS_RPT_S,OTA_MSG_OFFSET,,,
+,ERRC_MOB_PRT_PEER_TRC_MEAS_RPT_S_N,OTA_MSG_OFFSET,,,
+,ERRC_MOB_PRT_PEER_TRC_MEAS_RPT_S_N_GSM,OTA_MSG_OFFSET,,,
+,ERRC_MOB_PRT_PEER_TRC_MEAS_RPT_CGI,OTA_MSG_OFFSET,,,
+,ERRC_MOB_PRT_PEER_TRC_PROX_IND_LTE,OTA_MSG_OFFSET,,,
+,ERRC_MOB_PRT_PEER_TRC_PROX_IND_UMTS,OTA_MSG_OFFSET,,,
+,ERRC_RCM_UE_CAP_ENQ_PEER,OTA_MSG_OFFSET,,,
+,ERRC_RCM_UE_CAP_INF_PEER,OTA_MSG_OFFSET,,,
+,ERRC_SYS_MIB_PEER,OTA_MSG_OFFSET,,,
+,ERRC_SYS_SIB1_PEER,OTA_MSG_OFFSET,,,
+,ERRC_SYS_SI_PEER,OTA_MSG_OFFSET,,,
+,ERRC_SYS_SIB1_SI_ASN1_DEC_ERR,OTA_MSG_OFFSET,,,
+,ERRC_MSG_RRC_CONN_REQ,OTA_MSG_OFFSET,,,
+,ERRC_MSG_RRC_CONN_SETUP,OTA_MSG_OFFSET,,,
+,ERRC_MSG_RRC_CONN_REJ,OTA_MSG_OFFSET,,,
+,ERRC_MSG_RRC_CONN_CMP,OTA_MSG_OFFSET,,,
+,ERRC_MSG_RRC_CONN_REEST_REQ,OTA_MSG_OFFSET,,,
+,ERRC_MSG_RRC_CONN_REEST,OTA_MSG_OFFSET,,,
+,ERRC_MSG_RRC_CONN_REEST_REJ,OTA_MSG_OFFSET,,,
+,ERRC_MSG_RRC_CONN_REEST_CMP,OTA_MSG_OFFSET,,,
+,ERRC_MSG_RRC_COUNT_CHECK,OTA_MSG_OFFSET,,,
+,ERRC_MSG_RRC_COUNT_CHECK_RES,OTA_MSG_OFFSET,,,
+,ERRC_MSG_RRC_DL_INFOTRANS,OTA_MSG_OFFSET,,,
+,ERRC_MSG_RRC_UL_INFOTRANS,OTA_MSG_OFFSET,,,
+,ERRC_MSG_RRC_MFROM_R8_HO,OTA_MSG_OFFSET,,,
+,ERRC_MSG_RRC_MFROM_R8_CCO,OTA_MSG_OFFSET,,,
+,ERRC_MSG_RRC_MFROM_R9_HO,OTA_MSG_OFFSET,,,
+,ERRC_MSG_RRC_MFROM_R9_CCO,OTA_MSG_OFFSET,,,
+,ERRC_MSG_RRC_MFROM_R9_CSFB,OTA_MSG_OFFSET,,,
+,ERRC_MSG_RRC_CONN_RECONF,OTA_MSG_OFFSET,,,
+,ERRC_MSG_RRC_CONN_RECONF_CMP,OTA_MSG_OFFSET,,,
+,ERRC_MSG_RRC_REL,OTA_MSG_OFFSET,,,
+,ERRC_MSG_RRC_SMC,OTA_MSG_OFFSET,,,
+,ERRC_MSG_RRC_SMC_CMP,OTA_MSG_OFFSET,,,
+,ERRC_MSG_RRC_SMC_FAIL,OTA_MSG_OFFSET,,,
+,ERRC_MSG_RRC_UE_INFO_REQ,OTA_MSG_OFFSET,,,
+,ERRC_MSG_RRC_UE_INFO_RES,OTA_MSG_OFFSET,,,
+,ERRC_MSG_RRC_ERROR_MSG,OTA_MSG_OFFSET,,,
diff --git a/mcu/service/dhl/database/Pc_Cnf b/mcu/service/dhl/database/Pc_Cnf
new file mode 100755
index 0000000..5b79dd3
--- /dev/null
+++ b/mcu/service/dhl/database/Pc_Cnf
@@ -0,0 +1,29 @@
+// Size
+Char_Size 1; // size of char
+Short_Size 2; // size of short
+Int_Size 4; // size of int
+Long_Size 4; // size of long
+LLong_Size 8; // size of long long
+Float_Size 4; // size of float
+Double_Size 8; // size of double
+LDouble_Size 8; // size of long double
+Pointer_Size 4; // size of pointer
+
+// Alignment
+Char_Align 1; // alignment of char
+Short_Align 2; // alignment of short
+Int_Align 4; // alignment of int
+Long_Align 4; // alignment of long
+LLong_Align 8; // alignment of long long
+Float_Align 4; // alignment of float
+Double_Align 8; // alignment of double
+LDouble_Align 8; // alignment of long double
+Pointer_Align 4; // alignment of pointer
+Struct_Align 8; // alignment of struct
+
+// Enum
+Enum_Default_Use True; // True or False
+Enum_Default_Type Int; // Legal types are Char, UChar, Short, UShort, Int
+
+// Endian
+Endian Little; // Little or Big
diff --git a/mcu/service/dhl/database/Routing.txt b/mcu/service/dhl/database/Routing.txt
new file mode 100755
index 0000000..644ee88
--- /dev/null
+++ b/mcu/service/dhl/database/Routing.txt
@@ -0,0 +1,51 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+This file is used by cgen for split system information.
+Fill the Module id in the correct platform.
+ex:
+
+[MNT]
+MOD_CC
+[TARGET]
+
+Note that all module's default location is TARGET.
+*/
+
+[MNT]
+
+
+[TARGET]
+
diff --git a/mcu/service/dhl/database/Tgt_Cnf b/mcu/service/dhl/database/Tgt_Cnf
new file mode 100755
index 0000000..6b027f3
--- /dev/null
+++ b/mcu/service/dhl/database/Tgt_Cnf
@@ -0,0 +1,29 @@
+// Size
+Char_Size 1; // size of char
+Short_Size 2; // size of short
+Int_Size 4; // size of int
+Long_Size 4; // size of long
+LLong_Size 8; // size of long long
+Float_Size 4; // size of float
+Double_Size 8; // size of double
+LDouble_Size 8; // size of long double
+Pointer_Size 4; // size of pointer
+
+// Alignment
+Char_Align 1; // alignment of char
+Short_Align 2; // alignment of short
+Int_Align 4; // alignment of int
+Long_Align 4; // alignment of long
+LLong_Align 4; // alignment of long long
+Float_Align 4; // alignment of float
+Double_Align 4; // alignment of double
+LDouble_Align 4; // alignment of long double
+Pointer_Align 4; // alignment of pointer
+Struct_Align 4; // alignment of struct
+
+// Enum
+Enum_Default_Use False;// True or False
+Enum_Default_Type Int; // Legal types are Char, UChar, Short, UShort, Int
+
+// Endian
+Endian Little; // Little or Big
diff --git a/mcu/service/dhl/database/Tgt_Cnf_GCC b/mcu/service/dhl/database/Tgt_Cnf_GCC
new file mode 100755
index 0000000..323eac1
--- /dev/null
+++ b/mcu/service/dhl/database/Tgt_Cnf_GCC
@@ -0,0 +1,29 @@
+// Size
+Char_Size 1; // size of char
+Short_Size 2; // size of short
+Int_Size 4; // size of int
+Long_Size 4; // size of long
+LLong_Size 8; // size of long long
+Float_Size 4; // size of float
+Double_Size 8; // size of double
+LDouble_Size 8; // size of long double
+Pointer_Size 4; // size of pointer
+
+// Alignment
+Char_Align 1; // alignment of char
+Short_Align 2; // alignment of short
+Int_Align 4; // alignment of int
+Long_Align 4; // alignment of long
+LLong_Align 8; // alignment of long long
+Float_Align 4; // alignment of float
+Double_Align 8; // alignment of double
+LDouble_Align 8; // alignment of long double
+Pointer_Align 4; // alignment of pointer
+Struct_Align 8; // alignment of struct
+
+// Enum
+Enum_Default_Use False;// True or False
+Enum_Default_Type Int; // Legal types are Char, UChar, Short, UShort, Int
+
+// Endian
+Endian Little; // Little or Big
diff --git a/mcu/service/dhl/database/Tgt_Cnf_RVCT b/mcu/service/dhl/database/Tgt_Cnf_RVCT
new file mode 100755
index 0000000..323eac1
--- /dev/null
+++ b/mcu/service/dhl/database/Tgt_Cnf_RVCT
@@ -0,0 +1,29 @@
+// Size
+Char_Size 1; // size of char
+Short_Size 2; // size of short
+Int_Size 4; // size of int
+Long_Size 4; // size of long
+LLong_Size 8; // size of long long
+Float_Size 4; // size of float
+Double_Size 8; // size of double
+LDouble_Size 8; // size of long double
+Pointer_Size 4; // size of pointer
+
+// Alignment
+Char_Align 1; // alignment of char
+Short_Align 2; // alignment of short
+Int_Align 4; // alignment of int
+Long_Align 4; // alignment of long
+LLong_Align 8; // alignment of long long
+Float_Align 4; // alignment of float
+Double_Align 8; // alignment of double
+LDouble_Align 8; // alignment of long double
+Pointer_Align 4; // alignment of pointer
+Struct_Align 8; // alignment of struct
+
+// Enum
+Enum_Default_Use False;// True or False
+Enum_Default_Type Int; // Legal types are Char, UChar, Short, UShort, Int
+
+// Endian
+Endian Little; // Little or Big
diff --git a/mcu/service/dhl/database/access_control/access_oa.ini b/mcu/service/dhl/database/access_control/access_oa.ini
new file mode 100755
index 0000000..dad326f
--- /dev/null
+++ b/mcu/service/dhl/database/access_control/access_oa.ini
@@ -0,0 +1,145 @@
+[trace]
+DRV
+HISR
+MIDDLEWARE
+MODEM_2G3G
+SRV
+MODEM_4G
+[l1 trace]
+@others
+data_path
+data_path_detail
+ephy
+fdd_hspa
+generic
+gsm_gprs_edge
+l1_audio
+lte
+mml1
+qmu_bm
+sleep_mode
+wcdma
+[primitive]
+ADR
+AS_LOG
+ATCI
+AUDIO
+BMC
+CC
+CCCI
+CISS
+CLDMACORE
+CMUX
+CSCE
+CSE
+CSM
+CSR
+DBME
+DM_CSCE
+DM_MEME
+DM_RRCE
+DRIVER
+DRLC
+EAS_GAS
+EL1
+EL2
+EM
+EMM
+ERRC
+ESM
+ETC
+EVAL
+EXT_MODEM
+FA
+FS
+FT
+GEMINI_GAS
+GEMINI_UAS
+GPS
+HAL_L1
+HIF_MW
+HIF_SVC
+L1
+L1HISR
+L1_EXT
+L2R
+L4C
+L4_PUBLIC
+LAPDM
+LBS
+LL1
+LLC
+LPP
+MAC
+MBCI
+MED
+MEME
+MEUT
+MLL1
+MM
+MPAL
+MRS
+NDIS
+NVRAM
+NWSEL
+P2P
+PDCP
+PHB
+PPP
+PROXY
+PS
+PS_PUBLIC_SUPL
+PS_PUBLIC_VT
+RABM
+RAC
+RATCM
+RATDM
+RAT_TCM
+RCS
+REASM
+RLC
+RLP
+RMPC
+RRCE
+RRM_COMMON
+RRM_MPAL_MM
+SEQ
+SIBE
+SIM_PS
+SIM_PUBLIC
+SLCE
+SM
+SMS
+SMSAL
+SMU
+SND
+SUPL
+SYSDEBUG
+T30
+TCM
+TDT
+TFTLIB
+TL1DATA_AST
+TL1FTA_AST
+TL1HISR_AST
+TST
+UAGPS_CP
+UAS_GAS
+UDPS
+UEM
+UL1
+UL1C
+UL1DATA
+UL1HISR
+UL1TST
+UMAC
+UPCM
+UPS
+UPS_PUBLIC
+URLC
+URR
+USIME
+VMMI
+VT
+WMT
+
diff --git a/mcu/service/dhl/database/access_control/group.ini b/mcu/service/dhl/database/access_control/group.ini
new file mode 100755
index 0000000..66615e5
--- /dev/null
+++ b/mcu/service/dhl/database/access_control/group.ini
@@ -0,0 +1,6554 @@
+[trace]
+DRV MOD_DRV_DUMMY_BEGIN
+DRV MOD_DUMMY_CMUX
+DRV MOD_CMUX
+DRV MOD_CMUXUH
+DRV MOD_UPS_HIGH
+DRV MOD_DUMMY_IDLER
+DRV MOD_IDLER
+DRV MOD_DUMMY_BMT
+DRV MOD_BMT
+DRV MOD_DUMMY_USB
+DRV MOD_USB
+DRV MOD_DUMMY_L1SP
+DRV MOD_L1SP
+DRV MOD_DUMMY_L1AUDIO_SPH_SRV
+DRV MOD_L1AUDIO_SPH_SRV
+DRV MOD_DUMMY_MED
+DRV MOD_MED
+DRV MOD_AUD
+DRV MOD_DUMMY_IDLE
+DRV MOD_IDLE
+DRV MOD_DUMMY_SDIOCORE
+DRV MOD_SDIOCORE
+DRV MOD_EINT_HISR
+DRV MOD_UART1_HISR
+DRV MOD_UART2_HISR
+DRV MOD_UART3_HISR
+DRV MOD_RTC_HISR
+DRV MOD_MSDC_HISR
+DRV MOD_DP_ENGINE
+DRV MOD_PPP_HW
+DRV MOD_SIM_DRV
+DRV MOD_PMU
+DRV MOD_PMIC
+DRV MOD_LPWR
+DRV MOD_F32K
+DRV MOD_PWM
+DRV MOD_UART
+DRV MOD_DRV_DBG
+DRV MOD_TTY
+DRV MOD_DSPFM
+DRV MOD_DEVDRV
+DRV MOD_EMI
+DRV MOD_VISUAL_HISR
+HISR MOD_TRCPRCHISR
+HISR MOD_LGAHISR
+HISR MOD_TIMER_HISR
+HISR MOD_BCHISR
+HISR MOD_L1DMA_HISR
+HISR MOD_MALMO_HISR
+HISR MOD_IRDEBUG_HISR
+HISR MOD_UMTS_HISR
+HISR MOD_UL1_LOW_HISR
+HISR MOD_UUL2HISR
+HISR MOD_UL2ACCRXHISR
+HISR MOD_UL2BCP_HISR
+HISR MOD_TL1HISR
+HISR MOD_HIF_CB_HISR
+HISR MOD_LTE_DSP_TIMER_HISR
+HISR MOD_ERT_HISR
+HISR MOD_UL2ACCFINT_HISR
+HISR MOD_DRV_HISR
+HISR MOD_L1SPHISR
+HISR MOD_HIF_USB_HISR
+HISR MOD_HIF_SDIO_HISR
+HISR MOD_HIF_CLDMA_HISR
+HISR MOD_HIF_CCIFRX_HISR
+HISR MOD_HIF_CCIFTX_HISR
+HISR MOD_GPT_DEBUG_HISR
+HISR MOD_LISR2HISR_WTIMER
+HISR MOD_LISR2HISR_RTR_SLT
+HISR MOD_LISR2HISR_AI
+HISR MOD_LISR2HISR_PI
+HISR MOD_LISR2HISR_LTE2MD_PEER_WAKEUP
+HISR MOD_LISR2HISR_DSP_IRQ_EVENT
+HISR MOD_LISR2HISR_DSP_TIMER
+HISR MOD_L2_LTE_COPRO_HISR
+HISR MOD_L2_LMAC_RAR_HISR
+HISR MOD_L2_LMAC_EAR_HISR
+HISR MOD_LISR2HISR_SEARCHER
+HISR MOD_LISR2HISR_TFCI_0
+HISR MOD_LISR2HISR_TFCI_1
+HISR MOD_LISR2HISR_RXBRP_CC0
+HISR MOD_LISR2HISR_RXBRP_CC1
+HISR MOD_LISR2HISR_RXBRP_CCB
+HISR MOD_LISR2HISR_TDMA
+HISR MOD_LISR2HISR_CTIRQ1
+HISR MOD_LISR2HISR_CTIRQ2
+HISR MOD_LISR2HISR_RXBRP_HS
+HISR MOD_LISR2HISR_RXADC_OVLD_ANT0
+HISR MOD_LISR2HISR_RXADC_OVLD_ANT1
+HISR MOD_LISR2HISR_SW_LISR2
+HISR MOD_LISR2HISR_SW_LISR1
+HISR MOD_LISR2HISR_SW_LISR3
+HISR MOD_LISR2HISR_TOPSM
+HISR MOD_LISR2HISR_OSTIMER_ARM
+HISR MOD_LISR2HISR_MODEM2G_TOPSM
+HISR MOD_LISR2HISR_DSP2CPU
+HISR MOD_LISR2HISR_MDGDMA2
+HISR MOD_LISR2HISR_DEINT0
+HISR MOD_LISR2HISR_DEINT1
+HISR MOD_LISR2HISR_DEINT2
+HISR MOD_LISR2HISR_DEINT3
+HISR MOD_LISR2HISR_EINT
+HISR MOD_DCC_HISR
+HISR MOD_LISR2HISR_EMIMPU
+MIDDLEWARE MOD_MW_DUMMY_BEGIN
+MIDDLEWARE MOD_DUMMY_PPP
+MIDDLEWARE MOD_PPP
+MIDDLEWARE MOD_DUMMY_PFC_SW
+MIDDLEWARE MOD_PFC_SW
+MIDDLEWARE MOD_DUMMY_UPS
+MIDDLEWARE MOD_UPS
+MIDDLEWARE MOD_DUMMY_SYSDEBUG
+MIDDLEWARE MOD_SYSDEBUG
+MIDDLEWARE MOD_DUMMY_VT
+MIDDLEWARE MOD_VT
+MIDDLEWARE MOD_DUMMY_FT
+MIDDLEWARE MOD_FT
+MIDDLEWARE MOD_DUMMY_FTC
+MIDDLEWARE MOD_FTC
+MIDDLEWARE MOD_DUMMY_LBS
+MIDDLEWARE MOD_GPS
+MIDDLEWARE MOD_LBS
+MIDDLEWARE MOD_DUMMY_IPCORE
+MIDDLEWARE MOD_RATDM
+MIDDLEWARE MOD_IPCORE
+MIDDLEWARE MOD_LTM
+MIDDLEWARE MOD_UPCM
+MIDDLEWARE MOD_TFT_PF
+MIDDLEWARE MOD_LTM_SIM
+MIDDLEWARE MOD_DUMMY_ETHERCORE
+MIDDLEWARE MOD_ETHERCORE
+MIDDLEWARE MOD_DUMMY_USBCLASS
+MIDDLEWARE MOD_USBCLASS
+MIDDLEWARE MOD_ACM
+MIDDLEWARE MOD_RNDIS
+MIDDLEWARE MOD_MBIM
+MIDDLEWARE MOD_ECM
+MIDDLEWARE MOD_DUMMY_USBCORE
+MIDDLEWARE MOD_USBCORE
+MIDDLEWARE MOD_DUMMY_NMU
+MIDDLEWARE MOD_NMU
+MIDDLEWARE MOD_DHCP4C
+MIDDLEWARE MOD_NDPC
+MIDDLEWARE MOD_CLDMACORE
+MIDDLEWARE MOD_CLDMAIPC
+MIDDLEWARE MOD_CCIFCORE
+MIDDLEWARE MOD_CCCI_HISR
+MIDDLEWARE MOD_UARTCORE
+MIDDLEWARE MOD_DUMMY_USBMSD
+MIDDLEWARE MOD_USBMSD
+MIDDLEWARE MOD_DUMMY_CCCIDEV
+MIDDLEWARE MOD_CCCIDEV
+MIDDLEWARE MOD_CCMNI
+MIDDLEWARE MOD_CCCITTY
+MIDDLEWARE MOD_DUMMY_CCCIITDEV1
+MIDDLEWARE MOD_CCCIITDEV1
+MIDDLEWARE MOD_DUMMY_CCCIITDEV2
+MIDDLEWARE MOD_CCCIITDEV2
+MIDDLEWARE MOD_DUMMY_CCCIITDEV3
+MIDDLEWARE MOD_CCCIITDEV3
+MIDDLEWARE MOD_DUMMY_CCCIITDEV4
+MIDDLEWARE MOD_CCCIITDEV4
+MIDDLEWARE MOD_DUMMY_CCCIITFS
+MIDDLEWARE MOD_CCCIITFS
+MIDDLEWARE MOD_DUMMY_TTY_UT
+MIDDLEWARE MOD_TTY_UT
+MIDDLEWARE MOD_TTY_UT99
+MIDDLEWARE MOD_DUMMY_TTY_UT2
+MIDDLEWARE MOD_TTY_UT2
+MIDDLEWARE MOD_DUMMY_TTY_UT3
+MIDDLEWARE MOD_TTY_UT3
+MIDDLEWARE MOD_DUMMY_EXCP_TTYUT
+MIDDLEWARE MOD_EXCP_TTYUT
+MIDDLEWARE MOD_DUMMY_SYS_TTY
+MIDDLEWARE MOD_SYS_TEST
+MIDDLEWARE MOD_BTT
+MIDDLEWARE MOD_AOMGR
+MIDDLEWARE MOD_SLT_NL
+MIDDLEWARE MOD_SLT
+MIDDLEWARE MOD_DUMMY_USBIDLE
+MIDDLEWARE MOD_USBIDLE
+MIDDLEWARE MOD_DUMMY_LTECSR
+MIDDLEWARE MOD_LTECSR
+MIDDLEWARE MOD_DUMMY_USB20QMU_SIM
+MIDDLEWARE MOD_USB20QMU_SIM
+MODEM_2G3G MOD_MODEM_DUMMY_BEGIN
+MODEM_2G3G MOD_DUMMY_RRLP
+MODEM_2G3G MOD_RRLP
+MODEM_2G3G MOD_DUMMY_RATCM
+MODEM_2G3G MOD_RATCM
+MODEM_2G3G MOD_DUMMY_URR
+MODEM_2G3G MOD_MEME
+MODEM_2G3G MOD_CSE
+MODEM_2G3G MOD_CSCE
+MODEM_2G3G MOD_SIBE
+MODEM_2G3G MOD_USIME
+MODEM_2G3G MOD_RRCE
+MODEM_2G3G MOD_SLCE
+MODEM_2G3G MOD_ADR
+MODEM_2G3G MOD_URR
+MODEM_2G3G MOD_DB
+MODEM_2G3G MOD_DUMMY_UL2
+MODEM_2G3G MOD_URLC
+MODEM_2G3G MOD_UMAC
+MODEM_2G3G MOD_UL2
+MODEM_2G3G MOD_SEQ
+MODEM_2G3G MOD_DUMMY_UL2D
+MODEM_2G3G MOD_DRLC
+MODEM_2G3G MOD_BMC
+MODEM_2G3G MOD_PDCP
+MODEM_2G3G MOD_RABM
+MODEM_2G3G MOD_CSR
+MODEM_2G3G MOD_UL2D
+MODEM_2G3G MOD_DUMMY_UL1
+MODEM_2G3G MOD_UL1
+MODEM_2G3G MOD_DUMMY_MM
+MODEM_2G3G MOD_MM
+MODEM_2G3G MOD_DUMMY_CC
+MODEM_2G3G MOD_CC
+MODEM_2G3G MOD_DUMMY_CISS
+MODEM_2G3G MOD_CISS
+MODEM_2G3G MOD_DUMMY_SMS
+MODEM_2G3G MOD_SMS
+MODEM_2G3G MOD_DUMMY_SIM
+MODEM_2G3G MOD_SIM
+MODEM_2G3G MOD_DUMMY_L4
+MODEM_2G3G MOD_ATCI
+MODEM_2G3G MOD_MBCI
+MODEM_2G3G MOD_L4C
+MODEM_2G3G MOD_RAT_TCM
+MODEM_2G3G MOD_TCM
+MODEM_2G3G MOD_SMSAL
+MODEM_2G3G MOD_UEM
+MODEM_2G3G MOD_RAC
+MODEM_2G3G MOD_SMU
+MODEM_2G3G MOD_USAT
+MODEM_2G3G MOD_CSM
+MODEM_2G3G MOD_ENG
+MODEM_2G3G MOD_PHB
+MODEM_2G3G MOD_TFTLIB
+MODEM_2G3G MOD_DUMMY_RR
+MODEM_2G3G MOD_RRM
+MODEM_2G3G MOD_GAS
+MODEM_2G3G MOD_AS
+MODEM_2G3G MOD_RMPC
+MODEM_2G3G MOD_RLC
+MODEM_2G3G MOD_MAC
+MODEM_2G3G MOD_LAPDM
+MODEM_2G3G MOD_MPAL
+MODEM_2G3G MOD_DUMMY_REASM
+MODEM_2G3G MOD_REASM
+MODEM_2G3G MOD_DUMMY_SNDCP
+MODEM_2G3G MOD_SNDCP
+MODEM_2G3G MOD_DUMMY_SM
+MODEM_2G3G MOD_SM
+MODEM_2G3G MOD_DUMMY_LLC
+MODEM_2G3G MOD_LLC
+MODEM_2G3G MOD_DUMMY_DATA
+MODEM_2G3G MOD_TDT
+MODEM_2G3G MOD_RLP
+MODEM_2G3G MOD_L2R
+MODEM_2G3G MOD_T30
+MODEM_2G3G MOD_FA
+MODEM_2G3G MOD_DUMMY_L1
+MODEM_2G3G MOD_L1
+MODEM_2G3G MOD_DUMMY_EXT_MODEM
+MODEM_2G3G MOD_EXT_MODEM
+MODEM_2G3G MOD_DUMMY_UL1TST
+MODEM_2G3G MOD_UL1TST
+MODEM_2G3G MOD_DUMMY_ULCS
+MODEM_2G3G MOD_UAGPS
+MODEM_2G3G MOD_UAGPS_CP
+MODEM_2G3G MOD_NWSEL
+MODEM_2G3G MOD_UL1HISR
+MODEM_2G3G MOD_RFC2507
+MODEM_4G MOD_MODEM_4G_DUMMY_BEGIN
+MODEM_4G MOD_DUMMY_EUTEST
+MODEM_4G MOD_EUTEST
+MODEM_4G MOD_DUMMY_ETSTM
+MODEM_4G MOD_ETSTM
+MODEM_4G MOD_DUMMY_ERT
+MODEM_4G MOD_ERLCUL
+MODEM_4G MOD_EMAC
+MODEM_4G MOD_EL1TX
+MODEM_4G MOD_LTE_TIMER
+MODEM_4G MOD_DUMMY_EL1
+MODEM_4G MOD_EL1
+MODEM_4G MOD_DUMMY_EL2
+MODEM_4G MOD_ERLCDL
+MODEM_4G MOD_EPDCP
+MODEM_4G MOD_EL2TASK
+MODEM_4G MOD_ROHC
+MODEM_4G MOD_EL2TASK_EMAC
+MODEM_4G MOD_DUMMY_MRS
+MODEM_4G MOD_MRS
+MODEM_4G MOD_ERRC
+MODEM_4G MOD_ERRC_EVTH
+MODEM_4G MOD_ERRC_CEL
+MODEM_4G MOD_ERRC_CHM
+MODEM_4G MOD_ERRC_CONN
+MODEM_4G MOD_ERRC_MOB
+MODEM_4G MOD_ERRC_RCM
+MODEM_4G MOD_ERRC_SPV
+MODEM_4G MOD_ERRC_SYS
+MODEM_4G MOD_ERRC_LCEL
+MODEM_4G MOD_ERRC_LSYS
+MODEM_4G MOD_EAS
+MODEM_4G MOD_LCEL
+MODEM_4G MOD_EMM
+MODEM_4G MOD_EMM_CALL
+MODEM_4G MOD_EMM_CMNPROC
+MODEM_4G MOD_EMM_CONN
+MODEM_4G MOD_EMM_ERRCIF
+MODEM_4G MOD_EMM_ESMIF
+MODEM_4G MOD_EMM_ETCIF
+MODEM_4G MOD_EMM_EVALIF
+MODEM_4G MOD_EMM_EVTCTRL
+MODEM_4G MOD_EMM_MMIF
+MODEM_4G MOD_EMM_NASMSG
+MODEM_4G MOD_EMM_PLMNSEL
+MODEM_4G MOD_EMM_RATBAND
+MODEM_4G MOD_EMM_RATCHG
+MODEM_4G MOD_EMM_REG
+MODEM_4G MOD_EMM_SEC
+MODEM_4G MOD_EMM_SV
+MODEM_4G MOD_EMM_TIMERMNG
+MODEM_4G MOD_ESM
+MODEM_4G MOD_EVAL
+MODEM_4G MOD_ETC
+MODEM_4G MOD_MLL1
+MODEM_4G MOD_DUMMY_LPP
+MODEM_4G MOD_LPP
+MODEM_4G MOD_EMM_NMSRV
+MODEM_4G MOD_EMM_OPIDSRV
+MODEM_4G MOD_EMM_USIMSRV
+MODEM_4G MOD_EMM_NVMSRV
+SRV MOD_NIL
+SRV MOD_DUMMY_NIL
+SRV MOD_DUMMY_NVRAM
+SRV MOD_NVRAM
+SRV MOD_DUMMY_DHL
+SRV MOD_DHL
+SRV MOD_TST
+SRV MOD_DUMMY_DHL_READER
+SRV MOD_DHL_READER
+SRV MOD_TST_READER
+SRV MOD_DUMMY_TST_FTRANS
+SRV MOD_TST_FTRANS
+SRV MOD_DUMMY_DHLRT
+SRV MOD_DHLRT
+SRV MOD_DUMMY_FS
+SRV MOD_FS
+SRV MOD_DUMMY_CCCISRV
+SRV MOD_CCCISRV
+SRV MOD_CCCIFS
+SRV MOD_CCCIIPC
+SRV MOD_CCCIRPC
+SRV MOD_CCCIMSG
+SRV MOD_DUMMY_CCCI_IT_CTRL
+SRV MOD_CCCI_IT_CTRL
+SRV MOD_DUMMY_CCCI_IT_CTRL_TASK1
+SRV MOD_CCCI_IT_CTRL_TASK1
+SRV MOD_DUMMY_CCCI_IT_CTRL_TASK2
+SRV MOD_CCCI_IT_CTRL_TASK2
+SRV MOD_DUMMY_CCCI_IT_CTRL_TASK3
+SRV MOD_CCCI_IT_CTRL_TASK3
+SRV MOD_DUMMY_CCCI_IT_CTRL_TASK4
+SRV MOD_CCCI_IT_CTRL_TASK4
+SRV MOD_DUMMY_QBM
+SRV MOD_QBM
+SRV MOD_DUMMY_MDDBG
+SRV MOD_MDDBG
+SRV MOD_DUMMY_DHLSPR
+SRV MOD_DHL_SP_READER
+SRV MOD_TIMER
+SRV MOD_SYSTEM
+SRV MOD_EVENT_INFO
+SRV MOD_FLC
+SRV MOD_HMU
+SRV MOD_SST_COMMON
+SRV MOD_EX_LOG
+SRV MOD_CCCI
+[l1 trace]
+@others L1C_GPRS3
+data_path NAS_DATA_PATH
+data_path_detail NAS_DATA_PATH_DETAIL
+ephy EPHY_RF
+fdd_hspa UL1C_PRI4
+fdd_hspa UL1D_HSPA_PRI
+fdd_hspa UL1D_HSPA_SEC
+fdd_hspa UL1D_HSPA_THIRD
+fdd_hspa UL1D_PLUS_PRI
+generic DHL_L1
+generic HIF_DRV
+generic HIF_MW
+generic HIF_SRV
+gsm_gprs_edge CSD
+gsm_gprs_edge CSD_PUBLIC
+gsm_gprs_edge L1C_EGPRS
+gsm_gprs_edge L1C_EGPRS_PUBLIC
+gsm_gprs_edge L1C_GPRS
+gsm_gprs_edge L1C_GPRS_PUBLIC
+gsm_gprs_edge L1C_GPRS2
+gsm_gprs_edge L1C_GSM
+gsm_gprs_edge L1C_GSM_PUBLIC
+gsm_gprs_edge L1C_GSM2
+gsm_gprs_edge L1C_GSM2_PUBLIC
+gsm_gprs_edge L1DM
+gsm_gprs_edge L1DM_PUBLIC
+gsm_gprs_edge L1D_3RD
+gsm_gprs_edge L1D_EDGE
+gsm_gprs_edge L1D_PRI
+gsm_gprs_edge L1D_SEC
+gsm_gprs_edge L1IAMR
+gsm_gprs_edge L1I_EGPRS
+gsm_gprs_edge L1I_EGPRS_PUBLIC
+gsm_gprs_edge L1I_GPRS
+gsm_gprs_edge L1I_GPRS_PUBLIC
+gsm_gprs_edge L1I_GSM
+gsm_gprs_edge L1I_GSM_PUBLIC
+gsm_gprs_edge L1SC
+gsm_gprs_edge L1SC_PUBLIC
+gsm_gprs_edge L1TAMR
+gsm_gprs_edge L1_AFC
+l1_audio L1Audio
+lte EL1_DRV_1
+lte EL1_IRT_1
+lte EL1_MAIN
+lte EL1_PHS_1
+lte EL1_PHS_2
+lte EL1_PHS_RTB
+lte EL1_TX_1
+lte L2_LTE_COPRO_DRV
+lte_l2 EDATA_PATH
+lte_l2 EMAC
+lte_l2 EPDCP
+lte_l2 ERLCDL
+lte_l2 ERLCUL
+lte_l2 RAL
+lte_l2 ROHC
+lte_l2_detail EDATA_PATH_DETAIL
+lte_l2_detail EMAC_DETAIL
+lte_l2_detail EPDCP_DETAIL
+lte_l2_detail ERLCDL_DETAIL
+lte_l2_detail ERLCUL_DETAIL
+lte_l2_detail RAL_DETAIL
+lte_l2_detail ROHC_DETAIL
+mml1 MML1_RF
+qmu_bm QMU_BM
+sleep_mode DCXO_DIV_1
+sleep_mode EL1SM_1
+sleep_mode L1SM_1
+sleep_mode MD_TOPSM_1
+sleep_mode MODEM_TOPSM_1
+sleep_mode OSTD_1
+sleep_mode SleepDrv_1
+sleep_mode UL1SM_1
+wcdma UL1C_PRI1
+wcdma UL1C_PRI2
+wcdma UL1C_PRI3
+wcdma UL1D_FIFTH
+wcdma UL1D_FOURTH
+wcdma UL1D_MLT_SET1
+wcdma UL1D_MLT_SET2
+wcdma UL1D_PRI
+wcdma UL1D_SEC
+wcdma UL1D_SEVENTH
+wcdma UL1D_SIXTH
+wcdma UL1D_THIRD
+wcdma UL1TST_PRI1
+wcdma UMAC
+wcdma URLC
+[primitive]
+ADR MSG_ID_RLC_TM_DATA_IND
+ADR MSG_ID_RLC_UM_DATA_IND
+ADR MSG_ID_RLC_AM_DATA_IND
+ADR MSG_ID_ADR_ADR_ACKNOWLEDGEMENT_IND
+ADR MSG_ID_RLC_AM_DATA_CNF
+ADR MSG_ID_ADR_CODE_END
+AS_LOG MSG_ID_UAS_EAS_ACTIVATE_ECELL_REQ
+AS_LOG MSG_ID_GAS_EAS_ACTIVATE_ECELL_REQ
+AS_LOG MSG_ID_EAS_GAS_GCELL_CHANGE_COMPLETE_IND
+AS_LOG MSG_ID_GAS_EAS_ECELL_CHANGE_COMPLETE_IND
+AS_LOG MSG_ID_EAS_UAS_ACTIVATE_UCELL_REQ
+AS_LOG MSG_ID_AS_LOG_CODE_END
+ATCI MSG_ID_ATCI_UT_RMMI_INPUT_STRING
+ATCI MSG_ID_ATCI_UT_RMMI_OUTPUT_STRING
+ATCI MSG_ID_ATCI_UT_RMMI_INPUT_EXPANDED_AT_STRING
+ATCI MSG_ID_ATCI_UT_CHECK_L4C_CONTEXT_INFO
+ATCI MSG_ID_ATCIDT_UART_TRANSFER_REQ
+ATCI MSG_ID_ATCIDT_UART_TRANSFER_CNF
+ATCI MSG_ID_ATCIDT_UART_TRANSFER_IND
+ATCI MSG_ID_ATCI_THERMAL_EVENT_REPORT_IND
+ATCI MSG_ID_ATCI_CODE_END
+AUDIO MSG_ID_AUDIO_CCCI_BEGIN
+AUDIO MSG_ID_AUDIO_A2M_CCCI
+AUDIO MSG_ID_AUDIO_M2A_CCCI
+AUDIO MSG_ID_AUDIO_AFE_REFRESH
+AUDIO MSG_ID_AUDIO_CTM_PROCESS
+AUDIO MSG_ID_AUDIO_CTM_RX_DATA
+AUDIO MSG_ID_AUDIO_STRM_PCM4WAY_DATA
+AUDIO MSG_ID_AUDIO_STRM_BGSND_DATA_REQUEST
+AUDIO MSG_ID_AUDIO_STRM_VM_DATA_REQUEST
+AUDIO MSG_ID_AUDIO_VM_DATA_NOTIFICATION
+AUDIO MSG_ID_SPEECH_ON_ACK
+AUDIO MSG_ID_SPEECH_OFF_ACK
+AUDIO MSG_ID_STRM_SPEECH_DL_DATA_NOTIFY
+AUDIO MSG_ID_STRM_SPEECH_UL_DATA_REQUEST
+AUDIO MSG_ID_AUDIO_STRM_PCM_DATA_REQUEST
+AUDIO MSG_ID_AUDIO_STRM_PCM_REC_DATA_NOTIFICATION
+AUDIO MSG_ID_AUDIO_AMR_DATA_NOTIFICATION
+AUDIO MSG_ID_AUDIO_BGSND_DATA_REQUEST
+AUDIO MSG_ID_AUDIO_PCM_DATA_NOTIFICATION
+AUDIO MSG_ID_AUDIO_TONE_STOP_REQUEST
+AUDIO MSG_ID_AUDIO_TONE_DETECT
+AUDIO MSG_ID_AUDIO_VM_DATA_REQUEST
+AUDIO MSG_ID_AUDIO_WAV_DATA_REQUEST
+AUDIO MSG_ID_AUDIO_WAV_DATA_NOTIFICATION
+AUDIO MSG_ID_AUDIO_CCCI_TAIL
+AUDIO MSG_ID_AUDIO_M2M_BEGIN
+AUDIO MSG_ID_AUDIO_M2M_CCCI
+AUDIO MSG_ID_AUDIO_M2M_VOLTE_KT_BGSND_CLOSE
+AUDIO MSG_ID_AUDIO_M2M_VOLTE_TONE_BGSND_CLOSE
+AUDIO MSG_ID_AUDIO_M2M_VOLTE_DL_KT_PLAY
+AUDIO MSG_ID_AUDIO_M2M_VOLTE_DL_KT_STOP
+AUDIO MSG_ID_AUDIO_M2M_VOLTE_UL_KT_PLAY
+AUDIO MSG_ID_AUDIO_M2M_VOLTE_UL_KT_STOP
+AUDIO MSG_ID_AUDIO_M2M_TAIL
+BMC MSG_ID_RATCM_BMC_CBCH_REQ
+BMC MSG_ID_RATCM_BMC_UPDATE_REQ
+BMC MSG_ID_RATCM_BMC_CB_LOC_UPDATE_REQ
+BMC MSG_ID_RATCM_BMC_CB_MSG_REMOVAL_REQ
+BMC MSG_ID_CBMC_CONFIG_REQ
+BMC MSG_ID_RLC_BMC_DATA_IND
+BMC MSG_ID_BMC_CODE_END
+CC MSG_ID_MNCC_SETUP_REQ
+CC MSG_ID_MNCC_SETUP_RES
+CC MSG_ID_MNCC_REJ_REQ
+CC MSG_ID_MNCC_CALL_CONF_REQ
+CC MSG_ID_MNCC_ALERT_REQ
+CC MSG_ID_MNCC_NOTIFY_REQ
+CC MSG_ID_MNCC_DISC_REQ
+CC MSG_ID_MNCC_REL_REQ
+CC MSG_ID_MNCC_REL_COMP_REQ
+CC MSG_ID_MNCC_FACILITY_REQ
+CC MSG_ID_MNCC_START_DTMF_REQ
+CC MSG_ID_MNCC_STOP_DTMF_REQ
+CC MSG_ID_MNCC_MODIFY_REQ
+CC MSG_ID_MNCC_MODIFY_RES
+CC MSG_ID_MNCC_HOLD_REQ
+CC MSG_ID_MNCC_RETRIEVE_REQ
+CC MSG_ID_MNCC_ABORT_CALL_REQ
+CC MSG_ID_MNCC_USER_INFO_REQ
+CC MSG_ID_MNCC_CCBS_EST_RES
+CC MSG_ID_MNCC_CCBS_SETUP_REQ
+CC MSG_ID_MNCC_CCBS_REJ_REQ
+CC MSG_ID_MNCC_ACM_UPDATE_REQ
+CC MSG_ID_MNCC_SRVCC_TRANSFER_REQ
+CC MSG_ID_MMCC_DATA_IND
+CC MSG_ID_MMCC_EST_CNF
+CC MSG_ID_MMCC_EST_REJ
+CC MSG_ID_MMCC_EST_INTR
+CC MSG_ID_MMCC_EST_IND
+CC MSG_ID_MMCC_REL_IND
+CC MSG_ID_MMCC_ERR_IND
+CC MSG_ID_MMCC_PROMPT_IND
+CC MSG_ID_MMCC_REEST_CNF
+CC MSG_ID_MMCC_REEST_START_IND
+CC MSG_ID_MMCC_SYNC_IND
+CC MSG_ID_MMCC_RAT_IND
+CC MSG_ID_MMCC_PLMN_INFO_IND
+CC MSG_ID_MMCC_SRVCC_HO_IND
+CC MSG_ID_MMCC_SRVCC_EST_CNF
+CC MSG_ID_MMCC_SRVCC_EST_REJ
+CC MSG_ID_CC_TIMER_EXPIRY
+CC MSG_ID_CC_CODE_END
+CCCI MSG_ID_IPC_INVALID_TYPE
+CCCI MSG_ID_IPC_L4C_INVALID
+CCCI MSG_ID_MMI_AGPS_BEGIN_NULL
+CCCI MSG_ID_MMI_SS_MTLR_BEGIN_IND_NULL
+CCCI MSG_ID_MMI_SS_MTLR_BEGIN_RES_REQ_NULL
+CCCI MSG_ID_MMI_SS_MTLR_BEGIN_RES_RSP_NULL
+CCCI MSG_ID_MMI_SS_AERQ_BEGIN_IND_NULL
+CCCI MSG_ID_MMI_SS_AERQ_BEGIN_RES_REQ_NULL
+CCCI MSG_ID_MMI_SS_AERQ_BEGIN_RES_RSP_NULL
+CCCI MSG_ID_MMI_SS_AERP_BEGIN_REQ_NULL
+CCCI MSG_ID_MMI_SS_AERP_BEGIN_RSP_NULL
+CCCI MSG_ID_MMI_SS_AERP_END_REQ_NULL
+CCCI MSG_ID_MMI_SS_AERP_END_RSP_NULL
+CCCI MSG_ID_MMI_SS_AECL_BEGIN_IND_NULL
+CCCI MSG_ID_MMI_SS_AECL_BEGIN_RES_REQ_NULL
+CCCI MSG_ID_MMI_SS_AECL_BEGIN_RES_RSP_NULL
+CCCI MSG_ID_MMI_SS_MOLR_BEGIN_REQ_NULL
+CCCI MSG_ID_MMI_SS_MOLR_BEGIN_RSP_NULL
+CCCI MSG_ID_MMI_SS_MOLR_END_REQ_NULL
+CCCI MSG_ID_MMI_SS_MOLR_END_RSP_NULL
+CCCI MSG_ID_MMI_AGPS_ENABLE_DISABLE_REQ_NULL
+CCCI MSG_ID_MMI_AGPS_ENABLE_DISABLE_RSP_NULL
+CCCI MSG_ID_MMI_AGPS_KEY_UPDATE_REQ_NULL
+CCCI MSG_ID_MMI_AGPS_KEY_UPDATE_RSP_NULL
+CCCI MSG_ID_MMI_AGPS_NEW_KEY_NEEDED_IND_NULL
+CCCI MSG_ID_MMI_AGPS_RESET_POSITIONING_IND_NULL
+CCCI MSG_ID_MMI_AGPS_CP_START_IND_NULL
+CCCI MSG_ID_MMI_AGPS_CP_END_IND_NULL
+CCCI MSG_ID_MMI_AGPS_CP_ABORT_REQ_NULL
+CCCI MSG_ID_MMI_AGPS_CP_ABORT_RSP_NULL
+CCCI MSG_ID_MMI_AGPS_END_NULL
+CCCI MSG_ID_MMI_NBR_BEGIN_NULL
+CCCI MSG_ID_L4C_NBR_CELL_INFO_REG_REQ_NULL
+CCCI MSG_ID_L4C_NBR_CELL_INFO_REG_CNF_NULL
+CCCI MSG_ID_L4C_NBR_CELL_INFO_DEREG_REQ_NULL
+CCCI MSG_ID_L4C_NBR_CELL_INFO_DEREG_CNF_NULL
+CCCI MSG_ID_L4C_NBR_CELL_INFO_IND_NULL
+CCCI MSG_ID_MMI_NBR_END_NULL
+CCCI MSG_ID_AGPS_AUTO_TEST_IND_NULL
+CCCI MSG_ID_AGPS_CP_UP_STATUS_IND_NULL
+CCCI MSG_ID_AGPS_MOLR_START_IND_NULL
+CCCI MSG_ID_AGPS_MOLR_STOP_IND_NULL
+CCCI MSG_ID_AGPS_MTLR_RESPONSE_IND_NULL
+CCCI MSG_ID_DHCP_MBCI_IP_CONFIG_REQ
+CCCI MSG_ID_DHCP_MBCI_IP_CONFIG_RSP
+CCCI MSG_ID_DHCP_MBCI_IP_CONFIG_IND
+CCCI MSG_ID_L4C_RF_INFO_IND
+CCCI MSG_ID_L4C_RF_INFO_REQ
+CCCI MSG_ID_IPC_L4C_END
+CCCI MSG_ID_IPC_EL1_INVALID
+CCCI MSG_ID_EL1_LTE_TX_ALLOW_IND
+CCCI MSG_ID_EL1_WIFIBT_OPER_DEFAULT_PARAM_IND
+CCCI MSG_ID_EL1_WIFIBT_OPER_FREQ_IND
+CCCI MSG_ID_EL1_WIFIBT_FREQ_IDX_TABLE_IND
+CCCI MSG_ID_EL1_WIFIBT_PROFILE_IND
+CCCI MSG_ID_EL1_LTE_DEFAULT_PARAM_IND
+CCCI MSG_ID_EL1_LTE_OPER_FREQ_PARAM_IND
+CCCI MSG_ID_EL1_WIFI_MAX_PWR_IND
+CCCI MSG_ID_EL1_LTE_TX_IND
+CCCI MSG_ID_IPC_EL1_END
+CCCI MSG_ID_IPC_END
+CISS MSG_ID_MNSS_BEGIN_REQ
+CISS MSG_ID_MNSS_FAC_REQ
+CISS MSG_ID_MNSS_END_REQ
+CISS MSG_ID_MMSS_DATA_IND
+CISS MSG_ID_MMSS_EST_CNF
+CISS MSG_ID_MMSS_EST_REJ
+CISS MSG_ID_MMSS_EST_INTR
+CISS MSG_ID_MMSS_EST_IND
+CISS MSG_ID_MMSS_REL_IND
+CISS MSG_ID_MMSS_ERR_IND
+CISS MSG_ID_MMSS_RAT_IND
+CISS MSG_ID_CISS_EVAL_DATA_CNF
+CISS MSG_ID_CISS_EVAL_DATA_IND
+CISS MSG_ID_CISS_TIMER_EXPIRY
+CISS MSG_ID_CISS_CODE_END
+CLDMACORE MSG_ID_CLDMACORE_ISR_REQ
+CMUX MSG_ID_CMUX_STARTUP_REQ
+CMUX MSG_ID_CMUX_CLOSE_DOWN_REQ
+CMUX MSG_ID_CMUX_CLOSE_DOWN_IND
+CMUX MSG_ID_CMUX_DLC_CONNECT_IND
+CMUX MSG_ID_CMUX_DLC_DATA_READY_REQ
+CMUX MSG_ID_CMUX_DLC_READY_TO_RECEIVE_REQ
+CMUX MSG_ID_CMUX_READY_TO_SEND_IND
+CMUX MSG_ID_CMUX_UART_DATA_IND
+CMUX MSG_ID_CMUX_UART_DATA_REQ
+CMUX MSG_ID_CMUX_UART_CLOSE_DOWN_REQ
+CMUX MSG_ID_CMUX_UART_CLOSE_DOWN_CNF
+CMUX MSG_ID_CMUX_UT_UART_DATA_IND
+CMUX MSG_ID_CMUX_UT_UART_DATA_REQ
+CMUX MSG_ID_CMUX_VP_SET_BUFF_CONFIG_REQ
+CMUX MSG_ID_CMUX_VP_SET_BUFF_CONFIG_CNF
+CMUX MSG_ID_CMUX_VP_RESET_BUFF_CONFIG_REQ
+CMUX MSG_ID_CMUX_VP_RESET_BUFF_CONFIG_CNF
+CMUX MSG_ID_CMUX_FLC_DATA_RESUME_IND
+CMUX MSG_ID_CMUX_FLC_DATA_SUSPEND_IND
+CSCE MSG_ID_URR_SLCE_SET_ACTIVE_RAT_CNF
+CSCE MSG_ID_CSCE_SLCE_INITIALISE_CNF
+CSCE MSG_ID_CSCE_SLCE_RF_ON_CNF
+CSCE MSG_ID_CSCE_SLCE_RF_OFF_CNF
+CSCE MSG_ID_CSCE_RRCE_MOVE_TO_IDLE_IND
+CSCE MSG_ID_CSCE_RRCE_MOVE_TO_CELL_DCH_IND
+CSCE MSG_ID_CSCE_RRCE_MOVE_TO_CONNECTED_IND
+CSCE MSG_ID_CSCE_RRCE_MOVE_TO_INACTIVE_IND
+CSCE MSG_ID_CSCE_RRCE_BCCH_MODIFICATION_INFO_IND
+CSCE MSG_ID_CSCE_RRCE_RRC_CONNECTION_ESTABLISHMENT_IND
+CSCE MSG_ID_CSCE_RRCE_RELEASE_CHANNELS_CNF
+CSCE MSG_ID_CSCE_RRCE_OUT_OF_SERVICE_AREA_CNF
+CSCE MSG_ID_RRCE_CSCE_SIB_COLLECTION_RSP
+CSCE MSG_ID_CSCE_RRCE_STEADY_INACTIVE_IND
+CSCE MSG_ID_CSCE_RRCE_SMART_PAGING_STATUS_IND
+CSCE MSG_ID_RRCE_CSCE_DEDI_PRIO_INFO_IND
+CSCE MSG_ID_CSCE_CSE_CELL_SELECTION_STOP_CNF
+CSCE MSG_ID_CSCE_CSE_CELL_SELECTION_CNF
+CSCE MSG_ID_CSCE_CSE_PLMN_LIST_CNF
+CSCE MSG_ID_CSCE_CSE_FREQ_SCAN_SUSPEND_IND
+CSCE MSG_ID_CSCE_CSE_CSG_LIST_CNF
+CSCE MSG_ID_CSCE_CSE_CSG_AUTONOMOUS_SEARCH_SUSPEND_CNF
+CSCE MSG_ID_CSCE_CSE_CSG_AUTONOMOUS_SEARCH_CNF
+CSCE MSG_ID_MEME_CSE_CSG_AUTONOMOUS_SEARCH_INTRA_FREQ_CELL_IND
+CSCE MSG_ID_CSCE_CSE_EVALUATE_CSG_CELL_CNF
+CSCE MSG_ID_CSCE_CSE_EVALUATE_CSG_CELL_SUSPEND_CNF
+CSCE MSG_ID_CSCE_CSE_CGI_COLLECTION_CNF
+CSCE MSG_ID_CSCE_CSE_CGI_COLLECTION_STOP_CNF
+CSCE MSG_ID_SIBE_SIB_COLLECTION_CNF
+CSCE MSG_ID_SIBE_SIB_MONITORING_CNF
+CSCE MSG_ID_SIBE_SIB_MONITORING_ERROR_IND
+CSCE MSG_ID_CSCE_MEME_CELL_MEASUREMENT_RESULT_IND
+CSCE MSG_ID_CSCE_MEME_LTE_MEASUREMENT_IND
+CSCE MSG_ID_CSCE_MEME_CELL_REF_TIME_ANCHOR_IND
+CSCE MSG_ID_MEME_CSCE_MODIFY_CELL_LIST_IND
+CSCE MSG_ID_CSCE_MEME_REF_CELL_CHANGE_IND
+CSCE MSG_ID_CSCE_USIME_USIM_REMOVED_IND
+CSCE MSG_ID_CSCE_USIME_READ_NVRAM_CNF
+CSCE MSG_ID_USIME_SIM_FILE_CHANGE_IND
+CSCE MSG_ID_RATCM_CSCE_INIT_REQ
+CSCE MSG_ID_RATCM_CSCE_PLMN_SEARCH_REQ
+CSCE MSG_ID_RATCM_CSCE_PLMN_LIST_REQ
+CSCE MSG_ID_RATCM_CSCE_PLMN_LIST_STOP_REQ
+CSCE MSG_ID_RATCM_CSCE_ADD_FORBIDDEN_LA_REQ
+CSCE MSG_ID_RATCM_CSCE_DEL_FORBIDDEN_LA_REQ
+CSCE MSG_ID_RATCM_CSCE_EQ_PLMN_LIST_UPDATE_REQ
+CSCE MSG_ID_RATCM_CSCE_HPLMN_INFO_UPDATE_REQ
+CSCE MSG_ID_RATCM_CSCE_RRC_DEACTIVATE_REQ
+CSCE MSG_ID_RATCM_CSCE_SET_RAT_MODE_REQ
+CSCE MSG_ID_RATCM_CSCE_RFON_REQ
+CSCE MSG_ID_RATCM_CSCE_RFOFF_REQ
+CSCE MSG_ID_RATCM_CSCE_SET_IMEI_REQ
+CSCE MSG_ID_CMCSCE_EMERGENCY_CALL_STATUS_IND
+CSCE MSG_ID_RATCM_CSCE_CSG_LIST_REQ
+CSCE MSG_ID_RATCM_CSCE_CSG_LIST_STOP_REQ
+CSCE MSG_ID_RATCM_CSCE_UPDATE_WHITE_LIST_REQ
+CSCE MSG_ID_RATCM_UAS_RAT_CHANGE_REQ
+CSCE MSG_ID_RATCM_CSCE_EUTRAN_CAP_UPDATE_REQ
+CSCE MSG_ID_RATCM_CSCE_REGN_STATUS_UPDATE_REQ
+CSCE MSG_ID_CSCE_CODE_END
+CSE MSG_ID_CSE_SLCE_FREQ_SCAN_SUSPEND_IND
+CSE MSG_ID_CSE_MEME_CELL_MEASUREMENT_RESULT_IND
+CSE MSG_ID_CSCE_CSE_CELL_SELECTION_START_REQ
+CSE MSG_ID_CSCE_CSE_CELL_SELECTION_STOP_REQ
+CSE MSG_ID_CSCE_CSE_PLMN_LIST_START_REQ
+CSE MSG_ID_CSCE_CSE_PLMN_LIST_SUSPEND_REQ
+CSE MSG_ID_CSCE_CSE_RF_OFF_REQ
+CSE MSG_ID_CSCE_CSE_PLMN_LOSS_WITH_LIST_IND
+CSE MSG_ID_CSE_SLCE_FREQ_SCAN_CNF
+CSE MSG_ID_CSCE_CSE_CSG_LIST_START_REQ
+CSE MSG_ID_CSCE_CSE_CSG_LIST_SUSPEND_REQ
+CSE MSG_ID_CSCE_CSE_CSG_AUTONOMOUS_SEARCH_START_REQ
+CSE MSG_ID_CSCE_CSE_CSG_AUTONOMOUS_SEARCH_SUSPEND_REQ
+CSE MSG_ID_CSCE_CSE_EVALUATE_CSG_CELL_REQ
+CSE MSG_ID_CSCE_CSE_EVALUATE_CSG_CELL_SUSPEND_REQ
+CSE MSG_ID_CSCE_CSE_CGI_COLLECTION_REQ
+CSE MSG_ID_CSCE_CSE_CGI_COLLECTION_STOP_REQ
+CSE MSG_ID_CSE_CACHE_INFO_IND
+CSE MSG_ID_CSE_CODE_END
+CSM MSG_ID_MNCC_SETUP_IND
+CSM MSG_ID_MNCC_SETUP_CNF
+CSM MSG_ID_MNCC_SETUP_COMPL_IND
+CSM MSG_ID_MNCC_REJ_IND
+CSM MSG_ID_MNCC_CALL_PROC_IND
+CSM MSG_ID_MNCC_PROGRESS_IND
+CSM MSG_ID_MNCC_ALERT_IND
+CSM MSG_ID_MNCC_NOTIFY_IND
+CSM MSG_ID_MNCC_DISC_IND
+CSM MSG_ID_MNCC_REL_IND
+CSM MSG_ID_MNCC_REL_CNF
+CSM MSG_ID_MNCC_FACILITY_IND
+CSM MSG_ID_MNCC_START_DTMF_CNF
+CSM MSG_ID_MNCC_STOP_DTMF_CNF
+CSM MSG_ID_MNCC_MODIFY_IND
+CSM MSG_ID_MNCC_MODIFY_CNF
+CSM MSG_ID_MNCC_SYNC_IND
+CSM MSG_ID_MNCC_RAT_IND
+CSM MSG_ID_MNCC_HOLD_CNF
+CSM MSG_ID_MNCC_RETRIEVE_CNF
+CSM MSG_ID_MNCC_USER_INFO_IND
+CSM MSG_ID_MNCC_CONGESTION_CTRL_IND
+CSM MSG_ID_MNCC_CCBS_EST_IND
+CSM MSG_ID_MNCC_CCBS_RECALL_IND
+CSM MSG_ID_MNCC_AOC_IND
+CSM MSG_ID_MNCC_SIG_CON_REEST_IND
+CSM MSG_ID_MNCC_SIG_CON_REEST_CNF
+CSM MSG_ID_MNCC_SRVCC_TRANSFER_CNF
+CSM MSG_ID_L4CCSM_CC_STARTUP_REQ
+CSM MSG_ID_L4CCSM_CC_ACM_RESET_REQ
+CSM MSG_ID_L4CCSM_CC_ACMMAX_SET_REQ
+CSM MSG_ID_L4CCSM_CC_LAST_CCM_RESET_REQ
+CSM MSG_ID_L4CCSM_CC_CALL_DEFLECTION_REQ
+CSM MSG_ID_L4CCSM_CC_CRSS_REQ
+CSM MSG_ID_L4CCSM_CC_CALL_ACCEPT_REQ
+CSM MSG_ID_L4CCSM_CC_CALL_DISC_REQ
+CSM MSG_ID_L4CCSM_CC_CALL_MODIFY_REQ
+CSM MSG_ID_L4CCSM_CC_CALL_SETUP_REQ
+CSM MSG_ID_L4CCSM_CC_AUTO_DTMF_START_REQ
+CSM MSG_ID_L4CCSM_CC_EMERGENCY_CALL_SETUP_REQ
+CSM MSG_ID_L4CCSM_CC_START_DTMF_REQ
+CSM MSG_ID_L4CCSM_CC_STOP_DTMF_REQ
+CSM MSG_ID_L4CCSM_CC_SAT_SETUP_REQ
+CSM MSG_ID_L4CCSM_CC_SAT_SEND_DTMF_REQ
+CSM MSG_ID_L4CCSM_CC_SAT_ABORT_DTMF_REQ
+CSM MSG_ID_L4CCSM_CC_SET_CSD_PROF_REQ
+CSM MSG_ID_L4CCSM_CC_UPDATE_ALS_REQ
+CSM MSG_ID_L4CCSM_CC_UART_TRANSFER_REQ
+CSM MSG_ID_L4CCSM_CC_CALL_PRESENT_RSP
+CSM MSG_ID_L4CCSM_CC_ABORT_CALL_REQ
+CSM MSG_ID_L4CCSM_CC_REL_COMP_REQ
+CSM MSG_ID_L4CCSM_CC_SRVCC_TRANSFER_REQ
+CSM MSG_ID_SAT_CALL_CTRL_BY_SIM_CNF
+CSM MSG_ID_CSM_TDT_ACTIVATE_CNF
+CSM MSG_ID_CSM_TDT_DEACTIVATE_CNF
+CSM MSG_ID_CSM_TDT_ESC_ON_IND
+CSM MSG_ID_CSM_TDT_DISC_IND
+CSM MSG_ID_CSM_L2R_ACTIVATE_CNF
+CSM MSG_ID_CSM_L2R_DEACTIVATE_CNF
+CSM MSG_ID_CSM_L2R_XID_IND
+CSM MSG_ID_CSM_L2R_DISC_IND
+CSM MSG_ID_CSM_L2R_ESC_ON_IND
+CSM MSG_ID_CSM_T30_ACTIVATE_CNF
+CSM MSG_ID_CSM_T30_DEACTIVATE_CNF
+CSM MSG_ID_CSM_T30_FAX_RATE_CNF
+CSM MSG_ID_CSM_T30_DISC_IND
+CSM MSG_ID_L4CCSM_CISS_STARTUP_REQ
+CSM MSG_ID_L4CCSM_CISS_SS_PARSE_REQ
+CSM MSG_ID_L4CCSM_CISS_CF_BEGIN_REQ
+CSM MSG_ID_L4CCSM_CISS_CW_BEGIN_REQ
+CSM MSG_ID_L4CCSM_CISS_CB_BEGIN_REQ
+CSM MSG_ID_L4CCSM_CISS_EMLPP_BEGIN_REQ
+CSM MSG_ID_L4CCSM_CISS_CLI_BEGIN_REQ
+CSM MSG_ID_L4CCSM_CISS_CCBS_BEGIN_REQ
+CSM MSG_ID_L4CCSM_CISS_PUSSR_BEGIN_REQ
+CSM MSG_ID_L4CCSM_CISS_CB_FAC_RES
+CSM MSG_ID_L4CCSM_CISS_USSR_FAC_RES
+CSM MSG_ID_L4CCSM_CISS_USSN_FAC_RES
+CSM MSG_ID_L4CCSM_CISS_END_RES
+CSM MSG_ID_MNSS_BEGIN_IND
+CSM MSG_ID_MNSS_FAC_IND
+CSM MSG_ID_MNSS_END_IND
+CSM MSG_ID_SAT_SS_CTRL_BY_SIM_CNF
+CSM MSG_ID_L4CCSM_CISS_MTLR_END_RSP
+CSM MSG_ID_L4CCSM_CISS_AERQ_END_RSP
+CSM MSG_ID_L4CCSM_CISS_AERP_REQ
+CSM MSG_ID_L4CCSM_CISS_AERP_FAC_RES
+CSM MSG_ID_L4CCSM_CISS_AERP_END_REQ
+CSM MSG_ID_L4CCSM_CISS_AECL_END_RSP
+CSM MSG_ID_L4CCSM_CISS_MOLR_REQ
+CSM MSG_ID_L4CCSM_CISS_MOLR_FAC_RES
+CSM MSG_ID_L4CCSM_CISS_MOLR_END_REQ
+CSM MSG_ID_CSM_TIMER_EXPIRY
+CSM MSG_ID_CSM_CODE_END
+CSR MSG_ID_CSR_UMAC_STATUS_IND
+CSR MSG_ID_CSR_UMAC_TFC_IND
+CSR MSG_ID_CCSR_RAB_ESTABLISH_IND
+CSR MSG_ID_CCSR_RAB_RELEASE_IND
+CSR MSG_ID_CCSR_RAB_MODIFY_IND
+CSR MSG_ID_CCSR_RB_RELEASE_IND
+CSR MSG_ID_CSR_CODE_END
+DBME MSG_ID_DBME_DUMP_IND
+DBME MSG_ID_DBME_DUMP_EXT_QUEUE_IND
+DBME MSG_ID_DBME_CODE_END
+DM_CSCE MSG_ID_GAS_UAS_EVALUATE_UCELL_REQ
+DM_CSCE MSG_ID_GAS_UAS_ACTIVATE_UCELL_REQ
+DM_CSCE MSG_ID_GAS_UAS_LOWER_LAYER_AVAILABILITY_REQ
+DM_CSCE MSG_ID_EAS_UAS_REPORT_CGI_REQ
+DM_CSCE MSG_ID_EAS_UAS_EVALUATE_UCELL_REQ
+DM_CSCE MSG_ID_EAS_UAS_EVALUATE_UCELL_STOP_REQ
+DM_CSCE MSG_ID_UAS_EAS_SEARCH_CSG_ECELL_CNF
+DM_CSCE MSG_ID_UAS_EAS_EVALUATE_CSG_ECELL_CNF
+DM_CSCE MSG_ID_GAS_UAS_EUTRAN_CAP_UPDATE_IND
+DM_CSCE MSG_ID_EAS_UAS_BACKGROUND_SEARCH_FOUND_IND
+DM_CSCE MSG_ID_GAS_UAS_EVALUATE_UCELL_STOP_REQ
+DM_CSCE MSG_ID_DM_CSCE_CODE_END
+DM_MEME MSG_ID_UAS_GAS_CONFIG_GCELL_MEAS_CNF
+DM_MEME MSG_ID_UAS_GAS_CONFIG_GCELL_PRIO_MEAS_CNF
+DM_MEME MSG_ID_GAS_UAS_CONFIG_UCELL_PRIO_MEAS_REQ
+DM_MEME MSG_ID_UAS_GAS_GCELL_MEAS_IND
+DM_MEME MSG_ID_UAS_GAS_GCELL_BSIC_IND
+DM_MEME MSG_ID_GAS_UAS_CONFIG_UCELL_MEAS_REQ
+DM_MEME MSG_ID_UAS_EAS_LTE_MEASUREMENT_CNF
+DM_MEME MSG_ID_UAS_EAS_LTE_MEASUREMENT_IND
+DM_MEME MSG_ID_EAS_UAS_CONFIG_UCELL_PRIO_MEAS_REQ
+DM_MEME MSG_ID_EAS_UAS_CONFIG_UCELL_MEAS_REQ
+DM_MEME MSG_ID_DM_MEME_CODE_END
+DM_RRCE MSG_ID_UAS_GAS_HO_ACTIVATE_GCELL_CNF
+DM_RRCE MSG_ID_UAS_GAS_HANDOVER_GCELL_CNF
+DM_RRCE MSG_ID_GAS_UAS_HANDOVER_UCELL_REQ
+DM_RRCE MSG_ID_GAS_UAS_HO_ACTIVATE_UCELL_REQ
+DM_RRCE MSG_ID_GAS_UAS_ABORT_HO_UCELL_REQ
+DM_RRCE MSG_ID_UAS_GAS_EVALUATE_GCELL_CNF
+DM_RRCE MSG_ID_UAS_GAS_ACTIVATE_GCELL_CNF
+DM_RRCE MSG_ID_UAS_GAS_EVALUATE_GCELL_STOP_CNF
+DM_RRCE MSG_ID_UAS_GAS_GCELL_CHANGE_COMPLETE_IND
+DM_RRCE MSG_ID_EAS_UAS_HANDOVER_UCELL_REQ
+DM_RRCE MSG_ID_UAS_EAS_HANDOVER_ECELL_CNF
+DM_RRCE MSG_ID_UAS_EAS_HO_ACTIVATE_ECELL_CNF
+DM_RRCE MSG_ID_EAS_UAS_ABORT_HO_UCELL_REQ
+DM_RRCE MSG_ID_UAS_EAS_EVALUATE_ECELL_CNF
+DM_RRCE MSG_ID_UAS_EAS_EVALUATE_ECELL_STOP_CNF
+DM_RRCE MSG_ID_UAS_EAS_ACTIVATE_ECELL_CNF
+DM_RRCE MSG_ID_DM_RRCE_CODE_END
+DRIVER MSG_ID_UART_READY_TO_READ_IND
+DRIVER MSG_ID_UART_READY_TO_WRITE_IND
+DRIVER MSG_ID_UART_DSR_CHANGE_IND
+DRIVER MSG_ID_UART_ESCAPE_DETECTED_IND
+DRIVER MSG_ID_UART_PLUGIN_IND
+DRIVER MSG_ID_UART_PLUGOUT_IND
+DRIVER MSG_ID_BMT_CHARGER_IND
+DRIVER MSG_ID_BMT_ADC_DATA_REQ
+DRIVER MSG_ID_BMT_ADC_DATA_CONF
+DRIVER MSG_ID_BMT_LEAVE_PRECHARGE_IND
+DRIVER MSG_ID_BMT_ADC_MEASURE_DONE_CONF
+DRIVER MSG_ID_BMT_ADC_ADD_ITEM_REQ
+DRIVER MSG_ID_BMT_ADC_REMOVE_ITEM_REQ
+DRIVER MSG_ID_BMT_ADC_MODIFY_PARAMETERS_REQ
+DRIVER MSG_ID_AUX_PLUGIN
+DRIVER MSG_ID_AUX_PLUGOUT
+DRIVER MSG_ID_AUX_DETECT
+DRIVER MSG_ID_AUX_CALL_SETUP_REQ_IND
+DRIVER MSG_ID_AUX_CALL_CONNECT_REQ_IND
+DRIVER MSG_ID_AUX_CALL_DISCONNECT_REQ_IND
+DRIVER MSG_ID_AUX_ID
+DRIVER MSG_ID_READ_ALL_ADC_CHANNEL_REQ
+DRIVER MSG_ID_ADC_ALL_CHANNEL_CONF
+DRIVER MSG_ID_AUX_AUDIO_OPEN
+DRIVER MSG_ID_AUX_AUDIO_CLOSED
+DRIVER MSG_ID_PPP_PFC_ENCODE_DONE_IND
+DRIVER MSG_ID_PPP_PFC_DECODE_DONE_IND
+DRIVER MSG_ID_USB_A_PLUGIN_IND
+DRIVER MSG_ID_USB_A_PLUGOUT_IND
+DRIVER MSG_ID_USB_B_PLUGIN_IND
+DRIVER MSG_ID_USB_B_PLUGOUT_IND
+DRIVER MSG_ID_DRVUEM_USBCFG_REQ
+DRIVER MSG_ID_DRVUEM_USBCFG_CNF
+DRIVER MSG_ID_USBD_START_HNP
+DRIVER MSG_ID_SRP_INIT
+DRIVER MSG_ID_OTG_DISPLAY_IND
+DRIVER MSG_ID_DRVMMI_MS_INIT_DONE
+DRIVER MSG_ID_USB_MSDRV_RESET_IND
+DRIVER MSG_ID_USB_MSDRV_REC_DONE_CONF
+DRIVER MSG_ID_USB_MSDRV_TRX_DONE_CONF
+DRIVER MSG_ID_USB_MSDRV_CLEAR_STALL_REQ
+DRIVER MSG_ID_USB_MSDRV_REMOUNT_REQ
+DRIVER MSG_ID_USB_MSHOST_START_IND
+DRIVER MSG_ID_USB_MSHOST_QUERY_IND
+DRIVER MSG_ID_USB_MSHOST_CLEAR_STALL_IND
+DRIVER MSG_ID_USB_HOST_ATTACH_IND
+DRIVER MSG_ID_OTG_MS_INSERT_IND
+DRIVER MSG_ID_OTG_MS_REMOVE_IND
+DRIVER MSG_ID_OTG_CARD_DETECT_IND
+DRIVER MSG_ID_OTG_HDLR_IND
+DRIVER MSG_ID_USB_FT_IND
+DRIVER MSG_ID_USB_FT_START_REQ
+DRIVER MSG_ID_USB_FT_TX_DONE_IND
+DRIVER MSG_ID_USB_FT_RX_DATA_IND
+DRIVER MSG_ID_RNDIS_USB_CONFIG_REQ
+DRIVER MSG_ID_RNDIS_USB_CONFIG_CNF
+DRIVER MSG_ID_RNDIS_USB_DETACH_REQ
+DRIVER MSG_ID_RNDIS_USB_DETACH_CNF
+DRIVER MSG_ID_RNDIS_USB_ENUM_IND
+DRIVER MSG_ID_CTRL_UART_READY_TO_READ_IND
+DRIVER MSG_ID_CTRL_UART_READY_TO_WRITE_IND
+DRIVER MSG_ID_MBIM_USB_RESET_IND
+DRIVER MSG_ID_USB_LOGGING_START_IND
+DRIVER MSG_ID_USB_LOGGING_RESET_IND
+DRIVER MSG_ID_USB_LOGGING_CONNECT_IND
+DRIVER MSG_ID_USB_LOGGING_DISCONNECT_IND
+DRIVER MSG_ID_USB_TEST_START_IND
+DRIVER MSG_ID_USB_MED_SET_CAMERA_ATTR_REQ
+DRIVER MSG_ID_USB_MED_SET_CAMERA_ATTR_CNF
+DRIVER MSG_ID_MED_USB_START_VIDEO_REQ
+DRIVER MSG_ID_USB_MED_START_VIDEO_CNF
+DRIVER MSG_ID_USB_MED_CHANGE_VIDEO_IND
+DRIVER MSG_ID_USB_MED_START_STILL_IND
+DRIVER MSG_ID_USB_MED_START_VIDEO_IND
+DRIVER MSG_ID_MED_USB_DEVICE_STILL_REQ
+DRIVER MSG_ID_USB_MED_DEVICE_STILL_CNF
+DRIVER MSG_ID_MED_USB_PAUSE_REQ
+DRIVER MSG_ID_USB_MED_PAUSE_CNF
+DRIVER MSG_ID_MED_USB_RESUME_VIDEO_REQ
+DRIVER MSG_ID_USB_MED_RESUME_VIDEO_CNF
+DRIVER MSG_ID_USB_MED_STOP_IND
+DRIVER MSG_ID_USB_MED_ABORT_IND
+DRIVER MSG_ID_MED_USB_STOP_REQ
+DRIVER MSG_ID_USB_MED_STOP_CNF
+DRIVER MSG_ID_MED_USB_DISCONNECT_REQ
+DRIVER MSG_ID_MED_USB_CONNECT_REQ
+DRIVER MSG_ID_USB_ENUM_DONE
+DRIVER MSG_ID_USB_VIDEO_COMPLETE
+DRIVER MSG_ID_USB_VIDEO_DMA_DONE
+DRIVER MSG_ID_USB_VIDEO_CHANGE_SIZE
+DRIVER MSG_ID_USB_STILL_CAPTURE
+DRIVER MSG_ID_USB_STILL_COMPLETE
+DRIVER MSG_ID_USB_VIDEO_STILL_DMA_DONE
+DRIVER MSG_ID_USB_VIDEO_STILL_DMA_PARTIAL
+DRIVER MSG_ID_USB_VIDEO_INCALL_DMA_DONE
+DRIVER MSG_ID_USB_VIDEO_INCALL_TIMEOUT
+DRIVER MSG_ID_USB_VIDEO_INCALL_CHANGE_SIZE
+DRIVER MSG_ID_USB_VIDEO_ABORT
+DRIVER MSG_ID_USB_MMI_DPS_DISCOVERY_IND
+DRIVER MSG_ID_USB_MMI_DPS_HREQUEST_IND
+DRIVER MSG_ID_MMI_USB_DPS_HREQUEST_CONF
+DRIVER MSG_ID_USB_MMI_DPS_HRESPONSE_IND
+DRIVER MSG_ID_MMI_USB_DPS_HRESPONSE_CONF
+DRIVER MSG_ID_MMI_USB_DPS_DREQUEST_REQ
+DRIVER MSG_ID_USB_MMI_DPS_DREQUEST_CONF
+DRIVER MSG_ID_MMI_USB_DPS_DRESPONSE_REQ
+DRIVER MSG_ID_USB_MMI_DPS_DRESPONSE_CONF
+DRIVER MSG_ID_USB_MMI_PTP_CONNECT_TO_PC_IND
+DRIVER MSG_ID_USB_MMI_PTP_OPEN_FILE_FAIL_IND
+DRIVER MSG_ID_USB_MMI_PTP_HOST_RESET_IND
+DRIVER MSG_ID_MMI_USB_PTP_HOST_RESET_CNF
+DRIVER MSG_ID_MMI_USB_START_JOB_REQ
+DRIVER MSG_ID_MMI_USB_CLOSE_JOB_REQ
+DRIVER MSG_ID_USB_PTPIMAGE_DATA_RX_DONE_CONF
+DRIVER MSG_ID_USB_PTPIMAGE_DATA_TX_DONE_CONF
+DRIVER MSG_ID_USB_PTPIMAGE_RESET_IND
+DRIVER MSG_ID_USB_MTP_ENABLE_REQ
+DRIVER MSG_ID_USB_MTP_ENABLE_RSP
+DRIVER MSG_ID_USB_MTP_DISABLE_REQ
+DRIVER MSG_ID_USB_MTP_DISABLE_RSP
+DRIVER MSG_ID_USB_MTP_OPERATION_REQ
+DRIVER MSG_ID_USB_MTP_OPERATION_RSP
+DRIVER MSG_ID_USB_MTP_EVENT_IND
+DRIVER MSG_ID_USB_MTPIMAGE_DATA_RX_DONE_CONF
+DRIVER MSG_ID_USB_MTPIMAGE_DATA_TX_DONE_CONF
+DRIVER MSG_ID_USB_MTPIMAGE_RESET_IND
+DRIVER MSG_ID_USB_MTPIMAGE_CANCEL_IND
+DRIVER MSG_ID_MSDC_CARD_DETECT_IND
+DRIVER MSG_ID_SIM_PLUS_DETECT_IND
+DRIVER MSG_ID_MSDC2_CARD_DETECT_IND
+DRIVER MSG_ID_MSDC_CARD_DISPLAY_IND
+DRIVER MSG_ID_BMT_USB_IND
+DRIVER MSG_ID_BMT_USB_READ_CALI_DONE_IND
+DRIVER MSG_ID_TP_EVENT_IND
+DRIVER MSG_ID_TP_CALI_DONE
+DRIVER MSG_ID_TP_PEN_DOWN_IND
+DRIVER MSG_ID_TDMB_TURN_ON_REQUEST
+DRIVER MSG_ID_TDMB_CODE_BEGIN
+DRIVER MSG_ID_TDMB_TURN_ON_CONFIRM
+DRIVER MSG_ID_TDMB_TURN_OFF_REQUEST
+DRIVER MSG_ID_TDMB_TURN_OFF_CONFIRM
+DRIVER MSG_ID_TDMB_SET_BAND_REQUEST
+DRIVER MSG_ID_TDMB_SET_BAND_CONFIRM
+DRIVER MSG_ID_TDMB_AUTO_SCAN_REQUEST
+DRIVER MSG_ID_TDMB_AUTO_SCAN_CONFIRM
+DRIVER MSG_ID_TDMB_STOP_AUTO_SCAN_REQUEST
+DRIVER MSG_ID_TDMB_STOP_AUTO_SCAN_CONFIRM
+DRIVER MSG_ID_TDMB_SET_FREQUENCY_REQUEST
+DRIVER MSG_ID_TDMB_SET_FREQUENCY_CONFIRM
+DRIVER MSG_ID_TDMB_SELECT_SERVICE_REQUEST
+DRIVER MSG_ID_TDMB_SELECT_SERVICE_CONFIRM
+DRIVER MSG_ID_TDMB_GET_SIGNAL_REQUEST
+DRIVER MSG_ID_TDMB_GET_SIGNAL_CONFIRM
+DRIVER MSG_ID_TDMB_START_ANNOUNCEMENT_REQUEST
+DRIVER MSG_ID_TDMB_START_ANNOUNCEMENT_CONFIRM
+DRIVER MSG_ID_TDMB_END_ANNOUNCEMENT_REQUEST
+DRIVER MSG_ID_TDMB_END_ANNOUNCEMENT_CONFIRM
+DRIVER MSG_ID_TDMB_SET_IDLE_REQUEST
+DRIVER MSG_ID_TDMB_SET_IDLE_CONFIRM
+DRIVER MSG_ID_TDMB_MCI_RECONFIG_INDICATION
+DRIVER MSG_ID_TDMB_GET_ENSEMBLE_INFO_REQUEST
+DRIVER MSG_ID_TDMB_GET_ENSEMBLE_INFO_CONFIRM
+DRIVER MSG_ID_TDMB_DEMOD_MCI_RECONFIG_INDICATION
+DRIVER MSG_ID_TDMB_DEMOD_ANNOUNCEMENT_INDICATION
+DRIVER MSG_ID_TDMB_ANNOUNCEMENT_INDICATION
+DRIVER MSG_ID_TDMB_SET_ANNOUNCEMENT_REQUEST
+DRIVER MSG_ID_TDMB_SET_ANNOUNCEMENT_CONFIRM
+DRIVER MSG_ID_TDMB_DATA_INDICATION
+DRIVER MSG_ID_TDMB_SERVICE_END_INDICATION
+DRIVER MSG_ID_TDMB_FIC_IND_INDICATION
+DRIVER MSG_ID_TDMB_MSC_IND_INDICATION
+DRIVER MSG_ID_TDMB_INT_ARRIVE
+DRIVER MSG_ID_TDMB_SIGNAL_STATUS
+DRIVER MSG_ID_TDMB_GET_TS_DATA_ERROR
+DRIVER MSG_ID_TDMB_SET_ENSEMBLE
+DRIVER MSG_ID_TDMB_CODE_END
+DRIVER MSG_ID_CMMB_TURN_ON_REQUEST
+DRIVER MSG_ID_CMMB_CODE_BEGIN
+DRIVER MSG_ID_CMMB_TURN_ON_CONFIRM
+DRIVER MSG_ID_CMMB_TURN_OFF_REQUEST
+DRIVER MSG_ID_CMMB_TURN_OFF_CONFIRM
+DRIVER MSG_ID_CMMB_SET_BAND_REQUEST
+DRIVER MSG_ID_CMMB_SET_BAND_CONFIRM
+DRIVER MSG_ID_CMMB_AUTO_SCAN_REQUEST
+DRIVER MSG_ID_CMMB_AUTO_SCAN_CONFIRM
+DRIVER MSG_ID_CMMB_STOP_AUTO_SCAN_REQUEST
+DRIVER MSG_ID_CMMB_STOP_AUTO_SCAN_CONFIRM
+DRIVER MSG_ID_CMMB_SET_FREQUENCY_REQUEST
+DRIVER MSG_ID_CMMB_SET_FREQUENCY_CONFIRM
+DRIVER MSG_ID_CMMB_SELECT_SERVICE_REQUEST
+DRIVER MSG_ID_CMMB_SELECT_SERVICE_CONFIRM
+DRIVER MSG_ID_CMMB_PAUSE_SERVICE_REQUEST
+DRIVER MSG_ID_CMMB_PAUSE_SERVICE_CONFIRM
+DRIVER MSG_ID_CMMB_GET_SIGNAL_REQUEST
+DRIVER MSG_ID_CMMB_GET_SIGNAL_CONFIRM
+DRIVER MSG_ID_CMMB_GET_TABLE_REQUEST
+DRIVER MSG_ID_CMMB_GET_TABLE_CONFIRM
+DRIVER MSG_ID_CMMB_STREAM_INFO_TABLE_UPDATE_INDICATION
+DRIVER MSG_ID_CMMB_CONTROL_INFO_TABLE_UPDATE_INDICATION
+DRIVER MSG_ID_CMMB_SAVE_STREAM_TO_FILE_REQUEST
+DRIVER MSG_ID_CMMB_SAVE_STREAM_TO_FILE_CONFIRM
+DRIVER MSG_ID_CMMB_STOP_SAVE_STREAM_TO_FILE_REQUEST
+DRIVER MSG_ID_CMMB_STOP_SAVE_STREAM_TO_FILE_CONFIRM
+DRIVER MSG_ID_CMMB_GET_STREAM_FROM_FILE_REQUEST
+DRIVER MSG_ID_CMMB_GET_STREAM_FROM_FILE_CONFIRM
+DRIVER MSG_ID_CMMB_STOP_GET_STREAM_FROM_FILE_REQUEST
+DRIVER MSG_ID_CMMB_STOP_GET_STREAM_FROM_FILE_CONFIRM
+DRIVER MSG_ID_CMMB_INT_ARRIVE
+DRIVER MSG_ID_CMMB_DATA_INDICATION
+DRIVER MSG_ID_CMMB_UAM_CHECK_SUPPORT_REQUEST
+DRIVER MSG_ID_CMMB_UAM_CHECK_SUPPORT_CONFIRM
+DRIVER MSG_ID_CMMB_UAM_SET_SIMTYPE_REQUEST
+DRIVER MSG_ID_CMMB_UAM_SET_SIMTYPE_CONFIRM
+DRIVER MSG_ID_CMMB_UAM_GET_CMMBSN_REQUEST
+DRIVER MSG_ID_CMMB_UAM_GET_CMMBSN_CONFIRM
+DRIVER MSG_ID_CMMB_UAM_CHECK_GBAISNEED_REQUEST
+DRIVER MSG_ID_CMMB_UAM_CHECK_GBAISNEED_CONFIRM
+DRIVER MSG_ID_CMMB_UAM_GET_KEY_REQUEST
+DRIVER MSG_ID_CMMB_UAM_GET_KEY_CONFIRM
+DRIVER MSG_ID_CMMB_UAM_SET_KEY_REQUEST
+DRIVER MSG_ID_CMMB_UAM_SET_KEY_CONFIRM
+DRIVER MSG_ID_CMMB_UAM_CHECK_MSKISVALID_REQUEST
+DRIVER MSG_ID_CMMB_UAM_CHECK_MSKISVALID_CONFIRM
+DRIVER MSG_ID_CMMB_UAM_MSK_CHANGE_INDICATION
+DRIVER MSG_ID_CMMB_CODE_END
+DRIVER MSG_ID_MBBMS_DRV_INIT
+DRIVER MSG_ID_MBBMS_DRV_DEINIT
+DRIVER MSG_ID_BTIF_READY_TO_READ_IND
+DRIVER MSG_ID_BTIF_READY_TO_WRITE_IND
+DRIVER MSG_ID_SRV_SENSOR_PXS_DETECT_OBJECT_IND
+DRIVER MSG_ID_UPS1_READY_TO_READ_IND
+DRIVER MSG_ID_UPS2_READY_TO_READ_IND
+DRIVER MSG_ID_UPS3_READY_TO_READ_IND
+DRIVER MSG_ID_UPS4_READY_TO_READ_IND
+DRIVER MSG_ID_UPS1_READY_TO_WRITE_IND
+DRIVER MSG_ID_UPS2_READY_TO_WRITE_IND
+DRIVER MSG_ID_UPS3_READY_TO_WRITE_IND
+DRIVER MSG_ID_UPS4_READY_TO_WRITE_IND
+DRIVER MSG_ID_SDIOCORE_CODE_BEGIN
+DRIVER MSG_ID_SDIOCORE_ISR_REQ
+DRIVER MSG_ID_SDIOCORE_UT_ISR_REQ
+DRIVER MSG_ID_SDIOCORE_UT_TX_REQ
+DRIVER MSG_ID_SDIOCORE_UT_RX_REQ_
+DRIVER MSG_ID_SDIOCORE_UT_LB_REQ_
+DRIVER MSG_ID_SDIOCORE_CODE_TAIL
+DRIVER MSG_ID_IDC_RX_DATA
+DRLC MSG_ID_DRLC_URLC_REASSEMBLE_REQ
+DRLC MSG_ID_DRLC_URLC_INIT_REQ
+DRLC MSG_ID_DRLC_URLC_DEINIT_REQ
+DRLC MSG_ID_DRLC_URLC_ENTER_PCH_REQ
+DRLC MSG_ID_RRCE_DRLC_FLUSH_DATA_REQ
+DRLC MSG_ID_URR_DRLC_SRB_SDU_CONTINUE_REQ
+DRLC MSG_ID_RLC_TM_DATA_REQ
+DRLC MSG_ID_RLC_UM_DATA_REQ
+DRLC MSG_ID_RLC_AM_DATA_REQ
+DRLC MSG_ID_DRLC_CODE_END
+EAS_GAS MSG_ID_EAS_GAS_CONFIG_GCELL_MEAS_REQ
+EAS_GAS MSG_ID_EAS_GAS_CONFIG_GCELL_PRIO_MEAS_REQ
+EAS_GAS MSG_ID_GAS_EAS_LTE_MEASUREMENT_IND
+EAS_GAS MSG_ID_GAS_EAS_LTE_MEASUREMENT_CNF
+EAS_GAS MSG_ID_EAS_GAS_REPORT_CGI_REQ
+EAS_GAS MSG_ID_EAS_GAS_EVALUATE_GCELL_REQ
+EAS_GAS MSG_ID_EAS_GAS_EVALUATE_GCELL_STOP_REQ
+EAS_GAS MSG_ID_EAS_GAS_ACTIVATE_GCELL_REQ
+EAS_GAS MSG_ID_EAS_GAS_HANDOVER_GCELL_REQ
+EAS_GAS MSG_ID_EAS_GAS_HO_ACTIVATE_GCELL_REQ
+EAS_GAS MSG_ID_EAS_GAS_ABORT_HO_GCELL_REQ
+EAS_GAS MSG_ID_GAS_EAS_EVALUATE_ECELL_CNF
+EAS_GAS MSG_ID_GAS_EAS_EVALUATE_ECELL_STOP_CNF
+EAS_GAS MSG_ID_GAS_EAS_ACTIVATE_ECELL_CNF
+EAS_GAS MSG_ID_GAS_EAS_SEARCH_CSG_ECELL_CNF
+EAS_GAS MSG_ID_EAS_GAS_BACKGROUND_SEARCH_FOUND_IND
+EAS_GAS MSG_ID_GAS_EAS_EVALUATE_CSG_ECELL_CNF
+EAS_GAS MSG_ID_EAS_GAS_CODE_END
+EL1 MSG_ID_ERRC_EL1_CPHY_CFG_REQ
+EL1 MSG_ID_EL1_CH_MSG_START
+EL1 MSG_ID_ERRC_EL1_RL_MONITOR_REQ
+EL1 MSG_ID_ERRC_EL1_SPECIFIC_CELL_SEARCH_REQ
+EL1 MSG_ID_ERRC_EL1_PCH_RCV_NTF
+EL1 MSG_ID_ERRC_EL1_ABORT_HO_NTF
+EL1 MSG_ID_EMAC_EL1_RA_GAP_STOP_REQ
+EL1 MSG_ID_EMAC_EL1_RA_GAP_RESUME_REQ
+EL1 MSG_ID_EMAC_EL1_RNTI_UPDATE_REQ
+EL1 MSG_ID_EMAC_EL1_DRX_CTRL_REQ
+EL1 MSG_ID_EMAC_EL1_DRX_SLEEP_NTF
+EL1 MSG_ID_EMAC_EL1_DRX_CYCLE_NTF
+EL1 MSG_ID_EMAC_EL1_HOST_DATA_REQ
+EL1 MSG_ID_ETMR_EL1_RS_EXTEND_END
+EL1 MSG_ID_ETMR_EL1_CH_TIMER_EXPIRY
+EL1 MSG_ID_ETMR_EL1_CPHY_CFG_TMR_EXPIRY
+EL1 MSG_ID_GAS_EL1_ENABLE_B39_REQ
+EL1 MSG_ID_GAS_EL1_DISABLE_B39_REQ
+EL1 MSG_ID_LAS_EL1_PCH_RCV_NTF
+EL1 MSG_ID_EL1_IRT_CH_PARAM_CHG_CNF
+EL1 MSG_ID_EL1_IRT_CH_GAP_SUSP_CNF
+EL1 MSG_ID_EL1_IRT_CH_BCCH_CNF
+EL1 MSG_ID_EL1_IRT_CH_AUTO_GAP_STOP_REQ
+EL1 MSG_ID_EL1_IRT_CH_AUTO_GAP_AVAIL_IND
+EL1 MSG_ID_EL1_PHS_CH_CTRL_CNF
+EL1 MSG_ID_EL1_PHS_CH_CONFLICT_IND
+EL1 MSG_ID_EL1_PHS_CH_REL_ALL_IND
+EL1 MSG_ID_EL1_DRV_CH_CTRL_CNF
+EL1 MSG_ID_EL1_DRV_CH_DL_SYNC_RPT
+EL1 MSG_ID_EL1_DRV_CH_MIB_RPT
+EL1 MSG_ID_EL1_DRV_CH_DL_BC_ASSIGN_RLT
+EL1 MSG_ID_EL1_DRV_CH_CELL_DETECT_RPT
+EL1 MSG_ID_EL1_DRV_CH_STATIC_MEAS_RPT
+EL1 MSG_ID_EL1_DRV_CH_CELL_TBL_GET_RPT
+EL1 MSG_ID_EL1MPC_EL1_MEAS_CH_MEAS_MODE_CHNG_REQ
+EL1 MSG_ID_EL1MPC_EL1_MEAS_CH_MEAS_MODE_SWITCH_CNF
+EL1 MSG_ID_ERRC_EL1_RX_POLL_DATA_IND
+EL1 MSG_ID_ERRC_EL1_CHANNEL_PROTECT_START_REQ
+EL1 MSG_ID_EL1_PHS_MSG_START
+EL1 MSG_ID_ERRC_EL1_CHANNEL_PROTECT_STOP_REQ
+EL1 MSG_ID_AP_MD_LTE_AUTO_GAP_REQ
+EL1 MSG_ID_EL1_IRT_PHS_RAT_CHG_REQ
+EL1 MSG_ID_EL1_CH_PHS_CTRL_REQ
+EL1 MSG_ID_EL1_CH_PHS_DRX_CTRL_REQ
+EL1 MSG_ID_EL1_CH_PHS_DRX_CYCLE_IND
+EL1 MSG_ID_EL1_CH_PHS_DRX_SLEEP_IND
+EL1 MSG_ID_EL1MPC_EL1_CSR_PHS_CTRL_REQ
+EL1 MSG_ID_EL1MPC_EL1_MEAS_PHS_CTRL_REQ
+EL1 MSG_ID_EL1_PHS_PHS_ABORT_IND
+EL1 MSG_ID_EL1_PHS_PHS_CTRL_RSP
+EL1 MSG_ID_EL1_DRV_PHS_CTRL_CNF
+EL1 MSG_ID_EL1_DRV_PHS_DSP_CTRL_RSP
+EL1 MSG_ID_EL1_DRV_PHS_RAT_CHNG_RPT
+EL1 MSG_ID_EL1_IRT_PHS_MEAS_GAP_REQ
+EL1 MSG_ID_EL1_IRT_PHS_GAP_CANCEL_CNF
+EL1 MSG_ID_EL1_IRT_PHS_GAP_CTRL_REQ
+EL1 MSG_ID_EL1_IRT_PHS_GAP_CANCEL_REQ
+EL1 MSG_ID_EL1_IRT_PHS_GAP_RESUME_IND
+EL1 MSG_ID_EL1_IRT_PHS_AUTO_GAP_IND
+EL1 MSG_ID_EL1_IRT_PHS_AUTO_GAP_END_IND
+EL1 MSG_ID_EL1_IRT_PHS_GAP_SUSPEND_CNF
+EL1 MSG_ID_EL1MPC_EL1_MEAS_PHS_IRT_CTRL_REQ
+EL1 MSG_ID_ERRC_EL1_SET_RAT_REQ
+EL1 MSG_ID_EL1_IRT_MSG_START
+EL1 MSG_ID_ERRC_EL1_AUTO_GAP_ON_REQ
+EL1 MSG_ID_ERRC_EL1_AUTO_GAP_OFF_REQ
+EL1 MSG_ID_ERRC_EL1_LOCK_SLEEP_NTF
+EL1 MSG_ID_EL1MPC_EL1_CSR_IRT_GAP_REQ
+EL1 MSG_ID_EL1_PHS_IRT_RAT_CHG_CNF
+EL1 MSG_ID_EL1_CH_IRT_PARAM_CHG_REQ
+EL1 MSG_ID_EL1_CH_IRT_RECONFIG_DONE_IND
+EL1 MSG_ID_EL1_CH_IRT_GAP_SUSP_REQ
+EL1 MSG_ID_EL1_CH_IRT_GAP_RESUME_IND
+EL1 MSG_ID_EL1_CH_IRT_BCCH_REQ
+EL1 MSG_ID_EL1_CH_IRT_AUTO_GAP_STOP_CNF
+EL1 MSG_ID_EL1MPC_EL1_MEAS_IRT_MEASURE_REQ
+EL1 MSG_ID_EL1MPC_EL1_MEAS_IRT_MEASURE_DONE_IND
+EL1 MSG_ID_EL1MPC_EL1_MEAS_IRT_GAP_SUSP_REQ
+EL1 MSG_ID_EL1MPC_EL1_MEAS_IRT_GAP_RESUME_IND
+EL1 MSG_ID_EL1_PHS_IRT_DRX_TICK_IND
+EL1 MSG_ID_EL1_PHS_IRT_GAP_PERIOD_IND
+EL1 MSG_ID_EL1_PHS_IRT_GAP_CANCEL_REQ
+EL1 MSG_ID_EL1_PHS_IRT_GAP_CTRL_CNF
+EL1 MSG_ID_EL1_PHS_IRT_GAP_CANCEL_CNF
+EL1 MSG_ID_EL1_PHS_IRT_AUTO_GAP_RES
+EL1 MSG_ID_EL1_PHS_IRT_GAP_SUSPEND_REQ
+EL1 MSG_ID_EL1_PHS_IRT_GAP_RESUME_IND
+EL1 MSG_ID_ERRC_EL1MPC_RADIO_MEASURE_REQ
+EL1 MSG_ID_EL1MPC_MEAS_MSG_START
+EL1 MSG_ID_ERRC_EL1MPC_SPECIFIC_MEASURE_REQ
+EL1 MSG_ID_ERRC_EL1MPC_HPS_QUALIFY_CELL_NTF
+EL1 MSG_ID_ERRC_EL1MPC_OOS_TRIG_SEARCH_NTF
+EL1 MSG_ID_ETMR_EL1MPC_SRV_TMR_EXPIRY
+EL1 MSG_ID_ETMR_EL1MPC_LIFE_TMR_EXPIRY
+EL1 MSG_ID_EL1_EL1MPC_IRT_MEAS_GAP_CFG_IND
+EL1 MSG_ID_EL1_EL1MPC_IRT_MEAS_MEAS_GAP_REQ
+EL1 MSG_ID_EL1_EL1MPC_IRT_MEAS_BASE_TIME_IND
+EL1 MSG_ID_EL1_EL1MPC_IRT_MEAS_MODE_CHNG_NTF
+EL1 MSG_ID_EL1_EL1MPC_IRT_MEAS_GAP_SUSP_CNF
+EL1 MSG_ID_EL1_EL1MPC_PHS_MEAS_SCHDL_IND
+EL1 MSG_ID_EL1_EL1MPC_PHS_MEAS_CTRL_CNF
+EL1 MSG_ID_EL1_EL1MPC_PHS_MEAS_CONFLICT_IND
+EL1 MSG_ID_EL1_EL1MPC_CH_MEAS_RL_PROBLEM_NTF
+EL1 MSG_ID_EL1_EL1MPC_CH_MEAS_RL_RECOVER_NTF
+EL1 MSG_ID_EL1_EL1MPC_DRV_MEAS_STATIC_MEAS_RPT
+EL1 MSG_ID_EL1_EL1MPC_DRV_MEAS_PRESCH_RPT
+EL1 MSG_ID_EL1_EL1MPC_DRV_MEAS_CELL_SEARCH_RPT
+EL1 MSG_ID_EL1_EL1MPC_DRV_MEAS_CTRL_CNF
+EL1 MSG_ID_EL1_EL1MPC_DRV_MEAS_CELL_TBL_GET_RPT
+EL1 MSG_ID_EL1_EL1MPC_DRV_MEAS_SRV_INFO_GET_RPT
+EL1 MSG_ID_EL1_EL1MPC_CH_MEAS_MEAS_MODE_SWITCH_REQ
+EL1 MSG_ID_EL1_EL1MPC_CH_MEAS_MEAS_MODE_CHNG_CNF
+EL1 MSG_ID_ERRC_EL1MPC_CARRIER_SEARCH_REQ
+EL1 MSG_ID_EL1MPC_CSR_MSG_START
+EL1 MSG_ID_ERRC_EL1MPC_RSSI_SNIFFER_REQ
+EL1 MSG_ID_EL1_EL1MPC_PHS_CSR_CTRL_CNF
+EL1 MSG_ID_EL1_EL1MPC_PHS_CSR_CONFLICT_IND
+EL1 MSG_ID_EL1_EL1MPC_DRV_CSR_CTRL_CNF
+EL1 MSG_ID_EL1_DRV_CSR_CSR_RPT
+EL1 MSG_ID_EL1_DRV_CSR_PWR_SCN_RPT
+EL1 MSG_ID_EL1_DRV_SM_FWS_TIME_ERR_RPT
+EL1 MSG_ID_EL1_SM_MSG_START
+EL1 MSG_ID_EL1_DRV_SM_SLP_TIME_RPT
+EL1 MSG_ID_EL1_EL2_WAKEUP_L2COPRO_RES
+EL1 MSG_ID_EL1_MSG_END
+EL1 MSG_ID_EL1_IRT_TX_AUTO_GAP_IND
+EL1 MSG_ID_EL1_TX_MSG_START
+EL1 MSG_ID_EL1_CH_TX_INFO_IND
+EL1 MSG_ID_EL1_CH_TX_GAP_INFO_IND
+EL1 MSG_ID_EL1_CH_TX_CRNTI_UPDATE_IND
+EL1 MSG_ID_EL1_CH_TX_SCH_CLOSE_IND
+EL1 MSG_ID_EL1MPC_EL1_MEAS_TX_PATHLOSS_IND
+EL1 MSG_ID_EL1_PHS_TX_SUSPEND_IND
+EL1 MSG_ID_EL1_DRV_TX_DL_UL_INFO
+EL1 MSG_ID_EL1_IDC_TX_MAX_PWR_IND
+EL1 MSG_ID_EL1_TX_TX_CFG_IND
+EL1 MSG_ID_EMAC_EL1TX_TX_REQ
+EL1 MSG_ID_EMAC_EL1TX_2ND_TX_REQ
+EL1 MSG_ID_EMAC_EL1TX_CR_RESULT_NTF
+EL1 MSG_ID_EMAC_EL1TX_SPS_REL_REQ
+EL1 MSG_ID_EMAC_EL1TX_PRACH_INFO_NTF
+EL1 MSG_ID_EMAC_EL1TX_RAR_MATCH_NTF
+EL1 MSG_ID_EMAC_EL1TX_TX_TIMING_ADJ_REQ
+EL1 MSG_ID_EMAC_EL1TX_TA_TIMER_EXPRY_NTF
+EL1 MSG_ID_EMAC_EL1TX_DL_HARQ_BUF_REL_REQ
+EL1 MSG_ID_EMAC_EL1TX_DL_SPS_RX_REQ
+EL1 MSG_ID_EMAC_EL1TX_CSI_SRS_ADMISSION_2ND_NTF
+EL1 MSG_ID_ETMR_XL1_GAP_TMR
+EL1 MSG_ID_ETMR_EL1_TDM_TMR_EXPIRY
+EL1 MSG_ID_EL1_DRV_DSP_LOG_FILTER
+EL1 MSG_ID_EL1_DRV_DSP_LOG_FILTER_CNF
+EL2 MSG_ID_ERRC_EPDCP_CONFIG_REQ
+EL2 MSG_ID_ERRC_EPDCP_DCCH_DATA_REQ
+EL2 MSG_ID_ERRC_EPDCP_DCCH_DATA_RES
+EL2 MSG_ID_ERRC_EPDCP_TEST_REQ
+EL2 MSG_ID_ERRC_EPDCP_CNTINFO_REQ
+EL2 MSG_ID_ERLCUL_EPDCP_SRB_DATA_CNF
+EL2 MSG_ID_EPDCP_EPDCP_CTRL_PDU_IND
+EL2 MSG_ID_EPDCP_EPDCP_DL_FLUSH_DONE_IND
+EL2 MSG_ID_EMAC_EPDCP_TDM_START_IND
+EL2 MSG_ID_EMAC_EPDCP_TDM_END_IND
+EL2 MSG_ID_EMAC_EPDCP_MAX_UL_TB_IND
+EL2 MSG_ID_EL1_EL2_PWR_DOWN_L2COPRO_IND
+EL2 MSG_ID_EL1_EL2_WAKEUP_L2COPRO_IND
+EL2 MSG_ID_ERRC_ERLCUL_CONFIG_REQ
+EL2 MSG_ID_ERRC_ERLCUL_SRB1_ACK_REQ
+EL2 MSG_ID_EPDCP_ERLCUL_DISCARD_REQ
+EL2 MSG_ID_ERLCDL_ERLCUL_STATUS_PDU_RCV
+EL2 MSG_ID_ERRC_ERLCDL_CONFIG_REQ
+EL2 MSG_ID_ERRC_EMAC_CONFIG_REQ
+EL2 MSG_ID_ERRC_EMAC_CCCH_DATA_REQ
+EL2 MSG_ID_ERRC_EMAC_TA_INFO_REQ
+EL2 MSG_ID_LTM_EMAC_LEAVE_DRX
+EL2 MSG_ID_EMAC_EMAC_RAR_INT
+EL2 MSG_ID_EMAC_EMAC_EARLY_INT
+EL2 MSG_ID_EMAC_UT_EMAC_TEST_CMD
+EL2 MSG_ID_EMAC_EL1_PHY_INFO_IND
+EL2 MSG_ID_EMAC_EL1_RA_GAP_STOP_CNF
+EL2 MSG_ID_EMAC_EL1_RA_GAP_RESUME_CNF
+EL2 MSG_ID_EMAC_EL1_RNTI_UPDATE_CNF
+EL2 MSG_ID_EMAC_EL1_DRX_CTRL_CNF
+EL2 MSG_ID_EMAC_EL1_HOST_DATA_CNF
+EL2 MSG_ID_EMAC_EL1_HOST_DATA_READY_IND
+EL2 MSG_ID_EMAC_EL1_RA_RESTART_IND
+EL2 MSG_ID_EMAC_EL1_IDC_TDM_IND
+EL2 MSG_ID_EMAC_EL1TX_PDCCH_IND
+EL2 MSG_ID_EMAC_EL1TX_RETX_INFO_IND
+EL2 MSG_ID_EMAC_EL1TX_PHR_IND
+EL2 MSG_ID_EMAC_EL1TX_SR_TX_ABORT_IND
+EL2 MSG_ID_EMAC_DL_CTRL_DATA_IND
+EL2 MSG_ID_EMAC_DL_CCCH_DATA_IND
+EL2 MSG_ID_LTM_EPDCP_UL_DATA_REDIR_IND
+EL2 MSG_ID_LTM_EPDCP_DATA_IND
+EL2 MSG_ID_LTM_EMAC_NEXT_DRX_IND
+EL2 MSG_ID_LTM_EPDCP_DATA_REQ
+EM MSG_ID_L4CPS_EM_UPDATE_REQ
+EM MSG_ID_L4CPS_EM_CELL_RESEL_SUSPEND_REQ
+EM MSG_ID_L4CPS_EM_CELL_RESEL_SUSPEND_CNF
+EM MSG_ID_L4CPS_EM_CELL_RESEL_RESUME_REQ
+EM MSG_ID_L4CPS_EM_CELL_RESEL_RESUME_CNF
+EM MSG_ID_L4CPS_EM_SET_CELL_LOCK_REQ
+EM MSG_ID_L4CPS_EM_SET_CELL_LOCK_CNF
+EM MSG_ID_L4CPS_EM_GET_CELL_LOCK_REQ
+EM MSG_ID_L4CPS_EM_GET_CELL_LOCK_CNF
+EM MSG_ID_L4CPS_EM_FEATURE_COMMAND_REQ
+EM MSG_ID_L4CPS_EM_FEATURE_COMMAND_CNF
+EM MSG_ID_L4CPS_EM_SET_CELL_ID_LOCK_REQ
+EM MSG_ID_L4CPS_EM_SET_CELL_ID_LOCK_CNF
+EM MSG_ID_DHLL4C_EM_UPDATE_REQ
+EM MSG_ID_L4CPS_EM_NW_EVENT_NOTIFY_REQ
+EM MSG_ID_L4CPS_EM_NW_EVENT_NOTIFY_CNF
+EM MSG_ID_L4CPS_EM_NW_EVENT_NOTIFY_IND
+EM MSG_ID_L4CPS_EM_UPDATE_CNF
+EM MSG_ID_L4C_VT_EM_GET_CONFIG_REQ
+EM MSG_ID_L4C_VT_EM_GET_CONFIG_CNF
+EM MSG_ID_L4C_VT_EM_SET_CONFIG_REQ
+EM MSG_ID_L4CL1_EM_RF_TEST_GSM_STOP_REQ
+EM MSG_ID_L4CL1_EM_RF_TEST_GSM_TX_TEST_REQ
+EM MSG_ID_L4CL1_EM_RF_TEST_GSM_RX_TEST_REQ
+EM MSG_ID_L4CL1_EM_RF_TEST_GSM_RX_TEST_TWO_PATH_REQ
+EM MSG_ID_L4CL1_EM_RF_TEST_GSM_POWER_SCAN_REQ
+EM MSG_ID_L4CL1_EM_RF_TEST_GSM_POWER_SCAN_CNF
+EM MSG_ID_L4CEL1_GET_RF_TEMPERATURE_REQ
+EM MSG_ID_L4CEL1_GET_RF_TEMPERATURE_CNF
+EM MSG_ID_L4CEL1_SET_RX_PATH_REQ
+EM MSG_ID_L4CEL1_SET_RX_PATH_CNF
+EM MSG_ID_L4CEL1_GET_TX_POWER_REQ
+EM MSG_ID_L4CEL1_GET_TX_POWER_CNF
+EM MSG_ID_L1_GSM_MAX_TX_PWR_RED_REQ
+EM MSG_ID_UL1_UMTS_MAX_TX_PWR_RED_REQ
+EM MSG_ID_EL1_LTE_MAX_TX_PWR_RED_REQ
+EM MSG_ID_L4CL1_GET_RF_TEMPERATURE_REQ
+EM MSG_ID_L4CL1_GET_RF_TEMPERATURE_CNF
+EM MSG_ID_L4CUL1_GET_RF_TEMPERATURE_REQ
+EM MSG_ID_L4CUL1_GET_RF_TEMPERATURE_CNF
+EM MSG_ID_L4CTL1_GET_RF_TEMPERATURE_REQ
+EM MSG_ID_L4CTL1_GET_RF_TEMPERATURE_CNF
+EM MSG_ID_L4C_EL1_EM_TST_CONTROL_REQ
+EM MSG_ID_L4C_EL1_EM_TST_CONTROL_CNF
+EM MSG_ID_EM_STATUS_BEGIN
+EM MSG_ID_L4CPS_EM_STATUS_IND
+EM MSG_ID_EM_URR_3G_GENERAL_STATUS_IND
+EM MSG_ID_EM_RRCE_TGPS_STATUS_IND
+EM MSG_ID_EM_RRCE_DCH_STATE_CONFIGURATION_STATUS_IND
+EM MSG_ID_EM_RRCE_FACH_STATE_CONFIGURATION_STATUS_IND
+EM MSG_ID_EM_RRCE_CS_OVER_HSPA_STATUS_IND
+EM MSG_ID_EM_UAS_3G_TDD128_HANDOVER_SEQUENCE_IND
+EM MSG_ID_EM_SLCE_SRNCID_STATUS_IND
+EM MSG_ID_EM_SLCE_PS_DATA_RATE_STATUS_IND
+EM MSG_ID_EM_CSCE_MULTIPLE_PLMN_IND
+EM MSG_ID_EM_CSCE_NEIGH_CELL_S_STATUS_IND
+EM MSG_ID_EM_CSCE_MEAS_RULE_STATUS_IND
+EM MSG_ID_EM_CSCE_APBCR_STATUS_IND
+EM MSG_ID_EM_CSCE_CELL_R_STATUS_IND
+EM MSG_ID_EM_CSCE_CELL_H_STATUS_IND
+EM MSG_ID_EM_CSCE_SERV_CELL_S_STATUS_IND
+EM MSG_ID_EM_SIBE_SIB_STATUS_IND
+EM MSG_ID_EM_MEME_DCH_H_SERVING_CELL_INFO_IND
+EM MSG_ID_EM_MEME_DCH_UMTS_CELL_INFO_IND
+EM MSG_ID_EM_MEME_DCH_BLER_INFO_IND
+EM MSG_ID_EM_MEME_DCH_GSM_CELL_INFO_IND
+EM MSG_ID_EM_MEME_DCH_LTE_CELL_INFO_IND
+EM MSG_ID_EM_MEME_EVENT_TYPE_1_PARAMETER_INFO_IND
+EM MSG_ID_EM_MEME_EVENT_TYPE_2_PARAMETER_INFO_IND
+EM MSG_ID_EM_MEME_EVENT_TYPE_3_PARAMETER_INFO_IND
+EM MSG_ID_EM_RRM_CELL_SELECT_PARA_INFO_IND
+EM MSG_ID_EM_RRM_CHANNEL_DESCR_INFO_IND
+EM MSG_ID_EM_RRM_CTRL_CHANNEL_DESCR_INFO_IND
+EM MSG_ID_EM_RRM_RACH_CTRL_PARA_INFO_IND
+EM MSG_ID_EM_RRM_LAI_INFO_IND
+EM MSG_ID_EM_RRM_RADIO_LINK_COUNTER_INFO_IND
+EM MSG_ID_EM_RRM_MEASUREMENT_REPORT_INFO_IND
+EM MSG_ID_EM_RRM_CA_LIST_INFO_IND
+EM MSG_ID_EM_RRM_CONTROL_MSG_INFO_IND
+EM MSG_ID_EM_RRM_SI2Q_INFO_IND
+EM MSG_ID_EM_RRM_MI_INFO_IND
+EM MSG_ID_EM_RRM_GPRS_GENERAL_INFO_IND
+EM MSG_ID_EM_RRM_IR_PARAMETER_STATUS_IND
+EM MSG_ID_EM_RRM_IR_RESELECT_STATUS_IND
+EM MSG_ID_EM_RRM_IR_3G_NEIGHBOR_MEAS_STATUS_IND
+EM MSG_ID_EM_RRM_IR_3G_NEIGHBOR_MEAS_INFO_IND
+EM MSG_ID_EM_RRM_IR_4G_NEIGHBOR_MEAS_STATUS_IND
+EM MSG_ID_EM_RRM_IR_4G_NEIGHBOR_MEAS_INFO_IND
+EM MSG_ID_EM_MAC_BLK_INFO_IND
+EM MSG_ID_EM_MAC_TBF_INFO_IND
+EM MSG_ID_EM_MAC_CONTROL_MSG_INFO_IND
+EM MSG_ID_EM_SM_NSAPI5_STATUS_IND
+EM MSG_ID_EM_SM_NSAPI6_STATUS_IND
+EM MSG_ID_EM_SM_NSAPI7_STATUS_IND
+EM MSG_ID_EM_SM_NSAPI8_STATUS_IND
+EM MSG_ID_EM_SM_NSAPI9_STATUS_IND
+EM MSG_ID_EM_SM_NSAPI10_STATUS_IND
+EM MSG_ID_EM_SM_NSAPI11_STATUS_IND
+EM MSG_ID_EM_SM_NSAPI12_STATUS_IND
+EM MSG_ID_EM_SM_NSAPI13_STATUS_IND
+EM MSG_ID_EM_SM_NSAPI14_STATUS_IND
+EM MSG_ID_EM_SM_NSAPI15_STATUS_IND
+EM MSG_ID_EM_ESM_ESM_INFO_IND
+EM MSG_ID_EM_ESM_L4C_ESM_INFO_IND
+EM MSG_ID_EM_EMM_REG_ATTACH_INFO_IND
+EM MSG_ID_EM_EMM_REG_DETACH_INFO_IND
+EM MSG_ID_EM_EMM_REG_TAU_INFO_IND
+EM MSG_ID_EM_EMM_REG_COMMON_INFO_IND
+EM MSG_ID_EM_EMM_SEC_INFO_IND
+EM MSG_ID_EM_EMM_TIMERMNG_INFO_IND
+EM MSG_ID_EM_EMM_USIMSRV_INFO_IND
+EM MSG_ID_EM_EMM_NVMSRV_INFO_IND
+EM MSG_ID_EM_EMM_CALL_INFO_IND
+EM MSG_ID_EM_EMM_CONN_INFO_IND
+EM MSG_ID_EM_EMM_NASMSG_INFO_IND
+EM MSG_ID_EM_EMM_PLMNSEL_INFO_IND
+EM MSG_ID_EM_EMM_SV_INFO_IND
+EM MSG_ID_EM_EMM_RATBAND_INFO_IND
+EM MSG_ID_EM_EMM_L4C_EMM_INFO_IND
+EM MSG_ID_EM_CC_CALL_INFO_IND
+EM MSG_ID_EM_CC_CHANNEL_INFO_IND
+EM MSG_ID_EM_CC_CALL_MT_SETUP_INFO_IND
+EM MSG_ID_EM_NWSEL_PLMN_INFO_IND
+EM MSG_ID_EM_MM_INFO_IND
+EM MSG_ID_EM_GMM_INFO_IND
+EM MSG_ID_EM_LLC_STATUS_IND
+EM MSG_ID_EM_CSR_STATUS_IND
+EM MSG_ID_EM_RAC_INFO_IND
+EM MSG_ID_EM_UL1_HS_DSCH_CONFIG_IND
+EM MSG_ID_EM_UL1_EDCH_CONFIG_IND
+EM MSG_ID_EM_UL1_CPC_CONFIG_IND
+EM MSG_ID_EM_UL1_SEC_HS_DSCH_CONFIG_IND
+EM MSG_ID_EM_UL1_PRI_HS_DSCH_BLER_IND
+EM MSG_ID_EM_UL1_SEC_HS_DSCH_BLER_IND
+EM MSG_ID_EM_UL1_EDCH_ACK_RATE_IND
+EM MSG_ID_EM_UL2_ADM_POOL_STATUS_IND
+EM MSG_ID_EM_UL2_PS_DATA_RATE_STATUS_IND
+EM MSG_ID_EM_UL2_HSDSCH_RECONFIG_STATUS_IND
+EM MSG_ID_EM_UL2_URLC_EVENT_STATUS_IND
+EM MSG_ID_EM_UL2_3G_BLER_IND
+EM MSG_ID_EM_UL2_HSUPA_SI_IND
+EM MSG_ID_TDD_EM_UL2_PCH_CRC_IND
+EM MSG_ID_EM_ERRC_MOB_MEAS_INTRARAT_INFO_IND
+EM MSG_ID_EM_ERRC_MOB_MEAS_INTERRAT_UTRAN_INFO_IND
+EM MSG_ID_EM_ERRC_MOB_MEAS_INTERRAT_GERAN_INFO_IND
+EM MSG_ID_EM_ERRC_MOB_MEAS_INTERRAT_C2K_INFO_IND
+EM MSG_ID_EM_ERRC_AUTOS_CSG_INFO_IND
+EM MSG_ID_EM_ERRC_CARRS_EVENT_IND
+EM MSG_ID_EM_ERRC_SIB_EVENT_IND
+EM MSG_ID_EM_ERRC_MOB_EVENT_IND
+EM MSG_ID_EM_ERRC_SEC_PARAM_IND
+EM MSG_ID_EM_ERRC_REEST_INFO_IND
+EM MSG_ID_EM_ERRC_RECONF_INFO_IND
+EM MSG_ID_EM_ERRC_RCM_SIM_STS_INFO_IND
+EM MSG_ID_EM_ERRC_SYS_SIB_RX_STS_INFO_IND
+EM MSG_ID_EM_ERRC_STATE_IND
+EM MSG_ID_EM_ERRC_OVER_PROC_DELAY_WARNING_IND
+EM MSG_ID_EM_LTE_SUPPORTED_BAND_INFO_IND
+EM MSG_ID_EM_ERRC_SUCCESS_RATE_KPI_IND
+EM MSG_ID_EM_EL2_OV_STATUS_IND
+EM MSG_ID_EM_EL1_OV_STATUS_IND
+EM MSG_ID_EM_B3B39_OV_STATUS_IND
+EM MSG_ID_EM_QBM_STATUS_IND
+EM MSG_ID_EM_UPCM_STATUS_IND
+EM MSG_ID_EM_EL1TX_STATUS_IND
+EM MSG_ID_EM_CODE_END
+EMM MSG_ID_EVAL_EMM_SET_RAT_MODE_REQ
+EMM MSG_ID_EVAL_EMM_ATTACH_REQ
+EMM MSG_ID_EVAL_EMM_DETACH_REQ
+EMM MSG_ID_EVAL_EMM_EMC_ATTACH_REQ
+EMM MSG_ID_EVAL_EMM_INIT_REQ
+EMM MSG_ID_EVAL_EMM_RFOFF_REQ
+EMM MSG_ID_EVAL_EMM_UEMODE_PARAM_UPDATE_REQ
+EMM MSG_ID_EVAL_EMM_SET_PREFERRED_BAND_REQ
+EMM MSG_ID_EVAL_EMM_PLMN_SEARCH_REQ
+EMM MSG_ID_EVAL_EMM_DEACTIVATE_REQ
+EMM MSG_ID_EVAL_EMM_NAS_CTXT_TRANSFER_REQ
+EMM MSG_ID_EVAL_EMM_SEARCH_STATUS_UPDATE_REQ
+EMM MSG_ID_EVAL_EMM_SYS_INFO_UPDATE_REQ
+EMM MSG_ID_EVAL_EMM_REGN_STATUS_UPDATE_REQ
+EMM MSG_ID_EVAL_EMM_PLMN_LIST_REQ
+EMM MSG_ID_EVAL_EMM_PLMN_LIST_STOP_REQ
+EMM MSG_ID_EVAL_EMM_CSG_LIST_REQ
+EMM MSG_ID_EVAL_EMM_CSG_LIST_STOP_REQ
+EMM MSG_ID_EVAL_EMM_EMC_FPLMN_LIST_UPDATE_REQ
+EMM MSG_ID_EVAL_EMM_EQ_PLMN_LIST_UPDATE_REQ
+EMM MSG_ID_EVAL_EMM_RPLMN_EQ_PLMN_LIST_UPDATE_REQ
+EMM MSG_ID_EVAL_EMM_HPLMN_INFO_UPDATE_REQ
+EMM MSG_ID_EVAL_EMM_SMS_EST_REQ
+EMM MSG_ID_EVAL_EMM_SMS_UNITDATA_REQ
+EMM MSG_ID_EVAL_EMM_LCS_DATA_REQ
+EMM MSG_ID_EVAL_EMM_LPP_DATA_REQ
+EMM MSG_ID_EVAL_EMM_SIM_READY_REQ
+EMM MSG_ID_EVAL_EMM_AUTHENTICATE_RSP
+EMM MSG_ID_EVAL_EMM_SIM_ERROR_REQ
+EMM MSG_ID_EVAL_EMM_SIM_FILE_UPDATE_REQ
+EMM MSG_ID_EVAL_EMM_SEARCH_PREFERENCE_UPDATE_REQ
+EMM MSG_ID_EVAL_EMM_RESUME_REQ
+EMM MSG_ID_EVAL_EMM_ACTIVE_SIM_INFO_REQ
+EMM MSG_ID_ESM_EMM_EST_REQ
+EMM MSG_ID_ESM_EMM_GET_ESM_CAUSE_RSP
+EMM MSG_ID_ESM_EMM_SYNC_EPSB_STATUS_REQ
+EMM MSG_ID_ESM_EMM_GET_EPSB_STATUS_RSP
+EMM MSG_ID_ESM_EMM_DETACH_REQ
+EMM MSG_ID_ESM_EMM_ISR_DEACT_REQ
+EMM MSG_ID_ESM_EMM_QOSLABEL_UPDATE_REQ
+EMM MSG_ID_ESM_EMM_DATA_REQ
+EMM MSG_ID_ESM_EMM_REEST_REQ
+EMM MSG_ID_ESM_EMM_ABORT_REQ
+EMM MSG_ID_ESM_EMM_RAT_CHANGE_RSP
+EMM MSG_ID_ESM_EMM_RAT_CHANGE_REQ
+EMM MSG_ID_ESM_EMM_RAT_CHANGE_EPSB_STATUS_REQ
+EMM MSG_ID_ESM_EMM_EMC_BEARER_STATUS_REQ
+EMM MSG_ID_ESM_EMM_UPDATE_EPSB_STATUS_RSP
+EMM MSG_ID_ESM_EMM_ENTER_EMC_ATTACH_RSP
+EMM MSG_ID_EMM_ERRC_ACTIVATION_CNF
+EMM MSG_ID_EMM_ERRC_RAT_BAND_CNF
+EMM MSG_ID_EMM_ERRC_ESTABLISH_CNF
+EMM MSG_ID_EMM_ERRC_RELEASE_CNF
+EMM MSG_ID_EMM_ERRC_RELEASE_IND
+EMM MSG_ID_EMM_ERRC_DATA_CNF
+EMM MSG_ID_EMM_ERRC_DATA_IND
+EMM MSG_ID_EMM_ERRC_EPSBEARER_DATA_IND
+EMM MSG_ID_EMM_ERRC_AC_STATUS_IND
+EMM MSG_ID_EMM_ERRC_KEY_UPDATE_CNF
+EMM MSG_ID_EMM_ERRC_TEST_CNF
+EMM MSG_ID_EMM_ERRC_OOS_IND
+EMM MSG_ID_EMM_ERRC_CELLSELECT_CNF
+EMM MSG_ID_EMM_ERRC_CELLSELECT_IND
+EMM MSG_ID_EMM_ERRC_PLMNLIST_CNF
+EMM MSG_ID_EMM_ERRC_RESUME_CNF
+EMM MSG_ID_EMM_ERRC_PAGE_IND
+EMM MSG_ID_EMM_ERRC_EXCLUSIVE_CONTROL_CNF
+EMM MSG_ID_EMM_ERRC_RAT_CHANGE_CNF
+EMM MSG_ID_EMM_ERRC_RAT_CHANGE_IND
+EMM MSG_ID_EMM_ERRC_CSFB_FAILURE_IND
+EMM MSG_ID_EMM_ERRC_STANDBY_CNF
+EMM MSG_ID_EMM_ERRC_STANDBY_IND
+EMM MSG_ID_EMM_ERRC_PARAM_UPDATE_CNF
+EMM MSG_ID_EMM_ERRC_QOS_UPDATE_CNF
+EMM MSG_ID_EMM_ERRC_SIGNAL_APPEAR_IND
+EMM MSG_ID_EMM_ERRC_CSG_LIST_CNF
+EMM MSG_ID_EMM_ERRC_CSG_LIST_STOP_CNF
+EMM MSG_ID_EMM_ERRC_STATUS_UPDATE_CNF
+EMM MSG_ID_EMM_ERRC_SKIP_IRCCO_STAGE2_IND
+EMM MSG_ID_EMM_ERRC_CELL_CHANGE_IND
+EMM MSG_ID_EMM_ERRC_GEMINI_SUSPEND_IND
+EMM MSG_ID_MM_EMM_INIT_NAS_CTXT_RSP
+EMM MSG_ID_MM_EMM_GMM_UPDATE_REGISTRATION_REQ
+EMM MSG_ID_MM_EMM_GMM_UPDATE_DEREGISTRATION_REQ
+EMM MSG_ID_MM_EMM_MM_UPDATE_REGISTRATION_REQ
+EMM MSG_ID_MM_EMM_MM_UPDATE_DEREGISTRATION_REQ
+EMM MSG_ID_MM_EMM_CSFB_REQ
+EMM MSG_ID_MM_EMM_CSFB_STOP_REQ
+EMM MSG_ID_MM_EMM_CSFB_PAGE_RSP
+EMM MSG_ID_MM_EMM_ISR_UPDATE_REQ
+EMM MSG_ID_MM_EMM_UPDATE_SECURITY_STATUS_IND
+EMM MSG_ID_EMM_ESMIF_CALL_DATA_REQ
+EMM MSG_ID_EMM_ESMIF_CALL_REEST_REQ
+EMM MSG_ID_EMM_ESMIF_CALL_BEARER_IND
+EMM MSG_ID_EMM_ESMIF_CALL_ABORT_REQ
+EMM MSG_ID_EMM_ERRCIF_CALL_STMSI_PAGE_IND
+EMM MSG_ID_EMM_ERRCIF_CALL_CS_PAGE_IND
+EMM MSG_ID_EMM_ERRCIF_CALL_CSFB_FAILURE_IND
+EMM MSG_ID_EMM_ERRCIF_CALL_RCV_EPSBEARER_IND
+EMM MSG_ID_EMM_ERRCIF_CALL_SND_NASMSG_CNF
+EMM MSG_ID_EMM_MMIF_CALL_CSFB_REQ
+EMM MSG_ID_EMM_MMIF_CALL_CSFB_STOP_REQ
+EMM MSG_ID_EMM_MMIF_CALL_CSFB_PAGE_RSP
+EMM MSG_ID_EMM_EVALIF_CALL_SMS_EST_REQ
+EMM MSG_ID_EMM_EVALIF_CALL_SMS_UNITDATA_REQ
+EMM MSG_ID_EMM_EVALIF_CALL_LCS_DATA_REQ
+EMM MSG_ID_EMM_EVALIF_CALL_LPP_DATA_REQ
+EMM MSG_ID_EMM_TIMERMNG_CALL_T3417EXT_TIMEOUT_IND
+EMM MSG_ID_EMM_TIMERMNG_CALL_T_CSFB_TIMEOUT_IND
+EMM MSG_ID_EMM_TIMERMNG_CALL_T3417_TIMEOUT_IND
+EMM MSG_ID_EMM_TIMERMNG_CALL_T3442_TIMEOUT_IND
+EMM MSG_ID_EMM_REG_CALL_ATTACH_RESULT_IND
+EMM MSG_ID_EMM_REG_CALL_CS_NW_DETACH_IND
+EMM MSG_ID_EMM_REG_CALL_REL_EPSB_CTXT_IND
+EMM MSG_ID_EMM_REG_CALL_SND_ESMMSG_CNF
+EMM MSG_ID_EMM_REG_CALL_TAU_PENDING_IND
+EMM MSG_ID_EMM_REG_CALL_SUSPEND_SR_REQ
+EMM MSG_ID_EMM_REG_CALL_RESUME_SR_REQ
+EMM MSG_ID_EMM_REG_CALL_UE_DETACH_IND
+EMM MSG_ID_EMM_PLMNSEL_CALL_CONOOS_LEAVELTE_IND
+EMM MSG_ID_EMM_PLMNSEL_CALL_CELL_INFO_IND
+EMM MSG_ID_EMM_PLMNSEL_CALL_NO_CELL_INFO_IND
+EMM MSG_ID_EMM_PLMNSEL_CALL_CAMPON_2G3G_IND
+EMM MSG_ID_EMM_PLMNSEL_CALL_GEMINI_SUSPEND_IND
+EMM MSG_ID_EMM_RATCHG_CALL_RAT_LTESBY_IND
+EMM MSG_ID_EMM_RATCHG_CALL_RAT_E2UG_FAIL_IND
+EMM MSG_ID_EMM_RATCHG_CALL_AS_CONTROL_CNF
+EMM MSG_ID_EMM_PLMNSEL_CALL_EMC_STATUS_UPDATE_IND
+EMM MSG_ID_EMM_RATCHG_CALL_IRAT_E2UG_COMP_IND
+EMM MSG_ID_EMM_RATCHG_CALL_IRAT_E2UG_FAIL_IND
+EMM MSG_ID_EMM_CONN_CALL_REL_IND
+EMM MSG_ID_EMM_CONN_CALL_EST_CNF
+EMM MSG_ID_EMM_CONN_CALL_AC_STATUS_IND
+EMM MSG_ID_EMM_NASMSG_CALL_RCV_CS_SERVICE_NOTIFICATION_IND
+EMM MSG_ID_EMM_NASMSG_CALL_RCV_SERVICE_REJ_IND
+EMM MSG_ID_EMM_EVTCTRL_CALL_ABORT_REQ
+EMM MSG_ID_EMM_EVTCTRL_CALL_SUSPEND_REQ
+EMM MSG_ID_EMM_EVTCTRL_CALL_RESUME_REQ
+EMM MSG_ID_EMM_EVTCTRL_CALL_CONTINUE_REQ
+EMM MSG_ID_EMM_EVTCTRL_CALL_WDT_POLLING_REQ
+EMM MSG_ID_EMM_CALL_UT_CFG_REQ
+EMM MSG_ID_EMM_ERRCIF_CMNPROC_SND_NASMSG_CNF
+EMM MSG_ID_EMM_NASMSG_CMNPROC_RCV_IDENTITY_REQUEST_IND
+EMM MSG_ID_EMM_NASMSG_CMNPROC_RCV_EMM_INFORMATION_IND
+EMM MSG_ID_EMM_NASMSG_CMNPROC_RCV_EMM_STATUS_IND
+EMM MSG_ID_EMM_NASMSG_CMNPROC_RCV_GUTI_REALLOC_CMD_IND
+EMM MSG_ID_EMM_PLMNSEL_CMNPROC_CELL_INFO_IND
+EMM MSG_ID_EMM_ANY_CMNPROC_UT_CONFIG_REQ
+EMM MSG_ID_EMM_CALL_CONN_REL_REQ
+EMM MSG_ID_EMM_CALL_CONN_EST_REQ
+EMM MSG_ID_EMM_ERRCIF_CONN_ESTABLISH_CNF
+EMM MSG_ID_EMM_ERRCIF_CONN_RELEASE_IND
+EMM MSG_ID_EMM_ERRCIF_CONN_RELEASE_CNF
+EMM MSG_ID_EMM_ERRCIF_CONN_AC_STATUS_IND
+EMM MSG_ID_EMM_NASMSG_CONN_T3440_STOP_REQ
+EMM MSG_ID_EMM_PLMNSEL_CONN_CELL_INFO_IND
+EMM MSG_ID_EMM_PLMNSEL_CONN_REL_REQ
+EMM MSG_ID_EMM_PLMNSEL_CONN_GEMINI_SUSPEND_IND
+EMM MSG_ID_EMM_RATCHG_CONN_EST_REQ
+EMM MSG_ID_EMM_RATCHG_CONN_REL_REQ
+EMM MSG_ID_EMM_RATCHG_CONN_IRAT_E2UG_COMP_IND
+EMM MSG_ID_EMM_RATCHG_CONN_STANDBY_IND
+EMM MSG_ID_EMM_RATCHG_CONN_RAT_HO_U2E_COMP_IND
+EMM MSG_ID_EMM_REG_CONN_REL_REQ
+EMM MSG_ID_EMM_REG_CONN_EST_REQ
+EMM MSG_ID_EMM_REG_CONN_REL_RSP
+EMM MSG_ID_EMM_REG_CONN_T3440_STOP_REQ
+EMM MSG_ID_EMM_REG_CONN_WAIT_REL_CON_REQ
+EMM MSG_ID_EMM_SEC_CONN_REL_REQ
+EMM MSG_ID_EMM_TIMERMNG_CONN_T3440_TIMEOUT_IND
+EMM MSG_ID_EMM_TIMERMNG_CONN_DEREG_REL_TIMEOUT_IND
+EMM MSG_ID_EMM_CONN_UT_SETTING_CHANGE_IND
+EMM MSG_ID_EMM_REG_ERRCIF_PARAM_UPDATE_REQ
+EMM MSG_ID_EMM_REG_ERRCIF_CSG_WHITE_LIST_UPDT_REQ
+EMM MSG_ID_EMM_REG_ERRCIF_GEMINI_LR_REQ
+EMM MSG_ID_EMM_CALL_ERRCIF_CSG_WHITE_LIST_UPDT_REQ
+EMM MSG_ID_EMM_CALL_ERRCIF_PARAM_UPDATE_REQ
+EMM MSG_ID_EMM_CALL_ERRCIF_CSFB_NTF
+EMM MSG_ID_EMM_PLMNSEL_ERRCIF_PLMNLIST_REQ
+EMM MSG_ID_EMM_PLMNSEL_ERRCIF_CSG_LIST_REQ
+EMM MSG_ID_EMM_PLMNSEL_ERRCIF_CSG_LIST_STOP_REQ
+EMM MSG_ID_EMM_PLMNSEL_ERRCIF_CELLSELECT_REQ
+EMM MSG_ID_EMM_PLMNSEL_ERRCIF_NWSEL_STATUS_UPDATE_REQ
+EMM MSG_ID_EMM_PLMNSEL_ERRCIF_PARAM_UPDATE_REQ
+EMM MSG_ID_EMM_PLMNSEL_ERRCIF_SEARCH_PREFERENCE_UPDATE_REQ
+EMM MSG_ID_EMM_PLMNSEL_ERRCIF_CSG_WHITE_LIST_UPDT_REQ
+EMM MSG_ID_EMM_PLMNSEL_ERRCIF_CHECK_SERVING_SUITABILITY_REQ
+EMM MSG_ID_EMM_RATCHG_ERRCIF_RAT_CHANGE_REQ
+EMM MSG_ID_EMM_RATCHG_ERRCIF_RAT_CHANGE_RSP
+EMM MSG_ID_EMM_RATCHG_ERRCIF_STANDBY_REQ
+EMM MSG_ID_EMM_RATCHG_ERRCIF_RESUME_REQ
+EMM MSG_ID_EMM_RATCHG_ERRCIF_REG_STATUS_UPDATE_REQ
+EMM MSG_ID_EMM_RATCHG_ERRCIF_RAT_CHANGE_CAUSE_UPDATE_REQ
+EMM MSG_ID_EMM_SEC_ERRCIF_KEY_UPDATE_REQ
+EMM MSG_ID_EMM_SEC_ERRCIF_PARAM_UPDATE_REQ
+EMM MSG_ID_EMM_SEC_ERRCIF_NULL_SECURITY_ACCEPT_REQ
+EMM MSG_ID_EMM_CONN_ERRCIF_ESTABLISH_REQ
+EMM MSG_ID_EMM_CONN_ERRCIF_RELEASE_REQ
+EMM MSG_ID_EMM_CONN_ERRCIF_RELEASE_RSP
+EMM MSG_ID_EMM_CONN_ERRCIF_PARAM_UPDATE_REQ
+EMM MSG_ID_EMM_CMNPROC_ERRCIF_PARAM_UPDATE_REQ
+EMM MSG_ID_EMM_NASMSG_ERRCIF_DATA_REQ
+EMM MSG_ID_EMM_ESMIF_ERRCIF_QOSLABEL_UPDATE_REQ
+EMM MSG_ID_EMM_SV_ERRCIF_ACTIVATION_REQ
+EMM MSG_ID_EMM_SV_ERRCIF_REG_STATUS_UPDATE_REQ
+EMM MSG_ID_EMM_SV_ERRCIF_CSG_WHITE_LIST_UPDT_REQ
+EMM MSG_ID_EMM_SV_ERRCIF_SIM_FILE_UPDATE_REQ
+EMM MSG_ID_EMM_RATBAND_ERRCIF_RAT_BAND_REQ
+EMM MSG_ID_EMM_ETCIF_ERRCIF_TEST_REQ
+EMM MSG_ID_EMM_CALL_ERRCIF_GEMINI_CSFB_STATUS_REQ
+EMM MSG_ID_EMM_ERRCIF_UT_CONFIG_REQ
+EMM MSG_ID_EMM_ERRCIF_UT_STATUS_IND
+EMM MSG_ID_EMM_REG_ESMIF_GET_EPSB_STATUS_IND
+EMM MSG_ID_EMM_REG_ESMIF_DATA_RESUME_IND
+EMM MSG_ID_EMM_REG_ESMIF_DATA_SUSPEND_IND
+EMM MSG_ID_EMM_REG_ESMIF_URGE_TO_EST_IND
+EMM MSG_ID_EMM_REG_ESMIF_UPDATE_EPSB_STATUS_IND
+EMM MSG_ID_EMM_REG_ESMIF_DEREG_IND
+EMM MSG_ID_EMM_REG_ESMIF_GET_ESM_CAUSE_IND
+EMM MSG_ID_EMM_REG_ESMIF_EMC_ATTACH_REJ_IND
+EMM MSG_ID_EMM_REG_ESMIF_URGE_TO_EMC_EST_IND
+EMM MSG_ID_EMM_REG_ESMIF_EMC_DATA_FAIL_IND
+EMM MSG_ID_EMM_CALL_ESMIF_DATA_CNF
+EMM MSG_ID_EMM_CALL_ESMIF_DATA_SEND_IND
+EMM MSG_ID_EMM_CALL_ESMIF_REEST_REJ
+EMM MSG_ID_EMM_CALL_ESMIF_ABORT_CNF
+EMM MSG_ID_EMM_RATCHG_ESMIF_RAT_CHANGE_IND
+EMM MSG_ID_EMM_RATCHG_ESMIF_RAT_CHANGE_CNF
+EMM MSG_ID_EMM_CONN_ESMIF_CONN_RELEASE_IND
+EMM MSG_ID_EMM_NASMSG_ESMIF_EPSBEARER_DATA_IND
+EMM MSG_ID_EMM_NASMSG_ESMIF_DATA_IND
+EMM MSG_ID_EMM_SEC_ESMIF_ENTER_EMC_ATTACH_IND
+EMM MSG_ID_EMM_ERRCIF_ETCIF_DATA_CNF
+EMM MSG_ID_EMM_NASMSG_ETCIF_DATA_IND
+EMM MSG_ID_EMM_ERRCIF_ETCIF_TEST_CNF
+EMM MSG_ID_EMM_REG_ETCIF_DETACH_IND
+EMM MSG_ID_EMM_CONN_ETCIF_REL_IND
+EMM MSG_ID_EMM_SV_ETCIF_POWER_DOWN_IND
+EMM MSG_ID_EMM_REG_EVALIF_DETACH_IND
+EMM MSG_ID_EMM_REG_EVALIF_ATTACH_CNF
+EMM MSG_ID_EMM_REG_EVALIF_NW_ECC_IND
+EMM MSG_ID_EMM_REG_EVALIF_REGN_RESULT_IND
+EMM MSG_ID_EMM_REG_EVALIF_NW_REJECT_IND
+EMM MSG_ID_EMM_REG_EVALIF_NW_FEATURE_SUPPORT_IND
+EMM MSG_ID_EMM_REG_EVALIF_EMC_ATTACH_CNF
+EMM MSG_ID_EMM_REG_EVALIF_EMC_DETACH_IND
+EMM MSG_ID_EMM_CALL_EVALIF_SMS_EST_CNF
+EMM MSG_ID_EMM_CALL_EVALIF_SMS_EST_REJ
+EMM MSG_ID_EMM_CALL_EVALIF_SMS_ERR_IND
+EMM MSG_ID_EMM_CALL_EVALIF_LCS_DATA_CNF
+EMM MSG_ID_EMM_CALL_EVALIF_LPP_DATA_CNF
+EMM MSG_ID_EMM_PLMNSEL_EVALIF_PLMN_LIST_CNF
+EMM MSG_ID_EMM_PLMNSEL_EVALIF_PLMN_LIST_STOP_CNF
+EMM MSG_ID_EMM_PLMNSEL_EVALIF_PLMN_SEARCH_CNF
+EMM MSG_ID_EMM_PLMNSEL_EVALIF_PLMN_SEARCH_IND
+EMM MSG_ID_EMM_PLMNSEL_EVALIF_SYS_INFO_IND
+EMM MSG_ID_EMM_PLMNSEL_EVALIF_PLMN_LOSS_IND
+EMM MSG_ID_EMM_PLMNSEL_EVALIF_OUT_OF_SERVICE_IND
+EMM MSG_ID_EMM_PLMNSEL_EVALIF_NO_ACTION_IND
+EMM MSG_ID_EMM_PLMNSEL_EVALIF_CSG_LIST_CNF
+EMM MSG_ID_EMM_PLMNSEL_EVALIF_CSG_LIST_STOP_CNF
+EMM MSG_ID_EMM_PLMNSEL_EVALIF_SIGNAL_APPEAR_IND
+EMM MSG_ID_EMM_PLMNSEL_EVALIF_REGN_RESULT_IND
+EMM MSG_ID_EMM_PLMNSEL_EVALIF_CELL_INFO_UPDATE_IND
+EMM MSG_ID_EMM_PLMNSEL_EVALIF_DETACH_IND
+EMM MSG_ID_EMM_PLMNSEL_EVALIF_EMERGENCY_STATUS_UPDATE_IND
+EMM MSG_ID_EMM_RATCHG_EVALIF_DEACTIVATE_CNF
+EMM MSG_ID_EMM_RATCHG_EVALIF_NAS_CTXT_TRANSFER_CNF
+EMM MSG_ID_EMM_RATCHG_EVALIF_SRVCC_STATUS_UPDATE_IND
+EMM MSG_ID_EMM_SEC_EVALIF_AUTHENTICATE_IND
+EMM MSG_ID_EMM_CMNPROC_EVALIF_NW_INFO_IND
+EMM MSG_ID_EMM_RATBAND_EVALIF_SET_RAT_MODE_CNF
+EMM MSG_ID_EMM_RATBAND_EVALIF_RFOFF_CNF
+EMM MSG_ID_EMM_RATBAND_EVALIF_SET_PREFERRED_BAND_REQ
+EMM MSG_ID_EMM_NASMSG_EVALIF_SMS_UNITDATA_IND
+EMM MSG_ID_EMM_NASMSG_EVALIF_LPP_DATA_IND
+EMM MSG_ID_EMM_NASMSG_EVALIF_LCS_DATA_IND
+EMM MSG_ID_EMM_SV_EVTCTRL_END_IND
+EMM MSG_ID_EMM_RATBAND_EVTCTRL_END_IND
+EMM MSG_ID_EMM_RATCHG_EVTCTRL_END_IND
+EMM MSG_ID_EMM_REG_EVTCTRL_END_IND
+EMM MSG_ID_EMM_CALL_EVTCTRL_END_IND
+EMM MSG_ID_EMM_PLMNSEL_EVTCTRL_END_IND
+EMM MSG_ID_EMM_SV_EVTCTRL_ABORT_CNF
+EMM MSG_ID_EMM_RATBAND_EVTCTRL_ABORT_CNF
+EMM MSG_ID_EMM_RATCHG_EVTCTRL_ABORT_CNF
+EMM MSG_ID_EMM_REG_EVTCTRL_ABORT_CNF
+EMM MSG_ID_EMM_CALL_EVTCTRL_ABORT_CNF
+EMM MSG_ID_EMM_PLMNSEL_EVTCTRL_ABORT_CNF
+EMM MSG_ID_EMM_SV_EVTCTRL_SUSPEND_CNF
+EMM MSG_ID_EMM_RATBAND_EVTCTRL_SUSPEND_CNF
+EMM MSG_ID_EMM_RATCHG_EVTCTRL_SUSPEND_CNF
+EMM MSG_ID_EMM_REG_EVTCTRL_SUSPEND_CNF
+EMM MSG_ID_EMM_CALL_EVTCTRL_SUSPEND_CNF
+EMM MSG_ID_EMM_PLMNSEL_EVTCTRL_SUSPEND_CNF
+EMM MSG_ID_EMM_TIMERMNG_EVTCTRL_WDT_TIMEOUT_IND
+EMM MSG_ID_EMM_EVTCTRL_UT_START_REQ
+EMM MSG_ID_EMM_EVTCTRL_UT_STOP_REQ
+EMM MSG_ID_EMM_EVTCTRL_UT_STATE_SET_REQ
+EMM MSG_ID_EMM_EVTCTRL_UT_EVENT_START_REQ
+EMM MSG_ID_EMM_EVTCTRL_UT_PUBLIC_API_REQ
+EMM MSG_ID_EMM_EVTCTRL_UT_PUBLIC_API_CNF
+EMM MSG_ID_EMM_REG_MMIF_ISR_UPDATE_IND
+EMM MSG_ID_EMM_REG_MMIF_EMM_UPDATE_REGISTRATION_IND
+EMM MSG_ID_EMM_REG_MMIF_EMM_UPDATE_DEREGISTRATION_IND
+EMM MSG_ID_EMM_CALL_MMIF_CSFB_CNF
+EMM MSG_ID_EMM_CALL_MMIF_CSFB_PAGE_IND
+EMM MSG_ID_EMM_RATCHG_MMIF_INIT_NAS_CTXT_IND
+EMM MSG_ID_EMM_CALL_NASMSG_SND_NASMSG_REQ
+EMM MSG_ID_EMM_CALL_NASMSG_SND_SERV_REQ
+EMM MSG_ID_EMM_REG_NASMSG_SND_NASMSG_REQ
+EMM MSG_ID_EMM_REG_NASMSG_SND_ESM_MSG_REQ
+EMM MSG_ID_EMM_REG_NASMSG_ACCEPT_FAILURE_IND
+EMM MSG_ID_EMM_SEC_NASMSG_SND_NASMSG_REQ
+EMM MSG_ID_EMM_SEC_NASMSG_EXCHG_REEST_CNF
+EMM MSG_ID_EMM_CMNPROC_NASMSG_SND_NASMSG_REQ
+EMM MSG_ID_EMM_ERRCIF_NASMSG_EPSBEARER_DATA_IND
+EMM MSG_ID_EMM_ERRCIF_NASMSG_DATA_IND
+EMM MSG_ID_EMM_NASMSG_UT_SETTING_CHANGE_IND
+EMM MSG_ID_EMM_ETCIF_NASMSG_DATA_REQ
+EMM MSG_ID_EMM_PLMNSEL_NASMSG_CELL_INFO_IND
+EMM MSG_ID_EMM_ERRCIF_NASMSG_CELL_CHANGE_IND
+EMM MSG_ID_EMM_CONN_NASMSG_REL_IND
+EMM MSG_ID_EMM_EVALIF_PLMNSEL_PLMN_LIST_REQ
+EMM MSG_ID_EMM_EVALIF_PLMNSEL_PLMN_LIST_STOP_REQ
+EMM MSG_ID_EMM_EVALIF_PLMNSEL_PLMN_SEARCH_REQ
+EMM MSG_ID_EMM_EVALIF_PLMNSEL_SYS_INFO_UPDATE_REQ
+EMM MSG_ID_EMM_EVALIF_PLMNSEL_SEARCH_STATUS_UPDATE_REQ
+EMM MSG_ID_EMM_EVALIF_PLMNSEL_CSG_LIST_REQ
+EMM MSG_ID_EMM_EVALIF_PLMNSEL_CSG_LIST_STOP_REQ
+EMM MSG_ID_EMM_EVALIF_PLMNSEL_EMC_FPLMN_LIST_UPDATE_REQ
+EMM MSG_ID_EMM_EVALIF_PLMNSEL_EQ_PLMN_LIST_UPDATE_REQ
+EMM MSG_ID_EMM_EVALIF_PLMNSEL_RPLMN_EQ_PLMN_LIST_UPDATE_REQ
+EMM MSG_ID_EMM_EVALIF_PLMNSEL_HPLMN_INFO_UPDATE_REQ
+EMM MSG_ID_EMM_EVALIF_PLMNSEL_REGN_STATUS_UPDATE_REQ
+EMM MSG_ID_EMM_EVALIF_PLMNSEL_SEARCH_PREFERENCE_UPDATE_REQ
+EMM MSG_ID_EMM_EVALIF_PLMNSEL_RESUME_REQ
+EMM MSG_ID_EMM_ERRCIF_PLMNSEL_PLMNLIST_CNF
+EMM MSG_ID_EMM_ERRCIF_PLMNSEL_CSG_LIST_CNF
+EMM MSG_ID_EMM_ERRCIF_PLMNSEL_CSG_LIST_STOP_CNF
+EMM MSG_ID_EMM_ERRCIF_PLMNSEL_CELLSELECT_CNF
+EMM MSG_ID_EMM_ERRCIF_PLMNSEL_CELLSELECT_IND
+EMM MSG_ID_EMM_ERRCIF_PLMNSEL_OOS_IND
+EMM MSG_ID_EMM_ERRCIF_PLMNSEL_SIGNAL_APPEAR_IND
+EMM MSG_ID_EMM_ESMIF_PLMNSEL_EMC_BEARER_STATUS_REQ
+EMM MSG_ID_EMM_ERRCIF_PLMNSEL_GEMINI_SUSPEND_IND
+EMM MSG_ID_EMM_RATCHG_PLMNSEL_AS_CONTROL_CNF
+EMM MSG_ID_EMM_RATCHG_PLMNSEL_RAT_HO_E2U_IND
+EMM MSG_ID_EMM_RATCHG_PLMNSEL_PROC_ASSBY_IND
+EMM MSG_ID_EMM_RATCHG_PLMNSEL_IRAT_UG2E_IND
+EMM MSG_ID_EMM_RATCHG_PLMNSEL_REDIR_E2UG_FAIL_IND
+EMM MSG_ID_EMM_RATCHG_PLMNSEL_RAT_LTESBY_IND
+EMM MSG_ID_EMM_RATCHG_PLMNSEL_IRAT_E2UG_COMP_IND
+EMM MSG_ID_EMM_RATCHG_PLMNSEL_STANDBY_IND
+EMM MSG_ID_EMM_CALL_PLMNSEL_SEARCH_2G3G_REQ
+EMM MSG_ID_EMM_CALL_PLMNSEL_SR_END_IND
+EMM MSG_ID_EMM_CALL_PLMNSEL_SR_CAUSE_IND
+EMM MSG_ID_EMM_REG_PLMNSEL_REGISTRATION_END_IND
+EMM MSG_ID_EMM_REG_PLMNSEL_REGISTRATION_SUCCESS_IND
+EMM MSG_ID_EMM_REG_PLMNSEL_ATTACH_TYPE_UPDATE_IND
+EMM MSG_ID_EMM_REG_PLMNSEL_REGISTRATION_CAUSE_IND
+EMM MSG_ID_EMM_REG_PLMNSEL_RESELECT_SHARED_NW_REQ
+EMM MSG_ID_EMM_CONN_PLMNSEL_REL_IND
+EMM MSG_ID_EMM_EVTCTRL_PLMNSEL_ABORT_REQ
+EMM MSG_ID_EMM_EVTCTRL_PLMNSEL_SUSPEND_REQ
+EMM MSG_ID_EMM_EVTCTRL_PLMNSEL_RESUME_REQ
+EMM MSG_ID_EMM_EVTCTRL_PLMNSEL_CONTINUE_REQ
+EMM MSG_ID_EMM_EVTCTRL_PLMNSEL_WDT_POLLING_REQ
+EMM MSG_ID_EMM_TIMERMNG_PLMNSEL_FTAI_TIMEOUT_IND
+EMM MSG_ID_EMM_SV_PLMNSEL_SIM_ERROR_IND
+EMM MSG_ID_EMM_SV_PLMNSEL_POWEROFF_IND
+EMM MSG_ID_EMM_SV_PLMNSEL_SIM_READY_IND
+EMM MSG_ID_EMM_SV_PLMNSEL_SIM_READY_CANCELED_IND
+EMM MSG_ID_EMM_PLMNSEL_UT_CONFIG_REQ
+EMM MSG_ID_EMM_PLMNSEL_UT_CHECK_PUBLIC_FUNCTION_REQ
+EMM MSG_ID_EMM_PLMNSEL_UT_CHECK_PUBLIC_FUNCTION_CNF
+EMM MSG_ID_EMM_PLMNSEL_SELF_UT_REQ
+EMM MSG_ID_EMM_EVTCTRL_RATBAND_ABORT_REQ
+EMM MSG_ID_EMM_EVTCTRL_RATBAND_SUSPEND_REQ
+EMM MSG_ID_EMM_EVTCTRL_RATBAND_RESUME_REQ
+EMM MSG_ID_EMM_EVTCTRL_RATBAND_CONTINUE_REQ
+EMM MSG_ID_EMM_EVALIF_RATBAND_RFOFF_REQ
+EMM MSG_ID_EMM_EVALIF_RATBAND_SET_PREFERRED_BAND_REQ
+EMM MSG_ID_EMM_EVALIF_RATBAND_SET_RAT_MODE_REQ
+EMM MSG_ID_EMM_ERRCIF_RATBAND_RAT_BAND_CNF
+EMM MSG_ID_EMM_REG_RATBAND_DETACH_CNF
+EMM MSG_ID_EMM_RATCHG_RATBAND_AS_CONTROL_CNF
+EMM MSG_ID_EMM_ANY_RATBAND_UT_CONFIG_REQ
+EMM MSG_ID_EMM_RATBAND_UT_STATUS_IND
+EMM MSG_ID_EMM_EVTCTRL_RATBAND_WDT_POLLING_REQ
+EMM MSG_ID_EMM_CONN_RATBAND_REL_IND
+EMM MSG_ID_EMM_TIMERMNG_RATBAND_REL_CONN_TIMEOUT_IND
+EMM MSG_ID_EMM_PLMNSEL_RATCHG_AS_CONTROL_REQ
+EMM MSG_ID_EMM_PLMNSEL_RATCHG_CELL_INFO_IND
+EMM MSG_ID_EMM_PLMNSEL_RATCHG_ABORT_NAS_CTXT_TRANSFER_REQ
+EMM MSG_ID_EMM_CONN_RATCHG_EST_CNF
+EMM MSG_ID_EMM_CONN_RATCHG_REDIRECTION_IND
+EMM MSG_ID_EMM_CONN_RATCHG_REL_PEND_IND
+EMM MSG_ID_EMM_CONN_RATCHG_REL_IND
+EMM MSG_ID_EMM_ESMIF_RATCHG_RAT_CHANGE_REQ
+EMM MSG_ID_EMM_ESMIF_RATCHG_RAT_CHANGE_RSP
+EMM MSG_ID_EMM_EVALIF_RATCHG_NAS_CTXT_TRANSFER_REQ
+EMM MSG_ID_EMM_EVALIF_RATCHG_DEACTIVATE_REQ
+EMM MSG_ID_EMM_MMIF_RATCHG_INIT_NAS_CTXT_RSP
+EMM MSG_ID_EMM_MMIF_RATCHG_UPDATE_SECURITY_STATUS_IND
+EMM MSG_ID_EMM_ERRCIF_RATCHG_RAT_CHANGE_IND
+EMM MSG_ID_EMM_ERRCIF_RATCHG_RAT_CHANGE_CNF
+EMM MSG_ID_EMM_ERRCIF_RATCHG_STANDBY_CNF
+EMM MSG_ID_EMM_ERRCIF_RATCHG_STANDBY_IND
+EMM MSG_ID_EMM_ERRCIF_RATCHG_RESUME_CNF
+EMM MSG_ID_EMM_ERRCIF_RATCHG_SKIP_IRCCO_STAGE2_IND
+EMM MSG_ID_EMM_RATBAND_RATCHG_AS_CONTROL_REQ
+EMM MSG_ID_EMM_REG_RATCHG_IRAT_E2UG_FAIL_RSP
+EMM MSG_ID_EMM_REG_RATCHG_IRAT_UG2E_COMP_RSP
+EMM MSG_ID_EMM_REG_RATCHG_POWER_DOWN_IND
+EMM MSG_ID_EMM_SV_RATCHG_SIM_READY_IND
+EMM MSG_ID_EMM_SV_RATCHG_SIM_DETACH_IND
+EMM MSG_ID_EMM_EVTCTRL_RATCHG_ABORT_REQ
+EMM MSG_ID_EMM_EVTCTRL_RATCHG_SUSPEND_REQ
+EMM MSG_ID_EMM_EVTCTRL_RATCHG_RESUME_REQ
+EMM MSG_ID_EMM_EVTCTRL_RATCHG_CONTINUE_REQ
+EMM MSG_ID_EMM_EVTCTRL_RATCHG_WDT_POLLING_REQ
+EMM MSG_ID_EMM_ANY_RATCHG_UT_CONFIG_REQ
+EMM MSG_ID_EMM_RATCHG_UT_STATUS_IND
+EMM MSG_ID_EMM_CALL_REG_RCV_SERVICE_REJECT_IND
+EMM MSG_ID_EMM_CALL_REG_TAU_INIT_REQ
+EMM MSG_ID_EMM_CALL_REG_EXSR_SEND_IND
+EMM MSG_ID_EMM_CALL_REG_SND_ESMMSG_REQ
+EMM MSG_ID_EMM_CALL_REG_BEARER_IND
+EMM MSG_ID_EMM_CALL_REG_WAITEPSINFO_START_REQ
+EMM MSG_ID_EMM_CALL_REG_ATTACH_INIT_REQ
+EMM MSG_ID_EMM_CALL_REG_SUSPEND_TAU_REQ
+EMM MSG_ID_EMM_CALL_REG_RESUME_TAU_REQ
+EMM MSG_ID_EMM_CALL_REG_SR_PENDING_IND
+EMM MSG_ID_EMM_CALL_REG_SR_STATUS_IND
+EMM MSG_ID_EMM_PLMNSEL_REG_NO_CELL_INFO_IND
+EMM MSG_ID_EMM_PLMNSEL_REG_CELL_INFO_IND
+EMM MSG_ID_EMM_PLMNSEL_REG_PLMNSEARCH_END_IND
+EMM MSG_ID_EMM_PLMNSEL_REG_OOS_FIRST_ROUND_FAIL_IND
+EMM MSG_ID_EMM_PLMNSEL_REG_EMC_STATUS_UPDATE_IND
+EMM MSG_ID_EMM_PLMNSEL_REG_RESELECT_SHARED_NW_CNF
+EMM MSG_ID_EMM_PLMNSEL_REG_PLMN_SEARCH_LIST_START_IND
+EMM MSG_ID_EMM_PLMNSEL_REG_GEMINI_SUSPEND_IND
+EMM MSG_ID_EMM_CMNPROC_REG_REG_REINIT_REQ
+EMM MSG_ID_EMM_CONN_REG_EST_CNF
+EMM MSG_ID_EMM_CONN_REG_REL_IND
+EMM MSG_ID_EMM_CONN_REG_AC_STATUS_IND
+EMM MSG_ID_EMM_CONN_REG_EST_IND
+EMM MSG_ID_EMM_CONN_REG_T3440_STOP_CNF
+EMM MSG_ID_EMM_ESMIF_REG_EST_REQ
+EMM MSG_ID_EMM_ESMIF_REG_GET_EPSB_STATUS_RSP
+EMM MSG_ID_EMM_ESMIF_REG_SYNC_EPSB_STATUS_REQ
+EMM MSG_ID_EMM_ESMIF_REG_DETACH_REQ
+EMM MSG_ID_EMM_ESMIF_REG_RAT_CHANGE_EPSB_STATUS_REQ
+EMM MSG_ID_EMM_ESMIF_REG_ISR_DEACT_REQ
+EMM MSG_ID_EMM_ESMIF_REG_GET_ESM_CAUSE_RSP
+EMM MSG_ID_EMM_ESMIF_REG_UPDATE_EPSB_STATUS_RSP
+EMM MSG_ID_EMM_EVALIF_REG_DETACH_REQ
+EMM MSG_ID_EMM_EVALIF_REG_ATTACH_REQ
+EMM MSG_ID_EMM_EVALIF_REG_UEMODE_PARAM_UPDATE_REQ
+EMM MSG_ID_EMM_EVALIF_REG_EMC_ATTACH_REQ
+EMM MSG_ID_EMM_EVALIF_REG_ACTIVE_SIM_INFO_REQ
+EMM MSG_ID_EMM_MMIF_REG_GMM_UPDATE_REGISTRATION_REQ
+EMM MSG_ID_EMM_MMIF_REG_GMM_UPDATE_DEREGISTRATION_REQ
+EMM MSG_ID_EMM_MMIF_REG_MM_UPDATE_REGISTRATION_REQ
+EMM MSG_ID_EMM_MMIF_REG_MM_UPDATE_DEREGISTRATION_REQ
+EMM MSG_ID_EMM_MMIF_REG_ISR_UPDATE_REQ
+EMM MSG_ID_EMM_ERRCIF_REG_SND_NASMSG_CNF
+EMM MSG_ID_EMM_ERRCIF_REG_IMSI_PAGE_IND
+EMM MSG_ID_EMM_EVTCTRL_REG_ABORT_REQ
+EMM MSG_ID_EMM_EVTCTRL_REG_SUSPEND_REQ
+EMM MSG_ID_EMM_EVTCTRL_REG_RESUME_REQ
+EMM MSG_ID_EMM_EVTCTRL_REG_CONTINUE_REQ
+EMM MSG_ID_EMM_EVTCTRL_REG_WDT_POLLING_REQ
+EMM MSG_ID_EMM_NASMSG_REG_RCV_ATTACH_ACCEPT_IND
+EMM MSG_ID_EMM_NASMSG_REG_RCV_ATTACH_REJECT_IND
+EMM MSG_ID_EMM_NASMSG_REG_RCV_TAU_ACCEPT_IND
+EMM MSG_ID_EMM_NASMSG_REG_RCV_TAU_REJECT_IND
+EMM MSG_ID_EMM_NASMSG_REG_RCV_DETACH_REQUEST_IND
+EMM MSG_ID_EMM_NASMSG_REG_RCV_DETACH_ACCEPT_IND
+EMM MSG_ID_EMM_RATCHG_REG_RAT_LTESBY_IND
+EMM MSG_ID_EMM_RATCHG_REG_IRAT_UG2E_IND
+EMM MSG_ID_EMM_RATCHG_REG_ISR_RESUME_IND
+EMM MSG_ID_EMM_RATCHG_REG_IRAT_E2UG_FAIL_IND
+EMM MSG_ID_EMM_RATCHG_REG_REDIR_E2UG_FAIL_IND
+EMM MSG_ID_EMM_RATCHG_REG_IRAT_UG2E_FAIL_IND
+EMM MSG_ID_EMM_RATCHG_REG_IRAT_E2UG_INIT_IND
+EMM MSG_ID_EMM_SEC_REG_REG_REINIT_REQ
+EMM MSG_ID_EMM_SEC_REG_ATTACH_TRIGGER_IND
+EMM MSG_ID_EMM_SEC_REG_RCV_AUTH_REJECT_IND
+EMM MSG_ID_EMM_TIMERMNG_REG_T3402_TIMEOUT_IND
+EMM MSG_ID_EMM_TIMERMNG_REG_T3411_TIMEOUT_IND
+EMM MSG_ID_EMM_TIMERMNG_REG_T3412_TIMEOUT_IND
+EMM MSG_ID_EMM_TIMERMNG_REG_T3430_TIMEOUT_IND
+EMM MSG_ID_EMM_TIMERMNG_REG_T3410_TIMEOUT_IND
+EMM MSG_ID_EMM_TIMERMNG_REG_T3421_TIMEOUT_IND
+EMM MSG_ID_EMM_TIMERMNG_REG_T_DETACH_TIMEOUT_IND
+EMM MSG_ID_EMM_TIMERMNG_REG_T3423_TIMEOUT_IND
+EMM MSG_ID_EMM_SV_REG_SIM_READY_IND
+EMM MSG_ID_EMM_SV_REG_DETACH_REQ
+EMM MSG_ID_EMM_SV_REG_SIM_READY_CANCELED_IND
+EMM MSG_ID_EMM_RATBAND_REG_DETACH_REQ
+EMM MSG_ID_EMM_RATCHG_REG_IRAT_E2UG_COMP_IND
+EMM MSG_ID_EMM_RATCHG_REG_IRAT_UG2E_COMP_IND
+EMM MSG_ID_EMM_REG_UT_CONFIG_REQ
+EMM MSG_ID_EMM_PLMNSEL_SEC_CAMPON_PLMN_CHG_IND
+EMM MSG_ID_EMM_PLMNSEL_SEC_CELL_INFO_IND
+EMM MSG_ID_EMM_CALL_SEC_AUTH_DATA_DEL_REQ
+EMM MSG_ID_EMM_CALL_SEC_DELETE_KSI_REQ
+EMM MSG_ID_EMM_REG_SEC_DELETE_KSI_REQ
+EMM MSG_ID_EMM_REG_SEC_AUTH_DATA_DEL_REQ
+EMM MSG_ID_EMM_REG_SEC_REG_INIT_IND
+EMM MSG_ID_EMM_REG_SEC_DEREG_COMP_IND
+EMM MSG_ID_EMM_RATCHG_SEC_RATLTESBY_IND
+EMM MSG_ID_EMM_RATCHG_SEC_RAT_HO_U2E_IND
+EMM MSG_ID_EMM_RATCHG_SEC_RAT_IDLE_U2E_IND
+EMM MSG_ID_EMM_RATCHG_SEC_IRAT_E2UG_COMP_IND
+EMM MSG_ID_EMM_RATCHG_SEC_RAT_IDLE_UG2E_COMP_IND
+EMM MSG_ID_EMM_RATCHG_SEC_RAT_HO_U2E_COMP_IND
+EMM MSG_ID_EMM_RATCHG_SEC_RAT_HO_U2E_FAIL_IND
+EMM MSG_ID_EMM_RATCHG_SEC_WRAP_AROUND_IND
+EMM MSG_ID_EMM_CONN_SEC_REL_IND
+EMM MSG_ID_EMM_CONN_SEC_EST_IND
+EMM MSG_ID_EMM_EVALIF_SEC_AUTHENTICATE_RSP
+EMM MSG_ID_EMM_NASMSG_SEC_RCV_AUTH_REQ_IND
+EMM MSG_ID_EMM_NASMSG_SEC_RCV_AUTH_REJ_IND
+EMM MSG_ID_EMM_NASMSG_SEC_RCV_SECURITY_CMD_IND
+EMM MSG_ID_EMM_NASMSG_SEC_WRAP_AROUND_IND
+EMM MSG_ID_EMM_NASMSG_SEC_EXCHG_REEST_REQ
+EMM MSG_ID_EMM_ERRCIF_SEC_SND_NASMSG_CNF
+EMM MSG_ID_EMM_ERRCIF_SEC_RCV_EPSBEARER_IND
+EMM MSG_ID_EMM_ESMIF_SEC_ENTER_EMC_ATTACH_RSP
+EMM MSG_ID_EMM_TIMERMNG_SEC_T3416_TIMEOUT_IND
+EMM MSG_ID_EMM_TIMERMNG_SEC_T3418_TIMEOUT_IND
+EMM MSG_ID_EMM_TIMERMNG_SEC_T3420_TIMEOUT_IND
+EMM MSG_ID_EMM_SV_SEC_SIM_READY_IND
+EMM MSG_ID_EMM_SV_SEC_SIM_DETACH_IND
+EMM MSG_ID_EMM_SV_SEC_DELETE_KSI_REQ
+EMM MSG_ID_EMM_ANY_SEC_UT_CONFIG_REQ
+EMM MSG_ID_EMM_EVALIF_SV_INIT_REQ
+EMM MSG_ID_EMM_EVALIF_SV_SIM_READY_REQ
+EMM MSG_ID_EMM_EVALIF_SV_SIM_ERROR_REQ
+EMM MSG_ID_EMM_EVALIF_SV_DETACH_REQ
+EMM MSG_ID_EMM_EVALIF_SV_SIM_FILE_UPDATE_REQ
+EMM MSG_ID_EMM_ERRCIF_SV_ACTIVATION_CNF
+EMM MSG_ID_EMM_REG_SV_SIM_INVALID_IND
+EMM MSG_ID_EMM_REG_SV_DETACH_CNF
+EMM MSG_ID_EMM_CALL_SV_SIM_INVALID_IND
+EMM MSG_ID_EMM_SEC_SV_SIM_INVALID_IND
+EMM MSG_ID_EMM_EVTCTRL_SV_ABORT_REQ
+EMM MSG_ID_EMM_EVTCTRL_SV_SUSPEND_REQ
+EMM MSG_ID_EMM_EVTCTRL_SV_RESUME_REQ
+EMM MSG_ID_EMM_EVTCTRL_SV_CONTINUE_REQ
+EMM MSG_ID_EMM_EVTCTRL_SV_WDT_POLLING_REQ
+EMM MSG_ID_EMM_ANY_SV_UT_CONFIG_REQ
+EMM MSG_ID_EMM_SV_UT_STATUS_IND
+EMM MSG_ID_EMM_RATBAND_SV_SET_RAT_MODE_IND
+EMM MSG_ID_EMM_RATCHG_TIMERMNG_IRAT_E2UG_INIT_IND
+EMM MSG_ID_EMM_RATCHG_TIMERMNG_IRAT_E2UG_COMP_IND
+EMM MSG_ID_EMM_RATCHG_TIMERMNG_IRAT_E2UG_FAIL_IND
+EMM MSG_ID_EMM_SV_TIMERMNG_POWER_DOWN_IND
+EMM MSG_ID_EMM_TIMERMNG_UT_REQ
+EMM MSG_ID_EMM_MOD_GLOBAL_VAR_REQ
+EMM MSG_ID_EMM_EM_CONFIG_REQ
+EMM MSG_ID_EMM_CODE_END
+ERRC MSG_ID_EXEVT_RCV_BEGIN
+ERRC MSG_ID_EMM_ERRC_ACTIVATION_REQ
+ERRC MSG_ID_EMM_ERRC_RAT_BAND_REQ
+ERRC MSG_ID_EMM_ERRC_ESTABLISH_REQ
+ERRC MSG_ID_EMM_ERRC_RELEASE_REQ
+ERRC MSG_ID_EMM_ERRC_RELEASE_RSP
+ERRC MSG_ID_EMM_ERRC_DATA_REQ
+ERRC MSG_ID_EMM_ERRC_KEY_UPDATE_REQ
+ERRC MSG_ID_EMM_ERRC_TEST_REQ
+ERRC MSG_ID_EMM_ERRC_CELLSELECT_REQ
+ERRC MSG_ID_EMM_ERRC_PLMNLIST_REQ
+ERRC MSG_ID_EMM_ERRC_RESUME_REQ
+ERRC MSG_ID_EMM_ERRC_NWSEL_STATUS_UPDATE_REQ
+ERRC MSG_ID_EMM_ERRC_REG_STATUS_UPDATE_REQ
+ERRC MSG_ID_EMM_ERRC_PROC_RESULT_UPDATE_REQ
+ERRC MSG_ID_EMM_ERRC_RAT_CHANGE_REQ
+ERRC MSG_ID_EMM_ERRC_RAT_CHANGE_RSP
+ERRC MSG_ID_EMM_ERRC_STANDBY_REQ
+ERRC MSG_ID_EMM_ERRC_PARAM_UPDATE_REQ
+ERRC MSG_ID_EMM_ERRC_QOS_UPDATE_REQ
+ERRC MSG_ID_EMM_ERRC_CSG_LIST_REQ
+ERRC MSG_ID_EMM_ERRC_CSG_LIST_STOP_REQ
+ERRC MSG_ID_EMM_ERRC_NULL_SECURITY_ACCEPT_REQ
+ERRC MSG_ID_EMM_ERRC_CSG_WHITE_LIST_UPDT_REQ
+ERRC MSG_ID_EMM_ERRC_SIM_FILE_UPDATE_REQ
+ERRC MSG_ID_EMM_ERRC_CSFB_NTF
+ERRC MSG_ID_EMM_ERRC_GEMINI_CSFB_STATUS_REQ
+ERRC MSG_ID_EMM_ERRC_CHECK_SERVING_SUITABILITY_REQ
+ERRC MSG_ID_EMM_ERRC_SEARCH_PREFERENCE_UPDATE_REQ
+ERRC MSG_ID_EMM_ERRC_RAT_CHANGE_CAUSE_UPDATE_REQ
+ERRC MSG_ID_EMM_ERRC_GEMINI_LR_REQ
+ERRC MSG_ID_EVAL_ERRC_ADJUST_MEAS_REQ
+ERRC MSG_ID_EVAL_ERRC_ETWS_SETTING_REQ
+ERRC MSG_ID_EVAL_ERRC_CBCH_REQ
+ERRC MSG_ID_EVAL_ERRC_CB_UPDATE_REQ
+ERRC MSG_ID_EVAL_ERRC_HPLMN_INFO_UPDATE_REQ
+ERRC MSG_ID_EVAL_ERRC_MMDC_MODE_UPDATE_REQ
+ERRC MSG_ID_EVAL_ERRC_LTE_NEIGHBOR_CELL_INFO_REQ
+ERRC MSG_ID_EVAL_ERRC_NBR_CELL_INFO_START_REQ
+ERRC MSG_ID_EVAL_ERRC_NBR_CELL_INFO_STOP_REQ
+ERRC MSG_ID_EVAL_ERRC_GET_SSAC_PARAM_REQ
+ERRC MSG_ID_EVAL_ERRC_VDM_VOICE_STATUS_REQ
+ERRC MSG_ID_EVAL_ERRC_PLMN_SEARCH_ABORT_REQ
+ERRC MSG_ID_EVAL_ERRC_CB_MSG_REMOVAL_REQ
+ERRC MSG_ID_SAT_EAS_NMR_REQ
+ERRC MSG_ID_ERRC_EL1_SET_RAT_CNF
+ERRC MSG_ID_ERRC_EL1MPC_CARRIER_SEARCH_CNF
+ERRC MSG_ID_ERRC_EL1MPC_CARRIER_SEARCH_IND
+ERRC MSG_ID_ERRC_EL1MPC_SPECIFIC_MEASURE_CNF
+ERRC MSG_ID_ERRC_EL1MPC_SPECIFIC_MEASURE_IND
+ERRC MSG_ID_ERRC_EL1MPC_RADIO_MEASURE_CNF
+ERRC MSG_ID_ERRC_EL1MPC_RADIO_MEASURE_IND
+ERRC MSG_ID_ERRC_EL1_PAGING_IND
+ERRC MSG_ID_ERRC_EL1_BUFFER_CHECK_IND
+ERRC MSG_ID_ERRC_EL1_CPHY_CFG_CNF
+ERRC MSG_ID_ERRC_EL1_RL_MONITOR_CNF
+ERRC MSG_ID_ERRC_EL1_RLF_IND
+ERRC MSG_ID_ERRC_EL1_BCCH_IND
+ERRC MSG_ID_ERRC_EL1_BCCH_SYS_INFO_IND
+ERRC MSG_ID_ERRC_EL1MPC_NBR_BCCH_MEAS_IND
+ERRC MSG_ID_ERRC_EL1_SPECIFIC_CELL_SEARCH_CNF
+ERRC MSG_ID_ERRC_CEL_SPECIFIC_CELL_SRCH_CNF
+ERRC MSG_ID_ERRC_CONN_SPECIFIC_CELL_SRCH_CNF
+ERRC MSG_ID_ERRC_EL1_SPECIFIC_CELL_SEARCH_IND
+ERRC MSG_ID_ERRC_CEL_SPECIFIC_CELL_SRCH_IND
+ERRC MSG_ID_ERRC_CONN_SPECIFIC_CELL_SRCH_IND
+ERRC MSG_ID_ERRC_EL1MPC_RSSI_SNIFFER_CNF
+ERRC MSG_ID_ERRC_EL1MPC_RSSI_SNIFFER_IND
+ERRC MSG_ID_ERRC_EL1_PCH_CRCNG_IND
+ERRC MSG_ID_ERRC_EL1_AUTO_GAP_ON_CNF
+ERRC MSG_ID_ERRC_EL1_AUTO_GAP_OFF_CNF
+ERRC MSG_ID_ERRC_EL1_ACTIVE_AFC_IND
+ERRC MSG_ID_ERRC_EMAC_CONTENTION_IND
+ERRC MSG_ID_ERRC_EMAC_RA_ERROR_IND
+ERRC MSG_ID_ERRC_CONN_RRC_TRIGER_RAERR
+ERRC MSG_ID_ERRC_EVTH_CHM_NON_RRC_TRIGER_RAERR
+ERRC MSG_ID_ERRC_EMAC_CONFIG_CNF
+ERRC MSG_ID_ERRC_EMAC_L1_UL_REL_IND
+ERRC MSG_ID_ERRC_EMAC_RA_INFO_IND
+ERRC MSG_ID_ERRC_EMAC_SI_IND
+ERRC MSG_ID_ERRC_EMAC_TA_INFO_CNF
+ERRC MSG_ID_ERRC_EMAC_TA_INFO_IND
+ERRC MSG_ID_ERRC_EMAC_TA_INFO_INVALID_IND
+ERRC MSG_ID_LPP_ERRC_ECID_MEAS_REQ
+ERRC MSG_ID_LPP_ERRC_ECID_MEAS_ABORT_REQ
+ERRC MSG_ID_ERRC_LSYS_SYS_BCCH_IND
+ERRC MSG_ID_ERRC_LSYS_SYS_SI_IND
+ERRC MSG_ID_ERRC_LSYS_SYS_BCCH_ASN1_DEC_ERR
+ERRC MSG_ID_ERRC_LSYS_SYS_BCCH_UNDEFINE
+ERRC MSG_ID_ERRC_LSYS_SYS_NOPDCCH_IND
+ERRC MSG_ID_ERRC_EVTH_SYS_SI
+ERRC MSG_ID_ERRC_EVTH_SYS_SIB1
+ERRC MSG_ID_ERRC_EVTH_SYS_BCCH_ASN1_DEC_ERR
+ERRC MSG_ID_ERRC_EVTH_SYS_BCCH_UNDEFINE
+ERRC MSG_ID_ERRC_EMAC_CCCH_DATA_IND
+ERRC MSG_ID_ERRC_EVTH_CONN_CONN_REEST
+ERRC MSG_ID_ERRC_EVTH_CONN_CONN_REEST_REJ
+ERRC MSG_ID_ERRC_EVTH_CONN_CONN_REJ
+ERRC MSG_ID_ERRC_EVTH_CONN_CONN_SETUP
+ERRC MSG_ID_ERRC_EVTH_CONN_CCCH_ASN1_DEC_ERR
+ERRC MSG_ID_ERRC_EVTH_CONN_CCCH_UNDEFINE
+ERRC MSG_ID_ERRC_ERLCUL_CONFIG_CNF
+ERRC MSG_ID_ERRC_ERLCDL_CONFIG_CNF
+ERRC MSG_ID_ERRC_ERLC_RLF_IND
+ERRC MSG_ID_ERRC_ERLCUL_SRB1_ACK_CNF
+ERRC MSG_ID_ERRC_EPDCP_CONFIG_CNF
+ERRC MSG_ID_ERRC_EPDCP_DCCH_DATA_CNF
+ERRC MSG_ID_ERRC_EPDCP_RLC_ACK_IND
+ERRC MSG_ID_ERRC_EPDCP_DCCH_DATA_IND
+ERRC MSG_ID_ERRC_EVTH_CONN_DL_INFO_TRANS
+ERRC MSG_ID_ERRC_EVTH_CONN_MOB_FROM_EUTRA_CMD
+ERRC MSG_ID_ERRC_EVTH_CONN_CONN_RECONF
+ERRC MSG_ID_ERRC_EVTH_CONN_CONN_REL
+ERRC MSG_ID_ERRC_EVTH_CONN_SECURITY_MODE_CMD
+ERRC MSG_ID_ERRC_EVTH_RCM_UE_CAPA_ENQ
+ERRC MSG_ID_ERRC_EVTH_CONN_COUNTER_CHECK
+ERRC MSG_ID_ERRC_EVTH_CONN_UE_INFO_REQ
+ERRC MSG_ID_ERRC_EVTH_CONN_DCCH_ASN1_DEC_ERR
+ERRC MSG_ID_ERRC_EVTH_CONN_IRAT_DCCH_ASN1_DEC_ERR
+ERRC MSG_ID_ERRC_EVTH_CONN_DCCH_INTG_CHK_ERR
+ERRC MSG_ID_ERRC_EVTH_CONN_DCCH_UNDEFINE
+ERRC MSG_ID_ERRC_EPDCP_TEST_CNF
+ERRC MSG_ID_ERRC_EPDCP_CNTINFO_CNF
+ERRC MSG_ID_ERRC_TIMER_TRIG_TIMEOUT_REQ
+ERRC MSG_ID_ERRC_EVTH_RCM_CSG_WHITE_LIST_UPDATE_IND
+ERRC MSG_ID_ERRC_EVTH_RCM_NVRAM_READ_CNF
+ERRC MSG_ID_ERRC_EVTH_RCM_NVRAM_WRITE_CNF
+ERRC MSG_ID_ERRC_EVTH_RCM_BAND_UPDATE_IND
+ERRC MSG_ID_ERRC_EVTH_CEL_LOWER_LAYER_AVAILABILITY_UPDATE_IND
+ERRC MSG_ID_ERRC_EVTH_RCM_DISABLE_B39_IND
+ERRC MSG_ID_ERRC_EVTH_RCM_ENABLE_B39_IND
+ERRC MSG_ID_UAS_EAS_HANDOVER_ECELL_REQ
+ERRC MSG_ID_ERRC_EVTH_CONN_IRAT_RECONF
+ERRC MSG_ID_UAS_EAS_ABORT_HO_ECELL_REQ
+ERRC MSG_ID_MRS_EAS_UMTS_HO_INFO_IND
+ERRC MSG_ID_EAS_UAS_HANDOVER_UCELL_CNF
+ERRC MSG_ID_EAS_GAS_HANDOVER_GCELL_CNF
+ERRC MSG_ID_EAS_UAS_HO_ACTIVATE_UCELL_CNF
+ERRC MSG_ID_EAS_GAS_HO_ACTIVATE_GCELL_CNF
+ERRC MSG_ID_GAS_EAS_EVALUATE_ECELL_REQ
+ERRC MSG_ID_UAS_EAS_EVALUATE_ECELL_REQ
+ERRC MSG_ID_GAS_EAS_EVALUATE_ECELL_STOP_REQ
+ERRC MSG_ID_UAS_EAS_EVALUATE_ECELL_STOP_REQ
+ERRC MSG_ID_EAS_GAS_EVALUATE_GCELL_CNF
+ERRC MSG_ID_EAS_UAS_EVALUATE_UCELL_CNF
+ERRC MSG_ID_EAS_GAS_EVALUATE_GCELL_STOP_CNF
+ERRC MSG_ID_EAS_UAS_EVALUATE_UCELL_STOP_CNF
+ERRC MSG_ID_EAS_GAS_ACTIVATE_GCELL_CNF
+ERRC MSG_ID_EAS_UAS_ACTIVATE_UCELL_CNF
+ERRC MSG_ID_GAS_EAS_READY_TIMER_STATUS_IND
+ERRC MSG_ID_GAS_EAS_EVALUATE_CSG_ECELL_REQ
+ERRC MSG_ID_UAS_EAS_EVALUATE_CSG_ECELL_REQ
+ERRC MSG_ID_GAS_EAS_SEARCH_CSG_ECELL_REQ
+ERRC MSG_ID_UAS_EAS_SEARCH_CSG_ECELL_REQ
+ERRC MSG_ID_EAS_UAS_EVALUATE_CSG_UCELL_CNF
+ERRC MSG_ID_EAS_UAS_SEARCH_CSG_UCELL_CNF
+ERRC MSG_ID_UAS_EAS_LTE_MEASUREMENT_REQ
+ERRC MSG_ID_GAS_EAS_LTE_MEASUREMENT_REQ
+ERRC MSG_ID_UAS_EAS_LTE_HPS_QUALIFY_CELL_IND
+ERRC MSG_ID_GAS_EAS_LTE_HPS_QUALIFY_CELL_IND
+ERRC MSG_ID_EAS_UAS_CONFIG_UCELL_MEAS_CNF
+ERRC MSG_ID_EAS_GAS_CONFIG_GCELL_MEAS_CNF
+ERRC MSG_ID_EAS_UAS_CONFIG_UCELL_PRIO_MEAS_CNF
+ERRC MSG_ID_EAS_GAS_CONFIG_GCELL_PRIO_MEAS_CNF
+ERRC MSG_ID_EAS_UAS_UCELL_MEAS_IND
+ERRC MSG_ID_EAS_GAS_GCELL_MEAS_IND
+ERRC MSG_ID_EAS_GAS_GCELL_BSIC_IND
+ERRC MSG_ID_EAS_UAS_REPORT_CGI_CNF
+ERRC MSG_ID_EAS_GAS_REPORT_CGI_CNF
+ERRC MSG_ID_UAS_EAS_BACKGROUND_SEARCH_START_REQ
+ERRC MSG_ID_UAS_EAS_BACKGROUND_SEARCH_STOP_REQ
+ERRC MSG_ID_GAS_EAS_BACKGROUND_SEARCH_START_REQ
+ERRC MSG_ID_GAS_EAS_BACKGROUND_SEARCH_STOP_REQ
+ERRC MSG_ID_GAS_EAS_EARFCN_LIST_UPDATE_REQ
+ERRC MSG_ID_RSVAS_EAS_SERVICE_RES_OCCUPY_IND
+ERRC MSG_ID_RSVAS_EAS_SUSPEND_SERVICE_REQ
+ERRC MSG_ID_RSVAS_EAS_RESUME_SERVICE_REQ
+ERRC MSG_ID_RSVAS_EAS_ABORT_SERVICE_REQ
+ERRC MSG_ID_RSVAS_EAS_ABORT_SERVICE_COMPLETE_IND
+ERRC MSG_ID_RSVAS_EAS_VIRTUAL_SUSPEND_SERVICE_REQ
+ERRC MSG_ID_RSVAS_EAS_VIRTUAL_SUSPEND_SERVICE_COMPLETE_IND
+ERRC MSG_ID_RSVAS_EAS_VIRTUAL_RESUME_SERVICE_REQ
+ERRC MSG_ID_RSVAE_EAS_FREQUENCY_SCAN_ACCEPT_IND
+ERRC MSG_ID_RSVAE_EAS_FREQUENCY_SCAN_PREEMPT_IND
+ERRC MSG_ID_EXEVT_RCV_END
+ERRC MSG_ID_INEVT_BEGIN
+ERRC MSG_ID_ERRC_SPV_RCM_INIT_REQ
+ERRC MSG_ID_ERRC_SPV_RCM_INIT_CNF
+ERRC MSG_ID_ERRC_SPV_RCM_RAT_BAND_REQ
+ERRC MSG_ID_ERRC_SPV_RCM_RAT_BAND_CNF
+ERRC MSG_ID_ERRC_SPV_RCM_USIM_REQ
+ERRC MSG_ID_ERRC_SPV_RCM_USIM_CNF
+ERRC MSG_ID_ERRC_ANY_RCM_CONTEXT_WRITE_IND
+ERRC MSG_ID_ERRC_ANY_SPV_CHANGE_STATE_REQ
+ERRC MSG_ID_ERRC_ANY_SPV_CHANGE_STATE_CNF
+ERRC MSG_ID_ERRC_SPV_RCM_PARAM_REQ
+ERRC MSG_ID_ERRC_SPV_RCM_PARAM_CNF
+ERRC MSG_ID_ERRC_SPV_CEL_PARAM_REQ
+ERRC MSG_ID_ERRC_SPV_CEL_PARAM_CNF
+ERRC MSG_ID_ERRC_SPV_CONN_KEY_UPDT_REQ
+ERRC MSG_ID_ERRC_SPV_CONN_KEY_UPDT_CNF
+ERRC MSG_ID_ERRC_SPV_CONN_STATUS_UPDATE_REQ
+ERRC MSG_ID_ERRC_SPV_ANY_STBY_REQ
+ERRC MSG_ID_ERRC_SPV_ANY_STBY_CNF
+ERRC MSG_ID_ERRC_SPV_ANY_STANDBY_CMPL_IND
+ERRC MSG_ID_ERRC_SPV_ANY_RAT_CHANGE_REQ
+ERRC MSG_ID_ERRC_SPV_ANY_RAT_CHANGE_CNF
+ERRC MSG_ID_ERRC_ANY_SPV_RAT_CHANGE_IND
+ERRC MSG_ID_ERRC_ANY_SPV_RAT_CHANGE_RES
+ERRC MSG_ID_ERRC_SPV_ANY_FLIGHT_MODE_REQ
+ERRC MSG_ID_ERRC_SPV_ANY_FLIGHT_MODE_CNF
+ERRC MSG_ID_ERRC_SPV_ANY_IRTOLTE_SUCCESS_IND
+ERRC MSG_ID_ERRC_SPV_CONN_SERVICE_RES_OCCUPY_IND
+ERRC MSG_ID_ERRC_SPV_ANY_GEMINI_SUSPEND_REQ
+ERRC MSG_ID_ERRC_SPV_ANY_GEMINI_SUSPEND_CNF
+ERRC MSG_ID_ERRC_SPV_ANY_GEMINI_RESUME_REQ
+ERRC MSG_ID_ERRC_SPV_CEL_GEMINI_VIRTUAL_SUSPEND_REQ
+ERRC MSG_ID_ERRC_SPV_CEL_GEMINI_VIRTUAL_SUSPEND_CNF
+ERRC MSG_ID_ERRC_SPV_CEL_GEMINI_VIRTUAL_RESUME_REQ
+ERRC MSG_ID_ERRC_SPV_ANY_GEMINI_ABORT_REQ
+ERRC MSG_ID_ERRC_SPV_ANY_GEMINI_ABORT_CNF
+ERRC MSG_ID_ERRC_SPV_ANY_GEMINI_ABORT_COMPLETE_IND
+ERRC MSG_ID_ERRC_CEL_SYS_BCCH_ACT_REQ
+ERRC MSG_ID_ERRC_CEL_SYS_BCCH_ACT_CNF
+ERRC MSG_ID_ERRC_CEL_SYS_BCCH_DEACT_IND
+ERRC MSG_ID_ERRC_SYS_CEL_BCCH_RCVD_IND
+ERRC MSG_ID_ERRC_CEL_SYS_DB_UPDT_IND
+ERRC MSG_ID_ERRC_CEL_SYS_SOFT_IDX_CHG_IND
+ERRC MSG_ID_ERRC_CEL_SYS_PWS_ACT_IND
+ERRC MSG_ID_ERRC_CEL_SYS_PWS_DEACT_IND
+ERRC MSG_ID_ERRC_SYS_CEL_PWS_RCVD_IND
+ERRC MSG_ID_ERRC_SYS_CEL_BCCH_EXPR_IND
+ERRC MSG_ID_ERRC_CEL_SYS_CLEAR_DEDICATED_SIB
+ERRC MSG_ID_ERRC_LCEL_CEL_PAGING_IND
+ERRC MSG_ID_ERRC_CEL_CONN_IDLE_IND
+ERRC MSG_ID_ERRC_CONN_CEL_RRC_CONNECTED_REQ
+ERRC MSG_ID_ERRC_CONN_CEL_RRC_CONNECTED_CNF
+ERRC MSG_ID_ERRC_CONN_CEL_IDLE_REQ
+ERRC MSG_ID_ERRC_CEL_CONN_CH_STATUS_IND
+ERRC MSG_ID_ERRC_CONN_CEL_REEST_REQ
+ERRC MSG_ID_ERRC_CONN_CEL_REEST_CNF
+ERRC MSG_ID_ERRC_CONN_CEL_HO_UPDATE_CELL_IND
+ERRC MSG_ID_ERRC_CEL_CONN_UPDT_MIB_IND
+ERRC MSG_ID_ERRC_CEL_CONN_UPDT_SIB_IND
+ERRC MSG_ID_ERRC_CONN_CEL_CNCT_NG_IND
+ERRC MSG_ID_ERRC_CEL_CONN_CELL_NO_SUITABLE_IND
+ERRC MSG_ID_ERRC_CONN_CEL_REEST_CMPL_REQ
+ERRC MSG_ID_ERRC_CONN_CEL_REEST_CMPL_CNF
+ERRC MSG_ID_ERRC_CONN_CEL_EST_JDG_REQ
+ERRC MSG_ID_ERRC_CONN_CEL_EST_JDG_CNF
+ERRC MSG_ID_ERRC_CONN_CEL_CCO_RESULT_IND
+ERRC MSG_ID_ERRC_CEL_CONN_IRCCO_ABORT_EST_IND
+ERRC MSG_ID_ERRC_CEL_MOB_KCELLS_REQ
+ERRC MSG_ID_ERRC_CEL_MOB_KCELLS_CNF
+ERRC MSG_ID_ERRC_MOB_CEL_RESEL_IND
+ERRC MSG_ID_ERRC_MOB_CEL_OOS_IND
+ERRC MSG_ID_ERRC_CEL_MOB_CELL_REJ_IND
+ERRC MSG_ID_ERRC_CEL_MOB_CELL_RJCT_CLR_IND
+ERRC MSG_ID_ERRC_MOB_CEL_REST_LIST_IND
+ERRC MSG_ID_ERRC_CEL_MOB_UPDATE_CAUSE_IND
+ERRC MSG_ID_ERRC_RCM_MOB_USIM_IND
+ERRC MSG_ID_ERRC_MOB_CEL_SI_MEAS_IND
+ERRC MSG_ID_ERRC_ANY_MOB_MEAS_PRE_CTRL_REQ
+ERRC MSG_ID_ERRC_ANY_MOB_MEAS_PRE_CTRL_CNF
+ERRC MSG_ID_ERRC_ANY_MOB_MEAS_POST_CTRL_REQ
+ERRC MSG_ID_ERRC_ANY_MOB_MEAS_POST_CTRL_CNF
+ERRC MSG_ID_ERRC_CEL_MOB_MEAS_REQ
+ERRC MSG_ID_ERRC_CEL_MOB_MEAS_CNF
+ERRC MSG_ID_ERRC_MOB_CEL_RPT_CGI_REQ
+ERRC MSG_ID_ERRC_MOB_CEL_RPT_CGI_CNF
+ERRC MSG_ID_ERRC_CEL_MOB_CSG_STATUS_IND
+ERRC MSG_ID_ERRC_CEL_MOB_EMERGENCY_STATUS_IND
+ERRC MSG_ID_ERRC_CEL_MOB_IR_MEAS_CTRL_REQ
+ERRC MSG_ID_ERRC_CEL_MOB_IR_REDIRECT_TO_LTE_IND
+MSG_ID_ERRC_CEL_MOB_MBMS_SCELL_SEARCH_REQ
+MSG_ID_ERRC_CEL_MOB_MBMS_SCELL_SEARCH_CNF
+MSG_ID_ERRC_CEL_MOB_MBMS_SCELL_SEARCH_IND
+ERRC MSG_ID_ERRC_ANY_CHM_CH_CTRL_REQ
+ERRC MSG_ID_ERRC_ANY_CHM_CH_CTRL_CNF
+ERRC MSG_ID_ERRC_CHM_CONN_L1_CTRLING_IND
+ERRC MSG_ID_ERRC_CHM_CONN_RLF_IND
+ERRC MSG_ID_ERRC_CHM_SYS_BCCH_DL_SYNC_FAIL_IND
+ERRC MSG_ID_ERRC_CONN_CHM_LPBK_REQ
+ERRC MSG_ID_ERRC_CONN_CHM_LPBK_CNF
+ERRC MSG_ID_ERRC_CONN_ANY_SUS_REQ
+ERRC MSG_ID_ERRC_CONN_ANY_SUS_CNF
+ERRC MSG_ID_ERRC_CONN_ANY_RSM_REQ
+ERRC MSG_ID_ERRC_CONN_ANY_RSM_CNF
+ERRC MSG_ID_ERRC_ANY_CONN_REEST_IND
+ERRC MSG_ID_ERRC_TIMER_EXPR_IND
+ERRC MSG_ID_ERRC_TIMER_START_IND
+ERRC MSG_ID_ERRC_TIMER_STOP_IND
+ERRC MSG_ID_ERRC_RCM_CONN_PWS_CAPA_UPDT_IND
+ERRC MSG_ID_ERRC_RCM_ANY_CSG_WHITELIST_UPDATE_IND
+ERRC MSG_ID_ERRC_RCM_ANY_ACC_UPDATE_IND
+ERRC MSG_ID_ERRC_RCM_ANY_DISABLE_B39_IND
+ERRC MSG_ID_ERRC_RCM_ANY_ENABLE_B39_IND
+ERRC MSG_ID_ERRC_MOD_GLOBAL_VAR
+ERRC MSG_ID_ERRC_GET_VAR_ADDR
+ERRC MSG_ID_ERRC_RETURN_VAR_ADDR
+ERRC MSG_ID_ERRC_BCCH_SIB_PTR
+ERRC MSG_ID_ERRC_LSYS_NOPDCCH_DATA
+ERRC MSG_ID_ERRC_MIB_DATA
+ERRC MSG_ID_ERRC_SIB1_DATA
+ERRC MSG_ID_ERRC_SIB2_DATA
+ERRC MSG_ID_ERRC_SIB3_DATA
+ERRC MSG_ID_ERRC_SIB4_DATA
+ERRC MSG_ID_ERRC_SIB4_CSG_DATA
+ERRC MSG_ID_ERRC_SIB5_DATA
+ERRC MSG_ID_ERRC_SIB6_DATA
+ERRC MSG_ID_ERRC_SIB7_DATA
+ERRC MSG_ID_ERRC_SIB8_DATA
+ERRC MSG_ID_ERRC_SIB9_DATA
+ERRC MSG_ID_ERRC_SIB10_DATA
+ERRC MSG_ID_ERRC_SIB11_DATA
+ERRC MSG_ID_ERRC_SIB12_DATA
+ERRC MSG_ID_ERRC_SYS_STS_TBL
+ERRC MSG_ID_ERRC_SYS_BCCH_TBL_CTRL_INF
+ERRC MSG_ID_ERRC_SYS_PWS_RECEPTION_TBL
+ERRC MSG_ID_ERRC_SYS_STORED_INF
+ERRC MSG_ID_ERRC_SYS_DLIST_HEAD_INF
+ERRC MSG_ID_ERRC_NVM_TBL
+ERRC MSG_ID_ERRC_SIM_INFO
+ERRC MSG_ID_ERRC_UE_CAPA_MNG_TBL
+ERRC MSG_ID_ERRC_UE_CA_COMB_INFO
+ERRC MSG_ID_ERRC_PWS_SETTING_TBL
+ERRC MSG_ID_ERRC_SPV_TBL
+ERRC MSG_ID_ERRC_CHM_CTRL_TBL
+ERRC MSG_ID_ERRC_CHM_L1_TABLE
+ERRC MSG_ID_ERRC_CHM_L2_TABLE
+ERRC MSG_ID_ERRC_FINGERPRINT_RECORD
+ERRC MSG_ID_ERRC_LEARNED_MCC_RECORD
+ERRC MSG_ID_ERRC_STORED_CELL_INF
+ERRC MSG_ID_ERRC_STORED_CARR_DATA
+ERRC MSG_ID_ERRC_RCM_TEST
+ERRC MSG_ID_ERRC_MRS_API_RESULT
+ERRC MSG_ID_ERRC_CHM_API_RESULT
+ERRC MSG_ID_ERRC_CONN_LEAVE_CONNECTED_MODE_IND
+ERRC MSG_ID_ERRC_MOB_CONN_FAKE_IRCCO_GCELL_IND
+ERRC MSG_ID_INEVT_END
+ESM MSG_ID_ESM_EVAL2ESM_BEGIN
+ESM MSG_ID_EVAL_ESM_PDN_CONN_EST_REQ
+ESM MSG_ID_EVAL_ESM_BEARER_RSC_ALLOC_REQ
+ESM MSG_ID_EVAL_ESM_BEARER_RSC_MOD_REQ
+ESM MSG_ID_EVAL_ESM_EPSB_DEACT_REQ
+ESM MSG_ID_EVAL_ESM_PDN_CONN_EST_RSP
+ESM MSG_ID_EVAL_ESM_PDN_CONN_UPDATE_RSP
+ESM MSG_ID_EVAL_ESM_EPS_ATTACH_NEEDED_REJ_RSP
+ESM MSG_ID_EVAL_ESM_RAT_CHANGE_REQ
+ESM MSG_ID_EVAL_ESM_RAT_CHANGE_RSP
+ESM MSG_ID_ESM_EMM2ESM_BEGIN
+ESM MSG_ID_ESM_EMM_URGE_TO_EST_IND
+ESM MSG_ID_ESM_EMM_DEREG_IND
+ESM MSG_ID_ESM_EMM_GET_ESM_CAUSE_IND
+ESM MSG_ID_ESM_EMM_GET_EPSB_STATUS_IND
+ESM MSG_ID_ESM_EMM_UPDATE_EPSB_STATUS_IND
+ESM MSG_ID_ESM_EMM_DATA_SUSPEND_IND
+ESM MSG_ID_ESM_EMM_DATA_RESUME_IND
+ESM MSG_ID_ESM_EMM_EPSBEARER_DATA_IND
+ESM MSG_ID_ESM_EMM_DATA_IND
+ESM MSG_ID_ESM_EMM_DATA_SEND_IND
+ESM MSG_ID_ESM_EMM_DATA_CNF
+ESM MSG_ID_ESM_EMM_CONN_RELEASE_IND
+ESM MSG_ID_ESM_EMM_REEST_REJ
+ESM MSG_ID_ESM_EMM_ABORT_CNF
+ESM MSG_ID_ESM_EMM_RAT_CHANGE_IND
+ESM MSG_ID_ESM_EMM_RAT_CHANGE_CNF
+ESM MSG_ID_ESM_EMM_EMC_ATTACH_REJ_IND
+ESM MSG_ID_ESM_EMM_URGE_TO_EMC_EST_IND
+ESM MSG_ID_ESM_EMM_EMC_DATA_FAIL_IND
+ESM MSG_ID_ESM_EMM_ENTER_EMC_ATTACH_IND
+ESM MSG_ID_ESM_LTM2ESM_BEGIN
+ESM MSG_ID_ESM_LTM_IDLE_LEAVE_IND
+ESM MSG_ID_ESM_LTM_EPSB_INIT_REQ
+ESM MSG_ID_ESM_LTM_EPSB_ACT_REQ
+ESM MSG_ID_ESM_LTM_EPSB_DEACT_REQ
+ESM MSG_ID_ESM_LTM_IDLE_ENTER_REQ
+ESM MSG_ID_ESM_LTM_IDLE_LEAVE_REQ
+ESM MSG_ID_ESM_LTM_IDLE_LEAVE_REJ
+ESM MSG_ID_ESM_LTM_UL_SUSPEND_REQ
+ESM MSG_ID_ESM_LTM_UL_RESUME_REQ
+ESM MSG_ID_ESM_SM2ESM_BEGIN
+ESM MSG_ID_SM_ESM_EPSB_CONTEXT_TRANSFER_RSP
+ESM MSG_ID_SM_ESM_PDP_CONTEXT_TRANSFER_REQ
+ESM MSG_ID_SM_ESM_STANDBY_ON_OLD_RAT_REQ
+ESM MSG_ID_ESM_MOD_GLOBAL_VAR_REQ
+ESM MSG_ID_ESM_STATUS_REPORT_IND
+ESM MSG_ID_ESM_STATUS_REPORT_RSP
+ESM MSG_ID_ESM_ENABLE_EM_INFO_IND_REQ
+ESM MSG_ID_ESM_CODE_END
+ETC MSG_ID_ETC_UPCM_TESTMODE_CNF
+ETC MSG_ID_ETC_UPCM_TESTLOOP_CNF
+ETC MSG_ID_ETC_UPCM_TESTMODE_REQ
+ETC MSG_ID_ETC_UPCM_TESTLOOP_REQ
+ETC MSG_ID_ETC_EMM_TESTMODE_CNF
+ETC MSG_ID_ETC_EMM_TESTLOOP_CNF
+ETC MSG_ID_ETC_EMM_DATA_IND
+ETC MSG_ID_ETC_EMM_DETACH_IND
+ETC MSG_ID_ETC_EMM_RELEASE_IND
+ETC MSG_ID_ETC_EMM_TESTMODE_REQ
+ETC MSG_ID_ETC_EMM_TESTLOOP_REQ
+ETC MSG_ID_ETC_EMM_DATA_REQ
+ETC MSG_ID_ETC_EMM_NW_RESET_UE_STORED_POS_INFO_IND
+ETC MSG_ID_ETC_CODE_END
+EVAL MSG_ID_L4C_EVAL_RAT_CHANGE_REQ
+EVAL MSG_ID_L4C_EVAL_RAT_CHANGE_RSP
+EVAL MSG_ID_L4C_EVAL_ETWS_SETTING_REQ
+EVAL MSG_ID_L4C_EVAL_GET_SSAC_PARAM_REQ
+EVAL MSG_ID_L4C_EVAL_NBR_CELL_INFO_START_REQ
+EVAL MSG_ID_L4C_EVAL_NBR_CELL_INFO_STOP_REQ
+EVAL MSG_ID_L4C_EVAL_VDM_VOICE_STATUS_REQ
+EVAL MSG_ID_EMMREG_INIT_REQ
+EVAL MSG_ID_EMMREG_SET_RAT_MODE_REQ
+EVAL MSG_ID_EMMREG_ATTACH_REQ
+EVAL MSG_ID_EMMREG_DETACH_REQ
+EVAL MSG_ID_EMMREG_RFOFF_REQ
+EVAL MSG_ID_EMMREG_SET_PREFERRED_BAND_REQ
+EVAL MSG_ID_EMMREG_EMC_ATTACH_REQ
+EVAL MSG_ID_EMMREG_EPS_ATTACH_NEEDED_REJ_RSP
+EVAL MSG_ID_EMMREG_ACTIVE_SIM_INFO_REQ
+EVAL MSG_ID_NWSEL_EVAL_PLMN_SEARCH_REQ
+EVAL MSG_ID_NWSEL_EVAL_SEARCH_STATUS_UPDATE_REQ
+EVAL MSG_ID_NWSEL_EVAL_SYS_INFO_UPDATE_REQ
+EVAL MSG_ID_NWSEL_EVAL_REGN_STATUS_UPDATE_REQ
+EVAL MSG_ID_NWSEL_EVAL_PLMN_LIST_REQ
+EVAL MSG_ID_NWSEL_EVAL_PLMN_LIST_STOP_REQ
+EVAL MSG_ID_NWSEL_EVAL_CSG_LIST_REQ
+EVAL MSG_ID_NWSEL_EVAL_CSG_LIST_STOP_REQ
+EVAL MSG_ID_NWSEL_EVAL_EQ_PLMN_LIST_UPDATE_REQ
+EVAL MSG_ID_NWSEL_EVAL_HPLMN_INFO_UPDATE_REQ
+EVAL MSG_ID_NWSEL_EVAL_DEACTIVATE_REQ
+EVAL MSG_ID_NWSEL_EVAL_NAS_CTXT_TRANSFER_REQ
+EVAL MSG_ID_NWSEL_EVAL_UEMODE_PARAM_UPDATE_REQ
+EVAL MSG_ID_NWSEL_EVAL_PLMN_SEARCH_PREFERENCE_UPDATE_REQ
+EVAL MSG_ID_NWSEL_EVAL_EMC_FPLMN_LIST_UPDATE_REQ
+EVAL MSG_ID_NWSEL_EVAL_RESUME_REQ
+EVAL MSG_ID_ESMREG_PDN_CONN_EST_REQ
+EVAL MSG_ID_ESMREG_BEARER_RSC_ALLOC_REQ
+EVAL MSG_ID_ESMREG_BEARER_RSC_MOD_REQ
+EVAL MSG_ID_ESMREG_EPSB_DEACT_REQ
+EVAL MSG_ID_ESMREG_PDN_CONN_EST_RSP
+EVAL MSG_ID_ESMREG_PDN_CONN_UPDATE_RSP
+EVAL MSG_ID_SMS_EVAL_EST_REQ
+EVAL MSG_ID_SMS_EVAL_UNITDATA_REQ
+EVAL MSG_ID_SMSAL_EVAL_CBCH_REQ
+EVAL MSG_ID_SMSAL_EVAL_CB_UPDATE_REQ
+EVAL MSG_ID_SMSAL_EVAL_CB_MSG_REMOVAL_REQ
+EVAL MSG_ID_EVAL_ETC_NW_RESET_UE_STORED_POS_INFO_IND
+EVAL MSG_ID_EVAL_EMM_SET_RAT_MODE_CNF
+EVAL MSG_ID_EVAL_EMM_ATTACH_CNF
+EVAL MSG_ID_EVAL_EMM_DETACH_IND
+EVAL MSG_ID_EVAL_EMM_RFOFF_CNF
+EVAL MSG_ID_EVAL_EMM_CELL_INFO_UPDATE_IND
+EVAL MSG_ID_EVAL_EMM_NW_INFO_IND
+EVAL MSG_ID_EVAL_EMM_NW_ECC_IND
+EVAL MSG_ID_EVAL_EMM_PLMN_SEARCH_CNF
+EVAL MSG_ID_EVAL_EMM_SYS_INFO_IND
+EVAL MSG_ID_EVAL_EMM_REGN_RESULT_IND
+EVAL MSG_ID_EVAL_EMM_NO_ACTION_IND
+EVAL MSG_ID_EVAL_EMM_PLMN_LIST_CNF
+EVAL MSG_ID_EVAL_EMM_PLMN_LIST_STOP_CNF
+EVAL MSG_ID_EVAL_EMM_CSG_LIST_CNF
+EVAL MSG_ID_EVAL_EMM_CSG_LIST_STOP_CNF
+EVAL MSG_ID_EVAL_EMM_OUT_OF_SERVICE_IND
+EVAL MSG_ID_EVAL_EMM_OUT_OF_SERVICE_FINISH_IND
+EVAL MSG_ID_EVAL_EMM_PLMN_LOSS_IND
+EVAL MSG_ID_EVAL_EMM_DEACTIVATE_CNF
+EVAL MSG_ID_EVAL_EMM_NAS_CTXT_TRANSFER_CNF
+EVAL MSG_ID_EVAL_EMM_SMS_EST_CNF
+EVAL MSG_ID_EVAL_EMM_SMS_EST_REJ
+EVAL MSG_ID_EVAL_EMM_SMS_UNITDATA_IND
+EVAL MSG_ID_EVAL_EMM_SMS_ERR_IND
+EVAL MSG_ID_EVAL_EMM_LPP_DATA_CNF
+EVAL MSG_ID_EVAL_EMM_LPP_DATA_IND
+EVAL MSG_ID_EVAL_EMM_LCS_DATA_CNF
+EVAL MSG_ID_EVAL_EMM_LCS_DATA_IND
+EVAL MSG_ID_EVAL_EMM_SIM_EPSNSC_INFO_IND
+EVAL MSG_ID_EVAL_EMM_SIM_EPSLOCI_INFO_IND
+EVAL MSG_ID_EVAL_EMM_AUTHENTICATE_IND
+EVAL MSG_ID_EVAL_EMM_PLMN_SEARCH_IND
+EVAL MSG_ID_EVAL_EMM_SIGNAL_APPEAR_IND
+EVAL MSG_ID_EVAL_EMM_EMERGENCY_STATUS_UPDATE_IND
+EVAL MSG_ID_EVAL_EMM_EMC_ATTACH_CNF
+EVAL MSG_ID_EVAL_EMM_EMC_DETACH_IND
+EVAL MSG_ID_EVAL_EMM_NW_FEATURE_SUPPORT_IND
+EVAL MSG_ID_EVAL_EMM_SRVCC_STATUS_UPDATE_IND
+EVAL MSG_ID_EVAL_EMM_NW_REJECT_IND
+EVAL MSG_ID_EVAL_ESM_PDN_CONN_EST_REJ
+EVAL MSG_ID_EVAL_ESM_BEARER_RSC_ALLOC_REJ
+EVAL MSG_ID_EVAL_ESM_BEARER_RSC_MOD_REJ
+EVAL MSG_ID_EVAL_ESM_EPSB_DEACT_REJ
+EVAL MSG_ID_EVAL_ESM_PDN_CONN_EST_IND
+EVAL MSG_ID_EVAL_ESM_PDN_CONN_UPDATE_IND
+EVAL MSG_ID_EVAL_ESM_EPSB_DEACT_IND
+EVAL MSG_ID_EVAL_ESM_EPS_ATTACH_NEEDED_IND
+EVAL MSG_ID_EVAL_ESM_RAT_CHANGE_IND
+EVAL MSG_ID_EVAL_ESM_RAT_CHANGE_CNF
+EVAL MSG_ID_EVAL_ESM_RAT_CHANGE_COMPLETE_IND
+EVAL MSG_ID_EVAL_ESM_EMC_ATTACH_IND
+EVAL MSG_ID_EVAL_ESM_SRVCC_STATUS_UPDATE_IND
+EVAL MSG_ID_EVAL_ESM_PS_INIT_BEARER_DEACT_IND
+EVAL MSG_ID_EVAL_ERRC_CB_RECONFIG_IND
+EVAL MSG_ID_EVAL_ERRC_CB_GS_CHANGE_IND
+EVAL MSG_ID_EVAL_ERRC_CELL_POWER_LEVEL_IND
+EVAL MSG_ID_EVAL_ERRC_ADJUST_MEAS_CNF
+EVAL MSG_ID_EVAL_ERRC_PWS_INFORMATION_IND
+EVAL MSG_ID_EVAL_ERRC_NBR_CELL_INFO_START_CNF
+EVAL MSG_ID_EVAL_ERRC_NBR_CELL_INFO_IND
+EVAL MSG_ID_EVAL_ERRC_NBR_CELL_INFO_STOP_CNF
+EVAL MSG_ID_EVAL_ERRC_GET_SSAC_PARAM_CNF
+EVAL MSG_ID_CISS_EVAL_DATA_REQ
+EVAL MSG_ID_EVAL_CODE_END
+EXT_MODEM MSG_ID_L4C_EXT_MODEM_SETUP_REQ
+EXT_MODEM MSG_ID_L4C_EXT_MODEM_DISC_REQ
+EXT_MODEM MSG_ID_EXT_MODEM_CODE_END
+FA MSG_ID_T30_FA_ACTIVATE_REQ
+FA MSG_ID_T30_FA_DEACTIVATE_REQ
+FA MSG_ID_T30_FA_CMD_REQ
+FA MSG_ID_T30_FA_DATA_REQ
+FA MSG_ID_T30_FA_TX_DATA_REQ
+FA MSG_ID_T30_FA_RX_DATA_REQ
+FA MSG_ID_T30_FA_FAX_RATE_REQ
+FA MSG_ID_T30_FA_SEND_DATA_REQ
+FA MSG_ID_FA_T30_HDLC_REQ
+FA MSG_ID_RA_FA_PROCESS_CMD_IND
+FA MSG_ID_RA_FA_ACTIVATE_CNF
+FA MSG_ID_RA_FA_DL_Q_FULL_IND
+FA MSG_ID_RA_FA_DL_Q_OVERFLOW_IND
+FA MSG_ID_RA_FA_UL_Q_UNDERFLOW_IND
+FA MSG_ID_RA_FA_TX_DATA_CNF
+FA MSG_ID_RA_FA_RX_DATA_CNF
+FA MSG_ID_RA_FA_RX_DATA_END_IND
+FA MSG_ID_RA_FA_TX_DATA_END_IND
+FA MSG_ID_RA_FA_RX_CMD_END_IND
+FA MSG_ID_RA_FA_TX_CMD_END_IND
+FA MSG_ID_RA_FA_RX_MSG_REC_IND
+FA MSG_ID_RA_FA_RATE_CHANGE_IND
+FA MSG_ID_FA_CODE_END
+FS MSG_ID_FS_STARTUP_REQ
+FS MSG_ID_FS_SERVICE_REQ_BEGIN
+FS MSG_ID_FS_ABORT_REQ
+FS MSG_ID_FS_OPEN_REQ
+FS MSG_ID_FS_GET_FOLDER_SIZE_REQ
+FS MSG_ID_FS_WRITE_REQ
+FS MSG_ID_FS_DELETE_REQ
+FS MSG_ID_FS_READ_REQ
+FS MSG_ID_FS_SEEK_REQ
+FS MSG_ID_FS_FIND_FIRST_REQ
+FS MSG_ID_FS_FIND_FIRST_N_REQ
+FS MSG_ID_FS_SERVICE_REQ_END
+FS MSG_ID_FS_SERVICE_RSP_BEGIN
+FS MSG_ID_FS_OPEN_RSP
+FS MSG_ID_FS_GET_FOLDER_SIZE_RSP
+FS MSG_ID_FS_WRITE_RSP
+FS MSG_ID_FS_DELETE_RSP
+FS MSG_ID_FS_READ_RSP
+FS MSG_ID_FS_SEEK_RSP
+FS MSG_ID_FS_FIND_FIRST_RSP
+FS MSG_ID_FS_FIND_FIRST_N_RSP
+FS MSG_ID_FS_SERVICE_RSP_END
+FS MSG_ID_FS_CODE_END
+FT MSG_ID_FT_TO_TST
+FT MSG_ID_TST_TO_FT
+FT MSG_ID_FT_TO_UL1TST
+FT MSG_ID_FTA_BASIC_REQ
+FT MSG_ID_FTA_BASIC_CNF
+FT MSG_ID_FTC_BASIC_REQ
+FT MSG_ID_FTC_BASIC_CNF
+GEMINI_GAS MSG_ID_UAS_GAS_SUSPEND_SERVICE_REQ
+GEMINI_GAS MSG_ID_UAS_GAS_RESUME_SERVICE_REQ
+GEMINI_GAS MSG_ID_GEMINI_GAS_CODE_END
+GEMINI_UAS MSG_ID_GAS_UAS_SUSPEND_SERVICE_REQ
+GEMINI_UAS MSG_ID_GAS_UAS_RESUME_SERVICE_REQ
+GEMINI_UAS MSG_ID_GEMINI_UAS_CODE_END
+GPS MSG_ID_GPS_UART_OPEN_REQ
+GPS MSG_ID_GPS_UART_READ_REQ
+GPS MSG_ID_GPS_UART_WRITE_REQ
+GPS MSG_ID_GPS_UART_CLOSE_REQ
+GPS MSG_ID_GPS_UART_OPEN_SWITCH_REQ
+GPS MSG_ID_GPS_UART_CLOSE_SWITCH_REQ
+GPS MSG_ID_GPS_POS_GAD_CNF
+GPS MSG_ID_GPS_LCSP_MSG_CODE_BEGIN
+GPS MSG_ID_GPS_LCSP_MEAS_GAD_CNF
+GPS MSG_ID_GPS_LCSP_ASSIST_DATA_CNF
+GPS MSG_ID_GPS_LCSP_MSG_CODE_END
+GPS MSG_ID_GPS_POS_GAD_REQ
+GPS MSG_ID_GPS_LCSP_MEAS_GAD_REQ
+GPS MSG_ID_GPS_LCSP_ASSIST_DATA_REQ
+GPS MSG_ID_GPS_LCSP_ABORT_REQ
+GPS MSG_ID_GPS_LCSP_AGPS_RESTART_IND
+GPS MSG_ID_RTC_GPS_TIME_CHANGE_IND
+GPS MSG_ID_GPS_HOST_WAKE_UP_IND
+GPS MSG_ID_UAGPS_CP_GPS_ASSIST_DATA_ENQUIRY_IND
+GPS MSG_ID_UAGPS_CP_GPS_SFN_GPS_TOW_DRIFT_TIME_REQ
+GPS MSG_ID_UAGPS_CP_GPS_SFN_GPS_TOW_DRIFT_TIME_CNF
+GPS MSG_ID_UAGPS_CP_GPS_SFN_GPS_TOW_DRIFT_TIME_CANCEL_REQ
+GPS MSG_ID_GPS_AREA_EVENT_ADD_RSP
+GPS MSG_ID_GPS_AREA_EVENT_ADD_REQ
+GPS MSG_ID_GPS_AREA_EVENT_DEL_REQ
+GPS MSG_ID_GPS_AREA_EVENT_HAPPEN_IND
+GPS MSG_ID_UAGPS_CP_GPS_POS_CHANGE_EVALUATION_REQ
+GPS MSG_ID_UAGPS_CP_GPS_POS_CHANGE_EVALUATION_RSP
+GPS MSG_ID_UAGPS_CP_GPS_POS_CHANGE_EVALUATION_DEL
+GPS MSG_ID_LCSP_GNSS_OPEN_REQ
+GPS MSG_ID_LCSP_GNSS_CLOSE_REQ
+GPS MSG_ID_LCSP_GNSS_COMMON_ASSIST_DATA_REQ
+GPS MSG_ID_LCSP_GNSS_GENERIC_ASSIST_DATA_REQ
+GPS MSG_ID_LCSP_GNSS_POS_REQ
+GPS MSG_ID_LCSP_GNSS_MEAS_REQ
+GPS MSG_ID_LCSP_GNSS_ABORT_REQ
+GPS MSG_ID_LCSP_GNSS_RESET_UE_STORED_POS_INFO
+GPS MSG_ID_LCSP_GNSS_COMMON_ASSIST_DATA_CNF
+GPS MSG_ID_LCSP_GNSS_GENERIC_ASSIST_DATA_CNF
+GPS MSG_ID_LCSP_GNSS_POS_CNF
+GPS MSG_ID_LCSP_GNSS_MEAS_CNF
+GPS MSG_ID_LCSP_GNSS_ADDITIONAL_ASSIST_DATA_REQ
+GPS MSG_ID_LBS_GNSS_PMTK_IND
+GPS MSG_ID_LBS_GNSS_GPS_CLOSE_REQ
+GPS MSG_ID_LBS_GNSS_GPS_OPEN_REQ
+GPS MSG_ID_LBS_GNSS_AGNSS_RESTART_IND
+GPS MSG_ID_LBS_GNSS_PMTK_REQ
+HAL_L1 MSG_ID_HAL_L1_GPS_TIME_SYNC_REQ
+HAL_L1 MSG_ID_HAL_L1_GPS_TIME_SYNC_IND
+HIF_MW MSG_ID_IPCORE_CODE_BEGIN
+HIF_MW MSG_ID_IPCORE_LINK_UP_REQ
+HIF_MW MSG_ID_IPCORE_LINK_DOWN_REQ
+HIF_MW MSG_ID_LMS_DL_SDU
+HIF_MW MSG_ID_LMS_NETIF_ATTACH
+HIF_MW MSG_ID_IPCORE_PROCESS_UL_QUEUE_REQ
+HIF_MW MSG_ID_IPCORE_RETRY_UL_RELOAD_REQ
+HIF_MW MSG_ID_IPCORE_DL_PACKET_FILTERED_REQ
+HIF_MW MSG_ID_IPCORE_UL_PACKET_FILTERED_REQ
+HIF_MW MSG_ID_IPCORE_IP_UP_REQ
+HIF_MW MSG_ID_IPCORE_IP_DOWN_REQ
+HIF_MW MSG_ID_IPCORE_LINK_UP_IND
+HIF_MW MSG_ID_IPCORE_IP_UP_IND
+HIF_MW MSG_ID_IPCORE_LINK_UP_RSP
+HIF_MW MSG_ID_IPCORE_IP_UP_RSP
+HIF_MW MSG_ID_IPCORE_QUERY_INFO_REQ
+HIF_MW MSG_ID_IPCORE_QUERY_INFO_CNF
+HIF_MW MSG_ID_IPCORE_DL_PACKET_FILTERED_WITH_INFO_REQ
+HIF_MW MSG_ID_IPCORE_UL_PACKET_FILTERED_WITH_INFO_REQ
+HIF_MW MSG_ID_IPCORE_CODE_TAIL
+HIF_MW MSG_ID_ETHERCORE_CODE_BEGIN
+HIF_MW MSG_ID_ETHERCORE_HANDLE_PACKET_REQ
+HIF_MW MSG_ID_ETHERCORE_LINK_UP_REQ
+HIF_MW MSG_ID_ETHERCORE_LINK_DOWN_REQ
+HIF_MW MSG_ID_ETHERCORE_CODE_TAIL
+HIF_MW MSG_ID_DHCP4C_CODE_BEGIN
+HIF_MW MSG_ID_DHCP4C_ACTIVATE_REQ
+HIF_MW MSG_ID_DHCP4C_DEACTIVATE_REQ
+HIF_MW MSG_ID_DHCP4C_PACKET_REQ
+HIF_MW MSG_ID_DHCP4C_ACTIVATE_RSP
+HIF_MW MSG_ID_DHCP4C_DEACTIVATE_RSP
+HIF_MW MSG_ID_DHCP4C_IP_UP_IND
+HIF_MW MSG_ID_DHCP4C_IP_DOWN_IND
+HIF_MW MSG_ID_DHCP4C_PACKET_IND
+HIF_MW MSG_ID_DHCP4C_CODE_TAIL
+HIF_MW MSG_ID_NDPC_CODE_BEGIN
+HIF_MW MSG_ID_NDPC_ACTIVATE_REQ
+HIF_MW MSG_ID_NDPC_DEACTIVATE_REQ
+HIF_MW MSG_ID_NDPC_PACKET_REQ
+HIF_MW MSG_ID_NDPC_ACTIVATE_RSP
+HIF_MW MSG_ID_NDPC_DEACTIVATE_RSP
+HIF_MW MSG_ID_NDPC_IP_UP_IND
+HIF_MW MSG_ID_NDPC_IP_DOWN_IND
+HIF_MW MSG_ID_NDPC_PACKET_IND
+HIF_MW MSG_ID_NDPC_CODE_TAIL
+HIF_MW MSG_ID_RNDIS_CODE_BEGIN
+HIF_MW MSG_ID_RNDIS_RELOAD_UL_BUFFER_REQ
+HIF_MW MSG_ID_RNDIS_START_HAD_REQ
+HIF_MW MSG_ID_RNDIS_START_DATA_PATH_REQ
+HIF_MW MSG_ID_RNDIS_STOP_DATA_PATH_REQ
+HIF_MW MSG_ID_RNDIS_DISCONNECTED_DEV_SHUTDOWN_REQ
+HIF_MW MSG_ID_RNDIS_CONNECTED_DEV_SHUTDOWN_REQ
+HIF_MW MSG_ID_RNDIS_CODE_TAIL
+HIF_MW MSG_ID_CCCI_TTY_CODE_BEGIN
+HIF_MW MSG_ID_CCCI_TTY_SESSION_INIT_REQ
+HIF_MW MSG_ID_CCCI_TTY_SESSION_DEINIT_REQ
+HIF_MW MSG_ID_CCCI_TTY_UL_DEQUEUE_REQ
+HIF_MW MSG_ID_CCCI_TTY_CODE_TAIL
+HIF_MW MSG_ID_CCMNI_CODE_BEGIN
+HIF_MW MSG_ID_CCMNI_LINK_UP_REQ
+HIF_MW MSG_ID_CCMNI_LINK_DOWN_REQ
+HIF_MW MSG_ID_CCMNI_SESSION_INIT_REQ
+HIF_MW MSG_ID_CCMNI_SESSION_DEINIT_REQ
+HIF_MW MSG_ID_CCMNI_RETRY_UL_RELOAD_REQ
+HIF_MW MSG_ID_CCMNI_CODE_TAIL
+HIF_MW MSG_ID_MS_CODE_BEGIN
+HIF_MW MSG_ID_MS_CTRL_USB_SETUP_PKT
+HIF_MW MSG_ID_MS_CTRL_USB_CTRL_COMPLETED
+HIF_MW MSG_ID_MS_CTRL_USB_ATTACHED
+HIF_MW MSG_ID_MS_CTRL_USB_SUSPENDING
+HIF_MW MSG_ID_MS_CTRL_USB_RESUME
+HIF_MW MSG_ID_MS_CTRL_USB_DETACHING
+HIF_MW MSG_ID_MS_CTRL_USB_RESET
+HIF_MW MSG_ID_MS_CTRL_USB_SPEED_CHANGED
+HIF_MW MSG_ID_MS_CTRL_REINIT_REQ
+HIF_MW MSG_ID_MS_CTRL_UL_RELOAD_REQ
+HIF_MW MSG_ID_MS_DATA_RX_COMPLETED
+HIF_MW MSG_ID_MS_DATA_TX_COMPLETED
+HIF_MW MSG_ID_MS_BULKIN_EP_STALL
+HIF_MW MSG_ID_MS_BULKOUT_EP_STALL
+HIF_MW MSG_ID_MS_SET_USB_MODE_REQ
+HIF_MW MSG_ID_MS_RESET_DEVICE_REQ
+HIF_MW MSG_ID_MS_CODE_TAIL
+HIF_MW MSG_ID_AOMGR_CODE_BEGIN
+HIF_MW MSG_ID_AOMGR_LINK_DOWN_IND
+HIF_MW MSG_ID_AOMGR_CODE_TAIL
+HIF_MW MSG_ID_USBCORE_CODE_BEGIN
+HIF_MW MSG_ID_USBCORE_SUSPEND_TO_IDLE
+HIF_MW MSG_ID_USBCORE_CODE_TAIL
+HIF_MW MSG_ID_CDCECM_CODE_BEGIN
+HIF_MW MSG_ID_CDCECM_RELOAD_UPLINK_REQ
+HIF_MW MSG_ID_CDCECM_START_DATA_PATH_REQ
+HIF_MW MSG_ID_CDCECM_STOP_DATA_PATH_REQ
+HIF_MW MSG_ID_CDCECM_CODE_TAIL
+HIF_MW MSG_ID_USBCLASS_USBCORE_ESL_CODE_BEGIN
+HIF_MW MSG_ID_USBCLASS_USBCORE_ESL_ENTER_CONNECTED_STATE_REQ
+HIF_MW MSG_ID_USBCLASS_USBCORE_ESL_CODE_TAIL
+HIF_SVC MSG_ID_HMU_CODE_BEGIN
+HIF_SVC MSG_ID_HMU_CODE_TAIL
+L1 MSG_ID_MPHC_POWER_SCAN_REQ
+L1 MSG_ID_MPHC_MANUSEL_PWRSCAN_REQ
+L1 MSG_ID_MPHC_MANUSEL_PWRSCAN_STOP_REQ
+L1 MSG_ID_MPHC_BSIC_SYNC_REQ
+L1 MSG_ID_MPHC_SPECIFIC_SYNC_REQ
+L1 MSG_ID_MPHC_SERV_BCCH_MONITOR_REQ
+L1 MSG_ID_MPHC_IDLE_CCCH_START_REQ
+L1 MSG_ID_MPHC_CCCH_UPDATE_REQ
+L1 MSG_ID_MPHC_PAGE_MODE_CHANGE_REQ
+L1 MSG_ID_MPHC_SMART_PAGE_START_REQ
+L1 MSG_ID_MPHC_RANDOM_ACCESS_REQ
+L1 MSG_ID_MPHC_RACH_ABORT_REQ
+L1 MSG_ID_MPHC_IMMED_ASSIGN_REQ
+L1 MSG_ID_MPHC_CHANNEL_ASSIGN_REQ
+L1 MSG_ID_MPHC_CHANNEL_RELEASE_REQ
+L1 MSG_ID_MPHC_HANDOVER_REQ
+L1 MSG_ID_MPHC_HANDOVER_ACCESS_STOP_REQ
+L1 MSG_ID_MPHC_CHANNEL_RECONNECT_REQ
+L1 MSG_ID_MPHC_FREQUENCY_REDEFINITION_REQ
+L1 MSG_ID_MPHC_CHANNEL_MODE_MODIFY_REQ
+L1 MSG_ID_MPHC_CIPHERING_MODE_COMMAND_REQ
+L1 MSG_ID_MPHC_CLOSE_TCH_LOOP_REQ
+L1 MSG_ID_MPHC_OPEN_TCH_LOOP_REQ
+L1 MSG_ID_MPHC_DAI_TEST_REQ
+L1 MSG_ID_MPHC_POWER_CLASS_REQ
+L1 MSG_ID_MPHC_CELL_OPTION_UPDATE_REQ
+L1 MSG_ID_MPHC_EXTENDED_MEAS_REQ
+L1 MSG_ID_MPHC_NEIGHBOR_MEAS_REQ
+L1 MSG_ID_MPHC_NEIGHBOR_BSIC_START_REQ
+L1 MSG_ID_MPHC_NEIGHBOR_BSIC_STOP_REQ
+L1 MSG_ID_MPHC_NEIGHBOR_SYS_INFO_READ_REQ
+L1 MSG_ID_MPHC_NEIGHBOR_SYS_INFO_STOP_REQ
+L1 MSG_ID_MPHC_CELL_BSIC_START_REQ
+L1 MSG_ID_MPHC_CELL_BSIC_STOP_REQ
+L1 MSG_ID_MPHC_CELL_SYS_INFO_READ_REQ
+L1 MSG_ID_MPHC_CELL_SYS_INFO_STOP_REQ
+L1 MSG_ID_MPHC_CBCH_CONFIG_REQ
+L1 MSG_ID_MPHC_CBCH_START_REQ
+L1 MSG_ID_MPHC_CBCH_STOP_REQ
+L1 MSG_ID_MPHC_CBCH_SKIP_REQ
+L1 MSG_ID_MPHC_BLIND_HANDOVER_BSIC_REQ
+L1 MSG_ID_MPHC_DEACTIVATE_REQ
+L1 MSG_ID_MPHC_SIM_READY_NOTIFY_REQ
+L1 MSG_ID_MPHC_CELL_SELECTION_INIT_REQ
+L1 MSG_ID_MPHP_DOWNLINK_SINGLE_BLOCK_REQ
+L1 MSG_ID_MPHP_INTERFERENCE_MEAS_REQ
+L1 MSG_ID_MPHP_PACKET_IDLE_CCCH_START_REQ
+L1 MSG_ID_MPHP_PACKET_DOWNLINK_ASSIGNMENT_REQ
+L1 MSG_ID_MPHP_PACKET_NC_MEAS_START_REQ
+L1 MSG_ID_MPHP_PACKET_NC_MEAS_STOP_REQ
+L1 MSG_ID_MPHP_PACKET_PDCH_RELEASE_REQ
+L1 MSG_ID_MPHP_PACKET_UNASSIGNMENT_REQ
+L1 MSG_ID_MPHP_PACKET_UPLINK_ASSIGNMENT_REQ
+L1 MSG_ID_MPHP_PACKET_TIMESLOT_RECONFIGURE_REQ
+L1 MSG_ID_MPHP_PDCH_FAIL_RECONNECT_REQ
+L1 MSG_ID_MPHP_POLL_RESPONSE_REQ
+L1 MSG_ID_MPHP_POWER_CONTROL_UPDATE_REQ
+L1 MSG_ID_MPHP_REPEAT_ALLOCATION_REQ
+L1 MSG_ID_MPHP_TIMING_ADVANCE_UPDATE_REQ
+L1 MSG_ID_MPHP_UPLINK_SINGLE_BLOCK_REQ
+L1 MSG_ID_MPHP_MONITOR_PAGE_IN_PTM_START_REQ
+L1 MSG_ID_MPHP_MONITOR_PAGE_IN_PTM_STOP_REQ
+L1 MSG_ID_MPHC_ACTIVE_REQ
+L1 MSG_ID_MPHM_STANDBY_REQ
+L1 MSG_ID_MPHM_STANDBY_GSM_MEAS_START_REQ
+L1 MSG_ID_MPHM_STANDBY_GSM_MEAS_STOP_REQ
+L1 MSG_ID_MPHM_STANDBY_GSM_PRIO_MEAS_START_REQ
+L1 MSG_ID_MPHM_STANDBY_GSM_PRIO_MEAS_STOP_REQ
+L1 MSG_ID_MPHM_STANDBY_GSM_BSIC_READ_REQ
+L1 MSG_ID_MPHM_STANDBY_GSM_BSIC_STOP_REQ
+L1 MSG_ID_MPHM_STANDBY_CELL_BSIC_RES_REQ
+L1 MSG_ID_MPHM_INTER_RAT_HANDOVER_REQ
+L1 MSG_ID_MPHM_STANDBY_GSM_REPORT_CGI_PWRSCAN_REQ
+L1 MSG_ID_MPHM_STANDBY_GSM_REPORT_CGI_PWRSCAN_STOP_REQ
+L1 MSG_ID_MPHM_STANDBY_GSM_REPORT_CGI_BSIC_START_REQ
+L1 MSG_ID_MPHM_STANDBY_GSM_REPORT_CGI_BSIC_STOP_REQ
+L1 MSG_ID_MPHM_STANDBY_GSM_REPORT_CGI_SYS_INFO_START_REQ
+L1 MSG_ID_MPHM_STANDBY_GSM_REPORT_CGI_SYS_INFO_STOP_REQ
+L1 MSG_ID_MPHP_EGPRS_LOOP_REQ
+L1 MSG_ID_MPHP_UPDATE_IR_RESET_REQ
+L1 MSG_ID_MPHC_POWER_SCAN_CNF
+L1 MSG_ID_L1_CNF_CODE_BEGIN
+L1 MSG_ID_MPHC_MANUSEL_PWRSCAN_CNF
+L1 MSG_ID_MPHC_BSIC_SYNC_CNF
+L1 MSG_ID_MPHC_UNITDATA_IND
+L1 MSG_ID_MPHC_RANDOM_ACCESS_CNF
+L1 MSG_ID_MPHC_IMMED_ASSIGN_CNF
+L1 MSG_ID_MPHC_CHANNEL_ASSIGN_CNF
+L1 MSG_ID_MPHC_CHANNEL_RELEASE_CNF
+L1 MSG_ID_MPHC_HANDOVER_CNF
+L1 MSG_ID_MPHC_HANDOVER_ACCESS_START_IND
+L1 MSG_ID_MPHC_HANDOVER_CONNECTED_IND
+L1 MSG_ID_MPHC_HANDOVER_ACCESS_STOP_CNF
+L1 MSG_ID_MPHC_CHANNEL_RECONNECT_CNF
+L1 MSG_ID_MPHC_FREQUENCY_REDEFINITION_CNF
+L1 MSG_ID_MPHC_CHANNEL_MODE_MODIFY_CNF
+L1 MSG_ID_MPHC_CIPHERING_MODE_COMMAND_CNF
+L1 MSG_ID_MPHC_CLOSE_TCH_LOOP_CNF
+L1 MSG_ID_MPHC_OPEN_TCH_LOOP_CNF
+L1 MSG_ID_MPHC_EXTENDED_MEAS_IND
+L1 MSG_ID_MPHC_BLOCK_QUALITY_IND
+L1 MSG_ID_MPHC_SERV_IDLE_MEAS_IND
+L1 MSG_ID_MPHC_SERV_DEDI_MEAS_IND
+L1 MSG_ID_MPHC_NEIGHBOR_MEAS_IND
+L1 MSG_ID_MPHC_NEIGHBOR_BSIC_IND
+L1 MSG_ID_MPHC_CELL_BSIC_IND
+L1 MSG_ID_MPHC_BLIND_HANDOVER_BSIC_IND
+L1 MSG_ID_MPHC_CELL_SELECTION_INIT_CNF
+L1 MSG_ID_MPHC_ACTIVE_CNF
+L1 MSG_ID_MPHC_DEACTIVATE_CNF
+L1 MSG_ID_MPHP_DOWNLINK_SINGLE_BLOCK_CNF
+L1 MSG_ID_MPHP_INTERFERENCE_MEAS_IND
+L1 MSG_ID_MPHP_PACKET_BLOCK_QUALITY_IND
+L1 MSG_ID_MPHP_PACKET_DATA_IND
+L1 MSG_ID_MPHP_PACKET_DOWNLINK_ASSIGNMENT_CNF
+L1 MSG_ID_MPHP_PACKET_NC_MEAS_IND
+L1 MSG_ID_MPHP_PACKET_SERV_MEAS_IND
+L1 MSG_ID_MPHP_PACKET_UNASSIGNMENT_CNF
+L1 MSG_ID_MPHP_PACKET_UPLINK_ASSIGNMENT_CNF
+L1 MSG_ID_MPHP_PACKET_TIMESLOT_RECONFIGURE_CNF
+L1 MSG_ID_MPHP_PDCH_FAIL_RECONNECT_CNF
+L1 MSG_ID_MPHP_POLL_RESPONSE_CNF
+L1 MSG_ID_MPHP_REPEAT_ALLOCATION_IND
+L1 MSG_ID_MPHP_UPLINK_SINGLE_BLOCK_CNF
+L1 MSG_ID_MPHP_EGPRS_LOOP_CNF
+L1 MSG_ID_L1_CNF_CODE_END
+L1 MSG_ID_MPHM_STANDBY_CNF
+L1 MSG_ID_MPHM_L1_CNF_CODE_BEGIN
+L1 MSG_ID_MPHM_STANDBY_GSM_MEAS_IND
+L1 MSG_ID_MPHM_STANDBY_GSM_PRIO_MEAS_IND
+L1 MSG_ID_MPHM_STANDBY_GSM_BSIC_IND
+L1 MSG_ID_MPHM_INTER_RAT_HANDOVER_CNF
+L1 MSG_ID_MPHM_STANDBY_GSM_REPORT_CGI_PWRSCAN_CNF
+L1 MSG_ID_MPHM_STANDBY_GSM_REPORT_CGI_BSIC_IND
+L1 MSG_ID_MPHM_L1_CNF_CODE_END
+L1HISR MSG_ID_L1TASK_WAKEUP
+L1HISR MSG_ID_CRYSTAL_THERMAL_CHANGE_NOTIFY
+L1_EXT MSG_ID_L4CL1_QUERY_CAL_DATA_DL_STATUS_REQ
+L1_EXT MSG_ID_L4CL1_QUERY_CAL_DATA_DL_STATUS_CNF
+L2R MSG_ID_CSM_L2R_ACTIVATE_REQ
+L2R MSG_ID_CSM_L2R_DEACTIVATE_REQ
+L2R MSG_ID_CSM_L2R_UART_SETOWNER_REQ
+L2R MSG_ID_CSM_L2R_ESC_OFF_REQ
+L2R MSG_ID_PPP_L2R_DATA_REQ
+L2R MSG_ID_SMU_L2R_DATA_REQ
+L2R MSG_ID_L2R_RLP_CONN_CNF
+L2R MSG_ID_L2R_RLP_CONN_IND
+L2R MSG_ID_L2R_RLP_XID_IND
+L2R MSG_ID_L2R_RLP_TEST_CNF
+L2R MSG_ID_L2R_RLP_UNITDATA_IND
+L2R MSG_ID_L2R_RLP_DISC_CNF
+L2R MSG_ID_L2R_RLP_DISC_IND
+L2R MSG_ID_L2R_RLP_DETACH_CNF
+L2R MSG_ID_L2R_RLP_ERROR_IND
+L2R MSG_ID_L2R_RLP_RESET_CNF
+L2R MSG_ID_L2R_RLP_RESET_IND
+L2R MSG_ID_L2R_RLP_DATA_IND
+L2R MSG_ID_L2R_RLP_READY_IND
+L2R MSG_ID_L2R_RLP_CHANGE_RATE_IND
+L2R MSG_ID_L2R_RLP_PREPARE_REMAP_IND
+L2R MSG_ID_L2R_RLP_REMAP_IND
+L2R MSG_ID_FLC_CSD_DL_APPDU_RESUME
+L2R MSG_ID_L2R_CODE_END
+L4C MSG_ID_L4CCSM_CC_STARTUP_CNF
+L4C MSG_ID_L4CCSM_CC_ACM_RESET_CNF
+L4C MSG_ID_L4CCSM_CC_ACMMAX_SET_CNF
+L4C MSG_ID_L4CCSM_CC_LAST_CCM_RESET_CNF
+L4C MSG_ID_L4CCSM_CC_CRSS_CNF
+L4C MSG_ID_L4CCSM_CC_CALL_DEFLECTION_CNF
+L4C MSG_ID_L4CCSM_CC_START_DTMF_CNF
+L4C MSG_ID_L4CCSM_CC_STOP_DTMF_CNF
+L4C MSG_ID_L4CCSM_CC_CALL_ACCEPT_CNF
+L4C MSG_ID_L4CCSM_CC_CALL_MODIFY_CNF
+L4C MSG_ID_L4CCSM_CC_CALL_SETUP_CNF
+L4C MSG_ID_L4CCSM_CC_CALL_DISC_CNF
+L4C MSG_ID_L4CCSM_CC_EMERGENCY_CALL_SETUP_CNF
+L4C MSG_ID_L4CCSM_CC_SAT_SETUP_CNF
+L4C MSG_ID_L4CCSM_CC_SAT_SEND_DTMF_CNF
+L4C MSG_ID_L4CCSM_CC_UPDATE_ALS_CNF
+L4C MSG_ID_L4CCSM_CISS_STARTUP_CNF
+L4C MSG_ID_L4CCSM_CISS_SS_PARSE_CNF
+L4C MSG_ID_L4CCSM_CISS_CF_END_CNF
+L4C MSG_ID_L4CCSM_CISS_CW_END_CNF
+L4C MSG_ID_L4CCSM_CISS_CB_END_CNF
+L4C MSG_ID_L4CCSM_CISS_EMLPP_END_CNF
+L4C MSG_ID_L4CCSM_CISS_CLI_END_CNF
+L4C MSG_ID_L4CCSM_CISS_CCBS_END_CNF
+L4C MSG_ID_L4CCSM_CISS_PUSSR_END_CNF
+L4C MSG_ID_L4CCSM_CISS_USSR_END_CNF
+L4C MSG_ID_L4CCSM_CISS_USSN_END_CNF
+L4C MSG_ID_L4CCSM_CISS_SIM_END_CNF
+L4C MSG_ID_L4CCSM_CISS_AERP_END_CNF
+L4C MSG_ID_L4CCSM_CISS_MOLR_END_CNF
+L4C MSG_ID_L4CUEM_STARTUP_CNF
+L4C MSG_ID_L4CUEM_SET_AUDIO_PROFILE_CNF
+L4C MSG_ID_L4CUEM_SET_AUDIO_PARAM_CNF
+L4C MSG_ID_L4CUEM_SET_HW_LEVEL_CNF
+L4C MSG_ID_L4CUEM_AUDIO_PLAY_BY_NAME_CNF
+L4C MSG_ID_L4CUEM_AUDIO_STOP_BY_NAME_CNF
+L4C MSG_ID_L4CUEM_AUDIO_PLAY_BY_STRING_CNF
+L4C MSG_ID_L4CUEM_AUDIO_STOP_BY_STRING_CNF
+L4C MSG_ID_L4CRAC_ACT_CNF
+L4C MSG_ID_L4CRAC_REG_CNF
+L4C MSG_ID_L4CRAC_PS_REG_CNF
+L4C MSG_ID_L4CRAC_DEREG_CNF
+L4C MSG_ID_L4CRAC_PLMN_LIST_CNF
+L4C MSG_ID_L4CRAC_CLASS_CHANGE_CNF
+L4C MSG_ID_L4CRAC_SET_PREFERRED_BAND_CNF
+L4C MSG_ID_L4CRAC_RFOFF_CNF
+L4C MSG_ID_L4CRAC_SET_ROAMING_MODE_CNF
+L4C MSG_ID_L4CRAC_PLMN_SEARCH_CNF
+L4C MSG_ID_L4CRAC_SET_RAT_MODE_CNF
+L4C MSG_ID_L4CRAC_PLMN_LIST_STOP_CNF
+L4C MSG_ID_L4CRAC_SET_PREFER_RAT_CNF
+L4C MSG_ID_L4CRAC_END_PS_DATA_SESSION_CNF
+L4C MSG_ID_L4CRAC_CSG_LIST_CNF
+L4C MSG_ID_L4CRAC_CSG_LIST_STOP_CNF
+L4C MSG_ID_L4CRAC_SET_SMS_PREFERENCE_CNF
+L4C MSG_ID_L4CRAC_SET_VOICE_DOMAIN_PREFERENCE_CNF
+L4C MSG_ID_L4CRAC_SET_UE_USAGE_SETTING_CNF
+L4C MSG_ID_L4CRAC_SET_UE_MODE_CNF
+L4C MSG_ID_L4CRAC_SET_IMS_VOICE_AVAILABILITY_CNF
+L4C MSG_ID_L4CRAC_SET_IMS_SMS_AVAILABILITY_CNF
+L4C MSG_ID_L4CRAC_IMS_REG_STATUS_UPDATE_CNF
+L4C MSG_ID_L4CRAC_SUSP_RESU_UPDATE_CNF
+L4C MSG_ID_L4CPHB_INIT_LN_CNF
+L4C MSG_ID_L4CPHB_STARTUP_CNF
+L4C MSG_ID_L4CPHB_SEARCH_CNF
+L4C MSG_ID_L4CPHB_READ_CNF
+L4C MSG_ID_L4CPHB_WRITE_CNF
+L4C MSG_ID_L4CPHB_DELETE_CNF
+L4C MSG_ID_L4CPHB_READ_LN_CNF
+L4C MSG_ID_L4CPHB_WRITE_LN_CNF
+L4C MSG_ID_L4CPHB_DELETE_LN_CNF
+L4C MSG_ID_L4CPHB_APPROVE_CNF
+L4C MSG_ID_L4CPHB_SYNC_CNF
+L4C MSG_ID_L4CPHB_WRITE_USIM_CNF
+L4C MSG_ID_L4CPHB_READ_USIM_CNF
+L4C MSG_ID_L4CPHB_DELETE_USIM_CNF
+L4C MSG_ID_L4CPHB_CHECK_WRITE_USIM_ENTRY_CNF
+L4C MSG_ID_L4CPHB_FDN_GET_NAME_CNF
+L4C MSG_ID_L4CSMU_START_CNF
+L4C MSG_ID_L4CSMU_APP_START_CNF
+L4C MSG_ID_L4CSMU_SECURITY_CNF
+L4C MSG_ID_L4CSMU_APP_SECURITY_CNF
+L4C MSG_ID_L4CSMU_SET_PERSONALIZATION_CNF
+L4C MSG_ID_L4CSMU_GET_SHARED_KEY_CNF
+L4C MSG_ID_L4CSMU_UPDATE_SLB_CNF
+L4C MSG_ID_L4CSMU_RESET_SLB_CNF
+L4C MSG_ID_L4CSMU_GET_SLB_VERSION_CNF
+L4C MSG_ID_L4CSMU_SML_EVENT_IND
+L4C MSG_ID_L4CSMU_SML_STATUS_CNF
+L4C MSG_ID_L4CSMU_PLMN_SEL_WRITE_CNF
+L4C MSG_ID_L4CSMU_SIM_ACCESS_CNF
+L4C MSG_ID_L4CSMU_PUCT_WRITE_CNF
+L4C MSG_ID_L4CSMU_CSP_READ_CNF
+L4C MSG_ID_L4CSMU_DIAL_MODE_CNF
+L4C MSG_ID_L4CSMU_PUCT_READ_CNF
+L4C MSG_ID_SAT_MENU_SELECT_CNF
+L4C MSG_ID_L4CSMU_SAT_OPEN_CHANNEL_CNF
+L4C MSG_ID_L4CSMSAL_INIT_CNF
+L4C MSG_ID_L4CSMSAL_READ_CNF
+L4C MSG_ID_L4CSMSAL_SEND_CNF
+L4C MSG_ID_L4CSMSAL_WRITE_CNF
+L4C MSG_ID_L4CSMSAL_DELETE_CNF
+L4C MSG_ID_L4CSMSAL_SEND_FROM_STORAGE_CNF
+L4C MSG_ID_L4CSMSAL_SEND_ABORT_CNF
+L4C MSG_ID_L4CSMSAL_SEND_DELIVER_REPORT_CNF
+L4C MSG_ID_L4CSMSAL_SAT_SEND_CNF
+L4C MSG_ID_L4CSMSAL_CB_UPDATE_CNF
+L4C MSG_ID_L4CSMSAL_SET_COMMON_PARA_CNF
+L4C MSG_ID_L4CSMSAL_SET_PROFILE_PARA_CNF
+L4C MSG_ID_L4CSMSAL_COPY_MSG_CNF
+L4C MSG_ID_L4CSMSAL_SET_STATUS_CNF
+L4C MSG_ID_L4CSMSAL_GET_MAILBOX_NUM_CNF
+L4C MSG_ID_L4CSMSAL_SET_MSG_WAITING_CNF
+L4C MSG_ID_TCM_PDP_ACTIVATE_CNF
+L4C MSG_ID_TCM_PDP_ACTIVATE_REJ
+L4C MSG_ID_TCM_PDP_DEACTIVATE_CNF
+L4C MSG_ID_TCM_PDP_MODIFY_CNF
+L4C MSG_ID_TCM_PDP_MODIFY_REJ
+L4C MSG_ID_L4CTCM_START_CNF
+L4C MSG_ID_L4CTCM_SET_PRI_PDP_INFO_CNF
+L4C MSG_ID_L4CTCM_SET_SEC_PDP_INFO_CNF
+L4C MSG_ID_L4CTCM_SET_QOS_INFO_CNF
+L4C MSG_ID_L4CTCM_SET_EQOS_INFO_CNF
+L4C MSG_ID_L4CTCM_SET_EPS_QOS_INFO_CNF
+L4C MSG_ID_L4CTCM_SET_PPP_AUTH_CNF
+L4C MSG_ID_L4CTCM_SET_MSQ_MODE_CNF
+L4C MSG_ID_L4CTCM_SET_MSQ_ENTRY_CNF
+L4C MSG_ID_L4CTCM_UNDEFINE_PDP_INFO_CNF
+L4C MSG_ID_L4CTCM_SET_ACL_MODE_CNF
+L4C MSG_ID_L4CTCM_GET_ACL_ENTRIES_CNF
+L4C MSG_ID_L4CTCM_SET_ACL_ENTRY_CNF
+L4C MSG_ID_L4CTCM_ADD_ACL_ENTRY_CNF
+L4C MSG_ID_L4CTCM_DEL_ACL_ENTRY_CNF
+L4C MSG_ID_L4CPPP_ACTIVATE_CNF
+L4C MSG_ID_L4CPPP_DEACTIVATE_CNF
+L4C MSG_ID_L4CPPP_RESUME_CNF
+L4C MSG_ID_L4CTCM_ENTER_DATA_MODE_CNF
+L4C MSG_ID_L4CTCM_LEAVE_DATA_MODE_CNF
+L4C MSG_ID_L4CTCM_SET_CONFIG_OPTION_CNF
+L4C MSG_ID_L4CTCM_QUERY_EXT_GPRS_HISTORY_RSP
+L4C MSG_ID_L4CTCM_RESET_EXT_GPRS_HISTORY_CNF
+L4C MSG_ID_L4CTCM_GET_GPRS_STATISTICS_INFO_RSP
+L4C MSG_ID_L4CABM_START_CNF
+L4C MSG_ID_L4C_OPEN_UART_PORT_CNF
+L4C MSG_ID_L4C_CLOSE_UART_PORT_CNF
+L4C MSG_ID_L4C_CHANGE_UART_PORT_CNF
+L4C MSG_ID_L4CDT_DOWNLOAD_CNF
+L4C MSG_ID_L4CDT_UPLOAD_CNF
+L4C MSG_ID_L4CDT_FILELIST_CNF
+L4C MSG_ID_L4CDT_FILECOUNT_CNF
+L4C MSG_ID_L4CDT_DISKINFO_CNF
+L4C MSG_ID_L4CPS_NBR_CELL_INFO_START_CNF
+L4C MSG_ID_L4CPS_NBR_CELL_INFO_STOP_CNF
+L4C MSG_ID_L4CSM_RAT_CHANGE_CNF
+L4C MSG_ID_L4C_EVAL_RAT_CHANGE_CNF
+L4C MSG_ID_L4C_EVAL_NBR_CELL_INFO_START_CNF
+L4C MSG_ID_L4C_EVAL_NBR_CELL_INFO_STOP_CNF
+L4C MSG_ID_L4CRAC_SET_RECOVERY_SEARCH_TIMER_CNF
+L4C MSG_ID_L4CRAC_GET_RECOVERY_SEARCH_TIMER_CNF
+L4C MSG_ID_L4CCSM_CC_ATTACH_IND
+L4C MSG_ID_L4CCSM_CC_DETACH_IND
+L4C MSG_ID_L4CCSM_CC_CCM_IND
+L4C MSG_ID_L4CCSM_CC_CALL_MODIFY_IND
+L4C MSG_ID_L4CCSM_CC_CALL_SETUP_IND
+L4C MSG_ID_L4CCSM_CC_CALL_ALERT_IND
+L4C MSG_ID_L4CCSM_CC_CALL_CONNECT_IND
+L4C MSG_ID_L4CCSM_CC_CALL_DISC_IND
+L4C MSG_ID_L4CCSM_CC_CALL_REL_IND
+L4C MSG_ID_L4CCSM_CC_PROGRESS_IND
+L4C MSG_ID_L4CCSM_CC_CALL_PROC_IND
+L4C MSG_ID_L4CCSM_CC_NOTIFY_SS_IND
+L4C MSG_ID_L4CCSM_CC_AUTO_DTMF_START_IND
+L4C MSG_ID_L4CCSM_CC_AUTO_DTMF_COMPLETE_IND
+L4C MSG_ID_L4CCSM_CC_CCBS_CALL_DEACTIVATE_IND
+L4C MSG_ID_L4CCSM_CC_CALL_PREEMPT_IND
+L4C MSG_ID_L4CCSM_CC_UART_TRANSFER_IND
+L4C MSG_ID_L4CCSM_CC_CSD_EST_IND
+L4C MSG_ID_L4CCSM_CPHS_DISPLAY_ALS_IND
+L4C MSG_ID_L4CCSM_CC_CALL_INFO_IND
+L4C MSG_ID_L4CCSM_CC_CPI_IND
+L4C MSG_ID_L4CCSM_CC_CALL_SYNC_IND
+L4C MSG_ID_L4CCSM_CC_VIDEO_CALL_STATUS_IND
+L4C MSG_ID_L4CCSM_CC_UPDATE_CALL_STATE_IND
+L4C MSG_ID_L4CCSM_CC_CALL_PRESENT_IND
+L4C MSG_ID_L4CCSM_CISS_USSR_BEGIN_IND
+L4C MSG_ID_L4CCSM_CISS_USSN_BEGIN_IND
+L4C MSG_ID_L4CCSM_CISS_USSR_FAC_IND
+L4C MSG_ID_L4CCSM_CISS_USSN_FAC_IND
+L4C MSG_ID_L4CCSM_CISS_CB_FAC_IND
+L4C MSG_ID_L4CCSM_CPHS_DISPLAY_CFU_IND
+L4C MSG_ID_L4CCSM_CISS_MTLR_BEGIN_IND
+L4C MSG_ID_L4CCSM_CISS_AERQ_BEGIN_IND
+L4C MSG_ID_L4CCSM_CISS_AERP_FAC_IND
+L4C MSG_ID_L4CCSM_CISS_AECL_BEGIN_IND
+L4C MSG_ID_L4CCSM_CISS_MOLR_FAC_IND
+L4C MSG_ID_L4CRAC_REG_STATE_IND
+L4C MSG_ID_L4CRAC_REG_CAUSE_IND
+L4C MSG_ID_L4CRAC_NW_INFO_IND
+L4C MSG_ID_L4CRAC_CIPHER_IND
+L4C MSG_ID_L4CRAC_NW_ECC_IND
+L4C MSG_ID_L4CRAC_PS_EVENT_REPORT_IND
+L4C MSG_ID_L4CRAC_PLMN_LIST_IND
+L4C MSG_ID_L4CRAC_SUSPEND_STATUS_IND
+L4C MSG_ID_L4CRAC_PLMN_STATUS_IND
+L4C MSG_ID_L4CRAC_NW_FEATURE_IND
+L4C MSG_ID_L4CRAC_EPS_ATTACH_NEEDED_IND
+L4C MSG_ID_L4C_EVAL_RAT_CHANGE_IND
+L4C MSG_ID_L4C_EVAL_NBR_CELL_INFO_IND
+L4C MSG_ID_L4CRAC_PEER_REJECT_IND
+L4C MSG_ID_L4CSMU_SECURITY_IND
+L4C MSG_ID_L4CSMU_MMRR_READY_IND
+L4C MSG_ID_L4CSMU_MMI_INFO_IND
+L4C MSG_ID_L4CSMU_APP_READY_IND
+L4C MSG_ID_SAT_DSPL_TEXT_IND
+L4C MSG_ID_SAT_GET_INKEY_IND
+L4C MSG_ID_SAT_GET_INPUT_IND
+L4C MSG_ID_SAT_SETUP_MENU_IND
+L4C MSG_ID_SAT_SELECT_ITEM_IND
+L4C MSG_ID_SAT_PLAY_TONE_IND
+L4C MSG_ID_SAT_SETUP_CALL_IND
+L4C MSG_ID_SAT_SEND_SMS_IND
+L4C MSG_ID_SAT_SEND_SS_IND
+L4C MSG_ID_SAT_SEND_USSD_IND
+L4C MSG_ID_SAT_MMI_INFO_IND
+L4C MSG_ID_SAT_SETUP_IDLE_DSPL_IND
+L4C MSG_ID_SAT_RUN_AT_COMMAND_IND
+L4C MSG_ID_SAT_SEND_DTMF_IND
+L4C MSG_ID_SAT_LANG_NOTIFY_IND
+L4C MSG_ID_SAT_LAUNCH_BROWSER_IND
+L4C MSG_ID_SAT_NO_OTHER_CMD_IND
+L4C MSG_ID_L4CSMU_SAT_SET_CSD_PROF_IND
+L4C MSG_ID_L4CSMU_SAT_SET_GPRS_PROF_IND
+L4C MSG_ID_L4CSMU_SAT_OPEN_CHANNEL_IND
+L4C MSG_ID_L4CSMU_SAT_CLOSE_CHANNEL_IND
+L4C MSG_ID_L4CSMU_SAT_SEND_DATA_IND
+L4C MSG_ID_L4CSMU_SAT_RECV_DATA_IND
+L4C MSG_ID_L4CSMU_SAT_NOTIFY_MMI_IND
+L4C MSG_ID_L4CSMSAL_CB_MSG_TEXT_IND
+L4C MSG_ID_L4CSMSAL_CB_MSG_PDU_IND
+L4C MSG_ID_L4CSMSAL_CB_DL_IND
+L4C MSG_ID_L4CSMSAL_MT_SMS_FINAL_ACK_IND
+L4C MSG_ID_L4CSMSAL_MEM_FULL_IND
+L4C MSG_ID_L4CSMSAL_MEM_EXCEED_IND
+L4C MSG_ID_L4CSMSAL_MEM_AVAILABLE_IND
+L4C MSG_ID_L4CSMSAL_MSG_WAITING_IND
+L4C MSG_ID_L4CSMSAL_ENHANCED_VOICE_MAIL_IND
+L4C MSG_ID_L4CSMSAL_NEW_MSG_PDU_IND
+L4C MSG_ID_L4CSMSAL_NEW_MSG_TEXT_IND
+L4C MSG_ID_L4CSMSAL_NEW_MSG_INDEX_IND
+L4C MSG_ID_L4CSMSAL_APP_DATA_IND
+L4C MSG_ID_L4CSMSAL_SYNC_MSG_IND
+L4C MSG_ID_L4CSMSAL_STARTUP_READ_MSG_IND
+L4C MSG_ID_L4CSMSAL_STARTUP_BEGIN_IND
+L4C MSG_ID_L4CSMSAL_STARTUP_FINISH_IND
+L4C MSG_ID_L4CSMSAL_FDN_CHECK_IND
+L4C MSG_ID_L4CSMSAL_CB_GS_CHANGE_IND
+L4C MSG_ID_TCM_PDP_ACTIVATE_IND
+L4C MSG_ID_TCM_SEC_PDP_ACTIVATE_IND
+L4C MSG_ID_TCM_PDP_DEACTIVATE_IND
+L4C MSG_ID_TCM_PDP_MODIFY_IND
+L4C MSG_ID_TCM_MOBILITY_STATUS_IND
+L4C MSG_ID_TCM_EVENT_REP_IND
+L4C MSG_ID_L4CTCM_PS_EVENT_REPORT_IND
+L4C MSG_ID_L4CTCM_BEARER_CAPABILITY_IND
+L4C MSG_ID_L4CPPP_DEACTIVATE_IND
+L4C MSG_ID_L4CPPP_ESCAPE_IND
+L4C MSG_ID_L4CPPP_PPPTYPEPDP_ACTIVATED_IND
+L4C MSG_ID_L4CPPP_IPV4V6_FALLBACK_IND
+L4C MSG_ID_L4CPPP_INITIAL_IP_TYPE_IND
+L4C MSG_ID_L4CSM_RAT_CHANGE_IND
+L4C MSG_ID_L4CPHB_STARTUP_BEGIN_IND
+L4C MSG_ID_L4CPHB_STARTUP_READ_IND
+L4C MSG_ID_FLC_STATUS_REPORT_IND
+L4C MSG_ID_L4CPS_NBR_CELL_INFO_IND
+L4C MSG_ID_L4CPS_GAS_CELL_POWER_LEVEL_IND
+L4C MSG_ID_L4CPS_UAS_CELL_POWER_LEVEL_IND
+L4C MSG_ID_L4C_EVAL_CELL_POWER_LEVEL_IND
+L4C MSG_ID_L4CRAC_END_PS_DATA_SESSION_IND
+L4C MSG_ID_L4C_OPEN_UART_PORT_REQ
+L4C MSG_ID_L4C_CLOSE_UART_PORT_REQ
+L4C MSG_ID_L4C_CHANGE_UART_PORT_REQ
+L4C MSG_ID_LBS_MTLR_BEGIN_RES_REQ
+L4C MSG_ID_LBS_AERQ_BEGIN_RES_REQ
+L4C MSG_ID_LBS_AERP_BEGIN_REQ
+L4C MSG_ID_LBS_AERP_END_REQ
+L4C MSG_ID_LBS_AECL_BEGIN_RES_REQ
+L4C MSG_ID_LBS_MOLR_BEGIN_REQ
+L4C MSG_ID_LBS_MOLR_END_REQ
+L4C MSG_ID_AGPS_ENABLE_DISABLE_REQ
+L4C MSG_ID_AGPS_KEY_UPDATE_REQ
+L4C MSG_ID_AGPS_CP_ABORT_REQ
+L4C MSG_ID_L4C_LBS_SERVICE_STATE_REQ
+L4C MSG_ID_L4C_LBS_ROAMING_STATE_REQ
+L4C MSG_ID_L4C_LBS_DATA_CONN_STATE_REQ
+L4C MSG_ID_L4C_LBS_CURRENT_RAT_REQ
+L4C MSG_ID_L4C_CODE_END
+L4_PUBLIC MSG_ID_GATI_DATA_IND
+L4_PUBLIC MSG_ID_GATI_DATA_RSP
+L4_PUBLIC MSG_ID_GATI_DATA_REQ
+L4_PUBLIC MSG_ID_GATI_DATA_CNF
+L4_PUBLIC MSG_ID_GATI_RTW_IND
+L4_PUBLIC MSG_ID_GATI_CTRL_REQ
+L4_PUBLIC MSG_ID_GATI_CTRL_CNF
+L4_PUBLIC MSG_ID_GATI_SWITCH_MODE_REQ
+L4_PUBLIC MSG_ID_GATI_SWITCH_MODE_CNF
+L4_PUBLIC MSG_ID_ATCIDT_FORCE_TRANSFER_REQ
+L4_PUBLIC MSG_ID_ATCIDT_FORCE_TRANSFER_CNF
+L4_PUBLIC MSG_ID_MMI_ATCI_MASTER_SIM_CHANGE_REQ
+L4_PUBLIC MSG_ID_MMI_ATCI_MASTER_SIM_CHANGE_CNF
+L4_PUBLIC MSG_ID_RMMI_REGISTER_CHANNEL_REQ
+L4_PUBLIC MSG_ID_RMMI_REGISTER_CHANNEL_CNF
+L4_PUBLIC MSG_ID_RMMI_EXE_AT_REQ
+L4_PUBLIC MSG_ID_RMMI_EXE_AT_CNF
+L4_PUBLIC MSG_ID_RMMI_RESPONSE_AT_IND
+L4_PUBLIC MSG_ID_RMMI_URC_AT_IND
+L4_PUBLIC MSG_ID_L4C_END_PS_DATA_SENSSION_REQ
+L4_PUBLIC MSG_ID_RMMI_LOCK_AT_CMD_REQ
+L4_PUBLIC MSG_ID_RMMI_LOCK_AT_CMD_CNF
+L4_PUBLIC MSG_ID_L4C_NBR_CELL_INFO_REG_REQ
+L4_PUBLIC MSG_ID_L4C_NBR_CELL_INFO_REG_CNF
+L4_PUBLIC MSG_ID_L4C_NBR_CELL_INFO_DEREG_REQ
+L4_PUBLIC MSG_ID_L4C_NBR_CELL_INFO_DEREG_CNF
+L4_PUBLIC MSG_ID_L4C_NBR_CELL_INFO_IND
+L4_PUBLIC MSG_ID_GAS_DATA_IND
+L4_PUBLIC MSG_ID_GAS_DATA_REQ
+L4_PUBLIC MSG_ID_L4C_MAX_TX_PWR_RED_REQ
+L4_PUBLIC MSG_ID_L4C_REGIONAL_PHONE_MODE_REQ
+L4_PUBLIC MSG_ID_L4C_MEAS_INFO_REQ
+L4_PUBLIC MSG_ID_L4C_ASSERT_BYPASS_TRACE_IND
+L4_PUBLIC MSG_ID_L4CTST_AT_RESPONSE_IND
+L4_PUBLIC MSG_ID_LBSAP_DATA_RECV_IND
+L4_PUBLIC MSG_ID_LBSAP_DATA_SEND_REQ
+L4_PUBLIC MSG_ID_L4_PUBLIC_CODE_END
+LAPDM MSG_ID_RR_LAPDM_DATA_REQ
+LAPDM MSG_ID_RR_LAPDM_UNITDATA_REQ
+LAPDM MSG_ID_RR_LAPDM_APP_DATA_REQ
+LAPDM MSG_ID_RR_LAPDM_CLEAR_APP_QUEUE_REQ
+LAPDM MSG_ID_RR_LAPDM_ESTB_REQ
+LAPDM MSG_ID_RR_LAPDM_SUS_REQ
+LAPDM MSG_ID_RR_LAPDM_RESUME_REQ
+LAPDM MSG_ID_RR_LAPDM_RECON_REQ
+LAPDM MSG_ID_RR_LAPDM_REL_REQ
+LAPDM MSG_ID_RR_LAPDM_MDL_REL_REQ
+LAPDM MSG_ID_RR_LAPDM_CELL_OPTION_UPDATE_REQ
+LAPDM MSG_ID_LAPDM_UL_DATA_REQ
+LAPDM MSG_ID_LAPDM_DOWNLINK_IND
+LAPDM MSG_ID_RR_LAPDM_INTER_RAT_EST_REQ
+LAPDM MSG_ID_LAPDM_CODE_END
+LAPDM MSG_ID_RR_MPAL_DEDICATED_DATA_REQ
+LAPDM MSG_ID_MPAL_RR_DEDICATED_DATA_IND
+LAPDM MSG_ID_MPAL_RR_DEDICATED_READY_TO_SEND_IND
+LAPDM MSG_ID_MPAL_RR_DEDICATED_DATA_CALLBACK_IND
+LAPDM MSG_ID_MPAL_RR_DEDICATED_READY_TO_SEND_CALLBACK_IND
+LBS MSG_ID_LBS_MTLR_BEGIN_IND
+LBS MSG_ID_LBS_MTLR_BEGIN_RES_RSP
+LBS MSG_ID_LBS_AERQ_BEGIN_IND
+LBS MSG_ID_LBS_AERQ_BEGIN_RES_RSP
+LBS MSG_ID_LBS_AERP_BEGIN_RSP
+LBS MSG_ID_LBS_AERP_END_RSP
+LBS MSG_ID_LBS_AECL_BEGIN_IND
+LBS MSG_ID_LBS_AECL_BEGIN_RES_RSP
+LBS MSG_ID_LBS_MOLR_BEGIN_RSP
+LBS MSG_ID_LBS_MOLR_END_RSP
+LBS MSG_ID_AGPS_RESET_POSITIONING_IND
+LBS MSG_ID_AGPS_CP_START_IND
+LBS MSG_ID_AGPS_CP_END_IND
+LBS MSG_ID_L4C_LBS_SERVICE_STATE_RSP
+LBS MSG_ID_L4C_LBS_ROAMING_STATE_RSP
+LBS MSG_ID_L4C_LBS_DATA_CONN_STATE_RSP
+LBS MSG_ID_L4C_LBS_CURRENT_RAT_RSP
+LL1 MSG_ID_MPHD_GSM_GAP_SERVICE_REQ
+LL1 MSG_ID_MPHD_GSM_TICK_IND
+LL1 MSG_ID_MPHD_GSM_GAP_PATTERN_IND
+LL1 MSG_ID_MPHD_GSM_GAP_STOP_REQ
+LL1 MSG_ID_MPHD_GSM_GAP_STOP_CNF
+LL1 MSG_ID_MPHD_GSM_SC_MODE_IND
+LL1 MSG_ID_MPHD_UMTS_GAP_SERVICE_REQ
+LL1 MSG_ID_MPHD_UMTS_PARAM_NOTIFY_IND
+LL1 MSG_ID_MPHD_UMTS_GAP_STOP_REQ
+LL1 MSG_ID_MPHD_UMTS_GAP_STOP_CNF
+LL1 MSG_ID_MPHD_UMTS_FMO_LOCK_REQ
+LL1 MSG_ID_MPHD_UMTS_FMO_UNLOCK_REQ
+LL1 MSG_ID_MPHD_UMTS_FMO_LOCK_CNF
+LL1 MSG_ID_MPHD_GSM_PM_DONE_IND
+LL1 MSG_ID_MPHD_IRAT_SYNC_READY_IND
+LL1 MSG_ID_MPHD_IRAT_SYNC_COMPLETE_IND
+LL1 MSG_ID_MPHD_IRAT_SYNC_CNF
+LL1 MSG_ID_MPHD_IRAT_UMTS_TIMING_CHANGE_IND
+LL1 MSG_ID_MPHD_IRAT_SYNC_REQ
+LL1 MSG_ID_MPHD_IRAT_SYNC_IND
+LL1 MSG_ID_MPHD_GSM_GAP_UNAVAILABLE_IND
+LL1 MSG_ID_MPHD_GSM_GAP_AVAILABLE_IND
+LL1 MSG_ID_MPHD_UMTS_GAP_UNAVAILABLE_IND
+LL1 MSG_ID_MPHD_UMTS_GAP_AVAILABLE_IND
+LL1 MSG_ID_MPHD_DUAL_MODE_PRIMITIVE_END
+LL1 MSG_ID_MPHD_UMTS_GAP_PATTERN_PCH_IND
+LL1 MSG_ID_MPHD_UMTS_GAP_PATTERN_FACH_IND
+LL1 MSG_ID_MPHD_UMTS_GAP_PATTERN_DCH_IND
+LL1 MSG_ID_MPHD_UMTS_MODE_IND
+LL1 MSG_ID_MPHD_UMTS_CELL_MEAS_DONE_IND
+LLC MSG_ID_LLSMS_UNITDATA_REQ
+LLC MSG_ID_LLTOM_UNITDATA_REQ
+LLC MSG_ID_LLGMM_UNITDATA_REQ
+LLC MSG_ID_LLGMM_ASSIGN_REQ
+LLC MSG_ID_LLGMM_TRIGGER_REQ
+LLC MSG_ID_LLGMM_SUSPEND_REQ
+LLC MSG_ID_LLGMM_RESUME_REQ
+LLC MSG_ID_LLSND_UNITDATA_REQ
+LLC MSG_ID_LLSND_DATA_REQ
+LLC MSG_ID_LLSND_XID_REQ
+LLC MSG_ID_LLSND_XID_RES
+LLC MSG_ID_LLSND_ESTABLISH_REQ
+LLC MSG_ID_LLSND_ESTABLISH_RES
+LLC MSG_ID_LLSND_RELEASE_REQ
+LLC MSG_ID_LLSND_CREATE_REG_REQ
+LLC MSG_ID_LLSND_SAPI_MEM_XID
+LLC MSG_ID_LLSND_RNR_STOP
+LLC MSG_ID_GRR_DATA_IND
+LLC MSG_ID_GRR_UNITDATA_IND
+LLC MSG_ID_GRR_STATUS_IND
+LLC MSG_ID_GRR_FLUSH_CNF
+LLC MSG_ID_RATCM_LLC_ASSIGN_REQ
+LLC MSG_ID_RATCM_LLC_RESUME_REQ
+LLC MSG_ID_RATCM_LLC_SUSPEND_REQ
+LLC MSG_ID_RATCM_LLC_TRIGGER_REQ
+LLC MSG_ID_RATCM_LLC_UNITDATA_REQ
+LLC MSG_ID_SAPI_MEM_FLOW_ON_REQ
+LLC MSG_ID_RLC_LLC_FLOW_CONTROL_OFF
+LLC MSG_ID_LL_TIMER_EXPIRY
+LLC MSG_ID_LL_CIPHER_RSP
+LLC MSG_ID_LL_DECIPHER_RSP
+LLC MSG_ID_RLC_LLC_RNR_TRIGGER
+LLC MSG_ID_LLSND_SAPI_ACT_REQ
+LLC MSG_ID_GRR_CIBUFF_AVAIL_IND
+LLC MSG_ID_AS_NAS_DATA_CNF
+LLC MSG_ID_LLSND_FLUSH_REQ
+LLC MSG_ID_LLSND_SAPI_DEACT_REQ
+LLC MSG_ID_LLC_CODE_END
+LPP MSG_ID_LPP_LBS_SESSION_START_IND
+LPP MSG_ID_LPP_LBS_SESSION_END_IND
+LPP MSG_ID_LPP_LBS_POS_METHOD_IND
+LPP MSG_ID_LPP_LBS_SESSION_END_REQ
+LPP MSG_ID_LPP_LBS_CAPABILITY_UPDATE_REQ
+LPP MSG_ID_LPP_LBS_RESET_UE_STORED_POS_INFO_REQ
+LPP MSG_ID_LPP_EL1MPC_OTDOA_MEAS_REQ
+LPP MSG_ID_LPP_EL1MPC_OTDOA_ASSIST_DATA_REQ
+LPP MSG_ID_LPP_EL1MPC_OTDOA_MEAS_ABORT_REQ
+LPP MSG_ID_LPP_EL1MPC_OTDOA_ASSIST_DATA_CLEAR_NTF
+LPP MSG_ID_LPP_ERRC_ECID_MEAS_CNF
+LPP MSG_ID_LPP_EL1MPC_OTDOA_MEAS_CNF
+LPP MSG_ID_LPP_EL1MPC_OTDOA_ASSIST_DATA_CNF
+LPP MSG_ID_LPP_EL1MPC_OTDOA_ADDITIONAL_ASSIST_DATA_IND
+LPP MSG_ID_LPP_EVAL_DATA_REQ
+LPP MSG_ID_LPP_EVAL_DATA_IND
+LPP MSG_ID_LPP_EVAL_DATA_CNF
+LPP MSG_ID_EVAL_LPP_NW_RESET_UE_STORED_POS_INFO_IND
+LPP MSG_ID_LPP_SUPL_PDU_DATA_REQ
+LPP MSG_ID_LPP_SUPL_PDU_DATA_IND
+LPP MSG_ID_LPP_SUPL_PDU_DATA_CNF
+LPP MSG_ID_LPP_PEER_OTDOA_MEAS_REQ
+LPP MSG_ID_LPP_PEER_OTDOA_ASSIST_DATA_REQ
+LPP MSG_ID_LPP_PEER_OTDOA_MEAS_ABORT_REQ
+LPP MSG_ID_LPP_PEER_ECID_MEAS_REQ
+LPP MSG_ID_LPP_PEER_ECID_MEAS_ABORT_REQ
+LPP MSG_ID_LPP_PEER_EUTRAN_BAND_UPDATE_REQ
+LPP MSG_ID_LPP_PEER_OTDOA_MEAS_CNF
+LPP MSG_ID_LPP_PEER_OTDOA_ASSIST_DATA_CNF
+LPP MSG_ID_LPP_PEER_OTDOA_ADDITIONAL_ASSIST_DATA_REQ
+LPP MSG_ID_LPP_PEER_ECID_MEAS_CNF
+LPP MSG_ID_LPP_PEER_EUTRAN_BAND_UPDATE_CNF
+LPP MSG_ID_LPP_CODE_END
+MAC MSG_ID_RLC_MAC_RES_REQ
+MAC MSG_ID_RLC_MAC_TBF_REL_REQ
+MAC MSG_ID_RLC_MAC_UL_DATA_IND
+MAC MSG_ID_RLC_MAC_ACK_RES
+MAC MSG_ID_RMPC_MAC_CTRL_MSG_REQ
+MAC MSG_ID_RMPC_MAC_CTRL_MSG_DELETE_REQ
+MAC MSG_ID_RMPC_MAC_UL_ASSIGN_IND
+MAC MSG_ID_RMPC_MAC_DL_ASSIGN_IND
+MAC MSG_ID_RMPC_MAC_SUSPEND_TBF_REQ
+MAC MSG_ID_RMPC_MAC_RESUME_TBF_REQ
+MAC MSG_ID_RMPC_MAC_SI_INFO_READY_IND
+MAC MSG_ID_RMPC_MAC_PS_HANDOVER_REQ
+MAC MSG_ID_RMPC_MAC_PS_HANDOVER_ERROR_RSP
+MAC MSG_ID_MPAL_RR_PS_HANDOVER_CNF
+MAC MSG_ID_MPAL_RR_PS_HANDOVER_RECONNECT_CNF
+MAC MSG_ID_MPAL_RR_TRANSFER_DATA_IND
+MAC MSG_ID_MPAL_RR_EGPRS_TRANSFER_DATA_IND
+MAC MSG_ID_MPAL_RR_READY_TO_SEND_IND
+MAC MSG_ID_MPAL_RR_PDTCH_DISCONN_CNF
+MAC MSG_ID_MPAL_RR_CCCH_RRBP_CNF
+MAC MSG_ID_MAC_MAC_TRANS_DATA_IND
+MAC MSG_ID_MPAL_RR_EGPRS_LOOP_CNF
+MAC MSG_ID_MPAL_RR_PDTCH_CONNECT_IND
+MAC MSG_ID_MAC_RMPC_COMMON_CODE_BEGIN
+MAC MSG_ID_MPAL_RR_INT_MEASUREMENT_IND
+MAC MSG_ID_MAC_RMPC_COMMON_CODE_END
+MAC MSG_ID_MAC_CODE_END
+MBCI MSG_ID_UPS_MBCI_COMMAND_REQ
+MBCI MSG_ID_UPS_MBCI_COMMAND_RSP
+MBCI MSG_ID_UPS_MBCI_STATUS_IND
+MBCI MSG_ID_UPS_MBCI_LOOPBACK_START_IND
+MBCI MSG_ID_UPS_MBCI_LOOPBACK_STOP_IND
+MBCI MSG_ID_MBCI_CODE_END
+MED MSG_ID_MED_STARTUP_REQ
+MED MSG_ID_MED_STARTUP_CNF
+MED MSG_ID_MEDIA_IN_PROC_CALL_REQ
+MED MSG_ID_MEDIA_IN_PROC_CALL_CNF
+MED MSG_ID_MEDIA_AUD_SET_AUDIO_MODE_REQ
+MED MSG_ID_MED_AUD_HAL_CODE_BEGIN
+MED MSG_ID_MEDIA_AUD_SET_AUDIO_MODE_CNF
+MED MSG_ID_MEDIA_AUD_GET_AUDIO_PROFILE_REQ
+MED MSG_ID_MEDIA_AUD_GET_AUDIO_PROFILE_CNF
+MED MSG_ID_MEDIA_AUD_SET_AUDIO_PROFILE_REQ
+MED MSG_ID_MEDIA_AUD_SET_AUDIO_PROFILE_CNF
+MED MSG_ID_MEDIA_AUD_GET_AUDIO_PARAM_REQ
+MED MSG_ID_MEDIA_AUD_GET_AUDIO_PARAM_CNF
+MED MSG_ID_MEDIA_AUD_SET_AUDIO_PARAM_REQ
+MED MSG_ID_MEDIA_AUD_SET_AUDIO_PARAM_CNF
+MED MSG_ID_MEDIA_AUD_GET_VOLUME_REQ
+MED MSG_ID_MEDIA_AUD_GET_VOLUME_CNF
+MED MSG_ID_MEDIA_AUD_SET_VOLUME_REQ
+MED MSG_ID_MEDIA_AUD_SET_VOLUME_CNF
+MED MSG_ID_MEDIA_AUD_SET_DEVICE_REQ
+MED MSG_ID_MEDIA_AUD_SET_DEVICE_CNF
+MED MSG_ID_MEDIA_AUD_MUTE_REQ
+MED MSG_ID_MEDIA_AUD_MUTE_CNF
+MED MSG_ID_MEDIA_AUD_PLAY_BY_ID_REQ
+MED MSG_ID_MEDIA_AUD_PLAY_BY_ID_CNF
+MED MSG_ID_MEDIA_AUD_STOP_BY_ID_REQ
+MED MSG_ID_MEDIA_AUD_STOP_BY_ID_CNF
+MED MSG_ID_MEDIA_AUD_PLAY_BY_STRING_REQ
+MED MSG_ID_MEDIA_AUD_PLAY_BY_STRING_CNF
+MED MSG_ID_MEDIA_AUD_STOP_BY_STRING_REQ
+MED MSG_ID_MEDIA_AUD_STOP_BY_STRING_CNF
+MED MSG_ID_MEDIA_AUD_PLAY_BY_FILE_REQ
+MED MSG_ID_MEDIA_AUD_PLAY_BY_FILE_CNF
+MED MSG_ID_MEDIA_AUD_STOP_REQ
+MED MSG_ID_MEDIA_AUD_STOP_CNF
+MED MSG_ID_MEDIA_AUD_PLAY_FINISH_IND
+MED MSG_ID_MEDIA_AUD_EMSD_MONITOR_REQ
+MED MSG_ID_MEDIA_AUD_EMSD_CODE_BEGIN
+MED MSG_ID_MEDIA_AUD_EMSD_MONITOR_CNF
+MED MSG_ID_MEDIA_AUD_EMSD_SET_REQ
+MED MSG_ID_MEDIA_AUD_EMSD_SET_CNF
+MED MSG_ID_MEDIA_AUD_EMSD_PUSH_REQ
+MED MSG_ID_MEDIA_AUD_EMSD_PUSH_CNF
+MED MSG_ID_MEDIA_AUD_EMSD_PULL_IND
+MED MSG_ID_MEDIA_AUD_EMSD_HACK_IND
+MED MSG_ID_MEDIA_AUD_EMSD_LACK_IND
+MED MSG_ID_MEDIA_AUD_EMSD_SYNC_IND
+MED MSG_ID_MEDIA_AUD_EMSD_PSAP_MONITOR_REQ
+MED MSG_ID_MEDIA_AUD_EMSD_PSAP_MONITOR_CNF
+MED MSG_ID_MEDIA_AUD_EMSD_PSAP_PULL_REQ
+MED MSG_ID_MEDIA_AUD_EMSD_PSAP_PULL_CNF
+MED MSG_ID_MEDIA_AUD_EMSD_PSAP_DATA_IND
+MED MSG_ID_MEDIA_AUD_EMSD_CODE_END
+MED MSG_ID_MEDIA_AUD_SP_SET_MODE_REQ
+MED MSG_ID_MEDIA_AUD_SP_SET_MODE_CNF
+MED MSG_ID_MEDIA_AUD_SP_SET_FIR_COEFF_REQ
+MED MSG_ID_MEDIA_AUD_GET_AUDIO_WB_INPUT_FIR_PARAM_REQ
+MED MSG_ID_MEDIA_AUD_GET_AUDIO_WB_INPUT_FIR_PARAM_CNF
+MED MSG_ID_MEDIA_AUD_GET_AUDIO_WB_OUTPUT_FIR_PARAM_REQ
+MED MSG_ID_MEDIA_AUD_GET_AUDIO_WB_OUTPUT_FIR_PARAM_CNF
+MED MSG_ID_MEDIA_AUD_GET_AUDIO_WB_MODE_PARAM_REQ
+MED MSG_ID_MEDIA_AUD_GET_AUDIO_WB_MODE_PARAM_CNF
+MED MSG_ID_MEDIA_AUD_SET_AUDIO_WB_INPUT_FIR_PARAM_REQ
+MED MSG_ID_MEDIA_AUD_SET_AUDIO_WB_INPUT_FIR_PARAM_CNF
+MED MSG_ID_MEDIA_AUD_SET_AUDIO_WB_OUTPUT_FIR_PARAM_REQ
+MED MSG_ID_MEDIA_AUD_SET_AUDIO_WB_OUTPUT_FIR_PARAM_CNF
+MED MSG_ID_MEDIA_AUD_SET_AUDIO_WB_MODE_PARAM_REQ
+MED MSG_ID_MEDIA_AUD_SET_AUDIO_WB_MODE_PARAM_CNF
+MED MSG_ID_MEDIA_AUD_SP_SET_ENHANCE_MODE_REQ
+MED MSG_ID_MED_CODE_END
+MEME MSG_ID_MEME_UMAC_TRAFFIC_VOLUME_MEASUREMENT_IND
+MEME MSG_ID_MEME_UMAC_QUALITY_MEASUREMENT_IND
+MEME MSG_ID_MEME_UMAC_ADDITIONAL_TVM_IND
+MEME MSG_ID_MEME_UMAC_MEASUREMENT_ERROR_IND
+MEME MSG_ID_MEME_UMAC_TVM_EXCEED_THRESHOLD_IND
+MEME MSG_ID_MEME_UMAC_COUNTC_STATUS_IND
+MEME MSG_ID_RRCE_MEME_MOVE_TO_STATE_REQ
+MEME MSG_ID_MEME_RRCE_COMPRESSED_MODE_RECONFIGURE_FAILURE_IND
+MEME MSG_ID_MEME_RRCE_COMPRESSED_MODE_RECONFIGURE_SUCCESS_IND
+MEME MSG_ID_RRCE_MEME_ASU_IND
+MEME MSG_ID_MEME_SLCE_SUSPEND_REPORT_IND
+MEME MSG_ID_MEME_SLCE_RESUME_REPORT_IND
+MEME MSG_ID_MEME_SLCE_MEASUREMENT_CONFIG_CELL_CNF
+MEME MSG_ID_MEME_SLCE_MEASUREMENT_CONFIG_TGPS_CNF
+MEME MSG_ID_CSCE_MEME_INITIALISE_REQ
+MEME MSG_ID_MEME_CSCE_CELL_SELECTED_IND
+MEME MSG_ID_CSCE_MEME_MEAS_MANIPULATION_REQ
+MEME MSG_ID_CSCE_MEME_LTE_HPS_QUALIFY_CELL_IND
+MEME MSG_ID_CSCE_MEME_RF_ON_REQ
+MEME MSG_ID_CSCE_MEME_RF_OFF_REQ
+MEME MSG_ID_CSCE_MEME_SET_MODE_REQ
+MEME MSG_ID_CSCE_MEME_EQ_PLMN_LIST_UPDATE_REQ
+MEME MSG_ID_CSCE_MEME_CLEAN_DB_CELL_REQ
+MEME MSG_ID_MEME_SIBE_SIB3_CHANGE_IND
+MEME MSG_ID_MEME_SIBE_SIB4_CHANGE_IND
+MEME MSG_ID_MEME_SIBE_SIB11_CHANGE_IND
+MEME MSG_ID_MEME_SIBE_SIB12_CHANGE_IND
+MEME MSG_ID_MEME_SIBE_SIB18_CHANGE_IND
+MEME MSG_ID_MEME_MEME_QUEUED_GAS_UAS_CONFIG_UCELL_MEAS_REQ
+MEME MSG_ID_MEME_MEME_QUEUED_GAS_UAS_CONFIG_UCELL_PRIO_MEAS_REQ
+MEME MSG_ID_MEME_MEME_QUEUED_EAS_UAS_CONFIG_UCELL_MEAS_REQ
+MEME MSG_ID_MEME_MEME_QUEUED_EAS_UAS_CONFIG_UCELL_PRIO_MEAS_REQ
+MEME MSG_ID_MEME_MEME_SAVED_MEAS_CTRL_IND
+MEME MSG_ID_MEME_CODE_END
+MEUT MSG_ID_DVT_DATA_MESSAGE
+MEUT MSG_ID_DVT_LARGE_DATA_MESSAGE
+MEUT MSG_ID_DVT_STATUS_MESSAGE
+MEUT MSG_ID_DVT_REQUEST_MESSAGE
+MEUT MSG_ID_DVT_MESSAGE_NUM
+MLL1 MSG_ID_LL1_GL1_SYNC_REQ
+MLL1 MSG_ID_GL1_LL1_SYNC_CNF
+MLL1 MSG_ID_GL1_LL1_RAT_STATUS_IND
+MLL1 MSG_ID_GL1_LL1_MODE_STATUS_IND
+MLL1 MSG_ID_LL1_GL1_MODE_STATUS_UPDATE_IND
+MLL1 MSG_ID_GL1_LL1_ACTIVE_MEASURE_STATUS_IND
+MLL1 MSG_ID_GL1_LL1_MEASURE_REQ
+MLL1 MSG_ID_GL1_LL1_STANDBY_MEASURE_DONE_IND
+MLL1 MSG_ID_LL1_GL1_GAP_SERVICE_REQ
+MLL1 MSG_ID_GL1_LL1_GAP_STOP_REQ
+MLL1 MSG_ID_LL1_GL1_GAP_STOP_CNF
+MLL1 MSG_ID_LL1_GL1_GAP_STOP_REQ
+MLL1 MSG_ID_GL1_LL1_GAP_STOP_CNF
+MLL1 MSG_ID_GL1_LL1_GAP_SUSPEND_REQ
+MLL1 MSG_ID_LL1_GL1_GAP_SUSPEND_CNF
+MLL1 MSG_ID_LL1_GL1_GAP_SUSPEND_REQ
+MLL1 MSG_ID_GL1_LL1_GAP_SUSPEND_CNF
+MLL1 MSG_ID_GL1_LL1_GAP_RESUME_IND
+MLL1 MSG_ID_LL1_GL1_GAP_RESUME_IND
+MLL1 MSG_ID_GL1_LL1_AUTO_GAP_REQ
+MLL1 MSG_ID_LL1_GL1_AUTO_GAP_CNF
+MLL1 MSG_ID_LL1_GL1_AUTO_GAP_IND
+MLL1 MSG_ID_GL1_LL1_AUTO_GAP_RES
+MLL1 MSG_ID_GL1_LL1_AUTO_GAP_STOP_REQ
+MLL1 MSG_ID_LL1_GL1_AUTO_GAP_STOP_IND
+MLL1 MSG_ID_GL1_LL1_AUTO_GAP_STOP_RES
+MLL1 MSG_ID_LL1_GL1_AUTO_GAP_STOP_CNF
+MLL1 MSG_ID_GL1_LL1_AUTO_GAP_END_IND
+MLL1 MSG_ID_LL1_GL1_AUTO_GAP_END_IND
+MLL1 MSG_ID_GL1_LL1_AUTO_GAP_AVAILABLE_IND
+MLL1 MSG_ID_LL1_GL1_AUTO_GAP_AVAILABLE_IND
+MLL1 MSG_ID_GL1_LL1_AUTO_GAP_UNAVAILABLE_IND
+MLL1 MSG_ID_LL1_GL1_AUTO_GAP_UNAVAILABLE_IND
+MLL1 MSG_ID_LL1_GL1_GAP_NOTIFY_IND
+MLL1 MSG_ID_GL1_LL1_GAP_PATTERN_IND
+MLL1 MSG_ID_LL1_UL1_SYNC_REQ
+MLL1 MSG_ID_UL1_LL1_SYNC_CNF
+MLL1 MSG_ID_UL1_LL1_RAT_STATUS_IND
+MLL1 MSG_ID_UL1_LL1_MODE_STATUS_IND
+MLL1 MSG_ID_LL1_UL1_MODE_STATUS_UPDATE_IND
+MLL1 MSG_ID_UL1_LL1_ACTIVE_MEASURE_STATUS_IND
+MLL1 MSG_ID_UL1_LL1_MEASURE_REQ
+MLL1 MSG_ID_UL1_LL1_STANDBY_MEASURE_DONE_IND
+MLL1 MSG_ID_LL1_UL1_GAP_SERVICE_REQ
+MLL1 MSG_ID_UL1_LL1_GAP_STOP_REQ
+MLL1 MSG_ID_LL1_UL1_GAP_STOP_CNF
+MLL1 MSG_ID_LL1_UL1_GAP_STOP_REQ
+MLL1 MSG_ID_UL1_LL1_GAP_STOP_CNF
+MLL1 MSG_ID_UL1_LL1_GAP_SUSPEND_REQ
+MLL1 MSG_ID_LL1_UL1_GAP_SUSPEND_CNF
+MLL1 MSG_ID_LL1_UL1_GAP_SUSPEND_REQ
+MLL1 MSG_ID_UL1_LL1_GAP_SUSPEND_CNF
+MLL1 MSG_ID_UL1_LL1_GAP_RESUME_IND
+MLL1 MSG_ID_LL1_UL1_GAP_RESUME_IND
+MLL1 MSG_ID_UL1_LL1_AUTO_GAP_REQ
+MLL1 MSG_ID_LL1_UL1_AUTO_GAP_CNF
+MLL1 MSG_ID_LL1_UL1_AUTO_GAP_IND
+MLL1 MSG_ID_UL1_LL1_AUTO_GAP_RES
+MLL1 MSG_ID_UL1_LL1_AUTO_GAP_STOP_REQ
+MLL1 MSG_ID_LL1_UL1_AUTO_GAP_STOP_IND
+MLL1 MSG_ID_UL1_LL1_AUTO_GAP_STOP_RES
+MLL1 MSG_ID_LL1_UL1_AUTO_GAP_STOP_CNF
+MLL1 MSG_ID_UL1_LL1_AUTO_GAP_END_IND
+MLL1 MSG_ID_LL1_UL1_AUTO_GAP_END_IND
+MLL1 MSG_ID_UL1_LL1_AUTO_GAP_AVAILABLE_IND
+MLL1 MSG_ID_LL1_UL1_AUTO_GAP_AVAILABLE_IND
+MLL1 MSG_ID_UL1_LL1_AUTO_GAP_UNAVAILABLE_IND
+MLL1 MSG_ID_LL1_UL1_AUTO_GAP_UNAVAILABLE_IND
+MLL1 MSG_ID_LL1_UL1_GAP_NOTIFY_IND
+MLL1 MSG_ID_UL1_LL1_GAP_PATTERN_IND
+MLL1 MSG_ID_LL1_TL1_SYNC_REQ
+MLL1 MSG_ID_TL1_LL1_SYNC_CNF
+MLL1 MSG_ID_TL1_LL1_RAT_STATUS_IND
+MLL1 MSG_ID_TL1_LL1_MODE_STATUS_IND
+MLL1 MSG_ID_LL1_TL1_MODE_STATUS_UPDATE_IND
+MLL1 MSG_ID_TL1_LL1_ACTIVE_MEASURE_STATUS_IND
+MLL1 MSG_ID_TL1_LL1_MEASURE_REQ
+MLL1 MSG_ID_TL1_LL1_STANDBY_MEASURE_DONE_IND
+MLL1 MSG_ID_LL1_TL1_GAP_SERVICE_REQ
+MLL1 MSG_ID_TL1_LL1_GAP_STOP_REQ
+MLL1 MSG_ID_LL1_TL1_GAP_STOP_CNF
+MLL1 MSG_ID_LL1_TL1_GAP_STOP_REQ
+MLL1 MSG_ID_TL1_LL1_GAP_STOP_CNF
+MLL1 MSG_ID_TL1_LL1_GAP_SUSPEND_REQ
+MLL1 MSG_ID_LL1_TL1_GAP_SUSPEND_CNF
+MLL1 MSG_ID_LL1_TL1_GAP_SUSPEND_REQ
+MLL1 MSG_ID_TL1_LL1_GAP_SUSPEND_CNF
+MLL1 MSG_ID_TL1_LL1_GAP_RESUME_IND
+MLL1 MSG_ID_LL1_TL1_GAP_RESUME_IND
+MLL1 MSG_ID_TL1_LL1_AUTO_GAP_REQ
+MLL1 MSG_ID_LL1_TL1_AUTO_GAP_CNF
+MLL1 MSG_ID_LL1_TL1_AUTO_GAP_IND
+MLL1 MSG_ID_TL1_LL1_AUTO_GAP_RES
+MLL1 MSG_ID_TL1_LL1_AUTO_GAP_STOP_REQ
+MLL1 MSG_ID_LL1_TL1_AUTO_GAP_STOP_IND
+MLL1 MSG_ID_TL1_LL1_AUTO_GAP_STOP_RES
+MLL1 MSG_ID_LL1_TL1_AUTO_GAP_STOP_CNF
+MLL1 MSG_ID_TL1_LL1_AUTO_GAP_END_IND
+MLL1 MSG_ID_LL1_TL1_AUTO_GAP_END_IND
+MLL1 MSG_ID_TL1_LL1_AUTO_GAP_AVAILABLE_IND
+MLL1 MSG_ID_LL1_TL1_AUTO_GAP_AVAILABLE_IND
+MLL1 MSG_ID_TL1_LL1_AUTO_GAP_UNAVAILABLE_IND
+MLL1 MSG_ID_LL1_TL1_AUTO_GAP_UNAVAILABLE_IND
+MLL1 MSG_ID_LL1_TL1_GAP_NOTIFY_IND
+MLL1 MSG_ID_TL1_LL1_GAP_PATTERN_IND
+MLL1 MSG_ID_LL1_EL1_SYNC_REQ
+MLL1 MSG_ID_EL1_LL1_SYNC_CNF
+MLL1 MSG_ID_EL1_LL1_RAT_STATUS_IND
+MLL1 MSG_ID_EL1_LL1_MODE_STATUS_IND
+MLL1 MSG_ID_LL1_EL1_MODE_STATUS_UPDATE_IND
+MLL1 MSG_ID_EL1_LL1_ACTIVE_MEASURE_STATUS_IND
+MLL1 MSG_ID_EL1_LL1_MEASURE_REQ
+MLL1 MSG_ID_EL1_LL1_STANDBY_MEASURE_DONE_IND
+MLL1 MSG_ID_LL1_EL1_GAP_SERVICE_REQ
+MLL1 MSG_ID_EL1_LL1_GAP_STOP_REQ
+MLL1 MSG_ID_LL1_EL1_GAP_STOP_CNF
+MLL1 MSG_ID_LL1_EL1_GAP_STOP_REQ
+MLL1 MSG_ID_EL1_LL1_GAP_STOP_CNF
+MLL1 MSG_ID_EL1_LL1_GAP_SUSPEND_REQ
+MLL1 MSG_ID_LL1_EL1_GAP_SUSPEND_CNF
+MLL1 MSG_ID_LL1_EL1_GAP_SUSPEND_REQ
+MLL1 MSG_ID_EL1_LL1_GAP_SUSPEND_CNF
+MLL1 MSG_ID_EL1_LL1_GAP_RESUME_IND
+MLL1 MSG_ID_LL1_EL1_GAP_RESUME_IND
+MLL1 MSG_ID_EL1_LL1_AUTO_GAP_REQ
+MLL1 MSG_ID_LL1_EL1_AUTO_GAP_CNF
+MLL1 MSG_ID_LL1_EL1_AUTO_GAP_IND
+MLL1 MSG_ID_EL1_LL1_AUTO_GAP_RES
+MLL1 MSG_ID_EL1_LL1_AUTO_GAP_STOP_REQ
+MLL1 MSG_ID_LL1_EL1_AUTO_GAP_STOP_IND
+MLL1 MSG_ID_EL1_LL1_AUTO_GAP_STOP_RES
+MLL1 MSG_ID_LL1_EL1_AUTO_GAP_STOP_CNF
+MLL1 MSG_ID_EL1_LL1_AUTO_GAP_END_IND
+MLL1 MSG_ID_LL1_EL1_AUTO_GAP_END_IND
+MLL1 MSG_ID_EL1_LL1_AUTO_GAP_AVAILABLE_IND
+MLL1 MSG_ID_LL1_EL1_AUTO_GAP_AVAILABLE_IND
+MLL1 MSG_ID_EL1_LL1_AUTO_GAP_UNAVAILABLE_IND
+MLL1 MSG_ID_LL1_EL1_AUTO_GAP_UNAVAILABLE_IND
+MLL1 MSG_ID_LL1_EL1_GAP_NOTIFY_IND
+MLL1 MSG_ID_EL1_LL1_GAP_PATTERN_IND
+MM MSG_ID_MMCC_PROMPT_REJ
+MM MSG_ID_MMCC_PROMPT_RSP
+MM MSG_ID_MMCC_REL_REQ
+MM MSG_ID_MMCC_EST_REQ
+MM MSG_ID_MMCC_REEST_REQ
+MM MSG_ID_MMCC_DATA_REQ
+MM MSG_ID_MMCC_START_CALL_REQ
+MM MSG_ID_MMCC_ABORT_CALL_REQ
+MM MSG_ID_MMCC_SRVCC_EST_REQ
+MM MSG_ID_MMCC_SRVCC_ABORT_REQ
+MM MSG_ID_MMSS_EST_REQ
+MM MSG_ID_MMSS_DATA_REQ
+MM MSG_ID_MMSS_REL_REQ
+MM MSG_ID_MMSMS_REL_REQ
+MM MSG_ID_MMSMS_DATA_REQ
+MM MSG_ID_MMSMS_EST_REQ
+MM MSG_ID_GMMREG_ATTACH_REQ
+MM MSG_ID_GMMREG_DETACH_REQ
+MM MSG_ID_GMMREG_INIT_REQ
+MM MSG_ID_GMMREG_RFOFF_REQ
+MM MSG_ID_GMMREG_SET_ROAMING_MODE_REQ
+MM MSG_ID_GMMREG_SET_RAT_MODE_REQ
+MM MSG_ID_GMMREG_SET_GPRS_TRANSFER_PREFERENCE_REQ
+MM MSG_ID_GMMREG_SET_PREFERRED_BAND_REQ
+MM MSG_ID_GMMREG_END_PS_DATA_SESSION_REQ
+MM MSG_ID_GMMREG_ACTIVE_SIM_INFO_REQ
+MM MSG_ID_GMMREG_CSFB_PAGE_RSP
+MM MSG_ID_MM_EMM_INIT_NAS_CTXT_IND
+MM MSG_ID_MM_EMM_EMM_UPDATE_REGISTRATION_IND
+MM MSG_ID_MM_EMM_EMM_UPDATE_DEREGISTRATION_IND
+MM MSG_ID_MM_EMM_CSFB_CNF
+MM MSG_ID_MM_EMM_CSFB_PAGE_IND
+MM MSG_ID_MM_EMM_ISR_UPDATE_IND
+MM MSG_ID_NWSEL_MM_PLMN_SEARCH_REQ
+MM MSG_ID_NWSEL_MM_PLMN_LIST_REQ
+MM MSG_ID_NWSEL_MM_PLMN_LIST_STOP_REQ
+MM MSG_ID_NWSEL_MM_CSG_LIST_REQ
+MM MSG_ID_NWSEL_MM_CSG_LIST_STOP_REQ
+MM MSG_ID_NWSEL_MM_RESUME_REQ
+MM MSG_ID_NWSEL_MM_CELL_GLOBAL_IDENTITY_INFO_UPDATE_REQ
+MM MSG_ID_NWSEL_MM_SYS_INFO_UPDATE_REQ
+MM MSG_ID_NWSEL_MM_REGN_STATUS_UPDATE_REQ
+MM MSG_ID_NWSEL_MM_HPLMN_INFO_UPDATE_REQ
+MM MSG_ID_NWSEL_MM_DEACTIVATE_REQ
+MM MSG_ID_NWSEL_MM_NAS_CTXT_TRANSFER_REQ
+MM MSG_ID_NWSEL_MM_SEARCH_STATUS_UPDATE_REQ
+MM MSG_ID_NWSEL_MM_EUTRAN_CAP_UPDATE_REQ
+MM MSG_ID_NWSEL_MM_VOICE_PREFER_UE_USAGE_UPDATE_REQ
+MM MSG_ID_NWSEL_MM_ATTACH_RESUME_REQ
+MM MSG_ID_GMMSMS_EST_REQ
+MM MSG_ID_GMMSMS_UNITDATA_REQ
+MM MSG_ID_GMMSM_UNITDATA_REQ
+MM MSG_ID_GMMSM_NSAPI_STATUS_REQ
+MM MSG_ID_GMMSM_ATTACH_REQ
+MM MSG_ID_GMMSM_EST_REQ
+MM MSG_ID_GMMSM_RAT_CHANGE_RSP
+MM MSG_ID_GMMSM_RAT_CHANGE_REQ
+MM MSG_ID_GMMSM_ISR_DEACTIVATE_REQ
+MM MSG_ID_MM_RATDM_SEQUENCE_CNF
+MM MSG_ID_MM_RATDM_REESTABLISH_RAB_IND
+MM MSG_ID_MM_RATDM_SEND_USER_DATA_IND
+MM MSG_ID_MM_RATDM_RAB_RELEASE_IND
+MM MSG_ID_MM_RATCM_SET_RAT_MODE_CNF
+MM MSG_ID_MM_RATCM_INIT_CNF
+MM MSG_ID_MM_RATCM_RFOFF_CNF
+MM MSG_ID_MM_RATCM_PLMN_SEARCH_CNF
+MM MSG_ID_MM_RATCM_SYS_INFO_IND
+MM MSG_ID_MM_RATCM_SET_IMEI_REQ
+MM MSG_ID_MM_RATCM_CELL_GLOBAL_IDENTITY_INFO_IND
+MM MSG_ID_MM_RATCM_PLMN_LOSS_IND
+MM MSG_ID_MM_RATCM_OUT_OF_SERVICE_IND
+MM MSG_ID_MM_RATCM_PLMN_LIST_CNF
+MM MSG_ID_MM_RATCM_PLMN_LIST_STOP_CNF
+MM MSG_ID_MM_RATCM_CSG_LIST_CNF
+MM MSG_ID_MM_RATCM_CSG_LIST_STOP_CNF
+MM MSG_ID_MM_RATCM_CELL_CHANGE_START_IND
+MM MSG_ID_MM_RATCM_CELL_CHANGE_FINISH_IND
+MM MSG_ID_MM_RATCM_PAGE_IND
+MM MSG_ID_MM_RATCM_SYNC_IND
+MM MSG_ID_MM_RATCM_SECURITY_MODE_COMPLETE_IND
+MM MSG_ID_MM_RATCM_SECURITY_MODE_CHANGE_IND
+MM MSG_ID_MM_RATCM_CONN_EST_CNF
+MM MSG_ID_MM_RATCM_CONN_EST_IND
+MM MSG_ID_MM_RATCM_CONN_REL_CNF
+MM MSG_ID_MM_RATCM_CONN_REL_IND
+MM MSG_ID_MM_RATCM_CONN_LOSS_IND
+MM MSG_ID_MM_RATCM_CONN_ABORT_IND
+MM MSG_ID_MM_RATCM_READY_TIMER_UPDATE_IND
+MM MSG_ID_MM_RATCM_CS_DATA_IND
+MM MSG_ID_MM_RATCM_PS_DATA_CNF
+MM MSG_ID_MM_RATCM_PS_DATA_IND
+MM MSG_ID_MM_RATCM_RESET_KEYS_IND
+MM MSG_ID_MM_RATCM_T3122_TIMEOUT_IND
+MM MSG_ID_MM_RATCM_CCO_ACTIVATION_TIME_TIMEOUT_IND
+MM MSG_ID_MM_RATCM_END_PS_DATA_SESSION_CNF
+MM MSG_ID_MM_RATCM_SERVICE_ACCEPT_NOTIFY_REQ
+MM MSG_ID_MM_RATCM_LCS_PROC_START_IND
+MM MSG_ID_MM_RATCM_LCS_PROC_END_IND
+MM MSG_ID_MM_RATCM_LLC_PSHO_IND
+MM MSG_ID_MM_RATCM_PS_HO_SUCCESS_IND
+MM MSG_ID_MM_RATCM_SIGNAL_APPEAR_IND
+MM MSG_ID_MM_RATCM_LOCAL_RELEASE_IND
+MM MSG_ID_MM_RATCM_DEACTIVATE_CNF
+MM MSG_ID_MM_RATCM_EUTRAN_CAP_UPDATE_CNF
+MM MSG_ID_MM_RATCM_RAT_CHANGE_CNF
+MM MSG_ID_MM_RATCM_RAT_CHANGE_IND
+MM MSG_ID_MM_RATCM_IDLE_OUT_OF_SERVICE_IND
+MM MSG_ID_MM_RATCM_START_TEST_MODE_IND
+MM MSG_ID_MM_RATCM_STOP_TEST_MODE_IND
+MM MSG_ID_MM_CODE_END
+MPAL MSG_ID_RR_MPAL_SEARCH_RF_REQ
+MPAL MSG_ID_RR_MPAL_REQ_CODE_BEGIN
+MPAL MSG_ID_RR_MPAL_SEARCH_RF_STOP_REQ
+MPAL MSG_ID_RR_MPAL_BSIC_SYNC_REQ
+MPAL MSG_ID_RR_MPAL_SPECIFIC_SYNC_REQ
+MPAL MSG_ID_RR_MPAL_SERV_BCCH_MONITOR_REQ
+MPAL MSG_ID_RR_MPAL_CCCH_MONITOR_REQ
+MPAL MSG_ID_RR_MPAL_PAGE_MODE_CHANGE_REQ
+MPAL MSG_ID_RR_MPAL_RACH_REQ
+MPAL MSG_ID_RR_MPAL_STOP_RACH_REQ
+MPAL MSG_ID_RR_MPAL_DEDICATED_CHANNEL_CONNECT_REQ
+MPAL MSG_ID_RR_MPAL_DEDICATED_CHANNEL_DISCONNECT_REQ
+MPAL MSG_ID_RR_MPAL_HANDOVER_REQ
+MPAL MSG_ID_RR_MPAL_HANDOVER_STOP_REQ
+MPAL MSG_ID_RR_MPAL_DEDICATED_CHANNEL_RECONNECT_REQ
+MPAL MSG_ID_RR_MPAL_FREQUENCY_REDEFINITION_REQ
+MPAL MSG_ID_RR_MPAL_CHANNEL_MODE_MODIFY_REQ
+MPAL MSG_ID_RR_MPAL_CIPHERING_MODE_COMMAND_REQ
+MPAL MSG_ID_RR_MPAL_CLOSE_TCH_LOOP_REQ
+MPAL MSG_ID_RR_MPAL_OPEN_TCH_LOOP_REQ
+MPAL MSG_ID_RR_MPAL_DAI_TEST_REQ
+MPAL MSG_ID_RR_MPAL_POWER_CLASS_REQ
+MPAL MSG_ID_RR_MPAL_CELL_OPTION_UPDATE_REQ
+MPAL MSG_ID_RR_MPAL_EXTENDED_MEAS_REQ
+MPAL MSG_ID_RR_MPAL_NEIGHBOR_MEAS_REQ
+MPAL MSG_ID_RR_MPAL_NEIGHBOR_BSIC_START_REQ
+MPAL MSG_ID_RR_MPAL_NEIGHBOR_BSIC_STOP_REQ
+MPAL MSG_ID_RR_MPAL_NEIGHBOR_SYS_INFO_READ_REQ
+MPAL MSG_ID_RR_MPAL_NEIGHBOR_SYS_INFO_STOP_REQ
+MPAL MSG_ID_RR_MPAL_CELL_BSIC_START_REQ
+MPAL MSG_ID_RR_MPAL_CELL_BSIC_STOP_REQ
+MPAL MSG_ID_RR_MPAL_CELL_SYS_INFO_READ_REQ
+MPAL MSG_ID_RR_MPAL_CELL_SYS_INFO_STOP_REQ
+MPAL MSG_ID_RR_MPAL_CBCH_CONFIG_REQ
+MPAL MSG_ID_RR_MPAL_CBCH_START_REQ
+MPAL MSG_ID_RR_MPAL_CBCH_STOP_REQ
+MPAL MSG_ID_RR_MPAL_CBCH_SKIP_REQ
+MPAL MSG_ID_RR_MPAL_SIM_READY_NOTIFY_REQ
+MPAL MSG_ID_RR_MPAL_SET_RAT_SERVICE_REQ
+MPAL MSG_ID_RR_MPAL_CELL_SELECTION_INIT_REQ
+MPAL MSG_ID_T3124_EXPIRY
+MPAL MSG_ID_RR_MPAL_SMART_PAGE_START_REQ
+MPAL MSG_ID_RR_MPAL_MONITOR_PAGE_IN_PTM_START_REQ
+MPAL MSG_ID_RR_MPAL_MONITOR_PAGE_IN_PTM_STOP_REQ
+MPAL MSG_ID_RR_MPAL_NC_MEASUREMENT_REQ
+MPAL MSG_ID_RR_MPAL_STOP_NC_MEASUREMENT_REQ
+MPAL MSG_ID_RR_MPAL_PDTCH_CONNECT_REQ
+MPAL MSG_ID_RR_MPAL_RRBP_REQ
+MPAL MSG_ID_RR_MPAL_CTRL_REQ
+MPAL MSG_ID_RR_MPAL_DATA_REQ
+MPAL MSG_ID_RR_MPAL_PKT_TIMING_ADV_PWR_CTRL_REQ
+MPAL MSG_ID_RR_MPAL_PDCH_RELEASE_REQ
+MPAL MSG_ID_RR_MPAL_PDTCH_DISCONN_REQ
+MPAL MSG_ID_RR_MPAL_PDCH_ASSIGNMENT_REQ
+MPAL MSG_ID_RR_MPAL_UPDATE_IR_RESET_REQ
+MPAL MSG_ID_RR_MPAL_EGPRS_LOOP_REQ
+MPAL MSG_ID_RR_MPAL_REQ_CODE_END
+MPAL MSG_ID_RR_MPAL_STANDBY_GSM_MEAS_REQ
+MPAL MSG_ID_RR_MPAL_INTER_RAT_REQ_CODE_BEGIN
+MPAL MSG_ID_RR_MPAL_STANDBY_GSM_PRIO_MEAS_REQ
+MPAL MSG_ID_RR_MPAL_STANDBY_GSM_BSIC_READ_REQ
+MPAL MSG_ID_RR_MPAL_STANDBY_GSM_BSIC_STOP_REQ
+MPAL MSG_ID_RR_MPAL_INTER_RAT_HANDOVER_REQ
+MPAL MSG_ID_RR_MPAL_STANDBY_GSM_REPORT_CGI_SEARCH_RF_REQ
+MPAL MSG_ID_RR_MPAL_STANDBY_GSM_REPORT_CGI_SEARCH_RF_STOP_REQ
+MPAL MSG_ID_RR_MPAL_STANDBY_GSM_REPORT_CGI_BSIC_START_REQ
+MPAL MSG_ID_RR_MPAL_STANDBY_GSM_REPORT_CGI_BSIC_STOP_REQ
+MPAL MSG_ID_RR_MPAL_STANDBY_GSM_REPORT_CGI_SYS_INFO_READ_REQ
+MPAL MSG_ID_RR_MPAL_STANDBY_GSM_REPORT_CGI_SYS_INFO_STOP_REQ
+MPAL MSG_ID_RR_MPAL_STANDBY_CELL_BSIC_RES_REQ
+MPAL MSG_ID_RR_MPAL_INTER_RAT_REQ_CODE_END
+MPAL MSG_ID_MPAL_CODE_END
+MPAL MSG_ID_GAS_RRLP_DATA_IND
+MPAL MSG_ID_RRLP_GAS_DATA_CNF
+MPAL MSG_ID_GAS_RRLP_ABORT_IND
+MPAL MSG_ID_GAS_RRLP_FIRST_SEGMENT_IND
+MPAL MSG_ID_GAS_RRLP_SEGMENT_DISCARD_IND
+MRS MSG_ID_MRS_AS_CSG_WHITE_LIST_UPDATE_IND
+MRS MSG_ID_MRS_LOWER_LAYER_AVAILABILITY_UPDATE_IND
+MRS MSG_ID_MRS_GAS_LOWER_LAYER_AVAILABILITY_UPDATE_REQ
+MRS MSG_ID_MRS_UAS_LOWER_LAYER_AVAILABILITY_UPDATE_REQ
+MRS MSG_ID_MRS_EAS_LOWER_LAYER_AVAILABILITY_UPDATE_REQ
+MRS MSG_ID_MRS_GAS_BAND_SETTING_UPDATE_IND
+MRS MSG_ID_MRS_UAS_BAND_SETTING_UPDATE_IND
+MRS MSG_ID_MRS_EAS_BAND_SETTING_UPDATE_IND
+MRS MSG_ID_RAC_MRS_INIT_REQ
+MRS MSG_ID_RAC_MRS_INIT_CNF
+MRS MSG_ID_MRS_UAS_UMTS_HO_INFO_RSP
+MRS MSG_ID_MRS_CODE_END
+NDIS MSG_ID_NDIS_RATDM_DATA_ACTIVATE_IND
+NDIS MSG_ID_NDIS_RATDM_DATA_ACTIVATE_RSP
+NDIS MSG_ID_NDIS_RATDM_DATA_DEACTIVATE_IND
+NDIS MSG_ID_NDIS_RATDM_DATA_DEACTIVATE_RSP
+NVRAM MSG_ID_NVRAM_STARTUP_REQ
+NVRAM MSG_ID_NVRAM_STARTUP_CNF
+NVRAM MSG_ID_NVRAM_RESET_REQ
+NVRAM MSG_ID_NVRAM_RESET_CNF
+NVRAM MSG_ID_NVRAM_READ_REQ
+NVRAM MSG_ID_NVRAM_READ_CNF
+NVRAM MSG_ID_NVRAM_WRITE_REQ
+NVRAM MSG_ID_NVRAM_WRITE_CNF
+NVRAM MSG_ID_NVRAM_WRITE_IMEI_REQ
+NVRAM MSG_ID_NVRAM_WRITE_IMEI_CNF
+NVRAM MSG_ID_NVRAM_READ_SM_REQ
+NVRAM MSG_ID_NVRAM_READ_SM_CNF
+NVRAM MSG_ID_NVRAM_WRITE_SM_REQ
+NVRAM MSG_ID_NVRAM_WRITE_SM_CNF
+NVRAM MSG_ID_NVRAM_SET_LOCK_REQ
+NVRAM MSG_ID_NVRAM_SET_LOCK_CNF
+NVRAM MSG_ID_NVRAM_CREATE_IMAGE_REQ
+NVRAM MSG_ID_NVRAM_CREATE_IMAGE_CNF
+NVRAM MSG_ID_NVRAM_RECOVER_IMAGE_REQ
+NVRAM MSG_ID_NVRAM_RECOVER_IMAGE_CNF
+NVRAM MSG_ID_NVRAM_VERIFY_IMAGE_REQ
+NVRAM MSG_ID_NVRAM_VERIFY_IMAGE_CNF
+NVRAM MSG_ID_NVRAM_SUSPEND_REQ
+NVRAM MSG_ID_NVRAM_SUSPEND_CNF
+NVRAM MSG_ID_NVRAM_SDS_REQ
+NVRAM MSG_ID_NVRAM_SDS_CNF
+NVRAM MSG_ID_NVRAM_BIN_REGION_REQ
+NVRAM MSG_ID_NVRAM_BIN_REGION_CNF
+NVRAM MSG_ID_NVRAM_RESERVED_1
+NVRAM MSG_ID_NVRAM_RESERVED_2
+NVRAM MSG_ID_NVRAM_RESERVED_3
+NVRAM MSG_ID_NVRAM_RESERVED_4
+NVRAM MSG_ID_NVRAM_RESERVED_5
+NVRAM MSG_ID_NVRAM_RESERVED_6
+NVRAM MSG_ID_NVRAM_MAX
+NVRAM MSG_ID_NVRAM_CODE_END
+NWSEL MSG_ID_RAC_NWSEL_ATTACH_REQ
+NWSEL MSG_ID_RAC_NWSEL_DETACH_REQ
+NWSEL MSG_ID_RAC_NWSEL_PLMN_SEARCH_REQ
+NWSEL MSG_ID_RAC_NWSEL_INIT_REQ
+NWSEL MSG_ID_RAC_NWSEL_RFOFF_REQ
+NWSEL MSG_ID_RAC_NWSEL_SEL_MODE_REQ
+NWSEL MSG_ID_RAC_NWSEL_SET_ROAMING_MODE_REQ
+NWSEL MSG_ID_RAC_NWSEL_SET_PREFER_RAT_REQ
+NWSEL MSG_ID_RAC_NWSEL_PLMN_LIST_REQ
+NWSEL MSG_ID_RAC_NWSEL_PLMN_LIST_STOP_REQ
+NWSEL MSG_ID_RAC_NWSEL_CSG_LIST_REQ
+NWSEL MSG_ID_RAC_NWSEL_CSG_LIST_STOP_REQ
+NWSEL MSG_ID_RAC_NWSEL_SET_RAT_MODE_REQ
+NWSEL MSG_ID_RAC_NWSEL_UPDATE_UEMODE_REQ
+NWSEL MSG_ID_RAC_NWSEL_UEMODE_PARAM_UPDATE_REQ
+NWSEL MSG_ID_RAC_NWSEL_RAT_CHANGE_START_REQ
+NWSEL MSG_ID_RAC_NWSEL_RAT_CHANGE_FINISH_REQ
+NWSEL MSG_ID_RAC_NWSEL_SUSP_RESU_UPDATE_REQ
+NWSEL MSG_ID_RAC_NWSEL_ABORT_EMERGENCY_PLMN_SEARCH_REQ
+NWSEL MSG_ID_RAC_NWSEL_SET_RECOVERY_SEARCH_TIMER_REQ
+NWSEL MSG_ID_RAC_NWSEL_GET_RECOVERY_SEARCH_TIMER_REQ
+NWSEL MSG_ID_RAC_NWSEL_UE_OPLMN_UPDATE_REQ
+NWSEL MSG_ID_NWSEL_MM_PLMN_SEARCH_CNF
+NWSEL MSG_ID_NWSEL_MM_PLMN_SEARCH_IND
+NWSEL MSG_ID_NWSEL_MM_PLMN_LOSS_IND
+NWSEL MSG_ID_NWSEL_MM_OUT_OF_SERVICE_IND
+NWSEL MSG_ID_NWSEL_MM_PLMN_LIST_CNF
+NWSEL MSG_ID_NWSEL_MM_PLMN_LIST_STOP_CNF
+NWSEL MSG_ID_NWSEL_MM_CSG_LIST_CNF
+NWSEL MSG_ID_NWSEL_MM_CSG_LIST_STOP_CNF
+NWSEL MSG_ID_NWSEL_MM_RESUME_IND
+NWSEL MSG_ID_NWSEL_MM_SUSPEND_IND
+NWSEL MSG_ID_NWSEL_MM_VIRTUAL_MODE_IND
+NWSEL MSG_ID_NWSEL_MM_REGN_RESULT_IND
+NWSEL MSG_ID_NWSEL_MM_NO_ACTION_IND
+NWSEL MSG_ID_NWSEL_MM_EVENT_IND
+NWSEL MSG_ID_NWSEL_MM_DEACTIVATE_CNF
+NWSEL MSG_ID_NWSEL_MM_NAS_CTXT_TRANSFER_CNF
+NWSEL MSG_ID_NWSEL_MM_EUTRAN_CAP_UPDATE_CNF
+NWSEL MSG_ID_NWSEL_MM_CELL_GLOBAL_IDENTITY_INFO_IND
+NWSEL MSG_ID_NWSEL_MM_SYS_INFO_IND
+NWSEL MSG_ID_NWSEL_EVAL_PLMN_SEARCH_CNF
+NWSEL MSG_ID_NWSEL_EVAL_PLMN_SEARCH_IND
+NWSEL MSG_ID_NWSEL_EVAL_PLMN_LOSS_IND
+NWSEL MSG_ID_NWSEL_EVAL_OUT_OF_SERVICE_IND
+NWSEL MSG_ID_NWSEL_EVAL_PLMN_LIST_CNF
+NWSEL MSG_ID_NWSEL_EVAL_PLMN_LIST_STOP_CNF
+NWSEL MSG_ID_NWSEL_EVAL_CSG_LIST_CNF
+NWSEL MSG_ID_NWSEL_EVAL_CSG_LIST_STOP_CNF
+NWSEL MSG_ID_NWSEL_EVAL_REGN_RESULT_IND
+NWSEL MSG_ID_NWSEL_EVAL_NO_ACTION_IND
+NWSEL MSG_ID_NWSEL_EVAL_DEACTIVATE_CNF
+NWSEL MSG_ID_NWSEL_EVAL_NAS_CTXT_TRANSFER_CNF
+NWSEL MSG_ID_NWSEL_EVAL_SYS_INFO_IND
+NWSEL MSG_ID_NWSEL_EVAL_SIGNAL_APPEAR_IND
+NWSEL MSG_ID_NWSEL_EVAL_EMERGENCY_STATUS_UPDATE_IND
+NWSEL MSG_ID_NWSEL_RATCM_CELL_CHANGE_START_IND
+NWSEL MSG_ID_NWSEL_RATCM_CELL_CHANGE_FINISH_IND
+NWSEL MSG_ID_NWSEL_RATCM_SIGNAL_APPEAR_IND
+NWSEL MSG_ID_NWSEL_CODE_END
+P2P MSG_ID_P2P_VL1_TICK_IND
+P2P MSG_ID_P2P_SEND_UL_DATA_IND
+P2P MSG_ID_P2P_CODE_END
+PDCP MSG_ID_CPDCP_CONFIG_REQ
+PDCP MSG_ID_CPDCP_RELOC_REQ
+PDCP MSG_ID_CPDCP_RELEASE_REQ
+PDCP MSG_ID_PDCP_URLC_RESET_IND
+PDCP MSG_ID_PDCP_URLC_REESTABLISH_IND
+PDCP MSG_ID_PDCP_FLC_RESUME_UL_TRANSFER
+PDCP MSG_ID_PDCP_FLC_RESUME_DL_TRANSFER
+PDCP MSG_ID_RATDM_PDCP_RESET_STATISTICS_REQ
+PDCP MSG_ID_PDCP_CODE_END
+PHB MSG_ID_L4CPHB_STARTUP_REQ
+PHB MSG_ID_L4CPHB_INIT_LN_REQ
+PHB MSG_ID_L4CPHB_READ_REQ
+PHB MSG_ID_L4CPHB_ADD_REQ
+PHB MSG_ID_L4CPHB_UPDATE_REQ
+PHB MSG_ID_L4CPHB_DELETE_REQ
+PHB MSG_ID_L4CPHB_SEARCH_REQ
+PHB MSG_ID_L4CPHB_APPROVE_REQ
+PHB MSG_ID_L4CPHB_READ_LN_REQ
+PHB MSG_ID_L4CPHB_WRITE_LN_REQ
+PHB MSG_ID_L4CPHB_DELETE_LN_REQ
+PHB MSG_ID_L4CPHB_SYNC_REQ
+PHB MSG_ID_L4CPHB_STARTUP_READ_NEXT_REQ
+PHB MSG_ID_L4CPHB_WRITE_REQ
+PHB MSG_ID_L4CPHB_UPDATE_NW_ECC_REQ
+PHB MSG_ID_L4CPHB_INIT_ME_LN_REQ
+PHB MSG_ID_L4CPHB_INIT_ME_PHB_REQ
+PHB MSG_ID_L4CPHB_WRITE_USIM_REQ
+PHB MSG_ID_L4CPHB_READ_USIM_REQ
+PHB MSG_ID_L4CPHB_DELETE_USIM_REQ
+PHB MSG_ID_L4CPHB_CHECK_WRITE_USIM_ENTRY_REQ
+PHB MSG_ID_L4CPHB_FDN_GET_NAME_REQ
+PHB MSG_ID_L4CPHB_READ_SIM_LN_REQ
+PHB MSG_ID_L4CPHB_WRITE_SIM_LN_REQ
+PHB MSG_ID_L4CPHB_DELETE_SIM_LN_REQ
+PHB MSG_ID_PHB_CODE_END
+PPP MSG_ID_L4CPPP_ACTIVATE_REQ
+PPP MSG_ID_L4CPPP_DEACTIVATE_REQ
+PPP MSG_ID_L4CPPP_RESUME_REQ
+PPP MSG_ID_L4CPPP_PPPTYPEPDP_UART_TRANSFER_IND
+PPP MSG_ID_L4CPPP_IPV4V6_FALLBACK_RSP
+PPP MSG_ID_TAF_EXT_PDP_ACTIVATE_ACK_RSP
+PPP MSG_ID_TAF_EXT_PDP_ACTIVATE_REJ_RSP
+PPP MSG_ID_TAF_EXT_PDP_DEACTIVATE_ACK_RSP
+PPP MSG_ID_TAF_EXT_PDP_DEACTIVATE_REQ
+PPP MSG_ID_TAF_DATA_REQ
+PPP MSG_ID_TAF_EXT_UPDATE_PDP_ADDR_REQ
+PPP MSG_ID_TAF_EXT_PDP_SET_IP_AND_DNS_INFO_CNF
+PPP MSG_ID_TAF_EXT_ENTER_DATA_MODE_CNF
+PPP MSG_ID_PPP_FLC_DATA_RESUME_IND
+PPP MSG_ID_PPP_STATUS_REPORT_IND
+PPP MSG_ID_PPP_PROCESS_PKT_IND
+PPP MSG_ID_TAF_PS_SUSPEND_IND
+PPP MSG_ID_TAF_PS_RESUME_IND
+PPP MSG_ID_L4CPPP_CSD_ACTIVATE_REQ
+PPP MSG_ID_L4CPPP_CSD_DEACTIVATE_REQ
+PPP MSG_ID_TCPIP_PPP_DATA_REQ
+PPP MSG_ID_SOC_PPP_DL_SRPDU_RESUME
+PPP MSG_ID_FLC_PPP_UL_APPDU_RESUME
+PPP MSG_ID_PPP_TDT_DATA_IND
+PPP MSG_ID_PPP_L2R_DATA_IND
+PPP MSG_ID_PPP_EXT_MODEM_DATA_REQ
+PPP MSG_ID_PPP_EXT_MODEM_DATA_IND
+PPP MSG_ID_EXT_MODEM_PPP_ACTIVATE_REQ
+PPP MSG_ID_EXT_MODEM_PPP_ACTIVATE_CNF
+PPP MSG_ID_EXT_MODEM_PPP_DEACTIVATE_REQ
+PPP MSG_ID_EXT_MODEM_PPP_DEACTIVATE_CNF
+PPP MSG_ID_EXT_MODEM_PPP_DEACTIVATE_IND
+PPP MSG_ID_PPP_CODE_END
+PROXY MSG_ID_PROXY_ATCI_CMD_IND
+PROXY MSG_ID_PROXY_ATCI_CMD_RSP
+PROXY MSG_ID_PROXY_ATCI_CMD_REQ
+PROXY MSG_ID_PROXY_ATCI_CMD_CNF
+PROXY MSG_ID_PROXY_ATCI_URC_IND
+PROXY MSG_ID_PROXY_ATCI_URC_REQ
+PS MSG_ID_L4CPS_NBR_CELL_INFO_START_REQ
+PS MSG_ID_L4CPS_NBR_CELL_INFO_STOP_REQ
+PS MSG_ID_L4CAS_ETWS_SETTING_REQ
+PS MSG_ID_L4CAS_ETWS_INFORMATION_IND
+PS MSG_ID_L4C_EVAL_ETWS_INFORMATION_IND
+PS MSG_ID_L4C_EVAL_ADJUST_MEAS_REQ
+PS MSG_ID_L4C_EVAL_ADJUST_MEAS_CNF
+PS MSG_ID_L4CAS_SET_PLMN_LIST_PREFERENCE_REQ
+PS MSG_ID_L4CAS_SET_HSPA_PREFERENCE_REQ
+PS MSG_ID_L4CAS_SET_PREFER_RAT_REQ
+PS MSG_ID_L4CAS_CSG_AUTO_SEARCH_REQ
+PS MSG_ID_L4C_LCSP_AGPS_CP_START_IND
+PS MSG_ID_L4C_LCSP_AGPS_CP_END_IND
+PS MSG_ID_L4C_LCSP_AGPS_CP_ABORT_REQ
+PS MSG_ID_L4C_RATCM_AGPS_RESET_POSITIONING_IND
+PS MSG_ID_L4CPS_MEAS_INFO_REQ
+PS MSG_ID_L4CPS_MEAS_INFO_CNF
+PS MSG_ID_L4CPS_RF_INFO_IND
+PS MSG_ID_L4C_RRCE_RRC_STATE_IND
+PS MSG_ID_L4C_RRCE_PCH_TXRX_IND
+PS MSG_ID_PS_CODE_END
+PS_PUBLIC_SUPL MSG_ID_SUPL_MMI_PUSH_REQ
+PS_PUBLIC_SUPL MSG_ID_SUPL_MMI_STATUS_IND
+PS_PUBLIC_SUPL MSG_ID_SUPL_MMI_STATUS_RSP
+PS_PUBLIC_SUPL MSG_ID_SUPL_MMI_NOTIFY_IND
+PS_PUBLIC_SUPL MSG_ID_SUPL_MMI_NOTIFY_RSP
+PS_PUBLIC_SUPL MSG_ID_SUPL_MMI_START_REQ
+PS_PUBLIC_SUPL MSG_ID_SUPL_MMI_ABORT_REQ
+PS_PUBLIC_SUPL MSG_ID_SUPL_MMI_ABORT_CNF
+PS_PUBLIC_VT MSG_ID_MMI_VT_START_COUNTER_IND
+PS_PUBLIC_VT MSG_ID_MMI_VT_UII
+PS_PUBLIC_VT MSG_ID_MEDIA_VCALL_CHANNEL_STATUS_IND
+PS_PUBLIC_VT MSG_ID_MEDIA_VCALL_VIDEO_REPLENISH_DATA_READY_IND
+PS_PUBLIC_VT MSG_ID_MEDIA_VT_ADJUST_VIDEO_QUALITY_IND
+PS_PUBLIC_VT MSG_ID_MEDIA_VT_SWITCH_VIDEO_SIZE
+PS_PUBLIC_VT MSG_ID_MED_VT_VIDEO_MISC_CMD
+PS_PUBLIC_VT MSG_ID_MED_VT_FAST_UPDATE_REQ
+RABM MSG_ID_RATDM_RABM_ACTIVATE_REQ
+RABM MSG_ID_RATDM_RABM_ACTIVATE_RSP
+RABM MSG_ID_RATDM_RABM_DEACTIVATE_REQ
+RABM MSG_ID_RATDM_RABM_MODIFY_REQ
+RABM MSG_ID_RATDM_RABM_REESTABLISH_RSP
+RABM MSG_ID_RATDM_RABM_RESUME_REQ
+RABM MSG_ID_RATDM_RABM_DATA_REQ
+RABM MSG_ID_RATDM_RABM_REESTABLISH_RAB_READY_IND
+RABM MSG_ID_RATDM_SHAQ_KICK_UL2
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_0
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_1
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_2
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_3
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_4
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_5
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_6
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_7
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_8
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_9
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_10
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_11
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_12
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_13
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_14
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_15
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_16
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_17
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_18
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_19
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_20
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_21
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_22
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_23
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_24
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_25
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_26
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_27
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_28
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_29
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_30
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_31
+RABM MSG_ID_REALTIME_SHAQ_KICK_URLC_PS_RBID_32
+RABM MSG_ID_CRABM_RAB_ESTABLISH_IND
+RABM MSG_ID_CRABM_RAB_RELEASE_IND
+RABM MSG_ID_CRABM_PS_RAB_CAPABILITY_IND
+RABM MSG_ID_RABM_CODE_END
+RAC MSG_ID_L4CRAC_ACT_REQ
+RAC MSG_ID_L4CRAC_REG_REQ
+RAC MSG_ID_L4CRAC_PS_REG_REQ
+RAC MSG_ID_L4CRAC_DEREG_REQ
+RAC MSG_ID_L4CRAC_PLMN_LIST_REQ
+RAC MSG_ID_L4CRAC_CLASS_CHANGE_REQ
+RAC MSG_ID_L4CRAC_ABORT_LIST_REQ
+RAC MSG_ID_L4CRAC_SET_PREFERRED_BAND_REQ
+RAC MSG_ID_L4CRAC_RFOFF_REQ
+RAC MSG_ID_L4CRAC_SIM_STATUS_UPDATE_REQ
+RAC MSG_ID_L4CRAC_SET_ROAMING_MODE_REQ
+RAC MSG_ID_L4CRAC_PLMN_SEARCH_REQ
+RAC MSG_ID_L4CRAC_SET_RAT_MODE_REQ
+RAC MSG_ID_L4CRAC_PLMN_LIST_STOP_REQ
+RAC MSG_ID_L4CRAC_SET_PREFER_RAT_REQ
+RAC MSG_ID_L4CRAC_END_PS_DATA_SESSION_REQ
+RAC MSG_ID_L4CRAC_CSG_LIST_REQ
+RAC MSG_ID_L4CRAC_CSG_LIST_STOP_REQ
+RAC MSG_ID_L4CRAC_SUSP_RESU_UPDATE_REQ
+RAC MSG_ID_L4CRAC_ABORT_EMERGENCY_PLMN_SEARCH_REQ
+RAC MSG_ID_L4CRAC_UE_OPLMN_UPDATE_REQ
+RAC MSG_ID_L4CRAC_RAT_CHANGE_START_REQ
+RAC MSG_ID_L4CRAC_RAT_CHANGE_FINISH_REQ
+RAC MSG_ID_L4CRAC_CSFB_PAGE_IND
+RAC MSG_ID_GMMREG_CSFB_PAGE_IND
+RAC MSG_ID_L4CRAC_CSFB_PAGE_RSP
+RAC MSG_ID_L4CRAC_SET_SMS_PREFERENCE_REQ
+RAC MSG_ID_L4CRAC_SET_VOICE_DOMAIN_PREFERENCE_REQ
+RAC MSG_ID_L4CRAC_SET_UE_USAGE_SETTING_REQ
+RAC MSG_ID_L4CRAC_SET_UE_MODE_REQ
+RAC MSG_ID_L4CRAC_SET_IMS_VOICE_AVAILABILITY_REQ
+RAC MSG_ID_L4CRAC_SET_IMS_SMS_AVAILABILITY_REQ
+RAC MSG_ID_L4CRAC_IMS_REG_STATUS_UPDATE_REQ
+RAC MSG_ID_L4CRAC_IMS_CONFIG_REQ
+RAC MSG_ID_L4CRAC_SIM_READY_IND
+RAC MSG_ID_L4CRAC_SIM_ERROR_IND
+RAC MSG_ID_L4CRAC_SET_MM_IMS_VOICE_TERMINATION_REQ
+RAC MSG_ID_L4CRAC_SET_RECOVERY_SEARCH_TIMER_REQ
+RAC MSG_ID_L4CRAC_GET_RECOVERY_SEARCH_TIMER_REQ
+RAC MSG_ID_RAC_NWSEL_SET_RECOVERY_SEARCH_TIMER_CNF
+RAC MSG_ID_RAC_NWSEL_GET_RECOVERY_SEARCH_TIMER_CNF
+RAC MSG_ID_L4CRAC_EPS_ATTACH_NEEDED_REJ_RSP
+RAC MSG_ID_GMMREG_ATTACH_CNF
+RAC MSG_ID_GMMREG_ATTACH_REJ
+RAC MSG_ID_GMMREG_DETACH_CNF
+RAC MSG_ID_GMMREG_DETACH_IND
+RAC MSG_ID_GMMREG_PLMN_LIST_IND
+RAC MSG_ID_GMMREG_NW_INFO_IND
+RAC MSG_ID_GMMREG_STATUS_IND
+RAC MSG_ID_GMMREG_CELL_INFO_UPDATE_IND
+RAC MSG_ID_GMMREG_PS_SERVICE_INFO_IND
+RAC MSG_ID_GMMREG_CIPHER_IND
+RAC MSG_ID_GMMREG_RFOFF_CNF
+RAC MSG_ID_GMMREG_DEDICATED_MODE_IND
+RAC MSG_ID_GMMREG_SEARCH_NORMAL_FINISH_IND
+RAC MSG_ID_GMMREG_RR_SERVICE_STATUS_IND
+RAC MSG_ID_GMMREG_SUSPEND_STATUS_IND
+RAC MSG_ID_GMMREG_SET_ROAMING_MODE_CNF
+RAC MSG_ID_GMMREG_SUSP_RESU_UPDATE_CNF
+RAC MSG_ID_GMMREG_SET_PREFER_RAT_CNF
+RAC MSG_ID_GMMREG_SET_RAT_MODE_CNF
+RAC MSG_ID_GMMREG_PLMN_SEARCH_CNF
+RAC MSG_ID_GMMREG_PLMN_LIST_CNF
+RAC MSG_ID_GMMREG_PLMN_LIST_STOP_CNF
+RAC MSG_ID_GMMREG_CSG_LIST_CNF
+RAC MSG_ID_GMMREG_CSG_LIST_STOP_CNF
+RAC MSG_ID_GMMREG_BAND_SEL_CNF
+RAC MSG_ID_GMMREG_END_PS_DATA_SESSION_CNF
+RAC MSG_ID_GMMREG_NW_ECC_IND
+RAC MSG_ID_GMMREG_NW_REJECT_IND
+RAC MSG_ID_MMIAS_CELL_POWER_LEVEL_IND
+RAC MSG_ID_MMIAS_PKT_TRANSFER_MODE_IND
+RAC MSG_ID_GMMREG_END_PS_DATA_SESSION_IND
+RAC MSG_ID_EMMREG_SET_RAT_MODE_CNF
+RAC MSG_ID_EMMREG_ATTACH_CNF
+RAC MSG_ID_EMMREG_DETACH_IND
+RAC MSG_ID_EMMREG_RFOFF_CNF
+RAC MSG_ID_EMMREG_CELL_INFO_UPDATE_IND
+RAC MSG_ID_EMMREG_NW_INFO_IND
+RAC MSG_ID_EMMREG_EPS_ATTACH_NEEDED_IND
+RAC MSG_ID_EMMREG_NW_ECC_IND
+RAC MSG_ID_EMMREG_PEER_REJECT_IND
+RAC MSG_ID_EMMREG_EMC_ATTACH_IND
+RAC MSG_ID_EMMREG_EMC_ATTACH_CNF
+RAC MSG_ID_EMMREG_EMC_DETACH_IND
+RAC MSG_ID_EMMREG_NW_FEATURE_IND
+RAC MSG_ID_EMMREG_NW_REJECT_IND
+RAC MSG_ID_RAC_NWSEL_RFOFF_CNF
+RAC MSG_ID_RAC_NWSEL_SET_ROAMING_MODE_CNF
+RAC MSG_ID_RAC_NWSEL_SET_PREFER_RAT_CNF
+RAC MSG_ID_RAC_NWSEL_SET_RAT_MODE_CNF
+RAC MSG_ID_RAC_NWSEL_PLMN_SEARCH_CNF
+RAC MSG_ID_RAC_NWSEL_PLMN_LIST_CNF
+RAC MSG_ID_RAC_NWSEL_PLMN_LIST_STOP_CNF
+RAC MSG_ID_RAC_NWSEL_CSG_LIST_CNF
+RAC MSG_ID_RAC_NWSEL_CSG_LIST_STOP_CNF
+RAC MSG_ID_RAC_NWSEL_PLMN_STATUS_IND
+RAC MSG_ID_RAC_NWSEL_SUSPEND_STATUS_IND
+RAC MSG_ID_RAC_NWSEL_PLMN_LIST_IND
+RAC MSG_ID_RAC_NWSEL_SUSP_RESU_UPDATE_CNF
+RAC MSG_ID_RAC_NWSEL_IMS_SERVICE_IND
+RAC MSG_ID_RAC_NWSEL_CS_DOMAIN_AVAILABILITY_IND
+RAC MSG_ID_RAC_CODE_END
+RATCM MSG_ID_RATCM_RRCE_CONN_EST_CNF
+RATCM MSG_ID_RATCM_RRCE_CONN_REL_CNF
+RATCM MSG_ID_RATCM_RRCE_CONN_REL_IND
+RATCM MSG_ID_RATCM_RRCE_DATA_TRANSFER_IND
+RATCM MSG_ID_RATCM_RRCE_DATA_TRANSFER_CNF
+RATCM MSG_ID_RATCM_RRCE_SECURITY_MODE_COMPLETE_IND
+RATCM MSG_ID_RATCM_RRCE_SECURITY_MODE_CHANGE_IND
+RATCM MSG_ID_RATCM_RRCE_CONN_LOSS_IND
+RATCM MSG_ID_RATCM_RRCE_RESET_KEYS_IND
+RATCM MSG_ID_RATCM_RRCE_RB_RE_ESTABLISHMENT_IND
+RATCM MSG_ID_RATCM_RRCE_END_PS_DATA_SESSION_CNF
+RATCM MSG_ID_RATCM_RRCE_PAGE_IND
+RATCM MSG_ID_RATCM_RRCE_LOCAL_RELEASE_IND
+RATCM MSG_ID_RATCM_UAS_SYS_INFO_IND
+RATCM MSG_ID_RATCM_CSCE_INIT_CNF
+RATCM MSG_ID_RATCM_CSCE_PLMN_SEARCH_CNF
+RATCM MSG_ID_RATCM_CSCE_PLMN_LOSS_IND
+RATCM MSG_ID_RATCM_CSE_PLMN_LIST_CNF
+RATCM MSG_ID_RATCM_CSE_PLMN_LIST_UPDATE_IND
+RATCM MSG_ID_RATCM_CSE_PLMN_LIST_STOP_CNF
+RATCM MSG_ID_RATCM_CSE_CSG_LIST_CNF
+RATCM MSG_ID_RATCM_CSE_CSG_LIST_STOP_CNF
+RATCM MSG_ID_RATCM_CSCE_RRC_DEACTIVATE_CNF
+RATCM MSG_ID_RAC_UAS_CELL_POWER_LEVEL_IND
+RATCM MSG_ID_RATCM_RRCE_CELL_CHANGE_START_IND
+RATCM MSG_ID_RATCM_RRCE_CELL_CHANGE_FINISH_IND
+RATCM MSG_ID_RATCM_CSCE_START_TIMER_OUT_OF_SERVICE_IND
+RATCM MSG_ID_RATCM_CSCE_RFON_CNF
+RATCM MSG_ID_RATCM_CSCE_RFOFF_CNF
+RATCM MSG_ID_RATCM_UAS_SIGNAL_APPEAR_IND
+RATCM MSG_ID_RATCM_CSCE_SET_RAT_MODE_CNF
+RATCM MSG_ID_RATCM_CSCE_IDLE_OUT_OF_SERVICE_IND
+RATCM MSG_ID_RATCM_SLCE_MONITORING_CLOSE_LOOP_CNF
+RATCM MSG_ID_RATCM_SLCE_MONITORING_CLOSE_LOOP_IND
+RATCM MSG_ID_RATCM_SLCE_RAB_ESTABLISHMENT_IND
+RATCM MSG_ID_RATCM_SLCE_RAB_MODIFY_IND
+RATCM MSG_ID_RATCM_SLCE_RAB_RELEASE_IND
+RATCM MSG_ID_RATCM_LLC_STATUS_IND
+RATCM MSG_ID_RATCM_LLC_UNITDATA_IND
+RATCM MSG_ID_RATCM_LLC_AS_NAS_DATA_CNF
+RATCM MSG_ID_RATCM_URLC_UTEST_OPEN_LOOP_CNF
+RATCM MSG_ID_RATCM_URLC_UTEST_CLOSE_LOOP_M1_CNF
+RATCM MSG_ID_RATCM_URLC_UTEST_CLOSE_LOOP_M2_CNF
+RATCM MSG_ID_RATCM_BMC_DATA_IND
+RATCM MSG_ID_RATCM_BMC_CB_GS_CHANGE_IND
+RATCM MSG_ID_RATCM_GAS_CELL_CHANGE_START_IND
+RATCM MSG_ID_RATCM_GAS_CELL_CHANGE_FINISH_IND
+RATCM MSG_ID_RATCM_GAS_CONN_ABORT_IND
+RATCM MSG_ID_RATCM_GAS_CONN_LOSS_IND
+RATCM MSG_ID_RATCM_GAS_CONN_EST_CNF
+RATCM MSG_ID_RATCM_GAS_CONN_EST_IND
+RATCM MSG_ID_RATCM_GAS_CONN_REL_CNF
+RATCM MSG_ID_RATCM_GAS_CONN_REL_IND
+RATCM MSG_ID_RATCM_GAS_DATA_CNF
+RATCM MSG_ID_RATCM_GAS_DATA_IND
+RATCM MSG_ID_RATCM_GAS_DEACTIVATE_CNF
+RATCM MSG_ID_RATCM_GAS_INIT_CNF
+RATCM MSG_ID_RATCM_GAS_PLMN_LIST_CNF
+RATCM MSG_ID_RATCM_GAS_PLMN_LIST_STOP_CNF
+RATCM MSG_ID_RATCM_GAS_PLMN_LOSS_IND
+RATCM MSG_ID_RATCM_GAS_PAGE_IND
+RATCM MSG_ID_RATCM_GAS_PLMN_SEARCH_CNF
+RATCM MSG_ID_RATCM_GAS_READY_TIMER_UPDATE_IND
+RATCM MSG_ID_RATCM_GAS_RFOFF_CNF
+RATCM MSG_ID_RATCM_GAS_RFON_CNF
+RATCM MSG_ID_RATCM_GAS_SET_RAT_MODE_CNF
+RATCM MSG_ID_RATCM_GAS_STOP_TEST_MODE_IND
+RATCM MSG_ID_RATCM_GAS_SYNC_IND
+RATCM MSG_ID_RATCM_GAS_SYS_INFO_IND
+RATCM MSG_ID_RATCM_GAS_CELL_GLOBAL_IDENTITY_INFO_IND
+RATCM MSG_ID_RATCM_GAS_PS_HO_SUCCESS_IND
+RATCM MSG_ID_RATCM_GAS_CB_PAGE_IND
+RATCM MSG_ID_RATCM_GAS_T3122_TIMEOUT_IND
+RATCM MSG_ID_RATCM_GAS_CCO_ACTIVATION_TIME_TIMEOUT_IND
+RATCM MSG_ID_RATCM_GAS_CB_GS_CHANGE_IND
+RATCM MSG_ID_RATCM_GAS_SIGNAL_APPEAR_IND
+RATCM MSG_ID_RATCM_GAS_IDLE_OUT_OF_SERVICE_IND
+RATCM MSG_ID_RATCM_RRLP_LCS_PROC_START_IND
+RATCM MSG_ID_RATCM_RRLP_LCS_PROC_END_IND
+RATCM MSG_ID_RATCM_GAS_AGPS_RESET_POSITIONING_IND
+RATCM MSG_ID_RATCM_UAGPS_CP_LCS_PROC_START_IND
+RATCM MSG_ID_RATCM_UAGPS_CP_LCS_PROC_END_IND
+RATCM MSG_ID_SMSAL_RATCM_CBCH_REQ
+RATCM MSG_ID_SMSAL_RATCM_CB_UPDATE_REQ
+RATCM MSG_ID_RATCM_RATDM_RAT_CHANGE_CNF
+RATCM MSG_ID_NWSEL_RATCM_EQ_PLMN_LIST_UPDATE_REQ
+RATCM MSG_ID_NWSEL_RATCM_RPLMN_EQ_PLMN_LIST_UPDATE_REQ
+RATCM MSG_ID_MM_RATCM_SET_RAT_MODE_REQ
+RATCM MSG_ID_MM_RATCM_INIT_REQ
+RATCM MSG_ID_MM_RATCM_SIM_INFO_RESET_REQ
+RATCM MSG_ID_MM_RATCM_RFOFF_REQ
+RATCM MSG_ID_MM_RATCM_PLMN_SEARCH_REQ
+RATCM MSG_ID_MM_RATCM_EQ_PLMN_LIST_UPDATE_REQ
+RATCM MSG_ID_MM_RATCM_HPLMN_INFO_UPDATE_REQ
+RATCM MSG_ID_MM_RATCM_ADD_FORBIDDEN_LA_REQ
+RATCM MSG_ID_MM_RATCM_DEL_FORBIDDEN_LA_REQ
+RATCM MSG_ID_MM_RATCM_PLMN_LIST_REQ
+RATCM MSG_ID_MM_RATCM_PLMN_LIST_STOP_REQ
+RATCM MSG_ID_MM_RATCM_UPDATE_ALLOWED_CSG_LIST_REQ
+RATCM MSG_ID_MM_RATCM_CSG_LIST_REQ
+RATCM MSG_ID_MM_RATCM_CSG_LIST_STOP_REQ
+RATCM MSG_ID_MM_RATCM_TLLI_ASSIGN_REQ
+RATCM MSG_ID_MM_RATCM_PAGING_PARAM_ASSIGN_REQ
+RATCM MSG_ID_MM_RATCM_SECURITY_MODE_REQ
+RATCM MSG_ID_MM_RATCM_CONN_EST_REQ
+RATCM MSG_ID_MM_RATCM_CONN_ABORT_REQ
+RATCM MSG_ID_MM_RATCM_CONN_REL_REQ
+RATCM MSG_ID_MM_RATCM_REGN_STATUS_UPDATE_REQ
+RATCM MSG_ID_MM_RATCM_STOP_TEST_MODE_REQ
+RATCM MSG_ID_MM_RATCM_CELL_UPDATED_REQ
+RATCM MSG_ID_MM_RATCM_CB_LOC_UPDATE_REQ
+RATCM MSG_ID_MM_RATCM_READY_TIMER_UPDATE_REQ
+RATCM MSG_ID_MM_RATCM_SERVICE_CHANGE_REQ
+RATCM MSG_ID_MM_RATCM_CS_DATA_REQ
+RATCM MSG_ID_MM_RATCM_PS_DATA_REQ
+RATCM MSG_ID_MM_RATCM_LLC_ASSIGN_REQ
+RATCM MSG_ID_MM_RATCM_LLC_RESUME_REQ
+RATCM MSG_ID_MM_RATCM_LLC_SUSPEND_REQ
+RATCM MSG_ID_MM_RATCM_LLC_TRIGGER_REQ
+RATCM MSG_ID_MM_RATCM_SET_GPRS_TRANSFER_PREFERENCE_REQ
+RATCM MSG_ID_MM_RATCM_SET_PREFERRED_BAND_REQ
+RATCM MSG_ID_MM_RATCM_END_PS_DATA_SESSION_REQ
+RATCM MSG_ID_MM_RATCM_RESET_CS_DATA_QUEUE_REQ
+RATCM MSG_ID_MM_RATCM_DEACTIVATE_REQ
+RATCM MSG_ID_MM_RATCM_EUTRAN_CAP_UPDATE_REQ
+RATCM MSG_ID_MM_RATCM_RAT_CHANGE_REQ
+RATCM MSG_ID_MM_RATCM_RAT_CHANGE_RSP
+RATCM MSG_ID_MM_RATCM_PAGE_REQ
+RATCM MSG_ID_RATCM_GAS_RAT_CHANGE_IND
+RATCM MSG_ID_RATCM_GAS_RAT_CHANGE_CNF
+RATCM MSG_ID_RATCM_GAS_EUTRAN_CAP_UPDATE_CNF
+RATCM MSG_ID_RATCM_UAS_RAT_CHANGE_IND
+RATCM MSG_ID_RATCM_UAS_RAT_CHANGE_CNF
+RATCM MSG_ID_RATCM_CSCE_EUTRAN_CAP_UPDATE_CNF
+RATCM MSG_ID_MM_RATCM_START_TEST_MODE_REQ
+RATCM MSG_ID_SMSAL_RATCM_CB_MSG_REMOVAL_REQ
+RATCM MSG_ID_RATCM_CODE_END
+RATDM MSG_ID_TCM_RATDM_DATA_REQ
+RATDM MSG_ID_TCM_RATDM_CONFIG_REQ
+RATDM MSG_ID_TCM_RATDM_DECONFIG_REQ
+RATDM MSG_ID_TCM_RATDM_ENTER_DATA_MODE_REQ
+RATDM MSG_ID_TCM_RATDM_QUERY_PS_STATISTICS_REQ
+RATDM MSG_ID_TCM_RATDM_RESET_PS_STATISTICS_REQ
+RATDM MSG_ID_CMUX_RATDM_DATA_ACTIVATE_RSP
+RATDM MSG_ID_CMUX_RATDM_DATA_DEACTIVATE_RSP
+RATDM MSG_ID_PS_DATA_REQ
+RATDM MSG_ID_PS_DATA_IND
+RATDM MSG_ID_PS_DSCR_DATA_IND
+RATDM MSG_ID_RATDM_SHAQ_PRINT_CS_Q_ELEMENT
+RATDM MSG_ID_RATDM_SHAQ_PRINT_PS_Q_ELEMENT
+RATDM MSG_ID_RATDM_LOG_SHAQ_UL_ELEMENT
+RATDM MSG_ID_SM_RATDM_RAB_ACTIVATE_REQ
+RATDM MSG_ID_SM_RATDM_RAB_ACTIVATE_RSP
+RATDM MSG_ID_SM_RATDM_ACTIVATE_REQ
+RATDM MSG_ID_SM_RATDM_DEACTIVATE_REQ
+RATDM MSG_ID_SM_RATDM_MODIFY_REQ
+RATDM MSG_ID_SM_RATDM_ALLOW_DL_PACKET_IND
+RATDM MSG_ID_MM_RATDM_REESTABLISH_RAB_RSP
+RATDM MSG_ID_MM_RATDM_SEQUENCE_REQ
+RATDM MSG_ID_MM_RATDM_SEND_USER_DATA_RSP
+RATDM MSG_ID_MM_RATDM_REESTABLISH_RAB_READY_IND
+RATDM MSG_ID_MM_RATDM_SERVICE_PROC_IND
+RATDM MSG_ID_RATCM_RATDM_RAT_CHANGE_REQ
+RATDM MSG_ID_RATCM_RATDM_REGAIN_COVERAGE_REQ
+RATDM MSG_ID_RATDM_RABM_ACTIVATE_CNF
+RATDM MSG_ID_RATDM_RABM_ACTIVATE_IND
+RATDM MSG_ID_RATDM_RABM_DEACTIVATE_CNF
+RATDM MSG_ID_RATDM_RABM_DEACTIVATE_IND
+RATDM MSG_ID_RATDM_RABM_MODIFY_CNF
+RATDM MSG_ID_RATDM_RABM_REESTABLISH_IND
+RATDM MSG_ID_RATDM_RABM_DATA_CNF
+RATDM MSG_ID_RATDM_RABM_DATA_IND
+RATDM MSG_ID_RATDM_RABM_SUSPEND_DATA_PLANE_IND
+RATDM MSG_ID_RATDM_RABM_RESUME_DATA_PLANE_IND
+RATDM MSG_ID_RATDM_RABM_PDCP_RELOC_IND
+RATDM MSG_ID_RATDM_RABM_RETRANSMIT_IND
+RATDM MSG_ID_RATDM_RABM_RB_CONFIG_IND
+RATDM MSG_ID_RATDM_RABM_RAB_RELEASE_IND
+RATDM MSG_ID_RATDM_RABM_RAB_CAPABILITY_IND
+RATDM MSG_ID_RATDM_PDCP_RESET_STATISTICS_RSP
+RATDM MSG_ID_RATDM_URLC_DEACTIVATE_PS_RAB_CNF
+RATDM MSG_ID_RATDM_SNDCP_DATA_IND
+RATDM MSG_ID_RATDM_SNDCP_DATA_CNF
+RATDM MSG_ID_RATDM_SNDCP_ACTIVATE_CNF
+RATDM MSG_ID_RATDM_SNDCP_MODIFY_CNF
+RATDM MSG_ID_RATDM_SNDCP_DEACTIVATE_CNF
+RATDM MSG_ID_RATDM_SNDCP_STATUS_IND
+RATDM MSG_ID_RATDM_SNDCP_SUSPEND_DATA_PLANE_IND
+RATDM MSG_ID_RATDM_SNDCP_RESUME_DATA_PLANE_IND
+RATDM MSG_ID_RATDM_SNDCP_FLUSH_IND
+RATDM MSG_ID_RATDM_SNDCP_TRANSMIT_IND
+RATDM MSG_ID_RATDM_SNDCP_SEQUENCE_CNF
+RATDM MSG_ID_RATDM_SNDCP_RESET_NPDU_SEQ_IND
+RATDM MSG_ID_RATDM_UT_MULTIMODE_UG_DATA_IND_CB
+RATDM MSG_ID_RATDM_UT_MULTIMODE_HOOK_UL_DEST_CB
+RATDM MSG_ID_RATDM_UT_MULTIMODE_UG_READY_IND_CB
+RATDM MSG_ID_RATDM_UT_MULTIMODE_FORWARD_FROM_UG_DATA_CB
+RATDM MSG_ID_RATDM_PROCESS_TX_QUEUE_IND
+RATDM MSG_ID_RATDM_CODE_END
+RAT_TCM MSG_ID_L4CTCM_RAT_CHANGE_START_REQ
+RAT_TCM MSG_ID_L4CTCM_RAT_CHANGE_FINISH_REQ
+RAT_TCM MSG_ID_TCM_RAT_CHANGE_COMPLETE_IND
+RAT_TCM MSG_ID_TCM_RAT_TCM_INIT_DEACTIVATE_CONTEXT_IND
+RAT_TCM MSG_ID_RAT_TCM_PRINT_EMBEDDED_SEC_ACTIVATE_IND_MSG
+RAT_TCM MSG_ID_RAT_TCM_PRINT_EMBEDDED_DEACTIVATE_IND_MSG
+RAT_TCM MSG_ID_RAT_TCM_PRINT_EMBEDDED_MODIFY_IND_MSG
+RAT_TCM MSG_ID_RAT_TCM_CODE_END
+RCS MSG_ID_RATCM_GAS_PLMN_LIST_REQ
+RCS MSG_ID_RATCM_GAS_PLMN_LIST_STOP_REQ
+RCS MSG_ID_RATCM_GAS_PLMN_SEARCH_REQ
+RCS MSG_ID_MPAL_RR_SEARCH_RF_CNF
+RCS MSG_ID_RCS_CODE_END
+REASM MSG_ID_RLC_REASM_BEGIN_REASM_IND
+REASM MSG_ID_RLC_REASM_TBF_REL_IND
+REASM MSG_ID_FLC_REASM_RESUME_REQ
+REASM MSG_ID_REASM_CODE_END
+RLC MSG_ID_GRR_DATA_REQ
+RLC MSG_ID_GRR_UNITDATA_REQ
+RLC MSG_ID_GRR_FLUSH_REQ
+RLC MSG_ID_MAC_RLC_UL_CON_IND
+RLC MSG_ID_MAC_RLC_ACK_IND
+RLC MSG_ID_MAC_RLC_SWITCH_TO_DL
+RLC MSG_ID_MAC_RLC_READY_IND
+RLC MSG_ID_MAC_RLC_PDCH_REL_IND
+RLC MSG_ID_RATCM_GAS_READY_TIMER_UPDATE_REQ
+RLC MSG_ID_MAC_RLC_REL_CNF
+RLC MSG_ID_RATCM_GAS_CELL_UPDATED_REQ
+RLC MSG_ID_MAC_RLC_ACCESS_REJECT_IND
+RLC MSG_ID_MAC_RLC_SWITCH_TO_UL
+RLC MSG_ID_RLC_DL_CODE_BEGIN
+RLC MSG_ID_MAC_RLC_DL_CON_IND
+RLC MSG_ID_REASM_RLC_REASM_DONE_IND
+RLC MSG_ID_RATCM_GAS_START_TEST_MODE_REQ
+RLC MSG_ID_MAC_RLC_TBF_REL_IND
+RLC MSG_ID_RLC_COMMON_CODE_BEGIN
+RLC MSG_ID_RLC_CODE_END
+RLP MSG_ID_L2R_RLP_ATTACH_REQ
+RLP MSG_ID_L2R_RLP_DATA_REQ
+RLP MSG_ID_L2R_RLP_CONN_REQ
+RLP MSG_ID_L2R_RLP_CONN_RESP
+RLP MSG_ID_L2R_RLP_RESET_RESP
+RLP MSG_ID_L2R_RLP_RESET_REQ
+RLP MSG_ID_L2R_RLP_DISC_REQ
+RLP MSG_ID_L2R_RLP_UNITDATA_REQ
+RLP MSG_ID_L2R_RLP_XID_REQ
+RLP MSG_ID_L2R_RLP_TEST_REQ
+RLP MSG_ID_L2R_RLP_PREPARE_REMAP_RESP
+RLP MSG_ID_L2R_RLP_REMAP_RESP
+RLP MSG_ID_L2R_RLP_DETACH_REQ
+RLP MSG_ID_RLP_RA_DATA_REQ
+RLP MSG_ID_RLP_RA_DATA_IND
+RLP MSG_ID_FLC_RLP_RR_REQ
+RLP MSG_ID_FLC_RLP_RNR_REQ
+RLP MSG_ID_L2R_RLP_ABOVE_UP_THRESHOLD_IND
+RLP MSG_ID_L2R_RLP_BELOW_UP_THRESHOLD_IND
+RLP MSG_ID_CSD_UART_READY_TO_READ
+RLP MSG_ID_CSD_UART_READY_TO_WRITE
+RLP MSG_ID_CSD_UART_DATA_REQ
+RLP MSG_ID_CSD_UART_FULL_IND
+RLP MSG_ID_CSD_ACTIVATE_REQ
+RLP MSG_ID_CSD_DEACTIVATE_REQ
+RLP MSG_ID_CSD_RA_DATA_REQ
+RLP MSG_ID_CSD_RA_DATA_IND
+RLP MSG_ID_CSD_CEEL_CHANGE_START_IND
+RLP MSG_ID_CSD_CEEL_CHANGE_FINIDSH_IND
+RLP MSG_ID_CSD_UPLINK_TICK_IND
+RLP MSG_ID_CSD_DOWNLINK_TICK_IND
+RLP MSG_ID_RLP_CODE_END
+RMPC MSG_ID_RATCM_GAS_CONN_EST_REQ
+RMPC MSG_ID_RATCM_GAS_CONN_REL_REQ
+RMPC MSG_ID_RATCM_GAS_CONN_ABORT_REQ
+RMPC MSG_ID_RATCM_GAS_DATA_REQ
+RMPC MSG_ID_RATCM_GAS_SECURITY_MODE_REQ
+RMPC MSG_ID_RATCM_GAS_SERVICE_CHANGE_REQ
+RMPC MSG_ID_RATCM_GAS_CBCH_REQ
+RMPC MSG_ID_RATCM_GAS_CB_UPDATE_REQ
+RMPC MSG_ID_RATCM_GAS_CB_MSG_REMOVAL_REQ
+RMPC MSG_ID_RRLP_GAS_DATA_REQ
+RMPC MSG_ID_MAC_RMPC_CTRL_MSG_IND
+RMPC MSG_ID_MAC_RMPC_PKT_ACCESS_REQ
+RMPC MSG_ID_MAC_RMPC_ACCESS_RESULT_IND
+RMPC MSG_ID_MAC_RMPC_ENTER_IDLE_REQ
+RMPC MSG_ID_MAC_RMPC_DL_ASSIGN_RESULT_IND
+RMPC MSG_ID_MAC_RMPC_TBF_STATUS_IND
+RMPC MSG_ID_MAC_RMPC_CTRL_MSG_CNF
+RMPC MSG_ID_MAC_RMPC_PS_HANDOVER_MSG_IND
+RMPC MSG_ID_MAC_RMPC_PS_HANDOVER_CONNECT_IND
+RMPC MSG_ID_MAC_RMPC_PS_HANDOVER_RESULT_IND
+RMPC MSG_ID_MAC_RMPC_PS_HANDOVER_RECONNECT_IND
+RMPC MSG_ID_MAC_RMPC_PS_HANDOVER_RSP_IND
+RMPC MSG_ID_MAC_RMPC_PACKET_APPLICATION_INFO_MSG_IND
+RMPC MSG_ID_RLC_RMPC_RESEL_REQ
+RMPC MSG_ID_RLC_RMPC_MS_STATE_CHANGE_IND
+RMPC MSG_ID_RLC_RMPC_ADJUST_PAGING_PERIOD_IND
+RMPC MSG_ID_MPAL_RR_NEIGHBOR_MEAS_IND
+RMPC MSG_ID_MPAL_RR_NC_MEASUREMENT_IND
+RMPC MSG_ID_MPAL_RR_EXTENDED_MEAS_IND
+RMPC MSG_ID_MPAL_RR_SERV_IDLE_MEAS_IND
+RMPC MSG_ID_MPAL_RR_SERV_DEDI_MEAS_IND
+RMPC MSG_ID_MPAL_RR_DETECT_PAGING_BLOCK_CALLBACK_REQ
+RMPC MSG_ID_MPAL_RR_RACH_CNF
+RMPC MSG_ID_MPAL_RR_HANDOVER_FAIL_IND
+RMPC MSG_ID_MPAL_RR_HANDOVER_SUCCESS_IND
+RMPC MSG_ID_MPAL_RR_HANDOVER_CONNECT_IND
+RMPC MSG_ID_MPAL_RR_DEDICATED_CHANNEL_CONNECT_CNF
+RMPC MSG_ID_MPAL_RR_DEDICATED_CHANNEL_DISCONNECT_CNF
+RMPC MSG_ID_MPAL_RR_DEDICATED_CHANNEL_RECONNECT_CNF
+RMPC MSG_ID_MPAL_RR_FREQUENCY_REDEFINITION_CNF
+RMPC MSG_ID_MPAL_RR_CHANNEL_MODE_MODIFY_CNF
+RMPC MSG_ID_MPAL_RR_CIPHERING_MODE_COMMAND_CNF
+RMPC MSG_ID_MPAL_RR_CLOSE_TCH_LOOP_CNF
+RMPC MSG_ID_MPAL_RR_OPEN_TCH_LOOP_CNF
+RMPC MSG_ID_RMP_MSG_CODE_END
+RMPC MSG_ID_LAPDM_RR_ESTB_CONF
+RMPC MSG_ID_LAPDM_RR_ESTB_IND
+RMPC MSG_ID_LAPDM_RR_REL_IND
+RMPC MSG_ID_LAPDM_RR_REL_CONF
+RMPC MSG_ID_LAPDM_RR_SUS_CONF
+RMPC MSG_ID_LAPDM_RR_RESUME_CONF
+RMPC MSG_ID_LAPDM_RR_RECON_CONF
+RMPC MSG_ID_LAPDM_RR_DATA_IND
+RMPC MSG_ID_LAPDM_RR_UNITDATA_IND
+RMPC MSG_ID_LAPDM_RR_ERROR_IND
+RMPC MSG_ID_LAPDM_RR_INTER_RAT_EST_CNF
+RMPC MSG_ID_LAPDM_RR_DATA_CONF
+RMPC MSG_ID_RMPC_CODE_END
+RRCE MSG_ID_RATCM_RRCE_CONN_EST_REQ
+RRCE MSG_ID_RATCM_RRCE_CONN_REL_REQ
+RRCE MSG_ID_RATCM_RRCE_CONN_ABORT_REQ
+RRCE MSG_ID_RATCM_RRCE_DATA_TRANSFER_REQ
+RRCE MSG_ID_RATCM_RRCE_SECURITY_MODE_REQ
+RRCE MSG_ID_RATCM_RRCE_RB_RE_ESTABLISHMENT_RSP
+RRCE MSG_ID_RATCM_RRCE_PAGING_PARAM_ASSIGN_REQ
+RRCE MSG_ID_RATCM_RRCE_REGN_STATUS_UPDATE_REQ
+RRCE MSG_ID_RATCM_RRCE_END_PS_DATA_SESSION_REQ
+RRCE MSG_ID_RATCM_UAS_RAT_CHANGE_RES
+RRCE MSG_ID_RATCM_RRCE_RAT_CHANGE_REQ
+RRCE MSG_ID_RATCM_RRCE_RAT_CHANGE_RSP
+RRCE MSG_ID_RATCM_CSCE_RAT_CHANGE_REQ
+RRCE MSG_ID_RATCM_UAS_RAT_CHANGE_RSP
+RRCE MSG_ID_RRCE_BMC_RX_IND
+RRCE MSG_ID_RRCE_BMC_ETWS_IND
+RRCE MSG_ID_RRCE_URLC_STATUS_IND
+RRCE MSG_ID_RRCE_PDCP_STATUS_IND
+RRCE MSG_ID_RRCE_SLCE_RECONFIG_COMPLETE_IND
+RRCE MSG_ID_RRCE_SLCE_RECONFIG_ERROR_IND
+RRCE MSG_ID_RRCE_SLCE_PDCP_RELOC_IND
+RRCE MSG_ID_RRCE_SLCE_GET_COUNT_C_CNF
+RRCE MSG_ID_RRCE_SLCE_ABORT_CNF
+RRCE MSG_ID_RRCE_SLCE_L1_CONTAINER_RECEIVED_IND
+RRCE MSG_ID_RRCE_SLCE_MONITOR_ORDER_REQ
+RRCE MSG_ID_RRCE_SIBE_CELL_RST_CNF
+RRCE MSG_ID_RRCE_SIBE_CELL_RST_STOP_CNF
+RRCE MSG_ID_CSCE_RRCE_SUITABLE_CELL_SELECTED_REQ
+RRCE MSG_ID_CSCE_RRCE_ACCEPTABLE_CELL_SELECTED_REQ
+RRCE MSG_ID_CSCE_RRCE_OUT_OF_SERVICE_AREA_REQ
+RRCE MSG_ID_CSCE_RRCE_DEACTIVATE_REQ
+RRCE MSG_ID_CSCE_RRCE_SET_MODE_REQ
+RRCE MSG_ID_RRCE_CSCE_SIB_COLLECTION_IND
+RRCE MSG_ID_CSCE_RRCE_PCH_TO_FACH_READY_RSP
+RRCE MSG_ID_CSCE_RRCE_RELEASE_CHANNELS_REQ
+RRCE MSG_ID_MEME_RRCE_COMPRESSED_MODE_RECONFIGURE_REQ
+RRCE MSG_ID_MEME_RRCE_MONITOR_ORDER_IND
+RRCE MSG_ID_RRCE_UMAC_STATUS_DATA_PENDING_IND
+RRCE MSG_ID_RRCE_UMAC_STATUS_RACH_IND
+RRCE MSG_ID_RRCE_UMAC_D_HRNTI_DETECTED_IND
+RRCE MSG_ID_RRCE_RRCE_DEBUG_INFO_IND
+RRCE MSG_ID_RRCE_RRCE_SECURITY_ACK_IND
+RRCE MSG_ID_RRCL_RRC_ACKNOWLEDGEMENT_IND
+RRCE MSG_ID_RRCE_CODE_END
+RRM_COMMON MSG_ID_SIM_RR_READY_IND
+RRM_COMMON MSG_ID_RATCM_GAS_ADD_FORBIDDEN_LA_REQ
+RRM_COMMON MSG_ID_RATCM_GAS_DEACTIVATE_REQ
+RRM_COMMON MSG_ID_RATCM_GAS_DEL_FORBIDDEN_LA_REQ
+RRM_COMMON MSG_ID_RATCM_GAS_EQ_PLMN_LIST_UPDATE_REQ
+RRM_COMMON MSG_ID_RATCM_GAS_INIT_REQ
+RRM_COMMON MSG_ID_RATCM_GAS_PAGING_PARAM_ASSIGN_REQ
+RRM_COMMON MSG_ID_RATCM_GAS_REGN_STATUS_UPDATE_REQ
+RRM_COMMON MSG_ID_RATCM_GAS_RPLMN_EQ_PLMN_LIST_UPDATE_REQ
+RRM_COMMON MSG_ID_RATCM_GAS_RFOFF_REQ
+RRM_COMMON MSG_ID_RATCM_GAS_RFON_REQ
+RRM_COMMON MSG_ID_RATCM_GAS_SET_RAT_MODE_REQ
+RRM_COMMON MSG_ID_RATCM_GAS_SIM_INFO_RESET_REQ
+RRM_COMMON MSG_ID_RATCM_GAS_TLLI_ASSIGN_REQ
+RRM_COMMON MSG_ID_RATCM_GAS_HPLMN_INFO_UPDATE_REQ
+RRM_COMMON MSG_ID_RATCM_GAS_SET_PREFERRED_BAND_REQ
+RRM_COMMON MSG_ID_RATCM_GAS_SET_GPRS_TRANSFER_PREFERENCE_REQ
+RRM_COMMON MSG_ID_MPAL_RR_ENTER_IDLE_IND
+RRM_COMMON MSG_ID_RATCM_GAS_RAT_CHANGE_REQ
+RRM_COMMON MSG_ID_RATCM_GAS_RAT_CHANGE_RSP
+RRM_COMMON MSG_ID_RATCM_GAS_PAGE_REQ
+RRM_COMMON MSG_ID_RATCM_GAS_EUTRAN_CAP_UPDATE_REQ
+RRM_COMMON MSG_ID_MPAL_RR_SET_RAT_SERVICE_CNF
+RRM_COMMON MSG_ID_MPAL_RR_BSIC_SYNC_CNF
+RRM_COMMON MSG_ID_MPAL_RR_NEIGHBOR_BSIC_IND
+RRM_COMMON MSG_ID_MPAL_RR_CELL_BSIC_IND
+RRM_COMMON MSG_ID_MPAL_RR_DATA_IND
+RRM_COMMON MSG_ID_MPAL_RR_CELL_SELECTION_INIT_CNF
+RRM_COMMON MSG_ID_RRM_COMMON_CODE_END
+RRM_MPAL_MM MSG_ID_MPAL_RR_STANDBY_GSM_MEAS_IND
+RRM_MPAL_MM MSG_ID_MPAL_RR_STANDBY_GSM_PRIO_MEAS_IND
+RRM_MPAL_MM MSG_ID_MPAL_RR_STANDBY_GSM_BSIC_IND
+RRM_MPAL_MM MSG_ID_MPAL_RR_STANDBY_GSM_REPORT_CGI_SEARCH_RF_CNF
+RRM_MPAL_MM MSG_ID_MPAL_RR_STANDBY_GSM_REPORT_CGI_BSIC_IND
+RRM_MPAL_MM MSG_ID_MPAL_RR_INTER_RAT_HANDOVER_CNF
+RRM_MPAL_MM MSG_ID_RRM_MPAL_MM_CODE_END
+SEQ MSG_ID_URLC_SEQ_ENQUEUE_CMD_REQ
+SEQ MSG_ID_URLC_SEQ_URB_ESTABLISH_REQ
+SEQ MSG_ID_URLC_SEQ_URB_RELEASE_REQ
+SEQ MSG_ID_URLC_SEQ_ENTER_PCH_CNF
+SEQ MSG_ID_SEQ_SEQ_ENQUEUE_CMD_REQ
+SEQ MSG_ID_SEQ_SEQ_CMD_VERDICT_IND
+SEQ MSG_ID_SEQ_SEQ_DNT_HW_REG_VERDICT_IND
+SEQ MSG_ID_SEQ_URLC_CMD_REGISTER_IND
+SEQ MSG_ID_UMAC_SEQ_ENQUEUE_CMD_REQ
+SEQ MSG_ID_UMAC_SEQ_TICK_REQ
+SEQ MSG_ID_URLC_SEQ_UL2ACC_SLEEP_ATTEMPT_CNF
+SEQ MSG_ID_CSEQ_CONFIG_UL2ACC_CLK_ON_INFO_REQ
+SEQ MSG_ID_CSEQ_CONFIG_UL2ACC_CLK_OFF_INFO_REQ
+SEQ MSG_ID_SEQ_CODE_END
+SEQ MSG_ID_CSR_SET_ROUTING_REQ
+SEQ MSG_ID_CSR_CODEC_DATA_REQ
+SEQ MSG_ID_SEQ_HWACCSIM_CMD_IND
+SEQ MSG_ID_HWACCSIM_SEQ_INTR_IND
+SIBE MSG_ID_SIBE_SLCE_CONFIGURE_BCH_FAILED_IND
+SIBE MSG_ID_SIBE_SIB_COLLECTION_REQ
+SIBE MSG_ID_SIBE_SIB_COLLECTION_CANCEL_REQ
+SIBE MSG_ID_SIBE_START_SIB_MONITORING_REQ
+SIBE MSG_ID_SIBE_STOP_SIB_MONITORING_REQ
+SIBE MSG_ID_RRCE_SIBE_CELL_RST_REQ
+SIBE MSG_ID_RRCE_SIBE_CELL_RST_STOP_REQ
+SIBE MSG_ID_RRCE_SIBE_SIB7_EXPIRY_TIMER_IND
+SIBE MSG_ID_CSCE_SIBE_MOVE_TO_IDLE_REQ
+SIBE MSG_ID_SIBE_DUMP_BCH_SIB_IND
+SIBE MSG_ID_SIBE_SIB_CHANGE_IND
+SIBE MSG_ID_SIBE_CODE_END
+SIM_PS MSG_ID_GMMSIM_GSM_ALGO_REQ
+SIM_PS MSG_ID_SIM_START_REQ
+SIM_PS MSG_ID_SIM_START_CNF
+SIM_PS MSG_ID_SIM_ERROR_IND
+SIM_PS MSG_ID_SIM_MMI_READY_IND
+SIM_PS MSG_ID_SIM_MMI_SECURITY_IND
+SIM_PS MSG_ID_SIM_MMRR_READY_IND
+SIM_PS MSG_ID_SIM_MM_READY_IND
+SIM_PS MSG_ID_SIM_READ_REQ
+SIM_PS MSG_ID_SIM_READ_CNF
+SIM_PS MSG_ID_SIM_WRITE_REQ
+SIM_PS MSG_ID_SIM_WRITE_CNF
+SIM_PS MSG_ID_SIM_INCREASE_REQ
+SIM_PS MSG_ID_SIM_INCREASE_CNF
+SIM_PS MSG_ID_SIM_SECURITY_REQ
+SIM_PS MSG_ID_SIM_SECURITY_CNF
+SIM_PS MSG_ID_SIM_FILE_INFO_REQ
+SIM_PS MSG_ID_SIM_FILE_INFO_CNF
+SIM_PS MSG_ID_SIM_DIAL_MODE_REQ
+SIM_PS MSG_ID_SIM_DIAL_MODE_CNF
+SIM_PS MSG_ID_SIM_STATUS_REQ
+SIM_PS MSG_ID_SIM_STATUS_CNF
+SIM_PS MSG_ID_SIM_POWEROFF_REQ
+SIM_PS MSG_ID_SIM_POWEROFF_CNF
+SIM_PS MSG_ID_SIM_ERROR_TEST_REQ
+SIM_PS MSG_ID_SIM_READ_PLMN_REQ
+SIM_PS MSG_ID_SIM_READ_PLMN_CNF
+SIM_PS MSG_ID_SIM_WRITE_PLMN_REQ
+SIM_PS MSG_ID_SIM_WRITE_PLMN_CNF
+SIM_PS MSG_ID_SIM_ACL_MODE_REQ
+SIM_PS MSG_ID_SIM_ACL_MODE_CNF
+SIM_PS MSG_ID_SAT_READY_REQ
+SIM_PS MSG_ID_SIM_STATUS_UPDATE_IND
+SIM_PS MSG_ID_L4C_SIM_GET_GSMCDMA_DUALSIM_INFO_REQ
+SIM_PS MSG_ID_L4C_SIM_GET_GSMCDMA_DUALSIM_INFO_CNF
+SIM_PS MSG_ID_L4C_SIM_SET_GSMCDMA_DUALSIM_MODE_REQ
+SIM_PS MSG_ID_L4C_SIM_SET_GSMCDMA_DUALSIM_MODE_CNF
+SIM_PS MSG_ID_L4C_SIM_SET_VSIM_MODE_REQ
+SIM_PS MSG_ID_L4C_SIM_SET_VSIM_MODE_CNF
+SIM_PS MSG_ID_USIM_URR_READY_IND
+SIM_PS MSG_ID_USIM_UPDATE_NETPAR_REQ
+SIM_PS MSG_ID_USIM_UPDATE_NETPAR_CNF
+SIM_PS MSG_ID_SAT_PROACTIVE_CMD_IND
+SIM_PS MSG_ID_SAT_MORE_TIME_RES
+SIM_PS MSG_ID_SAT_DSPL_TEXT_RES
+SIM_PS MSG_ID_SAT_GET_INKEY_RES
+SIM_PS MSG_ID_SAT_GET_INPUT_RES
+SIM_PS MSG_ID_SAT_PLAY_TONE_RES
+SIM_PS MSG_ID_SAT_SETUP_MENU_RES
+SIM_PS MSG_ID_SAT_SELECT_ITEM_RES
+SIM_PS MSG_ID_SAT_MENU_SELECT_REQ
+SIM_PS MSG_ID_SAT_CALL_CTRL_BY_SIM_REQ
+SIM_PS MSG_ID_SAT_SS_CTRL_BY_SIM_REQ
+SIM_PS MSG_ID_SAT_SEND_SMS_CTRL_BY_SIM_REQ
+SIM_PS MSG_ID_SAT_SMS_DL_REQ
+SIM_PS MSG_ID_SAT_CB_DL_REQ
+SIM_PS MSG_ID_SAT_EVDL_MT_CALL_REQ
+SIM_PS MSG_ID_SAT_EVDL_CALL_CONNECT_REQ
+SIM_PS MSG_ID_SAT_EVDL_CALL_DISCONNECT_REQ
+SIM_PS MSG_ID_SAT_EVDL_USER_ACTIVITY_REQ
+SIM_PS MSG_ID_SAT_EVDL_IDLE_SCREEN_AVAILABLE_REQ
+SIM_PS MSG_ID_SAT_EVDL_HCI_CONNECTIVITY_REQ
+SIM_PS MSG_ID_SAT_EVDL_LANGUAGE_SELECTION_REQ
+SIM_PS MSG_ID_SAT_EVDL_CARD_READER_STATUS_REQ
+SIM_PS MSG_ID_SAT_EVDL_BROWSER_TERMINATION_REQ
+SIM_PS MSG_ID_SAT_EVDL_DATA_AVAILABLE_REQ
+SIM_PS MSG_ID_SAT_EVDL_CHANNEL_STATUS_REQ
+SIM_PS MSG_ID_SAT_EVDL_ACCESS_TECHNOLOGY_CHANGE_REQ
+SIM_PS MSG_ID_SAT_SEND_SMS_RES
+SIM_PS MSG_ID_SAT_SEND_SS_RES
+SIM_PS MSG_ID_SAT_SEND_USSD_RES
+SIM_PS MSG_ID_SAT_SETUP_CALL_RES
+SIM_PS MSG_ID_SAT_SETUP_IDLE_DSPL_RES
+SIM_PS MSG_ID_SAT_RUN_AT_COMMAND_RES
+SIM_PS MSG_ID_SAT_SEND_DTMF_RES
+SIM_PS MSG_ID_SAT_LANG_NOTIFY_RES
+SIM_PS MSG_ID_SAT_LAUNCH_BROWSER_RES
+SIM_PS MSG_ID_SAT_ACTIVATE_RES
+SIM_PS MSG_ID_SAT_FILE_CHANGE_IND
+SIM_PS MSG_ID_SAT_FILE_CHANGE_RES
+SIM_PS MSG_ID_SAT_IMEI_INFO_REQ
+SIM_PS MSG_ID_SAT_IMEI_INFO_CNF
+SIM_PS MSG_ID_SAT_LOCATION_INFO_IND
+SIM_PS MSG_ID_SAT_PROVIDE_LOCATION_INFO_IND
+SIM_PS MSG_ID_SAT_TIME_ZONE_REQ
+SIM_PS MSG_ID_SAT_TIME_ZONE_CNF
+SIM_PS MSG_ID_SAT_CURRENT_TIME_REQ
+SIM_PS MSG_ID_SAT_CURRENT_TIME_CNF
+SIM_PS MSG_ID_SAT_ME_STATUS_REQ
+SIM_PS MSG_ID_SAT_ME_STATUS_CNF
+SIM_PS MSG_ID_SAT_NMR_REQ
+SIM_PS MSG_ID_SAT_NMR_CNF
+SIM_PS MSG_ID_SAT_LANGUAGE_REQ
+SIM_PS MSG_ID_SAT_LANGUAGE_CNF
+SIM_PS MSG_ID_SAT_TIMING_ADVANCE_IND
+SIM_PS MSG_ID_SAT_ACCESS_TECHNOLOGY_CHANGE_IND
+SIM_PS MSG_ID_SAT_CALL_STATUS_IND
+SIM_PS MSG_ID_SAT_PROFILE_DOWNLOAD_REQ
+SIM_PS MSG_ID_SAT_PROFILE_DOWNLOAD_CNF
+SIM_PS MSG_ID_SAT_TERMINAL_RSP
+SIM_PS MSG_ID_SAT_MORETIME_IND
+SIM_PS MSG_ID_SAT_POLL_INTERVAL_IND
+SIM_PS MSG_ID_SAT_ENVELOPE_REQ
+SIM_PS MSG_ID_SAT_ENVELOPE_CNF
+SIM_PS MSG_ID_SAT_REFRESH_IND
+SIM_PS MSG_ID_SAT_POLLING_OFF_IND
+SIM_PS MSG_ID_SAT_PROVIDE_LOCAL_INFO_IND
+SIM_PS MSG_ID_SAT_SETUP_EVENT_LIST_IND
+SIM_PS MSG_ID_SAT_ACTIVATE_IND
+SIM_PS MSG_ID_SAT_CONTACTLESS_STATE_CHANGED_IND
+SIM_PS MSG_ID_SAT_CONTACTLESS_STATE_CHANGED_RES
+SIM_PS MSG_ID_SAT_TIMER_MANAGEMENT_IND
+SIM_PS MSG_ID_SAT_OPEN_GPRS_CHANNEL_IND
+SIM_PS MSG_ID_SAT_OPEN_GPRS_CHANNEL_RES
+SIM_PS MSG_ID_SAT_OPEN_CSD_CHANNEL_IND
+SIM_PS MSG_ID_SAT_OPEN_CSD_CHANNEL_RES
+SIM_PS MSG_ID_SAT_OPEN_SERVER_MODE_CHANNEL_IND
+SIM_PS MSG_ID_SAT_OPEN_SERVER_MODE_CHANNEL_RES
+SIM_PS MSG_ID_SAT_CLOSE_CHANNEL_IND
+SIM_PS MSG_ID_SAT_CLOSE_CHANNEL_RES
+SIM_PS MSG_ID_SAT_SEND_DATA_IND
+SIM_PS MSG_ID_SAT_SEND_DATA_RES
+SIM_PS MSG_ID_SAT_RECV_DATA_IND
+SIM_PS MSG_ID_SAT_RECV_DATA_RES
+SIM_PS MSG_ID_SAT_CH_STATUS_IND
+SIM_PS MSG_ID_SAT_CH_STATUS_RES
+SIM_PS MSG_ID_SAT_OPEN_CHANNEL_IND
+SIM_PS MSG_ID_SAT_NW_SEARCH_MODE_IND
+SIM_PS MSG_ID_SAT_PROVIDE_NW_SEARCH_MODE_IND
+SIM_PS MSG_ID_SIM_IMEI_LOCK_VERIFIED_IND
+SIM_PS MSG_ID_SIM_O2_PREPAID_SIM_IND
+SIM_PS MSG_ID_SIM_APDU_ACCESS_REQ
+SIM_PS MSG_ID_SIM_APDU_ACCESS_CNF
+SIM_PS MSG_ID_SIM_MANAGE_CHANNEL_REQ
+SIM_PS MSG_ID_SIM_MANAGE_CHANNEL_CNF
+SIM_PS MSG_ID_SIM_JSR177_APDU_REQ
+SIM_PS MSG_ID_SIM_JSR177_APDU_CNF
+SIM_PS MSG_ID_SIM_JSR177_ATR_REQ
+SIM_PS MSG_ID_SIM_JSR177_ATR_CNF
+SIM_PS MSG_ID_SIM_CALL_DISCONNECT_IND
+SIM_PS MSG_ID_SIM_PLUG_OUT_IND
+SIM_PS MSG_ID_SIM_PLUG_IN_IND
+SIM_PS MSG_ID_SIM_SEARCH_RECORD_REQ
+SIM_PS MSG_ID_SIM_SEARCH_RECORD_CNF
+SIM_PS MSG_ID_SIM_SYNC_POLL_TIMER_IND
+SIM_PS MSG_ID_SIM_RECOVERY_ENHANCEMENT_SWITCH_REQ
+SIM_PS MSG_ID_SIM_RECOVERY_ENHANCEMENT_SWITCH_CNF
+SIM_PS MSG_ID_SIM_NWSEL_READY_IND
+SIM_PS MSG_ID_SIM_EMM_READY_IND
+SIM_PS MSG_ID_SIM_TERMINAL_CAPABILITY_SETTING_REQ
+SIM_PS MSG_ID_SIM_TERMINAL_CAPABILITY_SETTING_CNF
+SIM_PS MSG_ID_SIM_APP_START_REQ
+SIM_PS MSG_ID_SIM_APP_START_CNF
+SIM_PS MSG_ID_SIM_APP_ERROR_IND
+SIM_PS MSG_ID_SIM_APP_READY_IND
+SIM_PS MSG_ID_SIM_APP_READ_REQ
+SIM_PS MSG_ID_SIM_APP_READ_CNF
+SIM_PS MSG_ID_SIM_APP_WRITE_REQ
+SIM_PS MSG_ID_SIM_APP_WRITE_CNF
+SIM_PS MSG_ID_SIM_APP_SECURITY_REQ
+SIM_PS MSG_ID_SIM_APP_SECURITY_CNF
+SIM_PS MSG_ID_SIM_APP_FILE_INFO_REQ
+SIM_PS MSG_ID_SIM_APP_FILE_INFO_CNF
+SIM_PS MSG_ID_SIM_READ_IMSI_ICCID_REQ
+SIM_PS MSG_ID_SIM_READ_IMSI_ICCID_CNF
+SIM_PS MSG_ID_SIM_INTSIM_ACCESS_REQ
+SIM_PS MSG_ID_SIM_INTSIM_ACCESS_CNF
+SIM_PS MSG_ID_SIM_INTSIM_NOTIFY_IND
+SIM_PS MSG_ID_SIM_INTSIM_SECURITY_IND
+SIM_PS MSG_ID_SIM_INTSIM_DIAL_MODE_CHANGE_IND
+SIM_PS MSG_ID_SAT_NW_REJECT_IND
+SIM_PS MSG_ID_SAT_PDP_STATUS_IND
+SIM_PS MSG_ID_SAT_MEME_NMR_REQ
+SIM_PS MSG_ID_SAT_MEME_NMR_CNF
+SIM_PS MSG_ID_SAT_EAS_NMR_CNF
+SIM_PS MSG_ID_SIM_PS_CODE_END
+SIM_PUBLIC MSG_ID_SIM_READY_IND
+SIM_PUBLIC MSG_ID_SIM_RESET_REQ
+SIM_PUBLIC MSG_ID_SIM_RESET_CNF
+SIM_PUBLIC MSG_ID_BT_SIM_CONNECT_REQ
+SIM_PUBLIC MSG_ID_BT_SIM_CONNECT_CNF
+SIM_PUBLIC MSG_ID_BT_SIM_RESET_REQ
+SIM_PUBLIC MSG_ID_BT_SIM_RESET_CNF
+SIM_PUBLIC MSG_ID_BT_SIM_APDU_REQ
+SIM_PUBLIC MSG_ID_BT_SIM_APDU_CNF
+SIM_PUBLIC MSG_ID_BT_SIM_DISCONNECT_REQ
+SIM_PUBLIC MSG_ID_BT_SIM_DISCONNECT_CNF
+SIM_PUBLIC MSG_ID_BT_SIM_POWER_OFF_REQ
+SIM_PUBLIC MSG_ID_BT_SIM_POWER_OFF_CNF
+SIM_PUBLIC MSG_ID_BT_SIM_POWER_ON_REQ
+SIM_PUBLIC MSG_ID_BT_SIM_POWER_ON_CNF
+SIM_PUBLIC MSG_ID_SIM_AUTHENTICATE_REQ
+SIM_PUBLIC MSG_ID_SIM_AUTHENTICATE_CNF
+SIM_PUBLIC MSG_ID_SIM_QUERY_INFO_REQ
+SIM_PUBLIC MSG_ID_SIM_QUERY_INFO_CNF
+SIM_PUBLIC MSG_ID_SIM_ACCESS_EXTMD_IND
+SIM_PUBLIC MSG_ID_SIM_ACCESS_EXTMD_RES
+SIM_PUBLIC MSG_ID_SIM_EXTMD_NOTIFY_REQ
+SIM_PUBLIC MSG_ID_SIM_EXTMD_NOTIFY_CNF
+SIM_PUBLIC MSG_ID_SIM_APP_AUTHENTICATE_REQ
+SIM_PUBLIC MSG_ID_SIM_APP_AUTHENTICATE_CNF
+SIM_PUBLIC MSG_ID_SIM_PUBLIC_CODE_END
+SLCE MSG_ID_RATCM_SLCE_MONITORING_CLOSE_LOOP_REQ
+SLCE MSG_ID_CRABM_RAB_ESTABLISH_RSP
+SLCE MSG_ID_CRABM_RAB_RELEASE_RSP
+SLCE MSG_ID_CPDCP_CONFIG_CNF
+SLCE MSG_ID_CPDCP_RELOC_CNF
+SLCE MSG_ID_CPDCP_RELEASE_CNF
+SLCE MSG_ID_CRLC_CONFIG_RAB_CNF
+SLCE MSG_ID_CRLC_CONFIG_TM_ESTABLISH_CNF
+SLCE MSG_ID_CRLC_CONFIG_UM_ESTABLISH_CNF
+SLCE MSG_ID_CRLC_CONFIG_AM_ESTABLISH_CNF
+SLCE MSG_ID_CRLC_CONFIG_RELEASE_CNF
+SLCE MSG_ID_CRLC_SUSPEND_CNF
+SLCE MSG_ID_CRLC_RESUME_CNF
+SLCE MSG_ID_CRLC_CONFIG_TX_CIPHERING_CNF
+SLCE MSG_ID_CRLC_CONFIG_RX_CIPHERING_CNF
+SLCE MSG_ID_CRLC_COUNT_C_CNF
+SLCE MSG_ID_CRLC_REESTABLISH_CNF
+SLCE MSG_ID_CSEQ_CONFIG_UL2ACC_CLK_ON_INFO_CNF
+SLCE MSG_ID_CSEQ_CONFIG_UL2ACC_CLK_OFF_INFO_CNF
+SLCE MSG_ID_CSCE_SLCE_INITIALISE_REQ
+SLCE MSG_ID_CSCE_SLCE_RF_OFF_REQ
+SLCE MSG_ID_CSCE_SLCE_RF_ON_REQ
+SLCE MSG_ID_CSCE_SLCE_RSSI_SNIFFER_START_REQ
+SLCE MSG_ID_CSCE_SLCE_RSSI_SNIFFER_STOP_REQ
+SLCE MSG_ID_CSCE_SLCE_RSSI_SNIFFER_STOP_IND
+SLCE MSG_ID_URR_SLCE_SET_ACTIVE_RAT_REQ
+SLCE MSG_ID_RRCE_SLCE_ABORT_REQ
+SLCE MSG_ID_RRCE_SLCE_GET_COUNT_C_REQ
+SLCE MSG_ID_RRCE_SLCE_RECONFIG_REQ
+SLCE MSG_ID_SIBE_SLCE_RECONFIGURE_BCH_REQ
+SLCE MSG_ID_SIBE_SLCE_SIB7_CHANGE_IND
+SLCE MSG_ID_CSE_SLCE_FREQ_SCAN_CONTINUE_REQ
+SLCE MSG_ID_CSE_SLCE_FREQ_SCAN_REQ
+SLCE MSG_ID_CSE_SLCE_FREQ_SCAN_SUSPEND_REQ
+SLCE MSG_ID_CSE_SLCE_SPECIFIC_CELL_SEARCH_REQ
+SLCE MSG_ID_CSE_SLCE_SPECIFIC_CELL_SEARCH_STOP_REQ
+SLCE MSG_ID_MEME_SLCE_MEASUREMENT_CONFIG_CELL_REQ
+SLCE MSG_ID_MEME_SLCE_MEASUREMENT_CONFIG_FMO_REQ
+SLCE MSG_ID_MEME_SLCE_MEASUREMENT_CONFIG_TGPS_REQ
+SLCE MSG_ID_MEME_SLCE_MEASUREMENT_CONFIG_RSSI_EVENT_REQ
+SLCE MSG_ID_MEME_SLCE_MEASUREMENT_CONFIG_TX_POWER_REQ
+SLCE MSG_ID_MEME_SLCE_MEASUREMENT_CONFIG_TX_POWER_STOP_REQ
+SLCE MSG_ID_MEME_SLCE_TX_POWER_RESULT_REQ
+SLCE MSG_ID_MEME_SLCE_RLC_CONTINUE_REQ
+SLCE MSG_ID_MEME_SLCE_RLC_STOP_REQ
+SLCE MSG_ID_SEQ_SEQUENCE_REQ
+SLCE MSG_ID_SEQ_SEQUENCE_CONFIRMED_IND
+SLCE MSG_ID_SEQ_SEQUENCE_INDICATED_IND
+SLCE MSG_ID_SEQ_SEQUENCE_ERROR_IND
+SLCE MSG_ID_CMAC_CONFIG_UE_CNF
+SLCE MSG_ID_CMAC_CONFIG_UE_IND
+SLCE MSG_ID_CMAC_CONFIG_TX_CCTRCH_CNF
+SLCE MSG_ID_CMAC_CONFIG_EDCH_CCTRCH_CNF
+SLCE MSG_ID_CMAC_CONFIG_TX_CCTRCH_IND
+SLCE MSG_ID_CMAC_CONFIG_EDCH_CCTRCH_IND
+SLCE MSG_ID_CMAC_REMOVE_TX_CCTRCH_CNF
+SLCE MSG_ID_CMAC_REMOVE_EDCH_CCTRCH_CNF
+SLCE MSG_ID_CMAC_REMOVE_TX_CCTRCH_IND
+SLCE MSG_ID_CMAC_REMOVE_EDCH_CCTRCH_IND
+SLCE MSG_ID_CMAC_CONFIG_RX_CCTRCH_CNF
+SLCE MSG_ID_CMAC_CONFIG_HSDSCH_CCTRCH_CNF
+SLCE MSG_ID_CMAC_CONFIG_RX_CCTRCH_IND
+SLCE MSG_ID_CMAC_CONFIG_HSDSCH_CCTRCH_IND
+SLCE MSG_ID_CMAC_REMOVE_RX_CCTRCH_CNF
+SLCE MSG_ID_CMAC_REMOVE_HSDSCH_CCTRCH_CNF
+SLCE MSG_ID_CMAC_REMOVE_RX_CCTRCH_IND
+SLCE MSG_ID_CMAC_REMOVE_HSDSCH_CCTRCH_IND
+SLCE MSG_ID_CMAC_CONFIG_RACH_CNF
+SLCE MSG_ID_CMAC_CONFIG_RACH_IND
+SLCE MSG_ID_CMAC_CONFIG_CPCH_CNF
+SLCE MSG_ID_CMAC_CONFIG_CIPHERING_CNF
+SLCE MSG_ID_CMAC_COUNT_C_CNF
+SLCE MSG_ID_CMAC_DELETE_CIPHERING_CNF
+SLCE MSG_ID_CMAC_CONFIG_TX_RLC_REESTABLISH_CNF
+SLCE MSG_ID_CMAC_CONFIG_TX_RLC_REESTABLISH_IND
+SLCE MSG_ID_CMAC_CONFIG_RX_RLC_REESTABLISH_CNF
+SLCE MSG_ID_CMAC_CONFIG_RX_RLC_REESTABLISH_IND
+SLCE MSG_ID_CMAC_CONFIG_ABORT_CNF
+SLCE MSG_ID_CMAC_CONFIG_TFC_SUBSET_CNF
+SLCE MSG_ID_CMAC_CONFIG_TFC_SUBSET_IND
+SLCE MSG_ID_SLCE_CODE_END
+SM MSG_ID_SMREG_PDP_ACTIVATE_REQ
+SM MSG_ID_SMREG_PDP_DEACTIVATE_REQ
+SM MSG_ID_SMREG_PDP_MODIFY_REQ
+SM MSG_ID_SMREG_PDP_ACTIVATE_SEC_REQ
+SM MSG_ID_SM_RATDM_ACTIVATE_CNF
+SM MSG_ID_SM_RATDM_MODIFY_CNF
+SM MSG_ID_SM_RATDM_DEACTIVATE_CNF
+SM MSG_ID_SM_RATDM_STATUS_IND
+SM MSG_ID_SM_NSAPI_MSG_CODE_END
+SM MSG_ID_GMMSM_RAT_CHANGE_IND
+SM MSG_ID_L4CSM_RAT_CHANGE_RSP
+SM MSG_ID_GMMSM_RAT_CHANGE_CNF
+SM MSG_ID_L4CSM_RAT_CHANGE_REQ
+SM MSG_ID_SM_ESM_EPSB_CONTEXT_TRANSFER_IND
+SM MSG_ID_SM_ESM_EPSB_CONTEXT_TRANSFER_IND_FOR_SM_UT
+SM MSG_ID_SM_ESM_STANDBY_ON_OLD_RAT_IND
+SM MSG_ID_SM_ESM_PDP_CONTEXT_TRANSFER_CNF
+SM MSG_ID_SM_TRACE_SMREG_PDP_ACTIVATE_REQ
+SM MSG_ID_SM_TRACE_SMREG_PDP_ACTIVATE_SEC_REQ
+SM MSG_ID_SMREG_ALLOW_DL_PACKET_IND
+SM MSG_ID_GMMSM_PS_SWITCH_CONTEXT_TRANSFER_IND
+SM MSG_ID_L4C_SM_PS_SWITCH_CONTEXT_TRANSFER_RSP
+SM MSG_ID_GMMSM_PS_SWITCH_CONTEXT_TRANSFER_CNF
+SM MSG_ID_L4C_SM_PS_SWITCH_CONTEXT_TRANSFER_REQ
+SM MSG_ID_SM_PS_SWITCH_PDP_CONTEXT_TRANSFER_REQ
+SM MSG_ID_SM_PS_SWITCH_PDP_CONTEXT_TRANSFER_CNF
+SM MSG_ID_SM_PS_SWITCH_STANDBY_ON_OLD_RAT_REQ
+SM MSG_ID_SM_RATDM_RAB_ACTIVATE_CNF
+SM MSG_ID_SM_RATDM_RAB_ACTIVATE_IND
+SM MSG_ID_SM_RATDM_RAB_DEACTIVATE_IND
+SM MSG_ID_SM_CONN_SEND_REQ
+SM MSG_ID_SM_CONN_SEND_CNF
+SM MSG_ID_SM_CONN_ABORT_REQ
+SM MSG_ID_SM_CONN_ABORT_CNF
+SM MSG_ID_SM_CONN_ABORT_FAIL
+SM MSG_ID_SM_CONN_SEND_FAIL
+SM MSG_ID_SM_CONN_ERR_IND
+SM MSG_ID_SM_CONN_DETACH_IND
+SM MSG_ID_SM_CONN_CANCEL_NOTIFY
+SM MSG_ID_SM_CONN_IRAT_SYNC_STATE_NOTIFY
+SM MSG_ID_SM_CORE_RAB_REQUEST_ACTIVATE_NOTIFY
+SM MSG_ID_SM_CONN_STOP_ALL_CONN_TIMER_NOTIFY
+SM MSG_ID_SM_CORE_UT_TIMER_EXPIRY_IMMEDICATELY
+SM MSG_ID_SM_CONN_UT_TIMER_EXPIRY_IMMEDICATELY
+SM MSG_ID_GMMSM_ATTACH_CNF
+SM MSG_ID_GMMSM_ATTACH_REJ
+SM MSG_ID_GMMSM_DETACH_IND
+SM MSG_ID_GMMSM_EST_CNF
+SM MSG_ID_GMMSM_EST_REJ
+SM MSG_ID_GMMSM_ERR_IND
+SM MSG_ID_GMMSM_UNITDATA_CNF
+SM MSG_ID_GMMSM_UNITDATA_IND
+SM MSG_ID_GMMSM_SUSPEND_REQ
+SM MSG_ID_GMMSM_RESUME_REQ
+SM MSG_ID_GMMSM_NSAPI_STATUS_IND
+SM MSG_ID_GMMSM_RAT_IND
+SM MSG_ID_SMREG_PDP_ACTIVATE_REJ_RSP
+SM MSG_ID_SMREG_PDP_ACTIVATE_SEC_REJ_RSP
+SM MSG_ID_SM_TEST_SM_CALCULATE_HOW_MANY_PDP_ARE_USED
+SM MSG_ID_GMMSM_CELL_INFO_UPDATE_IND
+SM MSG_ID_SM_CODE_END
+SMS MSG_ID_GMMSMS_REG_STATE_IND
+SMS MSG_ID_LLSMS_UNITDATA_IND
+SMS MSG_ID_MMSMS_EST_IND
+SMS MSG_ID_MMSMS_EST_CNF
+SMS MSG_ID_MMSMS_DATA_IND
+SMS MSG_ID_MMSMS_REL_IND
+SMS MSG_ID_MMSMS_ERR_IND
+SMS MSG_ID_MMSMS_EST_REJ
+SMS MSG_ID_SMS_TIMER_EXPIRY
+SMS MSG_ID_MMSMS_EST_INTR
+SMS MSG_ID_GMMSMS_EST_CNF
+SMS MSG_ID_GMMSMS_EST_REJ
+SMS MSG_ID_GMMSMS_ERR_IND
+SMS MSG_ID_GMMSMS_UNITDATA_IND
+SMS MSG_ID_SMS_EVAL_EST_CNF
+SMS MSG_ID_SMS_EVAL_EST_REJ
+SMS MSG_ID_SMS_EVAL_UNITDATA_IND
+SMS MSG_ID_SMS_EVAL_ERR_IND
+SMS MSG_ID_SMS_EVAL_REG_STATUS_IND
+SMS MSG_ID_SMS_VGMM_EST_CNF
+SMS MSG_ID_SMS_VGMM_EST_REJ
+SMS MSG_ID_SMS_VGMM_DATA_IND
+SMS MSG_ID_SMS_VGMM_ERR_IND
+SMS MSG_ID_SMS_VGMM_REG_STATUS_IND
+SMS MSG_ID_SMS_SUBMIT
+SMS MSG_ID_SMS_SUBMIT_ABORT
+SMS MSG_ID_SMS_COMMAND
+SMS MSG_ID_SMS_COMMAND_ABORT
+SMS MSG_ID_SMS_DELIVER_REPORT_ACK
+SMS MSG_ID_SMS_DELIVER_REPORT_NACK
+SMS MSG_ID_SMS_SERVICE_REQ
+SMS MSG_ID_SMS_MORE_MSG_SEND_REQ
+SMS MSG_ID_SMS_TRY_NEXT_BEARER_REQ
+SMS MSG_ID_SMS_MEM_AVL_NOTIF
+SMS MSG_ID_SMS_CODE_END
+SMSAL MSG_ID_L4CSMSAL_INIT_REQ
+SMSAL MSG_ID_L4CSMSAL_DE_INIT_REQ
+SMSAL MSG_ID_L4CSMSAL_DELETE_REQ
+SMSAL MSG_ID_L4CSMSAL_DE_PERSONALIZATION_ACK
+SMSAL MSG_ID_L4CSMSAL_READ_REQ
+SMSAL MSG_ID_L4CSMSAL_WRITE_REQ
+SMSAL MSG_ID_L4CSMSAL_SEND_REQ
+SMSAL MSG_ID_L4CSMSAL_SEND_SMMA_REQ
+SMSAL MSG_ID_L4CSMSAL_SEND_FROM_STORAGE_REQ
+SMSAL MSG_ID_L4CSMSAL_SEND_DELIVER_REPORT_REQ
+SMSAL MSG_ID_L4CSMSAL_SEND_ABORT
+SMSAL MSG_ID_L4CSMSAL_SET_PARAMETER_REQ
+SMSAL MSG_ID_L4CSMSAL_SET_COMMON_PARA_REQ
+SMSAL MSG_ID_L4CSMSAL_SET_PROFILE_PARA_REQ
+SMSAL MSG_ID_L4CSMSAL_SAT_SEND_REQ
+SMSAL MSG_ID_L4CSMSAL_STARTUP_READ_NEXT_REQ
+SMSAL MSG_ID_L4CSMSAL_FDN_CHECK_RSP
+SMSAL MSG_ID_L4CSMSAL_SMS_DEPERSONALIZATION_RSP
+SMSAL MSG_ID_L4CSMSAL_COPY_MSG_REQ
+SMSAL MSG_ID_L4CSMSAL_SET_STATUS_REQ
+SMSAL MSG_ID_L4CSMSAL_GET_MAILBOX_NUM_REQ
+SMSAL MSG_ID_L4CSMSAL_INIT_ME_SMS_REQ
+SMSAL MSG_ID_L4CSMSAL_SET_MSG_WAITING_REQ
+SMSAL MSG_ID_L4CSMSAL_SYNC_MSG_STORAGE_REQ
+SMSAL MSG_ID_L4CSMSAL_READ_RAW_DATA_REQ
+SMSAL MSG_ID_L4CSMSAL_WRITE_RAW_DATA_REQ
+SMSAL MSG_ID_L4CSMSAL_IMS_SEND_REQ
+SMSAL MSG_ID_L4CSMSAL_IMS_SEND_SMMA_REQ
+SMSAL MSG_ID_L4CSMSAL_IMS_SEND_SMMA_RESULT_REQ
+SMSAL MSG_ID_L4CSMSAL_IMS_SMS_DELIVER_REQ
+SMSAL MSG_ID_L4CSMSAL_IMS_SMS_STATUS_REQ
+SMSAL MSG_ID_SMS_DELIVER
+SMSAL MSG_ID_SMS_SUBMIT_REPORT_ACK
+SMSAL MSG_ID_SMS_SUBMIT_REPORT_NACK
+SMSAL MSG_ID_SMS_STATUS_REPORT
+SMSAL MSG_ID_SMS_SUBMIT_ABORT_CNF
+SMSAL MSG_ID_SMS_MEM_AVL_NOTIF_CNF
+SMSAL MSG_ID_SMS_MORE_MSG_SEND_IND
+SMSAL MSG_ID_SMS_MT_FINAL_ACK_IND
+SMSAL MSG_ID_SMSAL_TST_DELIVER
+SMSAL MSG_ID_SMSAL_TST_IMS_DELIVER
+SMSAL MSG_ID_SAT_SMS_DL_CNF
+SMSAL MSG_ID_SAT_CB_DL_CNF
+SMSAL MSG_ID_SAT_SEND_SMS_CTRL_BY_SIM_CNF
+SMSAL MSG_ID_L4CSMSAL_CBCH_REQ
+SMSAL MSG_ID_L4CSMSAL_CB_UPDATE_REQ
+SMSAL MSG_ID_L4CSMSAL_HZ_CB_ACT_REQ
+SMSAL MSG_ID_SMSAL_AS_CB_PAGE_IND
+SMSAL MSG_ID_SMSAL_AS_CB_GS_CHANGE_IND
+SMSAL MSG_ID_SMSAL_RATCM_CB_DATA_IND
+SMSAL MSG_ID_SMSAL_RATCM_CB_RECONFIG_IND
+SMSAL MSG_ID_SMSAL_RATCM_CB_GS_CHANGE_IND
+SMSAL MSG_ID_L4CSMSAL_RAT_CHANGE_START_REQ
+SMSAL MSG_ID_L4CSMSAL_RAT_CHANGE_FINISH_REQ
+SMSAL MSG_ID_SMSAL_EVAL_CB_DATA_IND
+SMSAL MSG_ID_SMSAL_EVAL_CB_RECONFIG_IND
+SMSAL MSG_ID_SMSAL_EVAL_CB_GS_CHANGE_IND
+SMSAL MSG_ID_PHBSMSAL_GET_EXT1_NUM_REQ
+SMSAL MSG_ID_PHBSMSAL_GET_EXT1_NUM_CNF
+SMSAL MSG_ID_SMSAL_SOC_REG_PORT_REQ
+SMSAL MSG_ID_SMSAL_TR2_EXPIRE_IND
+SMSAL MSG_ID_L4CSMSAL_CB_MSG_REMOVAL_REQ
+SMSAL MSG_ID_SMSAL_CODE_END
+SMU MSG_ID_L4CSMU_START_REQ
+SMU MSG_ID_L4CSMU_APP_START_REQ
+SMU MSG_ID_L4CSMU_SECURITY_REQ
+SMU MSG_ID_L4CSMU_APP_SECURITY_REQ
+SMU MSG_ID_L4CSMU_SET_PERSONALIZATION_REQ
+SMU MSG_ID_L4CSMU_GET_SHARED_KEY_REQ
+SMU MSG_ID_L4CSMU_UPDATE_SLB_REQ
+SMU MSG_ID_L4CSMU_RESET_SLB_REQ
+SMU MSG_ID_L4CSMU_GET_SLB_VERSION_REQ
+SMU MSG_ID_L4CSMU_UPDATE_NW_TIME_REQ
+SMU MSG_ID_L4CSMU_SML_STATUS_REQ
+SMU MSG_ID_L4CSMU_PLMN_SEL_WRITE_REQ
+SMU MSG_ID_L4CSMU_SIM_ACCESS_REQ
+SMU MSG_ID_L4CSMU_PUCT_WRITE_REQ
+SMU MSG_ID_L4CSMU_PUCT_READ_REQ
+SMU MSG_ID_L4CSMU_CSP_READ_REQ
+SMU MSG_ID_L4CSMU_SMS_DEPERSONALIZATION_REQ
+SMU MSG_ID_L4CSMU_DIAL_MODE_REQ
+SMU MSG_ID_L4CSMU_SAT_OPEN_CHANNEL_REQ
+SMU MSG_ID_L4CSMU_SAT_SEND_DATA_REQ
+SMU MSG_ID_L4CSMU_SAT_RECV_DATA_REQ
+SMU MSG_ID_L4CSMU_SAT_BEARER_PARA_REQ
+SMU MSG_ID_L4CSMU_SAT_SET_CSD_PROF_RES
+SMU MSG_ID_L4CSMU_SAT_SET_GPRS_PROF_RES
+SMU MSG_ID_SMU_CODE_END
+SND MSG_ID_SN_DATA_REQ
+SND MSG_ID_SN_UNITDATA_REQ
+SND MSG_ID_SN_XID_REQ
+SND MSG_ID_LLSND_UNITDATA_IND
+SND MSG_ID_LLSND_XID_IND
+SND MSG_ID_LLSND_XID_CNF
+SND MSG_ID_LLSND_DATA_IND
+SND MSG_ID_LLSND_DATA_CNF
+SND MSG_ID_LLSND_ESTABLISH_IND
+SND MSG_ID_LLSND_ESTABLISH_CNF
+SND MSG_ID_LLSND_RELEASE_IND
+SND MSG_ID_LLSND_RELEASE_CNF
+SND MSG_ID_LLSND_STATUS_IND
+SND MSG_ID_LLSND_RESET_IND
+SND MSG_ID_LLSND_T100_RESET_IND
+SND MSG_ID_LLSND_FLUSH_CNF
+SND MSG_ID_SNSM_ACTIVATE_IND
+SND MSG_ID_SNSM_DEACTIVATE_IND
+SND MSG_ID_SNSM_MODIFY_IND
+SND MSG_ID_SNSM_SEQUENCE_IND
+SND MSG_ID_SNSM_CELL_INFO_UPDATE_IND
+SND MSG_ID_SND_FLC_SUSPEND_RESUME
+SND MSG_ID_SND_ACTIVATE_IND
+SND MSG_ID_SND_ACTIVATE_RSP
+SND MSG_ID_SND_DEACTIVATE_IND
+SND MSG_ID_SND_DEACTIVATE_RSP
+SND MSG_ID_SND_MODIFY_EST
+SND MSG_ID_SND_MODIFY_EST_RSP
+SND MSG_ID_SND_MODIFY_REL
+SND MSG_ID_SND_MODIFY_REL_RSP
+SND MSG_ID_SND_UNITDATA_IND
+SND MSG_ID_SND_UNITDATA_TX_REQ
+SND MSG_ID_SND_DATA_IND
+SND MSG_ID_SND_DATA_TX_REQ
+SND MSG_ID_SND_RESET_IND
+SND MSG_ID_SND_DATA_ERROR
+SND MSG_ID_SND_COMPRESS_RSP
+SND MSG_ID_SND_DECOMPRESS_RSP
+SND MSG_ID_SND_FLC_DATA_RESUME_PPP
+SND MSG_ID_RATDM_SNDCP_ACTIVATE_REQ
+SND MSG_ID_RATDM_SNDCP_DATA_REQ
+SND MSG_ID_RATDM_SNDCP_MODIFY_REQ
+SND MSG_ID_RATDM_SNDCP_DEACTIVATE_REQ
+SND MSG_ID_RATDM_SNDCP_SEQUENCE_REQ
+SND MSG_ID_SOC_SND_DL_SRPDU_RESUME
+SND MSG_ID_SND_NPDU_INQUEUE_IND
+SND MSG_ID_SND_CODE_END
+SUPL MSG_ID_SUPL_LCSP_DATA_IND
+SUPL MSG_ID_SUPL_LCSP_DATA_RSP
+SUPL MSG_ID_SUPL_LCSP_DATA_REQ
+SUPL MSG_ID_SUPL_LCSP_DATA_CNF
+SUPL MSG_ID_LCSP_START_REQ
+SUPL MSG_ID_LCSP_END_REQ
+SUPL MSG_ID_SUPL_LCSP_ABORT_REQ
+SUPL MSG_ID_SUPL_CONN_SEND_REQ
+SUPL MSG_ID_SUPL_CONN_SEND_CNF
+SUPL MSG_ID_SUPL_CONN_RECV_IND
+SUPL MSG_ID_SUPL_CONN_FAIL_IND
+SYSDEBUG MSG_ID_INVALID_TYPE
+SYSDEBUG MSG_ID_TIMER_EXPIRY
+SYSDEBUG MSG_ID_STACK_SIM_TIMER_START
+SYSDEBUG MSG_ID_STACK_SIM_TIMER_STOP
+SYSDEBUG MSG_ID_STACK_SIM_TIMER_EXPIRY
+SYSDEBUG MSG_ID_MDDBG_REQ
+SYSDEBUG MSG_ID_MDDBG_RESPONSE
+T30 MSG_ID_CSM_T30_ACTIVATE_REQ
+T30 MSG_ID_CSM_T30_DEACTIVATE_REQ
+T30 MSG_ID_CSM_T30_FAX_RATE_REQ
+T30 MSG_ID_L4C_T30_RW_STR_PARAM_REQ
+T30 MSG_ID_L4C_T30_RW_PARAM_REQ
+T30 MSG_ID_L4C_T30_TX_MSG_REQ
+T30 MSG_ID_L4C_T30_RX_MSG_REQ
+T30 MSG_ID_L4C_T30_TX_BCS_REQ
+T30 MSG_ID_L4C_T30_RX_BCS_REQ
+T30 MSG_ID_L4C_T30_TX_SILENCE_REQ
+T30 MSG_ID_L4C_T30_RX_SILENCE_REQ
+T30 MSG_ID_L4C_T30_TRANSFER_UART_REQ
+T30 MSG_ID_L4C_T30_TX_PPM_REQ
+T30 MSG_ID_FA_T30_ACTIVATE_CNF
+T30 MSG_ID_FA_T30_DEACTIVATE_CNF
+T30 MSG_ID_FA_T30_TX_DATA_CNF
+T30 MSG_ID_FA_T30_RX_DATA_CNF
+T30 MSG_ID_FA_T30_DISC_IND
+T30 MSG_ID_FA_T30_CMD_CNF
+T30 MSG_ID_FA_T30_CMD_IND
+T30 MSG_ID_FA_T30_DATA_IND
+T30 MSG_ID_FA_T30_GET_CMD_IND
+T30 MSG_ID_FA_T30_GET_DATA_IND
+T30 MSG_ID_FA_T30_TX_DATA_END_IND
+T30 MSG_ID_FA_T30_RX_DATA_END_IND
+T30 MSG_ID_FA_T30_TX_CMD_END_IND
+T30 MSG_ID_FA_T30_RX_CMD_END_IND
+T30 MSG_ID_FA_T30_GETMORE_DATA_IND
+T30 MSG_ID_FA_T30_OVERFLOW_IND
+T30 MSG_ID_FA_T30_DATA_AVAILABLE_IND
+T30 MSG_ID_FA_T30_RATE_CHANGE_IND
+T30 MSG_ID_FA_T30_HDLC_IND
+T30 MSG_ID_T30_CODE_END
+TCM MSG_ID_TCM_AT_MSG_BEGIN
+TCM MSG_ID_L4CTCM_START_REQ
+TCM MSG_ID_L4CTCM_UNDEFINE_PDP_INFO_REQ
+TCM MSG_ID_L4CTCM_SET_PRI_PDP_INFO_REQ
+TCM MSG_ID_L4CTCM_SET_SEC_PDP_INFO_REQ
+TCM MSG_ID_L4CTCM_SET_QOS_INFO_REQ
+TCM MSG_ID_L4CTCM_SET_EQOS_INFO_REQ
+TCM MSG_ID_L4CTCM_SET_EPS_QOS_INFO_REQ
+TCM MSG_ID_L4CTCM_SET_TFT_INFO_REQ
+TCM MSG_ID_L4CTCM_SET_PPP_AUTH_INFO_REQ
+TCM MSG_ID_L4CTCM_SET_CONFIG_OPTION_REQ
+TCM MSG_ID_L4CTCM_ENTER_DATA_MODE_REQ
+TCM MSG_ID_L4CTCM_LEAVE_DATA_MODE_REQ
+TCM MSG_ID_L4CTCM_SET_MSQ_MODE_REQ
+TCM MSG_ID_L4CTCM_SET_MSQ_ENTRY_REQ
+TCM MSG_ID_TCM_AT_MSG_END
+TCM MSG_ID_TCM_COMMON_FSM_MSG_BEGIN
+TCM MSG_ID_TCM_PDP_ACTIVATE_REQ
+TCM MSG_ID_TCM_PDP_DEACTIVATE_REQ
+TCM MSG_ID_TCM_PDP_MODIFY_REQ
+TCM MSG_ID_TAF_EXT_PDP_ACTIVATE_IND
+TCM MSG_ID_TAF_EXT_PDP_DEACTIVATE_IND
+TCM MSG_ID_TAF_LINK_FREE_IND
+TCM MSG_ID_TCM_COMMON_FSM_MSG_END
+TCM MSG_ID_TCM_UGTCM_MSG_BEGIN
+TCM MSG_ID_SMREG_PDP_ACTIVATE_CNF
+TCM MSG_ID_SMREG_PDP_ACTIVATE_REJ
+TCM MSG_ID_SMREG_PDP_ACTIVATE_SEC_CNF
+TCM MSG_ID_SMREG_PDP_ACTIVATE_SEC_REJ
+TCM MSG_ID_SMREG_PDP_ACTIVATE_IND
+TCM MSG_ID_SMREG_PDP_ACTIVATE_SEC_IND
+TCM MSG_ID_TCM_PDP_ACTIVATE_REJ_RSP
+TCM MSG_ID_TCM_TIMER_EXPIRY
+TCM MSG_ID_SMREG_PDP_DEACTIVATE_IND
+TCM MSG_ID_SMREG_PDP_DEACTIVATE_CNF
+TCM MSG_ID_SMREG_PDP_MODIFY_IND
+TCM MSG_ID_SMREG_PDP_MODIFY_CNF
+TCM MSG_ID_SMREG_PDP_MODIFY_REJ
+TCM MSG_ID_SMREG_RAT_CHANGE_COMPLETE_IND
+TCM MSG_ID_SMREG_PS_CHANGE_COMPLETE_IND
+TCM MSG_ID_TCM_RATDM_PS_BEARER_CAPABILITY_IND
+TCM MSG_ID_SMREG_PDP_PRESERVE_IND
+TCM MSG_ID_SMREG_PDP_REESTABLISH_IND
+TCM MSG_ID_SMREG_PS_SUSPEND_IND
+TCM MSG_ID_SMREG_PS_RESUME_IND
+TCM MSG_ID_TCM_UGTCM_MSG_END
+TCM MSG_ID_TCM_ETCM_MSG_BEGIN
+TCM MSG_ID_ESMREG_PDN_CONN_EST_REJ
+TCM MSG_ID_ESMREG_BEARER_RSC_ALLOC_REJ
+TCM MSG_ID_ESMREG_BEARER_RSC_MOD_REJ
+TCM MSG_ID_ESMREG_EPSB_DEACT_REJ
+TCM MSG_ID_ESMREG_PDN_CONN_EST_IND
+TCM MSG_ID_ESMREG_PDN_CONN_UPDATE_IND
+TCM MSG_ID_ESMREG_EPSB_DEACT_IND
+TCM MSG_ID_ESMREG_RAT_CHANGE_COMPLETE_IND
+TCM MSG_ID_TAF_EXT_ENTER_DATA_MODE_REQ
+TCM MSG_ID_ETCM_EM_DUMP_PDP_CONTEXT_IND
+TCM MSG_ID_ESMREG_PS_INIT_BEARER_DEACT_IND
+TCM MSG_ID_TCM_ETCM_MSG_END
+TCM MSG_ID_TCM_ACL_MSG_BEGIN
+TCM MSG_ID_L4CTCM_SET_ACL_MODE_REQ
+TCM MSG_ID_L4CTCM_GET_ACL_ENTRIES_REQ
+TCM MSG_ID_L4CTCM_SET_ACL_ENTRY_REQ
+TCM MSG_ID_L4CTCM_ADD_ACL_ENTRY_REQ
+TCM MSG_ID_L4CTCM_DEL_ACL_ENTRY_REQ
+TCM MSG_ID_L4CTCM_LEAVE_ACL_MENU_REQ
+TCM MSG_ID_TCM_ACL_MSG_END
+TCM MSG_ID_TCM_UT_MSG_BEGIN
+TCM MSG_ID_TCM_UT_CHECK_CALLBACK_L4CTCM_GET_PRI_PDP_INFO
+TCM MSG_ID_TCM_UT_CHECK_CALLBACK_L4CTCM_QUERY_NEG_QOS_INFO
+TCM MSG_ID_TCM_UT_CHECK_CALLBACK_L4CTCM_GET_SEC_PDP_INFO
+TCM MSG_ID_TCM_UT_CHECK_CALLBACK_TCM_WRITE_TFT
+TCM MSG_ID_TCM_UT_CHECK_CALLBACK_L4CTCM_SET_TFT_INFO
+TCM MSG_ID_TCM_UT_CHECK_CALLBACK_L4CTCM_GET_TFT_INFO
+TCM MSG_ID_TCM_UT_CHECK_CALLBACK_L4CTCM_GET_QOS_INFO
+TCM MSG_ID_TCM_UT_CHECK_CALLBACK_L4CTCM_GET_CONFIG_OPTION_INFO
+TCM MSG_ID_TCM_UT_CHECK_CALLBACK_L4CTCM_GET_EQOS_INFO
+TCM MSG_ID_TCM_UT_CHECK_CALLBACK_L4CTCM_ENCODE_SDU_SIZE
+TCM MSG_ID_TCM_UT_CHECK_CALLBACK_L4CTCM_DECODE_SDU_SIZE
+TCM MSG_ID_TCM_UT_CHECK_CALLBACK_L4CTCM_ENCODE_BIT_RATE
+TCM MSG_ID_TCM_UT_CHECK_CALLBACK_L4CTCM_DECODE_BIT_RATE
+TCM MSG_ID_TCM_UT_CHECK_CALLBACK_L4CTCM_ENCODE_TRANSFER_DELAY
+TCM MSG_ID_TCM_UT_CHECK_CALLBACK_L4CTCM_DECODE_TRANSFER_DELAY
+TCM MSG_ID_TCM_UT_CHECK_CALLBACK_L4CTCM_GET_PDP_ADDR
+TCM MSG_ID_TCM_UT_CHECK_CALLBACK_L4CTCM_GET_CONTEXT_STATE
+TCM MSG_ID_TCM_UT_CHECK_CALLBACK_L4CTCM_GET_EMPTY_GPRS_PROF
+TCM MSG_ID_TCM_UT_CHECK_CALLBACK_L4CTCM_GET_PPP_AUTH
+TCM MSG_ID_TCM_UT_CHECK_CALLBACK_L4CTCM_CMUX_PORT_TO_CID
+TCM MSG_ID_TCM_UT_CHECK_CALLBACK_L4CTCM_GET_BEARER_CAPABILITY
+TCM MSG_ID_TCM_UT_CHECK_CALLBACK_CHECK_PDP_CONTEXT_EXIST_OR_DURING_ACTIVATING_FUNC
+TCM MSG_ID_TCM_UT_RESULT_OK
+TCM MSG_ID_TCM_UT_L4CTCM_GET_PRI_PDP_RDP_INFO
+TCM MSG_ID_TCM_UT_L4CTCM_GET_SEC_PDP_RDP_INFO
+TCM MSG_ID_TCM_UT_L4CTCM_GET_PRI_PDP_INFO
+TCM MSG_ID_TCM_UT_L4CTCM_GET_SEC_PDP_INFO
+TCM MSG_ID_TCM_UT_L4CTCM_GET_NW_APPLIED_PDP_INFO
+TCM MSG_ID_TCM_UT_MSG_END
+TCM MSG_ID_L4C_PS_QUERY_EXT_PDP_STATISTICS_REQ
+TCM MSG_ID_L4C_PS_QUERY_EXT_PDP_STATISTICS_RSP
+TCM MSG_ID_L4C_PS_RESET_EXT_PDP_STATISTICS_REQ
+TCM MSG_ID_L4C_PS_RESET_EXT_PDP_STATISTICS_RSP
+TCM MSG_ID_L4C_PS_EXT_PDP_STATISTICS_IND
+TCM MSG_ID_L4C_RATDM_PACKETS_FLUSH_IND
+TDT MSG_ID_CSM_TDT_ACTIVATE_REQ
+TDT MSG_ID_CSM_TDT_DEACTIVATE_REQ
+TDT MSG_ID_CSM_TDT_UART_SETOWNER_REQ
+TDT MSG_ID_CSM_TDT_ESC_OFF_REQ
+TDT MSG_ID_PPP_TDT_DATA_REQ
+TDT MSG_ID_TDT_CODE_END
+TFTLIB MSG_ID_TFTLIB_MSG_BEGIN
+TFTLIB MSG_ID_TFTLIB_TFT_DECODE_EXEC_RESULT
+TFTLIB MSG_ID_TFTLIB_TFT_ENCODE_EXEC_RESULT
+TFTLIB MSG_ID_TFTLIB_SET_APPLIED_TFT_EXEC_RESULT
+TFTLIB MSG_ID_TFTLIB_COMPOSE_TFT_TO_NW_EXEC_RESULT
+TFTLIB MSG_ID_TFTLIB_CURRENT_TFT_CONTEXT_STATUS
+TFTLIB MSG_ID_TFTLIB_SET_USER_DEFINED_TFT_EXEC_RESULT
+TFTLIB MSG_ID_TFTLIB_SET_MTK_AP_STATUS_REQ
+TFTLIB MSG_ID_TFTLIB_ENABLE_EM_INFO_REQ
+TFTLIB MSG_ID_EM_TFTLIB_APPLIED_TFT_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_EBI5_APPLIED_TFT_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_EBI6_APPLIED_TFT_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_EBI7_APPLIED_TFT_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_EBI8_APPLIED_TFT_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_EBI9_APPLIED_TFT_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_EBI10_APPLIED_TFT_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_EBI11_APPLIED_TFT_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_EBI12_APPLIED_TFT_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_EBI13_APPLIED_TFT_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_EBI14_APPLIED_TFT_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_EBI15_APPLIED_TFT_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_USER_DEFINED_TFT_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_CID0_USER_DEFINED_TFT_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_CID1_USER_DEFINED_TFT_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_CID2_USER_DEFINED_TFT_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_CID3_USER_DEFINED_TFT_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_CID4_USER_DEFINED_TFT_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_CID5_USER_DEFINED_TFT_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_CID6_USER_DEFINED_TFT_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_CID7_USER_DEFINED_TFT_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_CID8_USER_DEFINED_TFT_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_CID9_USER_DEFINED_TFT_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_CID10_USER_DEFINED_TFT_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_CID11_USER_DEFINED_TFT_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_NW_ASSIGNED_TAD_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_EBI5_NW_ASSIGNED_TAD_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_EBI6_NW_ASSIGNED_TAD_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_EBI7_NW_ASSIGNED_TAD_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_EBI8_NW_ASSIGNED_TAD_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_EBI9_NW_ASSIGNED_TAD_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_EBI10_NW_ASSIGNED_TAD_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_EBI11_NW_ASSIGNED_TAD_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_EBI12_NW_ASSIGNED_TAD_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_EBI13_NW_ASSIGNED_TAD_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_EBI14_NW_ASSIGNED_TAD_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_EBI15_NW_ASSIGNED_TAD_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_UE_COMPOSED_TAD_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_CID0_UE_COMPOSED_TAD_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_CID1_UE_COMPOSED_TAD_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_CID2_UE_COMPOSED_TAD_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_CID3_UE_COMPOSED_TAD_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_CID4_UE_COMPOSED_TAD_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_CID5_UE_COMPOSED_TAD_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_CID6_UE_COMPOSED_TAD_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_CID7_UE_COMPOSED_TAD_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_CID8_UE_COMPOSED_TAD_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_CID9_UE_COMPOSED_TAD_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_CID10_UE_COMPOSED_TAD_UPDATE_IND
+TFTLIB MSG_ID_EM_TFTLIB_CID11_UE_COMPOSED_TAD_UPDATE_IND
+TFTLIB MSG_ID_TFTLIB_MSG_END
+TL1DATA_AST MSG_ID_TL1DATA_AST_RESET_CNF
+TL1DATA_AST MSG_ID_TL1DATA_AST_RFCAL_RESET_CNF
+TL1DATA_AST MSG_ID_TL1DATA_AST_RFCAL_CS_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_RFCAL_ABBREG_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_FHC_FINISH_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_OTCAL_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_SET_ACTIVE_RAT_CNF
+TL1DATA_AST MSG_ID_TL1DATA_AST_SUSPEND_DONE_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_RESUME_DONE_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_GAP_SYNC_SUSPEND_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_RF_SUSPEND_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_RAT_SUSPEND_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_CONTAINER_SUSPEND_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_FS_SUSPEND_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_SNIFFER_SUSPEND_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_BCH_SUSPEND_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_PCH_SUSPEND_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_MEAS_SUSPEND_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_BCH_CS_SUSPEND_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_FREQUENCY_SCAN_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_FREQUENCY_SCAN_SUSPEND_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_CELL_SEARCH_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_SNIFFER_TIMEOUT_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_SNIFFER_SETUP_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_SNIFFER_NO_SIGNAL_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_SNIFFER_SIGNAL_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_SNIFFER_RELEASE_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_SPECIFIC_CELL_SEARCH_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_SPECIFIC_CELL_SEARCH_STOP_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_MSG_CONTAINER_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_ABORT_CNF
+TL1DATA_AST MSG_ID_TL1DATA_AST_BCH_SETUP_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_BCH_RELEASE_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_SFN_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_BCH_CS_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_BCH_CS_SETUP_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_PCH_SETUP_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_PCH_RELEASE_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_FACH_SETUP_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_FACH_RELEASE_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_RACH_SETUP_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_RACH_RELEASE_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_POST_TX_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_ACCESS_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_UL_DCH_SETUP_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_UL_DCH_RELEASE_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_DL_DCH_SETUP_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_DL_DCH_RELEASE_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_TX_STATUS_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_T312_EXPIRY_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_DL_INIT_SYNC_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_RL_FAILURE_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_HSDSCH_SETUP_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_HSDSCH_RELEASE_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_EDCH_SETUP_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_EDCH_RELEASE_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_MEAS_SETUP_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_MEAS_RELEASE_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_MEAS_RSCP_INTRA_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_MEAS_RSCP_INTER_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_MEAS_ISCP_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_MEAS_INTERNAL_SETUP_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_MEAS_INTERNAL_RELEASE_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_MEAS_INTERNAL_EVENT_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_MEAS_INTERNAL_PERIODIC_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_MEAS_INTERNAL_RESULT_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_BCH_DATA_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_DATA_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_HSDSCH_DATA_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_PREPARE_DATA_REQ
+TL1DATA_AST MSG_ID_TL1DATA_AST_GET_DATA_REQ
+TL1DATA_AST MSG_ID_TL1DATA_AST_HSDSCH_SETUP_DATA_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_HSDSCH_RELEASE_DATA_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_HSDSCH_MODIFY_DATA_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_INFORM_DCH_MAC_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_INFORM_MAC_CSR_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_INFORM_EDCH_MAC_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_MEAS_DMO_SETUP_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_UE_STATE_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_GAP_SERVICE_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_GAP_SYNC_RAT_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_GAP_SYNC_TIMEOUT_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_GAP_SYNC_CELL_CHANGE_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_GAP_SYNC_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_GAP_SYNC_TL1_CNF
+TL1DATA_AST MSG_ID_TL1DATA_AST_GAP_CALC_PROVIDE_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_GAP_CALC_CANCEL_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_GAP_RELEASE_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_FACH_GAP_LOCK_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_DMS_MEAS_DONE_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_TL1C_GAP_PATTERN_STOP
+TL1DATA_AST MSG_ID_TL1DATA_AST_TL1C_GAP_PATTERN_FINISH
+TL1DATA_AST MSG_ID_TL1DATA_AST_TIMING_SYNC_TL1_CNF
+TL1DATA_AST MSG_ID_TL1DATA_AST_AUTO_GAP_SUSPEND_DONE_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_AUTO_GAP_START_CNF
+TL1DATA_AST MSG_ID_TL1DATA_AST_TRACE_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_CHANNEL_QUALITY_STATUS_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_NUM
+TL1DATA_AST MSG_ID_TL1DATA_AST_GAP_SERVICE_START_UMTS_PM_ONLY
+TL1DATA_AST MSG_ID_TL1DATA_AST_GAP_SERVICE_START_UMTS_ALL
+TL1DATA_AST MSG_ID_TL1DATA_AST_GAP_SERVICE_STOP_UMTS
+TL1DATA_AST MSG_ID_TL1DATA_AST_GAP_SYNC_GL1_CNF_SUCCESS
+TL1DATA_AST MSG_ID_TL1DATA_AST_GAP_SYNC_GL1_CNF_FAILURE
+TL1DATA_AST MSG_ID_TL1DATA_AST_GAP_CTRL_GSM_PM_DONE_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_GAP_CTRL_STOP_GAP_CONFIRM
+TL1DATA_AST MSG_ID_TL1DATA_AST_FACH_GAP_LOCK_CNF
+TL1DATA_AST MSG_ID_TL1DATA_AST_GSM_SYNC_START
+TL1DATA_AST MSG_ID_TL1DATA_AST_DMS_TIM_ADJ_CLEAR_CNF
+TL1DATA_AST MSG_ID_TL1DATA_AST_GSM_GAP_AVAIABLE_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_GSM_GAP_UNAVAIABLE_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_TL1A_GAP_PATTERN_SET
+TL1DATA_AST MSG_ID_TL1DATA_AST_GAP_SERVICE_FS_REQ
+TL1DATA_AST MSG_ID_TL1DATA_AST_GAP_SERVICE_FS_STOP
+TL1DATA_AST MSG_ID_TL1DATA_AST_GAP_SERVICE_BCH_REQ
+TL1DATA_AST MSG_ID_TL1DATA_AST_GAP_SERVICE_BCH_STOP
+TL1DATA_AST MSG_ID_TL1DATA_AST_GAP_SERVICE_MEAS_REQ
+TL1DATA_AST MSG_ID_TL1DATA_AST_GAP_SERVICE_MEAS_STOP
+TL1DATA_AST MSG_ID_TL1DATA_AST_TIMING_SYNC_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_TIMING_SYNC_SUSPEND_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_TL1A_GAP_STOP_REQ
+TL1DATA_AST MSG_ID_TL1DATA_AST_MMS_TIM_ADJ_CLEAR_CNF
+TL1DATA_AST MSG_ID_TL1DATA_AST_GAP_MMS_SUSPEND_DONE_IND
+TL1DATA_AST MSG_ID_TL1DATA_AST_AUTO_GAP_START
+TL1DATA_AST MSG_ID_TL1DATA_AST_AUTO_GAP_RELEASE
+TL1DATA_AST MSG_ID_TL1DATA_AST_AUTO_GAP_STOP_CNF
+TL1DATA_AST MSG_ID_TL1DATA_AST_AUTO_GAP_FINISH
+TL1DATA_AST MSG_ID_TL1DATA_AST_TL1C_AUTO_GAP_PATTERN_STOP
+TL1DATA_AST MSG_ID_TL1DATA_AST_MMS_AUTO_GAP_TIM_ADJ_CLEAR_CNF
+TL1DATA_AST MSG_ID_L4CTL1_EM_TST_CONTROL_CNF
+TL1FTA_AST MSG_ID_RFCAL_RESET_REQ
+TL1FTA_AST MSG_ID_RFCAL_CS_REQ
+TL1FTA_AST MSG_ID_RFCAL_DCH_REQ
+TL1FTA_AST MSG_ID_RFCAL_DCH_REL_REQ
+TL1FTA_AST MSG_ID_RFCAL_GETINFO_REQ
+TL1FTA_AST MSG_ID_RFCAL_ABBREG_REQ
+TL1FTA_AST MSG_ID_NSFT_SET_PARA_REQ
+TL1FTA_AST MSG_ID_RFTEST_RXTX_REQ
+TL1FTA_AST MSG_ID_FHC_START_REQ
+TL1FTA_AST MSG_ID_FHC_START_EX_REQ
+TL1FTA_AST MSG_ID_RFCAL_RESET_CNF
+TL1FTA_AST MSG_ID_RFCAL_CS_IND
+TL1FTA_AST MSG_ID_RFCAL_DCH_CNF
+TL1FTA_AST MSG_ID_RFCAL_DCH_REL_CNF
+TL1FTA_AST MSG_ID_RFCAL_GETINFO_CNF
+TL1FTA_AST MSG_ID_RFCAL_ABBREG_IND
+TL1FTA_AST MSG_ID_NSFT_SET_PARA_CNF
+TL1FTA_AST MSG_ID_RFTEST_RXTX_CNF
+TL1FTA_AST MSG_ID_FHC_START_CNF
+TL1FTA_AST MSG_ID_FHC_FINISH_IND
+TL1FTA_AST MSG_ID_FHC_FINISH_EX_IND
+TL1FTA_AST MSG_ID_SLT_TEST_REQ
+TL1HISR_AST MSG_ID_TL1HISR_AST_ABC
+TL1HISR_AST MSG_ID_TL1HISR_AST_DEF
+TL1HISR_AST MSG_ID_TL1HISR_AST_GHI
+TST MSG_ID_DHL_INJECT_STRING
+TST MSG_ID_TST_INJECT_STRING
+TST MSG_ID_DHL_IND_READ_VARIABLE_RETURN
+TST MSG_ID_DHL_IND_READ_MEMORY_REPORT
+TST MSG_ID_DHL_IND_QUERY_MEMORY_RANGE
+TST MSG_ID_DHL_IND_NVRAM_READ_CNF
+TST MSG_ID_DHL_IND_NVRAM_RESET_CNF
+TST MSG_ID_DHL_IND_NVRAM_WRITE_CNF
+TST MSG_ID_DHL_IND_STACK_STATISTICS
+TST MSG_ID_DHL_IND_FILE_TRANSFER_REPORT
+TST MSG_ID_DHL_IND_FILE_SAVE_REPORT
+TST MSG_ID_DHL_IND_QUERY_BUF_MONITOR_REPORT
+TST MSG_ID_DHL_TO_ETSTM
+TST MSG_ID_ETSTM_TO_DHL
+TST MSG_ID_DHL_IND_SWLA_QUERY_HEADER_REPORT
+TST MSG_ID_DHL_IND_GENERAL_QUERY_CMD_ACK
+TST MSG_ID_DHL_TEST
+TST MSG_ID_HELLO_GPD
+TST MSG_ID_HELLO_PTR_ARRAY
+TST MSG_ID_HELLO_INLINE_ILM
+TST MSG_ID_HELLO_INLINE_ILM2
+TST MSG_ID_DHL_DRIVER_STATE_CHANGE
+TST MSG_ID_DHL_TTY_RX_DONE
+TST MSG_ID_DHL_REDUMP_END_WARN
+TST MSG_ID_DHL_CMD_NVRAM
+TST MSG_ID_DHL_CMD_READ_STACK_STATISTICS
+TST MSG_ID_DHL_CMD_QUERY_CTRL_BUF_MONITOR_DATA
+TST MSG_ID_DHL_CMD_QUERY_FLC_BUF_MONITOR_DATA
+TST MSG_ID_DHL_CMD_MSG_BKPT
+TST MSG_ID_DHL_CMD_INJECT_AT_CMD
+TST MSG_ID_DHL_CMD_SWLA_START
+TST MSG_ID_DHL_CMD_SWLA_STOP
+TST MSG_ID_DHL_CMD_SWLA_EMI_MONITOR_MASTER_SELECT
+TST MSG_ID_DHLDBG_MSG_BREAK
+TST MSG_ID_DHL_IND_VIRTUAL_CHANNEL
+TST MSG_ID_DHL_IND_UBDB
+TST MSG_ID_TST_R8_DL_PKT_SINGLE_GPD_IND
+TST MSG_ID_DHL_CMD_ST_START
+TST MSG_ID_DHL_CMD_ST_STOP
+TST MSG_ID_DHL_CMD_ST_STOP_REPORT
+TST MSG_ID_DHL_CMD_ST_QUERY_HEADER
+TST MSG_ID_DHL_IND_ST_QUERY_HEADER_REPORT
+TST MSG_ID_TST_L2COPRO_FILTER_RETRIEVAL
+TST MSG_ID_TST_L2COPRO_FILTER_SAVE
+TST MSG_ID_DHL_CMD_SET_DHL_MUX_FILTER
+TST MSG_ID_DHL_CMD_ENABLE_23G_DSP_LOGGING
+TST MSG_ID_DHL_CMD_DISABLE_23G_DSP_LOGGING
+TST MSG_ID_DHL_CMD_LOOP_BACK_RESPONSE
+TST MSG_ID_DHL_AUTO_MEMORY_DUMP_IN_ILM
+TST MSG_ID_DHL_IND_CUSTOM_READ_MEMORY_REPORT
+UAGPS_CP MSG_ID_L4C_UAGPS_CP_AGPS_ENABLE_DISABLE_REQ
+UAGPS_CP MSG_ID_L4C_UAGPS_CP_AGPS_KEY_UPDATE_REQ
+UAGPS_CP MSG_ID_L4C_UAGPS_CP_AGPS_NEW_KEY_NEEDED_IND
+UAGPS_CP MSG_ID_UAGPS_CP_CSCE_START_SIB15_COLLECTION_REQ
+UAGPS_CP MSG_ID_UAGPS_CP_CSCE_START_SIB15_COLLECTION_CNF
+UAGPS_CP MSG_ID_UAGPS_CP_CSCE_STOP_SIB15_COLLECTION_REQ
+UAGPS_CP MSG_ID_UAGPS_CP_CSCE_STOP_SIB15_COLLECTION_CNF
+UAGPS_CP MSG_ID_UAGPS_CP_CSCE_CELL_CHANGE_IND
+UAGPS_CP MSG_ID_UAGPS_CP_SIBE_SIB15_CHANGE_IND
+UAGPS_CP MSG_ID_UAGPS_CP_MEME_MOVE_TO_STATE_IND
+UAGPS_CP MSG_ID_UAGPS_CP_MEME_POSITIONING_DATA_IND
+UAGPS_CP MSG_ID_UAGPS_CP_MEME_RELEASE_MEASUREMENT_IND
+UAGPS_CP MSG_ID_UAGPS_CP_MEME_POSITIONING_DATA_REQ
+UAGPS_CP MSG_ID_UAGPS_CP_MEME_RELEASE_MEASUREMENT_REQ
+UAGPS_CP MSG_ID_UAGPS_CP_MEME_MEASUREMENT_REPORT_CNF
+UAGPS_CP MSG_ID_UAGPS_CP_CODE_END
+UAS_GAS MSG_ID_UAS_GAS_CONFIG_GCELL_MEAS_REQ
+UAS_GAS MSG_ID_UAS_GAS_CONFIG_GCELL_PRIO_MEAS_REQ
+UAS_GAS MSG_ID_GAS_UAS_CONFIG_UCELL_PRIO_MEAS_CNF
+UAS_GAS MSG_ID_UAS_GAS_EVALUATE_GCELL_REQ
+UAS_GAS MSG_ID_UAS_GAS_ACTIVATE_GCELL_REQ
+UAS_GAS MSG_ID_UAS_GAS_EVALUATE_GCELL_STOP_REQ
+UAS_GAS MSG_ID_UAS_GAS_HANDOVER_GCELL_REQ
+UAS_GAS MSG_ID_UAS_GAS_HO_ACTIVATE_GCELL_REQ
+UAS_GAS MSG_ID_UAS_GAS_ABORT_HO_GCELL_REQ
+UAS_GAS MSG_ID_GAS_UAS_CONFIG_UCELL_MEAS_CNF
+UAS_GAS MSG_ID_GAS_UAS_UCELL_MEAS_IND
+UAS_GAS MSG_ID_GAS_UAS_EVALUATE_UCELL_CNF
+UAS_GAS MSG_ID_GAS_UAS_ACTIVATE_UCELL_CNF
+UAS_GAS MSG_ID_GAS_UAS_EVALUATE_UCELL_STOP_CNF
+UAS_GAS MSG_ID_GAS_UAS_UCELL_CHANGE_COMPLETE_IND
+UAS_GAS MSG_ID_GAS_UAS_HANDOVER_UCELL_CNF
+UAS_GAS MSG_ID_GAS_UAS_HO_ACTIVATE_UCELL_CNF
+UAS_GAS MSG_ID_UAS_GAS_EUTRAN_CAP_UPDATE_IND
+UAS_GAS MSG_ID_GAS_UAS_CELL_RESELECTION_PARAMS_IND
+UAS_GAS MSG_ID_UAS_GAS_CODE_END
+UDPS MSG_ID_UDPS_UMTS_TEST_STOP_REQ
+UDPS MSG_ID_UDPS_UMTS_TEST_STOP2_REQ
+UDPS MSG_ID_UDPS_INITIAL_CELL_SEARCH
+UDPS MSG_ID_UDPS_SFN_READ_SIB_LISTEN
+UDPS MSG_ID_UDPS_PAGING_RESPONSE
+UDPS MSG_ID_UDPS_TARGET_CELL_SEARCH
+UDPS MSG_ID_UDPS_PCH_READING_ON_STTD_CELL
+UDPS MSG_ID_UDPS_PCH_RECEIVE
+UDPS MSG_ID_UDPS_RECURSIVE_TCS_IN_PCH
+UDPS MSG_ID_UDPS_RECURSIVE_ICS_IN_NULL
+UDPS MSG_ID_UDPS_UL1D_CS_TEST
+UDPS MSG_ID_UDPS_RECURSIVE_IPS_IN_NULL
+UDPS MSG_ID_UDPS_PCH_MEASUREMENT_8960
+UDPS MSG_ID_UDPS_CONTINUAL_ICS
+UDPS MSG_ID_UDPS_UL_OPEN_LOOP_PWR_CTRL
+UDPS MSG_ID_UDPS_TX_ON_OFF_TIME_MASK
+UDPS MSG_ID_UDPS_RX_ACK_ON_AICH
+UDPS MSG_ID_UDPS_RX_NO_ACK_ON_AICH
+UDPS MSG_ID_UDPS_RX_NACK_ON_AICH
+UDPS MSG_ID_UDPS_BEST_EFFORT_FOR_PRACH
+UDPS MSG_ID_UDPS_RECURSIVE_TCS_IN_FACH
+UDPS MSG_ID_UDPS_FACH_PERFORMANCE
+UDPS MSG_ID_UDPS_UL_INNER_LOOP_PWR_CTRL
+UDPS MSG_ID_UDPS_OUT_OF_SYNC_HANDLING
+UDPS MSG_ID_UDPS_CHANGE_OF_TFC
+UDPS MSG_ID_UDPS_UL_COMPRESSED_MODE
+UDPS MSG_ID_UDPS_PEF_IN_STATIC_CH
+UDPS MSG_ID_UDPS_PEF_IN_FADING_CH
+UDPS MSG_ID_UDPS_PEF_IN_MOVING_CH
+UDPS MSG_ID_UDPS_PEF_IN_BIRTH_DEATH_CH
+UDPS MSG_ID_UDPS_PEF_IN_TX_DIV_MODE
+UDPS MSG_ID_UDPS_DL_PWR_CTRL_CONST_BLER
+UDPS MSG_ID_UDPS_PEF_IN_DL_COMPRESSED_MODE
+UDPS MSG_ID_UDPS_PEF_OF_BTFD
+UDPS MSG_ID_UDPS_PEF_IN_SHO
+UDPS MSG_ID_UDPS_PEF_OF_TPC_COMBINING
+UDPS MSG_ID_UDPS_PEF_IN_SSDT_PWR_CTRL
+UDPS MSG_ID_UDPS_ACTIVE_SET_UPDATE_DELAY
+UDPS MSG_ID_UDPS_TX_TIMING_IN_SHO
+UDPS MSG_ID_UDPS_INTRA_FREQ_TRHHO_DELAY
+UDPS MSG_ID_UDPS_INTER_FREQ_TRHHO_DELAY
+UDPS MSG_ID_UDPS_RRC_REESTAB_DELAY
+UDPS MSG_ID_UDPS_INTER_FREQ_TMHHO
+UDPS MSG_ID_UDPS_INTER_FREQ_TRHHO_REVERT
+UDPS MSG_ID_UDPS_INTER_FREQ_TMHHO_REVERT
+UDPS MSG_ID_UDPS_ABORT_ENTER_DCH
+UDPS MSG_ID_UDPS_RECURSIVE_TCS_IN_DCH
+UDPS MSG_ID_UDPS_UNKNOWN_SFN_DECODING_IN_DCH
+UDPS MSG_ID_UDPS_TPC_COMBINING_RELIABLE_TEST
+UDPS MSG_ID_UDPS_SIR_MEAS_IN_DCH_WITH_TXTD_CM
+UDPS MSG_ID_UDPS_DLPC_TEST_WIND_UP_DOWN
+UDPS MSG_ID_UDPS_PEF_OF_TRCH_RECONFIG
+UDPS MSG_ID_UDPS_DLPC_FOR_DIFF_TF
+UDPS MSG_ID_UDPS_DLPC_FOR_BTFD_DUAL_TF
+UDPS MSG_ID_UDPS_DLPC_FOR_TFCI_DUAL_TF
+UDPS MSG_ID_UDPS_DLPC_TEST_INITIAL_CONVERGENCE
+UDPS MSG_ID_UDPS_ULPC_FOR_TX_AGC_TEST
+UDPS MSG_ID_UDPS_BER_TEST_IN_DCH_MODE
+UDPS MSG_ID_UDPS_SADCH_TTI_EIGHTY
+UDPS MSG_ID_UDPS_SADCH_TTI_EIGHTY_WITH_CM
+UDPS MSG_ID_UDPS_AUTO_RECONFIG
+UDPS MSG_ID_UDPS_DCH_FACH_TRANSIT
+UDPS MSG_ID_UDPS_DPAS_SL1
+UDPS MSG_ID_UDPS_DPAS_SL2
+UDPS MSG_ID_UDPS_DPAS_SL3
+UDPS MSG_ID_UDPS_DPAS_SL4
+UDPS MSG_ID_UDPS_DPAS_SL5
+UDPS MSG_ID_UDPS_DPAS_SL6
+UDPS MSG_ID_UDPS_DPAS_SL7
+UDPS MSG_ID_UDPS_DPAS_SL8
+UDPS MSG_ID_UDPS_DPAS_SL9
+UDPS MSG_ID_UDPS_DPAS_SL10
+UDPS MSG_ID_UDPS_DPAS_SL11
+UDPS MSG_ID_UDPS_DPAS_SL12
+UDPS MSG_ID_UDPS_DPAS_SL13
+UDPS MSG_ID_UDPS_DPAS_FDD_TEST_SL1
+UDPS MSG_ID_UDPS_DPAS_FDD_TEST_SL2
+UDPS MSG_ID_UDPS_DPAS_CC1
+UDPS MSG_ID_UDPS_DPAS_CC2
+UDPS MSG_ID_UDPS_DPAS_CC3
+UDPS MSG_ID_UDPS_DPAS_CC4
+UDPS MSG_ID_UDPS_DPAS_CC5
+UDPS MSG_ID_UDPS_DPAS_CC6
+UDPS MSG_ID_UDPS_DPAS_TGPS1
+UDPS MSG_ID_UDPS_DPAS_TGPS2
+UDPS MSG_ID_UDPS_DPAS_MEAS1
+UDPS MSG_ID_UDPS_DPAS_MEAS2
+UDPS MSG_ID_UDPS_DPAS_MEAS3
+UDPS MSG_ID_UDPS_DPAS_OCIC1
+UDPS MSG_ID_UDPS_DPAS_OCIC2
+UDPS MSG_ID_UDPS_DPAS02_OCIC
+UDPS MSG_ID_UDPS_DPAS08_1
+UDPS MSG_ID_UDPS_DPAF01
+UDPS MSG_ID_UDPS_DPAF02
+UDPS MSG_ID_UDPS_DPAF03
+UDPS MSG_ID_UDPS_DPAF04
+UDPS MSG_ID_UDPS_DPAF07
+UDPS MSG_ID_UDPS_DPAF08
+UDPS MSG_ID_UDPS_DPAF09
+UDPS MSG_ID_UDPS_DPAF10
+UDPS MSG_ID_UDPS_DPAF11
+UDPS MSG_ID_UDPS_DPAF11_1
+UDPS MSG_ID_UDPS_DPAF12
+UDPS MSG_ID_UDPS_DPAF13
+UDPS MSG_ID_UDPS_DPAF14
+UDPS MSG_ID_UDPS_DPAF15
+UDPS MSG_ID_UDPS_R6_CN01_1
+UDPS MSG_ID_UDPS_R6_CN01_2
+UDPS MSG_ID_UDPS_R6_CN02_1
+UDPS MSG_ID_UDPS_R6_CN02_2
+UDPS MSG_ID_UDPS_R6_CN03_1
+UDPS MSG_ID_UDPS_R6_CN03_2
+UDPS MSG_ID_UDPS_R6_CN04_1
+UDPS MSG_ID_UDPS_R6_CN04_2
+UDPS MSG_ID_UDPS_R6_CN05_1
+UDPS MSG_ID_UDPS_R6_CN05_2
+UDPS MSG_ID_UDPS_R6_CN06_1
+UDPS MSG_ID_UDPS_R6_CN06_2
+UDPS MSG_ID_UDPS_R6_CN07_1
+UDPS MSG_ID_UDPS_R6_CN07_2
+UDPS MSG_ID_UDPS_R6_CN08_1
+UDPS MSG_ID_UDPS_R6_CN08_2
+UDPS MSG_ID_UDPS_R6_CN09_1
+UDPS MSG_ID_UDPS_R6_CN09_2
+UDPS MSG_ID_UDPS_R6_CN10_1
+UDPS MSG_ID_UDPS_R6_CN10_2
+UDPS MSG_ID_UDPS_R6_CN11_1
+UDPS MSG_ID_UDPS_R6_CN11_2
+UDPS MSG_ID_UDPS_R6_CN12_1
+UDPS MSG_ID_UDPS_R6_CN12_2
+UDPS MSG_ID_UDPS_R6_CN13_1
+UDPS MSG_ID_UDPS_R6_CN13_2
+UDPS MSG_ID_UDPS_R6_CN14_1
+UDPS MSG_ID_UDPS_R6_CN14_2
+UDPS MSG_ID_UDPS_R6_CN15_1
+UDPS MSG_ID_UDPS_R6_CN15_2
+UDPS MSG_ID_UDPS_R6_CN16
+UDPS MSG_ID_UDPS_R6_CN17_1
+UDPS MSG_ID_UDPS_R6_CN17_2
+UDPS MSG_ID_UDPS_R6_CN18_1
+UDPS MSG_ID_UDPS_R6_CN18_2
+UDPS MSG_ID_UDPS_R6_CN19_1
+UDPS MSG_ID_UDPS_R6_CN19_2
+UDPS MSG_ID_UDPS_R6_CN20
+UDPS MSG_ID_UDPS_R6_CN21
+UDPS MSG_ID_UDPS_R6_CN22
+UDPS MSG_ID_UDPS_R6_CN90_1
+UDPS MSG_ID_UDPS_R6_CN90_2
+UDPS MSG_ID_UDPS_R6_CN91_1
+UDPS MSG_ID_UDPS_R6_CN91_2
+UDPS MSG_ID_UDPS_R6_PW01_1
+UDPS MSG_ID_UDPS_R6_PW01_2
+UDPS MSG_ID_UDPS_R6_PW02
+UDPS MSG_ID_UDPS_R6_PW03
+UDPS MSG_ID_UDPS_R6_PW04
+UDPS MSG_ID_UDPS_R6_PW05
+UDPS MSG_ID_UDPS_R6_PW06_1
+UDPS MSG_ID_UDPS_R6_PW06_2
+UDPS MSG_ID_UDPS_R6_PW06_3
+UDPS MSG_ID_UDPS_R6_PW07_1
+UDPS MSG_ID_UDPS_R6_PW07_2
+UDPS MSG_ID_UDPS_R6_PW07_3
+UDPS MSG_ID_UDPS_R6_PW08_1
+UDPS MSG_ID_UDPS_R6_PW08_2
+UDPS MSG_ID_UDPS_R6_PW08_3
+UDPS MSG_ID_UDPS_R6_CM01_1
+UDPS MSG_ID_UDPS_R6_CM01_2
+UDPS MSG_ID_UDPS_R6_CM02_1
+UDPS MSG_ID_UDPS_R6_CM02_2
+UDPS MSG_ID_UDPS_R6_CM03_1
+UDPS MSG_ID_UDPS_R6_CM03_2
+UDPS MSG_ID_UDPS_R6_CM04
+UDPS MSG_ID_UDPS_R6_CM05_1
+UDPS MSG_ID_UDPS_R6_CM05_2
+UDPS MSG_ID_UDPS_R6_HI01_1
+UDPS MSG_ID_UDPS_R6_HI01_2
+UDPS MSG_ID_UDPS_R6_HI02_1
+UDPS MSG_ID_UDPS_R6_HI02_2
+UDPS MSG_ID_UDPS_R6_HI03_1
+UDPS MSG_ID_UDPS_R6_HI03_2
+UDPS MSG_ID_UDPS_R6_HI04_1
+UDPS MSG_ID_UDPS_R6_HI04_2
+UDPS MSG_ID_UDPS_R6_RG01_1
+UDPS MSG_ID_UDPS_R6_RG01_2
+UDPS MSG_ID_UDPS_R6_RG02
+UDPS MSG_ID_UDPS_R6_RG03_1
+UDPS MSG_ID_UDPS_R6_RG03_2
+UDPS MSG_ID_UDPS_R6_RG04_1
+UDPS MSG_ID_UDPS_R6_RG04_2
+UDPS MSG_ID_UDPS_R6_AG01_1
+UDPS MSG_ID_UDPS_R6_AG01_2
+UDPS MSG_ID_UDPS_R6_AG02_1
+UDPS MSG_ID_UDPS_R6_AG02_2
+UDPS MSG_ID_UDPS_R6_AG03_1
+UDPS MSG_ID_UDPS_R6_AG03_2
+UDPS MSG_ID_UDPS_R6_TF01_1
+UDPS MSG_ID_UDPS_R6_TF01_2
+UDPS MSG_ID_UDPS_R6_TF02_1
+UDPS MSG_ID_UDPS_R6_TF02_2
+UDPS MSG_ID_UDPS_R6_CD01_1
+UDPS MSG_ID_UDPS_R6_CSD_HI01_1
+UDPS MSG_ID_UDPS_R6_CSD_HI01_2
+UDPS MSG_ID_UDPS_R6_CSD_HI02_1
+UDPS MSG_ID_UDPS_R6_CSD_HI02_2
+UDPS MSG_ID_UDPS_R6_CSD_HI03_1
+UDPS MSG_ID_UDPS_R6_CSD_HI03_2
+UDPS MSG_ID_UDPS_R6_CSD_HI04_1
+UDPS MSG_ID_UDPS_R6_CSD_HI04_2
+UDPS MSG_ID_UDPS_R6_CSD_RG01_1
+UDPS MSG_ID_UDPS_R6_CSD_RG01_2
+UDPS MSG_ID_UDPS_R6_CSD_RG02
+UDPS MSG_ID_UDPS_R6_CSD_RG03_1
+UDPS MSG_ID_UDPS_R6_CSD_RG03_2
+UDPS MSG_ID_UDPS_R6_CSD_RG04_1
+UDPS MSG_ID_UDPS_R6_CSD_RG04_2
+UDPS MSG_ID_UDPS_R6_CSD_AG01_1
+UDPS MSG_ID_UDPS_R6_CSD_AG01_2
+UDPS MSG_ID_UDPS_R6_CSD_AG02_1
+UDPS MSG_ID_UDPS_R6_CSD_AG02_2
+UDPS MSG_ID_UDPS_R6_CSD_PW02
+UDPS MSG_ID_UDPS_R6_CSD_PW03
+UDPS MSG_ID_UDPS_R6_AGL01_1
+UDPS MSG_ID_UDPS_R6_AGL01_2
+UDPS MSG_ID_UDPS_R6_AGL02_1
+UDPS MSG_ID_UDPS_R6_AGL02_2
+UDPS MSG_ID_UDPS_R6_AGL_HI01_1_ACK
+UDPS MSG_ID_UDPS_R6_AGL_HI01_1_FALSE_ACK
+UDPS MSG_ID_UDPS_R6_AGL_HI01_2_ACK
+UDPS MSG_ID_UDPS_R6_AGL_HI01_2_FALSE_ACK
+UDPS MSG_ID_UDPS_R6_AGL_AG01_1
+UDPS MSG_ID_UDPS_R6_AGL_AG01_2
+UDPS MSG_ID_UDPS_R6_ME01_1
+UDPS MSG_ID_UDPS_R6_ME01_2
+UDPS MSG_ID_UDPS_R6_ME02_1
+UDPS MSG_ID_UDPS_R6_ME02_2
+UDPS MSG_ID_UDPS_R6_ME02_3
+UDPS MSG_ID_UDPS_R6_ME03_1
+UDPS MSG_ID_UDPS_R6_ME03_2
+UDPS MSG_ID_UDPS_R6_ME03_3
+UDPS MSG_ID_UDPS_R7_HSDPA_01
+UDPS MSG_ID_UDPS_R7_HSDPA_02
+UDPS MSG_ID_UDPS_R7_HSDPA_03
+UDPS MSG_ID_UDPS_R7_HSDPA_04
+UDPS MSG_ID_UDPS_R7_HSDPA_05
+UDPS MSG_ID_UDPS_R7_HSDPA_06
+UDPS MSG_ID_UDPS_R7_HSDPA_07
+UDPS MSG_ID_UDPS_R7_HSDPA_08
+UDPS MSG_ID_UDPS_R7_CPC_01
+UDPS MSG_ID_UDPS_R7_CPC_02
+UDPS MSG_ID_UDPS_R7_CPC_03
+UDPS MSG_ID_UDPS_R7_CPC_04
+UDPS MSG_ID_UDPS_R7_CPC_05
+UDPS MSG_ID_UDPS_R7_CPC_06
+UDPS MSG_ID_UDPS_R7_CPC_07
+UDPS MSG_ID_UDPS_R7_CPC_08
+UDPS MSG_ID_UDPS_R7_CPC_09
+UDPS MSG_ID_UDPS_R7_CPC_10
+UDPS MSG_ID_UDPS_R7_CPC_11
+UDPS MSG_ID_UDPS_R7_CPC_12
+UDPS MSG_ID_UDPS_R7_CPC_13
+UDPS MSG_ID_UDPS_R7_CPC_14
+UDPS MSG_ID_UDPS_R7_CPC_15
+UDPS MSG_ID_UDPS_R7_CPC_16
+UDPS MSG_ID_UDPS_R7_FDPCH_01
+UDPS MSG_ID_UDPS_R7_FDPCH_02
+UDPS MSG_ID_UDPS_R7_FDPCH_03
+UDPS MSG_ID_UDPS_R7_FDPCH_04
+UDPS MSG_ID_UDPS_R7_FDPCH_05
+UDPS MSG_ID_UDPS_R7_EFACH_01
+UDPS MSG_ID_UDPS_R7_EFACH_02
+UDPS MSG_ID_UDPS_R7_EFACH_03
+UDPS MSG_ID_UDPS_R7_EFACH_04
+UDPS MSG_ID_UDPS_R7_EFACH_05
+UDPS MSG_ID_UDPS_R7_EFACH_06
+UDPS MSG_ID_UDPS_R7_EFACH_07
+UDPS MSG_ID_UDPS_R7_TF01_1
+UDPS MSG_ID_UDPS_R7_TF01_2
+UDPS MSG_ID_UDPS_R7_F01
+UDPS MSG_ID_UDPS_R7_F02
+UDPS MSG_ID_UDPS_R7_F03
+UDPS MSG_ID_UDPS_R7_F04
+UDPS MSG_ID_UDPS_R7_F05
+UDPS MSG_ID_UDPS_R7_F06
+UDPS MSG_ID_UDPS_R7_F07
+UDPS MSG_ID_UDPS_R7_F08
+UDPS MSG_ID_UDPS_R7_F09
+UDPS MSG_ID_UDPS_R8_F01
+UDPS MSG_ID_UDPS_R8_F02
+UDPS MSG_ID_UDPS_R8_F03
+UDPS MSG_ID_UDPS_R8_F04
+UDPS MSG_ID_UDPS_R8_F05
+UDPS MSG_ID_UDPS_R8_F06
+UDPS MSG_ID_UDPS_R8_DCHSDPA_01
+UDPS MSG_ID_UDPS_R8_DCHSDPA_02
+UDPS MSG_ID_UDPS_R8_DCHSDPA_03
+UDPS MSG_ID_UDPS_R8_DCHSDPA_04
+UDPS MSG_ID_UDPS_R8_DCHSDPA_05
+UDPS MSG_ID_UDPS_R8_DCHSDPA_06
+UDPS MSG_ID_UDPS_R8_DCHSDPA_07
+UDPS MSG_ID_UDPS_R8_DCHSDPA_08
+UDPS MSG_ID_UDPS_R8_DCHSDPA_09
+UDPS MSG_ID_UDPS_R8_DCHSDPA_10
+UDPS MSG_ID_UDPS_R8_DCHSDPA_11
+UDPS MSG_ID_UDPS_R8_DCHSDPA_12
+UDPS MSG_ID_UDPS_R8_DCHSDPA_13
+UDPS MSG_ID_UDPS_R8_DCHSDPA_14
+UDPS MSG_ID_UDPS_R8_DCHSDPA_15
+UDPS MSG_ID_UDPS_R8_LESSMODE_01
+UDPS MSG_ID_UDPS_R8_LESSMODE_02
+UDPS MSG_ID_UDPS_R8_LESSMODE_03
+UDPS MSG_ID_UDPS_R8_LESSMODE_04
+UDPS MSG_ID_UDPS_R8_LESSMODE_05
+UDPS MSG_ID_UDPS_R8_CEDCH_01
+UDPS MSG_ID_UDPS_R8_CEDCH_02
+UDPS MSG_ID_UDPS_R8_CEDCH_03
+UDPS MSG_ID_UDPS_R8_CEDCH_04
+UDPS MSG_ID_UDPS_R8_CEDCH_05
+UDPS MSG_ID_UDPS_R8_CEDCH_06
+UDPS MSG_ID_UDPS_R8_CEDCH_07
+UDPS MSG_ID_UDPS_R8_FACHDRX_01
+UDPS MSG_ID_UDPS_R8_FACHDRX_02
+UDPS MSG_ID_UDPS_R8_FACHDRX_03
+UDPS MSG_ID_UDPS_R8_M01
+UDPS MSG_ID_UDPS_R8_M02
+UDPS MSG_ID_UDPS_R8_M03
+UDPS MSG_ID_UDPS_R8_M04
+UDPS MSG_ID_UDPS_R8_M05
+UDPS MSG_ID_UDPS_R8_M06
+UDPS MSG_ID_UDPS_R8_M07
+UDPS MSG_ID_UDPS_R8_M08
+UDPS MSG_ID_UDPS_R8_M09
+UDPS MSG_ID_UDPS_R8_M10
+UDPS MSG_ID_UDPS_R8_MCPC1_01
+UDPS MSG_ID_UDPS_R8_MCPC1_02
+UDPS MSG_ID_UDPS_R8_MCPC2_01
+UDPS MSG_ID_UDPS_R8_MCPC2_02
+UDPS MSG_ID_UDPS_R8_CRS1
+UDPS MSG_ID_UDPS_R8_CRS2
+UDPS MSG_ID_UDPS_INTER_FREQ_CRS_IN_IDLE
+UDPS MSG_ID_UDPS_INTRA_FREQ_CRS_IN_FACH
+UDPS MSG_ID_UDPS_INTER_FREQ_CRS_IN_FACH
+UDPS MSG_ID_UDPS_INTRA_FREQ_REPORTING_DELAY
+UDPS MSG_ID_UDPS_INTRA_FREQ_REPORTING_DELAY_IN_FADING
+UDPS MSG_ID_UDPS_INTER_FREQ_REPORTING_DELAY
+UDPS MSG_ID_UDPS_ABS_INTRA_FREQ_CPICH_RSCP
+UDPS MSG_ID_UDPS_REL_INTRA_FREQ_CPICH_RSCP
+UDPS MSG_ID_UDPS_REL_INTER_FREQ_CPICH_RSCP
+UDPS MSG_ID_UDPS_ABS_INTRA_FREQ_CPICH_ECIO
+UDPS MSG_ID_UDPS_REL_INTRA_FREQ_CPICH_ECIO
+UDPS MSG_ID_UDPS_REL_INTER_FREQ_CPICH_ECIO
+UDPS MSG_ID_UDPS_ABS_UTRA_CARRIER_RSSI
+UDPS MSG_ID_UDPS_REL_UTRA_CARRIER_RSSI
+UDPS MSG_ID_UDPS_INTRA_FREQ_SFN_CFN_DIFF
+UDPS MSG_ID_UDPS_INTER_FREQ_SFN_CFN_DIFF
+UDPS MSG_ID_UDPS_SFN_SFN_DIFF_TYPE1
+UDPS MSG_ID_UDPS_UE_TX_POWER
+UDPS MSG_ID_UDPS_ALL_MEAS_STATISTIC
+UDPS MSG_ID_UDPS_GSM_MEAS_IN_NULL
+UDPS MSG_ID_UDPS_GSM_MEAS_IN_IDLE
+UDPS MSG_ID_UDPS_GSM_MEAS_IN_FACH
+UDPS MSG_ID_UDPS_GSM_REPORTING_DELAY
+UDPS MSG_ID_UDPS_GSM_REPORTING_DELAY_NO_BSIC
+UDPS MSG_ID_UDPS_ABS_GSM_CARRIER_RSSI
+UDPS MSG_ID_UDPS_WCDMA_MEAS_IN_SCAN
+UDPS MSG_ID_UDPS_WCDMA_MEAS_IN_IDLE
+UDPS MSG_ID_UDPS_WCDMA_MEAS_IN_DEDI
+UDPS MSG_ID_UDPS_WCDMA_MEAS_IN_PIDLE
+UDPS MSG_ID_UDPS_WCDMA_MEAS_IN_PTX
+UDPS MSG_ID_UDPS_RECURSIVE_TCS_IN_2G_IDLE
+UDPS MSG_ID_UDPS_RECURSIVE_TCS_IN_2G_DEDI
+UDPS MSG_ID_UDPS_GSM_CRS_TO_UMTS
+UDPS MSG_ID_UDPS_UMTS_CRS_TO_GSM
+UDPS MSG_ID_UDPS_GSM_HHO_TO_UMTS
+UDPS MSG_ID_UDPS_UMTS_HHO_TO_GSM
+UDPS MSG_ID_CPHY_UL_DPCH_CB
+UDPS MSG_ID_UL1D_LOOPBACK_REQ
+UDPS MSG_ID_UL1D_LOOPBACK_RESULT_IND
+UDPS MSG_ID_UL1D_DL_TPC_RESULT_IND
+UDPS MSG_ID_UDPS_EVENT_3B_TRIGGERED
+UDPS MSG_ID_UDPS_EVENT_3C_TRIGGERED
+UDPS MSG_ID_UDPS_ABORT_SUCCESS
+UDPS MSG_ID_UDPS_START_RUN_L1S_CASE
+UEM MSG_ID_DRVUEM_AUDIO_PLAY_FINISH_IND
+UEM MSG_ID_DRVUEM_KEYPAD_IND
+UEM MSG_ID_DRVUEM_POWER_ON_IND
+UEM MSG_ID_DRVUEM_PMIC_IND
+UEM MSG_ID_DRVUEM_GPIO_DETECT_IND
+UEM MSG_ID_DRVUEM_RTC_PERIOD_IND
+UEM MSG_ID_DRVUEM_USBDETECT_IND
+UEM MSG_ID_DRVUEM_CCCI_EM_REQ_IND
+UEM MSG_ID_L4CUEM_AUDIO_PLAY_BY_NAME_REQ
+UEM MSG_ID_L4CUEM_AUDIO_STOP_BY_NAME_REQ
+UEM MSG_ID_L4CUEM_AUDIO_PLAY_BY_STRING_REQ
+UEM MSG_ID_L4CUEM_AUDIO_STOP_BY_STRING_REQ
+UEM MSG_ID_L4CUEM_STARTUP_REQ
+UEM MSG_ID_L4CUEM_SET_AUDIO_PROFILE_REQ
+UEM MSG_ID_L4CUEM_SET_AUDIO_PARAM_REQ
+UEM MSG_ID_L4CUEM_SET_HW_LEVEL_REQ
+UEM MSG_ID_UEM_CODE_END
+UL1 MSG_ID_UL1_MSG_CODE_REQ_BEGIN
+UL1 MSG_ID_CPHY_BCH_RELEASE_REQ
+UL1 MSG_ID_CPHY_BCH_MODIFY_REQ
+UL1 MSG_ID_CPHY_BCH_SETUP_REQ
+UL1 MSG_ID_CPHY_PCH_RELEASE_REQ
+UL1 MSG_ID_CPHY_PCH_SETUP_REQ
+UL1 MSG_ID_CPHY_PCH_MODIFY_REQ
+UL1 MSG_ID_CPHY_FACH_RELEASE_REQ
+UL1 MSG_ID_CPHY_FACH_SETUP_REQ
+UL1 MSG_ID_CPHY_FACH_MODIFY_REQ
+UL1 MSG_ID_CPHY_RACH_RELEASE_REQ
+UL1 MSG_ID_CPHY_RACH_SETUP_REQ
+UL1 MSG_ID_CPHY_DCH_RELEASE_REQ
+UL1 MSG_ID_CPHY_DCH_SETUP_REQ
+UL1 MSG_ID_CPHY_DCH_MODIFY_REQ
+UL1 MSG_ID_CPHY_HSDSCH_RELEASE_REQ
+UL1 MSG_ID_CPHY_HSDSCH_SETUP_REQ
+UL1 MSG_ID_CPHY_HSDSCH_MODIFY_REQ
+UL1 MSG_ID_CPHY_EDCH_RELEASE_REQ
+UL1 MSG_ID_CPHY_EDCH_SETUP_REQ
+UL1 MSG_ID_CPHY_EDCH_MODIFY_REQ
+UL1 MSG_ID_CPHY_CPC_CONFIG_REQ
+UL1 MSG_ID_PHY_MAC_EHS_RESET_REQ
+UL1 MSG_ID_CPHY_TGPS_DELETE_REQ
+UL1 MSG_ID_CPHY_TGPS_OVERLAP_RESUME_REPORTING_REQ
+UL1 MSG_ID_CPHY_FREQUENCY_SCAN_REQ
+UL1 MSG_ID_CPHY_FREQUENCY_SCAN_CONTINUE_REQ
+UL1 MSG_ID_CPHY_FREQUENCY_SCAN_SUSPEND_REQ
+UL1 MSG_ID_CPHY_FREQUENCY_SCAN_STOP_REQ
+UL1 MSG_ID_CPHY_RSSI_SNIFFER_START_REQ
+UL1 MSG_ID_CPHY_RSSI_SNIFFER_STOP_REQ
+UL1 MSG_ID_CPHY_MEASUREMENT_CONFIG_TGPS_REQ
+UL1 MSG_ID_CPHY_MEASUREMENT_CONFIG_FMO_REQ
+UL1 MSG_ID_CPHY_MEASUREMENT_CONFIG_CELL_REQ
+UL1 MSG_ID_CPHY_MEASUREMENT_CONFIG_RSSI_EVENT_REQ
+UL1 MSG_ID_CPHY_TRESELECTION_START_REQ
+UL1 MSG_ID_CPHY_MEASUREMENT_CONFIG_TX_POWER_REQ
+UL1 MSG_ID_CPHY_MEASUREMENT_CONFIG_TX_POWER_STOP_REQ
+UL1 MSG_ID_CPHY_TX_POWER_RESULT_REQ
+UL1 MSG_ID_CPHY_SPECIFIC_CELL_SEARCH_REQ
+UL1 MSG_ID_CPHY_SPECIFIC_CELL_SEARCH_STOP_REQ
+UL1 MSG_ID_CPHY_RESET_REQ
+UL1 MSG_ID_CPHY_RF_ON_REQ
+UL1 MSG_ID_CPHY_RF_OFF_REQ
+UL1 MSG_ID_CPHY_SET_ACTIVE_RAT_REQ
+UL1 MSG_ID_CPHY_MSG_CONTAINER_REQ
+UL1 MSG_ID_CPHY_ABORT_REQ
+UL1 MSG_ID_WAKEUP_3G_REQ
+UL1 MSG_ID_WAKEUP_3G_LOCK_REQ
+UL1 MSG_ID_WAKEUP_3G_UNLOCK_REQ
+UL1 MSG_ID_CPHY_START_MONITOR_ORDER_REQ
+UL1 MSG_ID_CPHY_STOP_MONITOR_ORDER_REQ
+UL1 MSG_ID_USER_WAKEUP_3G_HANDLE_REQ
+UL1 MSG_ID_USER_WAKEUP_3G_LOCK_REQ
+UL1 MSG_ID_USER_WAKEUP_3G_UNLOCK_REQ
+UL1 MSG_ID_PHY_RACH_DATA_REQ
+UL1 MSG_ID_PHY_ACCESS_REQ
+UL1 MSG_ID_PHY_CEDCH_TERMINATION_REQ
+UL1 MSG_ID_RSVAS_UL1_SUSPEND_REQ
+UL1 MSG_ID_RSVAS_UL1_RESUME_REQ
+UL1 MSG_ID_RSVAS_UL1_VIRTUAL_RESUME_REQ
+UL1 MSG_ID_URR_UL1_SWITCH_GEMINI_MODE_REQ
+UL1 MSG_ID_CPHY_PEER_GEMINI_MODE_NOTIFY_REQ
+UL1 MSG_ID_CPHY_CHANNEL_PRIORITY_ADJUSTMENT_REQ
+UL1 MSG_ID_UL1_GPS_TIME_SYNC_REQ
+UL1 MSG_ID_CPHY_OUT_OF_SERVICE_REQ
+UL1 MSG_ID_CPHY_RLC_INFO_REQ
+UL1 MSG_ID_CPHY_AUTO_GAP_ON_REQ
+UL1 MSG_ID_CPHY_AUTO_GAP_ON_CNF
+UL1 MSG_ID_CPHY_AUTO_GAP_OFF_REQ
+UL1 MSG_ID_CPHY_AUTO_GAP_OFF_CNF
+UL1 MSG_ID_UL1_MSG_CODE_REQ_END
+UL1 MSG_ID_UL1C_UL1A_UREPORT
+UL1 MSG_ID_UL1D_UL1C_UREPORT
+UL1 MSG_ID_CPHY_BCH_SETUP_CNF
+UL1 MSG_ID_CPHY_BCH_SETUP_IND
+UL1 MSG_ID_CPHY_BCH_MODIFY_CNF
+UL1 MSG_ID_CPHY_BCH_MODIFY_IND
+UL1 MSG_ID_CPHY_BCH_RELEASE_CNF
+UL1 MSG_ID_CPHY_BCH_RELEASE_IND
+UL1 MSG_ID_CPHY_SFN_IND
+UL1 MSG_ID_CPHY_TGPS_OVERLAP_IND
+UL1 MSG_ID_CPHY_GAP_COMPLETE_IND
+UL1 MSG_ID_CPHY_T312_EXPIRY_IND
+UL1 MSG_ID_CPHY_DL_INIT_SYNC_IND
+UL1 MSG_ID_CPHY_RL_FAILURE_IND
+UL1 MSG_ID_CPHY_TGPS_DELETE_IND
+UL1 MSG_ID_CPHY_FREQUENCY_SCAN_CNF
+UL1 MSG_ID_CPHY_FREQUENCY_SCAN_IND
+UL1 MSG_ID_CPHY_FREQUENCY_SCAN_CONTINUE_CNF
+UL1 MSG_ID_CPHY_FREQUENCY_SCAN_SUSPEND_CNF
+UL1 MSG_ID_CPHY_FREQUENCY_SCAN_SUSPEND_IND
+UL1 MSG_ID_CPHY_FREQUENCY_SCAN_STOP_CNF
+UL1 MSG_ID_CPHY_FREQUENCY_SCAN_STOP_IND
+UL1 MSG_ID_CPHY_RSSI_SNIFFER_START_CNF
+UL1 MSG_ID_CPHY_RSSI_SNIFFER_STOP_CNF
+UL1 MSG_ID_CPHY_RSSI_SNIFFER_STOP_IND
+UL1 MSG_ID_CPHY_RSSI_SNIFFER_SIGNAL_APPEAR_IND
+UL1 MSG_ID_CPHY_MEASUREMENT_CONFIG_TGPS_CNF
+UL1 MSG_ID_CPHY_MEASUREMENT_CONFIG_TGPS_IND
+UL1 MSG_ID_CPHY_MEASUREMENT_CONFIG_FMO_CNF
+UL1 MSG_ID_CPHY_MEASUREMENT_CONFIG_CELL_CNF
+UL1 MSG_ID_CPHY_MEASUREMENT_CELL_IND
+UL1 MSG_ID_CPHY_MEASUREMENT_CELL_SFN_IND
+UL1 MSG_ID_CPHY_RSSI_EXCEED_RANGE_IND
+UL1 MSG_ID_CPHY_MEASUREMENT_RL_IND
+UL1 MSG_ID_CPHY_MEASUREMENT_CONFIG_TX_POWER_CNF
+UL1 MSG_ID_CPHY_MEASUREMENT_TX_POWER_PERIODIC_IND
+UL1 MSG_ID_CPHY_MEASUREMENT_TX_POWER_EVENT_IND
+UL1 MSG_ID_CPHY_TX_POWER_RESULT_IND
+UL1 MSG_ID_CPHY_SPECIFIC_CELL_SEARCH_IND
+UL1 MSG_ID_CPHY_SPECIFIC_CELL_SEARCH_STOP_IND
+UL1 MSG_ID_CPHY_RESET_CNF
+UL1 MSG_ID_CPHY_RF_ON_CNF
+UL1 MSG_ID_CPHY_RF_OFF_CNF
+UL1 MSG_ID_CPHY_SET_ACTIVE_RAT_CNF
+UL1 MSG_ID_CPHY_ASU_SUCCESS_IND
+UL1 MSG_ID_CPHY_MSG_CONTAINER_CNF
+UL1 MSG_ID_CPHY_MSG_CONTAINER_IND
+UL1 MSG_ID_CPHY_ABORT_CNF
+UL1 MSG_ID_CPHY_TX_STATUS_IND
+UL1 MSG_ID_CPHY_MONITOR_ORDER_RECEIVED_IND
+UL1 MSG_ID_CPHY_START_MONITOR_ORDER_CNF
+UL1 MSG_ID_CPHY_STOP_MONITOR_ORDER_CNF
+UL1 MSG_ID_PHY_PCH_SETUP_IND
+UL1 MSG_ID_PHY_PCH_MODIFY_IND
+UL1 MSG_ID_PHY_PCH_RELEASE_IND
+UL1 MSG_ID_PHY_FACH_SETUP_IND
+UL1 MSG_ID_PHY_FACH_MODIFY_IND
+UL1 MSG_ID_PHY_FACH_RELEASE_IND
+UL1 MSG_ID_PHY_RACH_SETUP_IND
+UL1 MSG_ID_PHY_RACH_RELEASE_IND
+UL1 MSG_ID_PHY_DCH_SETUP_IND
+UL1 MSG_ID_PHY_DCH_MODIFY_IND
+UL1 MSG_ID_PHY_DCH_RELEASE_IND
+UL1 MSG_ID_PHY_CONFIG_ABORT_IND
+UL1 MSG_ID_PHY_CONFIG_FAIL_IND
+UL1 MSG_ID_PHY_DL_INIT_SYNC_IND
+UL1 MSG_ID_PHY_BCH_DATA_IND
+UL1 MSG_ID_PHY_DATA_IND
+UL1 MSG_ID_PHY_ACCESS_IND
+UL1 MSG_ID_PHY_POST_TX_IND
+UL1 MSG_ID_PHY_END_DCH_TX_IND
+UL1 MSG_ID_PHY_HSDSCH_DATA_IND
+UL1 MSG_ID_PHY_END_EDCH_TX_IND
+UL1 MSG_ID_PHY_CEDCH_SETUP_IND
+UL1 MSG_ID_PHY_CEDCH_MODIFY_IND
+UL1 MSG_ID_PHY_CEDCH_RELEASE_IND
+UL1 MSG_ID_PHY_CEDCH_TERMINATION_IND
+UL1 MSG_ID_L4CUL1_EM_TST_CONTROL_REQ
+UL1 MSG_ID_L4CUL1_EM_TST_CONTROL_CNF
+UL1 MSG_ID_UL1_SLT_TASK_INIT_IND
+UL1 MSG_ID_PHY_SIMULATE_DCH_UL_CCTRCH_TASK
+UL1 MSG_ID_PHY_SIMULATE_DCH_UL_CCTRCH_HISR
+UL1 MSG_ID_PHY_SIMULATE_DCH_UL_CCTRCH_HISR_RSP
+UL1 MSG_ID_PHY_SIMULATE_DCH_UL_CCTRCH_LISR
+UL1 MSG_ID_PHY_SIMULATE_DCH_UL_CCTRCH_LISR_RSP
+UL1 MSG_ID_PHY_SIMULATE_DCH_UL_CALLBACK_CCTRCH
+UL1 MSG_ID_PHY_SIMULATE_DCH_UL_CALLBACK_CCTRCH_RSP
+UL1 MSG_ID_PHY_SIMULATE_DCH_UL_CALLBACK_POWER
+UL1 MSG_ID_PHY_SIMULATE_END_DCH_TX_IND
+UL1 MSG_ID_PHY_SIMULATE_UMAC_E_DCH_TICK_1
+UL1 MSG_ID_PHY_SIMULATE_UMAC_E_DCH_TICK_1_RSP
+UL1 MSG_ID_PHY_SIMULATE_UMAC_E_DCH_TICK_2_PARAM_SETUP
+UL1 MSG_ID_PHY_SIMULATE_UMAC_E_DCH_TICK_2
+UL1 MSG_ID_PHY_SIMULATE_UMAC_E_DCH_TICK_2_RSP
+UL1 MSG_ID_PHY_SIMULATE_UMAC_E_DCH_TICK_3
+UL1 MSG_ID_PHY_SIMULATE_UMAC_E_DCH_TICK_3_RSP
+UL1 MSG_ID_PHY_SIMULATE_UMAC_E_DCH_TICK_4
+UL1 MSG_ID_PHY_SIMULATE_UMAC_E_DCH_TICK_4_RSP
+UL1 MSG_ID_PHY_SIMULATE_UMAC_E_DCH_TICK_5
+UL1 MSG_ID_PHY_SIMULATE_UMAC_E_DCH_TICK_5_RSP
+UL1 MSG_ID_PHY_SIMULATE_INVOKE_UL_INFORM_EDCH_MAC
+UL1 MSG_ID_PHY_SIMULATE_UMAC_GET_HS_BUFFER
+UL1 MSG_ID_PHY_SIMULATE_UMAC_FREE_HS_BUFFER
+UL1 MSG_ID_PHY_SIMULATE_TRY_TO_TRIGGER_CSR_STATUS_IND
+UL1 MSG_ID_RSVAS_UL1_SUSPEND_CNF
+UL1 MSG_ID_UL1_GPS_TIME_SYNC_IND
+UL1 MSG_ID_USER_WAKEUP_3G_HANDLE_IND
+UL1 MSG_ID_UL1_SPECIFIC_CELL_SEARCH_REQ
+UL1 MSG_ID_UL1_SPECIFIC_CELL_SEARCH_IND
+UL1 MSG_ID_UL1_SPECIFIC_CELL_SEARCH_STOP_REQ
+UL1 MSG_ID_UL1_SPECIFIC_CELL_SEARCH_STOP_IND
+UL1 MSG_ID_UL1_SFN_DECODE_REQ
+UL1 MSG_ID_UL1_SFN_DECODE_CNF
+UL1 MSG_ID_UL1_SFN_STOP_REQ
+UL1 MSG_ID_UL1_SFN_STOP_IND
+UL1 MSG_ID_UL1_SFN_DECODE_SFN_IND
+UL1 MSG_ID_UL1_MSG_CONTAINER_REQ
+UL1 MSG_ID_UL1_T312_EXPIRY_IND
+UL1 MSG_ID_UL1_MM_TGPS_CHANNELACT_REQ
+UL1 MSG_ID_UL1_MM_TGPS_CHANNELACT_CNF
+UL1 MSG_ID_UL1_PHY_CONFIG_FAIL_IND
+UL1 MSG_ID_UL1_MEASUREMENT_CONFIG_CELL_REQ
+UL1 MSG_ID_UL1_BCH_SETUP_REQ
+UL1 MSG_ID_UL1_BCH_RELEASE_REQ
+UL1 MSG_ID_UL1_AUTO_GAP_ON_REQ
+UL1 MSG_ID_UL1_AUTO_GAP_OFF_REQ
+UL1 MSG_ID_UL1_FREQUENCY_SCAN_REQ
+UL1 MSG_ID_UL1_FREQUENCY_SCAN_SUSPEND_REQ
+UL1 MSG_ID_UL1_FREQUENCY_SCAN_CONTINUE_REQ
+UL1 MSG_ID_UL1_MEASUREMENT_CELL_IND
+UL1C MSG_ID_UL1C_SEND_REPORT
+UL1C MSG_ID_UL1C_WAKEUP_UL1TASK
+UL1C MSG_ID_UL1C_USER_DEF_FUNC
+UL1DATA MSG_ID_UL1DATA_UL_DPCH_POWER
+UL1DATA MSG_ID_UL1DATA_UL_DPCH_CCTRCH_TASK
+UL1HISR MSG_ID_UL1TASK_WAKEUP
+UL1TST MSG_ID_UL1TST_TO_FT
+UMAC MSG_ID_CMAC_CONFIG_TX_CCTRCH_REQ
+UMAC MSG_ID_CMAC_CONFIG_EDCH_CCTRCH_REQ
+UMAC MSG_ID_CMAC_CONFIG_RX_CCTRCH_REQ
+UMAC MSG_ID_CMAC_CONFIG_HSDSCH_CCTRCH_REQ
+UMAC MSG_ID_CMAC_REMOVE_TX_CCTRCH_REQ
+UMAC MSG_ID_CMAC_REMOVE_EDCH_CCTRCH_REQ
+UMAC MSG_ID_CMAC_REMOVE_RX_CCTRCH_REQ
+UMAC MSG_ID_CMAC_REMOVE_HSDSCH_CCTRCH_REQ
+UMAC MSG_ID_CMAC_TRAFFIC_VOLUME_MEASUREMENT_REQ
+UMAC MSG_ID_CMAC_CONFIG_CIPHERING_REQ
+UMAC MSG_ID_CMAC_CONFIG_UE_REQ
+UMAC MSG_ID_CMAC_CONFIG_RACH_REQ
+UMAC MSG_ID_CMAC_COUNT_C_REQ
+UMAC MSG_ID_CMAC_CONFIG_TX_RLC_REESTABLISH_REQ
+UMAC MSG_ID_CMAC_CONFIG_RX_RLC_REESTABLISH_REQ
+UMAC MSG_ID_CMAC_DELETE_CIPHERING_REQ
+UMAC MSG_ID_CMAC_ES_RESET_REQ
+UMAC MSG_ID_CMAC_CONFIG_TFC_SUBSET_REQ
+UMAC MSG_ID_CMAC_QUALITY_MEASUREMENT_REQ
+UMAC MSG_ID_CMAC_ADDITIONAL_TVM_REQ
+UMAC MSG_ID_CMAC_CONFIG_CPCH_REQ
+UMAC MSG_ID_CMAC_CONFIG_ABORT_REQ
+UMAC MSG_ID_CSR_UMAC_DEACTIVATE_REPORT_REQ
+UMAC MSG_ID_CSR_UMAC_STATUS_REQ
+UMAC MSG_ID_URLC_UMAC_TX_DATA_REQ
+UMAC MSG_ID_URLC_UMAC_GEMINI_RESET
+UMAC MSG_ID_MEME_UMAC_SIMULATE_GET_COUNTC
+UMAC MSG_ID_RRCE_UMAC_SIMULATE_GET_COUNTC_ACTIVATION_TIME
+UMAC MSG_ID_UMAC_UMAC_DCH_UL_DPCH_CCTRCH_RSP
+UMAC MSG_ID_UMAC_UMAC_DCH_UL_DPCH_CCTRCH_RESULT
+UMAC MSG_ID_UMAC_UMAC_DCH_UL_DPCH_POWER_IND
+UMAC MSG_ID_UMAC_UMAC_NO_R99_CMD_TO_SEQ_IND
+UMAC MSG_ID_UMAC_UMAC_NO_R99_DATA_TO_SEQ_IND
+UMAC MSG_ID_UMAC_UMAC_NO_R5_CMD_TO_SEQ_IND
+UMAC MSG_ID_UMAC_UMAC_NO_R5_DATA_TO_SEQ_IND
+UMAC MSG_ID_UMAC_UMAC_CHECK_DATA_REF_COUNT_IND
+UMAC MSG_ID_UMAC_UMAC_T1_TIMER_ACTION_IND
+UMAC MSG_ID_UMAC_UMAC_EDCH_TICK1_IND
+UMAC MSG_ID_UMAC_UMAC_EDCH_TICK2_IND
+UMAC MSG_ID_UMAC_UMAC_EDCH_TICK3_IND
+UMAC MSG_ID_UMAC_UMAC_ABORT_IND
+UMAC MSG_ID_UMAC_UMAC_FREE_NEXT_DESCRIPTOR_IND
+UMAC MSG_ID_UMAC_UMAC_MAC_EHS_DSC_IND
+UMAC MSG_ID_UMAC_UMAC_COUNTC_VERDICT_IND
+UMAC MSG_ID_UMAC_UMAC_IS_MACTICK_VERDICT_IND
+UMAC MSG_ID_UMAC_EM_INFO_EDCH_IND
+UMAC MSG_ID_UMAC_UMAC_USE_MAX_PRIO_LOGCH_PO_IND
+UMAC MSG_ID_UMAC_EM_INFO_DCH_IND
+UMAC MSG_ID_UMAC_CMODEL_GENERATE_SPECIFIC_MAC_EHS_PDU
+UMAC MSG_ID_UMAC_CMODEL_SETUP_MAC_EHS_CONFIGURATION
+UMAC MSG_ID_UMAC_CMODEL_GENERATE_RANDOM_MAC_EHS_PDU
+UMAC MSG_ID_UMAC_CMODEL_GENERATE_SPECIFIC_MAC_HS_PDU
+UMAC MSG_ID_UMAC_MAC_EHS_DSC_SETTING_REQ
+UMAC MSG_ID_UMACHISR_UMAC_R5_FLUSH_DONE_IND
+UMAC MSG_ID_UMACHISR_UMAC_R7_FLUSH_DONE_IND
+UMAC MSG_ID_UMACHISR_UMAC_R99_DATA_DONE_IND
+UMAC MSG_ID_UMACHISR_UMAC_HW_HANG_DET
+UMAC MSG_ID_UMACHISR_UMAC_R7_ERROR_IND
+UMAC MSG_ID_UMAC_SEQ_REGISTER_VERDICT_IND
+UMAC MSG_ID_UMAC_UMAC_POST_TX_VERDICT_IND
+UMAC MSG_ID_DRLC_UMAC_SIMULATE_IS_MACTICK_AVAILABLE
+UMAC MSG_ID_DRLC_UMAC_DATA_PENDING_REQ
+UMAC MSG_ID_UMAC_CODE_END
+UPCM MSG_ID_TCM_UPCM_BEARER_ACT_REQ
+UPCM MSG_ID_TCM_UPCM_BEARER_DEACT_REQ
+UPCM MSG_ID_TCM_UPCM_PDN_BIND_REQ
+UPCM MSG_ID_TCM_UPCM_PDN_BIND_CNF
+UPCM MSG_ID_TCM_UPCM_PDN_UNBIND_REQ
+UPCM MSG_ID_TCM_UPCM_PDN_UNBIND_CNF
+UPCM MSG_ID_TCM_UPCM_PF_UPDATE_REQ
+UPCM MSG_ID_RAT_TCM_UPCM_SUSPEND_REQ
+UPCM MSG_ID_RAT_TCM_UPCM_RESUME_REQ
+UPCM MSG_ID_IPCORE_UPCM_PDN_BIND_IND
+UPCM MSG_ID_IPCORE_UPCM_PDN_BIND_RSP
+UPCM MSG_ID_IPCORE_UPCM_PDN_DEACT_IND
+UPCM MSG_ID_MNY_UPCM_SUSPEND_REQ
+UPCM MSG_ID_MNY_UPCM_RESUME_REQ
+UPS MSG_ID_UPS_BATCH_STATE_IND
+UPS MSG_ID_UPS_UT_UART_DATA_IND
+UPS MSG_ID_UPS_UT_UART_DATA_REQ
+UPS MSG_ID_UPS_FLC_DATA_RESUME_IND
+UPS MSG_ID_UPS_FLC_DATA_SUSPEND_IND
+UPS MSG_ID_L4CUPS_PORT_ACTIVATE_REQ
+UPS MSG_ID_L4CUPS_PORT_ACTIVATE_CNF
+UPS MSG_ID_L4CUPS_PORT_DEACTIVATE_IND
+UPS MSG_ID_MBIM_CLOSE_REQ
+UPS MSG_ID_MBIM_CLOSE_CNF
+UPS MSG_ID_MBIM_CONNECT_IND
+UPS MSG_ID_MBIM_DISCONNECT_IND
+UPS_PUBLIC MSG_ID_ABM_RNDIS_ACTIVATE_REQ
+UPS_PUBLIC MSG_ID_ABM_RNDIS_ACTIVATE_CNF
+UPS_PUBLIC MSG_ID_ABM_RNDIS_DEACTIVATE_REQ
+UPS_PUBLIC MSG_ID_ABM_RNDIS_DEACTIVATE_CNF
+UPS_PUBLIC MSG_ID_ABM_RNDIS_DEACTIVATE_IND
+UPS_PUBLIC MSG_ID_RNDIS_DATA_REQ
+UPS_PUBLIC MSG_ID_RNDIS_DATA_IND
+UPS_PUBLIC MSG_ID_RNDIS_STATISTICS_IND
+URLC MSG_ID_RATCM_URLC_UTEST_ACTIVATE_LOOP_REQ
+URLC MSG_ID_RATCM_URLC_UTEST_DEACTIVATE_LOOP_REQ
+URLC MSG_ID_RATCM_URLC_UTEST_OPEN_LOOP_REQ
+URLC MSG_ID_RATCM_URLC_UTEST_CLOSE_LOOP_M1_REQ
+URLC MSG_ID_RATCM_URLC_UTEST_CLOSE_LOOP_M2_REQ
+URLC MSG_ID_RATDM_URLC_DEACTIVATE_PS_RAB_REQ
+URLC MSG_ID_RATDM_URLC_DEACTIVATE_PS_RAB_ABORT_REQ
+URLC MSG_ID_DRLC_URLC_START_DISCARD_TIMER_REQ
+URLC MSG_ID_CRLC_CONFIG_RAB_REQ
+URLC MSG_ID_CRLC_CONFIG_TM_ESTABLISH_REQ
+URLC MSG_ID_CRLC_CONFIG_UM_ESTABLISH_REQ
+URLC MSG_ID_CRLC_CONFIG_AM_ESTABLISH_REQ
+URLC MSG_ID_CRLC_CONFIG_RELEASE_REQ
+URLC MSG_ID_CRLC_SUSPEND_REQ
+URLC MSG_ID_CRLC_RESUME_REQ
+URLC MSG_ID_CRLC_CONFIG_TX_CIPHERING_REQ
+URLC MSG_ID_CRLC_CONFIG_RX_CIPHERING_REQ
+URLC MSG_ID_CRLC_COUNT_C_REQ
+URLC MSG_ID_CRLC_RB_CONTROL_REQ
+URLC MSG_ID_CRLC_REESTABLISH_REQ
+URLC MSG_ID_CRLC_PS_RATE_INFO_REQ
+URLC MSG_ID_CRLC_ABORT_REQ
+URLC MSG_ID_L2L_MAC_DATA_IND
+URLC MSG_ID_URLC_UMAC_POST_TX_IND
+URLC MSG_ID_URLC_UMAC_STATUS_REPORT_REQUIRED_IND
+URLC MSG_ID_URLC_UMAC_TX_DCH_MODIFY_IND
+URLC MSG_ID_URLC_UMAC_TX_EDCH_MODIFY_IND
+URLC MSG_ID_URLC_UMAC_TX_STATUS_IND
+URLC MSG_ID_URLC_UMAC_GET_AM_BO_IND
+URLC MSG_ID_URLC_UMAC_GET_AM_CONTROL_BO_IND
+URLC MSG_ID_URLC_UMAC_GET_TM_BO_IND
+URLC MSG_ID_URLC_UMAC_GET_UM_BO_IND
+URLC MSG_ID_URLC_UMAC_TRANSMIT_AM_PDU_IND
+URLC MSG_ID_URLC_UMAC_TRANSMIT_TM_PDU_IND
+URLC MSG_ID_URLC_UMAC_TRANSMIT_UM_PDU_IND
+URLC MSG_ID_URLC_SIMULATE_UMAC_BUFFER_OCCUPANCY_REQ
+URLC MSG_ID_URLC_SIMULATE_UMAC_RB_TO_LOGICAL_CHANNEL_MAPPING_REQ
+URLC MSG_ID_URLC_SIMULATE_UMAC_RLC_REESTABLISH_ACTIVATION_IND
+URLC MSG_ID_URLC_SIMULATE_UMAC_END_RX_REESTABLISH_AM_USER_RB_LOG_CH_IND
+URLC MSG_ID_URLC_UMAC_INJECT_SADR_REQ
+URLC MSG_ID_URLC_UMAC_INJECT_HSUPA_CMD_REQ
+URLC MSG_ID_DRLC_URLC_RELEASE_REQ
+URLC MSG_ID_DRLC_URLC_REASSEMBLE_CNF
+URLC MSG_ID_DRLC_URLC_DEINIT_CNF
+URLC MSG_ID_DRLC_URLC_TX_PRESEG_REQ
+URLC MSG_ID_DRLC_URLC_ENTER_PCH_CNF
+URLC MSG_ID_DRLC_L2HWREASMSIM_CMD_IND
+URLC MSG_ID_L2HWREASMSIM_SEQ_INTR_IND
+URLC MSG_ID_UL2D_BYTECOPY_SIM_CMD_IND
+URLC MSG_ID_BYTECOPY_SIM_UL2D_INTR_IND
+URLC MSG_ID_L2L_DEBUG_INFO_IND
+URLC MSG_ID_L2L_BO_DEBUG_INFO_IND
+URLC MSG_ID_L2L_RELEASE_REQ
+URLC MSG_ID_L2L_USE_OLD_KEY_REQ
+URLC MSG_ID_L2L_TRIGGER_RESET_REQ
+URLC MSG_ID_L2L_RESET_ACK_RECEIVED
+URLC MSG_ID_L2L_RESET_DETECTED
+URLC MSG_ID_L2L_SUSPEND_REQ
+URLC MSG_ID_L2L_RESUME_REQ
+URLC MSG_ID_L2L_RLC_ACC_RX_CONFIG_REQ
+URLC MSG_ID_L2L_RLC_ACC_RX_EVENT_IND
+URLC MSG_ID_L2L_RLC_ACC_HW_RESET_IND
+URLC MSG_ID_L2L_RLC_ACC_TX_CMD_REQ
+URLC MSG_ID_L2L_RLC_ACC_TX_CMD_VERDICT_IND
+URLC MSG_ID_L2L_TX_CONTAINER_ALLOC_IND
+URLC MSG_ID_L2L_TX_CONTAINER_DEALLOC_IND
+URLC MSG_ID_URLC_SEQ_RRC_STATE_CHANGE_IND
+URLC MSG_ID_URLC_SEQ_RESTORE_RB_REQ
+URLC MSG_ID_URLC_SEQ_ENTER_PCH_REQ
+URLC MSG_ID_URLC_SEQ_UL2ACC_SLEEP_ATTEMPT_REQ
+URLC MSG_ID_URLC_CODE_END
+URR MSG_ID_URR_NON_USED_MESSAGE_BEGIN
+URR MSG_ID_URR_DRLC_SRB_SDU_STOP_IND
+URR MSG_ID_URR_NON_USED_MESSAGE_END
+URR MSG_ID_URR_CODE_END
+USIME MSG_ID_RRCE_USIME_SAVE_REQ
+USIME MSG_ID_CSCE_USIME_READ_NVRAM_REQ
+USIME MSG_ID_CSCE_USIME_SET_MODE_REQ
+USIME MSG_ID_CSCE_USIME_BAND_SETTING_UPDATE_REQ
+USIME MSG_ID_CSCE_USIME_EUTRAN_CAP_UPDATE_REQ
+USIME MSG_ID_RATCM_UAS_USIM_INFO_RESET_REQ
+USIME MSG_ID_USIM_REGISTER_CNF
+USIME MSG_ID_USIME_DUMP_UE_CAPABILITY
+USIME MSG_ID_USIME_CODE_END
+VMMI MSG_ID_L4VMMI_AT_RESPONSE_IND
+VMMI MSG_ID_VMMI_CODE_END
+VT MSG_ID_CSM_VT_ACTIVATE_REQ
+VT MSG_ID_CSM_VT_ACTIVATE_CNF
+VT MSG_ID_CSM_VT_DEACTIVATE_REQ
+VT MSG_ID_CSM_VT_DEACTIVATE_CNF
+VT MSG_ID_CSM_VT_DISC_IND
+VT MSG_ID_VT_CSR_UPLINK_DATA_IND
+VT MSG_ID_VT_CSR_START_CONSUME_DL_IND
+VT MSG_ID_VT_F_CSR_ACTIVATE_REQ
+VT MSG_ID_VT_F_CSR_DEACTIVATE_REQ
+VT MSG_ID_VT_UT_H245_SYNC_IND
+VT MSG_ID_VT_UT_H245_DL_MSG
+VT MSG_ID_VT_UT_XSRP_RX_MSG
+VT MSG_ID_VT_UT_XSRP_TX_MSG
+VT MSG_ID_VT_UT_XSRP_H245_DL_DATA_IND
+VT MSG_ID_VT_UT_XSRP_H245_UL_DATA_REQ
+VT MSG_ID_VT_UT_H223_CTRL_UL_DATA_REQ
+VT MSG_ID_VT_UT_H223_AUDIO_UL_DATA_REQ
+VT MSG_ID_VT_UT_H223_VIDEO_UL_DATA_REQ
+VT MSG_ID_VT_UT_H223_CTRL_DL_DATA_IND
+VT MSG_ID_VT_UT_H223_AUDIO_DL_DATA_IND
+VT MSG_ID_VT_UT_H223_VIDEO_DL_DATA_IND
+VT MSG_ID_VT_CSR_CONSUME_DL_IND
+VT MSG_ID_VT_LOOPBACK_AUDIO_DATA
+VT MSG_ID_VT_LOOPBACK_VIDEO_DATA
+VT MSG_ID_VT_DBG_DL_H245_MSG_IND
+VT MSG_ID_VT_DBG_UL_H245_MSG_IND
+VT MSG_ID_VT_SP3G_UL_DATA_READY_IND
+VT MSG_ID_MED_VT_CODEC_OPEN_ACK
+VT MSG_ID_MED_VT_PUT_UL_VIDEO_IND
+VT MSG_ID_TVT_UT_UART_DATA_REQ
+WMT MSG_ID_BT_WMT_CONN_STATUS_UPDATE_IND
+WMT MSG_ID_BT_WMT_QUERY_RSSI_IND
+WMT MSG_ID_WMT_BT_SET_RX_RANGE_CNF
+WMT MSG_ID_WMT_WNDRV_SET_BWCS_IND
+WMT MSG_ID_WMT_BT_SET_DEFAULT_TX_POWER_CNF
+WMT MSG_ID_WMT_BT_UPDATE_CONN_TX_POWER_CNF
+WMT MSG_ID_WMT_BT_SET_BWCS_REQ
+WMT MSG_ID_WMT_BT_QUERY_RSSI_REQ
+WMT MSG_ID_WMT_BT_SET_RX_RANGE_REQ
+WMT MSG_ID_WMT_BT_SET_DEFAULT_TX_POWER_REQ
+WMT MSG_ID_WMT_BT_UPDATE_CONN_TX_POWER_REQ
+WMT MSG_ID_WNDRV_WMT_CONN_STATUS_UPDATE_IND
+WMT MSG_ID_WNDRV_WMT_QUERY_RSSI_IND
+WMT MSG_ID_WMT_WNDRV_SET_BWCS_REQ
+WMT MSG_ID_WMT_WNDRV_QUERY_RSSI_REQ
+WMT MSG_ID_WMT_WNDRV_SET_ANT_REQ
+WMT MSG_ID_WMT_WNDRV_SET_FLOW_CTRL_REQ
+WMT MSG_ID_WMT_WNDRV_SET_FIXED_RX_GAIN_REQ
+WMT MSG_ID_WMT_WNDRV_SET_OMIT_LOW_RATE_REQ
+WMT MSG_ID_FM_WMT_SLEEP_REQ
+WMT MSG_ID_FM_WMT_SLEEP_CNF
+WMT MSG_ID_BT_WMT_HCI_EVENT_IND
+WMT MSG_ID_WMT_BT_HCI_CMD_CNF
+WMT MSG_ID_WMT_BT_HCI_CMD_REQ
+WMT MSG_ID_WNDRV_WMT_CM_MODE_UPDATE_IND
+
diff --git a/mcu/service/dhl/database/access_control/module_k.csv b/mcu/service/dhl/database/access_control/module_k.csv
new file mode 100755
index 0000000..6518cc3
--- /dev/null
+++ b/mcu/service/dhl/database/access_control/module_k.csv
@@ -0,0 +1,114 @@
+[l1 trace],0001,EL1_PHS_1
+[l1 trace],0002,EL1_PHS_2
+[l1 trace],0003,EL1_PHS_RTB
+[l1 trace],0004,EL1_DRV_1
+[l1 trace],0005,EL1_IRT_1
+[l1 trace],0006,EL1_TX_1
+[l1 trace],0007,EL1_MAIN
+[l1 trace],0008,EDATA_PATH
+[l1 trace],0009,EDATA_PATH_DETAIL
+[l1 trace],0010,ERLCUL
+[l1 trace],0011,ERLCUL_DETAIL
+[l1 trace],0012,ERLCDL
+[l1 trace],0013,ERLCDL_DETAIL
+[l1 trace],0014,EMAC
+[l1 trace],0015,EMAC_DETAIL
+[l1 trace],0016,EPDCP
+[l1 trace],0017,EPDCP_DETAIL
+[l1 trace],0018,ROHC
+[l1 trace],0019,ROHC_DETAIL
+[l1 trace],0020,RAL
+[l1 trace],0021,RAL_DETAIL
+[l1 trace],0022,NAS_DATA_PATH
+[l1 trace],0023,NAS_DATA_PATH_DETAIL
+[l1 trace],0024,QMU_BM
+[l1 trace],0025,EL1D_CM0
+[l1 trace],0026,EL1D_CM1
+[l1 trace],0027,EL1D_CMIF
+[l1 trace],0028,EL1D_COMMON0
+[l1 trace],0029,EL1D_COMMON1
+[l1 trace],0030,EL1D_CS
+[l1 trace],0031,EL1D_CSIF
+[l1 trace],0032,EL1D_POS
+[l1 trace],0033,EL1D_PS
+[l1 trace],0034,EL1D_RF0
+[l1 trace],0035,EL1D_RF1
+[l1 trace],0036,EL1D_RX0
+[l1 trace],0037,EL1D_RX1
+[l1 trace],0038,EL1D_RX2
+[l1 trace],0039,EL1D_TX0
+[l1 trace],0040,EPHY_RF
+[l1 trace],0041,L2_LTE_COPRO_DRV
+[l1 trace],0042,MML1_RF
+[l1 trace],0043,DCXO_DIV_1
+[l1 trace],0044,MODEM_TOPSM_1
+[l1 trace],0045,OSTD_1
+[l1 trace],0046,SleepDrv_1
+[l1 trace],0047,L1SM_1
+[l1 trace],0048,UL1SM_1
+[l1 trace],0049,EL1SM_1
+[l1 trace],0050,PCORE_DCXO_DIV_1
+[l1 trace],0051,PCORE_MD_TOPSM_1
+[l1 trace],0052,PCORE_OSTD_1
+[l1 trace],0053,PCORE_SleepDrv_1
+[l1 trace],0054,L1C_GPRS3
+[l1 trace],0055,L1_AFC
+[l1 trace],0056,L1C_GSM
+[l1 trace],0057,L1C_GPRS
+[l1 trace],0058,L1I_GSM
+[l1 trace],0059,L1I_GPRS
+[l1 trace],0060,L1SC
+[l1 trace],0061,CSD
+[l1 trace],0062,L1D_PRI
+[l1 trace],0063,L1D_SEC
+[l1 trace],0064,L1D_EDGE
+[l1 trace],0065,L1I_EGPRS
+[l1 trace],0066,L1C_EGPRS
+[l1 trace],0067,L1IAMR
+[l1 trace],0068,L1TAMR
+[l1 trace],0069,L1D_3RD
+[l1 trace],0070,L1DM
+[l1 trace],0071,L1DLP
+[l1 trace],0072,L1DLP3
+[l1 trace],0073,L1DLP5
+[l1 trace],0074,L1DLP6
+[l1 trace],0075,L1DLP7
+[l1 trace],0076,L1DLP8
+[l1 trace],0077,L1C_GSM2
+[l1 trace],0078,L1C_GPRS2
+[l1 trace],0079,UL1C_PRI1
+[l1 trace],0080,UL1C_PRI2
+[l1 trace],0081,UL1C_PRI3
+[l1 trace],0082,UL1C_PRI4
+[l1 trace],0083,UL1D_MLT_SET1
+[l1 trace],0084,UL1D_MLT_SET2
+[l1 trace],0085,UL1D_PRI
+[l1 trace],0086,UL1D_SEC
+[l1 trace],0087,UL1D_THIRD
+[l1 trace],0088,UL1D_FOURTH
+[l1 trace],0089,UL1D_FIFTH
+[l1 trace],0090,UL1D_SIXTH
+[l1 trace],0091,UL1D_SEVENTH
+[l1 trace],0092,UL1TST_PRI1
+[l1 trace],0093,UL1D_HSPA_PRI
+[l1 trace],0094,UL1D_HSPA_SEC
+[l1 trace],0095,UL1D_HSPA_THIRD
+[l1 trace],0096,UL1D_PLUS_PRI
+[l1 trace],0097,URLC
+[l1 trace],0098,UMAC
+[l1 trace],0099,HIF_DRV
+[l1 trace],0100,HIF_MW
+[l1 trace],0101,HIF_SRV
+[l1 trace],0102,DHL_L1
+[l1 trace],0103,DHL_L1_SLAVE
+[l1 trace],0104,L1Audio
+[l1 trace],0105,AST_L1_Trace_ISR_Context_Group1
+[l1 trace],0106,AST_L1_Trace_ISR_Context_Group2
+[l1 trace],0107,AST_L1_Trace_ISR_Context_Group3
+[l1 trace],0108,AST_L1_Trace_ISR_Context_Group4
+[l1 trace],0109,AST_L1_Trace_Task_Context_Group1
+[l1 trace],0110,AST_L1_Trace_Task_Context_Group2
+[l1 trace],0111,AST_L1_Trace_Task_Context_Group3
+[l1 trace],0112,AST_L1_Trace_Task_Context_Group4[l1 trace],0113,EL1D_AGC0
+[l1 trace],0114,EL1D_COSIM
+[l1 trace],EL1D_TPC0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/gv/4g/gv_db_4g.c b/mcu/service/dhl/database/gv/4g/gv_db_4g.c
new file mode 100644
index 0000000..d301d8c
--- /dev/null
+++ b/mcu/service/dhl/database/gv/4g/gv_db_4g.c
@@ -0,0 +1,79 @@
+/********************************************************************************************
+ * LEGAL DISCLAIMER
+ *
+ * (Header of MediaTek Software/Firmware Release or Documentation)
+ *
+ * BY OPENING OR USING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE") RECEIVED
+ * FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON AN "AS-IS" BASIS
+ * ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES, EXPRESS OR IMPLIED,
+ * INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR
+ * A PARTICULAR PURPOSE OR NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY
+ * WHATSOEVER WITH RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK
+ * ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+ * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S SPECIFICATION
+ * OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+ *
+ * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE LIABILITY WITH
+ * RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION,
+ *
+ * TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE
+ * FEES OR SERVICE CHARGE PAID BY BUYER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE WITH THE LAWS
+ * OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF LAWS PRINCIPLES.
+ ************************************************************************************************/
+
+
+/*******************************************************************************
+ *
+ * Filename:
+ * ---------
+ * gv_db.c
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * This file used for pre-processing to build GV DB
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ * How to add a new gv script
+ * 1. Put the gv script into the proper folder e.g: \tst\database\gv
+ * \tst\database_classb\gv
+ * \tst\database_classb_umts\gv
+ * \tst\database_modis\gv
+ * 2. #include <xxx.gv>.
+ * Notably, you should use #include <xxx.gv> rather than "xxx.gv"
+ * If you have two different scripts with the same name in database\gv
+ * and database_modis\gv, please make sure you use #include <xxx.gv>.
+ * If you use #include "xxx.gv", Codegen will process \tst\database\gv\xxx.gv
+ * instead of \tst\database_modis\gv\xxx.gv. So you are suggested to use
+ * #include <xxx.gv> all the way.
+ *******************************************************************************/
+
+#ifdef _MODIS_ON_VC9_
+#define __w64
+#endif
+
+#ifdef STDC_HEADERS
+#undef STDC_HEADERS //it will include stdio.h
+#endif
diff --git a/mcu/service/dhl/database/gv/ext/dhl_vars.gv b/mcu/service/dhl/database/gv/ext/dhl_vars.gv
new file mode 100644
index 0000000..cd6c36e
--- /dev/null
+++ b/mcu/service/dhl/database/gv/ext/dhl_vars.gv
@@ -0,0 +1,5 @@
+VARS kal_bool ""
+{
+ {tst_is_PsTrc_open} TST_IS_PSTRC_OPEN;
+};
+
diff --git a/mcu/service/dhl/database/gv/ext/gv_db_ext.c b/mcu/service/dhl/database/gv/ext/gv_db_ext.c
new file mode 100644
index 0000000..626a7ff
--- /dev/null
+++ b/mcu/service/dhl/database/gv/ext/gv_db_ext.c
@@ -0,0 +1,90 @@
+/********************************************************************************************
+ * LEGAL DISCLAIMER
+ *
+ * (Header of MediaTek Software/Firmware Release or Documentation)
+ *
+ * BY OPENING OR USING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE") RECEIVED
+ * FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON AN "AS-IS" BASIS
+ * ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES, EXPRESS OR IMPLIED,
+ * INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR
+ * A PARTICULAR PURPOSE OR NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY
+ * WHATSOEVER WITH RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK
+ * ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+ * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S SPECIFICATION
+ * OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+ *
+ * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE LIABILITY WITH
+ * RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION,
+ *
+ * TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE
+ * FEES OR SERVICE CHARGE PAID BY BUYER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE WITH THE LAWS
+ * OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF LAWS PRINCIPLES.
+ ************************************************************************************************/
+
+
+/*******************************************************************************
+ *
+ * Filename:
+ * ---------
+ * gv_db_ext.c
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * This file used for pre-processing to build GV DB
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ *
+ * removed!
+ * removed!
+ * removed!
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ * How to add a new gv script
+ * 1. Put the gv script into the proper folder e.g: \dhl\database\gv\ext
+ * 2. #include <xxx.gv>.
+ * Notably, you should use #include <xxx.gv> rather than "xxx.gv"
+ * If you have two different scripts with the same name in database\gv\ext
+ * and database_modis\gv\ext, please make sure you use #include <xxx.gv>.
+ * If you use #include "xxx.gv", Codegen will process \dhl\database\gv\\extxxx.gv
+ * instead of \dhl\database_modis\gv\ext\xxx.gv. So you are suggested to use
+ * #include <xxx.gv> all the way.
+ *******************************************************************************/
+
+#ifdef _MODIS_ON_VC9_
+#define __w64
+#endif
+
+#ifdef STDC_HEADERS
+#undef STDC_HEADERS //it will include stdio.h
+#endif
+
+#include <dhl_vars.gv>
diff --git a/mcu/service/dhl/database/gv/gv_db.c b/mcu/service/dhl/database/gv/gv_db.c
new file mode 100644
index 0000000..b86d854
--- /dev/null
+++ b/mcu/service/dhl/database/gv/gv_db.c
@@ -0,0 +1,1012 @@
+/********************************************************************************************
+ * LEGAL DISCLAIMER
+ *
+ * (Header of MediaTek Software/Firmware Release or Documentation)
+ *
+ * BY OPENING OR USING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE") RECEIVED
+ * FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON AN "AS-IS" BASIS
+ * ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES, EXPRESS OR IMPLIED,
+ * INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR
+ * A PARTICULAR PURPOSE OR NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY
+ * WHATSOEVER WITH RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK
+ * ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+ * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S SPECIFICATION
+ * OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+ *
+ * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE LIABILITY WITH
+ * RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION,
+ *
+ * TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE
+ * FEES OR SERVICE CHARGE PAID BY BUYER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE WITH THE LAWS
+ * OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF LAWS PRINCIPLES.
+ ************************************************************************************************/
+
+
+/*******************************************************************************
+ *
+ * Filename:
+ * ---------
+ * gv_db.c
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * This file used for pre-processing to build GV DB
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
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+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ * How to add a new gv script
+ * 1. Put the gv script into the proper folder e.g: \dhl\database\gv
+ * \dhl\database_classb\gv
+ * \dhl\database_classb_umts\gv
+ * \dhl\database_modis\gv
+ * 2. #include <xxx.gv>.
+ * Notably, you should use #include <xxx.gv> rather than "xxx.gv"
+ * If you have two different scripts with the same name in database\gv
+ * and database_modis\gv, please make sure you use #include <xxx.gv>.
+ * If you use #include "xxx.gv", Codegen will process \dhl\database\gv\xxx.gv
+ * instead of \dhl\database_modis\gv\xxx.gv. So you are suggested to use
+ * #include <xxx.gv> all the way.
+ *******************************************************************************/
+
+#ifdef _MODIS_ON_VC9_
+#define __w64
+#endif
+
+#ifdef STDC_HEADERS
+#undef STDC_HEADERS //it will include stdio.h
+#endif
+
+#include <tst_vars.gv>
+
+#ifdef TST_STATISTICS
+#include <tst_lost_count_vars.gv>
+#endif //#ifdef TST_STATISTICS
+
+
+//For GSM/GPRS Project, please include your header here, e.g: #include <modis.gv>
+//Please put your gv files to \dhl\database\gv\ or \dhl\database_classb\gv\
+
+#ifdef __MOD_TCM__
+ #if defined(__GSM_RAT__) || defined(__UMTS_RAT__)
+ #ifdef UNIT_TEST
+
+ #ifdef __TCM_UT__
+ #include <tcm_fsm_vars.gv>
+ #endif // ~ #ifdef __TCM_UT__
+
+ #ifdef __TCM_RAT_TCM_UT__
+ #if (GPRS_MAX_PDP_SUPPORT >= 3) // Only support RAT_TCM GV when GPRS_MAX_PDP_SUPPORT >= 3
+ #ifdef __GEMINI__
+ #include <rat_tcm_vars_sim1_cid_0_turn_on.gv>
+ #include <rat_tcm_vars_sim2_cid_0_turn_on.gv>
+ #else /* __GEMINI__ */
+ #include <rat_tcm_vars_sim1_cid_0_turn_on.gv>
+ #endif /* __GEMINI__ */
+ #endif // ~ #if (GPRS_MAX_PDP_SUPPORT >= 7) // Only support TCM GV when GPRS_MAX_PDP_SUPPORT == 7
+ #endif // ~ #ifdef __TCM_RAT_TCM_UT__
+
+ #endif // ~ #ifdef UNIT_TEST
+ #endif // ~ #if defined(__GSM_RAT__) || defined(__UMTS_RAT__)
+#endif // ~ #ifdef __MOD_TCM__
+
+//#ifdef __SM_UT__
+
+ #if defined(__GSM_RAT__) || defined(__UMTS_RAT__)
+ #ifdef UNIT_TEST
+ #include <sm_conn_vars.gv>
+ #include <sm_responser.gv>
+#if 0
+/* under construction !*/
+ #if (GPRS_MAX_PDP_SUPPORT > 1) // MoDIS GV require at least 2 PDP Context support
+/* under construction !*/
+ #ifdef __PS_SERVICE__ // GV is needed only when task SM is present
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+ #if defined(__GEMINI__)
+/* under construction !*/
+ #else /* __GEMINI__ */
+/* under construction !*/
+ #endif /* __GEMINI__ */
+/* under construction !*/
+ #if defined(__GEMINI__)
+/* under construction !*/
+/* under construction !*/
+ #else /* __GEMINI__ */
+/* under construction !*/
+ #endif /* __GEMINI__ */
+/* under construction !*/
+ #if defined(__GEMINI__)
+/* under construction !*/
+ #else /* __GEMINI__ */
+/* under construction !*/
+ #endif /* __GEMINI__ */
+/* under construction !*/
+ #if (defined(__UMTS_RAT__))
+ #if defined(__GEMINI__)
+/* under construction !*/
+ #else /* __GEMINI__ */
+/* under construction !*/
+ #endif /* __GEMINI__ */
+ #endif /* (defined(__UMTS_RAT__)) */
+/* under construction !*/
+ #if 1 // (defined(__PS_SIG_DATA_IMMEDIATE_RETRY_GSM__) || defined(__PS_SIG_DATA_IMMEDIATE_RETRY_UMTS__) || defined(__SM_UT__))
+ #ifdef __GEMINI__
+/* under construction !*/
+/* under construction !*/
+ #else /* __GEMINI__ */
+/* under construction !*/
+ #endif /* __GEMINI__ */
+ #endif /* #if (defined(__PS_SIG_DATA_IMMEDIATE_RETRY_GSM__) || defined(__PS_SIG_DATA_IMMEDIATE_RETRY_UMTS__)) */
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+ #ifdef __REL6__
+ #if defined(__GEMINI__)
+/* under construction !*/
+ #else /* __GEMINI__ */
+/* under construction !*/
+ #endif /* __GEMINI__ */
+ #endif // ~ __REL6__
+/* under construction !*/
+ #ifdef __REL7__
+ #if defined(__GEMINI__)
+/* under construction !*/
+ #else // __GEMINI__
+/* under construction !*/
+ #endif // ~ __GEMINI__
+ #endif // ~ __REL7__
+/* under construction !*/
+ #ifdef __LTE_RAT__
+ #if defined(__GEMINI__)
+/* under construction !*/
+ #else // __GEMINI__
+/* under construction !*/
+ #endif // ~ __GEMINI__
+ #endif // ~ __LTE_RAT__
+/* under construction !*/
+ #endif //#ifdef __PS_SERVICE__
+/* under construction !*/
+ #endif //#if (GPRS_MAX_PDP_SUPPORT > 1) // MoDIS GV require at least 2 PDP Context support
+/* under construction !*/
+#endif // #if 0
+
+ #endif // ~ #ifdef UNIT_TEST
+ #endif // ~ #if defined(__GSM_RAT__) || defined(__UMTS_RAT__)
+//#endif // ~ __SM_UT__
+
+
+#ifdef UNIT_TEST
+//For MODIS Project, please include your header here, e.g: #include <modis.gv>
+/*Please put your gv files to \dhl\database_modis\gv\ */
+#if defined (__UMTS_RAT__)
+#include <meme_r99_gemini_vars.gv>
+#endif
+
+#include <timer_vars.gv>
+
+
+
+/* GMSS UT GV */
+#ifdef UNIT_TEST
+#ifndef GMSS_NOT_PRESENT
+#include <gmss_vars.gv>
+#endif
+#endif /* UNIT_TEST */
+
+
+/* NWSEL UT GV */
+#ifdef UNIT_TEST
+#ifndef NWSEL_NOT_PRESENT
+#include <nwsel_vars.gv>
+#endif
+#endif /* UNIT_TEST */
+
+// Eric Hsieh 20090610: For LLC UT
+#ifndef __MTK_TARGET__ //#ifdef __LLC_UT__
+#ifdef __PS__HO__
+#include <llc_psho_vars.gv>
+#else
+#include <llc_vars.gv>
+#endif
+#endif // __LLC_UT__
+
+/* FLC GV */
+#ifdef __FLC2__
+#include <flc_vars.gv>
+#endif //#ifdef __FLC2__
+/* ~ FLC GV */
+
+/* Carlson PPP UT GV, strictly restrict the UT GV to limited projects */
+#ifdef __PPP_UT__ // only work for __PPP_UT__ defined
+ #if (GPRS_MAX_PDP_SUPPORT > 1) // MoDIS GV require at least 2 PDP Context support
+ #ifdef __PS_SERVICE__ // do not include PPP GV in GSM only load
+ #ifndef PPP_NOT_PRESENT
+ #include <ppp_vars_gprs.gv>
+
+ #endif
+ #endif
+
+ #endif //#if (GPRS_MAX_PDP_SUPPORT > 1) // MoDIS GV require at least 2 PDP Context support
+#endif // ~ #ifdef __PPP_UT__
+/* ~ Carlson PPP UT GV, strictly restrict the UT GV to limited projects */
+
+#if defined(__GSM_RAT__) || defined(__UMTS_RAT__) // BJM
+/* SC Monza MM UT GV */
+ //mm_cs_context
+ #ifdef __CS_SERVICE__
+ #include <monza_mm_cs_basic.gv>
+
+ #ifdef __AGPS_CONTROL_PLANE__
+ #include <monza_mm_cs_agps.gv>
+ #endif
+
+ #ifdef __REL5__
+ #include <monza_mm_cs_rel5.gv>
+ #endif
+
+ #ifdef __UMTS_RAT__
+ #include <monza_mm_cs_wcdma.gv>
+ #endif
+
+ #ifdef __GEMINI__
+ #include <monza_mm_cs_gemini_basic.gv>
+
+ #ifdef __AGPS_CONTROL_PLANE__
+ #include <monza_mm_cs_gemini_agps.gv>
+ #endif
+
+ #ifdef __REL5__
+ #include <monza_mm_cs_gemini_rel5.gv>
+ #endif
+
+ #ifdef __UMTS_RAT__
+ #include <monza_mm_cs_gemini_wcdma.gv>
+ #endif
+ #endif
+ #endif
+
+ //mm_ps_context
+ #ifdef __PS_SERVICE__
+ #include <monza_mm_ps_basic.gv>
+
+ #if defined(__GSM_RAT__) && defined(__UMTS_RAT__)
+ #include <monza_mm_ps_gsm_wcdma.gv>
+ #endif
+
+ #ifdef __REL4__
+ #include <monza_mm_ps_rel4.gv>
+ #endif
+
+ #ifdef __REL5__
+ #include <monza_mm_ps_rel5.gv>
+ #endif
+
+ #ifdef __UMTS_RAT__
+ #include <monza_mm_ps_wcdma.gv>
+ #endif
+
+ #ifdef __GEMINI__
+ #include <monza_mm_ps_gemini_basic.gv>
+
+ #if defined(__GSM_RAT__) && defined(__UMTS_RAT__)
+ #include <monza_mm_ps_gemini_gsm_wcdma.gv>
+ #endif
+
+ #ifdef __REL4__
+ #include <monza_mm_ps_gemini_rel4.gv>
+ #endif
+
+ #ifdef __REL5__
+ #include <monza_mm_ps_gemini_rel5.gv>
+ #endif
+
+ #ifdef __UMTS_RAT__
+ #include <monza_mm_ps_gemini_wcdma.gv>
+ #endif
+ #endif
+ #endif
+
+
+ //mm_common_context
+ #include <monza_mm_common_basic.gv>
+
+ #ifdef __MODEM_EM_MODE__
+ #include <monza_mm_common_em_mode.gv>
+ #endif
+
+ #ifdef __ENS__
+ #include <monza_mm_common_ens.gv>
+ #endif
+
+ #if defined(__GSM_RAT__) && defined(__UMTS_RAT__)
+ #include <monza_mm_common_gsm_wcdma.gv>
+ #endif
+
+ #ifdef __HOMEZONE_SUPPORT__
+ #include <monza_mm_common_homezone.gv>
+ #endif
+
+ #ifdef __PS_SERVICE__
+ #include <monza_mm_common_ps_service.gv>
+ #endif
+
+ #ifdef __REL5__
+ #include <monza_mm_common_rel5.gv>
+ #endif
+
+ #ifdef ___MM_RSSI_SNIFFER_MECHANISM__
+ #include <monza_mm_common_rssi_sniffer.gv>
+ #endif
+
+ #ifdef __SAT__
+ #include <monza_mm_common_sat.gv>
+ #endif
+
+ #ifdef __GEMINI__
+ #include <monza_mm_common_gemini_basic.gv>
+ #ifdef __MODEM_EM_MODE__
+ #include <monza_mm_common_gemini_em_mode.gv>
+ #endif
+
+ #ifdef __ENS__
+ #include <monza_mm_common_gemini_ens.gv>
+ #endif
+
+ #if defined(__GSM_RAT__) && defined(__UMTS_RAT__)
+ #include <monza_mm_common_gemini_gsm_wcdma.gv>
+ #endif
+
+ #ifdef __HOMEZONE_SUPPORT__
+ #include <monza_mm_common_gemini_homezone.gv>
+ #endif
+
+ #ifdef __PS_SERVICE__
+ #include <monza_mm_common_gemini_ps_service.gv>
+ #endif
+
+ #ifdef __REL5__
+ #include <monza_mm_common_gemini_rel5.gv>
+ #endif
+
+ #ifdef __MM_RSSI_SNIFFER_MECHANISM__
+ #include <monza_mm_common_gemini_rssi_sniffer.gv>
+ #endif
+
+ #ifdef __SAT__
+ #include <monza_mm_common_gemini_sat.gv>
+ #endif
+ #endif
+
+/* ~ SC Monza MM UT GV */
+#endif /* defined(__GSM_RAT__) || defined(__UMTS_RAT__) */
+
+/* Max Yin RATDM, RABM, PDCP UT GV */
+ /* RATDM */
+ #ifndef RATDM_NOT_PRESENT
+ #ifdef __UMTS_RAT__
+ #if defined(__GEMINI__)
+ #include <ratdm_3g_gemini_vars.gv>
+ #ifdef __RATDM_UT__
+ #include <ratdm_3g_gemini_ut_only_vars.gv>
+ #endif /* __RATDM_UT__ */
+ #else
+ #include <ratdm_3g_vars.gv>
+ #ifdef __RATDM_UT__
+ #include <ratdm_3g_ut_only_vars.gv>
+ #endif /* __RATDM_UT__ */
+ #endif /* __GEMINI__ */
+ #ifdef __REL6__
+ #include <ratdm_vars_R6.gv>
+ #ifdef __REL7__
+ #include <ratdm_vars_R7.gv>
+ #endif /* __REL7__ */
+ #endif
+ #else
+ #ifdef __GEMINI__
+ #include <ratdm_gemini_vars.gv>
+ #else
+ #include <ratdm_vars.gv>
+ #endif /* __GEMINI__ */
+ #endif /* __UMTS_RAT__ */
+ #ifdef __LTE_RAT__
+ #include <ratdm_4g_vars.gv>
+ #endif /* __LTE_RAT__ */
+ #endif /* RATDM_NOT_PRESENT */
+
+ /* RABM and PDCP */
+ #ifdef __UMTS_RAT__
+ #include <rabm_vars.gv>
+ #include <pdcp_vars.gv>
+ #endif /* __UMTS_RAT__ */
+
+
+#if defined(__GSM_RAT__) || defined(__UMTS_RAT__) // BJM
+#include <MONZA_GAS.gv>
+
+// Evelyn 20080902: For MAC UT
+// Rachel 20101114: For MPAL UT as well
+#include <MONZA2G_GAS.gv>
+#endif /* defined(__GSM_RAT__) || defined(__UMTS_RAT__) */
+
+#ifdef __EGPRS_MODE__
+#include <MONZA_EDGE_GAS.gv>
+#endif //#ifdef __EGPRS_MODE__
+
+#if defined(__GSM_RAT__) || defined(__UMTS_RAT__) // BJM
+#ifdef __GERAN_R6__
+#include <MONZA_PS_R6_GAS.gv>
+#endif //#ifdef __GERAN_R6__
+
+#ifdef __PS_SERVICE__
+#include <MONZA_PS_GAS.gv>
+#endif //#ifdef __PS_SERVICE__
+#endif /* defined(__GSM_RAT__) || defined(__UMTS_RAT__) */
+
+// Rachel,20101102: for Gemini UT
+#ifdef __GEMINI__
+#include <MONZA_GEMINI_GAS.gv>
+#endif //#ifdef __GEMINI__
+
+// Peter,20090115: for Gemini UT
+#if defined(__PS_SERVICE__) && defined(__GEMINI__)
+#include <MONZA_GEMINI_GAS_PS.gv>
+#endif //#if defined(__PS_SERVICE__) && defined(__GEMINI__)
+
+#if defined(__GSM_RAT__) || defined(__UMTS_RAT__) // BJM
+#ifdef __MONITOR_PAGE_DURING_TRANSFER__
+#include <MONZA_GAS_MONITOR_PCH_DURING_PTM.gv>
+#endif /* __MONITOR_PAGE_DURING_TRANSFER__ */
+#endif /* defined(__GSM_RAT__) || defined(__UMTS_RAT__) */
+
+#if defined(__GEMINI__) && defined(__UMTS_RAT__)
+#include <MONZA_GEMINI_GAS_PREEMPT.gv>
+#endif
+#ifdef __UMTS_RAT__
+#include <MAUI_PS_UAS.gv>
+
+/*[MAUI_01712431] CSR UT Regression*/
+#include <csr_vars.gv>
+
+// Peng-An, 20090425: for 3G Gemini UT
+#include <urlc_vars.gv>
+
+#ifdef __MTK_UL1_FDD__
+/* Nancy 20110712: for UMAC UT */
+#include <umac_vars.gv>
+ /* JY: for Mac-ehs UT with C-Model */
+ #ifdef __UMTS_R7__
+ #include <umac_vars_R7.gv>
+ #endif
+#endif /* __MTK_UL1_FDD__ */
+
+#ifdef __RLC_HSDPA_COPRO__
+ // Peng-An, 20100525: for SEQ UT
+ #include <seq_vars.gv>
+#endif /* __RLC_HSDPA_COPRO__ */
+
+#endif //#ifdef __UMTS_RAT__
+
+
+/*[MAUI_01709274] CSD UT Regression*/
+#ifdef CSD_UART_SIMU
+#endif /*CSD_UART_SIMU*/
+
+//#if defined(__RMMI_UT__) || defined(__L4C_GPRS_UT__)
+#include <l4c.gv>
+#include <l4b.gv>
+//#endif
+
+#if defined(__L4C_GPRS_UT__)
+#include <l4c_gprs.gv>
+#endif
+
+#ifdef __IPC_ADAPTER__
+#include <ipca.gv>
+#endif
+
+#endif //#ifdef UNIT_TEST
+
+
+#ifdef __UMTS_RAT__
+//For 3G Project, please include your header here, e.g: #include <wcdma.gv>
+//Please put your gv files to \dhl\database_classb_umts\gv\
+
+#endif //__UMTS_RAT__
+
+#if defined(UL1_PHASE3_TEST) && !defined(UL1_PHASE3_COSIM)
+#include <ul1v.gv>
+#endif //#if defined(UL1_PHASE3_TEST) && !defined(UL1_PHASE3_COSIM)
+
+#if defined(__EL1D_COSIM__) || defined(__NL1_COSIM__)
+#include <modemv.gv>
+#endif //#ifdef __EL1D_COSIM__
+
+#ifdef UNIT_TEST
+#include <rac.gv>
+#endif /* UNIT_TEST */
+
+#if defined (__URLC_DVT_ON_FULL_LOAD__)
+#include <ul2v.gv>
+#endif /* __URLC_DVT_ON_FULL_LOAD__ */
+
+#ifdef UNIT_TEST
+ #if defined(__IMS_SUPPORT__) && !defined(VDM_NOT_PRESENT)
+ #include <vdm_vars.gv>
+ #endif
+#endif
+
+// Chester, 20181211: for RSVA UT
+#ifdef UNIT_TEST
+ #if defined(__GEMINI__)
+ #include <rsva_vars.gv>
+ #endif
+#endif
+
+#ifdef __NR_RAT__
+ #ifdef UNIT_TEST
+ #include <nr_ctrl_nrrc.gv>
+ #endif
+#endif
+
+#if defined(__C2K_RAT__)
+ #ifdef UNIT_TEST
+ #include <c2k_vars.gv>
+ #include <C2K.gv>
+ #include <c2k_l3.gv>
+ #include <IRAT.gv>
+ #include <C2K_VzW.gv>
+ #endif
+#endif
diff --git a/mcu/service/dhl/database/gv/modemv.gv b/mcu/service/dhl/database/gv/modemv.gv
new file mode 100755
index 0000000..2642a53
--- /dev/null
+++ b/mcu/service/dhl/database/gv/modemv.gv
@@ -0,0 +1,4 @@
+VARS kal_uint32 ""
+{
+ {el1dCosimPatternBufPoolAddr} MODEM_PATTERN_GV;
+};
diff --git a/mcu/service/dhl/database/gv/tst_lost_count_vars.gv b/mcu/service/dhl/database/gv/tst_lost_count_vars.gv
new file mode 100755
index 0000000..b48544e
--- /dev/null
+++ b/mcu/service/dhl/database/gv/tst_lost_count_vars.gv
@@ -0,0 +1,42 @@
+VARS tst_statistics_struct "tst_lost_statistics_g."
+{
+{count_on} COUNT_ON;
+
+{count_log[0]} CNT_PR;
+{count_log[1]} CNT_TR;
+{count_log[2]} CNT_EM;
+
+{count_lost[0]} LOST_PR;
+{count_lost[1]} LOST_TR;
+{count_lost[2]} LOST_EM;
+
+{count_lost_full_queue[0]} LOST_PR_QUEUE;
+{count_lost_full_queue[1]} LOST_TR_QUEUE;
+{count_lost_full_queue[2]} LOST_EM_QUEUE;
+
+{count_lost_no_buffer[0][0]} LOST_PR_BUF_IDX0;
+{count_lost_no_buffer[0][1]} LOST_PR_BUF_IDX1;
+{count_lost_no_buffer[0][2]} LOST_PR_BUF_IDX2;
+{count_lost_no_buffer[0][3]} LOST_PR_BUF_IDX3;
+{count_lost_no_buffer[0][4]} LOST_PR_BUF_IDX4;
+{count_lost_no_buffer[0][5]} LOST_PR_BUF_IDX5;
+{count_lost_no_buffer[0][6]} LOST_PR_BUF_IDX6;
+
+{count_lost_no_buffer[1][0]} LOST_TR_BUF_IDX0;
+{count_lost_no_buffer[1][1]} LOST_TR_BUF_IDX1;
+{count_lost_no_buffer[1][2]} LOST_TR_BUF_IDX2;
+{count_lost_no_buffer[1][3]} LOST_TR_BUF_IDX3;
+{count_lost_no_buffer[1][4]} LOST_TR_BUF_IDX4;
+{count_lost_no_buffer[1][5]} LOST_TR_BUF_IDX5;
+{count_lost_no_buffer[1][6]} LOST_TR_BUF_IDX6;
+
+{count_lost_no_buffer[2][0]} LOST_EM_BUF_IDX0;
+{count_lost_no_buffer[2][1]} LOST_EM_BUF_IDX1;
+{count_lost_no_buffer[2][2]} LOST_EM_BUF_IDX2;
+{count_lost_no_buffer[2][3]} LOST_EM_BUF_IDX3;
+{count_lost_no_buffer[2][4]} LOST_EM_BUF_IDX4;
+{count_lost_no_buffer[2][5]} LOST_EM_BUF_IDX5;
+{count_lost_no_buffer[2][6]} LOST_EM_BUF_IDX6;
+
+};-""
+
diff --git a/mcu/service/dhl/database/gv/tst_vars.gv b/mcu/service/dhl/database/gv/tst_vars.gv
new file mode 100755
index 0000000..17ae5a5
--- /dev/null
+++ b/mcu/service/dhl/database/gv/tst_vars.gv
@@ -0,0 +1,5 @@
+VARS kal_uint32 ""
+{
+ {dhl_tool_connected} DHL_TOOL_CONNECTED;
+};
+
diff --git a/mcu/service/dhl/database/gv/ul1v.gv b/mcu/service/dhl/database/gv/ul1v.gv
new file mode 100755
index 0000000..9a29113
--- /dev/null
+++ b/mcu/service/dhl/database/gv/ul1v.gv
@@ -0,0 +1,4 @@
+VARS kal_uint32 ""
+{
+ {ul1dTestPatternBufPoolAddr} UL1V_PATTERN_GV0;
+};
diff --git a/mcu/service/dhl/database/gv/ul2v.gv b/mcu/service/dhl/database/gv/ul2v.gv
new file mode 100755
index 0000000..707a87e
--- /dev/null
+++ b/mcu/service/dhl/database/gv/ul2v.gv
@@ -0,0 +1,4 @@
+VARS kal_uint32 ""
+{
+ {ul2sTestPatternBufPoolAddr} UL1V_PATTERN_GV0;
+};
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I10_UL1D_CS_Test.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I10_UL1D_CS_Test.l1v
new file mode 100755
index 0000000..8d6b9da
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I10_UL1D_CS_Test.l1v
@@ -0,0 +1,131 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][1_Idle]I10: MTK UL1 internal CS testing (UL1D request)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_UL1D_CS_TEST
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ CS_TEST_MODE MODE;// choose: ics_cs1, tcs_cs1, cs2, ics_cs3, tcs_cs3, 2stage_cs3
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint8 cs1_acc_frame;// range 1~7
+ kal_uint8 cs2_acc_frame;// range 1~7
+ kal_uint8 dump_cnt; // range 1~5
+ kal_uint8 fading;
+ kal_int16 freq_err;
+ kal_uint16 cfe_thr;
+ kal_uint16 cs1_thr;
+ kal_uint16 cs2_thr;
+ kal_uint16 cs3_thr;
+ kal_uint8 cs1_local_max;
+ kal_uint8 cs2_coht_detection;
+ kal_uint8 cs3_coht_sym;
+ kal_uint8 cs3_noncoht_sample;
+ kal_uint16 process_count;
+ kal_bool ics_cfe;
+} udps_ul1d_cs_test_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[MODE] "Choose CS Test Mode"
+@ICS_CS1 0
+TCS_CS1 1
+ICS_CS2 2
+TCS_CS2 3
+CS3_3stage 4
+CS3_2stage 5
+CS4 6
+ICS 7
+TCS_3stage 8
+TCS_2stage 9
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[cs1_acc_frame] "CS1 accumulate frame"
+1~7
+@1
+
+[cs2_acc_frame] "CS2 accumulate frame"
+1~7
+@1
+
+[dump_cnt] "CS3 DUMP count"
+1~5
+@1
+
+[fading] "Fading channel"
+@Static 0
+C1 1
+C2 2
+C3 3
+C4 4
+C5 5
+C6 6
+
+[freq_err] "Freq off"
+-6000~6000
+@0
+
+[cfe_thr] "CFE threshold"
+0~65535
+@0
+
+[cs1_thr] "CS1 threshold"
+0~65535
+@0
+
+[cs2_thr] "CS2 threshold"
+0~65535
+@0
+
+[cs3_thr] "CS3 threshold"
+0~65535
+@0
+
+[cs1_local_max] "cs1_local_max"
+0~1
+@1
+
+[cs2_coht_detection] "cs2_coht_detection"
+0~1
+@1
+
+[cs3_coht_sym] "cs3_coht_sym"
+0~8
+@8
+
+[cs3_noncoht_sample] "cs3_noncoht_sample"
+0~32
+@4
+
+[process_count] "process_count"
+0~65535
+@1000
+
+[ics_cfe] "ics_cfe"
+@KAL_FALSE
+
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I12_pch_measurement_8960.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I12_pch_measurement_8960.l1v
new file mode 100755
index 0000000..2edeb4c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I12_pch_measurement_8960.l1v
@@ -0,0 +1,56 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][1_Idle]I12 (3G Sleep Mode Testing)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PCH_MEASUREMENT_8960
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power; // Didn't decode from SIB3
+ kal_int8 UL_interference; //range: -110~-70 dBm, Didn't decode from SIB7
+
+ kal_uint8 DRX_cycle_length; // Didn't decode from SIB1
+ kal_bool IsMeasEnabled; // Indicate wether the measurement func. is activated
+} udps_pch_measurement_8960_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10814
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@0
+
+[max_tx_power] "Maximum allowed UL TX power [dBm] (from 8960)"
+-50~33
+@-49
+
+[UL_interference] "UL_interference [dBm] (from 8960)"
+-110~-70
+@-80
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+DRX6 6
+DRX7 7
+@DRX8 8
+DRX9 9
+
+[IsMeasEnabled] "Indicate wether the measurement func. is activated"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I13_Continual_ICS.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I13_Continual_ICS.l1v
new file mode 100755
index 0000000..8ee7ee1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I13_Continual_ICS.l1v
@@ -0,0 +1,109 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][1_Idle]I13 (UL1D continual ICS)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_CONTINUAL_ICS
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO pef
+ kal_uint16 OVSFdpch_rl2; // for SHO pef
+ kal_uint8 ssdt_s_bit;
+ kal_uint8 ssdt_CWS_len;
+ kal_uint8 ssdt_id_rl1; // for SSDT
+ kal_uint8 ssdt_id_rl2; // for SSDT
+ kal_uint16 ICS_run_num;
+} udps_continual_ics_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+
+[ICS_run_num] "Continual ICS total run number"
+1~60000
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+
+[ssdt_s_bit] "Number of S_filed bits for SSDT"
+0~2
+
+[ssdt_CWS_len] "Code word set length for SSDT"
+SSDT_LONG 0
+SSDT_SHORT 2
+SSDT_OFF 3
+
+[ssdt_id_rl1] "The SSDT cell id for this RL1. 0~7=A~H. 8 for not applicable"
+0~8
+
+[ssdt_id_rl2] "The SSDT cell id for this RL2. 0~7=A~H. 8 for not applicable"
+0~8
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I1_Initial_Cell_Search.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I1_Initial_Cell_Search.l1v
new file mode 100755
index 0000000..5d4e405
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I1_Initial_Cell_Search.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][1_Idle]I1: Initial Cell Search"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_INITIAL_CELL_SEARCH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 uarfcn_bts2;
+} udps_initial_cell_search_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of lower frequency BTS"
+10587~10640
+@10600
+
+[uarfcn_bts2] "UARFCN of higher frequency BTS"
+10670~10814
+@10700
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I2_SFN_Read_SIB_Listen.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I2_SFN_Read_SIB_Listen.l1v
new file mode 100755
index 0000000..790a742
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I2_SFN_Read_SIB_Listen.l1v
@@ -0,0 +1,52 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][1_Idle]I2: ICS, SFN Reading (SetSync) and System Info. Listening"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_SFN_READ_SIB_LISTEN
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2; // Only for CPICH meas
+ kal_uint16 psc_bts2; // Only for CPICH meas
+ kal_bool read_BCH_only; // for BSC1(CSD) only (I2, I5): contineous rx BCH
+ kal_uint16 count_blks; // for Self BLER cal.
+} udps_sfn_read_sib_listen_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+[read_BCH_only] "(CSD) Conti. Read BCH?"
+@KAL_FALSE
+
+[count_blks] "(CSD)Wanted total BCH Blocks number?"
+@2000
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I3_Paging_Response.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I3_Paging_Response.l1v
new file mode 100755
index 0000000..8feb882
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I3_Paging_Response.l1v
@@ -0,0 +1,108 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][1_Idle]I3: Response to Paging Occasion"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PAGING_RESPONSE
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+
+ kal_uint8 Ts_ccpch;
+ kal_uint16 OVSFs_ccpch;
+ kal_uint16 OVSFpich;
+
+ kal_int8 cpich_tx_power;
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+ kal_bool sttd_ind;
+
+ kal_int16 freq_offset;//I3, I5 add I/F for CSD's freq. offset requirement.
+ kal_uint16 offline_rake_test_count; // for I3, I5, I6
+} udps_paging_response_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10670~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+[Ts_ccpch] "Timing offset between S-CCPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFs_ccpch] "The OVSF code number of the S-CCPCH (0~SF-1)"
+0~63
+@7
+
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@100
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+[freq_offset] "(CSD) Offline Rake Test's freq. offset:"
+@0
+
+[offline_rake_test_count] "offline RAKE test count"
+@1000
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I4_Target_Cell_Search.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I4_Target_Cell_Search.l1v
new file mode 100755
index 0000000..707dd0b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I4_Target_Cell_Search.l1v
@@ -0,0 +1,98 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][1_Idle]I4: Target Cell Search"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_TARGET_CELL_SEARCH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts1;
+ kal_uint16 psc_bts2;
+
+ kal_uint8 Ts_ccpch;
+ kal_uint16 OVSFs_ccpch;
+ kal_uint16 OVSFpich;
+ kal_int8 cpich_tx_power;
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+ kal_bool sttd_ind;
+} udps_target_cell_search_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for FS)"
+10670~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for FS)"
+0~511
+@511
+
+[Ts_ccpch] "Timing offset between S-CCPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFs_ccpch] "The OVSF code number of the S-CCPCH (0~SF-1)"
+0~63
+@7
+
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@100
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, 2^(6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A1_UL_Open_Loop_Pwr_Ctrl.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A1_UL_Open_Loop_Pwr_Ctrl.l1v
new file mode 100755
index 0000000..7fd094a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A1_UL_Open_Loop_Pwr_Ctrl.l1v
@@ -0,0 +1,52 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][2_Access]A1: Open Loop Power Control in Uplink"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_UL_OPEN_LOOP_PWR_CTRL
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power; // Didn't decode from SIB3
+ kal_int8 UL_interference; //range: -110~-70 dBm, Didn't decode from SIB7
+
+ kal_uint8 DRX_cycle_length; // Didn't decode from SIB1
+} udps_ul_open_loop_pwr_ctrl_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[max_tx_power] "Maximum allowed UL TX power [dBm] (from 8960)"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm] (from 8960)"
+-110~-70
+@-75
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A2_Tx_On_Off_Time_Mask.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A2_Tx_On_Off_Time_Mask.l1v
new file mode 100755
index 0000000..5ff92e8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A2_Tx_On_Off_Time_Mask.l1v
@@ -0,0 +1,52 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][2_Access]A2: Transmit On/Off Time Mask"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_TX_ON_OFF_TIME_MASK
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power; // Didn't decode from SIB3
+ kal_int8 UL_interference; //range: -110~-70 dBm, Didn't decode from SIB7
+
+ kal_uint8 DRX_cycle_length; // Didn't decode from SIB1
+} udps_tx_on_off_time_mask_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[max_tx_power] "Maximum allowed UL TX power [dBm] (from 8960)"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm] (from 8960)"
+-110~-70
+@-80
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A3_Rx_ACK_on_AICH.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A3_Rx_ACK_on_AICH.l1v
new file mode 100755
index 0000000..95c7652
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A3_Rx_ACK_on_AICH.l1v
@@ -0,0 +1,52 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][2_Access]A3: Correct Behavior when receiving an ACK on AICH"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_RX_ACK_ON_AICH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power; // Didn't decode from SIB3
+ kal_int8 UL_interference; //range: -110~-70 dBm, Didn't decode from SIB7
+
+ kal_uint8 DRX_cycle_length; // Didn't decode from SIB1
+} udps_rx_ack_on_aich_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[max_tx_power] "Maximum allowed UL TX power [dBm] (from 8960)"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm] (from 8960)"
+-110~-70
+@-80
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A4_Rx_No_ACK_on_AICH.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A4_Rx_No_ACK_on_AICH.l1v
new file mode 100755
index 0000000..d0b16b1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A4_Rx_No_ACK_on_AICH.l1v
@@ -0,0 +1,52 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][2_Access]A4: Correct Behavior at Time-out"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_RX_NO_ACK_ON_AICH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power; // Didn't decode from SIB3
+ kal_int8 UL_interference; //range: -110~-70 dBm, Didn't decode from SIB7
+
+ kal_uint8 DRX_cycle_length; // Didn't decode from SIB1
+} udps_rx_no_ack_on_aich_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[max_tx_power] "Maximum allowed UL TX power [dBm] (from 8960)"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm] (from 8960)"
+-110~-70
+@-80
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A5_Rx_NACK_on_AICH.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A5_Rx_NACK_on_AICH.l1v
new file mode 100755
index 0000000..e036d80
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A5_Rx_NACK_on_AICH.l1v
@@ -0,0 +1,180 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][2_Access]A5: Correct Behavior when receiving an NACK on AICH"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_RX_NACK_ON_AICH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ // For PCH not FACH
+ //kal_uint8 Ts_ccpch; // Should be the same as FACH/S_CCPCH
+ //kal_uint16 OVSFs_ccpch; // Should be the same as FACH/S_CCPCH
+ kal_uint16 OVSFpich;
+
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+ // For PCH not FACH
+ kal_int8 pich_power_off; // New added for PCH
+ kal_uint8 DRX_cycle_length; // New added for PCH
+ kal_uint8 PI_num; // New added for PCH
+ kal_uint8 page_occa; // New added for PCH
+ kal_uint32 DRX_index; // New added for PCH
+} udps_rx_nack_on_aich_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10670~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@65535
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+[RACH_TTI] "(RACH) TTI. [Number of frames]"
+@TTI10 1
+TTI20 2
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@150
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@-7
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+/******************************************
+* For PCH not FACH
+******************************************/
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@100
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@-8
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, 2^(6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC12.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC12.l1v
new file mode 100755
index 0000000..dbdba9a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC12.l1v
@@ -0,0 +1,107 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated][CD05]CD05: Demodulation of DCH in Static Propagation Conditions(RMC12.2)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PEF_IN_STATIC_CH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+ kal_uint8 fading_case; //pass to UL1D: 0=static, 1..6=fading case 1..6
+} udps_pef_in_static_ch_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+[fading_case] "(CSD) Fading Case 0: Static, 1~6?"
+0~6
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC144.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC144.l1v
new file mode 100755
index 0000000..2d47f8a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC144.l1v
@@ -0,0 +1,101 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated][CD05]CD05: Demodulation of DCH in Static Propagation Conditions(RMC144)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PEF_IN_STATIC_CH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+} udps_pef_in_static_ch_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_144
+RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@13
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@16
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+@16
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC384.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC384.l1v
new file mode 100755
index 0000000..9f5334d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC384.l1v
@@ -0,0 +1,102 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated][CD05]CD05: Demodulation of DCH in Static Propagation Conditions(RMC384)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PEF_IN_STATIC_CH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+} udps_pef_in_static_ch_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+RMC_12_2
+RMC_64
+@RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@6
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@8
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@16
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC64.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC64.l1v
new file mode 100755
index 0000000..d0b6c72
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC64.l1v
@@ -0,0 +1,102 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated][CD05]CD05: Demodulation of DCH in Static Propagation Conditions(RMC64)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PEF_IN_STATIC_CH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+} udps_pef_in_static_ch_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+RMC_12_2
+@RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@32
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD10/udps_CD10_DL_Pwr_Ctrl_Const_BLER_RMC12.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD10/udps_CD10_DL_Pwr_Ctrl_Const_BLER_RMC12.l1v
new file mode 100755
index 0000000..89cf52e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD10/udps_CD10_DL_Pwr_Ctrl_Const_BLER_RMC12.l1v
@@ -0,0 +1,89 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated][CD10]CD10: Power Control in Downlink, constant BLER target(RMC12)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DL_PWR_CTRL_CONST_BLER
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_int8 target_bler;
+} udps_dl_pwr_ctrl_const_bler_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[target_bler] "(DCH) Diving the value of this field to 10 get the real BLER. -63 ~ 0"
+-63~0
+@-20
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD10/udps_CD10_DL_Pwr_Ctrl_Const_BLER_RMC64.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD10/udps_CD10_DL_Pwr_Ctrl_Const_BLER_RMC64.l1v
new file mode 100755
index 0000000..ced2286
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD10/udps_CD10_DL_Pwr_Ctrl_Const_BLER_RMC64.l1v
@@ -0,0 +1,89 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated][CD10]CD10: Power Control in Downlink, constant BLER target(RMC64)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DL_PWR_CTRL_CONST_BLER
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_int8 target_bler;
+} udps_dl_pwr_ctrl_const_bler_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+RMC_12_2
+@RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[target_bler] "(DCH) Diving the value of this field to 10 get the real BLER. -63 ~ 0"
+-63~0
+@-20
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD13/udps_CD13_Pef_in_SHO_RMC12.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD13/udps_CD13_Pef_in_SHO_RMC12.l1v
new file mode 100755
index 0000000..623f03b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD13/udps_CD13_Pef_in_SHO_RMC12.l1v
@@ -0,0 +1,107 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated][CD13]CD13: Demodulation of DCH in Inter-Cell Soft Handover(RMC12)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PEF_IN_SHO
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2; // for SHO pef, at the same time
+ kal_uint8 Tdpch_rl2; // for SHO pef
+ kal_uint16 OVSFdpch_rl2; // for SHO pef
+} udps_pef_in_sho_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[DOFF_bts2] "(DCH) Default DPCH Offset for BTS2 [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD13/udps_CD13_Pef_in_SHO_RMC64.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD13/udps_CD13_Pef_in_SHO_RMC64.l1v
new file mode 100755
index 0000000..46a29ee
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD13/udps_CD13_Pef_in_SHO_RMC64.l1v
@@ -0,0 +1,107 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated][CD13]CD13: Demodulation of DCH in Inter-Cell Soft Handover(RMC64)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PEF_IN_SHO
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2; // for SHO pef, at the same time
+ kal_uint8 Tdpch_rl2; // for SHO pef
+ kal_uint16 OVSFdpch_rl2; // for SHO pef
+} udps_pef_in_sho_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+RMC_12_2
+@RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[DOFF_bts2] "(DCH) Default DPCH Offset for BTS2 [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_AMR_LoRx01.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_AMR_LoRx01.l1v
new file mode 100644
index 0000000..966ce9b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_AMR_LoRx01.l1v
@@ -0,0 +1,77 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated][LoRx] LoRx01"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_AMR_LORX01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_amr_lorx01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD01_UL_Inner_Loop_Pwr_Ctrl.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD01_UL_Inner_Loop_Pwr_Ctrl.l1v
new file mode 100755
index 0000000..737404e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD01_UL_Inner_Loop_Pwr_Ctrl.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD01: Inner Loop Power Control in Uplink"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_UL_INNER_LOOP_PWR_CTRL
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH only
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 pc_algo;
+ kal_uint8 tpc_step;
+} udps_ul_inner_loop_pwr_ctrl_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[pc_algo] "UL Power control algorithm"
+1~2
+@1
+
+[tpc_step] "UL Power control step size"
+1~2
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD02_Out_of_Sync_Handling.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD02_Out_of_Sync_Handling.l1v
new file mode 100755
index 0000000..723e7ee
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD02_Out_of_Sync_Handling.l1v
@@ -0,0 +1,82 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD02: Out-of-synchronization Handling of Output Power"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_OUT_OF_SYNC_HANDLING
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_out_of_sync_handling_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD03_Change_of_TFC.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD03_Change_of_TFC.l1v
new file mode 100755
index 0000000..544d9f5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD03_Change_of_TFC.l1v
@@ -0,0 +1,74 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD03: Change of TFC"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_CHANGE_OF_TFC
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_change_of_tfc_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD04_UL_Compressed_Mode.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD04_UL_Compressed_Mode.l1v
new file mode 100755
index 0000000..b8ffe27
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD04_UL_Compressed_Mode.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD04: Power Setting in Uplink Compressed Mode"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_UL_COMPRESSED_MODE
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_ul_compressed_mode_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10670~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD09_Pef_in_TX_Div_Mode.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD09_Pef_in_TX_Div_Mode.l1v
new file mode 100755
index 0000000..7c90cb7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD09_Pef_in_TX_Div_Mode.l1v
@@ -0,0 +1,123 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD09: Demodulation of DCH in Downlink Transmit Diversity Mode"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PEF_IN_TX_DIV_MODE
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ tx_diversity_E diversity_mode; // for CD9
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+} udps_pef_in_tx_div_mode_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+@FDD_DL_TX_STTD
+FDD_DL_TX_CLM1
+FDD_DL_TX_CLM2
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~2
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD11_Pef_in_DL_Compressed_Mode.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD11_Pef_in_DL_Compressed_Mode.l1v
new file mode 100755
index 0000000..11c6ef8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD11_Pef_in_DL_Compressed_Mode.l1v
@@ -0,0 +1,117 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD11: Performance of DCH in Downlink Compressed Mode(RMC12)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PEF_IN_DL_COMPRESSED_MODE
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 CM_set_pef; //for CD11
+ kal_uint8 CM_DeltaSIR1; //for CD11
+ kal_uint8 CM_DeltaSIRafter1; //for CD11
+ kal_uint8 CM_tgpl2; // (R99) TGPL2. 1 ~ 144
+ kal_bool self_cal_BLER_CM; // for CD11 only (Seperate BLER calculation)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool sc_change;//for CD11 (CSD: DPC67)
+} udps_pef_in_dl_compressed_mode_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
+
+[CM_set_pef] "compressed mode parameters in table C.5.1 (Set3 for TGL2)"
+@Set1 1
+Set2 2
+Set3 3
+
+[CM_DeltaSIR1] "The Delta SIR1 (0:0.1:3)*10"
+0~30
+@0
+
+[CM_DeltaSIRafter1] "The Delta SIR_AFTER1 (0:0.1:3)*10"
+0~30
+@0
+
+[CM_tgpl2] "(R99)TGPL2 only valid in Test Set 3"
+1~144
+@4
+
+[self_cal_BLER_CM] "Use UDPS to count Seperate CM BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted total (odd+even) Blocks number?"
+@2000
+
+[sc_change] "(CSD) Change the DL Scr Code for CM?"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD12_Pef_of_BTFD.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD12_Pef_of_BTFD.l1v
new file mode 100755
index 0000000..379f3f2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD12_Pef_of_BTFD.l1v
@@ -0,0 +1,74 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD12: Performance of Blind Transport Format Detection (BTFD)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PEF_OF_BTFD
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_pef_of_btfd_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD14_Pef_of_TPC_Combining.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD14_Pef_of_TPC_Combining.l1v
new file mode 100755
index 0000000..d432f27
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD14_Pef_of_TPC_Combining.l1v
@@ -0,0 +1,107 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD14: Combining of TPC Commands from Radio Links of Different Radio Link Sets"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PEF_OF_TPC_COMBINING
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2; // for SHO pef, at the same time
+ kal_uint8 Tdpch_rl2; // for SHO pef
+ kal_uint16 OVSFdpch_rl2; // for SHO pef
+} udps_pef_of_tpc_combining_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[DOFF_bts2] "(DCH) Default DPCH Offset for BTS2 [x512 chips]"
+0~599
+@2
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@4
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD15_Pef_in_SSDT_Pwr_Ctrl.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD15_Pef_in_SSDT_Pwr_Ctrl.l1v
new file mode 100755
index 0000000..5fc6c9a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD15_Pef_in_SSDT_Pwr_Ctrl.l1v
@@ -0,0 +1,103 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD15: Demodulation of DCH in Site Selection Diversity Transmission Power Control Mode (SSDT)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PEF_IN_SSDT_PWR_CTRL
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO pef
+ kal_uint16 OVSFdpch_rl2; // for SHO pef
+ kal_uint8 ssdt_s_bit;
+ kal_uint8 ssdt_CWS_len;
+ kal_uint8 ssdt_id_rl1; // for SSDT
+ kal_uint8 ssdt_id_rl2; // for SSDT
+} udps_pef_in_ssdt_pwr_ctrl_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+
+[ssdt_s_bit] "Number of S_filed bits for SSDT"
+0~2
+
+[ssdt_CWS_len] "Code word set length for SSDT"
+FDD_SSDT_LONG 0
+FDD_SSDT_SHORT 2
+FDD_SSDT_OFF 3
+
+[ssdt_id_rl1] "The SSDT cell id for this RL1. 0~7=A~H. 8 for not applicable"
+0~8
+
+[ssdt_id_rl2] "The SSDT cell id for this RL2. 0~7=A~H. 8 for not applicable"
+0~8
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD16_Active_Set_Update_Delay.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD16_Active_Set_Update_Delay.l1v
new file mode 100755
index 0000000..4d495be
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD16_Active_Set_Update_Delay.l1v
@@ -0,0 +1,103 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD16: FDD/FDD Soft Handover for Active Set Update Delay Verification"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_ACTIVE_SET_UPDATE_DELAY
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+} udps_active_set_update_delay_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD17_TX_Timing_in_SHO.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD17_TX_Timing_in_SHO.l1v
new file mode 100755
index 0000000..778009e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD17_TX_Timing_in_SHO.l1v
@@ -0,0 +1,113 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD17: UE Transmit Timing in SHO Condition"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_TX_TIMING_IN_SHO
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ kal_uint8 ssc_rl1;
+ kal_uint8 ssc_rl2;
+} udps_tx_timing_in_sho_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10630
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@50
+
+
+[ssc_rl1] "ssc_rl1: 0 ~ 15. 0 for the same scrambling code for the P-CPICH "
+0~15
+@1
+
+[ssc_rl2] "ssc_rl2: 0 ~ 15. 0 for the same scrambling code for the P-CPICH "
+0~15
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD18_Intra_Freq_TRHHO_Delay.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD18_Intra_Freq_TRHHO_Delay.l1v
new file mode 100755
index 0000000..326eaa7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD18_Intra_Freq_TRHHO_Delay.l1v
@@ -0,0 +1,107 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD18: FDD/FDD Hard Handover to Intra-frequency Cell for Interruption Time Verification (Timing Re-initialized)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_INTRA_FREQ_TRHHO_DELAY
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2; // for HHO delay
+ kal_uint8 Tdpch_rl2; // for HHO delay
+ kal_uint16 OVSFdpch_rl2; // for HHO delay
+} udps_intra_freq_trhho_delay_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[DOFF_bts2] "(DCH) Default DPCH Offset for BTS2 [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD19_Inter_Freq_TRHHO_Delay.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD19_Inter_Freq_TRHHO_Delay.l1v
new file mode 100755
index 0000000..def8fda
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD19_Inter_Freq_TRHHO_Delay.l1v
@@ -0,0 +1,107 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD19: FDD/FDD Hard Handover to Inter-frequency Cell for Interruption Time Verification (Timing Re-initialized)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_INTER_FREQ_TRHHO_DELAY
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2; // for HHO delay
+ kal_uint8 Tdpch_rl2; // for HHO delay
+ kal_uint16 OVSFdpch_rl2; // for HHO delay
+} udps_inter_freq_trhho_delay_struct; // CD19
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
+
+[DOFF_bts2] "(DCH) Default DPCH Offset for BTS2 [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD20_RRC_Re_estab_Delay.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD20_RRC_Re_estab_Delay.l1v
new file mode 100755
index 0000000..55eab1b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD20_RRC_Re_estab_Delay.l1v
@@ -0,0 +1,171 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD20: RRC Re-establishment Delay for Known Cell"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_RRC_REESTAB_DELAY
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+} udps_rrc_reestab_delay_struct; // CD20
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@65535
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+[RACH_TTI] "(RACH) TTI. [Number of frames]"
+@TTI10 1
+TTI20 2
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@150
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@-7
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD21_Inter_Freq_TMHHO.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD21_Inter_Freq_TMHHO.l1v
new file mode 100755
index 0000000..fb3bfb3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD21_Inter_Freq_TMHHO.l1v
@@ -0,0 +1,103 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD21: FDD HHO to Inter-frequency Cell(Timing Mainitained)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_INTER_FREQ_TMHHO
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ //kal_uint16 DOFF_bts2; // Don't Care for TMHHO
+ kal_uint8 Tdpch_rl2; // for HHO delay
+ kal_uint16 OVSFdpch_rl2; // for HHO delay
+} udps_inter_freq_tmhho_struct; // CD21
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD22_Inter_Freq_TRHHO_Revert.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD22_Inter_Freq_TRHHO_Revert.l1v
new file mode 100755
index 0000000..82b3ccb
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD22_Inter_Freq_TRHHO_Revert.l1v
@@ -0,0 +1,107 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD22: FDD HHO to Inter-frequency Cell failed and REVERT (Timing Re-initialized)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_INTER_FREQ_TRHHO_REVERT
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2; // for HHO delay
+ kal_uint8 Tdpch_rl2; // for HHO delay
+ kal_uint16 OVSFdpch_rl2; // for HHO delay
+} udps_inter_freq_trhho_revert_struct; // CD22
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
+
+[DOFF_bts2] "(DCH) Default DPCH Offset for BTS2 [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD23_Inter_Freq_TMHHO_Revert.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD23_Inter_Freq_TMHHO_Revert.l1v
new file mode 100755
index 0000000..057449d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD23_Inter_Freq_TMHHO_Revert.l1v
@@ -0,0 +1,103 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD23: FDD HHO to Inter-frequency Cell failed and REVERT (Timing Maintained)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_INTER_FREQ_TMHHO_REVERT
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ //kal_uint16 DOFF_bts2; // Don't Care for TMHHO
+ kal_uint8 Tdpch_rl2; // for HHO delay
+ kal_uint16 OVSFdpch_rl2; // for HHO delay
+} udps_inter_freq_tmhho_revert_struct; // CD23
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD24_abort_enter_DCH.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD24_abort_enter_DCH.l1v
new file mode 100755
index 0000000..ffe6c4a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD24_abort_enter_DCH.l1v
@@ -0,0 +1,82 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD24: Verify if the L1 can handle the ABORT mechanism when setup DCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_ABORT_ENTER_DCH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_abort_enter_dch_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD39_BER_test_in_DCH_mode.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD39_BER_test_in_DCH_mode.l1v
new file mode 100755
index 0000000..e266239
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD39_BER_test_in_DCH_mode.l1v
@@ -0,0 +1,64 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD39: BER test in DCH mode (SA/CS request)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_BER_TEST_IN_DCH_MODE
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool all_zero;
+ kal_uint32 reset_cnt;// CD39, SA/CS request
+} udps_ber_test_in_dch_mode_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[all_zero] "All zero or Not?"
+@KAL_TRUE
+
+[reset_cnt] "Number of total bits for RESET"
+@30000
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD40_SADCH_TTI_eighty.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD40_SADCH_TTI_eighty.l1v
new file mode 100755
index 0000000..da0ba15
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD40_SADCH_TTI_eighty.l1v
@@ -0,0 +1,86 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD40: Demodulation of Stand-Alone DCH(TTI=80ms)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_SADCH_TTI_EIGHTY
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD40
+ kal_uint16 count_blks; // for CD40
+} udps_sadch_tti_eighty_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD41_SADCH_TTI_eighty_with_CM.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD41_SADCH_TTI_eighty_with_CM.l1v
new file mode 100755
index 0000000..393e99b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD41_SADCH_TTI_eighty_with_CM.l1v
@@ -0,0 +1,86 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD41: Demodulation of Stand-Alone DCH(TTI=80ms)with CM"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_SADCH_TTI_EIGHTY_WITH_CM
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD41
+ kal_uint16 count_blks; // for CD41
+} udps_sadch_tti_eighty_with_cm_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD50.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD50.l1v
new file mode 100755
index 0000000..b9168ef
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD50.l1v
@@ -0,0 +1,107 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD50: Extened L1S for continuous auto reconfig"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_AUTO_RECONFIG
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+ kal_uint8 fading_case; //pass to UL1D: 0=static, 1..6=fading case 1..6
+} udps_auto_reconfig_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+[fading_case] "(CSD) Fading Case 0: Static, 1~6?"
+0~6
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD51_DCH_FACH_transition.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD51_DCH_FACH_transition.l1v
new file mode 100755
index 0000000..d710414
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD51_DCH_FACH_transition.l1v
@@ -0,0 +1,169 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD51: FDD/FDD DCH - FACH transition triggered by event4A/4B report"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DCH_FACH_TRANSIT
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 pc_algo;
+ kal_uint8 tpc_step;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+ kal_int8 cpich_tx_power; //RACH only
+ kal_bool sttd_ind;
+} udps_dch_fach_transit_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[pc_algo] "UL Power control algorithm"
+1~2
+@1
+
+[tpc_step] "UL Power control step size"
+1~2
+@1
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@65535
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+[RACH_TTI] "(RACH) TTI. [Number of frames]"
+@TTI10 1
+TTI20 2
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@-7
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/udps_Test_Stop.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/udps_Test_Stop.l1v
new file mode 100755
index 0000000..bb3771f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/udps_Test_Stop.l1v
@@ -0,0 +1,13 @@
+{ Validation }
+Title = "[0_3G_Single_Channel]Stop Currently Running Test"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_TEST_STOP2_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct {
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+}dps_test_stop2_req_struct;
+*/
+
+{Parameters}
diff --git a/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp1.l1v b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp1.l1v
new file mode 100755
index 0000000..326bffc
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp1.l1v
@@ -0,0 +1,74 @@
+{ Validation }
+Title = "[10_2G_L1D]L1D Loopback 1"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_L1D_LOOPBACK_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint16 test_id;
+ kal_uint16 test_count;
+} l1d_loopback_req_struct;
+*/
+
+{Parameters}
+
+[test_id] "L1D Loopback Test Items"
+FCCh 1
+SCh 2
+BCCh 3
+SDCCh 4
+RACh 5
+BfeCalibration 6
+TChFS_Speech 7
+TChFS_TimeDrift 8
+TChFS_Data 9
+TChFS_regular 10
+TChFS_facch_13 11
+TChFS_facch_13_17 12
+TChFS_dtx_facch_13_17 13
+TChFS_dtx_facch_4_52 14
+TChFS_dtx_facch_4_8_52_56 15
+TChEFS_Speech 16
+TChEFS_TimeDrift 17
+TChEFS_Data 18
+TChEFS_regular 19
+TChEFS_facch_13 20
+TChEFS_dtx_facch_13_17_56_60_65 21
+TChHS0_Speech 22
+TChHS0_TimeDrift 23
+TChHS0_Data 24
+TChHS0_regular 25
+TChHS0_dtx 26
+TChHS0_dtx_facch_8_17_52_60 27
+TChHS1_Speech 28
+TChHS1_TimeDrift 29
+TChHS1_Data 30
+TChHS1_regular 31
+TChHS1_dtx_facch_9_53_61 32
+TChCSD_144F 33
+TChCSD_96F 34
+TChCSD_48F 35
+TChCSD_24F 36
+TChCSD_48H0 37
+TChCSD_48H1 38
+TChCSD_24H0 39
+TChCSD_24H1 40
+TChCSD_144F_dtx_facch_8_13_17_52_56_60 41
+TCh_SpeechHandover 42
+TCh_SpeechCodecChange 43
+CipherA52_TChFS_Normal 44
+CipherA52_TChFS_Loopback 45
+CipherA52_SDCCh_Normal 46
+CipherA52_SDCCh_Loopback 47
+GPRS_PDTCh_TX 48
+GPRS_PDTCh_RX 49
+GPRS_PBCCh 50
+GPRS_FCChT 51
+GPRS_APC 52
+
+[test_count] "Test Count"
+1~99999
+
diff --git a/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp2.l1v b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp2.l1v
new file mode 100755
index 0000000..3c3c73c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp2.l1v
@@ -0,0 +1,147 @@
+{ Validation }
+Title = "[10_2G_L1D]L1D Loopback 2"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_L1D_LOOPBACK_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint16 test_id;
+ kal_uint16 test_count;
+} l1d_loopback_req_struct;
+*/
+
+{Parameters}
+
+[test_id] "L1D Loopback Test Items"
+SCh 1
+SDCCh 2
+SDCCh_A51 3
+SDCCh_A52 4
+TChFS_dtx_8_77_facch_8_13_52_56_60 5
+TChEFS_dtx_8_77_facch_8_13_52_56_60 6
+TChHS0_dtx_8_77_facch_8_52_60 7
+TChCSD_144F_dtx_8_77_facch_8_13_52_56_60 8
+TChCSD_24HS0_dtx_8_77_facch_8_52_60 9
+TChCSD_48F_dtx_8_77_facch_8_13_56_60 10
+TChCSD_48HS1_dtx_8_77_facch_52_60 11
+TChCSD_96F_dtx_8_77_facch_8_13_52_56_60 12
+TChCSD_24F_dtx_8_77_facch_8_13_52_56_60 13
+TChFS_Speech 14
+TChEFS_Speech 15
+TChHS0_Speech 16
+TChHS1_Speech 17
+DynamicPatch 18
+FCCh 19
+TChAFS1220_regular 20
+TChAFS1020_regular 21
+TChAFS795_regular 22
+TChAFS740_regular 23
+TChAFS670_regular 24
+TChAFS590_regular 25
+TChAFS515_regular 26
+TChAFS475_regular 27
+TChAHS795_regular 28
+TChAHS740_regular 29
+TChAHS670_regular 30
+TChAHS590_regular 31
+TChAHS515_regular 32
+TChAHS475_regular 33
+PDTCh_RXTX 34
+PBCCh 35
+TChAFS1220_dtx_8_26_facch_8_ratscch_13 36
+TChAHS795_dtx_4_26_ratscch_8 37
+TChAFS1220_dtx_8_16_21_24_sidupdate_17 38
+TChAHS795_dtx_4_sidupdate_26_34 39
+TChAFS1220_Speech 40
+TChAFS1020_Speech 41
+TChAFS795_Speech 42
+TChAFS740_Speech 43
+TChAFS670_Speech 44
+TChAFS590_Speech 45
+TChAFS515_Speech 46
+TChAFS475_Speech 47
+TChAFS1220_Speech_dtx 48
+TChAFS1020_Speech_dtx 49
+TChAFS795_Speech_dtx 50
+TChAFS740_Speech_dtx 51
+TChAFS670_Speech_dtx 52
+TChAFS590_Speech_dtx 53
+TChAFS515_Speech_dtx 54
+TChAFS475_Speech_dtx 55
+WaveTable_OneNote 56
+DynamicDownload 57
+WaveTable_SixteenNote 58
+DynamicDownload2 59
+PDTCh_RXTX_WaveTable16 60
+PDTCh_RXTX_WaveTable32 61
+FCCh_SineWave 62
+WaveTable_EightNote 63
+PDTCh_RXTX_WaveTable8 64
+Huffman_Decoder 65
+DAF_Decoder 66
+SDCCh_New 67
+AAC_Huffman_Decoder 68
+AAC_Decoder 69
+WB_AMR_660 70
+WB_AMR_885 71
+WB_AMR_1265 72
+WB_AMR_1425 73
+WB_AMR_1585 74
+WB_AMR_1825 75
+WB_AMR_1985 76
+WB_AMR_2305 77
+WB_AMR_2385 78
+SDCCh_New2 79
+PDTCh_RXTX_AAC_Decoder 80
+PDTCh_RXTX_RXTX_WBAMR2385 81
+TChFS_dtx_8_77_facch_8_13_52_56_60_New 82
+TChFS_Speech_New 83
+TChAFS_INB 84
+TChAHS_INB 85
+AMR_EQ_CI 86
+TChAFS1220_dtx_8_26_facch_4_8_ratscch_13 87
+TChAHS795_dtx_4_12_17_26_ratscch_8 88
+TChAFS1220_dtx_4_21_facch_13_sidupdate_21 89
+TChAHS795_dtx_4_ratscch_21_sidupdate_26_34 90
+FCCh_ScanMode 91
+FCCh_IdleFrame 92
+SCh_New 93
+SDCCh_New3 94
+Post_Process_TS 95
+Post_Process_3D 96
+Via_ROM_Power_Down 97
+AAC_PLUS_Huffman_Decoder 98
+INTX_EQ_BYPASS 99
+INTX2_EQ 100
+INTX4_EQ 101
+EQ_test 102
+AAC_PLUS_Decoder 103
+PDTCh_RXTX_VDO_CAPTURE 104
+PDTCh_RXTX_5tap_148 105
+PDTCh_RXTX_6tap_156 106
+PDTCh_RXTX_6tap_148 107
+DSP_Memory_Test 108
+ADC_Linearity 109
+AFC_Linearity 110
+GPRS_APC 111
+GPRS_RepeatRACh 112
+CTM 113
+SDCCh_NBFilter 114
+SDCCh_WBFilter 115
+PCh 116
+SBC_Enc 117
+TChHS0_dtx_8_26_52_77_facch_0_to_86 118
+TChFS_Speech_CNTR 119
+PDTCh_RXTX_WBAMR2385_AudioDAC 120
+TChFS_Speech_CNTR_BT_COMP 121
+TChFS_Speech_CNTR_BT 122
+TChFS_dtx_8_77_facch_8_13_52_56_60_BFI 123
+TChEFS_dtx_8_77_facch_8_13_52_56_60_BFI 124
+TChHS0_dtx_8_77_facch_8_52_60_BFI 125
+TChAHS590_dtx_4_15_sidupdateINH 126
+[test_count] "Test Count"
+1~99999
+
diff --git a/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp3.l1v b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp3.l1v
new file mode 100755
index 0000000..85a3981
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp3.l1v
@@ -0,0 +1,246 @@
+{ Validation }
+Title = "[10_2G_L1D]L1D Loopback 3"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_L1D_LOOPBACK_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint16 test_id;
+ kal_uint16 test_count;
+} l1d_loopback_req_struct;
+*/
+
+{Parameters}
+
+[test_id] "L1D Loopback Test Items"
+ID_001_SCh 1
+ID_002_SDCCh 2
+ID_003_SDCCh_A51 3
+ID_004_SDCCh_A52 4
+ID_005_TChFS_dtx_8_77_facch_8_13_52_56_60 5
+ID_006_TChEFS_dtx_8_77_facch_8_13_52_56_60 6
+ID_007_TChHS0_dtx_8_77_facch_8_52_60 7
+ID_008_TChCSD_144F_dtx_8_77_facch_8_13_52_56_60 8
+ID_009_TChCSD_24HS0_dtx_8_77_facch_8_52_60 9
+ID_010_TChCSD_48F_dtx_8_77_facch_8_13_56_60 10
+ID_011_TChCSD_48HS1_dtx_8_77_facch_52_60 11
+ID_012_TChCSD_96F_dtx_8_77_facch_8_13_52_56_60 12
+ID_013_TChCSD_24F_dtx_8_77_facch_8_13_52_56_60 13
+ID_014_TChFS_Speech 14
+ID_015_TChEFS_Speech 15
+ID_016_TChHS0_Speech 16
+ID_017_TChHS1_Speech 17
+//ID_018_DynamicPatch 18
+//ID_019_FCCh 19
+ID_020_TChAFS1220_regular 20
+ID_021_TChAFS1020_regular 21
+ID_022_TChAFS795_regular 22
+ID_023_TChAFS740_regular 23
+ID_024_TChAFS670_regular 24
+ID_025_TChAFS590_regular 25
+ID_026_TChAFS515_regular 26
+ID_027_TChAFS475_regular 27
+ID_028_TChAHS795_regular 28
+ID_029_TChAHS740_regular 29
+ID_030_TChAHS670_regular 30
+ID_031_TChAHS590_regular 31
+ID_032_TChAHS515_regular 32
+ID_033_TChAHS475_regular 33
+ID_034_PDTCh_RXTX 34
+ID_035_PBCCh 35
+ID_036_TChAFS1220_dtx_8_26_facch_8_ratscch_13 36
+ID_037_TChAHS795_dtx_4_26_ratscch_8 37
+ID_038_TChAFS1220_dtx_8_16_21_24_sidupdate_17 38
+ID_039_TChAHS795_dtx_4_sidupdate_26_34 39
+//ID_040_TChAFS1220_Speech 40
+//ID_041_TChAFS1020_Speech 41
+//ID_042_TChAFS795_Speech 42
+//ID_043_TChAFS740_Speech 43
+//ID_044_TChAFS670_Speech 44
+//ID_045_TChAFS590_Speech 45
+//ID_046_TChAFS515_Speech 46
+//ID_047_TChAFS475_Speech 47
+//ID_048_TChAFS1220_Speech_dtx 48
+//ID_049_TChAFS1020_Speech_dtx 49
+//ID_050_TChAFS795_Speech_dtx 50
+//ID_051_TChAFS740_Speech_dtx 51
+//ID_052_TChAFS670_Speech_dtx 52
+//ID_053_TChAFS590_Speech_dtx 53
+//ID_054_TChAFS515_Speech_dtx 54
+//ID_055_TChAFS475_Speech_dtx 55
+//ID_056_WaveTable_OneNote 56
+//ID_057_DynamicDownload 57
+//ID_058_WaveTable_SixteenNote 58
+//ID_059_DynamicDownload2 59
+//ID_060_PDTCh_RXTX_WaveTable16 60
+//ID_061_PDTCh_RXTX_WaveTable32 61
+//ID_062_FCCh_SineWave 62
+//ID_063_WaveTable_EightNote 63
+//ID_064_PDTCh_RXTX_WaveTable8 64
+//ID_065_Huffman_Decoder 65
+//ID_066_DAF_Decoder 66
+//ID_067_SDCCh_New 67
+//ID_068_AAC_Huffman_Decoder 68
+//ID_069_AAC_Decoder 69
+//ID_070_WB_AMR_660 70
+//ID_071_WB_AMR_885 71
+//ID_072_WB_AMR_1265 72
+//ID_073_WB_AMR_1425 73
+//ID_074_WB_AMR_1585 74
+//ID_075_WB_AMR_1825 75
+//ID_076_WB_AMR_1985 76
+//ID_077_WB_AMR_2305 77
+//ID_078_WB_AMR_2385 78
+//ID_079_SDCCh_New2 79
+//ID_080_PDTCh_RXTX_AAC_Decoder 80
+//ID_081_PDTCh_RXTX_RXTX_WBAMR2385 81
+ID_082_TChFS_dtx_8_77_facch_8_13_52_56_60_New 82
+//ID_083_TChFS_Speech_New 83
+
+//ID_084_ADC_Linearity 84
+//ID_085_AFC_Linearity 85
+//ID_086_GPRS_APC 86
+//ID_087_GPRS_RepeatRACh 87
+
+ID_088_SDCCh_A53 88
+ID_089_SDCCh_NBFilter 89
+ID_090_SDCCh_WBFilter 90
+ID_091_E5_FCCh_SDCCh 91
+ID_092_E6_FCCh_SCh 92
+
+ID_093_TX_PDTCh_MCS1_P1 93
+ID_094_TX_PDTCh_MCS1_P2 94
+ID_095_TX_PDTCh_MCS2_P1 95
+ID_096_TX_PDTCh_MCS2_P2 96
+ID_097_TX_PDTCh_MCS3_P1 97
+ID_098_TX_PDTCh_MCS3_P2 98
+ID_099_TX_PDTCh_MCS3_P3 99
+ID_100_TX_PDTCh_MCS4_P1 100
+ID_101_TX_PDTCh_MCS4_P2 101
+ID_102_TX_PDTCh_MCS4_P3 102
+ID_103_TX_PDTCh_MCS5_P1 103
+ID_104_TX_PDTCh_MCS5_P2 104
+ID_105_TX_PDTCh_MCS6_P1 105
+ID_106_TX_PDTCh_MCS6_P2 106
+ID_107_TX_PDTCh_MCS7_P1 107
+ID_108_TX_PDTCh_MCS7_P2 108
+ID_109_TX_PDTCh_MCS7_P3 109
+ID_110_TX_PDTCh_MCS8_P1 110
+ID_111_TX_PDTCh_MCS8_P2 111
+ID_112_TX_PDTCh_MCS8_P3 112
+ID_113_TX_PDTCh_MCS9_P1 113
+ID_114_TX_PDTCh_MCS9_P2 114
+ID_115_TX_PDTCh_MCS9_P3 115
+ID_116_TX_PDTCh_MCS1_9_P1_3 116
+
+ID_117_RX_PDTCh_MCS1_P1 117
+ID_118_RX_PDTCh_MCS1_P2 118
+ID_119_RX_PDTCh_MCS2_P1 119
+ID_120_RX_PDTCh_MCS2_P2 120
+ID_121_RX_PDTCh_MCS3_P1 121
+ID_122_RX_PDTCh_MCS3_P2 122
+ID_123_RX_PDTCh_MCS3_P3 123
+ID_124_RX_PDTCh_MCS4_P1 124
+ID_125_RX_PDTCh_MCS4_P2 125
+ID_126_RX_PDTCh_MCS4_P3 126
+ID_127_RX_PDTCh_MCS5_P1 127
+ID_128_RX_PDTCh_MCS5_P2 128
+ID_129_RX_PDTCh_MCS6_P1 129
+ID_130_RX_PDTCh_MCS6_P2 130
+ID_131_RX_PDTCh_MCS7_P1 131
+ID_132_RX_PDTCh_MCS7_P2 132
+ID_133_RX_PDTCh_MCS7_P3 133
+ID_134_RX_PDTCh_MCS8_P1 134
+ID_135_RX_PDTCh_MCS8_P2 135
+ID_136_RX_PDTCh_MCS8_P3 136
+ID_137_RX_PDTCh_MCS9_P1 137
+ID_138_RX_PDTCh_MCS9_P2 138
+ID_139_RX_PDTCh_MCS9_P3 139
+ID_140_RX_PDTCh_MCS1_9_P1_3 140
+
+ID_141_IR_PDTCh_MCS1_IR 141
+ID_142_IR_PDTCh_MCS2_IR 142
+ID_143_IR_PDTCh_MCS3_IR 143
+ID_144_IR_PDTCh_MCS4_IR 144
+ID_145_IR_PDTCh_MCS5_IR 145
+ID_146_IR_PDTCh_MCS6_IR 146
+ID_147_IR_PDTCh_MCS7_IR 147
+ID_148_IR_PDTCh_MCS8_IR 148
+ID_149_IR_PDTCh_MCS9_IR 149
+
+ID_150_IR_PDTCh_MCS1_4_IR 150
+ID_151_IR_PDTCh_MCS1_4_IR2 151
+ID_152_IR_PDTCh_MCS3_3_9_IR 152
+ID_153_IR_PDTCh_MCS3_3_9_IR2 153
+ID_154_IR_PDTCh_MCS9_9_3_IR 154
+ID_155_IR_PDTCh_MCS9_9_3_IR2 155
+ID_156_IR_PDTCh_MCS3_6_9_IR 156
+ID_157_IR_PDTCh_MCS3_6_9_IR2 157
+ID_158_IR_PDTCh_MCS3_6_9_IR3 158
+ID_159_IR_PDTCh_MCS3_6_9_IR4 159
+ID_160_IR_PDTCh_MCS3_6_8_IR 160
+ID_161_IR_PDTCh_MCS3_6_8_IR2 161
+ID_162_IR_PDTCh_MCS3_6_8_IR3 162
+ID_163_IR_PDTCh_MCS3_6_8_IR4 163
+ID_164_IR_PDTCh_MCS2_5_7_IR 164
+ID_165_IR_PDTCh_MCS2_5_7_IR2 165
+ID_166_IR_PDTCh_MCS2_5_7_IR3 166
+ID_167_IR_PDTCh_MCS2_5_7_IR4 167
+ID_168_IR_PDTCh_MCS3_7_9_IR 168
+ID_169_IR_PDTCh_MCS3_7_3_8_IR 169
+ID_170_SRB_4R1T_EGPRS 170
+
+ID_171_E1_FCCh 171
+ID_172_E2_FCCh 172
+ID_173_E3_FCCh 173
+//ID_174_E4_FCCh 174
+ID_175_TChAFS_INB 175
+ID_176_TChAHS_INB 176
+//ID_177_AMR_EQ_CI 177
+ID_178_TChAFS1220_dtx_8_26_facch_4_8_ratscch_13 178
+ID_179_TChAHS795_dtx_4_12_17_26_ratscch_8 179
+ID_180_TChAFS1220_dtx_4_21_facch_13_sidupdate_21 180
+ID_181_TChAHS795_dtx_4_ratscch_21_sidupdate_26_34 181
+//ID_182_Post_Process_TS 182
+//ID_183_Post_Process_3D 183
+//ID_184_Via_ROM_Power_Down 184
+//ID_185_AAC_PLUS_Huffman_Decoder 185
+//ID_186_INTX_EQ_BYPASS 186
+//ID_187_INTX2_EQ 187
+//ID_188_INTX4_EQ 188
+//ID_189_EQ_test 189
+
+ID_190_IR_PDTCh_same_BSN 190
+ID_191_IR_PDTCh_diff_BSN 191
+ID_192_IR_PDTCh_MCS7_5_2_2_IR 192
+ID_193_IR_PDTCh_MCS8_6_3_3_IR 193
+ID_194_IR_PDTCh_MCS9_6_3_3_IR 194
+ID_195_RX_IGAIN 195
+ID_196_E7_FCCh_tcvcxo 196
+ID_197_E8_FCCh_SDCCh_tcvcxo 197
+ID_170_SRB_4R1T_EGPRS 170
+ID_198_SRB_3R2T_EGPRS 198
+ID_199_SRB_2R3T_EGPRS 199
+ID_200_SRB_1R4T_EGPRS 200
+ID_201_E9_FCCh_SineWave 201
+//ID_202_IR_PDTCh_MCS3_6_9_IR4_JPEG_CODEC 202
+//ID_203_IR_PDTCh_MCS3_6_9_IR4_VDO_PHONE 203
+ID_204_IR_PDTCh_MCS3_6_9_IR4_WT 204
+ID_205_IR_PDTCh_MCS6_HIGH_BSN0_IR 205
+ID_206_IR_PDTCh_MCS6_HIGH_BSN1_IR 206
+ID_207_CTM 207
+ID_208_TChHS0_dtx_8_26_52_77_facch_0_to_86 208
+
+//ID_209_TChFS_Speech_CNTR 209
+//ID_210_TChFS_Speech_CNTR_BT_COMP 210
+//ID_211_TChFS_Speech_CNTR_BT 211
+ID_212_FastPCh 212
+ID_213_IR_PDTCh_MCS9_IR_NoTFI_CD 213
+ID_214_IR_PDTCh_MCS9_IR_NoTFI_NoCD 214
+
+[test_count] "Test Count"
+1~99999
+
diff --git a/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp5.l1v b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp5.l1v
new file mode 100755
index 0000000..474cfe7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp5.l1v
@@ -0,0 +1,292 @@
+{ Validation }
+Title = "[10_2G_L1D]L1D Loopback 5"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_L1D_LOOPBACK_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint16 test_id;
+ kal_uint16 test_count;
+} l1d_loopback_req_struct;
+*/
+
+{Parameters}
+
+[test_id] "L1D Loopback Test Items"
+ID_001_SCh 1
+ID_002_SDCCh 2
+ID_003_SDCCh_A51 3
+ID_004_SDCCh_A52 4
+ID_005_TChFS_dtx_8_77_facch_8_13_52_56_60 5
+ID_006_TChEFS_dtx_8_77_facch_8_13_52_56_60 6
+ID_007_TChHS0_dtx_8_77_facch_8_52_60 7
+ID_008_TChCSD_144F_dtx_8_77_facch_8_13_52_56_60 8
+ID_009_TChCSD_24HS0_dtx_8_77_facch_8_52_60 9
+ID_010_TChCSD_48F_dtx_8_77_facch_8_13_56_60 10
+ID_011_TChCSD_48HS1_dtx_8_77_facch_52_60 11
+ID_012_TChCSD_96F_dtx_8_77_facch_8_13_52_56_60 12
+ID_013_TChCSD_24F_dtx_8_77_facch_8_13_52_56_60 13
+ID_014_TChFS_Speech 14
+ID_015_TChEFS_Speech 15
+ID_016_TChHS0_Speech 16
+ID_017_TChHS1_Speech 17
+//ID_018_DynamicPatch 18
+//ID_019_FCCh 19
+ID_020_TChAFS1220_regular 20
+ID_021_TChAFS1020_regular 21
+ID_022_TChAFS795_regular 22
+ID_023_TChAFS740_regular 23
+ID_024_TChAFS670_regular 24
+ID_025_TChAFS590_regular 25
+ID_026_TChAFS515_regular 26
+ID_027_TChAFS475_regular 27
+ID_028_TChAHS795_regular 28
+ID_029_TChAHS740_regular 29
+ID_030_TChAHS670_regular 30
+ID_031_TChAHS590_regular 31
+ID_032_TChAHS515_regular 32
+ID_033_TChAHS475_regular 33
+ID_034_PDTCh_RXTX 34
+ID_035_PBCCh 35
+ID_036_TChAFS1220_dtx_8_26_facch_8_ratscch_13 36
+ID_037_TChAHS795_dtx_4_26_ratscch_8 37
+ID_038_TChAFS1220_dtx_8_16_21_24_sidupdate_17 38
+ID_039_TChAHS795_dtx_4_sidupdate_26_34 39
+//ID_040_TChAFS1220_Speech 40
+//ID_041_TChAFS1020_Speech 41
+//ID_042_TChAFS795_Speech 42
+//ID_043_TChAFS740_Speech 43
+//ID_044_TChAFS670_Speech 44
+//ID_045_TChAFS590_Speech 45
+//ID_046_TChAFS515_Speech 46
+//ID_047_TChAFS475_Speech 47
+//ID_048_TChAFS1220_Speech_dtx 48
+//ID_049_TChAFS1020_Speech_dtx 49
+//ID_050_TChAFS795_Speech_dtx 50
+//ID_051_TChAFS740_Speech_dtx 51
+//ID_052_TChAFS670_Speech_dtx 52
+//ID_053_TChAFS590_Speech_dtx 53
+//ID_054_TChAFS515_Speech_dtx 54
+//ID_055_TChAFS475_Speech_dtx 55
+//ID_056_WaveTable_OneNote 56
+//ID_057_DynamicDownload 57
+//ID_058_WaveTable_SixteenNote 58
+//ID_059_DynamicDownload2 59
+//ID_060_PDTCh_RXTX_WaveTable16 60
+//ID_061_PDTCh_RXTX_WaveTable32 61
+//ID_062_FCCh_SineWave 62
+ID_063_WaveTable_EightNote 63
+ID_064_PDTCh_RXTX_WaveTable8 64
+//ID_065_Huffman_Decoder 65
+//ID_066_DAF_Decoder 66
+//ID_067_SDCCh_New 67
+//ID_068_AAC_Huffman_Decoder 68
+ID_069_AAC_Decoder 69
+//ID_070_WB_AMR_660 70
+//ID_071_WB_AMR_885 71
+//ID_072_WB_AMR_1265 72
+//ID_073_WB_AMR_1425 73
+//ID_074_WB_AMR_1585 74
+//ID_075_WB_AMR_1825 75
+//ID_076_WB_AMR_1985 76
+//ID_077_WB_AMR_2305 77
+//ID_078_WB_AMR_2385 78
+//ID_079_SDCCh_New2 79
+ID_080_PDTCh_RXTX_AAC_Decoder 80
+//ID_081_PDTCh_RXTX_RXTX_WBAMR2385 81
+ID_082_TChFS_dtx_8_77_facch_8_13_52_56_60_New 82
+ID_083_TChFS_Speech_New 83
+
+//ID_084_ADC_Linearity 84
+//ID_085_AFC_Linearity 85
+//ID_086_GPRS_APC 86
+//ID_087_GPRS_RepeatRACh 87
+
+ID_088_SDCCh_A53 88
+ID_089_SDCCh_NBFilter 89
+ID_090_SDCCh_WBFilter 90
+ID_091_E5_FCCh_SDCCh 91
+ID_092_E6_FCCh_SCh 92
+
+ID_093_TX_PDTCh_MCS1_P1 93
+ID_094_TX_PDTCh_MCS1_P2 94
+ID_095_TX_PDTCh_MCS2_P1 95
+ID_096_TX_PDTCh_MCS2_P2 96
+ID_097_TX_PDTCh_MCS3_P1 97
+ID_098_TX_PDTCh_MCS3_P2 98
+ID_099_TX_PDTCh_MCS3_P3 99
+ID_100_TX_PDTCh_MCS4_P1 100
+ID_101_TX_PDTCh_MCS4_P2 101
+ID_102_TX_PDTCh_MCS4_P3 102
+ID_103_TX_PDTCh_MCS5_P1 103
+ID_104_TX_PDTCh_MCS5_P2 104
+ID_105_TX_PDTCh_MCS6_P1 105
+ID_106_TX_PDTCh_MCS6_P2 106
+ID_107_TX_PDTCh_MCS7_P1 107
+ID_108_TX_PDTCh_MCS7_P2 108
+ID_109_TX_PDTCh_MCS7_P3 109
+ID_110_TX_PDTCh_MCS8_P1 110
+ID_111_TX_PDTCh_MCS8_P2 111
+ID_112_TX_PDTCh_MCS8_P3 112
+ID_113_TX_PDTCh_MCS9_P1 113
+ID_114_TX_PDTCh_MCS9_P2 114
+ID_115_TX_PDTCh_MCS9_P3 115
+ID_116_TX_PDTCh_MCS1_9_P1_3 116
+
+ID_117_RX_PDTCh_MCS1_P1 117
+ID_118_RX_PDTCh_MCS1_P2 118
+ID_119_RX_PDTCh_MCS2_P1 119
+ID_120_RX_PDTCh_MCS2_P2 120
+ID_121_RX_PDTCh_MCS3_P1 121
+ID_122_RX_PDTCh_MCS3_P2 122
+ID_123_RX_PDTCh_MCS3_P3 123
+ID_124_RX_PDTCh_MCS4_P1 124
+ID_125_RX_PDTCh_MCS4_P2 125
+ID_126_RX_PDTCh_MCS4_P3 126
+ID_127_RX_PDTCh_MCS5_P1 127
+ID_128_RX_PDTCh_MCS5_P2 128
+ID_129_RX_PDTCh_MCS6_P1 129
+ID_130_RX_PDTCh_MCS6_P2 130
+ID_131_RX_PDTCh_MCS7_P1 131
+ID_132_RX_PDTCh_MCS7_P2 132
+ID_133_RX_PDTCh_MCS7_P3 133
+ID_134_RX_PDTCh_MCS8_P1 134
+ID_135_RX_PDTCh_MCS8_P2 135
+ID_136_RX_PDTCh_MCS8_P3 136
+ID_137_RX_PDTCh_MCS9_P1 137
+ID_138_RX_PDTCh_MCS9_P2 138
+ID_139_RX_PDTCh_MCS9_P3 139
+ID_140_RX_PDTCh_MCS1_9_P1_3 140
+
+ID_141_IR_PDTCh_MCS1_IR 141
+ID_142_IR_PDTCh_MCS2_IR 142
+ID_143_IR_PDTCh_MCS3_IR 143
+ID_144_IR_PDTCh_MCS4_IR 144
+ID_145_IR_PDTCh_MCS5_IR 145
+ID_146_IR_PDTCh_MCS6_IR 146
+ID_147_IR_PDTCh_MCS7_IR 147
+ID_148_IR_PDTCh_MCS8_IR 148
+ID_149_IR_PDTCh_MCS9_IR 149
+
+ID_150_IR_PDTCh_MCS1_4_IR 150
+ID_151_IR_PDTCh_MCS1_4_IR2 151
+ID_152_IR_PDTCh_MCS3_3_9_IR 152
+ID_153_IR_PDTCh_MCS3_3_9_IR2 153
+ID_154_IR_PDTCh_MCS9_9_3_IR 154
+ID_155_IR_PDTCh_MCS9_9_3_IR2 155
+ID_156_IR_PDTCh_MCS3_6_9_IR 156
+ID_157_IR_PDTCh_MCS3_6_9_IR2 157
+ID_158_IR_PDTCh_MCS3_6_9_IR3 158
+ID_159_IR_PDTCh_MCS3_6_9_IR4 159
+ID_160_IR_PDTCh_MCS3_6_8_IR 160
+ID_161_IR_PDTCh_MCS3_6_8_IR2 161
+ID_162_IR_PDTCh_MCS3_6_8_IR3 162
+ID_163_IR_PDTCh_MCS3_6_8_IR4 163
+ID_164_IR_PDTCh_MCS2_5_7_IR 164
+ID_165_IR_PDTCh_MCS2_5_7_IR2 165
+ID_166_IR_PDTCh_MCS2_5_7_IR3 166
+ID_167_IR_PDTCh_MCS2_5_7_IR4 167
+ID_168_IR_PDTCh_MCS3_7_9_IR 168
+ID_169_IR_PDTCh_MCS3_7_3_8_IR 169
+ID_170_SRB_4R1T_EGPRS 170
+
+ID_171_E1_FCCh 171
+ID_172_E2_FCCh 172
+ID_173_E3_FCCh 173
+//ID_174_E4_FCCh 174
+ID_175_TChAFS_INB 175
+ID_176_TChAHS_INB 176
+//ID_177_AMR_EQ_CI 177
+ID_178_TChAFS1220_dtx_8_26_facch_4_8_ratscch_13 178
+ID_179_TChAHS795_dtx_4_12_17_26_ratscch_8 179
+ID_180_TChAFS1220_dtx_4_21_facch_13_sidupdate_21 180
+ID_181_TChAHS795_dtx_4_ratscch_21_sidupdate_26_34 181
+//ID_182_Post_Process_TS 182
+//ID_183_Post_Process_3D 183
+//ID_184_Via_ROM_Power_Down 184
+//ID_185_AAC_PLUS_Huffman_Decoder 185
+//ID_186_INTX_EQ_BYPASS 186
+//ID_187_INTX2_EQ 187
+//ID_188_INTX4_EQ 188
+//ID_189_EQ_test 189
+
+ID_190_IR_PDTCh_same_BSN 190
+ID_191_IR_PDTCh_diff_BSN 191
+ID_192_IR_PDTCh_MCS7_5_2_2_IR 192
+ID_193_IR_PDTCh_MCS8_6_3_3_IR 193
+ID_194_IR_PDTCh_MCS9_6_3_3_IR 194
+ID_195_RX_IGAIN 195
+ID_196_E7_FCCh_tcvcxo 196
+ID_197_E8_FCCh_SDCCh_tcvcxo 197
+ID_198_SRB_3R2T_EGPRS 198
+ID_199_SRB_2R3T_EGPRS 199
+ID_200_SRB_1R4T_EGPRS 200
+ID_201_E9_FCCh_SineWave 201
+//ID_202_IR_PDTCh_MCS3_6_9_IR4_JPEG_CODEC 202
+//ID_203_IR_PDTCh_MCS3_6_9_IR4_VDO_PHONE 203
+ID_204_IR_PDTCh_MCS3_6_9_IR4_WT 204
+ID_205_IR_PDTCh_MCS6_HIGH_BSN0_IR 205
+ID_206_IR_PDTCh_MCS6_HIGH_BSN1_IR 206
+ID_207_CTM 207
+ID_208_TChHS0_dtx_8_26_52_77_facch_0_to_86 208
+
+//ID_209_TChFS_Speech_CNTR 209
+//ID_210_TChFS_Speech_CNTR_BT_COMP 210
+//ID_211_TChFS_Speech_CNTR_BT 211
+ID_212_FastPCh 212
+ID_213_IR_PDTCh_MCS9_IR_NoTFI_CD 213
+ID_214_IR_PDTCh_MCS9_IR_NoTFI_NoCD 214
+
+ID_215_TChAHS590_dtx_4_15_sidupdateINH 215
+ID_216_PDTCh_CS4_CRC_Correction 216
+ID_217_PDTCh_CS4_CRC_Correction_Fail 217
+ID_218_PDTCh_RXTX_SAIC_dynamic 218
+ID_219_TChFS_dtx_8_77_facch_8_13_52_56_60_SAIC_dynamic 219
+ID_220_PDTCh_AMR1120_AudioDAC 220
+//ID_221_E10_FCCh_SCh_stage3 221
+ID_222_PDTCh_PM 222
+//ID_223_E11_FCCh_SCh_stage3_DCM 223
+//ID_224_P7_INTX2_DSP_EQ 224
+//ID_225_P8_INTX4_DSP_EQ 225
+ID_226_PBCCh_FireCode_Correction_ON 226
+//ID_227_PBCCh_FireCode_Correction_OFF 227
+
+ID_228_AAC_PLUS_Decoder 228
+ID_229_TChFS_Speech_AFE 229
+ID_230_PDTCh_MCS1_9_P1_3_RX_SAIC_off 230
+ID_231_TChFS_dtx_8_77_facch_8_13_52_56_60_SAIC_off 231
+ID_232_AGCSRC_4k_Speech 232
+ID_233_AGCSRC_8k_Speech 233
+//ID_234_ENHANCED_TURBO_SLEEP_MODE 234
+ID_235_PDTCh_MCS1_9_P1_3_RX_SAIC_dynamic 235
+ID_236_OneBurstPCh 236
+//ID_237_PDTCH_BFE_FIR_NB 237
+//ID_238_PDTCH_BFE_FIR_WB 238
+
+ID_239_SDCCh_A53_DSP 239
+//ID_240_TChFS_Speech_CNTR_BT_COMP_Gain 240
+//ID_241_TChFS_Speech_CNTR_BT_Gain 241
+//ID_242_TChFS_Speech_CNTR_BT_COMP_SgnExt 242
+//ID_243_TChFS_Speech_CNTR_BT_SgnExt 243
+//ID_244_TChFS_Speech_AFE_FltOff 244
+//ID_245_TChFS_Speech_AFE_20msBlk 245
+//ID_246_TChFS_Speech_AFE_20msBlk_FltOff 246
+//ID_247_ENHANCED_TURBO_SLEEP_MODE_EINT 247
+//ID_248_OneBurstPCh_7PM 248
+ID_249_Divider_Test 249
+
+//ID_250_IR19_Bus_Concurrent 250
+//ID_251_PDTCh_1R_PM_DSP2MCU_Interrupt 251
+//ID_252_Enhanced_Turbo_Sleep_Mode_65NM_PDN 252
+//ID_253_IRDGB_for_65NM_PDN 253
+//ID_254_UL_DL_SRC_and_DAGC_8k_mode_WB 254
+//ID_255_TDMA_Wrap_Count_Test 255
+ID_256_TChFS_dtx_8_77_facch_8_13_52_56_60_HybridSAIC 256
+ID_257_TCh_HS0_DTX_8_77_mode_with_3_FACCH_8_52_60_BFIPATCH 257
+
+[test_count] "Test Count"
+1~99999
+
diff --git a/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp5_23.l1v b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp5_23.l1v
new file mode 100755
index 0000000..854d724
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp5_23.l1v
@@ -0,0 +1,283 @@
+{ Validation }
+Title = "[10_2G_L1D]L1D Loopback 5 (23)"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_L1D_LOOPBACK_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint16 test_id;
+ kal_uint16 test_count;
+} l1d_loopback_req_struct;
+*/
+
+{Parameters}
+
+[test_id] "L1D Loopback Test Items"
+ID_001_SCh 1
+ID_002_SDCCh 2
+ID_003_SDCCh_A51 3
+ID_004_SDCCh_A52 4
+ID_005_TChFS_dtx_8_77_facch_8_13_52_56_60 5
+ID_006_TChEFS_dtx_8_77_facch_8_13_52_56_60 6
+ID_007_TChHS0_dtx_8_77_facch_8_52_60 7
+ID_008_TChCSD_144F_dtx_8_77_facch_8_13_52_56_60 8
+ID_009_TChCSD_24HS0_dtx_8_77_facch_8_52_60 9
+ID_010_TChCSD_48F_dtx_8_77_facch_8_13_56_60 10
+ID_011_TChCSD_48HS1_dtx_8_77_facch_52_60 11
+ID_012_TChCSD_96F_dtx_8_77_facch_8_13_52_56_60 12
+ID_013_TChCSD_24F_dtx_8_77_facch_8_13_52_56_60 13
+ID_014_TChFS_Speech 14
+ID_015_TChEFS_Speech 15
+ID_016_TChHS0_Speech 16
+ID_017_TChHS1_Speech 17
+//ID_018_DynamicPatch 18
+//ID_019_FCCh 19
+ID_020_TChAFS1220_regular 20
+ID_021_TChAFS1020_regular 21
+ID_022_TChAFS795_regular 22
+ID_023_TChAFS740_regular 23
+ID_024_TChAFS670_regular 24
+ID_025_TChAFS590_regular 25
+ID_026_TChAFS515_regular 26
+ID_027_TChAFS475_regular 27
+ID_028_TChAHS795_regular 28
+ID_029_TChAHS740_regular 29
+ID_030_TChAHS670_regular 30
+ID_031_TChAHS590_regular 31
+ID_032_TChAHS515_regular 32
+ID_033_TChAHS475_regular 33
+ID_034_PDTCh_RXTX 34
+ID_035_PBCCh 35
+ID_036_TChAFS1220_dtx_8_26_facch_8_ratscch_13 36
+ID_037_TChAHS795_dtx_4_26_ratscch_8 37
+ID_038_TChAFS1220_dtx_8_16_21_24_sidupdate_17 38
+ID_039_TChAHS795_dtx_4_sidupdate_26_34 39
+//ID_040_TChAFS1220_Speech 40
+//ID_041_TChAFS1020_Speech 41
+//ID_042_TChAFS795_Speech 42
+//ID_043_TChAFS740_Speech 43
+//ID_044_TChAFS670_Speech 44
+//ID_045_TChAFS590_Speech 45
+//ID_046_TChAFS515_Speech 46
+//ID_047_TChAFS475_Speech 47
+//ID_048_TChAFS1220_Speech_dtx 48
+//ID_049_TChAFS1020_Speech_dtx 49
+//ID_050_TChAFS795_Speech_dtx 50
+//ID_051_TChAFS740_Speech_dtx 51
+//ID_052_TChAFS670_Speech_dtx 52
+//ID_053_TChAFS590_Speech_dtx 53
+//ID_054_TChAFS515_Speech_dtx 54
+//ID_055_TChAFS475_Speech_dtx 55
+//ID_056_WaveTable_OneNote 56
+//ID_057_DynamicDownload 57
+//ID_058_WaveTable_SixteenNote 58
+//ID_059_DynamicDownload2 59
+//ID_060_PDTCh_RXTX_WaveTable16 60
+//ID_061_PDTCh_RXTX_WaveTable32 61
+//ID_062_FCCh_SineWave 62
+//ID_063_WaveTable_EightNote 63
+//ID_064_PDTCh_RXTX_WaveTable8 64
+//ID_065_Huffman_Decoder 65
+//ID_066_DAF_Decoder 66
+//ID_067_SDCCh_New 67
+//ID_068_AAC_Huffman_Decoder 68
+//ID_069_AAC_Decoder 69
+//ID_070_WB_AMR_660 70
+//ID_071_WB_AMR_885 71
+//ID_072_WB_AMR_1265 72
+//ID_073_WB_AMR_1425 73
+//ID_074_WB_AMR_1585 74
+//ID_075_WB_AMR_1825 75
+//ID_076_WB_AMR_1985 76
+//ID_077_WB_AMR_2305 77
+//ID_078_WB_AMR_2385 78
+//ID_079_SDCCh_New2 79
+//ID_080_PDTCh_RXTX_AAC_Decoder 80
+//ID_081_PDTCh_RXTX_RXTX_WBAMR2385 81
+ID_082_TChFS_dtx_8_77_facch_8_13_52_56_60_New 82
+//ID_083_TChFS_Speech_New 83
+
+//ID_084_ADC_Linearity 84
+//ID_085_AFC_Linearity 85
+//ID_086_GPRS_APC 86
+//ID_087_GPRS_RepeatRACh 87
+
+ID_088_SDCCh_A53 88
+ID_089_SDCCh_NBFilter 89
+ID_090_SDCCh_WBFilter 90
+ID_091_E5_FCCh_SDCCh 91
+ID_092_E6_FCCh_SCh 92
+
+//ID_093_TX_PDTCh_MCS1_P1 93
+//ID_094_TX_PDTCh_MCS1_P2 94
+//ID_095_TX_PDTCh_MCS2_P1 95
+//ID_096_TX_PDTCh_MCS2_P2 96
+//ID_097_TX_PDTCh_MCS3_P1 97
+//ID_098_TX_PDTCh_MCS3_P2 98
+//ID_099_TX_PDTCh_MCS3_P3 99
+//ID_100_TX_PDTCh_MCS4_P1 100
+//ID_101_TX_PDTCh_MCS4_P2 101
+//ID_102_TX_PDTCh_MCS4_P3 102
+//ID_103_TX_PDTCh_MCS5_P1 103
+//ID_104_TX_PDTCh_MCS5_P2 104
+//ID_105_TX_PDTCh_MCS6_P1 105
+//ID_106_TX_PDTCh_MCS6_P2 106
+//ID_107_TX_PDTCh_MCS7_P1 107
+//ID_108_TX_PDTCh_MCS7_P2 108
+//ID_109_TX_PDTCh_MCS7_P3 109
+//ID_110_TX_PDTCh_MCS8_P1 110
+//ID_111_TX_PDTCh_MCS8_P2 111
+//ID_112_TX_PDTCh_MCS8_P3 112
+//ID_113_TX_PDTCh_MCS9_P1 113
+//ID_114_TX_PDTCh_MCS9_P2 114
+//ID_115_TX_PDTCh_MCS9_P3 115
+//ID_116_TX_PDTCh_MCS1_9_P1_3 116
+
+//ID_117_RX_PDTCh_MCS1_P1 117
+//ID_118_RX_PDTCh_MCS1_P2 118
+//ID_119_RX_PDTCh_MCS2_P1 119
+//ID_120_RX_PDTCh_MCS2_P2 120
+//ID_121_RX_PDTCh_MCS3_P1 121
+//ID_122_RX_PDTCh_MCS3_P2 122
+//ID_123_RX_PDTCh_MCS3_P3 123
+//ID_124_RX_PDTCh_MCS4_P1 124
+//ID_125_RX_PDTCh_MCS4_P2 125
+//ID_126_RX_PDTCh_MCS4_P3 126
+//ID_127_RX_PDTCh_MCS5_P1 127
+//ID_128_RX_PDTCh_MCS5_P2 128
+//ID_129_RX_PDTCh_MCS6_P1 129
+//ID_130_RX_PDTCh_MCS6_P2 130
+//ID_131_RX_PDTCh_MCS7_P1 131
+//ID_132_RX_PDTCh_MCS7_P2 132
+//ID_133_RX_PDTCh_MCS7_P3 133
+//ID_134_RX_PDTCh_MCS8_P1 134
+//ID_135_RX_PDTCh_MCS8_P2 135
+//ID_136_RX_PDTCh_MCS8_P3 136
+//ID_137_RX_PDTCh_MCS9_P1 137
+//ID_138_RX_PDTCh_MCS9_P2 138
+//ID_139_RX_PDTCh_MCS9_P3 139
+//ID_140_RX_PDTCh_MCS1_9_P1_3 140
+
+//ID_141_IR_PDTCh_MCS1_IR 141
+//ID_142_IR_PDTCh_MCS2_IR 142
+//ID_143_IR_PDTCh_MCS3_IR 143
+//ID_144_IR_PDTCh_MCS4_IR 144
+//ID_145_IR_PDTCh_MCS5_IR 145
+//ID_146_IR_PDTCh_MCS6_IR 146
+//ID_147_IR_PDTCh_MCS7_IR 147
+//ID_148_IR_PDTCh_MCS8_IR 148
+//ID_149_IR_PDTCh_MCS9_IR 149
+
+//ID_150_IR_PDTCh_MCS1_4_IR 150
+//ID_151_IR_PDTCh_MCS1_4_IR2 151
+//ID_152_IR_PDTCh_MCS3_3_9_IR 152
+//ID_153_IR_PDTCh_MCS3_3_9_IR2 153
+//ID_154_IR_PDTCh_MCS9_9_3_IR 154
+//ID_155_IR_PDTCh_MCS9_9_3_IR2 155
+//ID_156_IR_PDTCh_MCS3_6_9_IR 156
+//ID_157_IR_PDTCh_MCS3_6_9_IR2 157
+//ID_158_IR_PDTCh_MCS3_6_9_IR3 158
+//ID_159_IR_PDTCh_MCS3_6_9_IR4 159
+//ID_160_IR_PDTCh_MCS3_6_8_IR 160
+//ID_161_IR_PDTCh_MCS3_6_8_IR2 161
+//ID_162_IR_PDTCh_MCS3_6_8_IR3 162
+//ID_163_IR_PDTCh_MCS3_6_8_IR4 163
+//ID_164_IR_PDTCh_MCS2_5_7_IR 164
+//ID_165_IR_PDTCh_MCS2_5_7_IR2 165
+//ID_166_IR_PDTCh_MCS2_5_7_IR3 166
+//ID_167_IR_PDTCh_MCS2_5_7_IR4 167
+//ID_168_IR_PDTCh_MCS3_7_9_IR 168
+//ID_169_IR_PDTCh_MCS3_7_3_8_IR 169
+//ID_170_SRB_4R1T_EGPRS 170
+
+ID_171_E1_FCCh 171
+ID_172_E2_FCCh 172
+ID_173_E3_FCCh 173
+//ID_174_E4_FCCh 174
+ID_175_TChAFS_INB 175
+ID_176_TChAHS_INB 176
+//ID_177_AMR_EQ_CI 177
+ID_178_TChAFS1220_dtx_8_26_facch_4_8_ratscch_13 178
+ID_179_TChAHS795_dtx_4_12_17_26_ratscch_8 179
+ID_180_TChAFS1220_dtx_4_21_facch_13_sidupdate_21 180
+ID_181_TChAHS795_dtx_4_ratscch_21_sidupdate_26_34 181
+//ID_182_Post_Process_TS 182
+//ID_183_Post_Process_3D 183
+//ID_184_Via_ROM_Power_Down 184
+//ID_185_AAC_PLUS_Huffman_Decoder 185
+//ID_186_INTX_EQ_BYPASS 186
+//ID_187_INTX2_EQ 187
+//ID_188_INTX4_EQ 188
+//ID_189_EQ_test 189
+
+//ID_190_IR_PDTCh_same_BSN 190
+//ID_191_IR_PDTCh_diff_BSN 191
+//ID_192_IR_PDTCh_MCS7_5_2_2_IR 192
+//ID_193_IR_PDTCh_MCS8_6_3_3_IR 193
+//ID_194_IR_PDTCh_MCS9_6_3_3_IR 194
+ID_195_RX_IGAIN 195
+ID_196_E7_FCCh_tcvcxo 196
+ID_197_E8_FCCh_SDCCh_tcvcxo 197
+//ID_198_SRB_3R2T_EGPRS 198
+//ID_199_SRB_2R3T_EGPRS 199
+//ID_200_SRB_1R4T_EGPRS 200
+ID_201_E9_FCCh_SineWave 201
+//ID_202_IR_PDTCh_MCS3_6_9_IR4_JPEG_CODEC 202
+//ID_203_IR_PDTCh_MCS3_6_9_IR4_VDO_PHONE 203
+//ID_204_IR_PDTCh_MCS3_6_9_IR4_WT 204
+//ID_205_IR_PDTCh_MCS6_HIGH_BSN0_IR 205
+//ID_206_IR_PDTCh_MCS6_HIGH_BSN1_IR 206
+ID_207_CTM 207
+ID_208_TChHS0_dtx_8_26_52_77_facch_0_to_86 208
+
+//ID_209_TChFS_Speech_CNTR 209
+//ID_210_TChFS_Speech_CNTR_BT_COMP 210
+//ID_211_TChFS_Speech_CNTR_BT 211
+ID_212_FastPCh 212
+//ID_213_IR_PDTCh_MCS9_IR_NoTFI_CD 213
+//ID_214_IR_PDTCh_MCS9_IR_NoTFI_NoCD 214
+
+ID_215_TChAHS590_dtx_4_15_sidupdateINH 215
+ID_216_PDTCh_CS4_CRC_Correction 216
+ID_217_PDTCh_CS4_CRC_Correction_Fail 217
+ID_218_PDTCh_RXTX_SAIC_dynamic 218
+ID_219_TChFS_dtx_8_77_facch_8_13_52_56_60_SAIC_dynamic 219
+//ID_220_PDTCh_AMR1120_AudioDAC 220
+//ID_221_E10_FCCh_SCh_stage3 221
+ID_222_PDTCh_PM 222
+//ID_223_E11_FCCh_SCh_stage3_DCM 223
+//ID_224_P7_INTX2_DSP_EQ 224
+//ID_225_P8_INTX4_DSP_EQ 225
+ID_226_PBCCh_FireCode_Correction_ON 226
+//ID_227_PBCCh_FireCode_Correction_OFF 227
+
+//ID_228_AAC_PLUS_Decoder 228
+//ID_229_TChFS_Speech_AFE 229
+//ID_230_PDTCh_MCS1_9_P1_3_RX_SAIC_off 230
+//ID_231_TChFS_dtx_8_77_facch_8_13_52_56_60_SAIC_off 231
+//ID_232_AGCSRC_4k_Speech 232
+//ID_233_AGCSRC_8k_Speech 233
+//ID_234_ENHANCED_TURBO_SLEEP_MODE 234
+//ID_235_PDTCh_MCS1_9_P1_3_RX_SAIC_dynamic 235
+//ID_236_OneBurstPCh 236
+//ID_237_PDTCH_BFE_FIR_NB 237
+//ID_238_PDTCH_BFE_FIR_WB 238
+
+//ID_239_SDCCh_A53_DSP 239
+//ID_240_TChFS_Speech_CNTR_BT_COMP_Gain 240
+//ID_241_TChFS_Speech_CNTR_BT_Gain 241
+//ID_242_TChFS_Speech_CNTR_BT_COMP_SgnExt 242
+//ID_243_TChFS_Speech_CNTR_BT_SgnExt 243
+//ID_244_TChFS_Speech_AFE_FltOff 244
+//ID_245_TChFS_Speech_AFE_20msBlk 245
+//ID_246_TChFS_Speech_AFE_20msBlk_FltOff 246
+//ID_247_ENHANCED_TURBO_SLEEP_MODE_EINT 247
+//ID_248_OneBurstPCh_7PM 248
+//ID_249_Divider_Test 249
+
+[test_count] "Test Count"
+1~99999
+
diff --git a/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp6.l1v b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp6.l1v
new file mode 100755
index 0000000..4a49c8e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp6.l1v
@@ -0,0 +1,280 @@
+{ Validation }
+Title = "[10_2G_L1D]L1D Loopback 6"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_L1D_LOOPBACK_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint16 test_id;
+ kal_uint16 test_count;
+} l1d_loopback_req_struct;
+*/
+
+{Parameters}
+
+[test_id] "L1D Loopback Test Items"
+
+ID_001_SCh 1
+ID_002_SDCCh 2
+ID_003_SDCCh_A51 3
+ID_004_SDCCh_A52 4
+ID_005_SDCCh_A53 5
+ID_006_SDCCh_NBFilter 6
+ID_007_SDCCh_WBFilter 7
+ID_008_TChFS_dtx_8_77_facch_8_13_52_56_60 8
+ID_009_TChFS_dtx_8_77_facch_8_13_52_56_60_New 9
+ID_010_TChFS_dtx_8_77_facch_8_13_52_56_60_SAIC_off 10
+ID_011_TChEFS_dtx_8_77_facch_8_13_52_56_60 11
+ID_012_TChHS0_dtx_8_77_facch_8_52_60 12
+ID_013_TChHS0_dtx_8_26_52_77_facch_0_to_86 13
+ID_014_TChCSD_144F_dtx_8_77_facch_8_13_52_56_60 14
+ID_015_TChCSD_24HS0_dtx_8_77_facch_8_52_60 15
+ID_016_TChCSD_48F_dtx_8_77_facch_8_13_56_60 16
+ID_017_TChCSD_48HS1_dtx_8_77_facch_52_60 17
+ID_018_TChCSD_96F_dtx_8_77_facch_8_13_52_56_60 18
+ID_019_TChCSD_24F_dtx_8_77_facch_8_13_52_56_60 19
+ID_020_PDTCh_RXTX 20
+ID_021_PBCCh 21
+ID_022_E5_FCCh_SDCCh 22
+ID_023_E6_FCCh_SCh 23
+ID_024_E1_FCCh 24
+ID_025_E2_FCCh 25
+ID_026_E3_FCCh 26
+ID_027_E7_IGAIN 27
+ID_028_E7_FCCh 28
+ID_029_E8_FCCh_SDCCh 29
+ID_030_E9_FCCh_SineWave 30
+ID_031_FastPCh 31
+ID_032_PDTCh_RX_SAIC_dynamic 32
+ID_033_TChFS_dtx_8_77_facch_8_13_52_56_60_SAIC_dynamic 33
+ID_034_E10_FCCh_SCh_stage3 34
+ID_035_PDTCh_1R_PM 35
+ID_036_E11_FCCh_SCh_stage3_DCM 36
+ID_037_PBCCh_FireCode_Correction_ON 37
+ID_039_A15_OneBurstPCh 39
+ID_040_A16_OneBurstPCh_7PM 40
+ID_041_K11_PDTCh_PM_DSP2MCU_INT 41
+ID_042_TChFS_dtx_8_77_facch_8_13_52_56_60_HybridSAIC 42
+ID_043_TChHS0_dtx_8_77_facch_8_52_60_BFIPATCH 43
+ID_044_TChFS_RepeatedFACCH 44
+ID_045_TChHS0_RepeatedFACCH 45
+//ID_046_E11_FB_Sniffer_FCCh_Recursive_SCh 46
+ID_047_FWBW_DCOC 47
+ID_048_A17_OneBurstPCh_Empty 48
+ID_049_A19_8PM 49
+ID_050_A20_RACH 50
+ID_051_SDCCh_A53_NoTxCipher 51
+ID_052_K11_PDTCh_PM_DSP2MCU_INT_use_win6_win7 52
+
+ID_053_B11_TChFS_Speech 53
+ID_054_D8_TChHS0_Speech 54
+ID_055_C8_TChEFS_Speech 55
+ID_056_R48_TCHAFS1220_speech 56
+ID_057_R47_TCHWFS1265_speech 57
+ID_058_B11_TChFS_Speech_30s 58
+ID_059_R47_TCHWFS1265_speech_30s 59
+
+ID_060_TChAFS1220_regular 60
+ID_061_TChAFS1020_regular 61
+ID_062_TChAFS795_regular 62
+ID_063_TChAFS740_regular 63
+ID_064_TChAFS670_regular 64
+ID_065_TChAFS590_regular 65
+ID_066_TChAFS515_regular 66
+ID_067_TChAFS475_regular 67
+ID_068_TChAHS795_regular 68
+ID_069_TChAHS740_regular 69
+ID_070_TChAHS670_regular 70
+ID_071_TChAHS590_regular 71
+ID_072_TChAHS515_regular 72
+ID_073_TChAHS475_regular 73
+ID_074_TChAFS1220_dtx_8_26_facch_8_ratscch_13 74
+ID_075_TChAHS795_dtx_4_26_ratscch_8 75
+ID_076_TChAFS1220_dtx_8_16_21_24_sidupdate_17 76
+ID_077_TChAHS795_dtx_4_sidupdate_26_34 77
+ID_078_TChAFS_INB 78
+ID_079_TChAHS_INB 79
+ID_080_TChAFS1220_dtx_8_26_facch_4_8_ratscch_13 80
+ID_081_TChAHS795_dtx_4_12_17_26_ratscch_8 81
+ID_082_TChAFS1220_dtx_4_21_facch_13_sidupdate_21 82
+ID_083_TChAHS795_dtx_4_ratscch_21_sidupdate_26_34 83
+ID_084_TChAHS590_dtx_4_15_sidupdateINH 84
+ID_085_TCHAHS475_dtx_4_7_13_77 85
+ID_086_TCHAHS670_dtx_13_16_30_52_FACCH_0_17_43 86
+ID_087_TCHAHS795_dtx_13_16_30_52_RATSCCH_0_17_43 87
+ID_088_TCHAHS515_dtx_4_24_RATSCCH_13_FACCH_17 88
+ID_089_TCHAFS670_dtx_4_29_FACCH_8_43 89
+ID_090_TCHAFS740_dtx_4_29_RATSCCH_8_39_FACCH_39 90
+ID_091_TChWFS1265_regular 91
+ID_092_TChWFS885_regular 92
+ID_093_TChWFS660_regular 93
+ID_094_TChWFS1265_DTX_4_29_FACCH_8_43 94
+ID_095_TChWFS885_DTX_4_29_RATSCCH_8_43 95
+ID_096_TChWFS_660_DTX_4_7_21_52_RATSCCH_13_FACCH_43 96
+
+ID_102_PDTCh_MCS1_P1_TX 102
+ID_103_PDTCh_MCS1_P2_TX 103
+ID_104_PDTCh_MCS2_P1_TX 104
+ID_105_PDTCh_MCS2_P2_TX 105
+ID_106_PDTCh_MCS3_P1_TX 106
+ID_107_PDTCh_MCS3_P2_TX 107
+ID_108_PDTCh_MCS3_P3_TX 108
+ID_109_PDTCh_MCS4_P1_TX 109
+ID_110_PDTCh_MCS4_P2_TX 110
+ID_111_PDTCh_MCS4_P3_TX 111
+ID_112_PDTCh_MCS5_P1_TX 112
+ID_113_PDTCh_MCS5_P2_TX 113
+ID_114_PDTCh_MCS6_P1_TX 114
+ID_115_PDTCh_MCS6_P2_TX 115
+ID_116_PDTCh_MCS7_P1_TX 116
+ID_117_PDTCh_MCS7_P2_TX 117
+ID_118_PDTCh_MCS7_P3_TX 118
+ID_119_PDTCh_MCS8_P1_TX 119
+ID_120_PDTCh_MCS8_P2_TX 120
+ID_121_PDTCh_MCS8_P3_TX 121
+ID_122_PDTCh_MCS9_P1_TX 122
+ID_123_PDTCh_MCS9_P2_TX 123
+ID_124_PDTCh_MCS9_P3_TX 124
+ID_125_PDTCh_MCS1_9_P1_3_TX 125
+ID_126_PDTCh_MCS3_6_Padding_TX 126
+
+ID_131_PDTCh_MCS1_P1_RX 131
+ID_132_PDTCh_MCS1_P2_RX 132
+ID_133_PDTCh_MCS2_P1_RX 133
+ID_134_PDTCh_MCS2_P2_RX 134
+ID_135_PDTCh_MCS3_P1_RX 135
+ID_136_PDTCh_MCS3_P2_RX 136
+ID_137_PDTCh_MCS3_P3_RX 137
+ID_138_PDTCh_MCS4_P1_RX 138
+ID_139_PDTCh_MCS4_P2_RX 139
+ID_140_PDTCh_MCS4_P3_RX 140
+ID_141_PDTCh_MCS5_P1_RX 141
+ID_142_PDTCh_MCS5_P2_RX 142
+ID_143_PDTCh_MCS6_P1_RX 143
+ID_144_PDTCh_MCS6_P2_RX 144
+ID_145_PDTCh_MCS7_P1_RX 145
+ID_146_PDTCh_MCS7_P2_RX 146
+ID_147_PDTCh_MCS7_P3_RX 147
+ID_148_PDTCh_MCS8_P1_RX 148
+ID_149_PDTCh_MCS8_P2_RX 149
+ID_150_PDTCh_MCS8_P3_RX 150
+ID_151_PDTCh_MCS9_P1_RX 151
+ID_152_PDTCh_MCS9_P2_RX 152
+ID_153_PDTCh_MCS9_P3_RX 153
+ID_154_PDTCh_MCS1_9_P1_3_RX 154
+ID_155_PDTCh_MCS1_9_P1_3_RX_SAIC_off 155
+ID_156_PDTCh_MCS1_9_P1_3_RX_SAIC_dynamic 156
+ID_157_PDTCh_MCS1_9_P1_3_RX_MTBF 157
+
+ID_163_PDTCh_MCS1_IR 163
+ID_164_PDTCh_MCS2_IR 164
+ID_165_PDTCh_MCS3_IR 165
+ID_166_PDTCh_MCS4_IR 166
+ID_167_PDTCh_MCS5_IR 167
+ID_168_PDTCh_MCS6_IR 168
+ID_169_PDTCh_MCS7_IR 169
+ID_170_PDTCh_MCS8_IR 170
+ID_171_PDTCh_MCS9_IR 171
+ID_172_PDTCh_MCS1_4_IR 172
+ID_173_PDTCh_MCS1_4_IR2 173
+ID_174_PDTCh_MCS3_3_9_IR 174
+ID_175_PDTCh_MCS3_3_9_IR2 175
+ID_176_PDTCh_MCS9_9_3_IR 176
+ID_177_PDTCh_MCS9_9_3_IR2 177
+ID_178_PDTCh_MCS3_6_9_IR 178
+ID_179_PDTCh_MCS3_6_9_IR2 179
+ID_180_PDTCh_MCS3_6_9_IR3 180
+ID_181_PDTCh_MCS3_6_9_IR4 181
+ID_182_PDTCh_MCS3_6_8_IR 182
+ID_183_PDTCh_MCS3_6_8_IR2 183
+ID_184_PDTCh_MCS3_6_8_IR3 184
+ID_185_PDTCh_MCS3_6_8_IR4 185
+ID_186_PDTCh_MCS2_5_7_IR 186
+ID_187_PDTCh_MCS2_5_7_IR2 187
+ID_188_PDTCh_MCS2_5_7_IR3 188
+ID_189_PDTCh_MCS2_5_7_IR4 189
+ID_190_PDTCh_MCS3_7_9_IR 190
+ID_191_PDTCh_MCS3_7_3_8_IR 191
+ID_192_PDTCh_same_BSN_IR 192
+ID_193_PDTCh_diff_BSN_IR 193
+ID_194_PDTCh_MCS7_5_2_2_IR 194
+ID_195_PDTCh_MCS8_6_3_3_IR 195
+ID_196_PDTCh_MCS9_6_3_3_IR 196
+ID_197_PDTCh_MCS6_BSN0_IR 197
+ID_198_PDTCh_MCS6_BSN1_IR 198
+ID_199_PDTCh_MCS9_IR_NoTFI_CD 199
+ID_200_PDTCh_MCS9_IR_NoTFI_NoCD 200
+ID_201_PDTCh_MCS4_IR_long 201
+ID_202_PDTCh_MCS4_IR_PSHO_NoReset 202
+ID_203_PDTCh_MCS4_IR_PSHO_resetIR 203
+ID_204_PDTCh_MCS4_IR_PSHO_resume1 204
+ID_205_PDTCh_MCS4_IR_PSHO_resume2 205
+ID_206_PDTCh_MCS4_IR_PSHO_resume3 206
+ID_207_PDTCh_MCS4_IR_PSHO_resetVQ 207
+ID_208_PDTCh_MTBF_IR 208
+ID_209_PDTCh_MTBF_IR_RX 209
+
+ID_213_PDTCh_SRB_4R1T 213
+ID_214_PDTCh_SRB_3R2T 214
+ID_215_PDTCh_SRB_2R3T 215
+ID_216_PDTCh_SRB_1R4T 216
+
+//ID_220_PDTCh_BFE_FIR_NB 220
+//ID_221_PDTCh_BFE_FIR_WB 221
+ID_222_PDTCh_CS4_CRC_Correction 222
+ID_223_PDTCh_CS4_CRC_Correction_Fail 223
+
+ID_224_AudioSys_IRQ 224
+ID_225_AudioSys_MEMIF 225
+ID_226_AudioSys_SRCLoopback 226
+
+ID_227_SCh_Logger 227
+ID_228_FCCh_SCh_Logger 228
+ID_229_PDTCh_PM_Logger 229
+ID_230_8PM_Logger 230
+ID_231_PDTCh_MCS1_9_P1_3_RX_SAIC_Logger 231
+
+ID_233_AUXADC_TX_PM 233
+ID_234_Divider_Test 234
+//ID_235_PDTCh_RXTX_6R 235
+ID_236_PDTCh_TX_6T 236
+ID_237_FCChStop_SDCCh 237
+
+ID_241_PDTCh_CS1_TX_RTTI 241
+ID_242_PDTCh_CS1_RX_RTTI_RttiUsfMode 242
+ID_243_PDTCh_MCS1_9_P1_3_TX_RTTI 243
+ID_244_PDTCh_MCS1_9_P1_3_TX_RTTI_EO 244
+ID_245_PDTCh_MCS1_9_P1_3_RX_RTTI_RttiUsfMode 245
+ID_246_PDTCh_MCS1_9_P1_3_RX_RTTI_BttiUsfMode 246
+ID_247_PDTCh_MCS1_9_P1_3_RX_RTTI_BttiUsfMode_SWO 247
+ID_248_PDTCh_MCS1_9_P1_3_RX_RTTI_BttiUsfMode_MixedModulation 248
+ID_249_PDTCh_IR_RX_RTTI_BttiUsfMode 249
+
+ID_251_PDTCh_MCS1_9_P1_3_TX_FANR 251
+ID_252_PDTCh_MCS1_9_P1_3_RX_FANR 252
+ID_253_PDTCh_MCS1_9_P1_3_RX_FANR_UL_TBF 253
+ID_254_PDTCh_MCS1_9_P1_3_RX_FANR_TB 254
+
+ID_256_PDTCh_IR_RX_FANR_Family_A 256
+ID_257_PDTCh_IR_RX_FANR_Family_A_Padding 257
+ID_258_PDTCh_IR_RX_FANR_Family_B 258
+ID_259_PDTCh_IR_RX_FANR_Family_C 259
+
+ID_261_PDTCh_MCS1_9_P1_3_TX_RTTI_FANR 261
+ID_262_PDTCh_MCS1_9_P1_3_RX_RTTI_BttiUsfMode_FANR 262
+ID_263_PDTCh_MCS1_9_P1_3_RX_RTTI_RttiUsfMode_FANR 263
+
+ID_266_PDTCh_MCS1_9_P1_3_RX_FANR_PARTIAL 266
+ID_267_PDTCh_MCS1_9_P1_3_RX_MTBF_BttiUsfMode 267
+ID_268_PDTCh_MCS1_9_P1_3_RX_MTBF_RttiUsfMode 268
+ID_269_PDTCh_MCS1_9_P1_3_RX_MTBF_FANR_BttiUsfMode 269
+ID_270_PDTCh_MCS1_9_P1_3_RX_MTBF_FANR_RttiUsfMode 270
+ID_271_PDTCh_MCS1_9_P1_3_RX_MTBF_FANR_BttiUsfMode_FANR 271
+ID_272_PDTCh_MCS1_9_P1_3_RX_MTBF_FANR_RttiUsfMode_FANR 272
+
+[test_count] "Test Count"
+1~99999
+
diff --git a/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp7.l1v b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp7.l1v
new file mode 100755
index 0000000..911be69
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp7.l1v
@@ -0,0 +1,331 @@
+{ Validation }
+Title = "[10_2G_L1D]L1D Loopback 7"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_L1D_LOOPBACK_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint16 test_id;
+ kal_uint16 test_count;
+} l1d_loopback_req_struct;
+*/
+
+{Parameters}
+
+[test_id] "L1D Loopback Test Items"
+ID_001_SCh 1
+ID_002_SDCCh 2
+ID_003_SDCCh_A51 3
+ID_004_SDCCh_A52 4
+ID_005_TChFS_dtx_8_77_facch_8_13_52_56_60 5
+ID_006_TChEFS_dtx_8_77_facch_8_13_52_56_60 6
+ID_007_TChHS0_dtx_8_77_facch_8_52_60 7
+ID_008_TChCSD_144F_dtx_8_77_facch_8_13_52_56_60 8
+ID_009_TChCSD_24HS0_dtx_8_77_facch_8_52_60 9
+ID_010_TChCSD_48F_dtx_8_77_facch_8_13_56_60 10
+ID_011_TChCSD_48HS1_dtx_8_77_facch_52_60 11
+ID_012_TChCSD_96F_dtx_8_77_facch_8_13_52_56_60 12
+ID_013_TChCSD_24F_dtx_8_77_facch_8_13_52_56_60 13
+ID_014_TChFS_Speech 14
+ID_015_TChEFS_Speech 15
+ID_016_TChHS0_Speech 16
+ID_017_TChHS1_Speech 17
+ID_018_DynamicPatch 18
+//ID_019_FCCh 19
+ID_020_TChAFS1220_regular 20
+ID_021_TChAFS1020_regular 21
+ID_022_TChAFS795_regular 22
+ID_023_TChAFS740_regular 23
+ID_024_TChAFS670_regular 24
+ID_025_TChAFS590_regular 25
+ID_026_TChAFS515_regular 26
+ID_027_TChAFS475_regular 27
+ID_028_TChAHS795_regular 28
+ID_029_TChAHS740_regular 29
+ID_030_TChAHS670_regular 30
+ID_031_TChAHS590_regular 31
+ID_032_TChAHS515_regular 32
+ID_033_TChAHS475_regular 33
+ID_034_PDTCh_RXTX 34
+ID_035_PBCCh 35
+ID_036_TChAFS1220_dtx_8_26_facch_8_ratscch_13 36
+ID_037_TChAHS795_dtx_4_26_ratscch_8 37
+ID_038_TChAFS1220_dtx_8_16_21_24_sidupdate_17 38
+ID_039_TChAHS795_dtx_4_sidupdate_26_34 39
+//ID_040_TChAFS1220_Speech 40
+//ID_041_TChAFS1020_Speech 41
+//ID_042_TChAFS795_Speech 42
+//ID_043_TChAFS740_Speech 43
+//ID_044_TChAFS670_Speech 44
+//ID_045_TChAFS590_Speech 45
+//ID_046_TChAFS515_Speech 46
+//ID_047_TChAFS475_Speech 47
+//ID_048_TChAFS1220_Speech_dtx 48
+//ID_049_TChAFS1020_Speech_dtx 49
+//ID_050_TChAFS795_Speech_dtx 50
+//ID_051_TChAFS740_Speech_dtx 51
+//ID_052_TChAFS670_Speech_dtx 52
+//ID_053_TChAFS590_Speech_dtx 53
+//ID_054_TChAFS515_Speech_dtx 54
+//ID_055_TChAFS475_Speech_dtx 55
+//ID_056_WaveTable_OneNote 56
+//ID_057_DynamicDownload 57
+//ID_058_WaveTable_SixteenNote 58
+//ID_059_DynamicDownload2 59
+//ID_060_PDTCh_RXTX_WaveTable16 60
+//ID_061_PDTCh_RXTX_WaveTable32 61
+//ID_062_FCCh_SineWave 62
+ID_063_WaveTable_EightNote 63
+ID_064_PDTCh_RXTX_WaveTable8 64
+//ID_065_Huffman_Decoder 65
+//ID_066_DAF_Decoder 66
+//ID_067_SDCCh_New 67
+//ID_068_AAC_Huffman_Decoder 68
+ID_069_AAC_Decoder 69
+//ID_070_WB_AMR_660 70
+//ID_071_WB_AMR_885 71
+//ID_072_WB_AMR_1265 72
+//ID_073_WB_AMR_1425 73
+//ID_074_WB_AMR_1585 74
+//ID_075_WB_AMR_1825 75
+//ID_076_WB_AMR_1985 76
+//ID_077_WB_AMR_2305 77
+//ID_078_WB_AMR_2385 78
+//ID_079_SDCCh_New2 79
+ID_080_PDTCh_RXTX_AAC_Decoder 80
+//ID_081_PDTCh_RXTX_RXTX_WBAMR2385 81
+ID_082_TChFS_dtx_8_77_facch_8_13_52_56_60_New 82
+ID_083_TChFS_Speech_New 83
+
+//ID_084_ADC_Linearity 84
+//ID_085_AFC_Linearity 85
+//ID_086_GPRS_APC 86
+//ID_087_GPRS_RepeatRACh 87
+
+ID_088_SDCCh_A53 88
+ID_089_SDCCh_NBFilter 89
+ID_090_SDCCh_WBFilter 90
+ID_091_E5_FCCh_SDCCh 91
+ID_092_E6_FCCh_SCh 92
+
+ID_093_TX_PDTCh_MCS1_P1 93
+ID_094_TX_PDTCh_MCS1_P2 94
+ID_095_TX_PDTCh_MCS2_P1 95
+ID_096_TX_PDTCh_MCS2_P2 96
+ID_097_TX_PDTCh_MCS3_P1 97
+ID_098_TX_PDTCh_MCS3_P2 98
+ID_099_TX_PDTCh_MCS3_P3 99
+ID_100_TX_PDTCh_MCS4_P1 100
+ID_101_TX_PDTCh_MCS4_P2 101
+ID_102_TX_PDTCh_MCS4_P3 102
+ID_103_TX_PDTCh_MCS5_P1 103
+ID_104_TX_PDTCh_MCS5_P2 104
+ID_105_TX_PDTCh_MCS6_P1 105
+ID_106_TX_PDTCh_MCS6_P2 106
+ID_107_TX_PDTCh_MCS7_P1 107
+ID_108_TX_PDTCh_MCS7_P2 108
+ID_109_TX_PDTCh_MCS7_P3 109
+ID_110_TX_PDTCh_MCS8_P1 110
+ID_111_TX_PDTCh_MCS8_P2 111
+ID_112_TX_PDTCh_MCS8_P3 112
+ID_113_TX_PDTCh_MCS9_P1 113
+ID_114_TX_PDTCh_MCS9_P2 114
+ID_115_TX_PDTCh_MCS9_P3 115
+ID_116_TX_PDTCh_MCS1_9_P1_3 116
+
+ID_117_RX_PDTCh_MCS1_P1 117
+ID_118_RX_PDTCh_MCS1_P2 118
+ID_119_RX_PDTCh_MCS2_P1 119
+ID_120_RX_PDTCh_MCS2_P2 120
+ID_121_RX_PDTCh_MCS3_P1 121
+ID_122_RX_PDTCh_MCS3_P2 122
+ID_123_RX_PDTCh_MCS3_P3 123
+ID_124_RX_PDTCh_MCS4_P1 124
+ID_125_RX_PDTCh_MCS4_P2 125
+ID_126_RX_PDTCh_MCS4_P3 126
+ID_127_RX_PDTCh_MCS5_P1 127
+ID_128_RX_PDTCh_MCS5_P2 128
+ID_129_RX_PDTCh_MCS6_P1 129
+ID_130_RX_PDTCh_MCS6_P2 130
+ID_131_RX_PDTCh_MCS7_P1 131
+ID_132_RX_PDTCh_MCS7_P2 132
+ID_133_RX_PDTCh_MCS7_P3 133
+ID_134_RX_PDTCh_MCS8_P1 134
+ID_135_RX_PDTCh_MCS8_P2 135
+ID_136_RX_PDTCh_MCS8_P3 136
+ID_137_RX_PDTCh_MCS9_P1 137
+ID_138_RX_PDTCh_MCS9_P2 138
+ID_139_RX_PDTCh_MCS9_P3 139
+ID_140_RX_PDTCh_MCS1_9_P1_3 140
+
+ID_141_IR_PDTCh_MCS1_IR 141
+ID_142_IR_PDTCh_MCS2_IR 142
+ID_143_IR_PDTCh_MCS3_IR 143
+ID_144_IR_PDTCh_MCS4_IR 144
+ID_145_IR_PDTCh_MCS5_IR 145
+ID_146_IR_PDTCh_MCS6_IR 146
+ID_147_IR_PDTCh_MCS7_IR 147
+ID_148_IR_PDTCh_MCS8_IR 148
+ID_149_IR_PDTCh_MCS9_IR 149
+
+ID_150_IR_PDTCh_MCS1_4_IR 150
+ID_151_IR_PDTCh_MCS1_4_IR2 151
+ID_152_IR_PDTCh_MCS3_3_9_IR 152
+ID_153_IR_PDTCh_MCS3_3_9_IR2 153
+ID_154_IR_PDTCh_MCS9_9_3_IR 154
+ID_155_IR_PDTCh_MCS9_9_3_IR2 155
+ID_156_IR_PDTCh_MCS3_6_9_IR 156
+ID_157_IR_PDTCh_MCS3_6_9_IR2 157
+ID_158_IR_PDTCh_MCS3_6_9_IR3 158
+ID_159_IR_PDTCh_MCS3_6_9_IR4 159
+ID_160_IR_PDTCh_MCS3_6_8_IR 160
+ID_161_IR_PDTCh_MCS3_6_8_IR2 161
+ID_162_IR_PDTCh_MCS3_6_8_IR3 162
+ID_163_IR_PDTCh_MCS3_6_8_IR4 163
+ID_164_IR_PDTCh_MCS2_5_7_IR 164
+ID_165_IR_PDTCh_MCS2_5_7_IR2 165
+ID_166_IR_PDTCh_MCS2_5_7_IR3 166
+ID_167_IR_PDTCh_MCS2_5_7_IR4 167
+ID_168_IR_PDTCh_MCS3_7_9_IR 168
+ID_169_IR_PDTCh_MCS3_7_3_8_IR 169
+ID_170_SRB_4R1T_EGPRS 170
+
+//ID_171_E1_FCCh 171
+//ID_172_E2_FCCh 172
+ID_173_E3_FCCh 173
+//ID_174_E4_FCCh 174
+ID_175_TChAFS_INB 175
+ID_176_TChAHS_INB 176
+//ID_177_AMR_EQ_CI 177
+ID_178_TChAFS1220_dtx_8_26_facch_4_8_ratscch_13 178
+ID_179_TChAHS795_dtx_4_12_17_26_ratscch_8 179
+ID_180_TChAFS1220_dtx_4_21_facch_13_sidupdate_21 180
+ID_181_TChAHS795_dtx_4_ratscch_21_sidupdate_26_34 181
+//ID_182_Post_Process_TS 182
+//ID_183_Post_Process_3D 183
+//ID_184_Via_ROM_Power_Down 184
+//ID_185_AAC_PLUS_Huffman_Decoder 185
+//ID_186_INTX_EQ_BYPASS 186
+//ID_187_INTX2_EQ 187
+//ID_188_INTX4_EQ 188
+//ID_189_EQ_test 189
+
+ID_190_IR_PDTCh_same_BSN 190
+ID_191_IR_PDTCh_diff_BSN 191
+ID_192_IR_PDTCh_MCS7_5_2_2_IR 192
+ID_193_IR_PDTCh_MCS8_6_3_3_IR 193
+ID_194_IR_PDTCh_MCS9_6_3_3_IR 194
+//ID_195_RX_IGAIN 195
+ID_196_E7_FCCh_tcvcxo 196
+ID_197_E8_FCCh_SDCCh_tcvcxo 197
+ID_198_SRB_3R2T_EGPRS 198
+ID_199_SRB_2R3T_EGPRS 199
+ID_200_SRB_1R4T_EGPRS 200
+ID_201_E9_FCCh_SineWave 201
+//ID_202_IR_PDTCh_MCS3_6_9_IR4_JPEG_CODEC 202
+//ID_203_IR_PDTCh_MCS3_6_9_IR4_VDO_PHONE 203
+ID_204_IR_PDTCh_MCS3_6_9_IR4_WT 204
+ID_205_IR_PDTCh_MCS6_HIGH_BSN0_IR 205
+ID_206_IR_PDTCh_MCS6_HIGH_BSN1_IR 206
+ID_207_CTM 207
+ID_208_TChHS0_dtx_8_26_52_77_facch_0_to_86 208
+
+//ID_209_TChFS_Speech_CNTR 209
+//ID_210_TChFS_Speech_CNTR_BT_COMP 210
+//ID_211_TChFS_Speech_CNTR_BT 211
+ID_212_FastPCh 212
+ID_213_IR_PDTCh_MCS9_IR_NoTFI_CD 213
+ID_214_IR_PDTCh_MCS9_IR_NoTFI_NoCD 214
+
+ID_215_TChAHS590_dtx_4_15_sidupdateINH 215
+ID_216_PDTCh_CS4_CRC_Correction 216
+ID_217_PDTCh_CS4_CRC_Correction_Fail 217
+ID_218_PDTCh_RXTX_SAIC_dynamic 218
+ID_219_TChFS_dtx_8_77_facch_8_13_52_56_60_SAIC_dynamic 219
+//ID_220_PDTCh_AMR1120_AudioDAC 220
+//ID_221_E10_FCCh_SCh_stage3 221
+ID_222_PDTCh_PM 222
+//ID_223_E11_FCCh_SCh_stage3_DCM 223
+//ID_224_P7_INTX2_DSP_EQ 224
+//ID_225_P8_INTX4_DSP_EQ 225
+ID_226_PBCCh_FireCode_Correction_ON 226
+//ID_227_PBCCh_FireCode_Correction_OFF 227
+
+ID_228_AAC_PLUS_Decoder 228
+ID_229_TChFS_Speech_AFE 229
+ID_230_PDTCh_MCS1_9_P1_3_RX_SAIC_off 230
+ID_231_TChFS_dtx_8_77_facch_8_13_52_56_60_SAIC_off 231
+ID_232_AGCSRC_4k_Speech 232
+ID_233_AGCSRC_8k_Speech 233
+//ID_234_ENHANCED_TURBO_SLEEP_MODE 234
+ID_235_PDTCh_MCS1_9_P1_3_RX_SAIC_dynamic 235
+ID_236_OneBurstPCh 236
+//ID_237_PDTCH_BFE_FIR_NB 237
+//ID_238_PDTCH_BFE_FIR_WB 238
+
+//ID_239_SDCCh_A53_DSP 239
+//ID_240_TChFS_Speech_CNTR_BT_COMP_Gain 240
+//ID_241_TChFS_Speech_CNTR_BT_Gain 241
+//ID_242_TChFS_Speech_CNTR_BT_COMP_SgnExt 242
+//ID_243_TChFS_Speech_CNTR_BT_SgnExt 243
+//ID_244_TChFS_Speech_AFE_FltOff 244
+//ID_245_TChFS_Speech_AFE_20msBlk 245
+//ID_246_TChFS_Speech_AFE_20msBlk_FltOff 246
+//ID_247_ENHANCED_TURBO_SLEEP_MODE_EINT 247
+//ID_248_OneBurstPCh_7PM 248
+ID_249_Divider_Test 249
+
+//ID_250_IR19_Bus_Concurrent 250
+ID_251_PDTCh_1R_PM_DSP2MCU_Interrupt 251
+//ID_252_Enhanced_Turbo_Sleep_Mode_65NM_PDN 252
+ID_253_IRDGB_for_65NM_PDN 253
+//ID_254_UL_DL_SRC_and_DAGC_8k_mode_WB 254
+ID_255_TDMA_Wrap_Count_Test 255
+ID_256_TChFS_dtx_8_77_facch_8_13_52_56_60_HybridSAIC 256
+ID_257_TCh_HS0_DTX_8_77_mode_with_3_FACCH_8_52_60_BFIPATCH 257
+//ID_258_TChFS_Speech_SPE_RAM 258
+ID_259_TChFS_RepeatedFACCH 259
+ID_260_TChHS0_RepeatedFACCH 260
+ID_261_RF_BSI_Porting 261
+ID_262_FCCh_Recursive 262
+ID_263_PDTCh_MCS1_9_P1_3_RX_MTBF 263
+ID_264_PDTCh_MTBF_IR 264
+ID_265_PDTCh_MTBF_IR_RX 265
+ID_266_PDTCH_MCS4_IR_LONG 266
+ID_267_PDTCH_MCS4_IR_PSHO_NORESET 267
+ID_268_PDTCH_MCS4_IR_PSHO_IR 268
+ID_269_PDTCH_MCS4_IR_PSHO_VQ 269
+ID_270_PDTCH_MCS4_IR_PSHO_RESUME1 270
+ID_271_PDTCH_MCS4_IR_PSHO_RESUME2 271
+ID_272_PDTCH_MCS4_IR_PSHO_RESUME3 272
+ID_273_PDTCH_PM_DSP2MCU_INT_USE_WIN6_WIN7 273
+ID_274_TCHFS_SPEECH_DUALMIC_HWANTIALIASING 274
+ID_275_TCHFS_SPEECH_DUALMIC_FWANTIALIASING 275
+ID_276_TCHFS_SPEECH_32BITS_DAI 276
+ID_277_AUDMA_DECODER 277
+//ID_278_AUXADC_TXPM 278
+ID_279_MP3LP_SLEEP_D2C_WAKEUP 279
+ID_280_AGCSRC_MIC_4K_SPEECH 280
+ID_281_AGCSRC_MIC_8K_SPEECH 281
+ID_282_TCHFS_SPEECH_SPE_RAM_CM7 282
+ID_283_AUDMA_DECODER_BURST 283
+ID_284_DAFLP_DECODER 284
+ID_285_AUDMA_NFI_READDATA 285
+ID_286_BFE_TO_RXBUF_BY_IDMA 286
+ID_287_DLIF_IF_SWITCH 287
+ID_288_DLIF_ITD_SWITCH 288
+ID_289_MP3LP_DECODER_SLEEP_MODE_MODEM_MSDC 289
+ID_290_AUDMA_NFI_READDATA_SLEEP_MODE 290
+ID_291_DLIF_WFORCE 291
+ID_292_MP3LP_DECODER_SLEEP_MODE_NFI 292
+ID_293_MP3LP_DECODER_SLEEP_MODE_MODEM_NFI 293
+ID_294_CSD_MONITOR_MODE 294
+ID_295_AUDMA_MSDC_READDATA_SLEEP_MODE 295
+ID_296_FWBW_DC0C 296
+
+[test_count] "Test Count"
+1~99999
+
diff --git a/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp8.l1v b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp8.l1v
new file mode 100755
index 0000000..3523f3a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp8.l1v
@@ -0,0 +1,360 @@
+{ Validation }
+Title = "[10_2G_L1D]L1D Loopback 8"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_L1D_LOOPBACK_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint16 test_id;
+ kal_uint16 test_count;
+} l1d_loopback_req_struct;
+*/
+
+{Parameters}
+
+[test_id] "L1D Loopback Test Items"
+ID_001_SCh 1
+ID_002_SDCCh 2
+ID_003_SDCCh_A51 3
+ID_004_SDCCh_A52 4
+ID_005_TChFS_dtx_8_77_facch_8_13_52_56_60 5
+ID_006_TChEFS_dtx_8_77_facch_8_13_52_56_60 6
+ID_007_TChHS0_dtx_8_77_facch_8_52_60 7
+ID_008_TChCSD_144F_dtx_8_77_facch_8_13_52_56_60 8
+ID_009_TChCSD_24HS0_dtx_8_77_facch_8_52_60 9
+ID_010_TChCSD_48F_dtx_8_77_facch_8_13_56_60 10
+ID_011_TChCSD_48HS1_dtx_8_77_facch_52_60 11
+ID_012_TChCSD_96F_dtx_8_77_facch_8_13_52_56_60 12
+ID_013_TChCSD_24F_dtx_8_77_facch_8_13_52_56_60 13
+ID_014_TChFS_Speech 14
+ID_015_TChEFS_Speech 15
+ID_016_TChHS0_Speech 16
+ID_017_TChHS1_Speech 17
+//ID_018_DynamicPatch 18
+//ID_019_FCCh 19
+ID_020_TChAFS1220_regular 20
+ID_021_TChAFS1020_regular 21
+ID_022_TChAFS795_regular 22
+ID_023_TChAFS740_regular 23
+ID_024_TChAFS670_regular 24
+ID_025_TChAFS590_regular 25
+ID_026_TChAFS515_regular 26
+ID_027_TChAFS475_regular 27
+ID_028_TChAHS795_regular 28
+ID_029_TChAHS740_regular 29
+ID_030_TChAHS670_regular 30
+ID_031_TChAHS590_regular 31
+ID_032_TChAHS515_regular 32
+ID_033_TChAHS475_regular 33
+ID_034_PDTCh_RXTX 34
+ID_035_PBCCh 35
+ID_036_TChAFS1220_dtx_8_26_facch_8_ratscch_13 36
+ID_037_TChAHS795_dtx_4_26_ratscch_8 37
+ID_038_TChAFS1220_dtx_8_16_21_24_sidupdate_17 38
+ID_039_TChAHS795_dtx_4_sidupdate_26_34 39
+//ID_040_TChAFS1220_Speech 40
+//ID_041_TChAFS1020_Speech 41
+//ID_042_TChAFS795_Speech 42
+//ID_043_TChAFS740_Speech 43
+//ID_044_TChAFS670_Speech 44
+//ID_045_TChAFS590_Speech 45
+//ID_046_TChAFS515_Speech 46
+//ID_047_TChAFS475_Speech 47
+//ID_048_TChAFS1220_Speech_dtx 48
+//ID_049_TChAFS1020_Speech_dtx 49
+//ID_050_TChAFS795_Speech_dtx 50
+//ID_051_TChAFS740_Speech_dtx 51
+//ID_052_TChAFS670_Speech_dtx 52
+//ID_053_TChAFS590_Speech_dtx 53
+//ID_054_TChAFS515_Speech_dtx 54
+//ID_055_TChAFS475_Speech_dtx 55
+//ID_056_WaveTable_OneNote 56
+//ID_057_DynamicDownload 57
+//ID_058_WaveTable_SixteenNote 58
+//ID_059_DynamicDownload2 59
+//ID_060_PDTCh_RXTX_WaveTable16 60
+//ID_061_PDTCh_RXTX_WaveTable32 61
+//ID_062_FCCh_SineWave 62
+//ID_063_WaveTable_EightNote 63
+//ID_064_PDTCh_RXTX_WaveTable8 64
+//ID_065_Huffman_Decoder 65
+//ID_066_DAF_Decoder 66
+//ID_067_SDCCh_New 67
+//ID_068_AAC_Huffman_Decoder 68
+//ID_069_AAC_Decoder 69
+//ID_070_WB_AMR_660 70
+//ID_071_WB_AMR_885 71
+//ID_072_WB_AMR_1265 72
+//ID_073_WB_AMR_1425 73
+//ID_074_WB_AMR_1585 74
+//ID_075_WB_AMR_1825 75
+//ID_076_WB_AMR_1985 76
+//ID_077_WB_AMR_2305 77
+//ID_078_WB_AMR_2385 78
+//ID_079_SDCCh_New2 79
+//ID_080_PDTCh_RXTX_AAC_Decoder 80
+//ID_081_PDTCh_RXTX_RXTX_WBAMR2385 81
+//ID_082_TChFS_dtx_8_77_facch_8_13_52_56_60_New 82
+//ID_083_TChFS_Speech_New 83
+
+//ID_084_ADC_Linearity 84
+//ID_085_AFC_Linearity 85
+//ID_086_GPRS_APC 86
+//ID_087_GPRS_RepeatRACh 87
+
+ID_088_SDCCh_A53 88
+ID_089_SDCCh_NBFilter 89
+ID_090_SDCCh_WBFilter 90
+ID_091_E5_FCCh_SDCCh 91
+ID_092_E6_FCCh_SCh 92
+
+ID_093_TX_PDTCh_MCS1_P1 93
+ID_094_TX_PDTCh_MCS1_P2 94
+ID_095_TX_PDTCh_MCS2_P1 95
+ID_096_TX_PDTCh_MCS2_P2 96
+ID_097_TX_PDTCh_MCS3_P1 97
+ID_098_TX_PDTCh_MCS3_P2 98
+ID_099_TX_PDTCh_MCS3_P3 99
+ID_100_TX_PDTCh_MCS4_P1 100
+ID_101_TX_PDTCh_MCS4_P2 101
+ID_102_TX_PDTCh_MCS4_P3 102
+ID_103_TX_PDTCh_MCS5_P1 103
+ID_104_TX_PDTCh_MCS5_P2 104
+ID_105_TX_PDTCh_MCS6_P1 105
+ID_106_TX_PDTCh_MCS6_P2 106
+ID_107_TX_PDTCh_MCS7_P1 107
+ID_108_TX_PDTCh_MCS7_P2 108
+ID_109_TX_PDTCh_MCS7_P3 109
+ID_110_TX_PDTCh_MCS8_P1 110
+ID_111_TX_PDTCh_MCS8_P2 111
+ID_112_TX_PDTCh_MCS8_P3 112
+ID_113_TX_PDTCh_MCS9_P1 113
+ID_114_TX_PDTCh_MCS9_P2 114
+ID_115_TX_PDTCh_MCS9_P3 115
+ID_116_TX_PDTCh_MCS1_9_P1_3 116
+
+ID_117_RX_PDTCh_MCS1_P1 117
+ID_118_RX_PDTCh_MCS1_P2 118
+ID_119_RX_PDTCh_MCS2_P1 119
+ID_120_RX_PDTCh_MCS2_P2 120
+ID_121_RX_PDTCh_MCS3_P1 121
+ID_122_RX_PDTCh_MCS3_P2 122
+ID_123_RX_PDTCh_MCS3_P3 123
+ID_124_RX_PDTCh_MCS4_P1 124
+ID_125_RX_PDTCh_MCS4_P2 125
+ID_126_RX_PDTCh_MCS4_P3 126
+ID_127_RX_PDTCh_MCS5_P1 127
+ID_128_RX_PDTCh_MCS5_P2 128
+ID_129_RX_PDTCh_MCS6_P1 129
+ID_130_RX_PDTCh_MCS6_P2 130
+ID_131_RX_PDTCh_MCS7_P1 131
+ID_132_RX_PDTCh_MCS7_P2 132
+ID_133_RX_PDTCh_MCS7_P3 133
+ID_134_RX_PDTCh_MCS8_P1 134
+ID_135_RX_PDTCh_MCS8_P2 135
+ID_136_RX_PDTCh_MCS8_P3 136
+ID_137_RX_PDTCh_MCS9_P1 137
+ID_138_RX_PDTCh_MCS9_P2 138
+ID_139_RX_PDTCh_MCS9_P3 139
+ID_140_RX_PDTCh_MCS1_9_P1_3 140
+
+ID_141_IR_PDTCh_MCS1_IR 141
+ID_142_IR_PDTCh_MCS2_IR 142
+ID_143_IR_PDTCh_MCS3_IR 143
+ID_144_IR_PDTCh_MCS4_IR 144
+ID_145_IR_PDTCh_MCS5_IR 145
+ID_146_IR_PDTCh_MCS6_IR 146
+ID_147_IR_PDTCh_MCS7_IR 147
+ID_148_IR_PDTCh_MCS8_IR 148
+ID_149_IR_PDTCh_MCS9_IR 149
+
+ID_150_IR_PDTCh_MCS1_4_IR 150
+ID_151_IR_PDTCh_MCS1_4_IR2 151
+ID_152_IR_PDTCh_MCS3_3_9_IR 152
+ID_153_IR_PDTCh_MCS3_3_9_IR2 153
+ID_154_IR_PDTCh_MCS9_9_3_IR 154
+ID_155_IR_PDTCh_MCS9_9_3_IR2 155
+ID_156_IR_PDTCh_MCS3_6_9_IR 156
+ID_157_IR_PDTCh_MCS3_6_9_IR2 157
+ID_158_IR_PDTCh_MCS3_6_9_IR3 158
+ID_159_IR_PDTCh_MCS3_6_9_IR4 159
+ID_160_IR_PDTCh_MCS3_6_8_IR 160
+ID_161_IR_PDTCh_MCS3_6_8_IR2 161
+ID_162_IR_PDTCh_MCS3_6_8_IR3 162
+ID_163_IR_PDTCh_MCS3_6_8_IR4 163
+ID_164_IR_PDTCh_MCS2_5_7_IR 164
+ID_165_IR_PDTCh_MCS2_5_7_IR2 165
+ID_166_IR_PDTCh_MCS2_5_7_IR3 166
+ID_167_IR_PDTCh_MCS2_5_7_IR4 167
+ID_168_IR_PDTCh_MCS3_7_9_IR 168
+ID_169_IR_PDTCh_MCS3_7_3_8_IR 169
+
+ID_170_SRB_4R1T_EGPRS 170
+
+//ID_171_E1_FCCh 171
+//ID_172_E2_FCCh 172
+ID_173_E3_FCCh 173
+//ID_174_E4_FCCh 174
+ID_175_TChAFS_INB 175
+ID_176_TChAHS_INB 176
+//ID_177_AMR_EQ_CI 177
+ID_178_TChAFS1220_dtx_8_26_facch_4_8_ratscch_13 178
+ID_179_TChAHS795_dtx_4_12_17_26_ratscch_8 179
+ID_180_TChAFS1220_dtx_4_21_facch_13_sidupdate_21 180
+ID_181_TChAHS795_dtx_4_ratscch_21_sidupdate_26_34 181
+//ID_182_Post_Process_TS 182
+//ID_183_Post_Process_3D 183
+//ID_184_Via_ROM_Power_Down 184
+//ID_185_AAC_PLUS_Huffman_Decoder 185
+//ID_186_INTX_EQ_BYPASS 186
+//ID_187_INTX2_EQ 187
+//ID_188_INTX4_EQ 188
+//ID_189_EQ_test 189
+
+ID_190_IR_PDTCh_same_BSN 190
+ID_191_IR_PDTCh_diff_BSN 191
+ID_192_IR_PDTCh_MCS7_5_2_2_IR 192
+ID_193_IR_PDTCh_MCS8_6_3_3_IR 193
+ID_194_IR_PDTCh_MCS9_6_3_3_IR 194
+//ID_195_RX_IGAIN 195
+//ID_196_E7_FCCh_tcvcxo 196
+ID_197_E8_FCCh_SDCCh_tcvcxo 197
+ID_198_SRB_3R2T_EGPRS 198
+ID_199_SRB_2R3T_EGPRS 199
+ID_200_SRB_1R4T_EGPRS 200
+ID_201_E9_FCCh_SineWave 201
+//ID_202_IR_PDTCh_MCS3_6_9_IR4_JPEG_CODEC 202
+//ID_203_IR_PDTCh_MCS3_6_9_IR4_VDO_PHONE 203
+//ID_204_IR_PDTCh_MCS3_6_9_IR4_WT 204
+ID_205_IR_PDTCh_MCS6_HIGH_BSN0_IR 205
+ID_206_IR_PDTCh_MCS6_HIGH_BSN1_IR 206
+ID_207_CTM 207
+ID_208_TChHS0_dtx_8_26_52_77_facch_0_to_86 208
+
+//ID_209_TChFS_Speech_CNTR 209
+//ID_210_TChFS_Speech_CNTR_BT_COMP 210
+ID_211_TChFS_Speech_CNTR_BT 211
+ID_212_FastPCh 212
+ID_213_IR_PDTCh_MCS9_IR_NoTFI_CD 213
+ID_214_IR_PDTCh_MCS9_IR_NoTFI_NoCD 214
+
+ID_215_TChAHS590_dtx_4_15_sidupdateINH 215
+ID_216_PDTCh_CS4_CRC_Correction 216
+ID_217_PDTCh_CS4_CRC_Correction_Fail 217
+ID_218_PDTCh_RXTX_SAIC_dynamic 218
+ID_219_TChFS_dtx_8_77_facch_8_13_52_56_60_SAIC_dynamic 219
+//ID_220_PDTCh_AMR1120_AudioDAC 220
+//ID_221_E10_FCCh_SCh_stage3 221
+ID_222_PDTCh_PM 222
+//ID_223_E11_FCCh_SCh_stage3_DCM 223
+//ID_224_P7_INTX2_DSP_EQ 224
+//ID_225_P8_INTX4_DSP_EQ 225
+ID_226_PBCCh_FireCode_Correction_ON 226
+//ID_227_PBCCh_FireCode_Correction_OFF 227
+
+//ID_228_AAC_PLUS_Decoder 228
+ID_229_TChFS_Speech_AFE 229
+ID_230_PDTCh_MCS1_9_P1_3_RX_SAIC_off 230
+ID_231_TChFS_dtx_8_77_facch_8_13_52_56_60_SAIC_off 231
+//ID_232_AGCSRC_4k_Speech 232
+//ID_233_AGCSRC_8k_Speech 233
+//ID_234_ENHANCED_TURBO_SLEEP_MODE 234
+ID_235_PDTCh_MCS1_9_P1_3_RX_SAIC_dynamic 235
+ID_236_OneBurstPCh 236
+//ID_237_PDTCH_BFE_FIR_NB 237
+//ID_238_PDTCH_BFE_FIR_WB 238
+
+//ID_239_SDCCh_A53_DSP 239
+//ID_240_TChFS_Speech_CNTR_BT_COMP_Gain 240
+//ID_241_TChFS_Speech_CNTR_BT_Gain 241
+//ID_242_TChFS_Speech_CNTR_BT_COMP_SgnExt 242
+//ID_243_TChFS_Speech_CNTR_BT_SgnExt 243
+//ID_244_TChFS_Speech_AFE_FltOff 244
+//ID_245_TChFS_Speech_AFE_20msBlk 245
+//ID_246_TChFS_Speech_AFE_20msBlk_FltOff 246
+//ID_247_ENHANCED_TURBO_SLEEP_MODE_EINT 247
+//ID_248_OneBurstPCh_7PM 248
+ID_249_Divider_Test 249
+
+//ID_250_IR19_Bus_Concurrent 250
+ID_251_PDTCh_1R_PM_DSP2MCU_Interrupt 251
+//ID_252_Enhanced_Turbo_Sleep_Mode_65NM_PDN 252
+//ID_253_IRDGB_for_65NM_PDN 253
+//ID_254_UL_DL_SRC_and_DAGC_8k_mode_WB 254
+ID_255_TDMA_Wrap_Count_Test 255
+ID_256_TChFS_dtx_8_77_facch_8_13_52_56_60_HybridSAIC 256
+ID_257_TCh_HS0_DTX_8_77_mode_with_3_FACCH_8_52_60_BFIPATCH 257
+//ID_258_TChFS_Speech_SPE_RAM 258
+ID_259_TChFS_RepeatedFACCH 259
+ID_260_TChHS0_RepeatedFACCH 260
+ID_261_RF_BSI_Porting 261
+ID_262_FCCh_Recursive 262
+//ID_263_PDTCh_MCS1_9_P1_3_RX_MTBF 263
+//ID_264_PDTCh_MTBF_IR 264
+//ID_265_PDTCh_MTBF_IR_RX 265
+//ID_266_PDTCH_MCS4_IR_LONG 266
+//ID_267_PDTCH_MCS4_IR_PSHO_NORESET 267
+//ID_268_PDTCH_MCS4_IR_PSHO_IR 268
+//ID_269_PDTCH_MCS4_IR_PSHO_VQ 269
+//ID_270_PDTCH_MCS4_IR_PSHO_RESUME1 270
+//ID_271_PDTCH_MCS4_IR_PSHO_RESUME2 271
+//ID_272_PDTCH_MCS4_IR_PSHO_RESUME3 272
+ID_273_PDTCH_PM_DSP2MCU_INT_USE_WIN6_WIN7 273
+ID_274_TCHFS_SPEECH_DUALMIC_HWANTIALIASING 274
+ID_275_TCHFS_SPEECH_DUALMIC_FWANTIALIASING 275
+//ID_276_TCHFS_SPEECH_32BITS_DAI 276
+//ID_277_AUDMA_DECODER 277
+//ID_278_AUXADC_TXPM 278
+//ID_279_MP3LP_SLEEP_D2C_WAKEUP 279
+//ID_280_AGCSRC_MIC_4K_SPEECH 280
+//ID_281_AGCSRC_MIC_8K_SPEECH 281
+//ID_282_TCHFS_SPEECH_SPE_RAM_CM7 282
+//ID_283_AUDMA_DECODER_BURST 283
+//ID_284_DAFLP_DECODER 284
+//ID_285_AUDMA_NFI_READDATA 285
+//ID_286_BFE_TO_RXBUF_BY_IDMA 286
+ID_287_DLIF_IF_SWITCH 287
+ID_288_DLIF_ITD_SWITCH 288
+//ID_289_MP3LP_DECODER_SLEEP_MODE_MODEM_MSDC 289
+//ID_290_AUDMA_NFI_READDATA_SLEEP_MODE 290
+ID_291_DLIF_WFORCE 291
+//ID_292_MP3LP_DECODER_SLEEP_MODE_NFI 292
+//ID_293_MP3LP_DECODER_SLEEP_MODE_MODEM_NFI 293
+ID_294_CSD_MONITOR_MODE 294
+//ID_295_AUDMA_MSDC_READDATA_SLEEP_MODE 295
+//ID_296_FWBW_DC0C 296
+ID_297_E12_FCCHSTOP_SDCCH 297
+ID_298_IRDMA_MPU_VIOLATION 298
+
+ID_299_A6_SDCCH_A51_DFM 299
+//ID_300_B25_TCHFS_SPEECH_AFE_32BST 300
+//ID_301_Y1_DSP_CACHE_VALIDATION 301
+ID_302_E13_TDDM_SHORT_FCCH 302
+ID_303_E14_TDDM_SHORT_FCCh_PM 303
+ID_304_E15_TDDM_SHORT_SCH 304
+ID_305_E16_TDDM_SHORT_SCH_PM 305
+ID_306_Z8_TXBUF_CLOCK_CONTROL 306
+ID_307_A6_SDCCH_A51_DFM_HB 307
+//ID_308_Y2_AUDIO_EM_REMAP 308
+ID_309_B26_CM8_INTERNAL_RAM_VALIDATION 309
+//ID_310_Y3_EMI_SECURITY_VALIDATION 310
+//ID_311_W26_AUDIO_AMR_DECODER 311
+ID_312_B16_TChFS_Speech_VSBT 312
+
+ID_313_AUDIOLP_ReadData_Sleep_Mode 313
+//ID_314_None 314
+ID_315_EQ_Change_SampleRate 315
+ID_316_I2S 316
+ID_317_TChFS_Speech_DAI 317
+ID_318_TChFS_Speech_VBI 318
+ID_319_W29_IR19_W10_AAC_Decoder 319
+ID_320_W28_Audio_AWB_Decoder 320
+ID_321_SDCCh_A53_BBRX 321
+ID_322_IRDBG_MPU_Violation 322
+
+[test_count] "Test Count"
+1~99999
+
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/1_FDDTest_8960/udps_DPAS_FDD_Test1.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/1_FDDTest_8960/udps_DPAS_FDD_Test1.l1v
new file mode 100755
index 0000000..5c1b61c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/1_FDDTest_8960/udps_DPAS_FDD_Test1.l1v
@@ -0,0 +1,158 @@
+{ Validation }
+Title = "[11_HSDPA][1_FDDTest_8960]DPAS_FDD_TEST_SL1: H-Set BLER test in HS-DSCH mode (CSD request)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_FDD_TEST_SL1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 ul_dch_PCA; // Power control algorithm: 1 or 2
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ kal_uint8 dpas_sl12_par_idx;
+ kal_uint8 beta_c; // for HSDPA FDD test (TS34.121 5.2A)
+ kal_uint8 beta_d; // for HSDPA FDD test (TS34.121 5.2A)
+} udps_dpas_FDDTest_sl1_struct; // DPA01
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@0
+
+/******************************************
+* For RACH
+******************************************/
+/*
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+*/
+/******************************************
+* For DCH
+******************************************/
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@0
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@20
+
+
+[beta_c] "beta_c of UL DPCH (TF1,TF0)"
+1~15
+@8
+
+[beta_d] "beta_d of UL DPCH (TF1,TF0)"
+1~15
+@15
+
+[ul_dch_PCA] "UL DCH Power Control Algo. (1~2)"
+1~2
+@1
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@3
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@3
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[dpas_sl12_par_idx] "HSDPA H-set parameters 1~10"
+1~10
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/1_FDDTest_8960/udps_DPAS_FDD_Test2.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/1_FDDTest_8960/udps_DPAS_FDD_Test2.l1v
new file mode 100755
index 0000000..4a186ba
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/1_FDDTest_8960/udps_DPAS_FDD_Test2.l1v
@@ -0,0 +1,192 @@
+{ Validation }
+Title = "[11_HSDPA][1_FDDTest_8960]DPAS_FDD_TEST_SL2: User Define BLER test in HS-DSCH mode (CSD request)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_FDD_TEST_SL2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 ul_dch_PCA; // Power control algorithm: 1 or 2
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ udps_SMLs_E SMLs;
+ kal_uint8 beta_c; // for HSDPA FDD test (TS34.121 5.2A)
+ kal_uint8 beta_d; // for HSDPA FDD test (TS34.121 5.2A)
+} udps_dpas_FDDTest_sl2_struct; // DPA01
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@0
+
+
+/******************************************
+* For RACH
+******************************************/
+/*
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+*/
+/******************************************
+* For DCH
+******************************************/
+/*
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+*/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@0
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@20
+
+
+[beta_c] "beta_c of UL DPCH (TF1,TF0)"
+1~15
+@8
+
+[beta_d] "beta_d of UL DPCH (TF1,TF0)"
+1~15
+@15
+
+[ul_dch_PCA] "UL DCH Power Control Algo. (1~2)"
+1~2
+@1
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+/*
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+*/
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@3
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@3
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+[SMLs] "IR Buffer Size"
+hms4800
+hms7200
+hms9600
+hms11200
+hms12800
+hms14400
+hms19200
+@hms22400
+
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF01.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF01.l1v
new file mode 100755
index 0000000..bbe64ab
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF01.l1v
@@ -0,0 +1,100 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF01: Demodulation of HS-PDSCH with Single Link under Fading Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 dpaf01_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpaf01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[dpaf01_par_idx] "HSDPA parameters 1~24"
+1~24
+@1
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF02.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF02.l1v
new file mode 100755
index 0000000..b0d5262
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF02.l1v
@@ -0,0 +1,128 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF02: Demodulation of HS-PDSCH with Diversity under Fading Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+ kal_uint8 dpaf02_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpas02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[dpaf02_par_idx] "HSDPA parameters 1~38"
+1~38
+@1
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF03.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF03.l1v
new file mode 100755
index 0000000..67324db
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF03.l1v
@@ -0,0 +1,100 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF03: HS-SCCH Detection Performance with Single Link under Fading Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 dpaf03_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpaf03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[dpaf03_par_idx] "HSDPA parameters 1~3"
+1~3
+@1
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF04.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF04.l1v
new file mode 100755
index 0000000..d811618
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF04.l1v
@@ -0,0 +1,132 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF04: HS-SCCH Detection Performance with Diversity under Fading Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+ kal_uint8 dpaf04_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpas04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~2
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[dpaf04_par_idx] "HSDPA parameters 1~3"
+1~3
+@1
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF07.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF07.l1v
new file mode 100755
index 0000000..f876281
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF07.l1v
@@ -0,0 +1,100 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF07: Reporting of Channel Quality Indicator (Fading+Single Link)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 dpaf07_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpaf07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[dpaf07_par_idx] "HSDPA parameters 1~2"
+1~2
+@1
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF08.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF08.l1v
new file mode 100755
index 0000000..b1007b3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF08.l1v
@@ -0,0 +1,132 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF08: Reporting of Channel Quality Indicator (Fading+Diversity)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+ {
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ //tx_diversity_E diversity_mode; // for CD9
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+
+ kal_uint8 dpaf08_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpaf08_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~2
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[dpaf08_par_idx] "HSDPA parameters 1~4"
+1~4
+@1
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF09.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF09.l1v
new file mode 100755
index 0000000..c8e1748
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF09.l1v
@@ -0,0 +1,100 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF09: Demodulation of HS-PDSCH with VRC under Fading Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_int8 meas_po;
+ kal_uint8 dpaf09_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpaf09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[meas_po] "Meas power offset of HS-DPSCH"
+-12~26
+@0
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF10.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF10.l1v
new file mode 100755
index 0000000..3290e90
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF10.l1v
@@ -0,0 +1,101 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF10: DCH(384K) and HS-PDSCH(max capability) Transmission Test under Fading Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_int8 meas_po;
+ kal_uint8 dpaf10_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpaf10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+RMC_12_2
+RMC_64
+@RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[meas_po] "Meas power offset of HS-DPSCH"
+-12~26
+@0
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF11.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF11.l1v
new file mode 100755
index 0000000..c8d3bee
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF11.l1v
@@ -0,0 +1,126 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF11: HSDPA with SHO under Fading Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 num_of_hsscch;
+ kal_uint8 harq_preamble_mode;
+ kal_uint8 cqi_k;//0~8 map to 0/2/4/8/10/20/40/80/160 ms
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 process_num;
+
+ kal_int8 meas_po;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpaf11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+/******************************************
+* For HS-DSCH
+******************************************/
+[meas_po] "Meas power offset of HS-DPSCH"
+-12~26
+@0
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF11_1.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF11_1.l1v
new file mode 100755
index 0000000..a72704a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF11_1.l1v
@@ -0,0 +1,125 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF11_1: HSDPA with measurement under Fading Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF11_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 num_of_hsscch;
+ kal_uint8 harq_preamble_mode;
+ kal_uint8 cqi_k;//0~8 map to 0/2/4/8/10/20/40/80/160 ms
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 process_num;
+ kal_int8 meas_po;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpaf11_1_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+/******************************************
+* For HS-DSCH
+******************************************/
+[meas_po] "Meas power offset of HS-DPSCH"
+-12~26
+@0
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF11_2.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF11_2.l1v
new file mode 100755
index 0000000..6f7379c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF11_2.l1v
@@ -0,0 +1,120 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF11_2: HSDPA with IF under Fading Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF11_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 num_of_hsscch;
+ kal_uint8 harq_preamble_mode;
+ kal_uint8 cqi_k;//0~8 map to 0/2/4/8/10/20/40/80/160 ms
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 process_num;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpaf11_2_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+/******************************************
+* For HS-DSCH
+******************************************/
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF12.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF12.l1v
new file mode 100755
index 0000000..8695205
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF12.l1v
@@ -0,0 +1,101 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF12: CQI calibration under Fading Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_int8 meas_po;
+ kal_uint8 dpaf12_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpaf12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[meas_po] "Meas power offset of HS-DPSCH"
+-12~26
+@0
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF13.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF13.l1v
new file mode 100755
index 0000000..ce090c2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF13.l1v
@@ -0,0 +1,105 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF13: Demodulation of HS-PDSCH with Single Link under Fading (Configure H-Set and Modulation)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF13
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ kal_int8 meas_po;
+ kal_uint8 dpaf13_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpaf13_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[meas_po] "Meas power offset of HS-DPSCH"
+-12~26
+@0
+[dpaf13_par_idx] "HSDPA parameter number"
+1~10
+@1
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF14.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF14.l1v
new file mode 100755
index 0000000..7f58707
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF14.l1v
@@ -0,0 +1,101 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF14: CQI calibration with variety of Ior/Ioc under Static Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF14
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_int8 meas_po;
+ kal_uint8 dpaf14_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpaf14_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[meas_po] "Meas power offset of HS-DPSCH"
+-12~26
+@0
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF15.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF15.l1v
new file mode 100755
index 0000000..630f90b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF15.l1v
@@ -0,0 +1,132 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF15: H-Set6 with TxDiversity under Fading Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF15
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+ kal_int8 meas_po;
+ kal_uint8 dpaf15_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpas15_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[meas_po] "Meas power offset of HS-DPSCH"
+-12~26
+@0
+[dpaf15_par_idx] "HSDPA parameters 1~10"
+1~10
+@1
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS02_OCIC.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS02_OCIC.l1v
new file mode 100755
index 0000000..ecece58
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS02_OCIC.l1v
@@ -0,0 +1,167 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS02(OCIC): SHO but no HS serving cell change"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS02_OCIC
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 num_of_hsscch;
+ kal_uint8 harq_preamble_mode;
+ kal_uint8 cqi_k;//0~8 map to 0/2/4/8/10/20/40/80/160 ms
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 process_num;
+} udps_dpas02_ocic_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@0
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS08_1.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS08_1.l1v
new file mode 100755
index 0000000..b3eb1c8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS08_1.l1v
@@ -0,0 +1,152 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS08_1: Verify HS-PDSCH receiving before ASU procedure for SHO"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS08_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 num_of_hsscch;
+ kal_uint8 harq_preamble_mode;
+ kal_uint8 cqi_k;//0~8 map to 0/2/4/8/10/20/40/80/160 ms
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 process_num;
+} udps_dpas08_1_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+/******************************************
+* For HS-DSCH
+******************************************/
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[harq_preamble_mode] " HARQ ACK/NACK preamble enable or not "
+0~1
+@0
+
+[cqi_k] " 0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms "
+0~8
+@1
+
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[process_num] " HARQ process number "
+1~8
+@6
+
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC1.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC1.l1v
new file mode 100755
index 0000000..213c842
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC1.l1v
@@ -0,0 +1,167 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_CC1: HSDPA Serving Cell Changes When Doing SHO"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_CC1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 num_of_hsscch;
+ kal_uint8 harq_preamble_mode;
+ kal_uint8 cqi_k;//0~8 map to 0/2/4/8/10/20/40/80/160 ms
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 process_num;
+} udps_dpas_cc1_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC2.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC2.l1v
new file mode 100755
index 0000000..d606aed
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC2.l1v
@@ -0,0 +1,185 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_CC2: HSDPA Serving Cell Changes When Doing TRHHO"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_CC2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+{
+ kal_uint ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2; // for HHO delay
+ kal_uint8 Tdpch_rl2; // for HHO delay
+ kal_uint16 OVSFdpch_rl2; // for HHO delay
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+}
+} udps_dpas_cc2_struct; // DPAS_CC2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[DOFF_bts2] "(DCH) Default DPCH Offset for BTS2 [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC3.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC3.l1v
new file mode 100755
index 0000000..79297b6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC3.l1v
@@ -0,0 +1,179 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_CC3: HSDPA Serving Cell Changes When Doing TMHHO"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_CC3
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ //kal_uint16 DOFF_bts2; // Don't Care for TMHHO
+ kal_uint8 Tdpch_rl2; // for HHO delay
+ kal_uint16 OVSFdpch_rl2; // for HHO delay
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+}
+} udps_dpas_cc3_struct; // DPAS_CC3
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC4.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC4.l1v
new file mode 100755
index 0000000..070ea41
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC4.l1v
@@ -0,0 +1,152 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_CC4: Verify HS-PDSCH receiving under SHO(serving cell not change)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_CC4
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 num_of_hsscch;
+ kal_uint8 harq_preamble_mode;
+ kal_uint8 cqi_k;//0~8 map to 0/2/4/8/10/20/40/80/160 ms
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 process_num;
+} udps_dpas_cc4_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+/******************************************
+* For HS-DSCH
+******************************************/
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[harq_preamble_mode] " HARQ ACK/NACK preamble enable or not "
+0~1
+@0
+
+[cqi_k] " 0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms "
+0~8
+@1
+
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[process_num] " HARQ process number "
+1~8
+@6
+
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC5.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC5.l1v
new file mode 100755
index 0000000..e6eae14
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC5.l1v
@@ -0,0 +1,183 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_CC5: Verify HS-DSCH can work as normal when TR-HHO is failed"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_CC5
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2; // for HHO delay
+ kal_uint8 Tdpch_rl2; // for HHO delay
+ kal_uint16 OVSFdpch_rl2; // for HHO delay
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+} udps_dpas_cc5_struct; // DPAS_CC5
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[DOFF_bts2] "(DCH) Default DPCH Offset for BTS2 [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC6.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC6.l1v
new file mode 100755
index 0000000..443963d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC6.l1v
@@ -0,0 +1,177 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_CC6: Verify HS-DSCH can work as normal when TM-HHO is failed"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_CC6
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ //kal_uint16 DOFF_bts2; // Don't Care for TMHHO
+ kal_uint8 Tdpch_rl2; // for HHO delay
+ kal_uint16 OVSFdpch_rl2; // for HHO delay
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+} udps_dpas_cc6_struct; // DPAS_CC6
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_MEAS1.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_MEAS1.l1v
new file mode 100755
index 0000000..7acaca0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_MEAS1.l1v
@@ -0,0 +1,167 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_MEAS1: Add neighbor cell to Monitor set, and no ASU"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_MEAS1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 num_of_hsscch;
+ kal_uint8 harq_preamble_mode;
+ kal_uint8 cqi_k;//0~8 map to 0/2/4/8/10/20/40/80/160 ms
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 process_num;
+} udps_dpas_meas1_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_MEAS2.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_MEAS2.l1v
new file mode 100755
index 0000000..b7f898e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_MEAS2.l1v
@@ -0,0 +1,164 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_MEAS2: Verify HS-DSCH can work as normal when UE is reading SFN"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_MEAS2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_uint16 uarfcn_bts3;
+ kal_uint16 psc_bts3;
+ kal_uint16 uarfcn_bts4;
+ kal_uint16 psc_bts4;
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 num_of_hsscch;
+ kal_uint8 harq_preamble_mode;
+ kal_uint8 cqi_k;//0~8 map to 0/2/4/8/10/20/40/80/160 ms
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 process_num;
+} udps_dpas_meas2_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@11
+
+[uarfcn_bts3] "UARFCN of Serving Cell 3"
+10562~10838
+@10600
+
+[psc_bts3] "PSC of Serving Cell 3"
+0~511
+@12
+
+[uarfcn_bts4] "UARFCN of Serving Cell 4"
+10562~10838
+@10600
+
+[psc_bts4] "PSC of Serving Cell 4"
+0~511
+@13
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[harq_preamble_mode] " HARQ ACK/NACK preamble enable or not "
+0~1
+@0
+
+[cqi_k] " 0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms "
+0~8
+@1
+
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[process_num] " HARQ process number "
+1~8
+@6
+
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_MEAS3.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_MEAS3.l1v
new file mode 100755
index 0000000..6e4b68e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_MEAS3.l1v
@@ -0,0 +1,150 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_MEAS3: GSM measurements (Event triggered report with BSIC verfication required) when HSDSCH connection exists."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_MEAS3
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell
+ kal_int8 bsic_bts2; // BSIC of GSM neighbor cell
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+
+ //HSDPA parameters
+ kal_uint8 num_of_hsscch;
+ kal_uint8 harq_preamble_mode;
+ kal_uint8 cqi_k;//0~8 map to 0/2/4/8/10/20/40/80/160 ms
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 process_num;
+} udps_dpas_meas3_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+0~63
+@13
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[harq_preamble_mode] " HARQ ACK/NACK preamble enable or not "
+0~1
+@0
+
+[cqi_k] " 0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms "
+0~8
+@1
+
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[process_num] " HARQ process number "
+1~8
+@6
+
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_OCIC1.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_OCIC1.l1v
new file mode 100755
index 0000000..266b8dd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_OCIC1.l1v
@@ -0,0 +1,167 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_OCIC1: Establish HS connection after ASU"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_OCIC1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 num_of_hsscch;
+ kal_uint8 harq_preamble_mode;
+ kal_uint8 cqi_k;//0~8 map to 0/2/4/8/10/20/40/80/160 ms
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 process_num;
+} udps_dpas_ocic1_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_OCIC2.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_OCIC2.l1v
new file mode 100755
index 0000000..87acb18
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_OCIC2.l1v
@@ -0,0 +1,167 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_OCIC2: Consecutive HSDPA serving cell change"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_OCIC2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 num_of_hsscch;
+ kal_uint8 harq_preamble_mode;
+ kal_uint8 cqi_k;//0~8 map to 0/2/4/8/10/20/40/80/160 ms
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 process_num;
+} udps_dpas_ocic2_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL1.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL1.l1v
new file mode 100755
index 0000000..2eac632
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL1.l1v
@@ -0,0 +1,166 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_SL1: Connection Setup of HSDPA"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_SL1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+{
+ kal_uint ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+}
+} udps_dpas_Sl1_struct; // DPA01
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL10.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL10.l1v
new file mode 100755
index 0000000..b1aa58b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL10.l1v
@@ -0,0 +1,93 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_SL10: Reporting of Channel Quality Indicator (AWGN+Single Link)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_SL10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 dpas_sl10_par_idx;
+
+} udps_dpas_sl10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL11.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL11.l1v
new file mode 100755
index 0000000..6b0ef09
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL11.l1v
@@ -0,0 +1,120 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_SL11: Reporting of Channel Quality Indicator (AWGN+Diversity)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_SL11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+ {
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ //tx_diversity_E diversity_mode; // for CD9
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+
+ kal_uint8 dpas_sl11_par_idx;
+} udps_dpas_sl11_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[dpas_sl11_par_idx] "HSDPA parameters 1~6"
+1~6
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL12.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL12.l1v
new file mode 100755
index 0000000..4a43ee7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL12.l1v
@@ -0,0 +1,82 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_SL12: HSDPA connection with different DPCH timing"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_SL12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 dpas_sl12_par_idx;
+} udps_dpas_sl2_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[dpas_sl12_par_idx] "HSDPA parameters 1~15"
+1~15
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL13.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL13.l1v
new file mode 100755
index 0000000..43f6e23
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL13.l1v
@@ -0,0 +1,94 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_SL13: HSDPA connection with dual scrambling code"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_SL13
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint32 dl_sc;
+ kal_uint16 OVSFdpch_rl1;
+
+} udps_dpas_sl13_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[dl_sc] "(DCH) Dedicated DL Scrambling code Num.(SSC)"
+0~15
+@3
+
+
+/******************************************
+* For HSDPA
+******************************************/
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL2.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL2.l1v
new file mode 100755
index 0000000..32f9454
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL2.l1v
@@ -0,0 +1,96 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_SL2: Demodulation of HS-PDSCH with Single Link under Static Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_SL2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 dpas_sl2_par_idx;
+
+} udps_dpas_sl2_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[dpas_sl2_par_idx] "HSDPA parameters 1~15"
+1~15
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL3.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL3.l1v
new file mode 100755
index 0000000..8b9094c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL3.l1v
@@ -0,0 +1,162 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_SL3: Highest data rate for category 8 (TB size=14411, # of HS-PDSCH=10, 16QAM, inter-TTI dist=1)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_SL3
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+} udps_dpas_sl3_struct; // DPAS_SL3
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+RMC_12_2
+RMC_64
+@RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@6
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@14
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL4.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL4.l1v
new file mode 100755
index 0000000..018e38c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL4.l1v
@@ -0,0 +1,172 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_SL4: HS-DSCH receiving with DCH(384K/144K/64K/12.2K)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_SL4
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_RMC_12_2; // OVSF code for DPCH of RMC_12_2
+ kal_uint16 OVSFdpch_RMC_64; // OVSF code for DPCH of RMC_64
+ kal_uint16 OVSFdpch_RMC_144; // OVSF code for DPCH of RMC_144
+ kal_uint16 OVSFdpch_RMC_384; // OVSF code for DPCH of RMC_384
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+ kal_uint8 process_num;
+} udps_dpas_sl4_struct; //DPAS_SL4
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_RMC_12_2] "OVSF code of DL DPCH for RMC_12_2 - SF128"
+0~127
+@15
+
+[OVSFdpch_RMC_64] "OVSF code of DL DPCH for RMC_64 - SF32"
+0~31
+@3
+
+[OVSFdpch_RMC_144] "OVSF code of DL DPCH for RMC_144 - SF16"
+0~15
+@1
+
+[OVSFdpch_RMC_384] "OVSF code of DL DPCH for RMC_384 - SF8"
+0~7
+@6
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL5.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL5.l1v
new file mode 100755
index 0000000..78d0995
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL5.l1v
@@ -0,0 +1,131 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_SL5: Demodulation of HS-PDSCH with Diversity under Static Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_SL5
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+ kal_uint8 dpas_sl5_par_idx;
+} udps_dpas_sl5_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/*
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+*/
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+/*
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~2
+@1
+*/
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[dpas_sl5_par_idx] "HSDPA parameters 1~20"
+1~20
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL6.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL6.l1v
new file mode 100755
index 0000000..577a1d5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL6.l1v
@@ -0,0 +1,96 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_SL6: HSDPA Enhancement- Preamble/Postamble"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_SL6
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+ {
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 dpas_sl6_par_idx;
+
+ } udps_dpas_sl6_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[dpas_sl6_par_idx] "HSDPA parameters 1~5"
+1~5
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL7.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL7.l1v
new file mode 100755
index 0000000..82d389e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL7.l1v
@@ -0,0 +1,162 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_SL7: Verify UE can work as normal when MAC-hs Reset is requested."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_SL7
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+} udps_dpas_sl7_struct; // DPAS_SL7
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL8.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL8.l1v
new file mode 100755
index 0000000..7d51df1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL8.l1v
@@ -0,0 +1,199 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_SL8: Verify HS-DSCH can work as normal when rx out of sync."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_SL8
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //Timer in connected mode
+ kal_uint8 T313; // 0~15
+ kal_uint16 N313; // 1, 2, 4, 10, 20, 50, 100, 200
+ kal_uint16 N315; // 1, 2, 4, 10, 20, 50, 100, 200, 400, 600, 800, 1000
+} udps_dpas_sl8_struct; // DPAS_SL8
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+
+/******************************************
+* Timer in connected mode
+******************************************/
+[T313] " T313 "
+0~15
+@15
+
+[N313] " N313 "
+N313_1 1
+N313_2 2
+N313_4 4
+N313_10 10
+N313_20 20
+N313_50 50
+N313_100 100
+@N313_200 200
+
+[N315] " N315 "
+@N315_1 1
+N315_2 2
+N315_4 4
+N315_10 10
+N315_20 20
+N315_50 50
+N315_100 100
+N315_200 200
+N315_400 400
+N315_600 600
+N315_800 800
+N315_1000 1000
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL9.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL9.l1v
new file mode 100755
index 0000000..b45eb30
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL9.l1v
@@ -0,0 +1,183 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_SL9: Verify UE can work as normal when setting phase reference to S-CPICH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_SL9
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //Phase reference of dedicated channel
+ kal_bool pcpich_usage;
+ kal_int8 scpich_ssc;
+ kal_uint8 scpich_ovsf;
+} udps_dpas_SL9_struct; // DPAS_SL9
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+
+/******************************************
+* For S-CPICH
+******************************************/
+[pcpich_usage] " Indicate if P-CPICH can be used for channel estimation "
+@KAL_FALSE
+KAL_TRUE
+
+[scpich_ssc] " Scrambling code of S-CPICH "
+-1~15
+@0
+
+[scpich_ovsf] " OVSF code of S-CPICH, 0 ~ 255 "
+0~255
+@28
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_TGPS1.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_TGPS1.l1v
new file mode 100755
index 0000000..08e6fdf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_TGPS1.l1v
@@ -0,0 +1,169 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_TGPS1:ACK/NACK/CQI Reporting When Conflicting With Transmission Gap."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_TGPS1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+{
+ kal_uint ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2; // for HHO delay
+ kal_uint8 Tdpch_rl2; // for HHO delay
+ kal_uint16 OVSFdpch_rl2; // for HHO delay
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+}
+} udps_dpas_tgps1_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@5
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@10
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_TGPS2.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_TGPS2.l1v
new file mode 100755
index 0000000..c039299
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_TGPS2.l1v
@@ -0,0 +1,173 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_TGPS2: HS-DSCH can work as normal when CM for executing GSM/Interfreq measurement."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_TGPS2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ kal_uint8 single_or_double_frame_tg;
+} udps_dpas_tgps2_struct; // DPAS_TGPS2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+[single_or_double_frame_tg] "single frame:1, double frame:2"
+1~2
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN01_1.l1v
new file mode 100755
index 0000000..ccb195d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN01_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN01-1: Connection Setup of E-DCH(10ms) and E-DCH TTI modification from 10ms to 2ms."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn01_1_struct; // R6-CN01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN01_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN01_2.l1v
new file mode 100755
index 0000000..ec552dd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN01_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN01-2: Connection Setup of E-DCH(10m) and E-DCH TTI modification from 2ms to 10ms."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn01_2_struct; // R6-CN01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN02_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN02_1.l1v
new file mode 100755
index 0000000..11def56
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN02_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN02-1: E-DCH retransmission (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN02_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn02_1_struct; // R6-CN02-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN02_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN02_2.l1v
new file mode 100755
index 0000000..966e77e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN02_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN02-2: E-DCH retransmission (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN02_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn02_2_struct; // R6-CN02-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN03_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN03_1.l1v
new file mode 100755
index 0000000..d53f2ce
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN03_1.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN03-1: ASU procedure for adding a DPCH RL (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN03_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn03_1_struct; // R6-CN03-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN03_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN03_2.l1v
new file mode 100755
index 0000000..7a131bd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN03_2.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN03-2: ASU procedure for adding a DPCH RL (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN03_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn03_2_struct; // R6-CN03-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN04_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN04_1.l1v
new file mode 100755
index 0000000..a7e5291
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN04_1.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN04-1: ASU procedure for adding an E-DCH RL (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN04_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn04_1_struct; // R6-CN04-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN04_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN04_2.l1v
new file mode 100755
index 0000000..2eef1da
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN04_2.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN04-2: ASU procedure for adding an E-DCH RL (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN04_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn04_2_struct; // R6-CN04-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN05_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN05_1.l1v
new file mode 100755
index 0000000..3e7c152
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN05_1.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN05-1: ASU procedure for removing a DPCH RL (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN05_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn05_1_struct; // R6-CN05-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN05_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN05_2.l1v
new file mode 100755
index 0000000..670d09d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN05_2.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN05-2: ASU procedure for removing a DPCH RL (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN05_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn05_2_struct; // R6-CN05-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN06_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN06_1.l1v
new file mode 100755
index 0000000..fbba4b4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN06_1.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN06-1: ASU procedure for removing an E-DCH RL (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN06_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn06_1_struct; // R6-CN06-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN06_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN06_2.l1v
new file mode 100755
index 0000000..e7fb168
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN06_2.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN06-2: ASU procedure for removing an E-DCH RL (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN06_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn06_2_struct; // R6-CN06-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN07_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN07_1.l1v
new file mode 100755
index 0000000..58490e5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN07_1.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN07-1: ASU procedure for removing an E-DCH RL and change of serving E-DCH cell (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN07_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn07_1_struct; // R6-CN07-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN07_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN07_2.l1v
new file mode 100755
index 0000000..aad3ce9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN07_2.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN07-2: ASU procedure for removing an E-DCH RL and change of serving E-DCH cell (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN07_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn07_2_struct; // R6-CN07-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN08_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN08_1.l1v
new file mode 100755
index 0000000..023c956
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN08_1.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN08-1: TM HHO to intra-frequency cell (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN08_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn08_1_struct; // R6-CN08-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN08_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN08_2.l1v
new file mode 100755
index 0000000..f2e66e1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN08_2.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN08-2: TM HHO to intra-frequency cell (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN08_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn08_2_struct; // R6-CN08-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN09_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN09_1.l1v
new file mode 100755
index 0000000..62fa99f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN09_1.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN09-1: TM HHO to intra-frequency cell failed and revert (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN09_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn09_1_struct; // R6-CN09-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN09_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN09_2.l1v
new file mode 100755
index 0000000..93b07c8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN09_2.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN09-2: TM HHO to intra-frequency cell failed and revert (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN09_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn09_2_struct; // R6-CN09-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN10_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN10_1.l1v
new file mode 100755
index 0000000..ea714da
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN10_1.l1v
@@ -0,0 +1,388 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN10-1: TR HHO to intra-frequency cell (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN10_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn10_1_struct; // R6-CN10-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN10_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN10_2.l1v
new file mode 100755
index 0000000..9e0428d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN10_2.l1v
@@ -0,0 +1,388 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN10-2: TR HHO to intra-frequency cell (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN10_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn10_2_struct; // R6-CN10-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN11_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN11_1.l1v
new file mode 100755
index 0000000..576af07
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN11_1.l1v
@@ -0,0 +1,388 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN11-1: TR HHO to intra-frequency cell failed and revert (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN11_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn11_1_struct; // R6-CN11-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN11_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN11_2.l1v
new file mode 100755
index 0000000..be4993d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN11_2.l1v
@@ -0,0 +1,388 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN11-2: TR HHO to intra-frequency cell failed and revert (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN11_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn11_2_struct; // R6-CN11-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN12_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN12_1.l1v
new file mode 100755
index 0000000..6522836
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN12_1.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN12-1: TM HHO to inter-frequency cell (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN12_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn12_1_struct; // R6-CN12-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN12_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN12_2.l1v
new file mode 100755
index 0000000..8b1ff35
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN12_2.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN12-2: TM HHO to inter-frequency cell (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN12_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn12_2_struct; // R6-CN12-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN13_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN13_1.l1v
new file mode 100755
index 0000000..b6fbfbc
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN13_1.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN13-1: TM HHO to inter-frequency cell failed and revert (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN13_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn13_1_struct; // R6-CN13-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN13_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN13_2.l1v
new file mode 100755
index 0000000..5e82fb6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN13_2.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN13-2: TM HHO to inter-frequency cell failed and revert (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN13_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn13_2_struct; // R6-CN13-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN14_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN14_1.l1v
new file mode 100755
index 0000000..a68b1be
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN14_1.l1v
@@ -0,0 +1,388 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN14-1: TR HHO to inter-frequency cell (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN14_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn14_1_struct; // R6-CN14-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN14_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN14_2.l1v
new file mode 100755
index 0000000..ba691cd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN14_2.l1v
@@ -0,0 +1,388 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN14-2: TR HHO to inter-frequency cell (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN14_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn14_2_struct; // R6-CN14-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN15_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN15_1.l1v
new file mode 100755
index 0000000..cb63b2e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN15_1.l1v
@@ -0,0 +1,388 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN15-1: TR HHO to inter-frequency cell failed and revert (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN15_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn14_1_struct; // R6-CN15-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN15_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN15_2.l1v
new file mode 100755
index 0000000..5296855
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN15_2.l1v
@@ -0,0 +1,388 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN15-2: TR HHO to inter-frequency cell failed and revert (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN15_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn15_2_struct; // R6-CN14-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN16.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN16.l1v
new file mode 100755
index 0000000..4220eeb
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN16.l1v
@@ -0,0 +1,255 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN16: Connection Setup of E-DCH without HS-DSCH and E-DCH TTI modification."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN16
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn16_struct; // R6-CN16
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN17_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN17_1.l1v
new file mode 100755
index 0000000..b699a36
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN17_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN17-1: E-RGCH added and removed (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN17_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn17_1_struct; // R6-CN17-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@0
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN17_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN17_2.l1v
new file mode 100755
index 0000000..bca8f5c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN17_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN17-2: E-RGCH added and removed (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN17_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn17_2_struct; // R6-CN17-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@0
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN18_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN18_1.l1v
new file mode 100755
index 0000000..d145c9b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN18_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN18-1: E-DCH transmission (10ms) while F-DPCH is switched to/from DL DPCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN18_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn18_1_struct; // R6-CN18-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN18_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN18_2.l1v
new file mode 100755
index 0000000..6514ead
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN18_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN18-2: E-DCH transmission (2ms) while F-DPCH is switched to/from DL DPCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN18_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn18_2_struct; // R6-CN18-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN19_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN19_1.l1v
new file mode 100755
index 0000000..d83ebef
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN19_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN19-1: Maximum Tx and Rx test while 10ms E-DCH TTI."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN19_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn19_1_struct; // R6-CN19-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+RMC_12_2
+@RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@1
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN19_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN19_2.l1v
new file mode 100755
index 0000000..990d3f8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN19_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN19-2: Maximum Tx and Rx test while 2ms E-DCH TTI."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN19_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn19_2_struct; // R6-CN19-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+RMC_12_2
+@RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@1
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN20.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN20.l1v
new file mode 100755
index 0000000..55f9c4a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN20.l1v
@@ -0,0 +1,345 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN20: E-DCH connection test with STTD and closed loop transmit diversity."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN20
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for R6-CN20 only (Tx DivirsityL CLTD)
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn20_struct; // R6-CN20
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+FDD_DL_TX_STTD
+@FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~1
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN21.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN21.l1v
new file mode 100755
index 0000000..6ff04cf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN21.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN21: TM HHO to intra-frequency cell without synchonization procedure."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN21
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn21_struct; // R6-CN21
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN22.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN22.l1v
new file mode 100755
index 0000000..ec03633
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN22.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN22: E-DCH connection test with F-DPCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN22
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn22_struct; // R6-CN22
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH: 0~SF-1"
+0~255
+@14
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN90_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN90_1.l1v
new file mode 100755
index 0000000..ff6b579
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN90_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN90-1: TC for debugging R6-CN19-1."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN90_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn90_1_struct; // R6-CN90-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] " Choose One of the FOUR standard RMC "
+RMC_144
+RMC_12_2
+@RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] " (DCH) OVSF code of DL DCH: 0~SF-1 "
+0~511
+@1
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] "number of HS-SCCH"
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN90_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN90_2.l1v
new file mode 100755
index 0000000..fee4829
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN90_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN90-2: TC for debugging R6-CN19-2."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN90_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn90_2_struct; // R6-CN90-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] " Choose One of the FOUR standard RMC "
+RMC_144
+RMC_12_2
+@RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] " (DCH) OVSF code of DL DCH: 0~SF-1 "
+0~511
+@1
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] "number of HS-SCCH"
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN91_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN91_1.l1v
new file mode 100755
index 0000000..11605a9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN91_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN91-1: TC for debugging R6-CN19-1."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN91_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn91_1_struct; // R6-CN91-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] " Choose One of the FOUR standard RMC "
+RMC_144
+RMC_12_2
+@RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] " (DCH) OVSF code of DL DCH: 0~SF-1 "
+0~511
+@1
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] "number of HS-SCCH"
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN91_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN91_2.l1v
new file mode 100755
index 0000000..2f01ebf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN91_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN91-2: TC for debugging R6-CN19-2."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN91_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn91_2_struct; // R6-CN91-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] " Choose One of the FOUR standard RMC "
+RMC_144
+RMC_12_2
+@RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] " (DCH) OVSF code of DL DCH: 0~SF-1 "
+0~511
+@1
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] "number of HS-SCCH"
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW01_1.l1v
new file mode 100755
index 0000000..38e4d5e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW01_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW01-1: UE Transmission Power Headroom (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_pw01_1_struct; // R6-PW01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@20
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW01_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW01_2.l1v
new file mode 100755
index 0000000..a3e2185
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW01_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW01-2: UE Transmission Power Headroom (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_pw01_2_struct; // R6-PW01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@20
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW02.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW02.l1v
new file mode 100755
index 0000000..f9d6d54
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW02.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW02: Power control in the downlink for F-DPCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_pw02_struct; // R6-PW02
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH: 0~SF-1"
+0~255
+@14
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@3
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW03.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW03.l1v
new file mode 100755
index 0000000..80a797b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW03.l1v
@@ -0,0 +1,342 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW03: Power control in the downlink for F-DPCH - STTD."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-PW03 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_pw03_struct; // R6-PW03
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+@FDD_DL_TX_STTD
+FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH: 0~SF-1"
+0~255
+@14
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@3
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW04.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW04.l1v
new file mode 100755
index 0000000..365b136
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW04.l1v
@@ -0,0 +1,344 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW04: Power control in the downlink for F-DPCH - compressed mode."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_pw04_struct; // R6-PW04
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH: 0~SF-1"
+0~255
+@14
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@3
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW05.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW05.l1v
new file mode 100755
index 0000000..8271235
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW05.l1v
@@ -0,0 +1,351 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW05: Power control in the downlink for F-DPCH - SHO condition."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSF_fdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_pw05_struct; // R6-PW05
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH for BTS1: 0~SF-1"
+0~255
+@14
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSF_fdpch_rl2] "(DCH) OVSF code of F-DPCH for BTS2: 0~SF-1 "
+0~255
+@14
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@3
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW06_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW06_1.l1v
new file mode 100755
index 0000000..ea91cba
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW06_1.l1v
@@ -0,0 +1,102 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW06-1: Post verification fail with DPCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW06_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+} udps_r6_pw06_1_struct; // R6-PW06-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW06_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW06_2.l1v
new file mode 100755
index 0000000..543b3fd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW06_2.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW06-2: Post verification fail with DPCH, HS-DSCH and E-DCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW06_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_pw06_2_struct; // R6-PW06-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW06_3.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW06_3.l1v
new file mode 100755
index 0000000..4a34f68
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW06_3.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW06-3: Post verification fail with F-DPCH, HS-DSCH and E-DCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW06_3
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSF_fdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_pw06_3_struct; // R6-PW06-3
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH for BTS1: 0~SF-1"
+0~255
+@14
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSF_fdpch_rl2] "(DCH) OVSF code of F-DPCH for BTS2: 0~SF-1 "
+0~255
+@14
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@9
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@10
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code of BTS1:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW07_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW07_1.l1v
new file mode 100755
index 0000000..cd120b8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW07_1.l1v
@@ -0,0 +1,102 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW07-1: Post verification succeed with DPCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW07_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+} udps_r6_pw07_1_struct; // R6-PW07-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW07_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW07_2.l1v
new file mode 100755
index 0000000..1ad5da1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW07_2.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW07-2: Post verification succeed with DPCH, HS-DSCH and E-DCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW07_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_pw07_2_struct; // R6-PW07-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW07_3.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW07_3.l1v
new file mode 100755
index 0000000..26ee4f2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW07_3.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW07-3: Post verification succeed with F-DPCH, HS-DSCH and E-DCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW07_3
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSF_fdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_pw07_3_struct; // R6-PW07-3
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH for BTS1: 0~SF-1"
+0~255
+@14
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSF_fdpch_rl2] "(DCH) OVSF code of F-DPCH for BTS2: 0~SF-1 "
+0~255
+@14
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@9
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@10
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code of BTS1:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW08_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW08_1.l1v
new file mode 100755
index 0000000..93ab0b8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW08_1.l1v
@@ -0,0 +1,102 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW08-1: Post verification fail and sync succeed with DPCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW08_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+} udps_r6_pw08_1_struct; // R6-PW08-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW08_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW08_2.l1v
new file mode 100755
index 0000000..eabfa6d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW08_2.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW08-2: Post verification fail and sync succeed with DPCH, HS-DSCH and E-DCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW08_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_pw08_2_struct; // R6-PW08-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW08_3.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW08_3.l1v
new file mode 100755
index 0000000..9f8415d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW08_3.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW08-3: Post verification fail and sync succeed with F-DPCH, HS-DSCH and E-DCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW08_3
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSF_fdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_pw08_3_struct; // R6-PW08-3
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH for BTS1: 0~SF-1"
+0~255
+@14
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSF_fdpch_rl2] "(DCH) OVSF code of F-DPCH for BTS2: 0~SF-1 "
+0~255
+@14
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@9
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@10
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code of BTS1:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM01_1.l1v
new file mode 100755
index 0000000..948e09a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM01_1.l1v
@@ -0,0 +1,375 @@
+{ Validation }
+Title = "[12_HSUPA_R6][3_CM]R6-CM01-1: E-DCH transmission during compressed mode (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CM01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cm01_1_struct; // R6-CM01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM01_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM01_2.l1v
new file mode 100755
index 0000000..0facbca
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM01_2.l1v
@@ -0,0 +1,375 @@
+{ Validation }
+Title = "[12_HSUPA_R6][3_CM]R6-CM01-2: E-DCH transmission during compressed mode (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CM01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cm01_2_struct; // R6-CM01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM02_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM02_1.l1v
new file mode 100755
index 0000000..c32782f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM02_1.l1v
@@ -0,0 +1,375 @@
+{ Validation }
+Title = "[12_HSUPA_R6][3_CM]R6-CM02-1: E-DCH transmission during compressed mode (10ms TTI) - two successive CM frames TG."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CM02_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cm02_1_struct; // R6-CM02-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM02_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM02_2.l1v
new file mode 100755
index 0000000..68e29ab
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM02_2.l1v
@@ -0,0 +1,375 @@
+{ Validation }
+Title = "[12_HSUPA_R6][3_CM]R6-CM02-2: E-DCH transmission during compressed mode (2ms TTI) - two successive CM frames TG."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CM02_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cm02_2_struct; // R6-CM02-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM03_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM03_1.l1v
new file mode 100755
index 0000000..0fb7ae9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM03_1.l1v
@@ -0,0 +1,375 @@
+{ Validation }
+Title = "[12_HSUPA_R6][3_CM]R6-CM03-1: E-DCH transmission during compressed mode (10ms TTI) - double frame TG."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CM03_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cm03_1_struct; // R6-CM03-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM03_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM03_2.l1v
new file mode 100755
index 0000000..47ad8f7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM03_2.l1v
@@ -0,0 +1,375 @@
+{ Validation }
+Title = "[12_HSUPA_R6][3_CM]R6-CM03-2: E-DCH transmission during compressed mode (2ms TTI) - double frame TG."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CM03_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cm03_2_struct; // R6-CM03-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM04.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM04.l1v
new file mode 100755
index 0000000..44bf0cc
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM04.l1v
@@ -0,0 +1,375 @@
+{ Validation }
+Title = "[12_HSUPA_R6][3_CM]R6-CM04: E-DCH retransmission during compressed mode (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CM04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cm04_struct; // R6-CM04
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM05_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM05_1.l1v
new file mode 100755
index 0000000..0eda4ee
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM05_1.l1v
@@ -0,0 +1,375 @@
+{ Validation }
+Title = "[12_HSUPA_R6][3_CM]R6-CM05-1: E-DCH transmission(10ms TTI) in compressed mode while CM method of HLS and frame type B."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CM05_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ //udps_RMC_type_struct udps_RMC_type;
+ udps_RMC_PxxxK_type_struct udps_RMC_PxxxK_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cm05_1_struct; // R6-CM05-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_PxxxK_type] "Choose One of RMC P32K P64K P128K P384K"
+@RMC_P32K
+RMC_P64K
+RMC_P128K
+RMC_P384K
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] " (DCH) OVSF code of DL DCH: 0~SF-1 "
+0~511
+@3
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM05_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM05_2.l1v
new file mode 100755
index 0000000..f875950
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM05_2.l1v
@@ -0,0 +1,375 @@
+{ Validation }
+Title = "[12_HSUPA_R6][3_CM]R6-CM05-2: E-DCH transmission(2ms TTI) in compressed mode while CM method of HLS and frame type B."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CM05_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ //udps_RMC_type_struct udps_RMC_type;
+ udps_RMC_PxxxK_type_struct udps_RMC_PxxxK_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cm05_2_struct; // R6-CM05-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_PxxxK_type] "Choose One of RMC P32K P64K P128K P384K"
+@RMC_P32K
+RMC_P64K
+RMC_P128K
+RMC_P384K
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] " (DCH) OVSF code of DL DCH: 0~SF-1 "
+0~511
+@3
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG01_1.l1v
new file mode 100755
index 0000000..4fdc965
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG01_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-AG01-1: Demodulation of E-AGCH (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AG01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_ag01_1_struct; // R6-AG01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG01_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG01_2.l1v
new file mode 100755
index 0000000..d715da3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG01_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-AG01-2: Demodulation of E-AGCH (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AG01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_ag01_2_struct; // R6-AG01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG02_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG02_1.l1v
new file mode 100755
index 0000000..cfd2e47
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG02_1.l1v
@@ -0,0 +1,345 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-AG02-1: Demodulation of E-AGCH (10ms TTI) - STTD performance."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AG02_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for R6-CN20 only (Tx DivirsityL CLTD)
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_ag02_1_struct; // R6-AG02-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+FDD_DL_TX_STTD
+@FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~1
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG02_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG02_2.l1v
new file mode 100755
index 0000000..3fe0040
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG02_2.l1v
@@ -0,0 +1,345 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-AG02-2: Demodulation of E-AGCH (2ms TTI) - STTD performance."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AG02_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for R6-CN20 only (Tx DivirsityL CLTD)
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_ag02_2_struct; // R6-AG02-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+FDD_DL_TX_STTD
+@FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~1
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG03_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG03_1.l1v
new file mode 100755
index 0000000..f2a6703
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG03_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-AG03-1: Demodulation of E-AGCH (10ms TTI) after E-RNTI modification."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AG03_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_ag03_1_struct; // R6-AG03-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@52428
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG03_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG03_2.l1v
new file mode 100755
index 0000000..5cc878a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG03_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-AG03-2: Demodulation of E-AGCH (2ms TTI) after E-RNTI modification."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AG03_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_ag03_2_struct; // R6-AG03-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@52428
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI01_1.l1v
new file mode 100755
index 0000000..1bc7f71
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI01_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-HI01-1: Detection of E-HICH in single RL conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_HI01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_hi01_1_struct; // R6-HI01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI01_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI01_2.l1v
new file mode 100755
index 0000000..2730114
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI01_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-HI01-2: Detection of E-HICH in single RL conditions (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_HI01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_hi01_2_struct; // R6-HI01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI02_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI02_1.l1v
new file mode 100755
index 0000000..c5153b4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI02_1.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-HI02-1: Detection of E-HICH from cell in RLS not containing the Serving E-DCH cell in SHO conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_HI02_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_hi02_1_struct; // R6-HI02-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI02_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI02_2.l1v
new file mode 100755
index 0000000..6524a05
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI02_2.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-HI02-2: Detection of E-HICH from cell in RLS not containing the Serving E-DCH cell in SHO conditions (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_HI02_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_hi02_2_struct; // R6-HI02-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI03_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI03_1.l1v
new file mode 100755
index 0000000..2df2aa7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI03_1.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-HI03-1: Detection of E-HICH from cell in RLS containing the Serving E-DCH cell in SHO conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_HI03_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_hi03_1_struct; // R6-HI03-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI03_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI03_2.l1v
new file mode 100755
index 0000000..47f9938
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI03_2.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-HI03-2: Detection of E-HICH from cell in RLS containing the Serving E-DCH cell in SHO conditions (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_HI03_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_hi03_2_struct; // R6-HI03-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI04_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI04_1.l1v
new file mode 100755
index 0000000..1a06108
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI04_1.l1v
@@ -0,0 +1,345 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-HI04-1: Detection of E-HICH in single RL conditions (10ms TTI) - STTD performance."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_HI04_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for R6-CN20 only (Tx DivirsityL CLTD)
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_hi04_1_struct; // R6-HI04-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+FDD_DL_TX_STTD
+@FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~1
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI04_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI04_2.l1v
new file mode 100755
index 0000000..56a0ac8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI04_2.l1v
@@ -0,0 +1,345 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-HI04-2: Detection of E-HICH in single RL conditions (2ms TTI) - STTD performance."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_HI04_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for R6-CN20 only (Tx DivirsityL CLTD)
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_hi04_2_struct; // R6-HI04-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+FDD_DL_TX_STTD
+@FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~1
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG01_1.l1v
new file mode 100755
index 0000000..1ca4c3d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG01_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-RG01-1: Detection of E-RGCH in single RL conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_RG01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_rg01_1_struct; // R6-RG01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG01_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG01_2.l1v
new file mode 100755
index 0000000..2abe9fd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG01_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-RG01-2: Detection of E-RGCH in single RL conditions (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_RG01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_rg01_2_struct; // R6-RG01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG02.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG02.l1v
new file mode 100755
index 0000000..5615d50
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG02.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-RG02: Detection of E-RGCH from cell not in serving E-DCH RLS in SHO conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_RG02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_rg02_struct; // R6-RG02
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG03_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG03_1.l1v
new file mode 100755
index 0000000..b5248b0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG03_1.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-RG03-1: Detection of E-RGCH from cell in serving E-DCH RLS in SHO conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_RG03_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_rg03_1_struct; // R6-RG03-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG03_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG03_2.l1v
new file mode 100755
index 0000000..227eaac
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG03_2.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-RG03-2: Detection of E-RGCH from cell in serving E-DCH RLS in SHO conditions (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_RG03_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_rg03_2_struct; // R6-RG03-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG04_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG04_1.l1v
new file mode 100755
index 0000000..a0b83fe
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG04_1.l1v
@@ -0,0 +1,345 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-RG04-1: Detection of E-RGCH in single RL conditions (10ms TTI) - STTD performance."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_RG04_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for R6-CN20 only (Tx DivirsityL CLTD)
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_rg04_1_struct; // R6-RG04-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+FDD_DL_TX_STTD
+@FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~1
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG04_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG04_2.l1v
new file mode 100755
index 0000000..0a039a1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG04_2.l1v
@@ -0,0 +1,345 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-RG04-2: Detection of E-RGCH in single RL conditions (2ms TTI) - STTD performance."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_RG04_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for R6-CN20 only (Tx DivirsityL CLTD)
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_rg04_2_struct; // R6-RG04-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+FDD_DL_TX_STTD
+@FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~1
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/5_E_TFC/udps_R6_TF01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/5_E_TFC/udps_R6_TF01_1.l1v
new file mode 100755
index 0000000..02907c8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/5_E_TFC/udps_R6_TF01_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][5_E_TFC]R6-TF01-1: E-TFC restriction while E-DCH TTI is 10ms."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_TF01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_tf01_1_struct; // R6-TF01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/5_E_TFC/udps_R6_TF01_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/5_E_TFC/udps_R6_TF01_2.l1v
new file mode 100755
index 0000000..fc33d4d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/5_E_TFC/udps_R6_TF01_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][5_E_TFC]R6-TF01-2: E-TFC restriction while E-DCH TTI is 2ms."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_TF01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_tf01_2_struct; // R6-TF01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/5_E_TFC/udps_R6_TF02_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/5_E_TFC/udps_R6_TF02_1.l1v
new file mode 100755
index 0000000..07e432d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/5_E_TFC/udps_R6_TF02_1.l1v
@@ -0,0 +1,343 @@
+{ Validation }
+Title = "[12_HSUPA_R6][5_E_TFC]R6-TF02-1: E-TFC switch test while E-DCH TTI is 10ms."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_TF02_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+} udps_r6_tf02_1_struct; // R6-TF02-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/5_E_TFC/udps_R6_TF02_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/5_E_TFC/udps_R6_TF02_2.l1v
new file mode 100755
index 0000000..efe01a3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/5_E_TFC/udps_R6_TF02_2.l1v
@@ -0,0 +1,343 @@
+{ Validation }
+Title = "[12_HSUPA_R6][5_E_TFC]R6-TF02-2: E-TFC switch test while E-DCH TTI is 2ms."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_TF02_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+
+} udps_r6_tf02_2_struct; // R6-TF02-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CD01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CD01_1.l1v
new file mode 100755
index 0000000..9e68af8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CD01_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CD01-1: Maximum Tx and Rx test while 10ms E-DCH TTI."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CD01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn19_1_struct; // R6-CN19-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+RMC_12_2
+@RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@1
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] " PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG01_1.l1v
new file mode 100755
index 0000000..64a39d8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG01_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-AG01-1: CSD performance - Demodulation of E-AGCH (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_AG01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_ag01_1_struct; // R6-CSD-AG01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG01_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG01_2.l1v
new file mode 100755
index 0000000..820c71d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG01_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-AG01-2: CSD performance - Demodulation of E-AGCH (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_AG01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_ag01_2_struct; // R6-CSD-AG01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG02_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG02_1.l1v
new file mode 100755
index 0000000..97f6965
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG02_1.l1v
@@ -0,0 +1,345 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-AG02-1: CSD performance - Demodulation of E-AGCH (10ms TTI) - STTD performance."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_AG02_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for R6-CN20 only (Tx DivirsityL CLTD)
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_ag02_1_struct; // R6-CSD-AG02-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+FDD_DL_TX_STTD
+@FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~1
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG02_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG02_2.l1v
new file mode 100755
index 0000000..8e5063e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG02_2.l1v
@@ -0,0 +1,345 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-AG02-2: CSD performance - Demodulation of E-AGCH (2ms TTI) - STTD performance."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_AG02_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for R6-CN20 only (Tx DivirsityL CLTD)
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_ag02_2_struct; // R6-CSD-AG02-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+FDD_DL_TX_STTD
+@FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~1
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI01_1.l1v
new file mode 100755
index 0000000..fccb02d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI01_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-HI01-1: CSD performance - Detection of E-HICH in single RL conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_HI01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_hi01_1_struct; // R6-CSD-HI01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI01_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI01_2.l1v
new file mode 100755
index 0000000..3168348
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI01_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-HI01-2: CSD performance - Detection of E-HICH in single RL conditions (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_HI01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_hi01_2_struct; // R6-CSD-HI01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI02_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI02_1.l1v
new file mode 100755
index 0000000..f5f8df7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI02_1.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-HI02-1: CSD performance - Detection of E-HICH from cell in RLS not containing the Serving E-DCH cell in SHO conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_HI02_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_hi02_1_struct; // R6-CSD-HI02-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI02_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI02_2.l1v
new file mode 100755
index 0000000..b2d44ea
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI02_2.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-HI02-2: CSD performance - Detection of E-HICH from cell in RLS not containing the Serving E-DCH cell in SHO conditions (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_HI02_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_hi02_2_struct; // R6-CSD-HI02-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI03_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI03_1.l1v
new file mode 100755
index 0000000..9273ea7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI03_1.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-HI03-1: CSD performance - Detection of E-HICH from cell in RLS containing the Serving E-DCH cell in SHO conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_HI03_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_hi03_1_struct; // R6-CSD-HI03-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI03_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI03_2.l1v
new file mode 100755
index 0000000..3f1d89f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI03_2.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-HI03-2: CSD performance - Detection of E-HICH from cell in RLS containing the Serving E-DCH cell in SHO conditions (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_HI03_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_hi03_2_struct; // R6-CSD-HI03-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI04_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI04_1.l1v
new file mode 100755
index 0000000..febe511
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI04_1.l1v
@@ -0,0 +1,345 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-HI04-1: CSD performance - Detection of E-HICH in single RL conditions (10ms TTI) - STTD performance."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_HI04_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for R6-CN20 only (Tx DivirsityL CLTD)
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_hi04_1_struct; // R6-CSD-HI04-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+FDD_DL_TX_STTD
+@FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~1
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI04_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI04_2.l1v
new file mode 100755
index 0000000..dc9211b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI04_2.l1v
@@ -0,0 +1,345 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-HI04-2: CSD performance - Detection of E-HICH in single RL conditions (2ms TTI) - STTD performance."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_HI04_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for R6-CN20 only (Tx DivirsityL CLTD)
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_hi04_2_struct; // R6-CSD-HI04-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+FDD_DL_TX_STTD
+@FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~1
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_PW02.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_PW02.l1v
new file mode 100755
index 0000000..710b780
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_PW02.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-PW02: CSD performance - Power control in the downlink for F-DPCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_PW02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_pw02_struct; // R6-CSD-PW02
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH: 0~SF-1"
+0~255
+@14
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@3
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_PW03.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_PW03.l1v
new file mode 100755
index 0000000..dacbcf1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_PW03.l1v
@@ -0,0 +1,342 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-PW03: CSD performance - Power control in the downlink for F-DPCH - STTD."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_PW03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-PW03 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_pw03_struct; // R6-CSD-PW03
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+@FDD_DL_TX_STTD
+FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH: 0~SF-1"
+0~255
+@14
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@3
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG01_1.l1v
new file mode 100755
index 0000000..56cd07a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG01_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-RG01-1: CSD performance - Detection of E-RGCH in single RL conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_RG01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_rg01_1_struct; // R6-CSD-RG01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG01_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG01_2.l1v
new file mode 100755
index 0000000..6504b9e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG01_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-RG01-2: CSD performance - Detection of E-RGCH in single RL conditions (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_RG01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_rg01_2_struct; // R6-CSD-RG01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG02.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG02.l1v
new file mode 100755
index 0000000..18f64cf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG02.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-RG02: CSD performance - Detection of E-RGCH from cell not in serving E-DCH RLS in SHO conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_RG02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_rg02_struct; // R6-CSD-RG02
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG03_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG03_1.l1v
new file mode 100755
index 0000000..26462ab
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG03_1.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-RG03-1: CSD performance - Detection of E-RGCH from cell in serving E-DCH RLS in SHO conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_RG03_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_rg03_1_struct; // R6-CSD-RG03-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG03_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG03_2.l1v
new file mode 100755
index 0000000..cabaa7d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG03_2.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-RG03-2: CSD performance - Detection of E-RGCH from cell in serving E-DCH RLS in SHO conditions (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_RG03_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_rg03_2_struct; // R6-CSD-RG03-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG04_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG04_1.l1v
new file mode 100755
index 0000000..8c8bc1c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG04_1.l1v
@@ -0,0 +1,345 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-RG04-1: CSD performance - Detection of E-RGCH in single RL conditions (10ms TTI) - STTD performance."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_RG04_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for R6-CN20 only (Tx DivirsityL CLTD)
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_rg04_1_struct; // R6-CSD-RG04-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+FDD_DL_TX_STTD
+@FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~1
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG04_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG04_2.l1v
new file mode 100755
index 0000000..3550583
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG04_2.l1v
@@ -0,0 +1,345 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-RG04-2: CSD performance - Detection of E-RGCH in single RL conditions (2ms TTI) - STTD performance."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_RG04_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for R6-CN20 only (Tx DivirsityL CLTD)
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_rg04_2_struct; // R6-CSD-RG04-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+FDD_DL_TX_STTD
+@FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~1
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL01_1.l1v
new file mode 100755
index 0000000..9dbb9b9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL01_1.l1v
@@ -0,0 +1,302 @@
+{ Validation }
+Title = "[12_HSUPA_R6][7_AGL8960]R6-AGL01-1: Agilent 8960 FDD test: RMC12.2k +HSPA (10ms E-DCH TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AGL01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ kal_uint8 beta_c; // for HSDPA FDD test (TS34.121 5.2A)
+ kal_uint8 beta_d; // for HSDPA FDD test (TS34.121 5.2A)
+
+ //E-DCH parameters
+ kal_uint8 edch_target_etfci; //E-TFCI 0~127 128: for E-TFCI switching test 129: for all E-TFCI blocked test
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+
+ kal_uint8 edpcch_po; // E-DPCCH/DPCCH power offset. 0~8
+ kal_uint8 hsupa_sub_test; // sub-test id used to configure ref E-TFCI (TS34.121 5.2B)
+} udps_r6_agl01_1_struct; // R6-AGL01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@0
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@0
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@20
+
+
+[beta_c] "beta_c of UL DPCH (TF1,TF0)"
+1~15
+@8
+
+[beta_d] "beta_d of UL DPCH (TF1,TF0)"
+1~15
+@15
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@2
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@6
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@9
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@10
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[edch_target_etfci] "E-TFCI under test (0~127,128:E-TFCI switch,129:all E-TFCI blocked)"
+0~129
+@45
+
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@42
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~1
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+22~22
+@22
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+1~1
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+1~1
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~0
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+21~21
+@21
+
+[edpcch_po] "E-DPCCH/DPCCH power offset. (0~8)"
+0~8
+@5
+
+[hsupa_sub_test] "HSUPA sub-test ID (1~5)"
+1~5
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL01_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL01_2.l1v
new file mode 100755
index 0000000..fb46019
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL01_2.l1v
@@ -0,0 +1,302 @@
+{ Validation }
+Title = "[12_HSUPA_R6][7_AGL8960]R6-AGL01-2: Agilent 8960 FDD test: RMC12.2k +HSPA (2ms E-DCH TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AGL01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ kal_uint8 beta_c; // for HSDPA FDD test (TS34.121 5.2A)
+ kal_uint8 beta_d; // for HSDPA FDD test (TS34.121 5.2A)
+
+ //E-DCH parameters
+ kal_uint8 edch_target_etfci; //E-TFCI 0~127 128: for E-TFCI switching test 129: for all E-TFCI blocked test
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+
+ kal_uint8 edpcch_po; // E-DPCCH/DPCCH power offset. 0~8
+ kal_uint8 hsupa_sub_test; // sub-test id used to configure ref E-TFCI (TS34.121 5.2B)
+} udps_r6_agl01_2_struct; // R6-AGL01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@0
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@0
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@20
+
+
+[beta_c] "beta_c of UL DPCH (TF1,TF0)"
+1~15
+@8
+
+[beta_d] "beta_d of UL DPCH (TF1,TF0)"
+1~15
+@15
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@2
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@6
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@9
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@10
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[edch_target_etfci] "E-TFCI under test (0~127,128:E-TFCI switch,129:all E-TFCI blocked)"
+0~129
+@60
+
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@42
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~1
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+22~22
+@22
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+1~1
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+1~1
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~0
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+21~21
+@21
+
+[edpcch_po] "E-DPCCH/DPCCH power offset. (0~8)"
+0~8
+@5
+
+[hsupa_sub_test] "HSUPA sub-test ID (1~5)"
+1~5
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL02_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL02_1.l1v
new file mode 100755
index 0000000..e836215
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL02_1.l1v
@@ -0,0 +1,293 @@
+{ Validation }
+Title = "[12_HSUPA_R6][7_AGL8960]R6-AGL02-1: Agilent 8960 FDD test: HSPA (10ms E-DCH TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AGL02_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ kal_uint8 beta_c; // for HSDPA FDD test (TS34.121 5.2A)
+ kal_uint8 beta_d; // for HSDPA FDD test (TS34.121 5.2A)
+
+ //E-DCH parameters
+ kal_uint8 edch_target_etfci; //E-TFCI 0~127 128: for E-TFCI switching test 129: for all E-TFCI blocked test
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+
+ kal_uint8 edpcch_po; // E-DPCCH/DPCCH power offset. 0~8
+ kal_uint8 hsupa_sub_test; // sub-test id used to configure ref E-TFCI (TS34.121 5.2B)
+} udps_r6_agl01_1_struct; // R6-AGL01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@0
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@0
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@40
+
+[beta_c] "beta_c of UL DPCH (TF1,TF0)"
+1~15
+@8
+
+[beta_d] "beta_d of UL DPCH (TF1,TF0)"
+1~15
+@15
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@2
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@6
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@9
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@10
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[edch_target_etfci] "E-TFCI under test (0~127,128:E-TFCI switch,129:all E-TFCI blocked)"
+0~129
+@45
+
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@42
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~1
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+22~22
+@22
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+1~1
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+1~1
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~0
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+21~21
+@21
+
+[edpcch_po] "E-DPCCH/DPCCH power offset. (0~8)"
+0~8
+@5
+
+[hsupa_sub_test] "HSUPA sub-test ID (1~5)"
+1~5
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL02_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL02_2.l1v
new file mode 100755
index 0000000..d71d2b2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL02_2.l1v
@@ -0,0 +1,294 @@
+{ Validation }
+Title = "[12_HSUPA_R6][7_AGL8960]R6-AGL02-2: Agilent 8960 FDD test: HSPA (2ms E-DCH TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AGL02_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ kal_uint8 beta_c; // for HSDPA FDD test (TS34.121 5.2A)
+ kal_uint8 beta_d; // for HSDPA FDD test (TS34.121 5.2A)
+
+ //E-DCH parameters
+ kal_uint8 edch_target_etfci; //E-TFCI 0~127 128: for E-TFCI switching test 129: for all E-TFCI blocked test
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+
+ kal_uint8 edpcch_po; // E-DPCCH/DPCCH power offset. 0~8
+ kal_uint8 hsupa_sub_test; // sub-test id used to configure ref E-TFCI (TS34.121 5.2B)
+} udps_r6_agl01_2_struct; // R6-AGL01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@0
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@0
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@40
+
+
+[beta_c] "beta_c of UL DPCH (TF1,TF0)"
+1~15
+@8
+
+[beta_d] "beta_d of UL DPCH (TF1,TF0)"
+1~15
+@15
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@2
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@6
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@9
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@10
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[edch_target_etfci] "E-TFCI under test (0~127,128:E-TFCI switch,129:all E-TFCI blocked)"
+0~129
+@60
+
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@42
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~1
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+22~22
+@22
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+1~1
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+1~1
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~0
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+21~21
+@21
+
+[edpcch_po] "E-DPCCH/DPCCH power offset. (0~8)"
+0~8
+@5
+
+[hsupa_sub_test] "HSUPA sub-test ID (1~5)"
+1~5
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_AG01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_AG01_1.l1v
new file mode 100755
index 0000000..e2072a7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_AG01_1.l1v
@@ -0,0 +1,341 @@
+{ Validation }
+Title = "[12_HSUPA_R6][7_AGL8960]R6-AGL-AG01-1: CSD performance on 8960 - Demodulation of E-AGCH (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AGL_AG01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint32 EAgchTestSampleNum; // Number of E-AGCH test sample
+} udps_r6_agl_ag01_1_struct; // R6-AGL-AG01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell "
+0~511
+@0
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num. "
+0~16777215
+@0
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1 "
+0~511
+@20
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH"
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@2
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@6
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@9
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@10
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255) "
+0~255
+@42
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127) "
+0~127
+@22
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code "
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+@FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
+
+[EAgchTestSampleNum] "Number of E-AGCH test sample: Integer(1..2000000000)"
+1~2000000000
+@1000
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_AG01_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_AG01_2.l1v
new file mode 100755
index 0000000..8bcd9e7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_AG01_2.l1v
@@ -0,0 +1,341 @@
+{ Validation }
+Title = "[12_HSUPA_R6][7_AGL8960]R6-AGL-AG01-2: CSD performance on 8960 - Demodulation of E-AGCH (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AGL_AG01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint32 EAgchTestSampleNum; // Number of E-AGCH test sample
+} udps_r6_agl_ag01_2_struct; // R6-AGL-AG01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell "
+0~511
+@0
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num. "
+0~16777215
+@0
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1 "
+0~511
+@20
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH"
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@2
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@6
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@9
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@10
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255) "
+0~255
+@42
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127) "
+0~127
+@22
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code "
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+@FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
+
+[EAgchTestSampleNum] "Number of E-AGCH test sample: Integer(1..2000000000)"
+1~2000000000
+@1000
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_1_ACK.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_1_ACK.l1v
new file mode 100755
index 0000000..3b5f6e6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_1_ACK.l1v
@@ -0,0 +1,341 @@
+{ Validation }
+Title = "[12_HSUPA_R6][7_AGL8960]R6-AGL-HI01-1-ACK: CSD performance on 8960 - Detection of E-HICH ACK in single RL conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AGL_HI01_1_ACK
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint32 EHichTestSampleNum; // Number of E-HICH test sample
+} udps_r6_agl_hi01_1_ack_struct; // R6-AGL-HI01-1-ACK
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell "
+0~511
+@0
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num. "
+0~16777215
+@0
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1 "
+0~511
+@20
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH"
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@2
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@6
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@9
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@10
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255) "
+0~255
+@42
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127) "
+0~127
+@22
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code "
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+@FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
+
+[EHichTestSampleNum] "Number of E-HICH test sample: Integer(1..2000000000)"
+1~2000000000
+@1000
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_1_FALSE_ACK.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_1_FALSE_ACK.l1v
new file mode 100755
index 0000000..0ec50cf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_1_FALSE_ACK.l1v
@@ -0,0 +1,341 @@
+{ Validation }
+Title = "[12_HSUPA_R6][7_AGL8960]R6-AGL-HI01-1-FALSE-ACK: CSD performance on 8960 - Detection of E-HICH DTX in single RL conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AGL_HI01_1_FALSE_ACK
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint32 EHichTestSampleNum; // Number of E-HICH test sample
+} udps_r6_agl_hi01_1_false_ack_struct; // R6-AGL-HI01-1-FALSE-ACK
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell "
+0~511
+@0
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num. "
+0~16777215
+@0
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1 "
+0~511
+@20
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH"
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@2
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@6
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@9
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@10
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255) "
+0~255
+@42
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@23
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code "
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+@FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
+
+[EHichTestSampleNum] "Number of E-HICH test sample: Integer(1..2000000000)"
+1~2000000000
+@1000
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_2_ACK.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_2_ACK.l1v
new file mode 100755
index 0000000..ca539fb
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_2_ACK.l1v
@@ -0,0 +1,341 @@
+{ Validation }
+Title = "[12_HSUPA_R6][7_AGL8960]R6-AGL-HI01-2-ACK: CSD performance on 8960 - Detection of E-HICH ACK in single RL conditions (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AGL_HI01_2_ACK
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint32 EHichTestSampleNum; // Number of E-HICH test sample
+} udps_r6_agl_hi01_2_ack_struct; // R6-AGL-HI01-2-ACK
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell "
+0~511
+@0
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num. "
+0~16777215
+@0
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1 "
+0~511
+@20
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH"
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@2
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@6
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@9
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@10
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255) "
+0~255
+@42
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127) "
+0~127
+@22
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code "
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+@FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
+
+[EHichTestSampleNum] "Number of E-HICH test sample: Integer(1..2000000000)"
+1~2000000000
+@1000
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_2_FALSE_ACK.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_2_FALSE_ACK.l1v
new file mode 100755
index 0000000..1b04789
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_2_FALSE_ACK.l1v
@@ -0,0 +1,341 @@
+{ Validation }
+Title = "[12_HSUPA_R6][7_AGL8960]R6-AGL-HI01-2-FALSE-ACK: CSD performance on 8960 - Detection of E-HICH DTX in single RL conditions (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AGL_HI01_2_FALSE_ACK
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint32 EHichTestSampleNum; // Number of E-HICH test sample
+} udps_r6_agl_hi01_2_false_ack_struct; // R6-AGL-HI01-2-FALSE-ACK
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell "
+0~511
+@0
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num. "
+0~16777215
+@0
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1 "
+0~511
+@20
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH"
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@2
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@6
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@9
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@10
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255) "
+0~255
+@42
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@23
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code "
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+@FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
+
+[EHichTestSampleNum] "Number of E-HICH test sample: Integer(1..2000000000)"
+1~2000000000
+@1000
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME01_1.l1v
new file mode 100755
index 0000000..5f0161e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME01_1.l1v
@@ -0,0 +1,354 @@
+{ Validation }
+Title = "[12_HSUPA_R6][8_MEAS]R6-ME01-1: GSM measurements with E-DCH connection(10 ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_ME01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell
+ kal_int8 bsic_bts2; // BSIC of GSM neighbor cell
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_me01_1_struct; // R6-ME01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+0~63
+@13
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME01_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME01_2.l1v
new file mode 100755
index 0000000..f780886
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME01_2.l1v
@@ -0,0 +1,354 @@
+{ Validation }
+Title = "[12_HSUPA_R6][8_MEAS]R6-ME01-2: GSM measurements with E-DCH connection(2 ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_ME01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell
+ kal_int8 bsic_bts2; // BSIC of GSM neighbor cell
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_me01_2_struct; // R6-ME01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+0~63
+@13
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME02_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME02_1.l1v
new file mode 100755
index 0000000..373725b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME02_1.l1v
@@ -0,0 +1,102 @@
+{ Validation }
+Title = "[12_HSUPA_R6][8_MEAS]R6-ME02-1: Event 6C measurement report (with DPCH)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_ME02_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+} udps_r6_me02_1_struct; // R6-ME02-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME02_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME02_2.l1v
new file mode 100755
index 0000000..743c165
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME02_2.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][8_MEAS]R6-ME02-2: Event 6C measurement report (with DPCH, HS-DSCH and E-DCH)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_ME02_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_me02_2_struct; // R6-ME02-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@0
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME02_3.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME02_3.l1v
new file mode 100755
index 0000000..e61f604
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME02_3.l1v
@@ -0,0 +1,377 @@
+{ Validation }
+Title = "[12_HSUPA_R6][8_MEAS]R6-ME02-3: Event 6C measurement report (with F-DPCH, HS-DSCH and E-DCH)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_ME02_3
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSF_fdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_me02_3_struct; // R6-ME02-3
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH for BTS1: 0~SF-1"
+0~255
+@14
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSF_fdpch_rl2] "(DCH) OVSF code of F-DPCH for BTS2: 0~SF-1 "
+0~255
+@14
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@9
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@10
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@0
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code of BTS1:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME03_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME03_1.l1v
new file mode 100755
index 0000000..6f232af
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME03_1.l1v
@@ -0,0 +1,102 @@
+{ Validation }
+Title = "[12_HSUPA_R6][8_MEAS]R6-ME03-1: Event 6D measurement report (with DPCH)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_ME03_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+} udps_r6_me03_1_struct; // R6-ME03-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME03_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME03_2.l1v
new file mode 100755
index 0000000..44ea041
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME03_2.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][8_MEAS]R6-ME03-2: Event 6D measurement report (with DPCH, HS-DSCH and E-DCH)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_ME03_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_me03_2_struct; // R6-ME03-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME03_3.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME03_3.l1v
new file mode 100755
index 0000000..8087d41
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME03_3.l1v
@@ -0,0 +1,377 @@
+{ Validation }
+Title = "[12_HSUPA_R6][8_MEAS]R6-ME03-3: Event 6D measurement report (with F-DPCH, HS-DSCH and E-DCH)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_ME03_3
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSF_fdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_me03_3_struct; // R6-ME03-3
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH for BTS1: 0~SF-1"
+0~255
+@14
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSF_fdpch_rl2] "(DCH) OVSF code of F-DPCH for BTS2: 0~SF-1 "
+0~255
+@14
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@9
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@10
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code of BTS1:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_01.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_01.l1v
new file mode 100755
index 0000000..2caf051
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_01.l1v
@@ -0,0 +1,353 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-01: DRX Behavior Check for HSSCCH/HSPDSCH"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r7_cpc_01_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r7_cpc_01_par_idx] "cpc parameters 1~4"
+1~4
+@1
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_02.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_02.l1v
new file mode 100755
index 0000000..985b791
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_02.l1v
@@ -0,0 +1,351 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-02: DRX Check for E-AGCH"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r7_cpc_02_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+[r7_cpc_02_par_idx] "cpc parameters 1~2"
+1~2
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_03.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_03.l1v
new file mode 100755
index 0000000..6c537fd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_03.l1v
@@ -0,0 +1,350 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-03: DRX Check for E-RGCH"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r7_cpc_03_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+[r7_cpc_03_par_idx] "cpc parameters 1~2"
+1~2
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_04.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_04.l1v
new file mode 100755
index 0000000..c6f0a28
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_04.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-04: DRX pattern overlaps with gap"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ //kal_uint8 r7_cpc_04_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_05.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_05.l1v
new file mode 100755
index 0000000..7860001
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_05.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-05: DTX Behavior Check with E-DCH data "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r7_cpc_05_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+[r7_cpc_05_par_idx] "cpc parameters 1~2"
+1~2
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_06.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_06.l1v
new file mode 100755
index 0000000..950af50
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_06.l1v
@@ -0,0 +1,350 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-06: DTX Behavior Check without E-DCH data "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r7_cpc_06_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+[r7_cpc_06_par_idx] "cpc parameters 1~2"
+1~2
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_07.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_07.l1v
new file mode 100755
index 0000000..ceca06a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_07.l1v
@@ -0,0 +1,350 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-07: DTX on /DRX off Behavior Check with E-DCH data (HS-DSCH data on) "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r7_cpc_07_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+[r7_cpc_07_par_idx] "cpc parameters 1~2"
+1~2
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_08.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_08.l1v
new file mode 100755
index 0000000..518e36f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_08.l1v
@@ -0,0 +1,350 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-08: DTX Behavior Check without E-DCH data with Post Verfication Successfully "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r7_cpc_08_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+[r7_cpc_08_par_idx] "cpc parameters 1~2"
+1~2
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_09.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_09.l1v
new file mode 100755
index 0000000..2cbffd8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_09.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-09: DTX pattern overlaps with gap"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r7_cpc_09_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+[r7_cpc_09_par_idx] "cpc parameters 1~2"
+1~2
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_10.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_10.l1v
new file mode 100755
index 0000000..02ff25b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_10.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-10: DRX Order Command Test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ //kal_uint8 r7_cpc_10_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_11.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_11.l1v
new file mode 100755
index 0000000..488257b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_11.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-11: DTX/DRX Order Command Test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ //kal_uint8 r7_cpc_11_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_12.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_12.l1v
new file mode 100755
index 0000000..070456a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_12.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-12: CPC switch Test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ //kal_uint8 r7_cpc_12_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_13.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_13.l1v
new file mode 100755
index 0000000..7f4d6eb
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_13.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-13: CPC Modification Test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_13
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ //kal_uint8 r7_cpc_13_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_13_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+FDD_EDCH_2SF2AND2SF4_16QAM
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_14.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_14.l1v
new file mode 100755
index 0000000..1433e72
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_14.l1v
@@ -0,0 +1,389 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-14: CPC behavior check after HHO to inter-frequency cell successfully. "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_14
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ //kal_uint8 r7_cpc_14_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_14_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10655
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_15.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_15.l1v
new file mode 100755
index 0000000..6c19219
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_15.l1v
@@ -0,0 +1,389 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-15: CPC behavior check after HHO to inter-frequency cell failed and reverts. "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_15
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ //kal_uint8 r7_cpc_15_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_15_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10655
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_16.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_16.l1v
new file mode 100755
index 0000000..3aad2aa
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_16.l1v
@@ -0,0 +1,354 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-16: CPC with SHO"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_16
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_16_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10630
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_01.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_01.l1v
new file mode 100755
index 0000000..1ba69f5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_01.l1v
@@ -0,0 +1,151 @@
+{ Validation }
+Title = "[13_R7R8]R7_EFACH_01: HS-DSCH setup in FDD_CELL_FACH state with FMO"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_EFACH_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ //udps_RMC_type_struct udps_RMC_type;
+
+
+
+ //kal_uint8 r7_efach_01_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_efach_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@65535
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+[RACH_TTI] "(RACH) TTI. [Number of frames]"
+@TTI10 1
+TTI20 2
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_02.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_02.l1v
new file mode 100755
index 0000000..9f0654f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_02.l1v
@@ -0,0 +1,109 @@
+{ Validation }
+Title = "[13_R7R8]R7_EFACH_02: HS-DSCH setup in FDD_CELL_PCH state without dedicated H-RNTI"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_EFACH_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_uint16 OVSFpich;
+
+ kal_int8 cpich_tx_power;
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+ kal_bool sttd_ind;
+
+ kal_uint8 DRX_cycle2_length;
+ kal_uint16 drx_cycle2_time; // if it's not 0. UL1 shall use pich_drx_2 for PICH receptin, else shall directly use pich_drx for PICH reception. 0~5120 ms
+
+ //kal_uint8 r7_efach_02_par_idx;
+ kal_uint8 pcch_tx_num;
+ kal_uint8 rxd_mode;
+}udps_r7_efach_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@2
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+[DRX_cycle2_length] "DRX cycle2 length for PICH, (6~9)"
+DRX6 6
+DRX7 7
+DRX8 8
+@DRX9 9
+
+[drx_cycle2_time] "drx_cycle2_time 0~5120ms"
+0~5120
+@0
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[pcch_tx_num] "pcch tx number 1~5"
+1~5
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_03.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_03.l1v
new file mode 100755
index 0000000..e696186
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_03.l1v
@@ -0,0 +1,106 @@
+{ Validation }
+Title = "[13_R7R8]R7_EFACH_03: HS-DSCH setup in FDD_CELL_PCH state with dedicated H-RNTI"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_EFACH_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_uint16 OVSFpich;
+
+ kal_int8 cpich_tx_power;
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+ kal_bool sttd_ind;
+
+ kal_uint8 DRX_cycle2_length;
+ kal_uint16 drx_cycle2_time; // if it's not 0. UL1 shall use pich_drx_2 for PICH receptin, else shall directly use pich_drx for PICH reception. 0~5120 ms
+
+ //kal_uint8 r7_efach_03_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r7_efach_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@2
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+[DRX_cycle2_length] "DRX cycle2 length for PICH, (6~9)"
+DRX6 6
+DRX7 7
+DRX8 8
+@DRX9 9
+
+[drx_cycle2_time] "drx_cycle2_time 0~5120ms"
+0~5120
+@0
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_04.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_04.l1v
new file mode 100755
index 0000000..4cdc903
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_04.l1v
@@ -0,0 +1,141 @@
+{ Validation }
+Title = "[13_R7R8]R7_EFACH_04: Paging On DRX Cycle2 Period"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_EFACH_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ kal_uint16 OVSFpich;
+
+ // kal_int8 cpich_tx_power;
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+ kal_bool sttd_ind;
+
+ kal_uint8 DRX_cycle2_length;
+ kal_uint16 drx_cycle2_time; // if it's not 0. UL1 shall use pich_drx_2 for PICH receptin, else shall directly use pich_drx for PICH reception. 0~5120 ms
+
+
+ //kal_uint8 r7_hsdpa_06_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_hsdpa_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+// Idle parameters
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@2
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+[DRX_cycle2_length] "DRX cycle2 length for PICH, (6~9)"
+@DRX6 6
+
+[drx_cycle2_time] "drx_cycle2_time 0~5120ms"
+0~5120
+@5120
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_05.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_05.l1v
new file mode 100755
index 0000000..a463e90
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_05.l1v
@@ -0,0 +1,151 @@
+{ Validation }
+Title = "[13_R7R8]R7_EFACH_05: Paging On DRX Cycle2 Period without HS-DSCH on EFACH state"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_EFACH_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ kal_uint8 Ts_ccpch;
+ kal_uint16 OVSFs_ccpch;
+ kal_uint16 OVSFpich;
+
+
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+ kal_uint8 DRX_cycle2_length;
+ kal_uint16 drx_cycle2_time;
+
+
+ kal_uint8 r7_efach_05_par_idx;
+ kal_uint8 rxd_mode;
+
+} udps_r7_efach_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+/*for PCH*/
+[Ts_ccpch] "Timing offset between S-CCPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFs_ccpch] "The OVSF code number of the S-CCPCH (0~SF-1)"
+0~63
+@3
+
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@2
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+[DRX_cycle2_length] "DRX cycle2 length for PICH, (6~9)"
+@DRX6 6
+
+
+[drx_cycle2_time] "drx_cycle2_time 0~5120ms"
+0~5120
+@5120
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_06.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_06.l1v
new file mode 100755
index 0000000..1b477c3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_06.l1v
@@ -0,0 +1,106 @@
+{ Validation }
+Title = "[13_R7R8]R7_EFACH_06: HS-DSCH setup in FDD_CELL_PCH state with dedicated H-RNTI and BCCH HRNTI"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_EFACH_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_uint16 OVSFpich;
+
+ kal_int8 cpich_tx_power;
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+ kal_bool sttd_ind;
+
+ kal_uint8 DRX_cycle2_length;
+ kal_uint16 drx_cycle2_time; // if it's not 0. UL1 shall use pich_drx_2 for PICH receptin, else shall directly use pich_drx for PICH reception. 0~5120 ms
+
+ //kal_uint8 r7_efach_06_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r7_efach_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@2
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+[DRX_cycle2_length] "DRX cycle2 length for PICH, (6~9)"
+DRX6 6
+DRX7 7
+DRX8 8
+@DRX9 9
+
+[drx_cycle2_time] "drx_cycle2_time 0~5120ms"
+0~5120
+@0
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_07.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_07.l1v
new file mode 100755
index 0000000..9750e46
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_07.l1v
@@ -0,0 +1,151 @@
+{ Validation }
+Title = "[13_R7R8]R7_EFACH_07: HS-DSCH setup in FDD_CELL_FACH state with dedicated H-RNTI and BCCH HRNTI"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_EFACH_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ //udps_RMC_type_struct udps_RMC_type;
+
+
+
+ //kal_uint8 r7_efach_07_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_efach_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@65535
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+[RACH_TTI] "(RACH) TTI. [Number of frames]"
+@TTI10 1
+TTI20 2
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_01.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_01.l1v
new file mode 100755
index 0000000..0b103d7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_01.l1v
@@ -0,0 +1,344 @@
+{ Validation }
+Title = "[13_R7R8]R7_FDPCH_01: Power control in the downlink for F-DPCH - single link with UE RXD "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_FDPCH_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ // kal_uint8 r7_fdpch_01_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r7_fdpch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH: 0~SF-1"
+0~255
+@14
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@3
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_02.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_02.l1v
new file mode 100755
index 0000000..60fbcbd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_02.l1v
@@ -0,0 +1,347 @@
+{ Validation }
+Title = "[13_R7R8]R7_FDPCH_02: Power control in the downlink for F-DPCH - STTD with UE RXD"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_FDPCH_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ // kal_uint8 r7_fdpch_02_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r7_fdpch_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+@FDD_DL_TX_STTD
+FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH: 0~SF-1"
+0~255
+@14
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@3
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_03.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_03.l1v
new file mode 100755
index 0000000..f39b41b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_03.l1v
@@ -0,0 +1,350 @@
+{ Validation }
+Title = "[13_R7R8]R7_FDPCH_03: Power control in the downlink for F-DPCH - compressed mode with UE RXD"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_FDPCH_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ // kal_uint8 r7_fdpch_03_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r7_fdpch_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10655
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH: 0~SF-1"
+0~255
+@14
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@3
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_04.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_04.l1v
new file mode 100755
index 0000000..531b840
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_04.l1v
@@ -0,0 +1,361 @@
+{ Validation }
+Title = "[13_R7R8]R7_FDPCH_04: Power control in the downlink for F-DPCH - SHO condition with UE RXD, (Noff1=5/5,2/7,3/6,0/9)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_FDPCH_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSF_fdpch_rl2; // for SHO delay
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 r7_fdpch_04_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r7_fdpch_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10630
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH for BTS1: 0~SF-1"
+0~255
+@14
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSF_fdpch_rl2] "(DCH) OVSF code of F-DPCH for BTS2: 0~SF-1 "
+0~255
+@14
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@3
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+[r7_fdpch_04_par_idx] "1: Noff1 5/5,2: Noff1 2/7,1: Noff1 3/6,1: Noff1 0/9"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_05.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_05.l1v
new file mode 100755
index 0000000..72c6164
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_05.l1v
@@ -0,0 +1,344 @@
+{ Validation }
+Title = "[13_R7R8]R7_FDPCH_05: Power control in the downlink for F-DPCH - single link with UE RXD + UL TPC BitNum=4"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_FDPCH_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ // kal_uint8 r7_fdpch_01_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r7_fdpch_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH: 0~SF-1"
+0~255
+@14
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@3
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_01.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_01.l1v
new file mode 100755
index 0000000..06e2622
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_01.l1v
@@ -0,0 +1,97 @@
+{ Validation }
+Title = "[13_R7R8]R7_HSDPA_01: Demodulation of HS-PDSCH on H-Set 8/10 with single link "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_HSDPA_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ kal_uint8 r7_hsdpa_01_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_hsdpa_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+[r7_hsdpa_01_par_idx] "HSDPA parameters 1~3"
+1~3
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_02.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_02.l1v
new file mode 100755
index 0000000..56a88b2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_02.l1v
@@ -0,0 +1,98 @@
+{ Validation }
+Title = "[13_R7R8]R7_HSDPA_02: Demodulation of HS-PDSCH on H-Set 3/68/10 with single link and UE RXD under static channel "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_HSDPA_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ kal_uint8 r7_hsdpa_02_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_hsdpa_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+
+[r7_hsdpa_02_par_idx] "HSDPA parameters 1~7"
+1~7
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_03.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_03.l1v
new file mode 100755
index 0000000..5ac4d1b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_03.l1v
@@ -0,0 +1,130 @@
+{ Validation }
+Title = "[13_R7R8]R7_HSDPA_03: Demodulation of HS-PDSCH on H-Set 8/10 with STTD/CLTD and UE RXD under static channe"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_HSDPA_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ //tx_diversity_E diversity_mode; // for CD9
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+
+ kal_uint8 r7_hsdpa_03_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r7_hsdpa_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+/*
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~2
+@1
+*/
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[r7_hsdpa_03_par_idx ] "HSDPA parameters 1~6"
+1~6
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_04.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_04.l1v
new file mode 100755
index 0000000..a1a7dea
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_04.l1v
@@ -0,0 +1,130 @@
+{ Validation }
+Title = "[13_R7R8]R7_HSDPA_04: Demodulation of HS-PDSCH on H-Set 3/6/8/10 with STTD/CLTD and UE RXD under static channe"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_HSDPA_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ //tx_diversity_E diversity_mode; // for CD9
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+
+ kal_uint8 r7_hsdpa_03_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r7_hsdpa_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+/*
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~2
+@1
+*/
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[r7_hsdpa_04_par_idx ] "HSDPA parameters 1~14"
+1~14
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_05.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_05.l1v
new file mode 100755
index 0000000..5663be3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_05.l1v
@@ -0,0 +1,96 @@
+{ Validation }
+Title = "[13_R7R8]R7_HSDPA_05:Reporting of Channel Quality Indicator (AWGN+ 64QAM)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_HSDPA_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ //kal_uint8 r7_hsdpa_05_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_hsdpa_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_06.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_06.l1v
new file mode 100755
index 0000000..6f34d32
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_06.l1v
@@ -0,0 +1,93 @@
+{ Validation }
+Title = "[13_R7R8]R7_HSDPA_06: MAC-ehs Reset"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_HSDPA_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ //kal_uint8 r7_hsdpa_06_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_hsdpa_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_07.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_07.l1v
new file mode 100755
index 0000000..207ea46
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_07.l1v
@@ -0,0 +1,93 @@
+{ Validation }
+Title = "[13_R7R8]R7_HSDPA_07: HSSCCH Less Mode Test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_HSDPA_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ // kal_uint8 r7_hsdpa_07_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_hsdpa_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_08.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_08.l1v
new file mode 100755
index 0000000..0af9054
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_08.l1v
@@ -0,0 +1,93 @@
+{ Validation }
+Title = "[13_R7R8]R7_HSDPA_08: Highest Data Rate Test (64QAM with 15 codes)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_HSDPA_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ //kal_uint8 r7_hsdpa_08_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_hsdpa_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_64
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@1
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_01.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_01.l1v
new file mode 100755
index 0000000..37c3e00
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_01.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R8-CEDCH-01: Common EDCH setup test with default resource"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_CEDCH_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r8_cedch_01_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_cedch_01_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@2
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r8_cedch_01_par_idx] "cedch parameters 1~2, 1 for edch tti 2ms, 2 for 10ms"
+1~2
+@1
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_02.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_02.l1v
new file mode 100755
index 0000000..695f1e7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_02.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R8-CEDCH-02: Common EDCH setup test with non default resource"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_CEDCH_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r8_cedch_02_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_cedch_02_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@2
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r8_cedch_02_par_idx] "cedch parameters 1~2, 1 for edch tti 2ms, 2 for 10ms"
+1~2
+@1
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_03.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_03.l1v
new file mode 100755
index 0000000..95bb4f0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_03.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R8-CEDCH-03: Common EDCH with DTCH/DCCH test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_CEDCH_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r8_cedch_03_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_cedch_03_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@2
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r8_cedch_03_par_idx] "cedch parameters 1~2, 1 for edch tti 2ms, 2 for 10ms"
+1~2
+@1
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_04.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_04.l1v
new file mode 100755
index 0000000..5b94be5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_04.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R8-CEDCH-04: Common EDCH with CCCH test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_CEDCH_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r8_cedch_04_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_cedch_04_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@2
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r8_cedch_04_par_idx] "cedch parameters 1~2, 1 for edch tti 2ms, 2 for 10ms"
+1~2
+@1
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_05.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_05.l1v
new file mode 100755
index 0000000..2556203
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_05.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R8-CEDCH-05: Common EDCH with DTCH/DCCH test and check AG/RG/HI/HSDSCH performance"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_CEDCH_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r8_cedch_05_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_cedch_05_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@2
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r8_cedch_05_par_idx] "cedch parameters 1~2, 1 for edch tti 2ms, 2 for 10ms"
+1~2
+@1
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_05.l1v.bak b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_05.l1v.bak
new file mode 100755
index 0000000..5a289ea
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_05.l1v.bak
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R8-CEDCH-05: Common EDCH with DTCH/DCCH test and check AG/RG/HI/HSDSCH performance, "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_CEDCH_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r8_cedch_05_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_cedch_05_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@2
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r8_cedch_05_par_idx] "cedch parameters 1~2, 1 for edch tti 2ms, 2 for 10ms"
+1~2
+@1
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_06.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_06.l1v
new file mode 100755
index 0000000..6df375b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_06.l1v
@@ -0,0 +1,364 @@
+{ Validation }
+Title = "[13_R7R8]R8-CEDCH-06: Common EDCH setup and change to EDCH in DCH state"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_CEDCH_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ //udps_RMC_type_struct udps_RMC_type; // for CEDCH to EDCH
+ kal_uint16 DOFF_bts1; // for CEDCH to EDCH
+ kal_uint8 Tdpch_rl1; // for CEDCH to EDCH
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r8_cedch_06_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_cedch_06_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@2
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+[ehich_info_num] "Number of E-HICH info:(1 ~ 4)"
+1~4
+@1
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r8_cedch_06_par_idx] "cedch parameters 1~2, 1 for edch tti 2ms, 2 for 10ms"
+1~2
+@1
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_06.l1v.bak b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_06.l1v.bak
new file mode 100755
index 0000000..c63242f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_06.l1v.bak
@@ -0,0 +1,364 @@
+{ Validation }
+Title = "[13_R7R8]R8-CEDCH-06: Common EDCH setup and change to EDCH in DCH state."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_CEDCH_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ //udps_RMC_type_struct udps_RMC_type; // for CEDCH to EDCH
+ kal_uint16 DOFF_bts1; // for CEDCH to EDCH
+ kal_uint8 Tdpch_rl1; // for CEDCH to EDCH
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r8_cedch_06_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_cedch_06_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@2
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+[ehich_info_num] "Number of E-HICH info:(1 ~ 4)"
+1~4
+@1
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r8_cedch_06_par_idx] "cedch parameters 1~2, 1 for edch tti 2ms, 2 for 10ms"
+1~2
+@1
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_07.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_07.l1v
new file mode 100755
index 0000000..ad5fe0b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_07.l1v
@@ -0,0 +1,350 @@
+{ Validation }
+Title = "[13_R7R8]R8-CEDCH-07: Common EDCH setup with different Soffset Value"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_CEDCH_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r8_cedch_07_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_cedch_07_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@2
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r8_cedch_07_par_idx] "cedch parameters 1~2, 1 for edch tti 2ms, 2 for 10ms"
+1~2
+@1
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CRS1.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CRS1.l1v
new file mode 100755
index 0000000..bcfd9de
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CRS1.l1v
@@ -0,0 +1,361 @@
+{ Validation }
+Title = "[13_R7R8]R8-CRS1: Cell Re-selection in FDD_CELL_FACH (1 frequency)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_CRS1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ //kal_uint8 r8_fachdrx_01_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint8 drx_idx;
+}udps_r8_crs1_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "Target Cell"
+10562~10838
+@10630
+
+[psc_bts2] "PSC of target cell"
+0~511
+@511
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@2
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+[drx_idx] "drx_idx 1~3"
+1~3
+@1
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CRS2.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CRS2.l1v
new file mode 100755
index 0000000..3205eef
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CRS2.l1v
@@ -0,0 +1,361 @@
+{ Validation }
+Title = "[13_R7R8]R8-CRS2: Cell Re-selection in FDD_CELL_FACH (2 frequencies)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_CRS2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ //kal_uint8 r8_fachdrx_01_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint8 drx_idx;
+}udps_r8_crs2_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "Target Cell"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of target cell"
+0~511
+@511
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@2
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+[drx_idx] "drx_idx 1~3"
+1~3
+@1
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_01.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_01.l1v
new file mode 100755
index 0000000..174dbc1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_01.l1v
@@ -0,0 +1,110 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_01: Demodulation of HS-PDSCH on H-Set 8/10 with single link "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+
+ // kal_uint8 r8_dchsdpa_01_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+} udps_r8_dchsdpa_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_02.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_02.l1v
new file mode 100755
index 0000000..bdba04f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_02.l1v
@@ -0,0 +1,111 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_02: Demodulation of HS-PDSCH on H-Set 3A/6A/8A/10A with single link"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ kal_uint8 r8_dchsdpa_02_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+} udps_r8_dchsdpa_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+[r8_dchsdpa_02_par_idx] "DC parameters 1~7"
+1~7
+@1
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_03.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_03.l1v
new file mode 100755
index 0000000..82b45d4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_03.l1v
@@ -0,0 +1,140 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_03: Demodulation of HS-PDSCH on H-Set 3A/6A/8A/10A with Diversity "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ //tx_diversity_E diversity_mode; // for CD9
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+
+ kal_uint8 r8_dchsdpa_03_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+}udps_r8_dchsdpa_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+/*
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~2
+@1
+*/
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[r8_dchsdpa_03_par_idx] "DC parameters 1~7"
+1~7
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_04.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_04.l1v
new file mode 100755
index 0000000..2f0ff8f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_04.l1v
@@ -0,0 +1,110 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_04: Highest Data Rate Test of Category 24"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ // kal_uint8 r8_dchsdpa_04_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+
+} udps_r8_dchsdpa_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_64
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@1
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_05.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_05.l1v
new file mode 100755
index 0000000..c6d8fcc
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_05.l1v
@@ -0,0 +1,109 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_05: RXCQI Performance + Single link (64AM)on dual cell"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ // kal_uint8 r8_dchsdpa_05_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+} udps_r8_dchsdpa_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_06.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_06.l1v
new file mode 100755
index 0000000..0fb61ea
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_06.l1v
@@ -0,0 +1,364 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_06: DCHSDPA with CPC DTX on DRX off"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ // kal_uint8 r8_dchsdpa_06_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_bool sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+}udps_r8_dchsdpa_06_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_07.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_07.l1v
new file mode 100755
index 0000000..229464d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_07.l1v
@@ -0,0 +1,364 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_07: DCHSDPA with CPC and DTX DRX Order Test "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ // kal_uint8 r8_dchsdpa_07_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_bool sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+}udps_r8_dchsdpa_07_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_08.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_08.l1v
new file mode 100755
index 0000000..c12f114
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_08.l1v
@@ -0,0 +1,110 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_08: DC order Test (on/off/on))"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+
+ // kal_uint8 r8_dchsdpa_08_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+} udps_r8_dchsdpa_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_09.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_09.l1v
new file mode 100755
index 0000000..3128f75
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_09.l1v
@@ -0,0 +1,110 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_09: DC switch Test (on/off)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+
+ // kal_uint8 r8_dchsdpa_09_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+} udps_r8_dchsdpa_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_10.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_10.l1v
new file mode 100755
index 0000000..8d0a971
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_10.l1v
@@ -0,0 +1,110 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_10: DC parameters changes test "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+
+ // kal_uint8 r8_dchsdpa_10_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+} udps_r8_dchsdpa_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_11.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_11.l1v
new file mode 100755
index 0000000..eb880fd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_11.l1v
@@ -0,0 +1,419 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_11: HHO successfully with CPC"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_bool sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts2_s;
+ kal_bool sttd_ind_bts2_s;
+ kal_uint16 uarfcn_bts2_s;
+}udps_r8_dchsdpa_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@4
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
+
+
+[uarfcn_bts2_s] "UARFCN of Secondary Serving Cell for BTS2"
+10562~10838
+@10725
+
+[psc_bts2_s] "PSC of Secondary Serving Cell for BTS2"
+0~511
+@8
+
+[sttd_ind_bts2_s] "Use STTD or not of Secondary Serving Cell for BTS2"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_12.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_12.l1v
new file mode 100755
index 0000000..d52c1e3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_12.l1v
@@ -0,0 +1,419 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_12: HHO failed and revert with CPC(DC to DC)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_bool sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts2_s;
+ kal_bool sttd_ind_bts2_s;
+ kal_uint16 uarfcn_bts2_s;
+}udps_r8_dchsdpa_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@4
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
+
+
+[uarfcn_bts2_s] "UARFCN of Secondary Serving Cell for BTS2"
+10562~10838
+@10725
+
+[psc_bts2_s] "PSC of Secondary Serving Cell for BTS2"
+0~511
+@8
+
+[sttd_ind_bts2_s] "Use STTD or not of Secondary Serving Cell for BTS2"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_13.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_13.l1v
new file mode 100755
index 0000000..22dde9e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_13.l1v
@@ -0,0 +1,392 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_13: Target Serving Cell Changed with DC/CPC "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_13
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_bool sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts2_s;
+ kal_bool sttd_ind_bts2_s;
+ kal_uint16 uarfcn_bts2_s;
+}udps_r8_dchsdpa_13_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10630
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code (BTS2):(0~255)"
+0~255
+@27
+
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell 1"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell 1"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell 1"
+@KAL_FALSE
+
+[uarfcn_bts2_s] "UARFCN of Secondary Serving Cell 2"
+10562~10838
+@10655
+
+[psc_bts2_s] "PSC of Secondary Serving Cell 2"
+0~511
+@8
+
+[sttd_ind_bts2_s] "Use STTD or not of Secondary Serving Cell 2"
+@KAL_FALSE
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_14.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_14.l1v
new file mode 100755
index 0000000..90d7a33
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_14.l1v
@@ -0,0 +1,391 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_14: Target serving cell change with DC / CPC/ LessMode"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_14
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_bool sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts2_s;
+ kal_bool sttd_ind_bts2_s;
+ kal_uint16 uarfcn_bts2_s;
+}udps_r8_dchsdpa_14_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10630
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code (BTS2):(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell 1"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell 1"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell 1"
+@KAL_FALSE
+
+[uarfcn_bts2_s] "UARFCN of Secondary Serving Cell 2"
+10562~10838
+@10655
+
+[psc_bts2_s] "PSC of Secondary Serving Cell 2"
+0~511
+@8
+
+[sttd_ind_bts2_s] "Use STTD or not of Secondary Serving Cell 2"
+@KAL_FALSE
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_15.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_15.l1v
new file mode 100755
index 0000000..7c572b3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_15.l1v
@@ -0,0 +1,264 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_15: Low Power Test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_15
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+}udps_r8_dchsdpa_15_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_FACHDRX_01.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_FACHDRX_01.l1v
new file mode 100755
index 0000000..0fabc3d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_FACHDRX_01.l1v
@@ -0,0 +1,347 @@
+{ Validation }
+Title = "[13_R7R8]R8-FACHDRX-01: UE DRX Behavior with data drx_cycle=4, burst=1, and hsdsch interruption = true"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_FACHDRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ //kal_uint8 r8_fachdrx_01_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_fachdrx_01_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_FACHDRX_02.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_FACHDRX_02.l1v
new file mode 100755
index 0000000..0ebb5fe
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_FACHDRX_02.l1v
@@ -0,0 +1,347 @@
+{ Validation }
+Title = "[13_R7R8]R8-FACHDRX-02: R8_FACHDRX_02: UE DRX Behavior with drx_cycle=4, burst=1, and hsdsch interruption = false"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_FACHDRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ //kal_uint8 r8_fachdrx_02_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_fachdrx_02_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_FACHDRX_03.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_FACHDRX_03.l1v
new file mode 100755
index 0000000..0632c0f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_FACHDRX_03.l1v
@@ -0,0 +1,347 @@
+{ Validation }
+Title = "[13_R7R8]R8-FACHDRX-03: R8_FACHDRX_03: UE DRX Behavior with drx_cycle=4, burst=1, and hsdsch interruption = false"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_FACHDRX_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ // kal_uint8 r8_fachdrx_03_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_fachdrx_03_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_01.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_01.l1v
new file mode 100755
index 0000000..03c97df
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_01.l1v
@@ -0,0 +1,355 @@
+{ Validation }
+Title = "[13_R7R8]R8_LessMode_01: DC with Less Mode Test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_LESSMODE_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_bool sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+} udps_r8_lessmode_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_02.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_02.l1v
new file mode 100755
index 0000000..36fb7d9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_02.l1v
@@ -0,0 +1,355 @@
+{ Validation }
+Title = "[13_R7R8]R8_LessMode_02: HSSCCH Order with Less Mode control(on/off/on)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_LESSMODE_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_bool sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+} udps_r8_lessmode_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_03.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_03.l1v
new file mode 100755
index 0000000..350155f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_03.l1v
@@ -0,0 +1,419 @@
+{ Validation }
+Title = "[13_R7R8]R8_LessMode_03: HHO failed and revert (LessMode Order is off in old cell)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_LESSMODE_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_bool sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts2_s;
+ kal_bool sttd_ind_bts2_s;
+ kal_uint16 uarfcn_bts2_s;
+}udps_r8_lessmode_03_struct;s
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10650
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@4
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
+
+
+[uarfcn_bts2_s] "UARFCN of Secondary Serving Cell for BTS2"
+10562~10838
+@10675
+
+[psc_bts2_s] "PSC of Secondary Serving Cell for BTS2"
+0~511
+@8
+
+[sttd_ind_bts2_s] "Use STTD or not of Secondary Serving Cell for BTS2"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_04.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_04.l1v
new file mode 100755
index 0000000..12d96b2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_04.l1v
@@ -0,0 +1,419 @@
+{ Validation }
+Title = "[13_R7R8]R8_LessMode_04: HHO failed and revert (LessMode Order is on in old cell)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_LESSMODE_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_bool sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts2_s;
+ kal_bool sttd_ind_bts2_s;
+ kal_uint16 uarfcn_bts2_s;
+}udps_r8_lessmode_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10650
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@4
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
+
+
+[uarfcn_bts2_s] "UARFCN of Secondary Serving Cell for BTS2"
+10562~10838
+@10675
+
+[psc_bts2_s] "PSC of Secondary Serving Cell for BTS2"
+0~511
+@8
+
+[sttd_ind_bts2_s] "Use STTD or not of Secondary Serving Cell for BTS2"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_05.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_05.l1v
new file mode 100755
index 0000000..9095f32
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_05.l1v
@@ -0,0 +1,351 @@
+{ Validation }
+Title = "[13_R7R8]R8_LessMode_05: LessMode Switch test with CPC "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_LESSMODE_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ // kal_uint8 r8_lessmode_05_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r8_lessmode_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M1.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M1.l1v
new file mode 100755
index 0000000..c2bd8b8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M1.l1v
@@ -0,0 +1,101 @@
+{ Validation }
+Title = "[13_R7R8]R8 M01: FDD Adjacent Frequency Measurements (Event triggered reporting of 1 adjacent-frequency)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_M01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts3;
+ kal_uint16 psc_bts3; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts4;
+ kal_uint16 psc_bts4; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 rxd_mode;
+} udps_r8_m01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@24
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@48
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M10.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M10.l1v
new file mode 100755
index 0000000..803f858
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M10.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[13_R7R8]R8 M10: UTRA Carrier RSSI (Relative measurement accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_M10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_r8_m10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10655
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M2.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M2.l1v
new file mode 100755
index 0000000..1febd61
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M2.l1v
@@ -0,0 +1,118 @@
+{ Validation }
+Title = "[13_R7R8]R8 M02: FDD Adjacent Frequency Measurements (Event triggered reporting of 1 inter-frequency and 1 adjacent-frequency)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_M02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts3;
+ kal_uint16 psc_bts3; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts4;
+ kal_uint16 psc_bts4; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 rxd_mode;
+} udps_r8_m02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Inter-freq Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Inter-freq Meas)"
+0~511
+@511
+
+[uarfcn_bts3] "UARFCN of Neighbor Cell (for Intra-freq Meas)"
+10562~10838
+@10600
+
+[psc_bts3] "PSC of Neighbor Cell (for Intra-freq Meas)"
+0~511
+@11
+
+[uarfcn_bts4] "UARFCN of Neighbor Cell (for Adjacent-freq Meas)"
+10562~10838
+@10625
+
+[psc_bts4] "PSC of Neighbor Cell (for Adjacent-freq Meas)"
+0~511
+@8
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M3.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M3.l1v
new file mode 100755
index 0000000..c821c77
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M3.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[13_R7R8]R8 M3: CPICH RSCP (Adjacent frequency measurement: absolute accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_M03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_r8_m03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@20
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@40
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M4.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M4.l1v
new file mode 100755
index 0000000..14718a4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M4.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[13_R7R8]R8 M4: CPICH RSCP (Adjacent frequency measurement: relative accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_M04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_r8_m04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M5.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M5.l1v
new file mode 100755
index 0000000..0fd72e8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M5.l1v
@@ -0,0 +1,103 @@
+{ Validation }
+Title = "[13_R7R8]R8 M5: CPICH RSCP (Inter frequency measurement: relative accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_M05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts3;
+ kal_uint16 psc_bts3; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_r8_m05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of inter-freq. Neighbor Cell (for Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of inter-freq. Neighbor Cell (for Meas)"
+0~511
+@511
+
+[uarfcn_bts3] "UARFCN of Adjacent Cell (for Meas)"
+10562~10838
+@10625
+
+[psc_bts3] "PSC of Adjacent Cell (for Meas)"
+0~511
+@10
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M6.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M6.l1v
new file mode 100755
index 0000000..b97919c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M6.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[13_R7R8]R8 M06: CPICH Ec/Io (Adjacent frequency measurement: absolute accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_M06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_r8_m06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10655
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@20
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@40
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M7.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M7.l1v
new file mode 100755
index 0000000..3b410cf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M7.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[13_R7R8]R8 M07: CPICH Ec/Io (Adjacent frequency measurement: relative accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_M07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_r8_m07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10655
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@20
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@40
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M8.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M8.l1v
new file mode 100755
index 0000000..cec508a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M8.l1v
@@ -0,0 +1,101 @@
+{ Validation }
+Title = "[13_R7R8]R8 M08: CPICH Ec/Io (Adjacent-inter frequency measurement: relative accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_M08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_r8_m08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+[uarfcn_bts3] "UARFCN of Adjacent Cell (for Meas)"
+10562~10838
+@10655
+
+[psc_bts3] "PSC of Adjacent Cell (for Meas)"
+0~511
+@511
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M9.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M9.l1v
new file mode 100755
index 0000000..e0f013e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M9.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[13_R7R8]R8 M09: UTRA Carrier RSSI (Absolute measurement accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_M09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_r8_m09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10655
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_MCPC1_01.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_MCPC1_01.l1v
new file mode 100755
index 0000000..efd898d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_MCPC1_01.l1v
@@ -0,0 +1,378 @@
+{ Validation }
+Title = "[13_R7R8]R8-MCPC1-01"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_MCPC1_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //HS-SCCH info.
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ //hs_meas_fb_info_T
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ //hs_harq_info_T
+ kal_uint8 process_num;
+ //hs_ulpc_info_T
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+ //dc_hsdpa_info_T
+ kal_uint8 dc_ssc_of_hsscch;
+ kal_uint8 dc_num_of_hsscch;
+ kal_uint16 dc_ovsf_of_hsscch_0;
+ kal_uint16 dc_ovsf_of_hsscch_1;
+ kal_uint16 dc_ovsf_of_hsscch_2;
+ kal_uint16 dc_ovsf_of_hsscch_3;
+ kal_uint16 dc_psc;
+ kal_int8 dc_meas_po;
+ kal_uint16 dc_dl_freq;
+ kal_bool dc_sttd;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r7_cpc_01_par_idx;
+ kal_uint8 r7_rxd_mode;
+} udps_r8_mcpc1_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+[uarfcn_bts2] "UARFCN of Adjacent cell "
+10562~10838
+@10655
+
+[psc_bts2] "PSC of Adjacent cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~3)"
+0~3
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+FDD_EDCH_2SF2AND2SF4_16QAM
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r7_rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_MCPC1_02.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_MCPC1_02.l1v
new file mode 100755
index 0000000..b170073
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_MCPC1_02.l1v
@@ -0,0 +1,382 @@
+{ Validation }
+Title = "[13_R7R8]R8-MCPC1-02"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_MCPC1_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+
+ kal_uint16 uarfcn_bts3;
+ kal_uint16 psc_bts3; //except psc = x49 or x99.
+
+ kal_uint16 uarfcn_bts4;
+ kal_uint16 psc_bts4; //except psc = x49 or x99.
+
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //HS-SCCH info.
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ //hs_meas_fb_info_T
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ //hs_harq_info_T
+ kal_uint8 process_num;
+ //hs_ulpc_info_T
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+ //dc_hsdpa_info_T
+ kal_uint8 dc_ssc_of_hsscch;
+ kal_uint8 dc_num_of_hsscch;
+ kal_uint16 dc_ovsf_of_hsscch_0;
+ kal_uint16 dc_ovsf_of_hsscch_1;
+ kal_uint16 dc_ovsf_of_hsscch_2;
+ kal_uint16 dc_ovsf_of_hsscch_3;
+ kal_uint16 dc_psc;
+ kal_int8 dc_meas_po;
+ kal_uint16 dc_dl_freq;
+ kal_bool dc_sttd;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r7_rxd_mode;
+} udps_r8_mcpc1_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+[uarfcn_bts2] "UARFCN of adjacent frequency cell "
+10562~10838
+@10655
+
+[psc_bts2] "PSC of adjacent frequency cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~3)"
+0~3
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+FDD_EDCH_2SF2AND2SF4_16QAM
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+[r7_rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_MCPC2_01.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_MCPC2_01.l1v
new file mode 100755
index 0000000..d193045
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_MCPC2_01.l1v
@@ -0,0 +1,393 @@
+{ Validation }
+Title = "[13_R7R8]R8-MCPC2-01"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_MCPC2_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //HS-SCCH info.
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ //hs_meas_fb_info_T
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ //hs_harq_info_T
+ kal_uint8 process_num;
+ //hs_ulpc_info_T
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+ //dc_hsdpa_info_T
+ kal_uint8 dc_ssc_of_hsscch;
+ kal_uint8 dc_num_of_hsscch;
+ kal_uint16 dc_ovsf_of_hsscch_0;
+ kal_uint16 dc_ovsf_of_hsscch_1;
+ kal_uint16 dc_ovsf_of_hsscch_2;
+ kal_uint16 dc_ovsf_of_hsscch_3;
+ kal_uint16 dc_psc;
+ kal_int8 dc_meas_po;
+ kal_uint16 dc_dl_freq;
+ kal_bool dc_sttd;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r7_rxd_mode;
+} udps_r8_mcpc2_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Inter-freq Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Inter-freq Meas)"
+0~511
+@511
+
+[uarfcn_bts3] "UARFCN of Neighbor Cell (for Intra-freq Meas)"
+10562~10838
+@10630
+
+[psc_bts3] "PSC of Neighbor Cell (for Intra-freq Meas)"
+0~511
+@511
+
+[uarfcn_bts4] "UARFCN of Neighbor Cell (for Adjacent-freq Meas)"
+10562~10838
+@10655
+
+[psc_bts4] "PSC of Neighbor Cell (for Adjacent-freq Meas)"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~3)"
+0~3
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+FDD_EDCH_2SF2AND2SF4_16QAM
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r7_rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_MCPC2_02.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_MCPC2_02.l1v
new file mode 100755
index 0000000..733b9e5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_MCPC2_02.l1v
@@ -0,0 +1,398 @@
+{ Validation }
+Title = "[13_R7R8]R8-MCPC2-02"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_MCPC2_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+
+ kal_uint16 uarfcn_bts3;
+ kal_uint16 psc_bts3; //except psc = x49 or x99.
+
+ kal_uint16 uarfcn_bts4;
+ kal_uint16 psc_bts4; //except psc = x49 or x99.
+
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //HS-SCCH info.
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ //hs_meas_fb_info_T
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ //hs_harq_info_T
+ kal_uint8 process_num;
+ //hs_ulpc_info_T
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+ //dc_hsdpa_info_T
+ kal_uint8 dc_ssc_of_hsscch;
+ kal_uint8 dc_num_of_hsscch;
+ kal_uint16 dc_ovsf_of_hsscch_0;
+ kal_uint16 dc_ovsf_of_hsscch_1;
+ kal_uint16 dc_ovsf_of_hsscch_2;
+ kal_uint16 dc_ovsf_of_hsscch_3;
+ kal_uint16 dc_psc;
+ kal_int8 dc_meas_po;
+ kal_uint16 dc_dl_freq;
+ kal_bool dc_sttd;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r7_rxd_mode;
+} udps_r8_mcpc2_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Inter-freq Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Inter-freq Meas)"
+0~511
+@511
+
+[uarfcn_bts3] "UARFCN of Neighbor Cell (for Intra-freq Meas)"
+10562~10838
+@10630
+
+[psc_bts3] "PSC of Neighbor Cell (for Intra-freq Meas)"
+0~511
+@511
+
+[uarfcn_bts4] "UARFCN of Neighbor Cell (for Adjacent-freq Meas)"
+10562~10838
+@10655
+
+[psc_bts4] "PSC of Neighbor Cell (for Adjacent-freq Meas)"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~3)"
+0~3
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+FDD_EDCH_2SF2AND2SF4_16QAM
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+[r7_rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/udps_R7_TF01_1.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/udps_R7_TF01_1.l1v
new file mode 100755
index 0000000..0f3a0a9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/udps_R7_TF01_1.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R7-TF01-1: E-TFC switch test while E-DCH TTI is 10ms."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_TF01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ // kal_uint8 r7_tf01_1_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_tf01_1_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/udps_R7_TF01_2.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/udps_R7_TF01_2.l1v
new file mode 100755
index 0000000..c15cd5f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/udps_R7_TF01_2.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R7-TF01-2: E-TFC switch test while E-DCH TTI is 2ms with 16QAM."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_TF01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ //kal_uint8 r7_tf01_2_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_tf01_2_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(2~3)"
+2~3
+@2
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+@FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F01.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F01.l1v
new file mode 100755
index 0000000..c8df16b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F01.l1v
@@ -0,0 +1,97 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R7_F01: Demodulation of HS-PDSCH on H-Set 8/10 with single link "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_F01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ kal_uint8 r7_f01_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_f01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+[r7_f01_par_idx] "HSDPA parameters 1~4"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F01.l1v.bak b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F01.l1v.bak
new file mode 100755
index 0000000..6566bbb
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F01.l1v.bak
@@ -0,0 +1,97 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R7_F01: Demodulation of HS-PDSCH on H-Set 8/10 with single link "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_F01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ kal_uint8 r7_f01_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_f01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+[r7_f01_par_idx] "HSDPA parameters 1~4"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F02.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F02.l1v
new file mode 100755
index 0000000..ba06081
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F02.l1v
@@ -0,0 +1,98 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R7_F02: Demodulation of HS-PDSCH on H-Set 3/68/10 with single link and UE RXD under static channel "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_F02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ kal_uint8 r7_f02_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_f02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+
+[r7_f02_par_idx] "HSDPA parameters 1~48"
+1~48
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F02.l1v.bak b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F02.l1v.bak
new file mode 100755
index 0000000..2a48bb5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F02.l1v.bak
@@ -0,0 +1,98 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R7_F02: Demodulation of HS-PDSCH on H-Set 3/68/10 with single link and UE RXD under static channel "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_F02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ kal_uint8 r7_f02_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_f02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+
+[r7_f02_par_idx] "HSDPA parameters 1~48"
+1~48
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F03.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F03.l1v
new file mode 100755
index 0000000..63a594a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F03.l1v
@@ -0,0 +1,130 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R7_F03: Demodulation of HS-PDSCH on H-Set 3/6/8/10 with STTD/CLTD and UE RXD under static channe"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_F03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ //tx_diversity_E diversity_mode; // for CD9
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+
+ kal_uint8 r7_f03_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r7_f03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+/*
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~2
+@1
+*/
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[r7_f03_par_idx ] "HSDPA parameters 1~36"
+1~36
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F03.l1v.bak b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F03.l1v.bak
new file mode 100755
index 0000000..faef0e3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F03.l1v.bak
@@ -0,0 +1,130 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R7_F03: Demodulation of HS-PDSCH on H-Set 3/6/8/10 with STTD/CLTD and UE RXD under static channe"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_F03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ //tx_diversity_E diversity_mode; // for CD9
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+
+ kal_uint8 r7_f03_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r7_f03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+/*
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~2
+@1
+*/
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[r7_f03_par_idx ] "HSDPA parameters 1~36"
+1~36
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F04.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F04.l1v
new file mode 100755
index 0000000..0974733
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F04.l1v
@@ -0,0 +1,100 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R7_F03: HS-SCCH Detection Performance with Single Link under Fading Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_F04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 r7_f04_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_r7_f04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[r7_f04_par_idx] "HSDPA parameters 1~3"
+1~3
+@1
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F05.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F05.l1v
new file mode 100755
index 0000000..f79258c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F05.l1v
@@ -0,0 +1,132 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R7_F05: HS-SCCH Detection Performance with Diversity under Fading Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_F05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+ kal_uint8 r7_f05_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_r7_f05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~2
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[r7_f05_par_idx] "HSDPA parameters 1~3"
+1~3
+@1
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F06.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F06.l1v
new file mode 100755
index 0000000..47cb98d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F06.l1v
@@ -0,0 +1,93 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R7_F06: HSSCCH Less Mode Test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_F06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ // kal_uint8 r7_hsdpa_07_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_f06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F07.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F07.l1v
new file mode 100755
index 0000000..82b645f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F07.l1v
@@ -0,0 +1,93 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R7_F07: HSSCCH Less Mode Test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_F07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ // kal_uint8 r7_hsdpa_07_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_f07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F08.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F08.l1v
new file mode 100755
index 0000000..366ac46
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F08.l1v
@@ -0,0 +1,144 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R7_F08: HS-DSCH setup in FDD_CELL_FACH state with FMO"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_F08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ //udps_RMC_type_struct udps_RMC_type;
+
+
+
+ //kal_uint8 r7_efach_01_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_f08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@65535
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+[RACH_TTI] "(RACH) TTI. [Number of frames]"
+@TTI10 1
+TTI20 2
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@150
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F09.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F09.l1v
new file mode 100755
index 0000000..60abe91
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F09.l1v
@@ -0,0 +1,144 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R7_F09: HS-DSCH setup in FDD_CELL_FACH state with FMO"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_F09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ //udps_RMC_type_struct udps_RMC_type;
+
+
+
+ //kal_uint8 r7_efach_01_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_f09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@65535
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+[RACH_TTI] "(RACH) TTI. [Number of frames]"
+@TTI10 1
+TTI20 2
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@150
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F01.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F01.l1v
new file mode 100755
index 0000000..018b7c6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F01.l1v
@@ -0,0 +1,111 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R8_F01: Demodulation of HS-PDSCH on H-Set 3A/6A/8A/10A with single link"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_F01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ kal_uint8 r8_f01_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+} udps_r8_f01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+[r8_f01_par_idx] "DC parameters 1~20"
+1~20
+@1
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10725
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F02.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F02.l1v
new file mode 100755
index 0000000..a845ce3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F02.l1v
@@ -0,0 +1,143 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R8_F02: Demodulation of HS-PDSCH on H-Set 3A/6A/8A/10A with Diversity "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_F02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ //tx_diversity_E diversity_mode; // for CD9
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+
+ kal_uint8 r8_f02_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+}udps_r8_f02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+/*
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~2
+@1
+*/
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[r8_f02_par_idx ] "DC parameters 1~14"
+1~14
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10725
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F03.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F03.l1v
new file mode 100755
index 0000000..b2df589
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F03.l1v
@@ -0,0 +1,111 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R8_F03: Demodulation of HS-PDSCH on H-Set 3A/6A/8A/10A with RXD"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_F03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ kal_uint8 r8_f03_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+} udps_r8_f03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+[r8_f03_par_idx] "DC parameters 1~40"
+1~40
+@1
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10725
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F04.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F04.l1v
new file mode 100755
index 0000000..22a720f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F04.l1v
@@ -0,0 +1,143 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R8_F04: Demodulation of HS-PDSCH on H-Set 3A/6A/8A/10A with Diversity "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_F04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ //tx_diversity_E diversity_mode; // for CD9
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+
+ kal_uint8 r8_f04_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+}udps_r8_f04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+/*
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~2
+@1
+*/
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[r8_f04_par_idx ] "DC parameters 1~14"
+1~14
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10725
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F05.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F05.l1v
new file mode 100755
index 0000000..93ed0f9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F05.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R8_F05: Common EDCH setup test with non default resource"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_F05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r8_f05_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_f05_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@150
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r8_f05_par_idx] "cedch parameters 1~2, 1 for edch tti 2ms, 2 for 10ms"
+1~2
+@1
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F06.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F06.l1v
new file mode 100755
index 0000000..150733f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F06.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R8_F06: Common EDCH setup test with non default resource"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_F06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r8_f06_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_f06_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@150
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r8_f06_par_idx] "cedch parameters 1~2, 1 for edch tti 2ms, 2 for 10ms"
+1~2
+@1
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_01.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_01.l1v
new file mode 100755
index 0000000..dc5bfbb
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_01.l1v
@@ -0,0 +1,218 @@
+{ Validation }
+Title = "[15_R9R10]R10_3CHSDPA_01: Demodulation of HS-PDSCH on H-Set 3B/6B/8B/10B with single link"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_3CHSDPA_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_1s;
+ kal_uint16 psc_bts1_1s;
+ kal_uint16 uarfcn_bts1_2s;
+ kal_uint16 psc_bts1_2s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+ kal_uint8 r10_3chsdpa_01_par_idx;
+} udps_r10_3chsdpa_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_1s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_1s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_2s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10650
+
+[psc_bts1_2s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For E-DCH
+******************************************/
+/*
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+*/
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+/*
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+*/
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+
+[r10_3chsdpa_01_par_idx] "test idx 1~7"
+1~7
+@1
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_02.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_02.l1v
new file mode 100755
index 0000000..36772ec
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_02.l1v
@@ -0,0 +1,213 @@
+{ Validation }
+Title = "[15_R9R10]R10_3CHSDPA_02: Highest Data Rate Test of Category 29"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_3CHSDPA_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_1s;
+ kal_uint16 psc_bts1_1s;
+ kal_uint16 uarfcn_bts1_2s;
+ kal_uint16 psc_bts1_2s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r10_3chsdpa_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_1s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_1s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_2s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10650
+
+[psc_bts1_2s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_64
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@1
+
+
+/******************************************
+* For E-DCH
+******************************************/
+/*
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+*/
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+/*
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+*/
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_03.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_03.l1v
new file mode 100755
index 0000000..92fe441
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_03.l1v
@@ -0,0 +1,213 @@
+{ Validation }
+Title = "[15_R9R10]R10_3CHSDPA_03: RXCQI Performance + Single link (64QAM)on 3C cell"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_3CHSDPA_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_1s;
+ kal_uint16 psc_bts1_1s;
+ kal_uint16 uarfcn_bts1_2s;
+ kal_uint16 psc_bts1_2s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r10_3chsdpa_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_1s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_1s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_2s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10650
+
+[psc_bts1_2s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For E-DCH
+******************************************/
+/*
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+*/
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+/*
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+*/
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_04.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_04.l1v
new file mode 100755
index 0000000..7b89cdf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_04.l1v
@@ -0,0 +1,206 @@
+{ Validation }
+Title = "[15_R9R10]R10_3CHSDPA_04: 3C-HSDPA with CPC DTX on DRX off"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_3CHSDPA_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts1_2s;
+ kal_uint16 psc_bts1_2s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r10_3chsdpa_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_2s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10650
+
+[psc_bts1_2s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_05.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_05.l1v
new file mode 100755
index 0000000..d410190
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_05.l1v
@@ -0,0 +1,206 @@
+{ Validation }
+Title = "[15_R9R10]R10_3CHSDPA_05: 3C-HSDPA with CPC DTX on DRX off"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_3CHSDPA_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts1_2s;
+ kal_uint16 psc_bts1_2s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r10_3chsdpa_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_2s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10650
+
+[psc_bts1_2s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_06.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_06.l1v
new file mode 100755
index 0000000..be4475d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_06.l1v
@@ -0,0 +1,214 @@
+{ Validation }
+Title = "[15_R9R10]R10_3CHSDPA_06: Secondary Cell activate/deactivate by HS-SCCH order Test (3C->2C->1C->2C->3C)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_3CHSDPA_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_1s;
+ kal_uint16 psc_bts1_1s;
+ kal_uint16 uarfcn_bts1_2s;
+ kal_uint16 psc_bts1_2s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r10_3chsdpa_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_1s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_1s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_2s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10650
+
+[psc_bts1_2s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For E-DCH
+******************************************/
+/*
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+*/
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+/*
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+*/
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_07.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_07.l1v
new file mode 100755
index 0000000..0765b87
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_07.l1v
@@ -0,0 +1,214 @@
+{ Validation }
+Title = "[15_R9R10]R10_3CHSDPA_07: Secondary enable/disable test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_3CHSDPA_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_1s;
+ kal_uint16 psc_bts1_1s;
+ kal_uint16 uarfcn_bts1_2s;
+ kal_uint16 psc_bts1_2s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r10_3chsdpa_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_1s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_1s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_2s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10650
+
+[psc_bts1_2s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For E-DCH
+******************************************/
+/*
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+*/
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+/*
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+*/
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_08.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_08.l1v
new file mode 100755
index 0000000..568f98e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_08.l1v
@@ -0,0 +1,214 @@
+{ Validation }
+Title = "[15_R9R10]R10_3CHSDPA_08: Secondary modification test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_3CHSDPA_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_1s;
+ kal_uint16 psc_bts1_1s;
+ kal_uint16 uarfcn_bts1_2s;
+ kal_uint16 psc_bts1_2s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r10_3chsdpa_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_1s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_1s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_2s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10650
+
+[psc_bts1_2s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For E-DCH
+******************************************/
+/*
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+*/
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+/*
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+*/
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_lessmode_01.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_lessmode_01.l1v
new file mode 100755
index 0000000..cb1396a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_lessmode_01.l1v
@@ -0,0 +1,206 @@
+{ Validation }
+Title = "[15_R9R10]R10_LESSMODE_01: 3C-HSDPA with lessmode test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_LESSMODE_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts1_2s;
+ kal_uint16 psc_bts1_2s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r10_lessmode_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_2s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10650
+
+[psc_bts1_2s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_lessmode_02.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_lessmode_02.l1v
new file mode 100755
index 0000000..4769cf0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_lessmode_02.l1v
@@ -0,0 +1,206 @@
+{ Validation }
+Title = "[15_R9R10]R10_LESSMODE_02: HSSCCH Order with Less Mode control(on/off/on) "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_LESSMODE_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts1_2s;
+ kal_uint16 psc_bts1_2s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r10_lessmode_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_2s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10650
+
+[psc_bts1_2s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_lessmode_03.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_lessmode_03.l1v
new file mode 100755
index 0000000..1395ae7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_lessmode_03.l1v
@@ -0,0 +1,206 @@
+{ Validation }
+Title = "[15_R9R10]R10_LESSMODE_03: LessMode Switch test with CPC (Less Mode on/off/on "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_LESSMODE_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts1_2s;
+ kal_uint16 psc_bts1_2s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r10_lessmode_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_2s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10650
+
+[psc_bts1_2s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_m01.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_m01.l1v
new file mode 100755
index 0000000..c733d01
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_m01.l1v
@@ -0,0 +1,110 @@
+{ Validation }
+Title = "[13_R7R8]R10 M01: FDD inter Frequency Measurements without compressed mode (Event triggered reporting)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_M01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts3;
+ kal_uint16 psc_bts3; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts4;
+ kal_uint16 psc_bts4; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 rxd_mode;
+} udps_r10_m01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+[uarfcn_bts3] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10650
+
+[psc_bts3] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@24
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@48
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_m02.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_m02.l1v
new file mode 100755
index 0000000..0489cb8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_m02.l1v
@@ -0,0 +1,102 @@
+{ Validation }
+Title = "[13_R7R8]R10 M02: FDD inter Frequency detected cell measurement with compressed mode (Event triggered reporting)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_M02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts3;
+ kal_uint16 psc_bts3; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts4;
+ kal_uint16 psc_bts4; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 rxd_mode;
+} udps_r10_m02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@24
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@48
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_m03.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_m03.l1v
new file mode 100755
index 0000000..1f32e50
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_m03.l1v
@@ -0,0 +1,102 @@
+{ Validation }
+Title = "[13_R7R8]R10 M03: FDD inter Frequency detected cell measurement without compressed mode (Event triggered reporting)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_M03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts3;
+ kal_uint16 psc_bts3; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts4;
+ kal_uint16 psc_bts4; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 rxd_mode;
+} udps_r10_m03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@24
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@48
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_m04.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_m04.l1v
new file mode 100755
index 0000000..9e2b8f9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_m04.l1v
@@ -0,0 +1,102 @@
+{ Validation }
+Title = "[13_R7R8]R10 M04: frequency specific compressed mode measurement (Event triggered reporting)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_M04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts3;
+ kal_uint16 psc_bts3; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts4;
+ kal_uint16 psc_bts4; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 rxd_mode;
+} udps_r10_m03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@24
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@48
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_DB_DCHSDPA_01.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_DB_DCHSDPA_01.l1v
new file mode 100755
index 0000000..98ce212
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_DB_DCHSDPA_01.l1v
@@ -0,0 +1,110 @@
+{ Validation }
+Title = "[15_R9R10]R9_DB_DCHSDPA_01: Highest Data Rate Test of Category 24 in DB DCHSDPA configuration"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_DB_DCHSDPA_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ // kal_uint8 r8_dchsdpa_04_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+
+} udps_r9_db_dchsdpa_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_64
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+4357~4458
+@4408
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@10
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_TF_01.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_TF_01.l1v
new file mode 100755
index 0000000..de7e2b0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_TF_01.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_TF_01: Second E-DCH E-TFC switch test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_TF_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_tf_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_ag01.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_ag01.l1v
new file mode 100755
index 0000000..d148cd6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_ag01.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_AG01: Detection of E-AGCH of 2nd E-DCH in single RL conditions"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_AG01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_ag01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_ag02.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_ag02.l1v
new file mode 100755
index 0000000..6ccc764
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_ag02.l1v
@@ -0,0 +1,196 @@
+{ Validation }
+Title = "[15_R9R10]R9_AG02: Demodulation of E-AGCH after E-RNTI modification"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_AG02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_ag01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_01.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_01.l1v
new file mode 100755
index 0000000..03a295c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_01.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_CPC_01: DRX Check for second E-AGCH"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_CPC_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_cpc_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_02.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_02.l1v
new file mode 100755
index 0000000..9b31734
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_02.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_CPC_02: DRX Check for second E-RGCH"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_CPC_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_cpc_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_03.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_03.l1v
new file mode 100755
index 0000000..9822e9a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_03.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_CPC_03: DTX Behavior Check with E-DCH data"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_CPC_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_cpc_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_04.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_04.l1v
new file mode 100755
index 0000000..2c92e6c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_04.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_CPC_04: DTX Behavior Check without E-DCH data"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_CPC_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_cpc_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_05.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_05.l1v
new file mode 100755
index 0000000..e7eec9b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_05.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_CPC_05: DTX on /DRX off Behavior Check with E-DCH data (HS-DSCH data off)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_CPC_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_cpc_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_06.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_06.l1v
new file mode 100755
index 0000000..7266fc4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_06.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_CPC_06: DTX pattern overlaps with gap"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_CPC_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_cpc_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_07.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_07.l1v
new file mode 100755
index 0000000..7963293
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_07.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_CPC_07: DTX/DRX Order Command Test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_CPC_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_cpc_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_08.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_08.l1v
new file mode 100755
index 0000000..93a120b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_08.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_CPC_08: CPC Switch Test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_CPC_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_cpc_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_09.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_09.l1v
new file mode 100755
index 0000000..777f50f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_09.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_CPC_09: CPC modification Test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_CPC_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_cpc_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_10.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_10.l1v
new file mode 100755
index 0000000..8274ee1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_10.l1v
@@ -0,0 +1,296 @@
+{ Validation }
+Title = "[15_R9R10]R9_CPC_10: CPC behavior check after HHO to inter-frequency cell successfully."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_CPC_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts2_s;
+ kal_uint16 psc_bts2_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_bts2; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_bts2 ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_bts2 ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_bts2 ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_bts2 ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+}udps_r9_dchsupa_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10650
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@20
+
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts2_s] "PSC of 2nd Serving Cell"
+0~511
+@20
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@22
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_ovsf_bts2] "E-HICH OVSF code of BTS2:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_bts2] "E-HICH signature sequence of BTS2:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_bts2] "E-HICH TPC combination index of BTS2:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_bts2] "E-RGCH signature sequence of BTS2:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_bts2] "E-RGCH RG combination index of BTS2:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[OVSFdpch_rl_dchsupa_bts2] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa_bts2] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa_bts2] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa_bts2] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa_bts2] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa_bts2] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa_bts2] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_11.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_11.l1v
new file mode 100755
index 0000000..1581b48
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_11.l1v
@@ -0,0 +1,296 @@
+{ Validation }
+Title = "[15_R9R10]R9_CPC_11: CPC behavior check after HHO to inter-frequency cell failed and reverts."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_CPC_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts2_s;
+ kal_uint16 psc_bts2_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_bts2; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_bts2 ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_bts2 ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_bts2 ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_bts2 ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+}udps_r9_dchsupa_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10650
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@20
+
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts2_s] "PSC of 2nd Serving Cell"
+0~511
+@20
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@22
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_ovsf_bts2] "E-HICH OVSF code of BTS2:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_bts2] "E-HICH signature sequence of BTS2:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_bts2] "E-HICH TPC combination index of BTS2:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_bts2] "E-RGCH signature sequence of BTS2:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_bts2] "E-RGCH RG combination index of BTS2:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[OVSFdpch_rl_dchsupa_bts2] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa_bts2] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa_bts2] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa_bts2] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa_bts2] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa_bts2] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa_bts2] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_01.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_01.l1v
new file mode 100755
index 0000000..f79096e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_01.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_DCHSUPA_01: Second E-DCH retransmission"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_DCHSUPA_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_dchsupa_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_02.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_02.l1v
new file mode 100755
index 0000000..b274a98
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_02.l1v
@@ -0,0 +1,261 @@
+{ Validation }
+Title = "[15_R9R10]R9_DCHSUPA_02: HHO to intra-frequency cell"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_DCHSUPA_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_bts2; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_bts2 ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_bts2 ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_bts2 ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_bts2 ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+}udps_r9_dchsupa_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@20
+
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@151
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@22
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_ovsf_bts2] "E-HICH OVSF code of BTS2:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_bts2] "E-HICH signature sequence of BTS2:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_bts2] "E-HICH TPC combination index of BTS2:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_bts2] "E-RGCH signature sequence of BTS2:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_bts2] "E-RGCH RG combination index of BTS2:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_03.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_03.l1v
new file mode 100755
index 0000000..96ade84
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_03.l1v
@@ -0,0 +1,296 @@
+{ Validation }
+Title = "[15_R9R10]R9_DCHSUPA_03: HHO to intra-frequency cell"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_DCHSUPA_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts2_s;
+ kal_uint16 psc_bts2_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_bts2; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_bts2 ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_bts2 ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_bts2 ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_bts2 ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+}udps_r9_dchsupa_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@20
+
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts2_s] "PSC of 2nd Serving Cell"
+0~511
+@20
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@22
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_ovsf_bts2] "E-HICH OVSF code of BTS2:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_bts2] "E-HICH signature sequence of BTS2:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_bts2] "E-HICH TPC combination index of BTS2:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_bts2] "E-RGCH signature sequence of BTS2:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_bts2] "E-RGCH RG combination index of BTS2:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[OVSFdpch_rl_dchsupa_bts2] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa_bts2] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa_bts2] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa_bts2] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa_bts2] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa_bts2] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa_bts2] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_04.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_04.l1v
new file mode 100755
index 0000000..7483bd2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_04.l1v
@@ -0,0 +1,266 @@
+{ Validation }
+Title = "[15_R9R10]R9_DCHSUPA_04: HHO to intra-frequency cell"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_DCHSUPA_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts2_s;
+ kal_uint16 psc_bts2_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_bts2; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_bts2 ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_bts2 ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_bts2 ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_bts2 ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+}udps_r9_dchsupa_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@20
+
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts2_s] "PSC of 2nd Serving Cell"
+0~511
+@20
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@0
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@22
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_ovsf_bts2] "E-HICH OVSF code of BTS2:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_bts2] "E-HICH signature sequence of BTS2:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_bts2] "E-HICH TPC combination index of BTS2:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_bts2] "E-RGCH signature sequence of BTS2:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_bts2] "E-RGCH RG combination index of BTS2:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_05.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_05.l1v
new file mode 100755
index 0000000..1c5c7ab
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_05.l1v
@@ -0,0 +1,296 @@
+{ Validation }
+Title = "[15_R9R10]R9_DCHSUPA_05: HHO to intra-frequency cell failed and revert"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_DCHSUPA_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts2_s;
+ kal_uint16 psc_bts2_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_bts2; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_bts2 ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_bts2 ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_bts2 ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_bts2 ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+}udps_r9_dchsupa_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@20
+
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts2_s] "PSC of 2nd Serving Cell"
+0~511
+@20
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@22
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_ovsf_bts2] "E-HICH OVSF code of BTS2:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_bts2] "E-HICH signature sequence of BTS2:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_bts2] "E-HICH TPC combination index of BTS2:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_bts2] "E-RGCH signature sequence of BTS2:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_bts2] "E-RGCH RG combination index of BTS2:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[OVSFdpch_rl_dchsupa_bts2] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa_bts2] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa_bts2] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa_bts2] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa_bts2] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa_bts2] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa_bts2] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_06.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_06.l1v
new file mode 100755
index 0000000..ba5e3dd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_06.l1v
@@ -0,0 +1,296 @@
+{ Validation }
+Title = "[15_R9R10]R9_DCHSUPA_06: HHO to inter-frequency cell HHO"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_DCHSUPA_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts2_s;
+ kal_uint16 psc_bts2_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_bts2; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_bts2 ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_bts2 ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_bts2 ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_bts2 ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+}udps_r9_dchsupa_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10650
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@20
+
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts2_s] "PSC of 2nd Serving Cell"
+0~511
+@20
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@22
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_ovsf_bts2] "E-HICH OVSF code of BTS2:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_bts2] "E-HICH signature sequence of BTS2:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_bts2] "E-HICH TPC combination index of BTS2:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_bts2] "E-RGCH signature sequence of BTS2:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_bts2] "E-RGCH RG combination index of BTS2:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[OVSFdpch_rl_dchsupa_bts2] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa_bts2] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa_bts2] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa_bts2] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa_bts2] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa_bts2] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa_bts2] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_07.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_07.l1v
new file mode 100755
index 0000000..8daaeca
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_07.l1v
@@ -0,0 +1,266 @@
+{ Validation }
+Title = "[15_R9R10]R9_DCHSUPA_07: HHO to inter-frequency cell HHO"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_DCHSUPA_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts2_s;
+ kal_uint16 psc_bts2_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_bts2; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_bts2 ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_bts2 ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_bts2 ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_bts2 ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+}udps_r9_dchsupa_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10650
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@20
+
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts2_s] "PSC of 2nd Serving Cell"
+0~511
+@20
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@22
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_ovsf_bts2] "E-HICH OVSF code of BTS2:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_bts2] "E-HICH signature sequence of BTS2:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_bts2] "E-HICH TPC combination index of BTS2:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_bts2] "E-RGCH signature sequence of BTS2:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_bts2] "E-RGCH RG combination index of BTS2:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_08.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_08.l1v
new file mode 100755
index 0000000..106d359
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_08.l1v
@@ -0,0 +1,296 @@
+{ Validation }
+Title = "[15_R9R10]R9_DCHSUPA_08: HHO to inter-frequency cell HHO failed and revert"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_DCHSUPA_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts2_s;
+ kal_uint16 psc_bts2_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_bts2; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_bts2 ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_bts2 ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_bts2 ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_bts2 ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+}udps_r9_dchsupa_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10650
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@20
+
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts2_s] "PSC of 2nd Serving Cell"
+0~511
+@20
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@22
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_ovsf_bts2] "E-HICH OVSF code of BTS2:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_bts2] "E-HICH signature sequence of BTS2:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_bts2] "E-HICH TPC combination index of BTS2:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_bts2] "E-RGCH signature sequence of BTS2:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_bts2] "E-RGCH RG combination index of BTS2:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[OVSFdpch_rl_dchsupa_bts2] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa_bts2] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa_bts2] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa_bts2] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa_bts2] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa_bts2] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa_bts2] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_09.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_09.l1v
new file mode 100755
index 0000000..2fb91a5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_09.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_DCHSUPA_09: Second E-RGCH added and removed"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_DCHSUPA_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_dchsupa_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@60
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_hi01.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_hi01.l1v
new file mode 100755
index 0000000..074fda9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_hi01.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_HI01: Detection of E-HICH of 2nd E-DCH in single RL conditions"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_HI01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_tgps_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw01.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw01.l1v
new file mode 100755
index 0000000..eec1cf7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw01.l1v
@@ -0,0 +1,191 @@
+{ Validation }
+Title = "[15_R9R10]R9_PW01: UE transmission power header room on second UL frequency"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_PW01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 rxd_mode;
+} udps_r9_pw01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw02.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw02.l1v
new file mode 100755
index 0000000..d3a8333
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw02.l1v
@@ -0,0 +1,191 @@
+{ Validation }
+Title = "[15_R9R10]R9_PW02: Power control in the 2nd EDCH set"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_PW02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 rxd_mode;
+} udps_r9_pw02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw03.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw03.l1v
new file mode 100755
index 0000000..8e60328
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw03.l1v
@@ -0,0 +1,202 @@
+{ Validation }
+Title = "[15_R9R10]R9_PW03: Power control in the 2nd EDCH set - compressed mode"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_PW03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 rxd_mode;
+} udps_r9_pw03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts2] "UARFCN of Serving Cell "
+10562~10838
+@10650
+
+[psc_bts2] "PSC of Serving Cell"
+0~511
+@20
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw04.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw04.l1v
new file mode 100755
index 0000000..c51a868
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw04.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_PW_04: Post verification fail in 2nd EDCH"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_PW04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_pw04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw05.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw05.l1v
new file mode 100755
index 0000000..61f8763
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw05.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_PW_05: Post verification fail then Sync A success in 2nd active set"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_PW05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_pw04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_rg01.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_rg01.l1v
new file mode 100755
index 0000000..585e00a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_rg01.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_RG01: Detection of E-HICH of 2nd E-DCH in single RL conditions"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_RG01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_rg01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_tgps_01.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_tgps_01.l1v
new file mode 100755
index 0000000..78c4d61
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_tgps_01.l1v
@@ -0,0 +1,202 @@
+{ Validation }
+Title = "[15_R9R10]R9_TGPS_01: 2nd E-DCH transmission during compressed mode"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_TGPS_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r9r10_tgps_pattern;
+ kal_uint8 rxd_mode;
+} udps_r9_tgps_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+[r9r10_tgps_pattern] "r9r10 tgps pattern (1..3)"
+1~3
+@1
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_CRS1_Inter_Freq_Crs_in_Idle.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_CRS1_Inter_Freq_Crs_in_Idle.l1v
new file mode 100755
index 0000000..dd4d451
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_CRS1_Inter_Freq_Crs_in_Idle.l1v
@@ -0,0 +1,192 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]CRS1: FDD/FDD Cell Re-Selection in Idle Mode (Multi-carrier Case)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_INTER_FREQ_CRS_IN_IDLE
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+
+ kal_uint8 Ts_ccpch;
+ kal_uint16 OVSFs_ccpch;
+ kal_uint16 OVSFpich;
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+} udps_inter_freq_crs_in_idle_struct; //CRS1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for CRS)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for CRS)"
+0~511
+@511
+
+/******************************************
+* Setup PCH of BTS1
+******************************************/
+[Ts_ccpch] "Timing offset between S-CCPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFs_ccpch] "The OVSF code number of the S-CCPCH (0~SF-1)"
+0~63
+@7
+
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@100
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@65535
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+[RACH_TTI] "(RACH) TTI. [Number of frames]"
+@TTI10 1
+TTI20 2
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@150
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@-7
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_CRS2_Intra_Freq_Crs_in_Fach.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_CRS2_Intra_Freq_Crs_in_Fach.l1v
new file mode 100755
index 0000000..7828eff
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_CRS2_Intra_Freq_Crs_in_Fach.l1v
@@ -0,0 +1,144 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]CRS2: FDD/FDD Cell Re-Selection in FDD_CELL_FACH State (One Frequency Case)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_INTRA_FREQ_CRS_IN_FACH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+} udps_intra_freq_crs_in_fach_struct; //CRS2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for CRS)"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Neighbor Cell (for CRS)"
+0~511
+@511
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@65535
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+[RACH_TTI] "(RACH) TTI. [Number of frames]"
+@TTI10 1
+TTI20 2
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@150
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@-7
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_CRS3_Inter_Freq_Crs_in_Fach.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_CRS3_Inter_Freq_Crs_in_Fach.l1v
new file mode 100755
index 0000000..5b0bb34
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_CRS3_Inter_Freq_Crs_in_Fach.l1v
@@ -0,0 +1,147 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]CRS3: FDD/FDD Cell Re-Selection in FDD_CELL_FACH State (Two Frequency Case)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_INTER_FREQ_CRS_IN_FACH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+
+ kal_uint8 Ts_ccpch; // Currently not used
+ kal_uint16 OVSFs_ccpch; // Currently not used
+
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+} udps_inter_freq_crs_in_fach_struct; //CRS3
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for CRS)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for CRS)"
+0~511
+@511
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@65535
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+[RACH_TTI] "(RACH) TTI. [Number of frames]"
+@TTI10 1
+TTI20 2
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@150
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@-7
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M01_Intra_Freq_Reporting_Delay.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M01_Intra_Freq_Reporting_Delay.l1v
new file mode 100755
index 0000000..e69ba44
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M01_Intra_Freq_Reporting_Delay.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M01: FDD Intra Frequency Measurements (Event triggered reporting of 1 neighbor cell)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_INTRA_FREQ_REPORTING_DELAY
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_intra_freq_reporting_delay_struct; // M1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10630
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@24
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@48
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M03_Inter_Freq_Reporting_Delay.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M03_Inter_Freq_Reporting_Delay.l1v
new file mode 100755
index 0000000..2a2a02e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M03_Inter_Freq_Reporting_Delay.l1v
@@ -0,0 +1,94 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M03: FDD Inter Frequency Measurements (Event triggered reporting of 1 intra-frequency)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_INTER_FREQ_REPORTING_DELAY
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts3;
+ kal_uint16 psc_bts3; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_inter_freq_reporting_delay_struct; // M3
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Inter-freq Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Inter-freq Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M04_Abs_Intra_Freq_Cpich_Rscp.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M04_Abs_Intra_Freq_Cpich_Rscp.l1v
new file mode 100755
index 0000000..3d63a2a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M04_Abs_Intra_Freq_Cpich_Rscp.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M04: CPICH RSCP (Intra frequency measurement: absolute accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_ABS_INTRA_FREQ_CPICH_RSCP
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_abs_intra_freq_cpich_rscp_struct; // M4
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10630
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@20
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@40
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M05_Rel_Intra_Freq_Cpich_Rscp.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M05_Rel_Intra_Freq_Cpich_Rscp.l1v
new file mode 100755
index 0000000..607bc1b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M05_Rel_Intra_Freq_Cpich_Rscp.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M05: CPICH RSCP (Intra frequency measurement: relative accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_REL_INTRA_FREQ_CPICH_RSCP
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_rel_intra_freq_cpich_rscp_struct; // M5
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10630
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M06_Rel_Inter_Freq_Cpich_Rscp.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M06_Rel_Inter_Freq_Cpich_Rscp.l1v
new file mode 100755
index 0000000..7a3a06d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M06_Rel_Inter_Freq_Cpich_Rscp.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M06: CPICH RSCP (Inter frequency measurement: relative accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_REL_INTER_FREQ_CPICH_RSCP
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_rel_inter_freq_cpich_rscp_struct; // M6
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10655
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M07_Abs_Intra_Freq_Cpich_Ecio.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M07_Abs_Intra_Freq_Cpich_Ecio.l1v
new file mode 100755
index 0000000..7ea389c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M07_Abs_Intra_Freq_Cpich_Ecio.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M07: CPICH Ec/Io (Intra frequency measurement: absolute accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_ABS_INTRA_FREQ_CPICH_ECIO
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_abs_intra_freq_cpich_ecio_struct; // M7
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10630
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M08_Rel_Intra_Freq_Cpich_Ecio.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M08_Rel_Intra_Freq_Cpich_Ecio.l1v
new file mode 100755
index 0000000..354c687
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M08_Rel_Intra_Freq_Cpich_Ecio.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M08: CPICH Ec/Io (Intra frequency measurement: relative accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_REL_INTRA_FREQ_CPICH_ECIO
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_rel_intra_freq_cpich_ecio_struct; // M8
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10630
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M09_Rel_Inter_Freq_Cpich_Ecio.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M09_Rel_Inter_Freq_Cpich_Ecio.l1v
new file mode 100755
index 0000000..7ce4685
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M09_Rel_Inter_Freq_Cpich_Ecio.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M09: CPICH Ec/Io (Inter frequency measurement: relative accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_REL_INTER_FREQ_CPICH_ECIO
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_rel_inter_freq_cpich_ecio_struct; // M9
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10655
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M10_Abs_Utra_Carrier_Rssi.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M10_Abs_Utra_Carrier_Rssi.l1v
new file mode 100755
index 0000000..145c194
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M10_Abs_Utra_Carrier_Rssi.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M10: UTRA Carrier RSSI (Absolute measurement accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_ABS_UTRA_CARRIER_RSSI
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_abs_utra_carrier_rssi_struct; // M10
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10655
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M11_Rel_Utra_Carrier_Rssi.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M11_Rel_Utra_Carrier_Rssi.l1v
new file mode 100755
index 0000000..617b784
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M11_Rel_Utra_Carrier_Rssi.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M11: UTRA Carrier RSSI (Relative measurement accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_REL_UTRA_CARRIER_RSSI
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_rel_utra_carrier_rssi_struct; // M11
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10655
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M12_Intra_Freq_Sfn_Cfn_Diff.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M12_Intra_Freq_Sfn_Cfn_Diff.l1v
new file mode 100755
index 0000000..ca5450e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M12_Intra_Freq_Sfn_Cfn_Diff.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M12: SFN-CFN Observed Time Difference (Intra frequency measurement)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_INTRA_FREQ_SFN_CFN_DIFF
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_intra_freq_sfn_cfn_diff_struct; // M12
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10630
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M13_Inter_Freq_Sfn_Cfn_Diff.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M13_Inter_Freq_Sfn_Cfn_Diff.l1v
new file mode 100755
index 0000000..4d5f689
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M13_Inter_Freq_Sfn_Cfn_Diff.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M13: SFN-CFN Observed Time Difference (Intra frequency measurement)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_INTER_FREQ_SFN_CFN_DIFF
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_inter_freq_sfn_cfn_diff_struct; // M13
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10655
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M14_Sfn_Sfn_Diff_Type1.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M14_Sfn_Sfn_Diff_Type1.l1v
new file mode 100755
index 0000000..d270a8d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M14_Sfn_Sfn_Diff_Type1.l1v
@@ -0,0 +1,144 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M14: SFN-SFN Observed Time Difference Type 1"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_SFN_SFN_DIFF_TYPE1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+} udps_sfn_sfn_diff_type1_struct; // M14
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10630
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@65535
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+[RACH_TTI] "(RACH) TTI. [Number of frames]"
+@TTI10 1
+TTI20 2
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@150
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@-7
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M15_UE_Tx_Power.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M15_UE_Tx_Power.l1v
new file mode 100755
index 0000000..997cb00
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M15_UE_Tx_Power.l1v
@@ -0,0 +1,82 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M15: UE Transmitted Power"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_UE_TX_POWER
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_ue_tx_power_struct; // M15
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM1_Gsm_Meas_in_Null.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM1_Gsm_Meas_in_Null.l1v
new file mode 100755
index 0000000..078e708
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM1_Gsm_Meas_in_Null.l1v
@@ -0,0 +1,77 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]GM1: GSM measurements in 3G NULL Mode."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_GSM_MEAS_IN_NULL
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint8 bands; // BAND of GSM neighbor cell: default 0=PGSM
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell: default = 20
+ kal_int8 bsic_bts2; // BSIC of GSM neighbor cell: default = 1(NCC)x8 + 5(BCC) = 13
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+} udps_gsm_meas_in_null_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of lower frequency BTS"
+10587~10814
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+0~63
+@13
+
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM2_Gsm_Meas_in_Idle.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM2_Gsm_Meas_in_Idle.l1v
new file mode 100755
index 0000000..89750a2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM2_Gsm_Meas_in_Idle.l1v
@@ -0,0 +1,135 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]GM2: GSM measurements in 3G Idle Mode."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_GSM_MEAS_IN_IDLE
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_uint8 bands; // BAND of GSM neighbor cell: default 0=PGSM
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell: default = 20
+ kal_int8 bsic_bts2; // BSIC of GSM neighbor cell: default = 1(NCC)x8 + 5(BCC) = 13
+
+ kal_uint8 Ts_ccpch;
+ kal_uint16 OVSFs_ccpch;
+ kal_uint16 OVSFpich;
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+} udps_gsm_meas_in_idle_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10670~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+0~63
+@13
+
+[Ts_ccpch] "Timing offset between S-CCPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFs_ccpch] "The OVSF code number of the S-CCPCH (0~SF-1)"
+0~63
+@7
+
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@100
+
+
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM3_Gsm_Meas_in_Fach.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM3_Gsm_Meas_in_Fach.l1v
new file mode 100755
index 0000000..7591954
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM3_Gsm_Meas_in_Fach.l1v
@@ -0,0 +1,154 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]GM3: GSM measurements in 3G FACH State."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_GSM_MEAS_IN_FACH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ //kal_uint8 bands; // Do NOT need PS
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell
+ kal_int8 bsic_bts2; // BSIC of GSM neighbor cell
+
+
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+} udps_gsm_meas_in_fach_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10670~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+0~63
+@13
+
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@65535
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+[RACH_TTI] "(RACH) TTI. [Number of frames]"
+@TTI10 1
+TTI20 2
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@150
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@-7
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM4_Gsm_Reporting_Delay.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM4_Gsm_Reporting_Delay.l1v
new file mode 100755
index 0000000..653cbb7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM4_Gsm_Reporting_Delay.l1v
@@ -0,0 +1,97 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]GM4: GSM measurements (Event triggered report with BSIC verification required)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_GSM_REPORTING_DELAY
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell
+ kal_int8 bsic_bts2; // BSIC of GSM neighbor cell
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_gsm_reporting_delay_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+0~63
+@13
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM5_Gsm_Reporting_Delay_No_Bsic.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM5_Gsm_Reporting_Delay_No_Bsic.l1v
new file mode 100755
index 0000000..181f092
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM5_Gsm_Reporting_Delay_No_Bsic.l1v
@@ -0,0 +1,97 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]GM5: GSM measurements (Event triggered report without BSIC verification required)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_GSM_REPORTING_DELAY_NO_BSIC
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell
+ kal_int8 bsic_bts2; // BSIC of GSM neighbor cell
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_gsm_reporting_delay_no_bsic_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+0~63
+@13
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM6_Abs_Gsm_Carrier_Rssi.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM6_Abs_Gsm_Carrier_Rssi.l1v
new file mode 100755
index 0000000..7f1f43e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM6_Abs_Gsm_Carrier_Rssi.l1v
@@ -0,0 +1,97 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]GM6: GSM Carrier RSSI (Absolute accuracy)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_ABS_GSM_CARRIER_RSSI
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell
+ kal_int8 bsic_bts2; // BSIC of GSM neighbor cell
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_abs_gsm_carrier_rssi_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+0~63
+@13
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_IRT1_Gsm_Crs_to_Umts.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_IRT1_Gsm_Crs_to_Umts.l1v
new file mode 100755
index 0000000..dbc1d55
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_IRT1_Gsm_Crs_to_Umts.l1v
@@ -0,0 +1,174 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]IRT1: Cell Re-Selection from GSM to UMTS."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_GSM_CRS_TO_UMTS
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint8 bands; // BAND of GSM neighbor cell: default 0=PGSM
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell: default = 20
+ //kal_int8 bsic_bts2; // BSIC of GSM neighbor cell: default = 1(NCC)x8 + 5(BCC) = 13
+
+ kal_uint8 Ts_ccpch;
+ kal_uint16 OVSFs_ccpch;
+ kal_uint16 OVSFpich;
+
+ kal_int8 cpich_tx_power;
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+ kal_bool sttd_ind;
+
+ // For 2G DPS
+ udps_2g_rf_pwr_cap_struct gsm450PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm480PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm850PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm900PowerClass;
+ udps_2g_rf_pwr_cap_struct dcsPowerClass;
+ udps_2g_rf_pwr_cap_struct pcsPowerClass;
+ kal_bool imsi1_valid;
+ kal_uint16 imsi1_mod_1000;
+} udps_gsm_crs_to_umts_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Neighbor Cell (for Meas)"
+10587~10814
+@10600
+
+[psc_bts1] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+//[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+//0~63
+
+[Ts_ccpch] "Timing offset between S-CCPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFs_ccpch] "The OVSF code number of the S-CCPCH (0~SF-1)"
+0~63
+@7
+
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@100
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[imsi1_valid] "Is there valid IMSI"
+@KAL_FALSE
+
+[imsi1_mod_1000] "IMSI modulo 1000"
+0~999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_IRT2_Umts_Crs_to_Gsm.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_IRT2_Umts_Crs_to_Gsm.l1v
new file mode 100755
index 0000000..ff500c5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_IRT2_Umts_Crs_to_Gsm.l1v
@@ -0,0 +1,176 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]IRT2: Cell Re-Selection from UMTS to GSM."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_UMTS_CRS_TO_GSM
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint8 bands; // BAND of GSM neighbor cell: default 0=PGSM
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell: default = 20
+ kal_int8 bsic_bts2; // BSIC of GSM neighbor cell: default = 1(NCC)x8 + 5(BCC) = 13
+
+ kal_uint8 Ts_ccpch;
+ kal_uint16 OVSFs_ccpch;
+ kal_uint16 OVSFpich;
+
+ kal_int8 cpich_tx_power;
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+ kal_bool sttd_ind;
+
+ // For 2G DPS
+ udps_2g_rf_pwr_cap_struct gsm450PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm480PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm850PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm900PowerClass;
+ udps_2g_rf_pwr_cap_struct dcsPowerClass;
+ udps_2g_rf_pwr_cap_struct pcsPowerClass;
+ kal_bool imsi1_valid;
+ kal_uint16 imsi1_mod_1000;
+} udps_umts_crs_to_gsm_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Neighbor Cell (for Meas)"
+10587~10814
+@10600
+
+[psc_bts1] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+0~63
+@13
+
+[Ts_ccpch] "Timing offset between S-CCPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFs_ccpch] "The OVSF code number of the S-CCPCH (0~SF-1)"
+0~63
+@7
+
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@100
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[imsi1_valid] "Is there valid IMSI"
+@KAL_FALSE
+
+[imsi1_mod_1000] "IMSI modulo 1000"
+0~999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_IRT3_Gsm_Hho_to_Umts.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_IRT3_Gsm_Hho_to_Umts.l1v
new file mode 100755
index 0000000..247a772
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_IRT3_Gsm_Hho_to_Umts.l1v
@@ -0,0 +1,155 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]IRT3: Inter-RAT HHO from GSM to UMTS."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_GSM_HHO_TO_UMTS
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint8 bands; // BAND of GSM neighbor cell: default 0=PGSM
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell: default = 20
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ // For 2G DPS
+ udps_2g_rf_pwr_cap_struct gsm450PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm480PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm850PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm900PowerClass;
+ udps_2g_rf_pwr_cap_struct dcsPowerClass;
+ udps_2g_rf_pwr_cap_struct pcsPowerClass;
+} udps_gsm_hho_to_umts_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Neighbor Cell (for Meas)"
+10587~10814
+@10600
+
+[psc_bts1] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM1_Wcdma_Meas_in_Scan.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM1_Wcdma_Meas_in_Scan.l1v
new file mode 100755
index 0000000..604c192
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM1_Wcdma_Meas_in_Scan.l1v
@@ -0,0 +1,78 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]UM1: WCDMA measurements in 2G SCAN Mode."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_WCDMA_MEAS_IN_SCAN
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint8 bands; // BAND of GSM neighbor cell: default 0=PGSM
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell: default = 20
+ kal_int8 bsic_bts2; // BSIC of GSM neighbor cell: default = 1(NCC)x8 + 5(BCC) = 13
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+} udps_wcdma_meas_in_scan_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Neighbor Cell (for Meas)"
+10587~10814
+@10600
+
+[psc_bts1] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+0~63
+@13
+
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM2_Wcdma_Meas_in_Idle.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM2_Wcdma_Meas_in_Idle.l1v
new file mode 100755
index 0000000..993a4b8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM2_Wcdma_Meas_in_Idle.l1v
@@ -0,0 +1,143 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]UM2: WCDMA measurements in 2G IDLE Mode."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_WCDMA_MEAS_IN_IDLE
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint8 bands; // BAND of GSM neighbor cell: default 0=PGSM
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell: default = 20
+ //kal_int8 bsic_bts2; // BSIC of GSM neighbor cell: default = 1(NCC)x8 + 5(BCC) = 13
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+ //For 2G DPS
+ udps_2g_rf_pwr_cap_struct gsm450PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm480PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm850PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm900PowerClass;
+ udps_2g_rf_pwr_cap_struct dcsPowerClass;
+ udps_2g_rf_pwr_cap_struct pcsPowerClass;
+ kal_bool imsi1_valid;
+ kal_uint16 imsi1_mod_1000;
+} udps_wcdma_meas_in_idle_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Neighbor Cell (for Meas)"
+10587~10814
+@10600
+
+[psc_bts1] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for FS)"
+10670~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for FS)"
+0~511
+@511
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+//[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+//0~63
+
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[imsi1_valid] "Is there valid IMSI"
+@KAL_FALSE
+
+[imsi1_mod_1000] "IMSI modulo 1000"
+0~999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM3_Wcdma_Meas_in_Dedi.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM3_Wcdma_Meas_in_Dedi.l1v
new file mode 100755
index 0000000..61b34d3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM3_Wcdma_Meas_in_Dedi.l1v
@@ -0,0 +1,123 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]UM3: WCDMA measurements in 2G Dedicated Mode."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_WCDMA_MEAS_IN_DEDI
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint8 bands; // BAND of GSM neighbor cell: default 0=PGSM
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell: default = 20
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+ //For 2G DPS
+ udps_2g_rf_pwr_cap_struct gsm450PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm480PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm850PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm900PowerClass;
+ udps_2g_rf_pwr_cap_struct dcsPowerClass;
+ udps_2g_rf_pwr_cap_struct pcsPowerClass;
+} udps_wcdma_meas_in_dedi_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Neighbor Cell (for Meas)"
+10587~10814
+@10600
+
+[psc_bts1] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM4_Wcdma_Meas_in_Pidle.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM4_Wcdma_Meas_in_Pidle.l1v
new file mode 100755
index 0000000..f586255
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM4_Wcdma_Meas_in_Pidle.l1v
@@ -0,0 +1,88 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]UM4: WCDMA measurements in 2G Packet Idle Mode."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_WCDMA_MEAS_IN_PIDLE
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint8 bands; // BAND of GSM neighbor cell: default 0=PGSM
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell: default = 20
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+ //For 2G DPS
+ kal_bool GprsMeasMode;
+} udps_wcdma_meas_in_pidle_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Neighbor Cell (for Meas)"
+10587~10814
+@10600
+
+[psc_bts1] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for FS)"
+10670~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for FS)"
+0~511
+@511
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+
+[GprsMeasMode] "Assume PMO/PCO Received (GPRS meas mode)"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM5_Wcdma_Meas_in_Ptx.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM5_Wcdma_Meas_in_Ptx.l1v
new file mode 100755
index 0000000..b6ac813
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM5_Wcdma_Meas_in_Ptx.l1v
@@ -0,0 +1,95 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]UM5: WCDMA measurements in 2G Packet Transfer Mode."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_WCDMA_MEAS_IN_PTX
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint8 bands; // BAND of GSM neighbor cell: default 0=PGSM
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell: default = 20
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+ //For 2G DPS
+ kal_bool RlcChanReq;
+ //kal_uint8 AutoRepeat;
+ kal_uint8 InfiniteTBF;
+ kal_uint16 NumTestPdu;
+ kal_uint16 imsi1_mod_1000;
+} udps_wcdma_meas_in_ptx_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Neighbor Cell (for Meas)"
+10587~10814
+@10600
+
+[psc_bts1] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+
+//[AutoRepeat] "Repeat the Test"
+//@KAL_FALSE
+
+[InfiniteTBF] "End TBF from MS side"
+@0
+
+[NumTestPdu] "End after how many blocks"
+500~32000
+@3000
+
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_A6_Best_Effort_for_PRACH.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_A6_Best_Effort_for_PRACH.l1v
new file mode 100755
index 0000000..a49e137
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_A6_Best_Effort_for_PRACH.l1v
@@ -0,0 +1,154 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]A6: Best Effort for PRACH"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_BEST_EFFORT_FOR_PRACH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ // For FACH
+ kal_uint8 Ts_ccpch;
+ kal_uint16 OVSFs_ccpch;
+ kal_bool pilot_exit;
+ kal_bool tfci_exit;
+
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+} udps_best_effort_for_prach_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@65535
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+[RACH_TTI] "(RACH) TTI. [Number of frames]"
+@TTI10 1
+TTI20 2
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@150
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@-7
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+/******************************************
+* For FACH
+******************************************/
+[Ts_ccpch] "Timing offset between S-CCPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFs_ccpch] "The OVSF code number of the S-CCPCH (0~SF-1)"
+0~63
+@7
+
+[pilot_exit] "Pilot Exit for Slot Format of the S-CCPCH"
+@KAL_TRUE
+
+[tfci_exit] "TFCI Exit for Slot Format of the S-CCPCH"
+@KAL_TRUE
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_A7_Recursive_TCS_in_FACH.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_A7_Recursive_TCS_in_FACH.l1v
new file mode 100755
index 0000000..3cb7416
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_A7_Recursive_TCS_in_FACH.l1v
@@ -0,0 +1,59 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]A7: Recursive TCS in FACH"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_RECURSIVE_TCS_IN_FACH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+
+ kal_int8 max_tx_power;
+ // For RACH
+ // Use Default Value
+
+ // For FACH
+ // Use Default Value
+} udps_recursive_tcs_in_fach_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10670~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD25_Recursive_TCS_in_DCH.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD25_Recursive_TCS_in_DCH.l1v
new file mode 100755
index 0000000..848c6df
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD25_Recursive_TCS_in_DCH.l1v
@@ -0,0 +1,86 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]CD25: Recursive TCS in DCH"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_RECURSIVE_TCS_IN_DCH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ udps_TCS_type_struct udps_TCS_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_recursive_tcs_in_dch_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Inter-freq. Cell (CS4 only)"
+10562~10814
+@10600
+
+[psc_bts2] "PSC of Inter-freq. Cell"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+
+/******************************************
+* For DCH
+******************************************/
+[udps_TCS_type] "Choose the TCS type in DCH"
+@TCS3_INTRA
+TCS2_INTRA
+TCS2_INTER
+TCS3_IRT
+TCS2_IRT
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD26_Unknown_SFN_Decoding_in_DCH.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD26_Unknown_SFN_Decoding_in_DCH.l1v
new file mode 100755
index 0000000..4db524a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD26_Unknown_SFN_Decoding_in_DCH.l1v
@@ -0,0 +1,83 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]CD26: Unknown SFN decoding in DCH"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_UNKNOWN_SFN_DECODING_IN_DCH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 sfn_frame_len; //CD26 only
+} udps_unknown_sfn_decoding_in_dch_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10814
+@10600
+
+[psc_bts2] "PSC of Inter-freq. Cell"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[sfn_frame_len] "Enter the SFN decoding length:"
+3~255
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD28_TPC_Combining_Reliable_Test.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD28_TPC_Combining_Reliable_Test.l1v
new file mode 100755
index 0000000..c014e66
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD28_TPC_Combining_Reliable_Test.l1v
@@ -0,0 +1,133 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]CD28: TPC_Combining_Reliable_Test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_TPC_COMBINING_RELIABLE_TEST
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_bool bts3_valid;
+ kal_uint16 psc_bts3;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO pef
+ kal_uint16 OVSFdpch_rl2; // for SHO pef
+ kal_uint8 Tdpch_rl3; // only when bts3_valid = TRUE
+ kal_uint16 OVSFdpch_rl3; // only when bts3_valid = TRUE
+ kal_uint8 pc_algo; //CD28 needed
+ kal_uint8 tpc_step; //CD28 needed
+} udps_tpc_combining_reliable_test_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 (MUST LINK first)"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1 (MUST LINK first)"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+[bts3_valid] "Is BTS3 available?"
+@KAL_FALSE
+
+[psc_bts3] "PSC of Serving Cell 3"
+0~511
+@0
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@4
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@30
+
+[Tdpch_rl3] "(DCH) Timing offset between 1st DPCH and CPICH for BTS3 [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl3] "(DCH) OVSF code of DL DCH for BTS3: 0~SF-1 "
+0~511
+@30
+
+[pc_algo] "UL Power control algorithm"
+1~2
+@1
+
+[tpc_step] "UL Power control step size"
+1~2
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD31_SIR_Meas_In_DCH_with_TXTD_CM.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD31_SIR_Meas_In_DCH_with_TXTD_CM.l1v
new file mode 100755
index 0000000..fa7a324
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD31_SIR_Meas_In_DCH_with_TXTD_CM.l1v
@@ -0,0 +1,94 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]CD31: SIR_Meas_In_DCH_with_TXTD_CM"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_SIR_MEAS_IN_DCH_WITH_TXTD_CM
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ tx_diversity_E diversity_mode; // for CD31
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD31
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ //kal_bool using_HLS; // CD31 only
+ kal_uint8 CM_set_pef;
+} udps_sir_meas_in_dch_with_txtd_cm_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+@FDD_DL_TX_STTD
+FDD_DL_TX_CLM1
+FDD_DL_TX_CLM2
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~2
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
+
+[CM_set_pef] "compressed mode pattern 1/2"
+@Set1 1
+Set2 2
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD32_DLPC_Test_Wind_Up_Down.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD32_DLPC_Test_Wind_Up_Down.l1v
new file mode 100755
index 0000000..5948e74
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD32_DLPC_Test_Wind_Up_Down.l1v
@@ -0,0 +1,80 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]CD32: DLPC_Test_Wind_Up_Down"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DLPC_TEST_WIND_UP_DOWN
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_dlpc_test_wind_up_down_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the RMC 12.2 or 64kbps."
+@RMC_12_2
+RMC_64
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD33_Pef_of_TrCH_Reconfig.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD33_Pef_of_TrCH_Reconfig.l1v
new file mode 100755
index 0000000..60d7355
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD33_Pef_of_TrCH_Reconfig.l1v
@@ -0,0 +1,83 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]CD33: Performance of TrCH Reconfiguration (DL CLPC) (No LB2)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PEF_OF_TRCH_RECONFIG
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type; // Enum: 12.2, 64,
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_pef_of_trch_reconfig_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC for stage 2 setting"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD34_DLPC_for_Diff_TF.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD34_DLPC_for_Diff_TF.l1v
new file mode 100755
index 0000000..ac630e2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD34_DLPC_for_Diff_TF.l1v
@@ -0,0 +1,72 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]CD34: Power Control in Downlink Different TF (No LB2)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DLPC_FOR_DIFF_TF
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_dlpc_for_diff_tf_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD35_DLPC_for_BTFD_Dual_TF.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD35_DLPC_for_BTFD_Dual_TF.l1v
new file mode 100755
index 0000000..d10f1ea
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD35_DLPC_for_BTFD_Dual_TF.l1v
@@ -0,0 +1,72 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]CD35: Performance of BTFD with DUAL TF (With DL CLPC) (No LB2)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DLPC_FOR_BTFD_DUAL_TF
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_dlpc_for_btfd_dual_tf_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD36_DLPC_for_TFCI_Dual_TF.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD36_DLPC_for_TFCI_Dual_TF.l1v
new file mode 100755
index 0000000..4eedbf2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD36_DLPC_for_TFCI_Dual_TF.l1v
@@ -0,0 +1,72 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]CD36: Performance of RMC12.2 with DUAL TF (With DL CLPC) (No LB2)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DLPC_FOR_TFCI_DUAL_TF
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_dlpc_for_btfd_dual_tf_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD37_DLPC_Test_Initial_Convergence.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD37_DLPC_Test_Initial_Convergence.l1v
new file mode 100755
index 0000000..b3f51a8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD37_DLPC_Test_Initial_Convergence.l1v
@@ -0,0 +1,80 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]CD37: DLPC_Test_Initial_Convergence"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DLPC_TEST_INITIAL_CONVERGENCE
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_dlpc_test_wind_up_down_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the RMC 12.2 or 64kbps."
+@RMC_12_2 0
+RMC_64 1
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD38_ULPC_for_TX_AGC_test.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD38_ULPC_for_TX_AGC_test.l1v
new file mode 100755
index 0000000..c314101
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD38_ULPC_for_TX_AGC_test.l1v
@@ -0,0 +1,102 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]CD38: ULPC of TX AGC test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_ULPC_FOR_TX_AGC_TEST
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 pc_algo; //CD38
+ kal_uint8 tpc_step; //CD38
+ kal_uint8 ul_dch_pc_pream;
+ kal_uint8 CM_rpp; //CD38
+ kal_uint8 CM_itp; //CD38
+} udps_ulpc_for_tx_agc_test_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
+
+[pc_algo] "UL Power control algorithm"
+1~2
+@1
+
+[tpc_step] "UL Power control step size"
+1~2
+@1
+
+[ul_dch_pc_pream] "UL Power control preamble"
+0~7
+@1
+
+[CM_rpp] "CM's RPP"
+0~1
+@0
+
+[CM_itp] "CM's ITP"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I11_Recursive_IPS_in_NULL.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I11_Recursive_IPS_in_NULL.l1v
new file mode 100755
index 0000000..d88e6e8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I11_Recursive_IPS_in_NULL.l1v
@@ -0,0 +1,31 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]I11: Recursive IPS in NULL"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_RECURSIVE_IPS_IN_NULL
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+} udps_recursive_ips_in_null_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of lower frequency BTS"
+10562~10838
+9662~9938
+4357~4458
+@10600
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I5_PCH_reading_on_STTD_Cell.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I5_PCH_reading_on_STTD_Cell.l1v
new file mode 100755
index 0000000..9b2e3b4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I5_PCH_reading_on_STTD_Cell.l1v
@@ -0,0 +1,117 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]I5: PCH_reading_on_STTD_Cell"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PCH_READING_ON_STTD_CELL
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ //for STTD cell, no 2nd BTS
+
+ kal_bool read_BCH_only; // for BSC1(CSD) only
+
+ //for PCH on S-CCPCH
+ kal_uint8 Ts_ccpch;
+ kal_uint16 OVSFs_ccpch;
+ kal_uint16 OVSFpich;
+ //kal_uint16 SFs_ccpch; //for Slot Format
+ kal_bool pilot_exit; //for Slot Format
+ kal_bool tfci_exit; //for Slot Format
+
+ kal_int8 cpich_tx_power;
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+ kal_uint16 count_blks; // for Self BLER cal.
+
+ kal_int16 freq_offset;//I3, I5 add I/F for CSD's freq. offset requirement.
+ kal_uint16 offline_rake_test_count; // for I3, I5, I6
+} udps_pch_reading_on_sttd_cell_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+[read_BCH_only] "(CSD) Conti. Read BCH on this STTD Cell?"
+@KAL_FALSE
+
+[count_blks] "(CSD)Wanted total BCH Blocks number?"
+@2000
+
+[Ts_ccpch] "Timing offset between S-CCPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFs_ccpch] "The OVSF code number of the S-CCPCH (0~SF-1)"
+0~63
+@7
+
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@100
+
+[pilot_exit] "Pilot Exit for Slot Format of the S-CCPCH"
+@KAL_TRUE
+
+[tfci_exit] "TFCI Exit for Slot Format of the S-CCPCH"
+@KAL_TRUE
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+
+[freq_offset] "(CSD) Offline Rake Test's freq. offset:"
+@0
+
+[offline_rake_test_count] "offline RAKE test count"
+@1000
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I6_Pch_Receive.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I6_Pch_Receive.l1v
new file mode 100755
index 0000000..ecc7062
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I6_Pch_Receive.l1v
@@ -0,0 +1,118 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]I6: PCH receive"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PCH_RECEIVE
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+
+ kal_uint8 sccpch_slot_format;
+ kal_uint8 Ts_ccpch;
+ kal_uint16 OVSFs_ccpch;
+ kal_uint16 OVSFpich;
+
+ kal_int8 cpich_tx_power;
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+ kal_bool sttd_ind;
+
+ kal_int16 freq_offset;//I3, I5 add I/F for CSD's freq. offset requirement.
+ kal_uint8 offline_rake_test_mode; // for I6
+ kal_uint16 offline_rake_test_count; // for I3, I5, I6
+} udps_pch_receive_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10670~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+[sccpch_slot_format] "S-CCPCH slot format"
+0~17
+@4
+
+[Ts_ccpch] "Timing offset between S-CCPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFs_ccpch] "The OVSF code number of the S-CCPCH (0~SF-1)"
+0~63
+@3
+
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@2
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+PI18 18
+PI36 36
+@PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+[freq_offset] "(CSD) Offline Rake Test's freq. offset:"
+@0
+
+[offline_rake_test_mode] "offline RAKE test mode"
+1~3
+@1
+
+[offline_rake_test_count] "offline RAKE test count"
+@1000
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I8_Recursive_TCS_in_PCH.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I8_Recursive_TCS_in_PCH.l1v
new file mode 100755
index 0000000..f889a98
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I8_Recursive_TCS_in_PCH.l1v
@@ -0,0 +1,107 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]I8: Recursive TCS in PCH"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_RECURSIVE_TCS_IN_PCH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+
+ udps_TCS_type_struct udps_TCS_type;
+
+ kal_uint8 Ts_ccpch;
+ kal_uint16 OVSFs_ccpch;
+ kal_uint16 OVSFpich;
+
+ kal_int8 cpich_tx_power;
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+} udps_recursive_tcs_in_pch_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10670~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+[udps_TCS_type] "Choose the TCS type in PCH"
+@TCS3_INTRA
+TCS2_INTRA
+TCS2_INTER
+TCS3_IRT
+TCS2_IRT
+
+[Ts_ccpch] "Timing offset between S-CCPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFs_ccpch] "The OVSF code number of the S-CCPCH (0~SF-1)"
+0~63
+@7
+
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@100
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I9_Recursive_ICS_in_NULL.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I9_Recursive_ICS_in_NULL.l1v
new file mode 100755
index 0000000..538b190
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I9_Recursive_ICS_in_NULL.l1v
@@ -0,0 +1,31 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]I9: Recursive ICS in NULL"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_RECURSIVE_ICS_IN_NULL
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+} udps_initial_cell_search_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of lower frequency BTS"
+10562~10838
+9662~9938
+4357~4458
+@10600
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_M16_all_meas_statistic.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_M16_all_meas_statistic.l1v
new file mode 100755
index 0000000..9979c06
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_M16_all_meas_statistic.l1v
@@ -0,0 +1,89 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]M16: All Measurement Statistic (RSSI, RSCP, Ec/No)(CSD)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_ALL_MEAS_STATISTIC
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_all_meas_statistic_struct; // M16
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@20
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@40
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_UM6_Recursive_TCS_in_2G_Idle.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_UM6_Recursive_TCS_in_2G_Idle.l1v
new file mode 100755
index 0000000..c5287f4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_UM6_Recursive_TCS_in_2G_Idle.l1v
@@ -0,0 +1,130 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]UM6: Recursive_TCS_in_2G_Idle."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_RECURSIVE_TCS_IN_2G_IDLE
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint8 bands;/// BAND of GSM neighbor cell
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell
+ //kal_int8 bsic_bts2; // BSIC of GSM neighbor cell
+
+ udps_TCS_type_struct udps_TCS_type; // CSx(CSD) only
+
+ // For 2G DPS
+ udps_2g_rf_pwr_cap_struct gsm450PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm480PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm850PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm900PowerClass;
+ udps_2g_rf_pwr_cap_struct dcsPowerClass;
+ udps_2g_rf_pwr_cap_struct pcsPowerClass;
+ kal_bool imsi1_valid;
+ kal_uint16 imsi1_mod_1000;
+} udps_recursive_tcs_in_2g_idle_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Neighbor Cell (for TCS)"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Neighbor Cell (for TCS)"
+0~511
+@10
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+//[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+//0~63
+
+[udps_TCS_type] "Choose the TCS type in DCH"
+@TCS3_INTRA
+TCS2_INTRA
+TCS2_INTER
+TCS3_IRT
+TCS2_IRT
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[imsi1_valid] "Is there valid IMSI"
+@KAL_FALSE
+
+[imsi1_mod_1000] "IMSI modulo 1000"
+0~999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_UM7_Recursive_TCS_in_2G_Dedi.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_UM7_Recursive_TCS_in_2G_Dedi.l1v
new file mode 100755
index 0000000..3d5272c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_UM7_Recursive_TCS_in_2G_Dedi.l1v
@@ -0,0 +1,114 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]UM7: Recursive_TCS_in_2G Dedicated Mode."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_RECURSIVE_TCS_IN_2G_DEDI
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint8 bands;// BAND of GSM neighbor cell
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell
+
+ udps_TCS_type_struct udps_TCS_type; // CSx(CSD) only
+
+ // For 2G DPS
+ udps_2g_rf_pwr_cap_struct gsm450PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm480PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm850PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm900PowerClass;
+ udps_2g_rf_pwr_cap_struct dcsPowerClass;
+ udps_2g_rf_pwr_cap_struct pcsPowerClass;
+} udps_recursive_tcs_in_2g_dedi_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+PGSM900 1
+@EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[udps_TCS_type] "Choose the TCS type in DCH"
+@24
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
diff --git a/mcu/service/dhl/database/l1validation_db/4_2G_FT/dps_FT1_PowerScanWithStoredList.l1v b/mcu/service/dhl/database/l1validation_db/4_2G_FT/dps_FT1_PowerScanWithStoredList.l1v
new file mode 100755
index 0000000..cae8e17
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/4_2G_FT/dps_FT1_PowerScanWithStoredList.l1v
@@ -0,0 +1,65 @@
+{ Validation }
+Title = "[4_2G_FT]FT1: Repeated Power Scan with stored list"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_POWER_SCAN_WITH_STORED_LIST_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ kal_int16 PM1;
+ kal_int16 PM2;
+ kal_int16 PM3;
+ kal_int16 PM4;
+ kal_int16 PM5;
+ kal_int16 PM6;
+} dps_power_scan_with_stored_list_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+
+[PM1] "PM1"
+0~124
+975~1023
+512~885
+
+[PM2] "PM2"
+0~124
+975~1023
+512~885
+
+[PM3] "PM3"
+0~124
+975~1023
+512~885
+
+[PM4] "PM4"
+0~124
+975~1023
+512~885
+
+[PM5] "PM5"
+0~124
+975~1023
+512~885
+
+[PM6] "PM6"
+0~124
+975~1023
+512~885
diff --git a/mcu/service/dhl/database/l1validation_db/4_2G_FT/dps_FT2_CCCh_nonSig_FT.l1v b/mcu/service/dhl/database/l1validation_db/4_2G_FT/dps_FT2_CCCh_nonSig_FT.l1v
new file mode 100755
index 0000000..e95bb90
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/4_2G_FT/dps_FT2_CCCh_nonSig_FT.l1v
@@ -0,0 +1,81 @@
+{ Validation }
+Title = "[4_2G_FT]FT2: GPRS PDTCH for field trail"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_GPRS_NONSIG_FT_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN arfcnPDTCh1;
+ ARFCN arfcnPDTCh2;
+ ARFCN arfcnPDTCh3;
+ ARFCN arfcnPDTCh4;
+ kal_int8 tsc;
+ kal_int8 syncTimeslotPDTCh;
+ kal_int8 constellationPDTCh;
+ kal_int16 startPM1;
+ kal_int16 endPM1;
+ kal_int16 startPM2;
+ kal_int16 endPM2;
+ kal_int16 repeat_second;
+}dps_ccch_gprs_nonsig_ft_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+
+
+[repeat_second] "Repeat Period (sec)"
+1 ~ 8888888
+
+[arfcnSpec] "BCCH ARFCN"
+-1~124
+975~1023
+512~885
+
+[arfcnPDTCh1] "PDTCH ARFCN1"
+-1~124
+975~1023
+512~885
+
+[arfcnPDTCh2] "PDTCH ARFCN2"
+-1~124
+975~1023
+512~885
+
+[arfcnPDTCh3] "PDTCH ARFCN3"
+-1~124
+975~1023
+512~885
+
+[arfcnPDTCh4] "PDTCH ARFCN4"
+-1~124
+975~1023
+512~885
+
+[tsc] "TSC of PDTCH"
+-2~7
+
+[syncTimeslotPDTCh] "Sync TS of PDTCH"
+0~7
+
+[constellationPDTCh] "Constellation of PDTCH"
+1~15
diff --git a/mcu/service/dhl/database/l1validation_db/4_2G_FT/dps_FT3_CCCh_Comb_Page_Reorg.l1v b/mcu/service/dhl/database/l1validation_db/4_2G_FT/dps_FT3_CCCh_Comb_Page_Reorg.l1v
new file mode 100755
index 0000000..dd8785a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/4_2G_FT/dps_FT3_CCCh_Comb_Page_Reorg.l1v
@@ -0,0 +1,41 @@
+{ Validation }
+Title = "[4_2G_FT]FT3: Combined CCCH with Page Reorg"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_COMB_PAGE_REORG_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_uint32 repeat_second;
+}dps_ccch_comb_page_reorg_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+
+[arfcnSpec] "BCCH ARFCN"
+-1~124
+975~1023
+512~885
+
+[repeat_second] "Repeat Period (sec)"
+1 ~ 8888888
+
diff --git a/mcu/service/dhl/database/l1validation_db/4g/l1v_db_4g.c b/mcu/service/dhl/database/l1validation_db/4g/l1v_db_4g.c
new file mode 100644
index 0000000..1b822f8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/4g/l1v_db_4g.c
@@ -0,0 +1,68 @@
+/********************************************************************************************
+ * LEGAL DISCLAIMER
+ *
+ * (Header of MediaTek Software/Firmware Release or Documentation)
+ *
+ * BY OPENING OR USING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE") RECEIVED
+ * FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON AN "AS-IS" BASIS
+ * ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES, EXPRESS OR IMPLIED,
+ * INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR
+ * A PARTICULAR PURPOSE OR NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY
+ * WHATSOEVER WITH RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK
+ * ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+ * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S SPECIFICATION
+ * OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+ *
+ * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE LIABILITY WITH
+ * RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION,
+ *
+ * TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE
+ * FEES OR SERVICE CHARGE PAID BY BUYER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE WITH THE LAWS
+ * OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF LAWS PRINCIPLES.
+ ************************************************************************************************/
+
+
+/*******************************************************************************
+ *
+ * Filename:
+ * ---------
+ * l1v_db.c
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * This file used for pre-processing to build L1V DB
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ * How to add a new gv script
+ * 1. Put the l1v script into the proper folder e.g: \tst\database\l1validation_db
+ *
+ * 2. #include "xxx.l1v".
+ *
+ *******************************************************************************/
+
+#ifdef STDC_HEADERS
+#undef STDC_HEADERS //it will include stdio.h
+#endif
diff --git a/mcu/service/dhl/database/l1validation_db/5_2G_Scan/dps_S1_PowerScan.l1v b/mcu/service/dhl/database/l1validation_db/5_2G_Scan/dps_S1_PowerScan.l1v
new file mode 100755
index 0000000..83767d8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/5_2G_Scan/dps_S1_PowerScan.l1v
@@ -0,0 +1,32 @@
+{ Validation }
+Title = "[5_2G_Scan]S1: Repeated Power Scan"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_POWER_SCAN_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+} dps_power_scan_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
diff --git a/mcu/service/dhl/database/l1validation_db/5_2G_Scan/dps_S2_FBSBsearch.l1v b/mcu/service/dhl/database/l1validation_db/5_2G_Scan/dps_S2_FBSBsearch.l1v
new file mode 100755
index 0000000..aadc915
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/5_2G_Scan/dps_S2_FBSBsearch.l1v
@@ -0,0 +1,40 @@
+{ Validation }
+Title = "[5_2G_Scan]S2: Repeated power scan and FB+SB Search"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_STRONGEST_ARFCN_FB_SEARCH_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+} dps_strongest_arfcn_fb_search_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "ARFCN specified"
+0~124
+975~1023
+512~885
+128~251
+@20
diff --git a/mcu/service/dhl/database/l1validation_db/5_2G_Scan/dps_S3_repeated_FBSB.l1v b/mcu/service/dhl/database/l1validation_db/5_2G_Scan/dps_S3_repeated_FBSB.l1v
new file mode 100755
index 0000000..49fe464
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/5_2G_Scan/dps_S3_repeated_FBSB.l1v
@@ -0,0 +1,48 @@
+{ Validation }
+Title = "[5_2G_Scan]S3: Repeated FB+SB Search"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_REPEATED_FB_SEARCH_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcn2nd;
+ ARFCN arfcn3rd;
+} dps_repeated_fb_search_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+//Strongest ARFCN based on Power Scan is already used for FB search
+[arfcn2nd] "First ARFCN on which to test FB+SB search "
+0~124
+975~1023
+512~885
+128~251
+@20
+[arfcn3rd] "Second ARFCN on which to test FB+SB search"
+0~124
+975~1023
+512~885
+128~251
+@40
diff --git a/mcu/service/dhl/database/l1validation_db/5_2G_Scan/dps_S4_BCCH_SI_receive.l1v b/mcu/service/dhl/database/l1validation_db/5_2G_Scan/dps_S4_BCCH_SI_receive.l1v
new file mode 100755
index 0000000..776f11f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/5_2G_Scan/dps_S4_BCCH_SI_receive.l1v
@@ -0,0 +1,40 @@
+{ Validation }
+Title = "[5_2G_Scan]S4: BCCH/SI Receive"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_SPECIFIC_BCCH_RX_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+} dps_specific_bcch_rx_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
diff --git a/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I1_RepeatCampOn.l1v b/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I1_RepeatCampOn.l1v
new file mode 100755
index 0000000..5cd47e1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I1_RepeatCampOn.l1v
@@ -0,0 +1,94 @@
+{ Validation }
+Title = "[6_2G_Idle]I1: Repeatedly Camp on the Strongest Base"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_REPEATED_IDLE_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ rf_power_capability_struct gsm900PowerClass;
+ rf_power_capability_struct gsm850PowerClass;
+ rf_power_capability_struct gsm480PowerClass;
+ rf_power_capability_struct gsm450PowerClass;
+ rf_power_capability_struct dcsPowerClass;
+ rf_power_capability_struct pcsPowerClass;
+ kal_bool imsi1_valid;
+ kal_uint16 imsi1_mod_1000;
+} dps_start_idle_req_struct, dps_repeated_idle_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[imsi1_valid] "Is there valid IMSI"
+@TRUE 1
+FALSE 0
+
+[imsi1_mod_1000] "IMSI modulo 1000"
+0~999
+@789
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
diff --git a/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I2_EnterIdleState.l1v b/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I2_EnterIdleState.l1v
new file mode 100755
index 0000000..655fdd5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I2_EnterIdleState.l1v
@@ -0,0 +1,94 @@
+{ Validation }
+Title = "[6_2G_Idle]I2: Enter Idle State"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_START_IDLE_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ rf_power_capability_struct gsm900PowerClass;
+ rf_power_capability_struct gsm850PowerClass;
+ rf_power_capability_struct gsm480PowerClass;
+ rf_power_capability_struct gsm450PowerClass;
+ rf_power_capability_struct dcsPowerClass;
+ rf_power_capability_struct pcsPowerClass;
+ kal_bool imsi1_valid;
+ kal_uint16 imsi1_mod_1000;
+} dps_start_idle_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[imsi1_valid] "Is there valid IMSI"
+@TRUE 1
+FALSE 0
+
+[imsi1_mod_1000] "IMSI modulo 1000"
+0~999
+@789
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
diff --git a/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I3_SC_Test.l1v b/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I3_SC_Test.l1v
new file mode 100755
index 0000000..cd3996a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I3_SC_Test.l1v
@@ -0,0 +1,114 @@
+{ Validation }
+Title = "[6_2G_Idle]I3: Surrounding Cell BSIC+BCCH Decode"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_SC_TEST_REQ // will be defined in appropriate header file
+
+/* DPS uses 2nd and 3rd strongest ARFCNs as the neighbor cell ARFCNs.
+ We can specify the neighbor cell ARFCNs from validation file by
+ making appropriate additions to the data structure below */
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN arfcn2nd;
+ ARFCN arfcn3rd;
+ rf_power_capability_struct gsm900PowerClass;
+ rf_power_capability_struct gsm850PowerClass;
+ rf_power_capability_struct gsm480PowerClass;
+ rf_power_capability_struct gsm450PowerClass;
+ rf_power_capability_struct dcsPowerClass;
+ rf_power_capability_struct pcsPowerClass;
+ kal_bool imsi1_valid;
+ kal_uint16 imsi1_mod_1000;
+ kal_uint8 cbch_mode;
+} dps_sc_test_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[arfcn2nd] "First Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@40
+[arfcn3rd] "Second Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@60
+[imsi1_valid] "Is there valid IMSI"
+@TRUE 1
+FALSE 0
+
+[imsi1_mod_1000] "IMSI modulo 1000"
+0~999
+@789
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
diff --git a/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I4_CBCH_receive.l1v b/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I4_CBCH_receive.l1v
new file mode 100755
index 0000000..96223da
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I4_CBCH_receive.l1v
@@ -0,0 +1,100 @@
+{ Validation }
+Title = "[6_2G_Idle]I4: CBCh Receive"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CBCH_RX_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ rf_power_capability_struct gsm900PowerClass;
+ rf_power_capability_struct gsm850PowerClass;
+ rf_power_capability_struct gsm480PowerClass;
+ rf_power_capability_struct gsm450PowerClass;
+ rf_power_capability_struct dcsPowerClass;
+ rf_power_capability_struct pcsPowerClass;
+ kal_bool imsi1_valid;
+ kal_uint16 imsi1_mod_1000;
+ kal_uint8 cbch_mode;
+} dps_cbch_rx_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[imsi1_valid] "Is there valid IMSI"
+@TRUE 1
+FALSE 0
+
+[imsi1_mod_1000] "IMSI modulo 1000"
+0~999
+@789
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[cbch_mode] "CBCH Receive Mode (Normal/Extended)"
+MPH_CBCH_MODE_NORMAL 1
+MPH_CBCH_MODE_EXTENDED 2
+@MPH_CBCH_ALL 3
diff --git a/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I5_LocUpdate.l1v b/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I5_LocUpdate.l1v
new file mode 100755
index 0000000..8a2c00d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I5_LocUpdate.l1v
@@ -0,0 +1,88 @@
+{ Validation }
+Title = "[6_2G_Idle]I5: Location Update Procedure"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_LOCATION_UPDATE_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN arfcn2nd;
+ ARFCN arfcn3rd;
+ rf_power_capability_struct gsm900PowerClass;
+ rf_power_capability_struct gsm850PowerClass;
+ rf_power_capability_struct gsm480PowerClass;
+ rf_power_capability_struct gsm450PowerClass;
+ rf_power_capability_struct dcsPowerClass;
+ rf_power_capability_struct pcsPowerClass;
+ kal_uint8 cbch_mode;
+} dps_location_update_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
diff --git a/mcu/service/dhl/database/l1validation_db/7_2G_Dedicated/dps_D1_MT_call.l1v b/mcu/service/dhl/database/l1validation_db/7_2G_Dedicated/dps_D1_MT_call.l1v
new file mode 100755
index 0000000..c7cfce3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/7_2G_Dedicated/dps_D1_MT_call.l1v
@@ -0,0 +1,104 @@
+{ Validation }
+Title = "[7_2G_Dedicated]D1: Mobile Terminated Call Setup"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_MT_CALL_REQ // will be defined in appropriate header file
+
+/* Early and Late assignment are handled automatically */
+/* Currently the ARFCN of the SDCCH and TCH/FACCH are not controlled from the script */
+/* ARFCNs assigned by the BTS are used by the DPS */
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN arfcn2nd;
+ ARFCN arfcn3rd;
+ rf_power_capability_struct gsm900PowerClass;
+ rf_power_capability_struct gsm850PowerClass;
+ rf_power_capability_struct gsm480PowerClass;
+ rf_power_capability_struct gsm450PowerClass;
+ rf_power_capability_struct dcsPowerClass;
+ rf_power_capability_struct pcsPowerClass;
+ kal_uint8 cbch_mode;
+} dps_location_update_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[arfcn2nd] "First Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@40
+[arfcn3rd] "Second Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@60
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+POWER_CLASS_2 1
+@POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+POWER_CLASS_2 1
+@POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+POWER_CLASS_2 1
+@POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
diff --git a/mcu/service/dhl/database/l1validation_db/7_2G_Dedicated/dps_D2_MO_call.l1v b/mcu/service/dhl/database/l1validation_db/7_2G_Dedicated/dps_D2_MO_call.l1v
new file mode 100755
index 0000000..8a4cd68
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/7_2G_Dedicated/dps_D2_MO_call.l1v
@@ -0,0 +1,104 @@
+{ Validation }
+Title = "[7_2G_Dedicated]D2: Mobile Originated Call Setup"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_MO_CALL_REQ // will be defined in appropriate header file
+
+/* Early and Late assignment are handled automatically */
+/* Currently the ARFCN of the SDCCH and TCH/FACCH are not controlled from the script */
+/* ARFCNs assigned by the BTS are used by the DPS */
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN arfcn2nd;
+ ARFCN arfcn3rd;
+ rf_power_capability_struct gsm900PowerClass;
+ rf_power_capability_struct gsm850PowerClass;
+ rf_power_capability_struct gsm480PowerClass;
+ rf_power_capability_struct gsm450PowerClass;
+ rf_power_capability_struct dcsPowerClass;
+ rf_power_capability_struct pcsPowerClass;
+ kal_uint8 cbch_mode;
+} dps_location_update_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[arfcn2nd] "First Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@40
+[arfcn3rd] "Second Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@60
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI10_CCCh_Pkt_Idle_SC_Test.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI10_CCCh_Pkt_Idle_SC_Test.l1v
new file mode 100755
index 0000000..c7d370b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI10_CCCh_Pkt_Idle_SC_Test.l1v
@@ -0,0 +1,113 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI10: CCCh Packet Idle Surrounding Cell BSIC+BCCH Decode"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_PKT_IDLE_SC_TEST_REQ // will be defined in appropriate header file
+
+/* DPS uses 2nd and 3rd strongest ARFCNs as the neighbor cell ARFCNs.
+ We can specify the neighbor cell ARFCNs from validation file by
+ making appropriate additions to the data structure below */
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN arfcn2nd;
+ ARFCN arfcn3rd;
+ rf_power_capability_struct gsm900PowerClass;
+ rf_power_capability_struct gsm850PowerClass;
+ rf_power_capability_struct gsm480PowerClass;
+ rf_power_capability_struct gsm450PowerClass;
+ rf_power_capability_struct dcsPowerClass;
+ rf_power_capability_struct pcsPowerClass;
+ kal_bool imsi1_valid;
+ kal_uint16 imsi1_mod_1000;
+ kal_uint8 cbch_mode;
+} dps_ccch_pkt_idle_sc_test_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[arfcn2nd] "First Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@40
+[arfcn3rd] "Second Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@60
+[imsi1_valid] "Is there valid IMSI"
+@TRUE 1
+FALSE 0
+
+[imsi1_mod_1000] "IMSI modulo 1000"
+0~999
+@789
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI11_CCChNCMeas.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI11_CCChNCMeas.l1v
new file mode 100755
index 0000000..26525e9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI11_CCChNCMeas.l1v
@@ -0,0 +1,47 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI11: NC Measurements in CCCh Pkt Idle(No Sleep)"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_NC_MEAS_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ ARFCN arfcnSpec;
+ kal_uint8 nc_reporting_period;
+ kal_uint8 nc_order;
+}dps_ccch_nc_meas_req_struct*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "ARFCN to camp on"
+0~124
+975~1023
+512~885
+128~251
+@20
+[nc_reporting_period] "NC Reporting period (coded)"
+0~7
+@0
+[nc_order] "Network Control Order"
+NC0 0
+@NC1 1
+NC2 2
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI12_CCChExtMeas.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI12_CCChExtMeas.l1v
new file mode 100755
index 0000000..af033ad
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI12_CCChExtMeas.l1v
@@ -0,0 +1,66 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI12: Extended and NC Measurements in CCCh Idle(No Sleep)"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_EXT_MEAS_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN ExtArfcn1;
+ ARFCN ExtArfcn2;
+ kal_uint16 ext_reporting_period;
+ kal_uint8 nc_reporting_period;
+ kal_uint8 nc_order;
+}dps_ccch_ext_meas_req_struct
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "ARFCN to camp on"
+0~124
+975~1023
+512~885
+128~251
+@20
+[ExtArfcn1] "First ARFCN for Ext measurements"
+0~124
+975~1023
+512~885
+128~251
+[ExtArfcn2] "Second ARFCN for Ext measurements"
+0~124
+975~1023
+512~885
+128~251
+@40
+[ext_reporting_period] "EXT Reporting period (seconds)"
+1~7680
+@1
+[nc_reporting_period] "NC Reporting period (coded)"
+0~7
+@0
+[nc_order] "Network Control Order"
+@NC0 0
+NC1 1
+NC2 2
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI13_CCCh_Gprs_Attach_One_Phase.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI13_CCCh_Gprs_Attach_One_Phase.l1v
new file mode 100755
index 0000000..95426f3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI13_CCCh_Gprs_Attach_One_Phase.l1v
@@ -0,0 +1,60 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI13, PT1~4: GPRS Attach on CCCh + One Phase Access for UL User Data(No Sleep)"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_GPRS_ATTACH_ONE_PHASE_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_bool RlcChanReq;
+ kal_bool AutoRepeat;
+ kal_bool InfiniteTBF;
+ kal_uint16 NumTestPdu;
+ kal_uint16 imsi1_mod_1000;
+}dps_ccch_gprs_attach_one_phase_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[AutoRepeat] "Repeat the Test"
+@FALSE 0
+TRUE 1
+
+[InfiniteTBF] "End TBF from MS side"
+@FALSE 1
+TRUE 0
+
+[NumTestPdu] "End after how many blocks"
+500~32000
+@500
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
+@789
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI14_CCCh_Gprs_Attach_Two_Phase.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI14_CCCh_Gprs_Attach_Two_Phase.l1v
new file mode 100755
index 0000000..fe472e5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI14_CCCh_Gprs_Attach_Two_Phase.l1v
@@ -0,0 +1,55 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI14: GPRS Attach on CCCh + Two Phase Access for UL User Data(No Sleep)"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_GPRS_ATTACH_TWO_PHASE_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_bool RlcChanReq;
+ kal_bool AutoRepeat;
+ kal_bool InfiniteTBF;
+ kal_uint16 NumTestPdu;
+}dps_ccch_gprs_attach_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[InfiniteTBF] "End TBF from MS side"
+@FALSE 1
+TRUE 0
+
+[NumTestPdu] "End after how many blocks"
+500~32000
+@500
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
+@789
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI15_PCCCh_Gprs_Attach_One_Phase.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI15_PCCCh_Gprs_Attach_One_Phase.l1v
new file mode 100755
index 0000000..73034bb
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI15_PCCCh_Gprs_Attach_One_Phase.l1v
@@ -0,0 +1,64 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI15, PT4~7: GPRS Attach on PCCCh + One Phase Access for UL User Data(No Sleep)"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_PCCCH_GPRS_ATTACH_ONE_PHASE_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_bool RlcChanReq;
+ kal_bool AutoRepeat;
+ kal_bool InfiniteTBF;
+ kal_uint16 NumTestPdu;
+ kal_uint16 imsi1_mod_1000;
+ kal_uint8 split_page_cycle;
+}dps_pccch_gprs_attach_one_phase_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[AutoRepeat] "Repeat the Test"
+@FALSE 0
+TRUE 1
+
+[InfiniteTBF] "End TBF from MS side"
+@FALSE 1
+TRUE 0
+
+[NumTestPdu] "End after how many blocks"
+500~32000
+@500
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
+@789
+[split_page_cycle] "Split Page Cycle"
+1~255
+@32
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI16_PCCCh_Gprs_Attach_Two_Phase.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI16_PCCCh_Gprs_Attach_Two_Phase.l1v
new file mode 100755
index 0000000..c747341
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI16_PCCCh_Gprs_Attach_Two_Phase.l1v
@@ -0,0 +1,60 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI16: GPRS Attach on PCCCh + Two Phase Access for UL User Data(No Sleep)"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_PCCCH_GPRS_ATTACH_TWO_PHASE_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_bool RlcChanReq;
+ kal_bool AutoRepeat;
+ kal_bool InfiniteTBF;
+ kal_uint16 NumTestPdu;
+ kal_uint16 imsi1_mod_1000;
+ kal_uint8 split_page_cycle;
+}dps_pccch_gprs_attach_two_phase_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[InfiniteTBF] "End TBF from MS side"
+@FALSE 1
+TRUE 0
+
+[NumTestPdu] "End after how many blocks"
+500~32000
+@500
+[split_page_cycle] "Split Page Cycle"
+1~255
+@32
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
+@789
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI17_CCCh_Egprs_Attach_One_Phase.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI17_CCCh_Egprs_Attach_One_Phase.l1v
new file mode 100755
index 0000000..c19c68c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI17_CCCh_Egprs_Attach_One_Phase.l1v
@@ -0,0 +1,59 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI17: EGPRS Attach on CCCh + One Phase Access"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_EGPRS_ATTACH_ONE_PHASE_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_bool RlcChanReq;
+ kal_bool AutoRepeat;
+ kal_bool InfiniteTBF;
+ kal_uint16 NumTestPdu;
+ kal_uint16 imsi1_mod_1000;
+}dps_ccch_gprs_attach_one_phase_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[AutoRepeat] "Repeat the Test"
+FALSE 0
+TRUE 1
+
+[InfiniteTBF] "End TBF from MS side"
+FALSE 1
+TRUE 0
+
+[NumTestPdu] "End after how many blocks"
+500~32000
+
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI19_CCCh_Egprs_Attach_Two_Phase.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI19_CCCh_Egprs_Attach_Two_Phase.l1v
new file mode 100755
index 0000000..74fa12e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI19_CCCh_Egprs_Attach_Two_Phase.l1v
@@ -0,0 +1,68 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI18~19, PT11~15(C): EGPRS Attach on CCCh + Two Phase Access"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_EGPRS_ATTACH_TWO_PHASE_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_bool RlcChanReq;
+ kal_bool AutoRepeat;
+ kal_bool InfiniteTBF;
+ kal_uint16 NumTestPdu;
+ kal_uint16 psModeA;
+ kal_bool isIRon;
+}dps_ccch_egprs_attach_two_phase_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+
+[bands] "Bands used for power scan"
+
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[InfiniteTBF] "End TBF from MS side"
+FALSE 1
+TRUE 0
+
+[NumTestPdu] "End after how many blocks"
+500~32000
+
+[egprsPCR] "EGPRS PCR exists?"
+TRUE 1
+FALSE 0
+
+[psModeA] "puncturingScheme(A)"
+PS1 1
+PS2 2
+PS3 3
+
+[isIRon] "IR"
+TRUE 1
+FALSE 0
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI1_CCCh_Pkt_Idle1.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI1_CCCh_Pkt_Idle1.l1v
new file mode 100755
index 0000000..92beab5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI1_CCCh_Pkt_Idle1.l1v
@@ -0,0 +1,44 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI1: Packet Idle on CCCh"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_PACKET_IDLE1_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_bool GprsMeasMode;
+}dps_ccch_packet_idle1_req_struct, dps_ccch_packet_idle2_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "ARFCN to camp on"
+0~124
+975~1023
+512~885
+128~251
+@20
+[GprsMeasMode] "Assume PMO/PCO Received (GPRS meas mode)"
+TRUE 1
+@FALSE 0
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI20_PCCCh_Egprs_Attach_One_Phase.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI20_PCCCh_Egprs_Attach_One_Phase.l1v
new file mode 100755
index 0000000..696cc82
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI20_PCCCh_Egprs_Attach_One_Phase.l1v
@@ -0,0 +1,42 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI20: EGPRS Attach on PCCCh + One Phase Access"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_PCCCH_EGPRS_ATTACH_ONE_PHASE_REQ // will be defined in appropriate header file
+
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[InfiniteTBF] "End TBF from MS side"
+FALSE 1
+TRUE 0
+
+[NumTestPdu] "End after how many blocks"
+500~32000
+
+[split_page_cycle] "Split Page Cycle"
+1~255
+
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI22_PCCCh_Egprs_Attach_Two_Phase.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI22_PCCCh_Egprs_Attach_Two_Phase.l1v
new file mode 100755
index 0000000..1b1d908
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI22_PCCCh_Egprs_Attach_Two_Phase.l1v
@@ -0,0 +1,54 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI21~22, PT11~15(P): EGPRS Attach on PCCCh + Two Phase Access"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_PCCCH_EGPRS_ATTACH_TWO_PHASE_REQ // will be defined in appropriate header file
+
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[InfiniteTBF] "End TBF from MS side"
+FALSE 1
+TRUE 0
+
+[NumTestPdu] "End after how many blocks"
+500~32000
+
+[split_page_cycle] "Split Page Cycle"
+1~255
+
+[egprsPCR] "EGPRS PCR exists?"
+TRUE 1
+FALSE 0
+
+[psModeA] "puncturingScheme(A)"
+PS1 1
+PS2 2
+PS3 3
+
+[isIRon] "IR"
+TRUE 1
+FALSE 0
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI2_CCCh_Pkt_Idle2.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI2_CCCh_Pkt_Idle2.l1v
new file mode 100755
index 0000000..188c795
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI2_CCCh_Pkt_Idle2.l1v
@@ -0,0 +1,44 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI2: Idle on CCCh then Packet Idle on CCCh"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_PACKET_IDLE2_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_bool GprsMeasMode;
+}dps_ccch_packet_idle1_req_struct, dps_ccch_packet_idle2_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "ARFCN to camp on"
+0~124
+975~1023
+512~885
+128~251
+@20
+[GprsMeasMode] "Assume PMO/PCO Received (GPRS meas mode)"
+TRUE 1
+@FALSE 0
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI3_CCCh_Idle_Read_Pbcch.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI3_CCCh_Idle_Read_Pbcch.l1v
new file mode 100755
index 0000000..0fe991f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI3_CCCh_Idle_Read_Pbcch.l1v
@@ -0,0 +1,53 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI3: Idle on CCCh then Read PBCCh"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_PACKET_IDLE_PBCCH_READ_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_uint8 PBCChMode;
+ kal_uint8 PBCCH_HR_Rate;
+}dps_ccch_packet_idle_pbcch_read_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "ARFCN to camp on"
+0~124
+975~1023
+512~885
+128~251
+@20
+[PBCChMode] "PBCCh Read Mode"
+@PBCChModeAll 1
+PBCChModePSI1Only 2
+PBCChModeHROnly 3
+PBCChModeLROnly 4
+PBCChModePSI1HR 5
+PBCChModePSI1LR 6
+
+[PBCCH_HR_Rate] "PBCCH HR Rate"
+1~16
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI4_PCCCh_Pkt_Idle.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI4_PCCCh_Pkt_Idle.l1v
new file mode 100755
index 0000000..161cbb5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI4_PCCCh_Pkt_Idle.l1v
@@ -0,0 +1,48 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI4: Packet Idle on PCCCh"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_PCCCH_PACKET_IDLE_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_uint8 split_page_cycle;
+ kal_uint16 imsi1_mod_1000;
+}dps_pccch_packet_idle_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "ARFCN to camp on"
+0~124
+975~1023
+512~885
+128~251
+@20
+[split_page_cycle] "Split Page Cycle value"
+1~255
+@32
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
+@789
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI5_PCCCh_Pkt_Idle_Pbcch_Update.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI5_PCCCh_Pkt_Idle_Pbcch_Update.l1v
new file mode 100755
index 0000000..3889f77
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI5_PCCCh_Pkt_Idle_Pbcch_Update.l1v
@@ -0,0 +1,48 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI5: Packet Idle on PCCCh + PBCCh update"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_PCCCH_PACKET_IDLE_PBCCH_UPDATE_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_uint8 split_page_cycle;
+ kal_uint16 imsi1_mod_1000;
+}dps_pccch_packet_idle_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "ARFCN to camp on"
+0~124
+975~1023
+512~885
+128~251
+@20
+[split_page_cycle] "Split Page Cycle value"
+1~255
+@32
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
+@789
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI6_PCCCh_Pkt_Idle_SC_Test.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI6_PCCCh_Pkt_Idle_SC_Test.l1v
new file mode 100755
index 0000000..4fd0cb4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI6_PCCCh_Pkt_Idle_SC_Test.l1v
@@ -0,0 +1,67 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI6: Packet Idle on PCCCh + Neighbor Cell BSIC and BCCH"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_PCCCH_PKT_IDLE_SC_TEST_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN arfcn2nd;
+ ARFCN arfcn3rd;
+ kal_uint8 split_page_cycle;
+ kal_uint8 nc_reporting_period;
+ kal_uint8 nc_order;
+} dps_pccch_pkt_idle_sc_test_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "ARFCN to camp on"
+0~124
+975~1023
+512~885
+128~251
+@20
+[arfcn2nd] "First Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@40
+[arfcn3rd] "Second Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@60
+[split_page_cycle] "Split Page Cycle value"
+1~255
+@32
+[nc_reporting_period] "NC Meas Reporting Period"
+0~7
+@0
+[nc_order] "NC Order"
+@NC0 0
+NC1 1
+NC2 2
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI7_PCCCh_Pkt_Idle_SC_Test_Pbcch_Update.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI7_PCCCh_Pkt_Idle_SC_Test_Pbcch_Update.l1v
new file mode 100755
index 0000000..fd09674
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI7_PCCCh_Pkt_Idle_SC_Test_Pbcch_Update.l1v
@@ -0,0 +1,67 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI7: Packet Idle on PCCCh + Neighbor BSIC/BCCH + Serving PBCCh Update"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_PCCCH_PKT_IDLE_SC_TEST_PBCCH_UPDATE_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN arfcn2nd;
+ ARFCN arfcn3rd;
+ kal_uint8 split_page_cycle;
+ kal_uint8 nc_reporting_period;
+ kal_uint8 nc_order;
+}dps_pccch_pkt_idle_sc_test_pbcch_update_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "ARFCN to camp on"
+0~124
+975~1023
+512~885
+128~251
+@20
+[arfcn2nd] "First Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@40
+[arfcn3rd] "Second Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@60
+[split_page_cycle] "Split Page Cycle value"
+1~255
+@32
+[nc_reporting_period] "NC Meas Reporting Period"
+0~7
+@0
+[nc_order] "NC Order"
+@NC0 0
+NC1 1
+NC2 2
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI8_PCCCh_NCMeas.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI8_PCCCh_NCMeas.l1v
new file mode 100755
index 0000000..fd54d0a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI8_PCCCh_NCMeas.l1v
@@ -0,0 +1,53 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI8: NC Measurements in PCCCh Pkt Idle(No Sleep)"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_PCCCH_PKT_IDLE_NC_MEAS_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_uint8 split_page_cycle;
+ kal_uint8 nc_reporting_period;
+ kal_uint8 nc_order;
+}dps_pccch_pkt_idle_nc_meas_req_struct
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "ARFCN to camp on"
+0~124
+975~1023
+512~885
+128~251
+@20
+[split_page_cycle] "Split Page Cycle"
+1~255
+@32
+[nc_reporting_period] "NC Reporting period (coded)"
+0~7
+@0
+[nc_order] "Network Control Order"
+NC0 0
+@NC1 1
+NC2 2
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI9_PCCCh_ExtMeas.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI9_PCCCh_ExtMeas.l1v
new file mode 100755
index 0000000..8efc8d7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI9_PCCCh_ExtMeas.l1v
@@ -0,0 +1,71 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI9: Extended and NC Measurements in PCCCh Idle(No Sleep)"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_PCCCH_EXT_MEAS_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN ExtArfcn1;
+ ARFCN ExtArfcn2;
+ kal_uint8 split_page_cycle;
+ kal_uint16 ext_reporting_period;
+ kal_uint8 nc_reporting_period;
+ kal_uint8 nc_order;
+}dps_pccch_ext_meas_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "ARFCN to camp on"
+0~124
+975~1023
+512~885
+128~251
+@20
+[ExtArfcn1] "First ARFCN for Ext measurements"
+0~124
+975~1023
+512~885
+128~251
+@40
+[ExtArfcn2] "Second ARFCN for Ext measurements"
+0~124
+975~1023
+512~885
+128~251
+@60
+[split_page_cycle] "Split Page Cycle"
+1~255
+@32
+[ext_reporting_period] "EXT Reporting period (seconds)"
+1~7680
+@1
+[nc_reporting_period] "NC Reporting period (coded)"
+0~7
+@0
+[nc_order] "Network Control Order"
+@NC0 0
+NC1 1
+NC2 2
diff --git a/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT10-1_CCCh_Nbr_PBCCh_Update_During_TBF.l1v b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT10-1_CCCh_Nbr_PBCCh_Update_During_TBF.l1v
new file mode 100755
index 0000000..ffefa98
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT10-1_CCCh_Nbr_PBCCh_Update_During_TBF.l1v
@@ -0,0 +1,56 @@
+{ Validation }
+Title = "[9_2G_Pkt_Transfer]PT10-1: Neighbor PBCCh Update During TBF (No PBCCh in Serving Cell)(No Sleep)"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_NBR_PSI_UPDATE_DURING_TBF_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN arfcn2nd;
+ kal_bool RlcChanReq;
+ kal_bool AutoRepeat;
+ kal_bool InfiniteTBF;
+ kal_uint16 NumTestPdu;
+ kal_uint16 imsi1_mod_1000;
+}dps_ccch_nbr_psi_update_during_tbf_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[arfcn2nd] "Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@40
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
+@789
diff --git a/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT10-2_PCCCh_Nbr_PBCCh_Update_During_TBF.l1v b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT10-2_PCCCh_Nbr_PBCCh_Update_During_TBF.l1v
new file mode 100755
index 0000000..6e726ca
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT10-2_PCCCh_Nbr_PBCCh_Update_During_TBF.l1v
@@ -0,0 +1,60 @@
+{ Validation }
+Title = "[9_2G_Pkt_Transfer]PT10-2: Neighbor PBCCh Update During TBF (PBCCh in Serving Cell)(No Sleep)"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_PCCCH_NBR_PSI_UPDATE_DURING_TBF_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN arfcn2nd;
+ kal_bool RlcChanReq;
+ kal_bool AutoRepeat;
+ kal_bool InfiniteTBF;
+ kal_uint16 NumTestPdu;
+ kal_uint16 imsi1_mod_1000;
+ kal_uint8 split_page_cycle;
+}dps_pccch_nbr_psi_update_during_tbf_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[arfcn2nd] "Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@40
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
+@789
+[split_page_cycle] "Split Page Cycle"
+1~255
+@32
diff --git a/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT11_CCCh_ICMP.l1v b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT11_CCCh_ICMP.l1v
new file mode 100755
index 0000000..3655b1f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT11_CCCh_ICMP.l1v
@@ -0,0 +1,44 @@
+{ Validation }
+Title = "[9_2G_Pkt_Transfer]PT11: GPRS Attach on CCCh + Ping functionality"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_ICMP_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_uint16 imsi1_mod_1000;
+}dps_ccch_icmp_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
diff --git a/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT12_CCCh_nonSignaling.l1v b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT12_CCCh_nonSignaling.l1v
new file mode 100755
index 0000000..48d8c6c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT12_CCCh_nonSignaling.l1v
@@ -0,0 +1,50 @@
+{ Validation }
+Title = "[9_2G_Pkt_Transfer]PT12: GPRS Non-Signaling Test"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_GPRS_NONSIGNALING_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_uint8 timeSlot;
+ kal_uint8 tsc
+}dps_ccch_gprs_nonsignaling_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+
+[arfcnSpec] "BCCH ARFCN / PDTCH ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[timeSlot] "Time slot"
+0~7
+
+[tsc] "TSC"
+0~7
+
diff --git a/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT16_CCCH_Egprs_TBF_NBCCH_Req.l1v b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT16_CCCH_Egprs_TBF_NBCCH_Req.l1v
new file mode 100755
index 0000000..5f1c6e0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT16_CCCH_Egprs_TBF_NBCCH_Req.l1v
@@ -0,0 +1,67 @@
+{ Validation }
+Title = "[9_2G_Pkt_Transfer]PT16(C): BCCh+PTCCh+NBCCh during EGPRS TBF"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_EGPRS_TBF_NBCCH_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_bool RlcChanReq;
+ kal_bool AutoRepeat;
+ kal_bool InfiniteTBF;
+ kal_uint16 NumTestPdu;
+ ARFCN arfcn2nd;
+ ARFCN arfcn3rd;
+ kal_uint8 nc_order;
+ kal_uint8 nc_reporting_period_T;
+ kal_bool isIRon;
+}dps_ccch_tbf_sc_test_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+
+[bands] "Bands used for power scan"
+
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[arfcn2nd] "First Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[arfcn3rd] "Second Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[isIRon] "IR"
+TRUE 1
+FALSE 0
diff --git a/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT17_CCCH_Egprs_TBF_NPBCCH_Req.l1v b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT17_CCCH_Egprs_TBF_NPBCCH_Req.l1v
new file mode 100755
index 0000000..60aceeb
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT17_CCCH_Egprs_TBF_NPBCCH_Req.l1v
@@ -0,0 +1,68 @@
+{ Validation }
+Title = "[9_2G_Pkt_Transfer]PT17(C): BCCh+PTCCh+NBCCh+NPBCCh during EGPRS TBF"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_EGPRS_TBF_NPBCCH_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN arfcn2nd;
+ kal_bool RlcChanReq;
+ kal_bool AutoRepeat;
+ kal_bool InfiniteTBF;
+ kal_uint16 NumTestPdu;
+ kal_uint16 imsi1_mod_1000;
+ kal_bool isIRon;
+}dps_ccch_nbr_psi_update_during_tbf_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+
+[bands] "Bands used for power scan"
+
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[arfcn2nd] "First Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[arfcn3rd] "Second Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
+
+[isIRon] "IR"
+TRUE 1
+FALSE 0
diff --git a/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT18_PCCCh_Egprs_TBF_NPBCCH_Req.l1v b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT18_PCCCh_Egprs_TBF_NPBCCH_Req.l1v
new file mode 100755
index 0000000..623e58f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT18_PCCCh_Egprs_TBF_NPBCCH_Req.l1v
@@ -0,0 +1,71 @@
+{ Validation }
+Title = "[9_2G_Pkt_Transfer]PT18(P): PBCCh+PTCCh+NBCCh+NPBCCh during EGPRS TBF"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_PCCCH_EGPRS_TBF_NPBCCH_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN arfcn2nd;
+ kal_bool RlcChanReq;
+ kal_bool AutoRepeat;
+ kal_bool InfiniteTBF;
+ kal_uint16 NumTestPdu;
+ kal_uint16 imsi1_mod_1000;
+ kal_uint8 split_page_cycle;
+ kal_bool isIRon;
+}dps_pccch_nbr_psi_update_during_tbf_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[arfcn2nd] "First Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[arfcn3rd] "Second Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
+
+[split_page_cycle] "Split Page Cycle"
+1~255
+
+[isIRon] "IR"
+TRUE 1
+FALSE 0
diff --git a/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT8_Serving_PBCCh_Update_During_TBF.l1v b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT8_Serving_PBCCh_Update_During_TBF.l1v
new file mode 100755
index 0000000..d87c14e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT8_Serving_PBCCh_Update_During_TBF.l1v
@@ -0,0 +1,53 @@
+{ Validation }
+Title = "[9_2G_Pkt_Transfer]PT8: Serving PBCCh Update During TBF(No Sleep)"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_SERVING_PBCCH_UPDATE_DURING_TBF_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_bool RlcChanReq;
+ kal_bool AutoRepeat;
+ kal_bool InfiniteTBF;
+ kal_uint16 NumTestPdu;
+ kal_uint16 imsi1_mod_1000;
+ kal_uint8 split_page_cycle;
+}dps_serving_pbcch_update_during_tbf_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
+@789
+[split_page_cycle] "Split Page Cycle"
+1~255
+@32
diff --git a/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT9_CCCh_TBF_SC_Test.l1v b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT9_CCCh_TBF_SC_Test.l1v
new file mode 100755
index 0000000..2197668
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT9_CCCh_TBF_SC_Test.l1v
@@ -0,0 +1,70 @@
+{ Validation }
+Title = "[9_2G_Pkt_Transfer]PT9: GPRS Attach on CCCh + Neighbor BSIC and BCCH during TBF(No Sleep)"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_TBF_SC_TEST_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_bool RlcChanReq;
+ kal_bool AutoRepeat;
+ kal_bool InfiniteTBF;
+ kal_uint16 NumTestPdu;
+ ARFCN arfcn2nd;
+ ARFCN arfcn3rd;
+ kal_uint8 nc_order;
+ kal_uint8 nc_reporting_period_T;
+
+}dps_ccch_tbf_sc_test_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[arfcn2nd] "First Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@40
+[arfcn3rd] "Second Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@60
+[nc_order] "NC Measurement Order"
+@NC0 0
+NC1 1
+NC2 2
+
+[nc_reporting_period_T] "NC measurement reporting period (TBF)"
+1~255
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/L1ModMsg.chk b/mcu/service/dhl/database/l1validation_db/L1ModMsg.chk
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/L1ModMsg.chk
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_01.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_01.l1v
new file mode 100644
index 0000000..3653c86
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_01.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_01: Handover test: FDD intra-band contiguous CA (PCC-SCC swap)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_ca_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_02.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_02.l1v
new file mode 100644
index 0000000..5ed9946
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_02.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_02: Handover test: FDD intra-band contiguous CA (SCC release)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_ca_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_03.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_03.l1v
new file mode 100644
index 0000000..c463dc9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_03.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_03: Handover test: FDD intra-band contiguous CA (SCC no change)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_ca_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_04.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_04.l1v
new file mode 100644
index 0000000..a6df94d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_04.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_04: Handover test: FDD intra-band contiguous CA (SCC change)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_ca_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_05.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_05.l1v
new file mode 100644
index 0000000..48439c2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_05.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_05: Handover test: FDD inter-band contiguous CA (PCC-SCC swap)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_05
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_ca_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_06.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_06.l1v
new file mode 100644
index 0000000..d201af6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_06.l1v
@@ -0,0 +1,32 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_06: Handover test: FDD inter-band contiguous CA (SCC release)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_06
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_handover_ca_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_07.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_07.l1v
new file mode 100644
index 0000000..59b0331
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_07.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_07: Handover test: FDD inter-band contiguous CA (SCC no change)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_07
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_ca_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_08.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_08.l1v
new file mode 100644
index 0000000..f7973a9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_08.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_08: Handover test: FDD inter-band contiguous CA (SCC change)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_08
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_ca_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_09.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_09.l1v
new file mode 100644
index 0000000..c811ffe
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_09.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_09: Handover test: FDD intra-band non-contiguous CA (PCC-SCC swap)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_09
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_ca_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_10.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_10.l1v
new file mode 100644
index 0000000..3af66a2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_10.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_10: Handover test: FDD intra-band non-contiguous CA (SCC release)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_10
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_ca_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_11.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_11.l1v
new file mode 100644
index 0000000..50314b1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_11.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_11: Handover test: FDD intra-band non-contiguous CA (SCC no change)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_11
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_ca_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_12.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_12.l1v
new file mode 100644
index 0000000..92583d7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_12.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_12: Handover test: FDD intra-band non-contiguous CA (SCC change)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_12
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_ca_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_13.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_13.l1v
new file mode 100644
index 0000000..007c10c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_13.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_13: Handover test: TDD intra-band contiguous CA (PCC-SCC swap)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_13
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_handover_ca_13_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@5
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_14.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_14.l1v
new file mode 100644
index 0000000..1a4de3b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_14.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_14: Handover test: TDD intra-band contiguous CA (SCC release)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_14
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_handover_ca_14_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@5
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_15.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_15.l1v
new file mode 100644
index 0000000..25b8366
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_15.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_15: Handover test: TDD intra-band contiguous CA (SCC no change)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_15
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_handover_ca_15_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@5
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_16.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_16.l1v
new file mode 100644
index 0000000..184d63b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_16.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_16: Handover test: TDD intra-band contiguous CA (SCC change)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_16
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_handover_ca_16_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_17.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_17.l1v
new file mode 100644
index 0000000..0e3db23
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_17.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_17: Handover test: TDD inter-band contiguous CA (PCC-SCC swap)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_17
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_handover_ca_17_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_18.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_18.l1v
new file mode 100644
index 0000000..a2f6526
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_18.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_18: Handover test: TDD inter-band contiguous CA (SCC release)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_18
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_handover_ca_18_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_19.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_19.l1v
new file mode 100644
index 0000000..501d62a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_19.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_19: Handover test: TDD inter-band contiguous CA (SCC no change)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_19
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_handover_ca_19_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_20.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_20.l1v
new file mode 100644
index 0000000..6024868
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_20.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_20: Handover test: TDD inter-band contiguous CA (SCC change)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_20
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_handover_ca_20_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_21.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_21.l1v
new file mode 100644
index 0000000..eb37bd9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_21.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_21: Handover test: TDD intra-band non-contiguous CA (PCC-SCC swap)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_21
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_handover_ca_21_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_22.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_22.l1v
new file mode 100644
index 0000000..3e95055
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_22.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_22: Handover test: TDD intra-band non-contiguous CA (SCC release)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_22
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_handover_ca_22_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_23.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_23.l1v
new file mode 100644
index 0000000..119feea
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_23.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_23: Handover test: TDD intra-band non-contiguous CA (SCC no change)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_23
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_handover_ca_23_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@5
+
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_24.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_24.l1v
new file mode 100644
index 0000000..eb6ebf4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_24.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_24: Handover test: TDD intra-band non-contiguous CA (SCC change)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_24
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_handover_ca_24_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@5
+
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_25.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_25.l1v
new file mode 100644
index 0000000..b733b83
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_25.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_25: Handover test for TDD inter-band CA (PCELL and SCELL have different UDC + PCC-SCC swap)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_25
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_handover_ca_25_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@16005
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_MBMS_MCCH_01.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_MBMS_MCCH_01.l1v
new file mode 100644
index 0000000..6e70f8a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_MBMS_MCCH_01.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_MBMS_MCCH_01: MCCH change test of MBMS in SCH mode with CA (FDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MBMS_MCCH_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_mbms_mcch_01_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~1
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_MBMS_MCCH_02.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_MBMS_MCCH_02.l1v
new file mode 100644
index 0000000..46f3646
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_MBMS_MCCH_02.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_MBMS_MCCH_02: MCCH change test of MBMS in SCH mode with CA (TDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MBMS_MCCH_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_mbms_mcch_02_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@26265
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_RLM_eICIC_01.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_RLM_eICIC_01.l1v
new file mode 100644
index 0000000..488bb84
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_RLM_eICIC_01.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_RLM_eICIC_01: Radio link monitoring with measSubframePattern for out-of-sync (FDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_EICIC_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_rlm_eicic_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_RLM_eICIC_02.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_RLM_eICIC_02.l1v
new file mode 100644
index 0000000..7c67940
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_RLM_eICIC_02.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_RLM_eICIC_02: Radio link monitoring with measSubframePattern for out-of-sync (TDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_EICIC_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_rlm_eicic_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@16165
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_TX_RATYPE1_01.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_TX_RATYPE1_01.l1v
new file mode 100644
index 0000000..4a857fc
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_TX_RATYPE1_01.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_TX_RATYPE1_01: Uplink resource multicluster by ra type1 (FDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TX_RATYPE1_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_tx_ratype1_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_TX_RATYPE1_02.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_TX_RATYPE1_02.l1v
new file mode 100644
index 0000000..bf6814b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_TX_RATYPE1_02.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_TX_RATYPE1_02: Uplink resource multicluster by ra type1 (TDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TX_RATYPE1_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_tx_ratype1_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_TX_SIMULT_01.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_TX_SIMULT_01.l1v
new file mode 100644
index 0000000..d1d3b04
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_TX_SIMULT_01.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_TX_SIMULT_01: Simultaneous PUCCH and PUSCH (FDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TX_SIMULT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_tx_simult_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_TX_SIMULT_02.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_TX_SIMULT_02.l1v
new file mode 100644
index 0000000..d2b7489
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_TX_SIMULT_02.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_TX_SIMULT_02: Simultaneous PUCCH and PUSCH (TDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TX_SIMULT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_tx_simult_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_01.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_01.l1v
new file mode 100644
index 0000000..4332d4f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_01: Deactivated SCELL intra-freq measurement with non-DRX/DRX (FDD intra-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_ca_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~10
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_02.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_02.l1v
new file mode 100644
index 0000000..191239c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_02: Activated SCELL intra-freq measurement with non-DRX/DRX (FDD intra-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_ca_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~10
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_03.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_03.l1v
new file mode 100644
index 0000000..a73dc47
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_03: Deactivated SCELL intra-freq measurement with PCELL interruption in non-DRX/DRX (FDD intra-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_ca_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~10
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_04.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_04.l1v
new file mode 100644
index 0000000..794f44e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_04: Activated SCELL intra-freq measurement with PCELL interruption in non-DRX/DRX (FDD intra-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_ca_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~10
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_05.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_05.l1v
new file mode 100644
index 0000000..af2318d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_05: Deactivated SCELL intra-freq measurement with non-DRX/DRX (FDD inter-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_ca_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~10
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_06.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_06.l1v
new file mode 100644
index 0000000..b6648b2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_06: Activated SCELL intra-freq measurement with non-DRX/DRX (FDD inter-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_ca_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~10
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_07.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_07.l1v
new file mode 100644
index 0000000..601497f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_07: Deactivated SCELL intra-freq measurement with PCELL interruption in non-DRX/DRX (FDD inter-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_ca_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~10
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_08.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_08.l1v
new file mode 100644
index 0000000..58eda5b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_08: Activated SCELL intra-freq measurement with PCELL interruption in non-DRX/DRX (FDD inter-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_ca_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~10
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_09.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_09.l1v
new file mode 100644
index 0000000..f8d37f8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_09.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_09: Deactivated SCELL intra-freq measurement with non-DRX/DRX (TDD intra-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_measurement_ca_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616165
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_10.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_10.l1v
new file mode 100644
index 0000000..aa7013b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_10.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_10: Activated SCELL intra-freq measurement with non-DRX/DRX (TDD intra-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_measurement_ca_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616165
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_11.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_11.l1v
new file mode 100644
index 0000000..ba15e8b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_11.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_11: Deactivated SCELL intra-freq measurement with PCELL interruption in non-DRX/DRX (TDD intra-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_measurement_ca_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616165
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_12.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_12.l1v
new file mode 100644
index 0000000..f765d37
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_12.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_12: Activated SCELL intra-freq measurement with PCELL interruption in non-DRX/DRX (TDD intra-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_measurement_ca_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616165
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_13.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_13.l1v
new file mode 100644
index 0000000..fb8459d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_13.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_13: Deactivated SCELL intra-freq measurement with non-DRX/DRX (TDD inter-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_13
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_measurement_ca_13_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616165
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_14.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_14.l1v
new file mode 100644
index 0000000..37f16e0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_14.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_14: Activated SCELL intra-freq measurement with non-DRX/DRX (TDD inter-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_14
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_measurement_ca_14_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616165
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_15.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_15.l1v
new file mode 100644
index 0000000..1fdea27
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_15.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_15: Deactivated SCELL intra-freq measurement with PCELL interruption in non-DRX/DRX (TDD inter-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_15
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_measurement_ca_15_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616165
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_16.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_16.l1v
new file mode 100644
index 0000000..58cb3b2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_16.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_16: Activated SCELL intra-freq measurement with PCELL interruption in non-DRX/DRX (TDD inter-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_16
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_measurement_ca_16_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616165
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_17.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_17.l1v
new file mode 100644
index 0000000..b27b683
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_17.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_17: Deactivated SCELL intra-freq measurement with non-DRX/DRX (TDD inter-band CA + PCELL and SCELL have different UDC)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_17
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_measurement_ca_17_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616005
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_18.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_18.l1v
new file mode 100644
index 0000000..26bcce3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_18.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_18: Activated SCELL intra-freq measurement with non-DRX/DRX (TDD inter-band CA + PCELL and SCELL have different UDC)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_18
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_measurement_ca_18_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616005
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_19.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_19.l1v
new file mode 100644
index 0000000..3832dc0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_19.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_19: Deactivated SCELL intra-freq measurement with PCELL interruption in non-DRX/DRX (TDD inter-band CA + PCELL and SCELL have different UDC)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_19
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_measurement_ca_19_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616005
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_20.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_20.l1v
new file mode 100644
index 0000000..a36dafe
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_20.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_20: Activated SCELL intra-freq measurement with PCELL interruption in non-DRX/DRX (TDD inter-band CA + PCELL and SCELL have different UDC)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_20
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_measurement_ca_20_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616005
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_eicic_01.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_eicic_01.l1v
new file mode 100644
index 0000000..68c318c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_eicic_01.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_eICIC_01: Intra-freq measurement with measSubframePattern (FDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEAS_EICIC_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_meas_eicic_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_eicic_02.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_eicic_02.l1v
new file mode 100644
index 0000000..a8e83f8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_eicic_02.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_eICIC_02: Intra-freq measurement with measSubframePattern (TDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEAS_EICIC_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_meas_eicic_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@16165
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_01.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_01.l1v
new file mode 100644
index 0000000..119c3fc
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_01.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R11_LTE][06_TRX]SCH_TRX_CA_01: Cross carrier scheduling test of FDD intra-band contiguous CA"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_CA_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_trx_ca_01_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~1
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_02.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_02.l1v
new file mode 100644
index 0000000..f4f5129
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_02.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R11_LTE][06_TRX]SCH_TRX_CA_02: Cross carrier scheduling test of FDD inter-band CA"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_CA_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_trx_ca_02_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~1
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_03.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_03.l1v
new file mode 100644
index 0000000..5c4d4fd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_03.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R11_LTE][06_TRX]SCH_TRX_CA_03: Cross carrier scheduling test of TDD intra-band contiguous CA"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_CA_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_trx_ca_03_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_04.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_04.l1v
new file mode 100644
index 0000000..588da5d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_04.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R11_LTE][06_TRX]SCH_TRX_CA_04: Cross carrier scheduling test of TDD inter-band CA"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_CA_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_trx_ca_04_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_05.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_05.l1v
new file mode 100644
index 0000000..8df5d85
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_05.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R11_LTE][06_TRX]SCH_TRX_CA_05: Cross carrier scheduling test of TDD inter-band CA (PCELL and SCELL have different UDC)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_CA_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_trx_ca_05_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@16005
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_06.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_06.l1v
new file mode 100644
index 0000000..d60c28a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_06.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R11_LTE][06_TRX]SCH_TRX_CA_06: Non-cross carrier scheduling test of FDD inter-band CA"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_CA_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_trx_ca_06_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~1
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_07.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_07.l1v
new file mode 100644
index 0000000..76779e2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_07.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R11_LTE][06_TRX]SCH_TRX_CA_07: Non-cross carrier scheduling test of TDD inter-band CA"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_CA_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_trx_ca_07_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL1UL/2DL1UL_basic_01.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL1UL/2DL1UL_basic_01.l1v
new file mode 100644
index 0000000..4eb1a48
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL1UL/2DL1UL_basic_01.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL1UL]2DL1UL_basic_01: Add FDD SCell, non-blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL1UL_BASIC_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl1ul_basic_01_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@160
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL1UL/2DL1UL_basic_02.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL1UL/2DL1UL_basic_02.l1v
new file mode 100644
index 0000000..80467ad
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL1UL/2DL1UL_basic_02.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL1UL]2DL1UL_basic_02: Add TDD SCell, non-blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL1UL_BASIC_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl1ul_basic_02_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@160
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_05.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_05.l1v
new file mode 100644
index 0000000..3bad262
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_05.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_fdd_basic_05: Add and activate 2 Scells UL-CA, non-blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_FDD_BASIC_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_fdd_basic_05_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_06.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_06.l1v
new file mode 100644
index 0000000..300c731
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_06.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_fdd_basic_06: Add and activate 2 Scells UL-CA, blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_FDD_BASIC_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_fdd_basic_06_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_07.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_07.l1v
new file mode 100644
index 0000000..b6119b6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_07.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_fdd_basic_07: Add and activate Scell UL-CA"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_FDD_BASIC_07
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_fdd_basic_07_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label shown on the GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_08.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_08.l1v
new file mode 100644
index 0000000..030057e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_08.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_fdd_basic_08: Scell (ULCA) added and activated, with RA procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_FDD_BASIC_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_fdd_basic_08_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_09.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_09.l1v
new file mode 100644
index 0000000..dd9e7d7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_09.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_fdd_basic_09: Scell (ULCA) added and activated, SRS only"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_FDD_BASIC_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_fdd_basic_09_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_10.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_10.l1v
new file mode 100644
index 0000000..c67662e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_10.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_fdd_basic_10: Scell (ULCA) added and activated, PUSCH and SRS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_FDD_BASIC_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_fdd_basic_10_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_11.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_11.l1v
new file mode 100644
index 0000000..44ef201
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_11.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_fdd_basic_11: Scell (ULCA) added and activated, HARQ as only UCI"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_FDD_BASIC_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_fdd_basic_11_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_12.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_12.l1v
new file mode 100644
index 0000000..0f118e5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_12.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_fdd_basic_12: Add and activate Scell UL-CA, periodic CSI as only UCI"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_FDD_BASIC_12
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_fdd_basic_12_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label shown on the GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_13.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_13.l1v
new file mode 100644
index 0000000..4361c52
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_13.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_fdd_basic_13: Add and activate Scell UL-CA, aperiodic CSI as only UCI"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_FDD_BASIC_13
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_fdd_basic_13_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label shown on the GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_05.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_05.l1v
new file mode 100644
index 0000000..918697f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_05.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_tdd_basic_05: Add and activate 2 Scells UL-CA, non-blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_TDD_BASIC_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_tdd_basic_05_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@16160
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_06.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_06.l1v
new file mode 100644
index 0000000..fb4c8ba
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_06.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_tdd_basic_06: Add and activate 2 Scells UL-CA, blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_TDD_BASIC_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_tdd_basic_06_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@16160
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_08.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_08.l1v
new file mode 100644
index 0000000..575596b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_08.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_tdd_basic_08: Scell (ULCA) added and activated, with RA procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_TDD_BASIC_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_tdd_basic_08_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@16160
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_09.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_09.l1v
new file mode 100644
index 0000000..65a2d4b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_09.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_tdd_basic_09: Scell (ULCA) added and activated, SRS only"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_TDD_BASIC_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_tdd_basic_09_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@21215
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_10.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_10.l1v
new file mode 100644
index 0000000..0d921e7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_10.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_tdd_basic_10: Scell (ULCA) added and activated, PUSCH and SRS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_TDD_BASIC_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_tdd_basic_10_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@21215
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_11.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_11.l1v
new file mode 100644
index 0000000..add92d6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_11.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_tdd_basic_11: Scell (ULCA) added and activated, HARQ as only UCI"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_TDD_BASIC_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_tdd_basic_11_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@16160
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_basic_01.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_basic_01.l1v
new file mode 100644
index 0000000..5c1d463
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_basic_01.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][3DL1UL]3DL1UL_basic_01: Add and activate 2 Scells, non-blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_3DL1UL_BASIC_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_3dl1ul_basic_01_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_basic_01_1.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_basic_01_1.l1v
new file mode 100644
index 0000000..9509c12
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_basic_01_1.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][3DL1UL]3DL1UL_basic_01_1: Add and activate 2 Scells, non-blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_3DL1UL_BASIC_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_3dl1ul_basic_01_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_fdd_basic_3.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_fdd_basic_3.l1v
new file mode 100644
index 0000000..825bcbc
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_fdd_basic_3.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][3DL1UL]3DL1UL_fdd_basic_03: Add and activate 2 Scells, non-blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_3DL1UL_FDD_BASIC
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_3dl1ul_fdd_basic_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_fdd_basic_4.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_fdd_basic_4.l1v
new file mode 100644
index 0000000..77ba4e9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_fdd_basic_4.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][3DL1UL]3DL1UL_fdd_basic_04: Add and activate 2 Scells, blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_3DL1UL_FDD_BASIC
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_3dl1ul_fdd_basic_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_tdd_basic_3.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_tdd_basic_3.l1v
new file mode 100644
index 0000000..21edd5d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_tdd_basic_3.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][3DL1UL]3DL1UL_tdd_basic_03: Add and activate 2 Scells, non-blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_3DL1UL_TDD_BASIC
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_3dl1ul_tdd_basic_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616163
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_tdd_basic_4.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_tdd_basic_4.l1v
new file mode 100644
index 0000000..f073918
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_tdd_basic_4.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][3DL1UL]3DL1UL_tdd_basic_04: Add and activate 2 Scells, blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_3DL1UL_TDD_BASIC
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_3dl1ul_tdd_basic_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616164
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL2UL/3DL2UL_fdd_basic_14.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL2UL/3DL2UL_fdd_basic_14.l1v
new file mode 100644
index 0000000..944cb97
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL2UL/3DL2UL_fdd_basic_14.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][3DL2UL]3DL2UL_fdd_basic_14: Add and activate 2 Scells UL-CA, non-blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_3DL2UL_FDD_BASIC_14
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_3dl2ul_fdd_basic_14_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL2UL/3DL2UL_fdd_basic_15.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL2UL/3DL2UL_fdd_basic_15.l1v
new file mode 100644
index 0000000..bdf42e0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL2UL/3DL2UL_fdd_basic_15.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][3DL2UL]3DL2UL_fdd_basic_15: Add and activate 2 Scells UL-CA, blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_3DL2UL_FDD_BASIC_15
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_3dl2ul_fdd_basic_15_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL2UL/3DL2UL_tdd_fdd_basic_14.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL2UL/3DL2UL_tdd_fdd_basic_14.l1v
new file mode 100644
index 0000000..34d3166
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL2UL/3DL2UL_tdd_fdd_basic_14.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][3DL2UL]3DL2UL_tdd_fdd_basic_14: Add and activate 2 Scells UL-CA, non-blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_3DL2UL_TDD_FDD_BASIC_14
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_3dl2ul_tdd_fdd_basic_14_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1600000
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL2UL/3DL2UL_tdd_fdd_basic_15.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL2UL/3DL2UL_tdd_fdd_basic_15.l1v
new file mode 100644
index 0000000..d57ad0c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL2UL/3DL2UL_tdd_fdd_basic_15.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][3DL2UL]3DL2UL_tdd_fdd_basic_15: Add and activate 2 Scells UL-CA, blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_3DL2UL_TDD_FDD_BASIC_15
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_3dl2ul_tdd_fdd_basic_15_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@0016000
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/4DL1UL/4DL1UL_fdd_basic_23.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/4DL1UL/4DL1UL_fdd_basic_23.l1v
new file mode 100644
index 0000000..64bb367
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/4DL1UL/4DL1UL_fdd_basic_23.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][4DL1UL]4DL1UL_fdd_basic_23: Add 3 SCells, non-blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_4DL1UL_FDD_BASIC_23
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_4dl1ul_fdd_basic_23_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/4DL1UL/4DL1UL_fdd_basic_24.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/4DL1UL/4DL1UL_fdd_basic_24.l1v
new file mode 100644
index 0000000..9931ba9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/4DL1UL/4DL1UL_fdd_basic_24.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][4DL1UL]4DL1UL_fdd_basic_24: Add 3 SCells, blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_4DL1UL_FDD_BASIC_24
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_4dl1ul_fdd_basic_24_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_01.l1v
new file mode 100644
index 0000000..10f81ba
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_01.l1v
@@ -0,0 +1,46 @@
+{ Validation }
+Title = "[R9_LTE][01_NOCH]NOCH_CSR_01: Test of Carrier Search with Band Configuration and Band Report"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_NOCH_CSR_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_bool is_user_define_earfcn;
+ kal_uint32 user_define_earfcn;
+} l1edps_noch_csr_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[csr_config_by_band] "csr_config_by_band"
+@KAL_TRUE
+
+[csr_report_by_band] "csr_report_by_band"
+@KAL_TRUE
+
+[csr_is_skip_bw] "csr_skip_bw"
+@KAL_TRUE
+
+[is_user_define_earfcn] "is_user_define_earfcn"
+@KAL_FALSE
+
+[user_define_earfcn] "user_define_earfcn"
+1~65535
+@38450
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_02.l1v
new file mode 100644
index 0000000..66e1218
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_02.l1v
@@ -0,0 +1,41 @@
+{ Validation }
+Title = "[R9_LTE][01_NOCH]NOCH_CSR_02: Test of Carrier Search with Band Configuration and Band Report"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_NOCH_CSR_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_noch_csr_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[csr_config_by_band] "csr_config_by_band"
+@KAL_TRUE
+
+[csr_report_by_band] "csr_report_by_band"
+@KAL_FALSE
+
+[csr_is_skip_bw] "csr_skip_bw"
+@KAL_FALSE
+
+[search_type] "search_type"
+@EL1_CSR_SEARCH_TYPE_SPEED_MODE
+EL1_CSR_SEARCH_TYPE_ACCURACY_MODE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_03.l1v
new file mode 100644
index 0000000..0a6caab
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_03.l1v
@@ -0,0 +1,55 @@
+{ Validation }
+Title = "[R9_LTE][01_NOCH]NOCH_CSR_03: Test of Carrier Search with Skip Bandwidth"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_NOCH_CSR_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_bandwidth_enum csr_skip_bandwidth;
+ el1_csr_search_type_enum search_type;
+ kal_bool csr_is_priority_assign;
+
+} l1edps_noch_csr_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[csr_config_by_band] "csr_config_by_band"
+@KAL_TRUE
+
+[csr_report_by_band] "csr_report_by_band"
+@KAL_FALSE
+
+[csr_is_skip_bw] "csr_skip_bw"
+@KAL_TRUE
+
+[csr_skip_bandwidth] "skip bandwidth"
+@BW_100_RB
+BW_15_RB
+BW_25_RB
+BW_50_RB
+BW_75_RB
+BW_100_RB
+BW_INVALID
+
+[search_type] "search_type"
+@EL1_CSR_SEARCH_TYPE_SPEED_MODE
+EL1_CSR_SEARCH_TYPE_ACCURACY_MODE
+
+[csr_is_priority_assign] "csr_is_priority_assign"
+@KAL_TRUE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_04.l1v
new file mode 100644
index 0000000..00494c8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_04.l1v
@@ -0,0 +1,46 @@
+{ Validation }
+Title = "[R9_LTE][01_NOCH]NOCH_CSR_04: Test of Carrier Search with Overlap Band and Non Priority Assignment"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_NOCH_CSR_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_bool csr_is_priority_assign;
+
+} l1edps_noch_csr_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[csr_config_by_band] "csr_config_by_band"
+@KAL_TRUE
+
+[csr_report_by_band] "csr_report_by_band"
+@KAL_FALSE
+
+[csr_is_skip_bw] "csr_skip_bw"
+@KAL_FALSE
+
+
+[search_type] "search_type"
+@EL1_CSR_SEARCH_TYPE_SPEED_MODE
+EL1_CSR_SEARCH_TYPE_ACCURACY_MODE
+
+[csr_is_priority_assign] "csr_is_priority_assign"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_05.l1v
new file mode 100644
index 0000000..b9e4677
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_05.l1v
@@ -0,0 +1,46 @@
+{ Validation }
+Title = "[R9_LTE][01_NOCH]NOCH_CSR_05: Test of Carrier Search with Overlap Band and Priority Assignment"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_NOCH_CSR_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_bool csr_is_priority_assign;
+
+} l1edps_noch_csr_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[csr_config_by_band] "csr_config_by_band"
+@KAL_TRUE
+
+[csr_report_by_band] "csr_report_by_band"
+@KAL_FALSE
+
+[csr_is_skip_bw] "csr_skip_bw"
+@KAL_FALSE
+
+
+[search_type] "search_type"
+@EL1_CSR_SEARCH_TYPE_SPEED_MODE
+EL1_CSR_SEARCH_TYPE_ACCURACY_MODE
+
+[csr_is_priority_assign] "csr_is_priority_assign"
+@KAL_TRUE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_06.l1v
new file mode 100644
index 0000000..515453d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_06.l1v
@@ -0,0 +1,46 @@
+{ Validation }
+Title = "[R9_LTE][01_NOCH]NOCH_CSR_06: Test of Carrier Search with Frequency Configuration and Frequency Report"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_NOCH_CSR_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_bool csr_is_priority_assign;
+
+
+} l1edps_noch_csr_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[csr_config_by_band] "csr_config_by_band"
+@KAL_FALSE
+
+[csr_report_by_band] "csr_report_by_band"
+@KAL_FALSE
+
+[csr_is_skip_bw] "csr_is_skip_bw"
+@KAL_FALSE
+
+[search_type] "search_type"
+@EL1_CSR_SEARCH_TYPE_SPEED_MODE
+EL1_CSR_SEARCH_TYPE_ACCURACY_MODE
+
+[csr_is_priority_assign] "csr_is_priority_assign"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_07.l1v
new file mode 100644
index 0000000..872d7db
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_07.l1v
@@ -0,0 +1,47 @@
+{ Validation }
+Title = "[R9_LTE][01_NOCH]NOCH_CSR_07: Test of Carrier Search with Black List"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_NOCH_CSR_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_bool csr_is_priority_assign;
+
+
+} l1edps_noch_csr_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[csr_config_by_band] "csr_config_by_band"
+@KAL_TRUE
+
+[csr_report_by_band] "csr_report_by_band"
+@KAL_TRUE
+
+[csr_is_skip_bw] "csr_is_skip_bw"
+@KAL_FALSE
+
+[search_type] "search_type"
+@EL1_CSR_SEARCH_TYPE_SPEED_MODE
+EL1_CSR_SEARCH_TYPE_ACCURACY_MODE
+
+
+[csr_is_priority_assign] "csr_is_priority_assign"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_08.l1v
new file mode 100644
index 0000000..55ffc35
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_08.l1v
@@ -0,0 +1,47 @@
+{ Validation }
+Title = "[R9_LTE][01_NOCH]NOCH_CSR_08: Test of Carrier Search with Modification"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_NOCH_CSR_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_bool csr_is_priority_assign;
+
+
+} l1edps_noch_csr_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[csr_config_by_band] "csr_config_by_band"
+@KAL_TRUE
+
+[csr_report_by_band] "csr_report_by_band"
+@KAL_TRUE
+
+[csr_is_skip_bw] "csr_is_skip_bw"
+@KAL_FALSE
+
+[search_type] "search_type"
+@EL1_CSR_SEARCH_TYPE_SPEED_MODE
+EL1_CSR_SEARCH_TYPE_ACCURACY_MODE
+
+
+[csr_is_priority_assign] "csr_is_priority_assign"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_09.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_09.l1v
new file mode 100644
index 0000000..6f4ccd3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_09.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][01_NOCH]NOCH_CSR_09: Test of RSSI Sniffer Function"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_NOCH_CSR_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 intv; //640ms x intv (1-50)
+ kal_bool is_user_define_fullband_scan;
+
+} l1edps_noch_csr_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[intv] "intv"
+1~50
+@1
+
+[is_user_define_fullband_scan] "is_fullband_scan"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_10.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_10.l1v
new file mode 100644
index 0000000..34fbfaa
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_10.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][01_NOCH]NOCH_CSR_10: Test of RSSI Sniffer Modification Function"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_NOCH_CSR_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 intv; //640ms x intv (1-50)
+
+
+} l1edps_noch_csr_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[intv] "intv"
+1~50
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_11.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_11.l1v
new file mode 100644
index 0000000..d98d090
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_11.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][01_NOCH]NOCH_CSR_11: Test of RSSI Sniffer Modification Function"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_NOCH_CSR_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 intv; //640ms x intv (1-50)
+
+
+} l1edps_noch_csr_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[intv] "intv"
+1~50
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_RESET_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_RESET_01.l1v
new file mode 100644
index 0000000..d226035
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_RESET_01.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R9_LTE][01_NOCH]NOCH_RESET_01: Reset Modem"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_NOCH_RESET_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+} l1edps_noch_reset_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_SCS_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_SCS_01.l1v
new file mode 100644
index 0000000..8f0240a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_SCS_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][01_NOCH]NOCH_SCS_01: Test of SCS- target exists in CSR cell table"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_NOCH_SCS_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_noch_scs_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_01.l1v
new file mode 100644
index 0000000..524f53a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_01.l1v
@@ -0,0 +1,31 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_BCCH_01: The test case is used to check if the UE can acquire the required system information"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_BCCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_bcch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_01_10.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_01_10.l1v
new file mode 100644
index 0000000..28b27b7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_01_10.l1v
@@ -0,0 +1,31 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_BCCH_01_10: 10MHz-The test case is used to check if the UE can acquire the required system information"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_BCCH_01_10
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_bcch_01_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_01_5.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_01_5.l1v
new file mode 100644
index 0000000..d5e5972
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_01_5.l1v
@@ -0,0 +1,31 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_BCCH_01_5: 5MHz-The test case is used to check if the UE can acquire the required system information"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_BCCH_01_5
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_bcch_01_5_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_02.l1v
new file mode 100644
index 0000000..a9e4113
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_BCCH_02: The test case is used to check if the UE can perform specific cell search when the main channel is BCCH"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_BCCH_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_bcch_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_03.l1v
new file mode 100644
index 0000000..2c5e2f6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_03.l1v
@@ -0,0 +1,32 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_BCCH_03: The test case is used to test the behaviour of the UE when PCH is opened in BCCH"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_BCCH_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_bcch_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_04.l1v
new file mode 100644
index 0000000..6f38bc5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_04.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_BCCH_04: This test case is used to verify the MIB soft combine feature."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_BCCH_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_bcch_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_01.l1v
new file mode 100644
index 0000000..10bcab0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_01.l1v
@@ -0,0 +1,32 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CELL_RESEL_01: The test case is used to verify if the UE can meet the minimum cell reselection requirements for FDD-FDD intra frequency case"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CELL_RESEL_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_cell_resel_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_01_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_01_01.l1v
new file mode 100644
index 0000000..1056f3d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_01_01.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CELL_RESEL_01_01: The test case is used to verify if the UE can meet the minimum cell reselection requirements for FDD-FDD intra frequency case"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CELL_RESEL_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_cell_resel_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~2
+@1
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_01_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_01_02.l1v
new file mode 100644
index 0000000..016bbf2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_01_02.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CELL_RESEL_01_02: The test case is used to verify if the UE can meet the minimum cell reselection requirements for FDD-FDD intra frequency case"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CELL_RESEL_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_cell_resel_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~2
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_02.l1v
new file mode 100644
index 0000000..e43ac6c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_02.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CELL_RESEL_02: The test case is used to verify if the UE can meet the minimum cell reselection requirements for FDD-FDD inter frequency case"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CELL_RESEL_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_cell_resel_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_02_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_02_01.l1v
new file mode 100644
index 0000000..1f8b661
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_02_01.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CELL_RESEL_02_01: The test case is used to verify if the UE can meet the minimum cell reselection requirements for FDD-FDD inter frequency case"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CELL_RESEL_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_cell_resel_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~2
+@1
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_02_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_02_02.l1v
new file mode 100644
index 0000000..8e9d37a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_02_02.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CELL_RESEL_02_02: The test case is used to verify if the UE can meet the minimum cell reselection requirements for FDD-FDD inter frequency case"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CELL_RESEL_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_cell_resel_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~2
+@2
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_03.l1v
new file mode 100644
index 0000000..28e9cd3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_03.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CELL_RESEL_03: The test case is used to verify if the UE can meet the minimum cell reselection requirements for TDD-TDD intra frequency case"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CELL_RESEL_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_cell_resel_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_03_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_03_01.l1v
new file mode 100644
index 0000000..4a28e23
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_03_01.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CELL_RESEL_03_01: The test case is used to verify if the UE can meet the minimum cell reselection requirements for TDD-TDD intra frequency case"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CELL_RESEL_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_cell_resel_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~2
+@1
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_03_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_03_02.l1v
new file mode 100644
index 0000000..ad2b5a1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_03_02.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CELL_RESEL_03_02: The test case is used to verify if the UE can meet the minimum cell reselection requirements for TDD-TDD intra frequency case"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CELL_RESEL_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_cell_resel_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~2
+@2
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_04.l1v
new file mode 100644
index 0000000..fefa360
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_04.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CELL_RESEL_04: The test case is used to verify if the UE can meet the minimum cell reselection requirements for TDD-TDD inter frequency case"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CELL_RESEL_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_cell_resel_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_04_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_04_01.l1v
new file mode 100644
index 0000000..1c82b98
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_04_01.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CELL_RESEL_04_01: The test case is used to verify if the UE can meet the minimum cell reselection requirements for TDD-TDD inter frequency case"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CELL_RESEL_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_cell_resel_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~2
+@1
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_04_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_04_02.l1v
new file mode 100644
index 0000000..8176092
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_04_02.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CELL_RESEL_04_02: The test case is used to verify if the UE can meet the minimum cell reselection requirements for TDD-TDD inter frequency case"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CELL_RESEL_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_cell_resel_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~2
+@2
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CSR_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CSR_01.l1v
new file mode 100644
index 0000000..8577df0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CSR_01.l1v
@@ -0,0 +1,84 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CSR_01: Test of Carrier Search with Band Configuration and Band Report on PCH state"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CSR_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool is_user_define_fullband_scan;
+ kal_bool is_speed_mode;
+ kal_uint8 number_of_report_cell;
+ kal_uint8 number_of_total_band;
+ kal_uint8 band_info_1;
+ kal_uint8 band_info_2;
+ kal_uint8 band_info_3;
+ kal_uint8 band_info_4;
+ kal_uint8 band_info_5;
+ kal_uint8 band_info_6;
+ kal_uint8 band_info_7;
+ kal_uint8 band_info_8;
+
+
+} l1edps_idle_csr_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[is_user_define_fullband_scan] "is_fullband_scan"
+@KAL_FALSE
+
+[is_speed_mode] "is_speed_mode"
+@KAL_TRUE
+
+[number_of_report_cell] "number_of_report_cell"
+1~8
+@1
+
+[number_of_total_band] "number_of_total_band"
+1~8
+@2
+
+[band_info_1] "band_info_1"
+1~64
+@1
+
+[band_info_2] "band_info_2"
+1~64
+@39
+
+[band_info_3] "band_info_3"
+1~64
+@5
+
+[band_info_4] "band_info_4"
+1~64
+@7
+
+[band_info_5] "band_info_5"
+1~64
+@13
+
+[band_info_6] "band_info_6"
+1~64
+@38
+
+[band_info_7] "band_info_7"
+1~64
+@40
+
+[band_info_8] "band_info_8"
+1~64
+@3
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CSR_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CSR_02.l1v
new file mode 100644
index 0000000..96c6556
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CSR_02.l1v
@@ -0,0 +1,27 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CSR_02: Test of RSSI Sniffer Function on PCH state"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CSR_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+} l1edps_idle_csr_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_MBMS_MCCH_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_MBMS_MCCH_01.l1v
new file mode 100644
index 0000000..83090bf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_MBMS_MCCH_01.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_MBMS_MCCH_01: MCCH change test of MBMS in IDLE mode (FDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MBMS_MCCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_idle_mbms_mcch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_MBMS_MCCH_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_MBMS_MCCH_02.l1v
new file mode 100644
index 0000000..5f1ed77
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_MBMS_MCCH_02.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_MBMS_MCCH_02: MCCH change test of MBMS in IDLE mode (TDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MBMS_MCCH_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_idle_mbms_mcch_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_OOS_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_OOS_01.l1v
new file mode 100644
index 0000000..6ad361f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_OOS_01.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_OOS_01: The test case is used to check the behaviour of the UE when S<0 occurs Nserv times and a suitable cell is found using known cell search(KCS)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_OOS_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_oos_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_OOS_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_OOS_02.l1v
new file mode 100644
index 0000000..c72f46f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_OOS_02.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_OOS_02: The test case is used to check the behaviour of the UE during out-of-service (PCH->NOCH)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_OOS_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_oos_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_OOS_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_OOS_03.l1v
new file mode 100644
index 0000000..336ed0d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_OOS_03.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_OOS_03: The test case is used to check the behaviour of the UE when S<0 occurs Nserv times and a suitable cell is found using known cell search(KCS)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_OOS_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_oos_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_OOS_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_OOS_04.l1v
new file mode 100644
index 0000000..28a26f0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_OOS_04.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_OOS_04: The test case is used to check the behaviour of the UE during out-of-service (PCH->NOCH)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_OOS_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_oos_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01.l1v
new file mode 100644
index 0000000..18dde25
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_01: The test case is used to check if the UE can successfully camp on a target cell and successfully acquire a paging message"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_pch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_01.l1v
new file mode 100644
index 0000000..c7eb924
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_01.l1v
@@ -0,0 +1,36 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_01_01: The test case is used to check if the UE can successfully camp on a target cell and successfully acquire a paging message"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~12
+@1
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_02.l1v
new file mode 100644
index 0000000..617551e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_02.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_01_02: The test case is used to check if the UE can successfully camp on a target cell and successfully acquire a paging message"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~12
+@2
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_03.l1v
new file mode 100644
index 0000000..2175513
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_03.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_01_03: The test case is used to check if the UE can successfully camp on a target cell and successfully acquire a paging message"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~12
+@3
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_04.l1v
new file mode 100644
index 0000000..c727690
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_04.l1v
@@ -0,0 +1,36 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_01_04: The test case is used to check if the UE can successfully camp on a target cell and successfully acquire a paging message"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~12
+@4
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_05.l1v
new file mode 100644
index 0000000..9767def
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_05.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_01_05: The test case is used to check if the UE can successfully camp on a target cell and successfully acquire a paging message"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~12
+@5
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_06.l1v
new file mode 100644
index 0000000..38d61ad
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_06.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_01_06: The test case is used to check if the UE can successfully camp on a target cell and successfully acquire a paging message"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~12
+@6
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_07.l1v
new file mode 100644
index 0000000..e0ffc42
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_07.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_01_07: The test case is used to check if the UE can successfully camp on a target cell and successfully acquire a paging message"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_01
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~12
+@7
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_08.l1v
new file mode 100644
index 0000000..09a824a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_08.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_01_08: The test case is used to check if the UE can successfully camp on a target cell and successfully acquire a paging message"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~12
+@8
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_09.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_09.l1v
new file mode 100644
index 0000000..a8dbba0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_09.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_01_09: The test case is used to check if the UE can successfully camp on a target cell and successfully acquire a paging message"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~12
+@9
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_10.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_10.l1v
new file mode 100644
index 0000000..dba1987
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_10.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_01_10: The test case is used to check if the UE can successfully camp on a target cell and successfully acquire a paging message"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~12
+@10
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_11.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_11.l1v
new file mode 100644
index 0000000..24ce234
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_11.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_01_11: The test case is used to check if the UE can successfully camp on a target cell and successfully acquire a paging message"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~12
+@11
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_12.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_12.l1v
new file mode 100644
index 0000000..c566acc
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_12.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_01_12: The test case is used to check if the UE can successfully camp on a target cell and successfully acquire a paging message"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+ kal_bool is_case_repeat;
+} l1edps_idle_pch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~12
+@12
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_02.l1v
new file mode 100644
index 0000000..1056421
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_02.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_02: The test case is used to check the behavior of UE when the infromed of a system information change"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_bool is_case_repeat;
+ kal_bool mib_only;
+
+} l1edps_idle_pch_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
+[mib_only] "mib_only"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_03.l1v
new file mode 100644
index 0000000..64fcabe
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_03.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_03: The test case is used to check whether the UE can acquire paging in every PO"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_TDD_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_TDD_01.l1v
new file mode 100644
index 0000000..fc5b642
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_TDD_01.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_TDD_01: The test case is used to check whether the UE can acquire paging in every PO"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_TDD_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_tdd_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~28
+@1
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_TDD_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_TDD_02.l1v
new file mode 100644
index 0000000..a85a120
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_TDD_02.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_TDD_02: The test case is used to check whether the UE can acquire paging in every PO"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_TDD_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_tdd_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~32
+@1
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_01.l1v
new file mode 100644
index 0000000..6cd91cf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_01.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PLMN_LIST_01: The test case is used to check whether the UE can perform PLMN list"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PLMN_LIST_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_plmn_list_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02.l1v
new file mode 100644
index 0000000..83484b0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PLMN_LIST_02: The test case is used to check whether the UE can perform PLMN list"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PLMN_LIST_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_plmn_list_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@1
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_01.l1v
new file mode 100644
index 0000000..2d57dba
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_01.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE][IDLE_PLMN_LIST_02]IDLE_PLMN_LIST_02_01: The test case is used to check whether the UE can perform PLMN list"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PLMN_LIST_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_plmn_list_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@1
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_02.l1v
new file mode 100644
index 0000000..1774b49
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_02.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE][IDLE_PLMN_LIST_02]IDLE_PLMN_LIST_02_02: The test case is used to check whether the UE can perform PLMN list"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PLMN_LIST_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_plmn_list_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@2
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_03.l1v
new file mode 100644
index 0000000..268e0ce
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_03.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE][IDLE_PLMN_LIST_02]IDLE_PLMN_LIST_02_03: The test case is used to check whether the UE can perform PLMN list"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PLMN_LIST_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_plmn_list_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@3
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_04.l1v
new file mode 100644
index 0000000..afac373
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_04.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE][IDLE_PLMN_LIST_02]IDLE_PLMN_LIST_02_04: The test case is used to check whether the UE can perform PLMN list"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PLMN_LIST_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_plmn_list_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@4
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_05.l1v
new file mode 100644
index 0000000..61728ba
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_05.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE][IDLE_PLMN_LIST_02]IDLE_PLMN_LIST_02_05: The test case is used to check whether the UE can perform PLMN list"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PLMN_LIST_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_plmn_list_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@5
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_06.l1v
new file mode 100644
index 0000000..74f1f52
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_06.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE][IDLE_PLMN_LIST_02]IDLE_PLMN_LIST_02_06: The test case is used to check whether the UE can perform PLMN list"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PLMN_LIST_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_plmn_list_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@6
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_07.l1v
new file mode 100644
index 0000000..5fe94c5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_07.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE][IDLE_PLMN_LIST_02]IDLE_PLMN_LIST_02_07: The test case is used to check whether the UE can perform PLMN list"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PLMN_LIST_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_plmn_list_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@7
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PWS_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PWS_01.l1v
new file mode 100644
index 0000000..702dfa0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PWS_01.l1v
@@ -0,0 +1,32 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PWS_01: The test case is used to the behavior of UE when the indication of ETWS/CMAS notification is received "
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PWS_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_pws_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PWS_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PWS_02.l1v
new file mode 100644
index 0000000..5743c3c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PWS_02.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PWS_02: Receving SIB1 and SIB11 simultaneously in idle mode (FDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PWS_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+} l1edps_idle_pws_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PWS_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PWS_03.l1v
new file mode 100644
index 0000000..77e76dc
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PWS_03.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PWS_03: Receving SIB1 and SIB11 simultaneously in idle mode (TDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PWS_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+} l1edps_idle_pws_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/empty.h.txt b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/empty.h.txt
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/empty.h.txt
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_CONN_EST_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_CONN_EST_01.l1v
new file mode 100644
index 0000000..7787d04
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_CONN_EST_01.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][03_IDLE_SCH]IDLE_SCH_CONN_EST_01: The test case is used to check whether the UE can perform reconfiguration in IDLE-SCH"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_SCH_CONN_EST_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_sch_conn_est_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~6
+@1
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_01.l1v
new file mode 100644
index 0000000..b9a455c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_01.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][03_IDLE_SCH]IDLE_SCH_RA_01: Test of PRACH and Msg3 Transmit Power"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_SCH_RA_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_idle_sch_ra_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_02.l1v
new file mode 100644
index 0000000..ad54641
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_02.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][03_IDLE_SCH]IDLE_SCH_RA_02: Test of Random Access Response Mis-Match"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_SCH_RA_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_idle_sch_ra_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_02_10.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_02_10.l1v
new file mode 100644
index 0000000..5534870
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_02_10.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][03_IDLE_SCH]IDLE_SCH_RA_02_10: 10MHz-Test of Random Access Response Mis-Match"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_SCH_RA_02_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_idle_sch_ra_02_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_02_5.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_02_5.l1v
new file mode 100644
index 0000000..9494ef1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_02_5.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][03_IDLE_SCH]IDLE_SCH_RA_02_5: 5MHz-Test of Random Access Response Mis-Match"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_SCH_RA_02_5
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_idle_sch_ra_02_5_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_03.l1v
new file mode 100644
index 0000000..c9b1160
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_03.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][03_IDLE_SCH]IDLE_SCH_RA_03: Test of Contention-based Random Access Proceure (Success)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_SCH_RA_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_idle_sch_ra_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_04.l1v
new file mode 100644
index 0000000..78e67bc
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_04.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][03_IDLE_SCH]IDLE_SCH_RA_04: Test of Contention-based Random Access Procedure (Failed at Contention Resolution"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_SCH_RA_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_idle_sch_ra_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_05.l1v
new file mode 100644
index 0000000..1675eab
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_05.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][03_IDLE_SCH]IDLE_SCH_RA_05: Test of Contention-based Random Access Procedure (C-RNTI assignment follows Contention Resoultion, FDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_SCH_RA_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_idle_sch_ra_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_06.l1v
new file mode 100644
index 0000000..326b242
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_06.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][03_IDLE_SCH]IDLE_SCH_RA_06: Test of Contention-based Random Access Procedure (C-RNTI assignment follows Contention Resolution, TDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_SCH_RA_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_idle_sch_ra_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_07.l1v
new file mode 100644
index 0000000..3af3383
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_07.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][03_IDLE_SCH]IDLE_SCH_RA_07: Test of correction of PRACH Resource Transmission"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_SCH_RA_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_idle_sch_ra_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_08.l1v
new file mode 100644
index 0000000..2700618
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_08.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][03_IDLE_SCH]IDLE_SCH_RA_08: Test of correction of PRACH Resource Transmission (TDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_SCH_RA_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_idle_sch_ra_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01.l1v
new file mode 100644
index 0000000..5d155c5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_ACQI_01: Test of aperiodic CQI reporting procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_ACQI_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_acqi_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_01.l1v
new file mode 100644
index 0000000..76059ee
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_01.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_ACQI_01_01: Test of aperiodic CQI reporting procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_ACQI_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_acqi_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~5
+@1
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_02.l1v
new file mode 100644
index 0000000..2ee8023
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_02.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_ACQI_01_02: Test of aperiodic CQI reporting procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_ACQI_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_acqi_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~5
+@2
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_03.l1v
new file mode 100644
index 0000000..050742e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_03.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_ACQI_01_03: Test of aperiodic CQI reporting procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_ACQI_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_acqi_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~5
+@3
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_04.l1v
new file mode 100644
index 0000000..40d97e4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_04.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_ACQI_01_04: Test of aperiodic CQI reporting procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_ACQI_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_acqi_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~5
+@4
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_05.l1v
new file mode 100644
index 0000000..d96233d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_05.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_ACQI_01_05: Test of aperiodic CQI reporting procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_ACQI_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_acqi_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~5
+@5
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CONN_REEST_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CONN_REEST_01.l1v
new file mode 100644
index 0000000..c1ac1fe
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CONN_REEST_01.l1v
@@ -0,0 +1,31 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_CONN_REEST_01: The test case is to verify that the FDD intra-frequency RRC re-establishment delay is within the specified limits in 36.133"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_CONN_REEST_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_conn_reest_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CONN_REEST_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CONN_REEST_02.l1v
new file mode 100644
index 0000000..d705d50
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CONN_REEST_02.l1v
@@ -0,0 +1,32 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_CONN_REEST_02: The test case is to verify that the FDD inter-frequency RRC re-establishment delay is within the specified limits in 36.133"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_CONN_REEST_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_conn_reest_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CONN_REEST_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CONN_REEST_03.l1v
new file mode 100644
index 0000000..2c8ce8b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CONN_REEST_03.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_CONN_REEST_03: The test case is to verify that the TDD intra-frequency RRC re-establishment delay is within the specified limits in 36.133"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_CONN_REEST_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_conn_reest_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CONN_REEST_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CONN_REEST_04.l1v
new file mode 100644
index 0000000..b468d77
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CONN_REEST_04.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_CONN_REEST_04: The test case is to verify that the TDD inter-frequency RRC re-establishment delay is within the specified limits in 36.133"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_CONN_REEST_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_conn_reest_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CSG_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CSG_01.l1v
new file mode 100644
index 0000000..fdbcc22
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CSG_01.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_CSG_01: The test case is used to check whether the UE can successfully acquire the system information of the neighbor for CSG in SCH"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_CSG_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_csg_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CSG_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CSG_02.l1v
new file mode 100644
index 0000000..267912d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CSG_02.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_CSG_02: The test case is used to check whether the UE can successfully acquire the system information of the neighbor for CSG in SCH"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_CSG_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_csg_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~2
+@1
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_DRX_TRANS_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_DRX_TRANS_01.l1v
new file mode 100644
index 0000000..8f20194
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_DRX_TRANS_01.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_DRX_TRANS_01: Verify that the UE can perform correctly in DRX transition"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_DRX_TRANS_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_drx_trans_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_01.l1v
new file mode 100644
index 0000000..1572b7d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_01.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_HANDOVER_01: The test case is used to check whether the FDD-FDD intra frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_handover_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02.l1v
new file mode 100644
index 0000000..ffb6a1a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_02]SCH_HANDOVER_02: The test case is used to check whether the TDD-TDD intra frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@2
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_01.l1v
new file mode 100644
index 0000000..7f61c16
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_01.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_02]SCH_HANDOVER_02_1: The test case is used to check whether the TDD-TDD intra frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@1
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_02.l1v
new file mode 100644
index 0000000..1764ed7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_02.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_02]SCH_HANDOVER_02_2: The test case is used to check whether the TDD-TDD intra frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@2
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_03.l1v
new file mode 100644
index 0000000..f08e30c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_03.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_02]SCH_HANDOVER_02_3: The test case is used to check whether the TDD-TDD intra frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@3
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_04.l1v
new file mode 100644
index 0000000..2ef2f01
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_04.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_02]SCH_HANDOVER_02_4: The test case is used to check whether the TDD-TDD intra frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@4
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_05.l1v
new file mode 100644
index 0000000..c07489a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_05.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_02]SCH_HANDOVER_02_5: The test case is used to check whether the TDD-TDD intra frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@5
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_06.l1v
new file mode 100644
index 0000000..65dcfe5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_06.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_02]SCH_HANDOVER_02_6: The test case is used to check whether the TDD-TDD intra frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@6
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_07.l1v
new file mode 100644
index 0000000..30bd81a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_07.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_02]SCH_HANDOVER_02_7: The test case is used to check whether the TDD-TDD intra frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@7
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_03.l1v
new file mode 100644
index 0000000..66fb236
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_03.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_HANDOVER_03: The test case is used to check whether the FDD-FDD inter frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_handover_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04.l1v
new file mode 100644
index 0000000..a101a45
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_04]SCH_HANDOVER_04: The test case is used to check whether the TDD-TDD inter frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@2
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_01.l1v
new file mode 100644
index 0000000..a29d6ba
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_01.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_04]SCH_HANDOVER_04_1: The test case is used to check whether the TDD-TDD inter frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@1
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_02.l1v
new file mode 100644
index 0000000..544a1e1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_02.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_04]SCH_HANDOVER_04_2: The test case is used to check whether the TDD-TDD inter frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@2
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_03.l1v
new file mode 100644
index 0000000..5cc1dd9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_03.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_04]SCH_HANDOVER_04_3: The test case is used to check whether the TDD-TDD inter frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@3
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_04.l1v
new file mode 100644
index 0000000..d363dec
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_04.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_04]SCH_HANDOVER_04_4: The test case is used to check whether the TDD-TDD inter frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@4
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_05.l1v
new file mode 100644
index 0000000..2a3519b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_05.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_04]SCH_HANDOVER_04_5: The test case is used to check whether the TDD-TDD inter frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@5
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_06.l1v
new file mode 100644
index 0000000..d7a3dc3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_06.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_04]SCH_HANDOVER_04_6: The test case is used to check whether the TDD-TDD inter frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@6
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_07.l1v
new file mode 100644
index 0000000..e2bd9f6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_07.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_04]SCH_HANDOVER_04_7: The test case is used to check whether the TDD-TDD inter frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@7
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_05.l1v
new file mode 100644
index 0000000..ec05bc0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_05.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_HANDOVER_05: The test case is used to check whether the FDD-FDD inter frequency handover requirements for the case when the target is unknown are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_05
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_handover_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06.l1v
new file mode 100644
index 0000000..494519f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_06]SCH_HANDOVER_06: The test case is used to check whether the TDD-TDD inter frequency handover requirements for the case when the target is unknown are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_06
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@2
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_01.l1v
new file mode 100644
index 0000000..e3f945e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_01.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_06]SCH_HANDOVER_06_1: The test case is used to check whether the TDD-TDD inter frequency handover requirements for the case when the target is unknown are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_06
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@1
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_02.l1v
new file mode 100644
index 0000000..f70e0ca
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_02.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_06]SCH_HANDOVER_06_2: The test case is used to check whether the TDD-TDD inter frequency handover requirements for the case when the target is unknown are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_06
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@2
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_03.l1v
new file mode 100644
index 0000000..6532dd2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_03.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_06]SCH_HANDOVER_06_3: The test case is used to check whether the TDD-TDD inter frequency handover requirements for the case when the target is unknown are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_06
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@3
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_04.l1v
new file mode 100644
index 0000000..7c4b915
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_04.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_06]SCH_HANDOVER_06_4: The test case is used to check whether the TDD-TDD inter frequency handover requirements for the case when the target is unknown are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_06
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@4
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_05.l1v
new file mode 100644
index 0000000..8e0517e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_05.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_06]SCH_HANDOVER_06_5: The test case is used to check whether the TDD-TDD inter frequency handover requirements for the case when the target is unknown are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_06
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@5
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_06.l1v
new file mode 100644
index 0000000..349dbb8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_06.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_06]SCH_HANDOVER_06_6: The test case is used to check whether the TDD-TDD inter frequency handover requirements for the case when the target is unknown are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_06
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@6
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_07.l1v
new file mode 100644
index 0000000..864bc96
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_07.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_06]SCH_HANDOVER_06_7: The test case is used to check whether the TDD-TDD inter frequency handover requirements for the case when the target is unknown are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_06
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@7
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_INTRAHO_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_INTRAHO_01.l1v
new file mode 100644
index 0000000..2c9ba02
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_INTRAHO_01.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_INTRAHO_01: The test case is used to check whether the radio link monitoring will be stopped during intra cell handover and resumed after handover is successful"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_INTRAHO_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_intraho_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PAG_GAP_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PAG_GAP_01.l1v
new file mode 100644
index 0000000..28c653b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PAG_GAP_01.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_PAG_GAP_01: The test case is used to check whether the UE will skip a PO if the specific PO collides with gap."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_PAG_GAP_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_pag_gap_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~2
+@1
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01.l1v
new file mode 100644
index 0000000..013b431
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_PCQI_01: Test of periodic CQI reporting procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_PCQI_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_pcqi_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01_01.l1v
new file mode 100644
index 0000000..4e71cc6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_PCQI_01_01: Test of periodic CQI reporting procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_PCQI_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_pcqi_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01_02.l1v
new file mode 100644
index 0000000..9045802
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_PCQI_01_02: Test of periodic CQI reporting procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_PCQI_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_pcqi_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@2
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01_03.l1v
new file mode 100644
index 0000000..26a5a5a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_PCQI_01_03: Test of periodic CQI reporting procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_PCQI_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_pcqi_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@3
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01_04.l1v
new file mode 100644
index 0000000..f43785d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_PCQI_01_04: Test of periodic CQI reporting procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_PCQI_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_pcqi_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@4
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PC_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PC_01.l1v
new file mode 100644
index 0000000..7254b3a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PC_01.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_PC_01: Test of TX Power Report Procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_PC_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_pc_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PWS_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PWS_01.l1v
new file mode 100644
index 0000000..e134051
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PWS_01.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_PWS_01: The test case is used to check whether the UE can successfully re-acqurie the system info of the serving due to system info modification in SCH."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_PWS_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_pws_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PWS_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PWS_02.l1v
new file mode 100644
index 0000000..4033da9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PWS_02.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_PWS_02: Receving SIB1 and SIB11 simultaneously in connected mode (FDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_PWS_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+} l1edps_sch_pws_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PWS_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PWS_03.l1v
new file mode 100644
index 0000000..d9cb347
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PWS_03.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_PWS_03: Receving SIB1 and SIB11 simultaneously in connected mode (TDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_PWS_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+} l1edps_sch_pws_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_REDIRECTION_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_REDIRECTION_01.l1v
new file mode 100644
index 0000000..815a4c6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_REDIRECTION_01.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_REDIRECTION_01: Verify the UE behaviour upon receiving RRC Connection release with redirection information(FDD->FDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_REDIRECTION_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_redirection_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_REDIRECTION_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_REDIRECTION_02.l1v
new file mode 100644
index 0000000..64346f4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_REDIRECTION_02.l1v
@@ -0,0 +1,40 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_REDIRECTION_02: Verify the UE behaviour upon receiving RRC Connection release with redirection information(TDD->TDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_REDIRECTION_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_redirection_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_REDIRECTION_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_REDIRECTION_03.l1v
new file mode 100644
index 0000000..5205a6d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_REDIRECTION_03.l1v
@@ -0,0 +1,40 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_REDIRECTION_03: Verify the UE behaviour upon receiving RRC Connection release with redirection information(FDD->TDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_REDIRECTION_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_redirection_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_REDIRECTION_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_REDIRECTION_04.l1v
new file mode 100644
index 0000000..fb109c6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_REDIRECTION_04.l1v
@@ -0,0 +1,40 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_REDIRECTION_04: Verify the UE behaviour upon receiving RRC Connection release with redirection information(TDD->FDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_REDIRECTION_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_redirection_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_01.l1v
new file mode 100644
index 0000000..a38549f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_01.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_RLM_01: Verify that the UE can detect the FDD out-of-sync"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_rlm_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_02.l1v
new file mode 100644
index 0000000..f219b90
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_02.l1v
@@ -0,0 +1,36 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_RLM_02: Verify that the UE can detect the FDD out-of-sync"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_rlm_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_03.l1v
new file mode 100644
index 0000000..d78861f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_03.l1v
@@ -0,0 +1,36 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_RLM_03: Verify that the UE can detect the FDD in-sync"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_rlm_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_04.l1v
new file mode 100644
index 0000000..96b8554
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_04.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_RLM_04: Verify that the UE can detect the FDD in-sync"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_rlm_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_05.l1v
new file mode 100644
index 0000000..ea0d53b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_05.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_RLM_05: Verify that the UE can detect the TDD out-of-sync"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_05
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_rlm_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_06.l1v
new file mode 100644
index 0000000..83d1fcf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_06.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_RLM_06: Verify that the UE can detect the TDD out-of-sync"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_06
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_rlm_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_07.l1v
new file mode 100644
index 0000000..20161fc
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_07.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_RLM_07: Verify that the UE can detect the TDD in-sync"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_07
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_rlm_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_08.l1v
new file mode 100644
index 0000000..7a387d1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_08.l1v
@@ -0,0 +1,38 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_RLM_08: Verify that the UE can detect the TDD in-sync"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_08
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_rlm_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_DRX_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_DRX_01.l1v
new file mode 100644
index 0000000..b6ee404
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_DRX_01.l1v
@@ -0,0 +1,38 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_RLM_DRX_01: Verify that the UE can detect the FDD out-of-sync in DRX"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_DRX_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_rlm_drx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_DRX_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_DRX_02.l1v
new file mode 100644
index 0000000..781f778
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_DRX_02.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_RLM_DRX_02: Verify that the UE can detect the FDD in-sync in DRX"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_DRX_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_rlm_drx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_DRX_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_DRX_03.l1v
new file mode 100644
index 0000000..b6b1cf1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_DRX_03.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_RLM_DRX_03: Verify that the UE can detect the TDD out-of-sync in DRX"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_DRX_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_rlm_drx_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_DRX_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_DRX_04.l1v
new file mode 100644
index 0000000..e12debf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_DRX_04.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_RLM_DRX_04: Verify that the UE can detect the TDD in-sync in DRX"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_DRX_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_rlm_drx_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_SI_MODIFY_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_SI_MODIFY_01.l1v
new file mode 100644
index 0000000..f789e00
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_SI_MODIFY_01.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_SI_MODIFY_01: The test case is used to check whether the UE can successfully re-acqurie the system info of the serving due to system info modification in SCH."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_SI_MODIFY_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_si_modify_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_SYNC_HANDOVER_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_SYNC_HANDOVER_01.l1v
new file mode 100644
index 0000000..273f20c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_SYNC_HANDOVER_01.l1v
@@ -0,0 +1,31 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_SYNC_HANDOVER_01: The test case is used to check synchronous handover cases (intra/inter FDD)."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_SYNC_HANDOVER_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_sync_handover_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_01.l1v
new file mode 100644
index 0000000..b653e1e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_01.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_TPC_01: Test of TPC Command Updating Procedure (Fix TPC mode, FDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TPC_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_tpc_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_02.l1v
new file mode 100644
index 0000000..8d47e57
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_02.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_TPC_02: Test of TPC Command Updating Procedure (Fix TPC mode, TDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TPC_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_tpc_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_03.l1v
new file mode 100644
index 0000000..b4750dd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_03.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_TPC_03: Test of TPC Command Updating Procedure (Automatic mode, FDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TPC_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_tpc_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_04.l1v
new file mode 100644
index 0000000..9c0bdc3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_04.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_TPC_04: Test of TPC Command Updating Procedure (Automatic mode, TDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TPC_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_tpc_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_05.l1v
new file mode 100644
index 0000000..1346da4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_05.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_TPC_05: Test of Timing Compensation Process for TPC (FDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TPC_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_tpc_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_06.l1v
new file mode 100644
index 0000000..7bd2f61
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_06.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_TPC_06: Test of Timing Compensation Process for TPC (TDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TPC_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_tpc_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_01.l1v
new file mode 100644
index 0000000..910776f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_01.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_TX_01: Test of Normal UL and DL Procedure (ALL ACK)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_tx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_02.l1v
new file mode 100644
index 0000000..e9ce2a7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_02.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_TX_02: Test of Normal UL procedure (with NACK)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_tx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_03.l1v
new file mode 100644
index 0000000..e6cfb16
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_03.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_TX_03: Test of ACK/NACK Repetition Procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TX_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_tx_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_04.l1v
new file mode 100644
index 0000000..bdfd105
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_04.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_TX_04: Test of Tx with TTI Bundling Enable"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TX_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_tx_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_05.l1v
new file mode 100644
index 0000000..2979293
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_05.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_TX_05: Test of UL SPS Proecdure (FDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TX_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_tx_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_06.l1v
new file mode 100644
index 0000000..a511466
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_06.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_TX_06: Test of UL SPS Procedure (TDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TX_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_tx_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/BCCH_Meas_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/BCCH_Meas_01.l1v
new file mode 100644
index 0000000..8a6c22b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/BCCH_Meas_01.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][BCCH_MEAS_01]BCCH_MEAS_01: Test of FDD serving measurement during BCCH open"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_BCCH_MEASUREMENT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+} l1edps_bcch_measurement_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/BCCH_Meas_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/BCCH_Meas_02.l1v
new file mode 100644
index 0000000..5f4caef
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/BCCH_Meas_02.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][BCCH_MEAS_02]BCCH_MEAS_02: Test of TDD serving measurement during BCCH open"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_BCCH_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+} l1edps_bcch_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01.l1v
new file mode 100644
index 0000000..360fe43
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][[IDLE_MEAS_01]IDLE_MEAS_01: Test of FDD intra frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01_01.l1v
new file mode 100644
index 0000000..6133c8d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_01]IDLE_MEAS_01_01: Test of FDD intra frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01_02.l1v
new file mode 100644
index 0000000..612c687
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_01]IDLE_MEAS_01_02: Test of FDD intra frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01_03.l1v
new file mode 100644
index 0000000..5655fcf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_01]IDLE_MEAS_01_03: Test of FDD intra frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01_04.l1v
new file mode 100644
index 0000000..d673f2c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_01]IDLE_MEAS_01_04: Test of FDD intra frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02.l1v
new file mode 100644
index 0000000..312a81c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_02]IDLE_MEAS_02: Test of FDD low priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02_01.l1v
new file mode 100644
index 0000000..d876c11
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_02]IDLE_MEAS_02_1: Test of FDD low priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02_02.l1v
new file mode 100644
index 0000000..1698e42
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_02]IDLE_MEAS_02_2: Test of FDD low priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02_03.l1v
new file mode 100644
index 0000000..ded7d3b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_02]IDLE_MEAS_02_3: Test of FDD low priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02_04.l1v
new file mode 100644
index 0000000..1d1abd3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_02]IDLE_MEAS_02_4: Test of FDD low priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03.l1v
new file mode 100644
index 0000000..b560095
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_03]IDLE_MEAS_03: Test of FDD high priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03_01.l1v
new file mode 100644
index 0000000..5e1d4e5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_03]IDLE_MEAS_03_1: Test of FDD high priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03_02.l1v
new file mode 100644
index 0000000..6daf0f9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_03]IDLE_MEAS_03_2: Test of FDD high priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03_03.l1v
new file mode 100644
index 0000000..f88ee53
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_03]IDLE_MEAS_03_3: Test of FDD high priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03_04.l1v
new file mode 100644
index 0000000..b4d315b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_03]IDLE_MEAS_03_4: Test of FDD high priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04.l1v
new file mode 100644
index 0000000..006230b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_04]IDLE_MEAS_04: Test of TDD intra frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04_01.l1v
new file mode 100644
index 0000000..c575ade
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_04]IDLE_MEAS_04_1: Test of TDD intra frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04_02.l1v
new file mode 100644
index 0000000..0d52e04
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_04]IDLE_MEAS_04_2: Test of TDD intra frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04_03.l1v
new file mode 100644
index 0000000..8479560
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_04]IDLE_MEAS_04_3: Test of TDD intra frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04_04.l1v
new file mode 100644
index 0000000..6e9c156
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_04]IDLE_MEAS_04_4: Test of TDD intra frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05.l1v
new file mode 100644
index 0000000..acef8da
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_05]IDLE_MEAS_05: Test of TDD low priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05_01.l1v
new file mode 100644
index 0000000..2548f69
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_05]IDLE_MEAS_05_1: Test of TDD low priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05_02.l1v
new file mode 100644
index 0000000..f3ffe82
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_05]IDLE_MEAS_05_2: Test of TDD low priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05_03.l1v
new file mode 100644
index 0000000..1d33363
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_05]IDLE_MEAS_05_3: Test of TDD low priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05_04.l1v
new file mode 100644
index 0000000..34eb943
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_05]IDLE_MEAS_05_4: Test of TDD low priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06.l1v
new file mode 100644
index 0000000..628c830
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_06]IDLE_MEAS_06: Test of TDD high priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06_01.l1v
new file mode 100644
index 0000000..63607ee
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_06]IDLE_MEAS_06_1: Test of TDD high priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06_02.l1v
new file mode 100644
index 0000000..f1622b7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_06]IDLE_MEAS_06_2: Test of TDD high priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06_03.l1v
new file mode 100644
index 0000000..4c9af1a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_06]IDLE_MEAS_06_3: Test of TDD high priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06_04.l1v
new file mode 100644
index 0000000..904cce9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_06]IDLE_MEAS_06_4: Test of TDD high priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_07.l1v
new file mode 100644
index 0000000..9ac4eb5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE]IDLE_MEAS_07: Test of 1 FDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_IDLE"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_08.l1v
new file mode 100644
index 0000000..c1ce9fe
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE]IDLE_MEAS_08: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_IDLE"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_09.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_09.l1v
new file mode 100644
index 0000000..03a9e0b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_09.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE]IDLE_MEAS_09: Test of 1 FDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_IDLE"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_10.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_10.l1v
new file mode 100644
index 0000000..fda5b8f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_10.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE]IDLE_MEAS_10: Test of 1 TDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_IDLE"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_11.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_11.l1v
new file mode 100644
index 0000000..107ec4d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_11.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE]IDLE_MEAS_11: Test of 1 FDD intra + 2 FDD inter(1 CSG) + 2 TDD inter frequency cells in RRC_IDLE"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_12.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_12.l1v
new file mode 100644
index 0000000..6fbf2a7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_12.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE]IDLE_MEAS_12: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter(1 CSG) frequency cells in RRC_IDLE"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_SCH_Meas_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_SCH_Meas_01.l1v
new file mode 100644
index 0000000..3bbd8af
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_SCH_Meas_01.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_SCH_MEAS_01]IDLE_SCH_MEAS_01: Test of FDD intra frequency measurement during random access procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_SCH_MEASUREMENT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+} l1edps_idle_sch_measurement_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_SCH_Meas_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_SCH_Meas_02.l1v
new file mode 100644
index 0000000..a95c799
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_SCH_Meas_02.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_SCH_MEAS_02]IDLE_SCH_MEAS_02: Test of TDD intra frequency measurement during random access procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_SCH_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+} l1edps_idle_sch_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/OTDOA_Meas_01_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/OTDOA_Meas_01_01.l1v
new file mode 100644
index 0000000..df716c0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/OTDOA_Meas_01_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][OTDOA_MEAS_01]OTDOA_MEAS_01_1: Test of FDD intra frequency OTDOA measurement"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_OTDOA_MEASUREMENT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_otdoa_measurement_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/OTDOA_Meas_02_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/OTDOA_Meas_02_01.l1v
new file mode 100644
index 0000000..3c2f734
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/OTDOA_Meas_02_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][OTDOA_MEAS_02]OTDOA_MEAS_02_1: Test of FDD inter frequency OTDOA measurement"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_OTDOA_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_otdoa_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/OTDOA_Meas_03_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/OTDOA_Meas_03_01.l1v
new file mode 100644
index 0000000..51bf441
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/OTDOA_Meas_03_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][OTDOA_MEAS_03]OTDOA_MEAS_03_1: Test of TDD intra frequency OTDOA measurement"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_OTDOA_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_otdoa_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/OTDOA_Meas_04_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/OTDOA_Meas_04_01.l1v
new file mode 100644
index 0000000..7d5e083
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/OTDOA_Meas_04_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][OTDOA_MEAS_04]OTDOA_MEAS_04_1: Test of TDD inter frequency OTDOA measurement"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_OTDOA_MEASUREMENT_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_otdoa_measurement_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01.l1v
new file mode 100644
index 0000000..e65ed8c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_01]SCH_MEAS_01: Test of FDD intra frequency measurement in RRC_CONNECTED without gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01_01.l1v
new file mode 100644
index 0000000..8974058
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_01]SCH_MEAS_01_1: Test of FDD intra frequency measurement in RRC_CONNECTED without gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01_02.l1v
new file mode 100644
index 0000000..ef0cd72
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_01]SCH_MEAS_01_2: Test of FDD intra frequency measurement in RRC_CONNECTED without gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01_03.l1v
new file mode 100644
index 0000000..5a2cb10
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_01]SCH_MEAS_01_3: Test of FDD intra frequency measurement in RRC_CONNECTED without gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01_04.l1v
new file mode 100644
index 0000000..5953f9f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_01]SCH_MEAS_01_4: Test of FDD intra frequency measurement in RRC_CONNECTED without gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02.l1v
new file mode 100644
index 0000000..fb832ad
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_02]SCH_MEAS_02: Test of FDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_01.l1v
new file mode 100644
index 0000000..7de6d17
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_02]SCH_MEAS_02_1: Test of FDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_02.l1v
new file mode 100644
index 0000000..e6c65b7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_02]SCH_MEAS_02_2: Test of FDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_03.l1v
new file mode 100644
index 0000000..bfa8b50
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_02]SCH_MEAS_02_3: Test of FDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_04.l1v
new file mode 100644
index 0000000..f5c057f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_02]SCH_MEAS_02_4: Test of FDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_05.l1v
new file mode 100644
index 0000000..1439a08
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_02]SCH_MEAS_02_5: Test of FDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_06.l1v
new file mode 100644
index 0000000..e94b243
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_02]SCH_MEAS_02_6: Test of FDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_07.l1v
new file mode 100644
index 0000000..300901c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_02]SCH_MEAS_02_7: Test of FDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@7
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_08.l1v
new file mode 100644
index 0000000..e7bbf13
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_02]SCH_MEAS_02_8: Test of FDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03.l1v
new file mode 100644
index 0000000..811ef67
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_03]SCH_MEAS_03: Test of FDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_01.l1v
new file mode 100644
index 0000000..180832c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_03]SCH_MEAS_03_1: Test of FDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_02.l1v
new file mode 100644
index 0000000..4256ae4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_03]SCH_MEAS_03_2: Test of FDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_03.l1v
new file mode 100644
index 0000000..7fc0469
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_03]SCH_MEAS_03_3: Test of FDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_04.l1v
new file mode 100644
index 0000000..235f005
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_03]SCH_MEAS_03_4: Test of FDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_05.l1v
new file mode 100644
index 0000000..b2e5ccf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_03]SCH_MEAS_03_5: Test of FDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_06.l1v
new file mode 100644
index 0000000..6bb7552
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_03]SCH_MEAS_03_6: Test of FDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_07.l1v
new file mode 100644
index 0000000..bb98777
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_03]SCH_MEAS_03_7: Test of FDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@7
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_08.l1v
new file mode 100644
index 0000000..e3adb0a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_03]SCH_MEAS_03_8: Test of FDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04.l1v
new file mode 100644
index 0000000..4da4309
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_04]SCH_MEAS_04: Test of TDD intra frequency measurement in RRC_CONNECTED without gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04_01.l1v
new file mode 100644
index 0000000..7a1faa1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_04]SCH_MEAS_04_1: Test of TDD intra frequency measurement in RRC_CONNECTED without gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04_02.l1v
new file mode 100644
index 0000000..6563ce1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_04]SCH_MEAS_04_2: Test of TDD intra frequency measurement in RRC_CONNECTED without gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04_03.l1v
new file mode 100644
index 0000000..5497f59
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_04]SCH_MEAS_04_3: Test of TDD intra frequency measurement in RRC_CONNECTED without gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04_04.l1v
new file mode 100644
index 0000000..dadab9e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_04]SCH_MEAS_04_4: Test of TDD intra frequency measurement in RRC_CONNECTED without gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05.l1v
new file mode 100644
index 0000000..e56b89b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_05]SCH_MEAS_05: Test of TDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_01.l1v
new file mode 100644
index 0000000..c032c4e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_05]SCH_MEAS_05_1: Test of TDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_02.l1v
new file mode 100644
index 0000000..6a4c9c8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_05]SCH_MEAS_05_2: Test of TDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_03.l1v
new file mode 100644
index 0000000..82a8140
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_05]SCH_MEAS_05_3: Test of TDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_04.l1v
new file mode 100644
index 0000000..483a396
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_05]SCH_MEAS_05_4: Test of TDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_05.l1v
new file mode 100644
index 0000000..8255a74
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_05]SCH_MEAS_05_5: Test of TDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_06.l1v
new file mode 100644
index 0000000..247b84c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_05]SCH_MEAS_05_6: Test of TDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_07.l1v
new file mode 100644
index 0000000..7129038
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_05]SCH_MEAS_05_7: Test of TDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@7
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_08.l1v
new file mode 100644
index 0000000..db8315e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_05]SCH_MEAS_05_8: Test of TDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06.l1v
new file mode 100644
index 0000000..36c776c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_06]SCH_MEAS_06: Test of TDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_01.l1v
new file mode 100644
index 0000000..0d634cd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_06]SCH_MEAS_06_1: Test of TDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_02.l1v
new file mode 100644
index 0000000..30bf3e6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_06]SCH_MEAS_06_2: Test of TDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_03.l1v
new file mode 100644
index 0000000..6874815
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_06]SCH_MEAS_06_3: Test of TDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_04.l1v
new file mode 100644
index 0000000..c11fd3f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_06]SCH_MEAS_06_4: Test of TDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_05.l1v
new file mode 100644
index 0000000..7b90b34
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_06]SCH_MEAS_06_5: Test of TDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_06.l1v
new file mode 100644
index 0000000..bae12c8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_06]SCH_MEAS_06_6: Test of TDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_07.l1v
new file mode 100644
index 0000000..5adf1da
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_06]SCH_MEAS_06_7: Test of TDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@7
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_08.l1v
new file mode 100644
index 0000000..6cb4845
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_06]SCH_MEAS_06_8: Test of TDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07.l1v
new file mode 100644
index 0000000..bfd1d51
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_07]SCH_MEAS_07: Test of 1 FDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_01.l1v
new file mode 100644
index 0000000..07d11e8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_07]SCH_MEAS_07_1: Test of 1 FDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_02.l1v
new file mode 100644
index 0000000..421f35e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_07]SCH_MEAS_07_2: Test of 1 FDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_03.l1v
new file mode 100644
index 0000000..f315d35
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_07]SCH_MEAS_07_3: Test of 1 FDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_04.l1v
new file mode 100644
index 0000000..2cee43d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_07]SCH_MEAS_07_4: Test of 1 FDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_05.l1v
new file mode 100644
index 0000000..0a96e92
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_07]SCH_MEAS_07_5: Test of 1 FDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_06.l1v
new file mode 100644
index 0000000..190a571
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_07]SCH_MEAS_07_6: Test of 1 FDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_07.l1v
new file mode 100644
index 0000000..343c890
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_07]SCH_MEAS_07_7: Test of 1 FDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@7
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_08.l1v
new file mode 100644
index 0000000..26745d1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_07]SCH_MEAS_07_8: Test of 1 FDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08.l1v
new file mode 100644
index 0000000..25a1be2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_08]SCH_MEAS_08: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_01.l1v
new file mode 100644
index 0000000..2710c7c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_08]SCH_MEAS_08_1: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_02.l1v
new file mode 100644
index 0000000..ca8942a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_08]SCH_MEAS_08_2: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_03.l1v
new file mode 100644
index 0000000..9ec63e7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_08]SCH_MEAS_08_3: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_04.l1v
new file mode 100644
index 0000000..9bfad4d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_08]SCH_MEAS_08_4: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_05.l1v
new file mode 100644
index 0000000..6bffd1f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_08]SCH_MEAS_08_5: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_06.l1v
new file mode 100644
index 0000000..8ea7484
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_08]SCH_MEAS_08_6: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_07.l1v
new file mode 100644
index 0000000..d326444
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_08]SCH_MEAS_08_7: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@7
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_08.l1v
new file mode 100644
index 0000000..ea482d9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_08]SCH_MEAS_08_8: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09.l1v
new file mode 100644
index 0000000..f03cf1d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_09]SCH_MEAS_09: Test of 1 FDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_01.l1v
new file mode 100644
index 0000000..e02df16
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_09]SCH_MEAS_09_1: Test of 1 FDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_02.l1v
new file mode 100644
index 0000000..5107474
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_09]SCH_MEAS_09_2: Test of 1 FDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_03.l1v
new file mode 100644
index 0000000..8a2e40f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_09]SCH_MEAS_09_3: Test of 1 FDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_04.l1v
new file mode 100644
index 0000000..290f314
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_09]SCH_MEAS_09_4: Test of 1 FDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_05.l1v
new file mode 100644
index 0000000..be8aa8b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_09]SCH_MEAS_09_5: Test of 1 FDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_06.l1v
new file mode 100644
index 0000000..d0ac914
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_09]SCH_MEAS_09_6: Test of 1 FDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_07.l1v
new file mode 100644
index 0000000..2a21f4f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_09]SCH_MEAS_09_7: Test of 1 FDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@7
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_08.l1v
new file mode 100644
index 0000000..402ffc7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_09]SCH_MEAS_09_8: Test of 1 FDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10.l1v
new file mode 100644
index 0000000..db7afeb
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_10]SCH_MEAS_10: Test of 1 TDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_01.l1v
new file mode 100644
index 0000000..fe281b8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_10]SCH_MEAS_10_1: Test of 1 TDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_02.l1v
new file mode 100644
index 0000000..d4a684c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_10]SCH_MEAS_10_2: Test of 1 TDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_03.l1v
new file mode 100644
index 0000000..1db23d2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_10]SCH_MEAS_10_3: Test of 1 TDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_04.l1v
new file mode 100644
index 0000000..bd61c48
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_10]SCH_MEAS_10_4: Test of 1 TDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_05.l1v
new file mode 100644
index 0000000..a5571f2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_10]SCH_MEAS_10_5: Test of 1 TDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_06.l1v
new file mode 100644
index 0000000..07e13b5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_10]SCH_MEAS_10_6: Test of 1 TDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_07.l1v
new file mode 100644
index 0000000..93d9df5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_10]SCH_MEAS_10_7: Test of 1 TDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@7
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_08.l1v
new file mode 100644
index 0000000..bd51703
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_10]SCH_MEAS_10_8: Test of 1 TDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11.l1v
new file mode 100644
index 0000000..a68cbbf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_11]SCH_MEAS_11: Test of 1 FDD intra + 2 FDD inter(1 CSG) + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_01.l1v
new file mode 100644
index 0000000..e872cad
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_11]SCH_MEAS_11_1: Test of 1 FDD intra + 2 FDD inter(1 CSG) + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_02.l1v
new file mode 100644
index 0000000..229eb57
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_11]SCH_MEAS_11_2: Test of 1 FDD intra + 2 FDD inter(1 CSG) + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_03.l1v
new file mode 100644
index 0000000..eeaa630
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_11]SCH_MEAS_11_3: Test of 1 FDD intra + 2 FDD inter(1 CSG) + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_04.l1v
new file mode 100644
index 0000000..6f39ad5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_11]SCH_MEAS_11_4: Test of 1 FDD intra + 2 FDD inter(1 CSG) + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_05.l1v
new file mode 100644
index 0000000..bf5087c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_11]SCH_MEAS_11_5: Test of 1 FDD intra + 2 FDD inter(1 CSG) + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_06.l1v
new file mode 100644
index 0000000..f32b86a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_11]SCH_MEAS_11_6: Test of 1 FDD intra + 2 FDD inter(1 CSG) + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_07.l1v
new file mode 100644
index 0000000..8195700
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_11]SCH_MEAS_11_7: Test of 1 FDD intra + 2 FDD inter(1 CSG) + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@7
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_08.l1v
new file mode 100644
index 0000000..4ad398d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_11]SCH_MEAS_11_8: Test of 1 FDD intra + 2 FDD inter(1 CSG) + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12.l1v
new file mode 100644
index 0000000..ebb4369
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_12]SCH_MEAS_12: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter(1 CSG) frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_01.l1v
new file mode 100644
index 0000000..e7a4105
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_12]SCH_MEAS_12_1: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter(1 CSG) frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_02.l1v
new file mode 100644
index 0000000..af9a10c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_12]SCH_MEAS_12_2: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter(1 CSG) frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_03.l1v
new file mode 100644
index 0000000..7ae8c7d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_12]SCH_MEAS_12_3: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter(1 CSG) frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_04.l1v
new file mode 100644
index 0000000..f760a4e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_12]SCH_MEAS_12_4: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter(1 CSG) frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_05.l1v
new file mode 100644
index 0000000..cc608d1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_12]SCH_MEAS_12_5: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter(1 CSG) frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_06.l1v
new file mode 100644
index 0000000..9fcfeb4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_12]SCH_MEAS_12_6: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter(1 CSG) frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_07.l1v
new file mode 100644
index 0000000..26dd722
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_12]SCH_MEAS_12_7: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter(1 CSG) frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@7
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_08.l1v
new file mode 100644
index 0000000..52262de
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_12]SCH_MEAS_12_8: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter(1 CSG) frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_Measurement/empty.h.txt b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_Measurement/empty.h.txt
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_Measurement/empty.h.txt
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_01.l1v
new file mode 100644
index 0000000..eef255a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_01:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@1
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_02.l1v
new file mode 100644
index 0000000..e48f7fa
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_02:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@2
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_03.l1v
new file mode 100644
index 0000000..4232c59
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_03:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@3
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_04.l1v
new file mode 100644
index 0000000..09898e6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_04:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@4
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_05.l1v
new file mode 100644
index 0000000..c67cea8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_05:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@5
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_06.l1v
new file mode 100644
index 0000000..f917f51
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_06:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@6
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_07.l1v
new file mode 100644
index 0000000..196f22c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_07:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@7
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_08.l1v
new file mode 100644
index 0000000..169fe57
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_08:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@8
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_09.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_09.l1v
new file mode 100644
index 0000000..28c7f7e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_09.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_09:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@9
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_10.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_10.l1v
new file mode 100644
index 0000000..19953bd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_10.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_10:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@10
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_11.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_11.l1v
new file mode 100644
index 0000000..9835680
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_11.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_11:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@11
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_12.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_12.l1v
new file mode 100644
index 0000000..1d035e6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_12.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_12:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@12
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_13.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_13.l1v
new file mode 100644
index 0000000..745fd11
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_13.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_13:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_14.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_14.l1v
new file mode 100644
index 0000000..9abb958
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_14.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_14:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@14
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_15.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_15.l1v
new file mode 100644
index 0000000..f7e0516
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_15.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_15:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@15
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_16.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_16.l1v
new file mode 100644
index 0000000..71a4280
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_16.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_16:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@16
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_17.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_17.l1v
new file mode 100644
index 0000000..397181b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_17.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_17:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@17
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_18.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_18.l1v
new file mode 100644
index 0000000..de4983d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_18.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_18:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@18
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_19.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_19.l1v
new file mode 100644
index 0000000..e5f8a4c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_19.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_19:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@19
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_20.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_20.l1v
new file mode 100644
index 0000000..ca6889c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_20.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_20:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@20
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_21.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_21.l1v
new file mode 100644
index 0000000..8f0eb08
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_21.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_21:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_22.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_22.l1v
new file mode 100644
index 0000000..fed7ba8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_22.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_22:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@22
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_23.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_23.l1v
new file mode 100644
index 0000000..b7624d9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_23.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_23:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@23
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_24.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_24.l1v
new file mode 100644
index 0000000..bc8ff9b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_24.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_24:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@24
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_25.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_25.l1v
new file mode 100644
index 0000000..fbea16a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_25.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_25:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@25
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_26.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_26.l1v
new file mode 100644
index 0000000..03aea90
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_26.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_26:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@26
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_27.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_27.l1v
new file mode 100644
index 0000000..cfedb72
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_27.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_27:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@27
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_28.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_28.l1v
new file mode 100644
index 0000000..0e816a6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_28.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_28:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@28
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_29.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_29.l1v
new file mode 100644
index 0000000..3df1b73
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_29.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_29:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@29
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_30.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_30.l1v
new file mode 100644
index 0000000..6d7ec7e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_30.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_30:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@30
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_31.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_31.l1v
new file mode 100644
index 0000000..674e129
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_31.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_31:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@31
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_32.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_32.l1v
new file mode 100644
index 0000000..cd1094a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_32.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_32:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@32
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_33.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_33.l1v
new file mode 100644
index 0000000..45c2caf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_33.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_33:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@33
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_34.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_34.l1v
new file mode 100644
index 0000000..c84102d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_34.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_34:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@34
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_35.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_35.l1v
new file mode 100644
index 0000000..042037a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_35.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_35:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@35
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_36.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_36.l1v
new file mode 100644
index 0000000..8715c0b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_36.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_36:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@36
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_37.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_37.l1v
new file mode 100644
index 0000000..842215a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_37.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_37:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@37
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_38.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_38.l1v
new file mode 100644
index 0000000..296be59
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_38.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_38:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@38
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_39.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_39.l1v
new file mode 100644
index 0000000..979559f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_39.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_39:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@39
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_40.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_40.l1v
new file mode 100644
index 0000000..99c9c6c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_40.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_40:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@40
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_41.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_41.l1v
new file mode 100644
index 0000000..c888143
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_41.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_41:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@41
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_42.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_42.l1v
new file mode 100644
index 0000000..c85cd37
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_42.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_42:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@42
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_43.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_43.l1v
new file mode 100644
index 0000000..a553385
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_43.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_43:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@43
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_44.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_44.l1v
new file mode 100644
index 0000000..88f034a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_44.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_44:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@44
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_45.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_45.l1v
new file mode 100644
index 0000000..ae359db
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_45.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_45:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@45
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_46.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_46.l1v
new file mode 100644
index 0000000..e75221e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_46.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_46:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@46
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_47.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_47.l1v
new file mode 100644
index 0000000..b9e00ff
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_47.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_47:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@47
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_48.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_48.l1v
new file mode 100644
index 0000000..4ffb9cf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_48.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_48:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@48
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_49.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_49.l1v
new file mode 100644
index 0000000..c37781d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_49.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_49:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@49
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_50.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_50.l1v
new file mode 100644
index 0000000..0af8dd4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_50.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_50:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@50
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_51.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_51.l1v
new file mode 100644
index 0000000..294e88e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_51.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_51:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@51
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_52.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_52.l1v
new file mode 100644
index 0000000..247017a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_52.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_52:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@52
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_53.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_53.l1v
new file mode 100644
index 0000000..cfd2b55
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_53.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_53:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@53
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_54.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_54.l1v
new file mode 100644
index 0000000..a10b663
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_54.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_54:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@54
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_55.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_55.l1v
new file mode 100644
index 0000000..d8365ab
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_55.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_55:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@55
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_56.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_56.l1v
new file mode 100644
index 0000000..277a376
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_56.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_56:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@56
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_57.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_57.l1v
new file mode 100644
index 0000000..483aa65
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_57.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_57:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@57
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_58.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_58.l1v
new file mode 100644
index 0000000..af71567
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_58.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_58:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@58
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_59.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_59.l1v
new file mode 100644
index 0000000..e83b5c5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_59.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_59:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@59
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_60.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_60.l1v
new file mode 100644
index 0000000..fe55775
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_60.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_60:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@60
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_61.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_61.l1v
new file mode 100644
index 0000000..2ec2840
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_61.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_61:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@61
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_62.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_62.l1v
new file mode 100644
index 0000000..1501836
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_62.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_62:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@62
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_63.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_63.l1v
new file mode 100644
index 0000000..d0203ec
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_63.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_63:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@63
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02.l1v
new file mode 100644
index 0000000..a42a032
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_01.l1v
new file mode 100644
index 0000000..7405ad8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_01.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_01: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_02.l1v
new file mode 100644
index 0000000..de3bb68
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_02.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_02: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_03.l1v
new file mode 100644
index 0000000..bd6928f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_03.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_03: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_04.l1v
new file mode 100644
index 0000000..d9595e8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_04.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_04: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_05.l1v
new file mode 100644
index 0000000..07c2a03
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_05.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_05: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_06.l1v
new file mode 100644
index 0000000..908c700
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_06.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_06: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_07.l1v
new file mode 100644
index 0000000..3fdabba
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_07.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_07: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@7
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_08.l1v
new file mode 100644
index 0000000..770a3f1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_08.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_08: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_09.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_09.l1v
new file mode 100644
index 0000000..94dacf2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_09.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_09: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@9
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_10.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_10.l1v
new file mode 100644
index 0000000..0d81e81
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_10.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_10: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@10
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_11.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_11.l1v
new file mode 100644
index 0000000..5c7a8b2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_11.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_11: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@11
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_12.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_12.l1v
new file mode 100644
index 0000000..87b7928
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_12.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_12: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@12
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_13.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_13.l1v
new file mode 100644
index 0000000..a385ab9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_13.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_13: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_14.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_14.l1v
new file mode 100644
index 0000000..ec3c945
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_14.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_14: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@14
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_15.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_15.l1v
new file mode 100644
index 0000000..0101c5a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_15.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_15: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@15
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_16.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_16.l1v
new file mode 100644
index 0000000..7022988
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_16.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_16: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@16
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_17.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_17.l1v
new file mode 100644
index 0000000..f564007
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_17.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_17: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@17
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_18.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_18.l1v
new file mode 100644
index 0000000..0b15a1e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_18.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_18: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@18
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_19.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_19.l1v
new file mode 100644
index 0000000..0fb0497
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_19.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_19: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@19
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_20.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_20.l1v
new file mode 100644
index 0000000..2278aa8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_20.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_20: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@20
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_21.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_21.l1v
new file mode 100644
index 0000000..2406f69
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_21.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_21: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_22.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_22.l1v
new file mode 100644
index 0000000..073d5b7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_22.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_22: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@22
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_23.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_23.l1v
new file mode 100644
index 0000000..5719a50
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_23.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_23: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@23
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_24.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_24.l1v
new file mode 100644
index 0000000..355d573
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_24.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_24: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@24
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_25.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_25.l1v
new file mode 100644
index 0000000..9916d8e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_25.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_25: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@25
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_26.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_26.l1v
new file mode 100644
index 0000000..ea5efbd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_26.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_26: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@26
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_27.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_27.l1v
new file mode 100644
index 0000000..c7c48c9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_27.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_27: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@27
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_28.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_28.l1v
new file mode 100644
index 0000000..9d87521
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_28.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_28: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@28
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_03.l1v
new file mode 100644
index 0000000..73f5f71
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_03.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_03: DL with TM9 tset (FDD cell)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_TRX_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_04.l1v
new file mode 100644
index 0000000..f3e4e7f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_04: DL with TM9 tset (TDD cell)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@1
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_GAP.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_GAP.l1v
new file mode 100644
index 0000000..719f2ee
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_GAP.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_GAP:: Test of FDD TRX with gap config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_GAP
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_gap_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_GAP_FDD_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_GAP_FDD_01.l1v
new file mode 100644
index 0000000..ee8fc6b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_GAP_FDD_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_GAP_FDD_01: Test of FDD TRX with gap config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_GAP
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_gap_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~2
+@1
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_GAP_FDD_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_GAP_FDD_02.l1v
new file mode 100644
index 0000000..5ad01c4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_GAP_FDD_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_GAP_FDD_02: Test of FDD TRX with gap config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_GAP
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_gap_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~2
+@2
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/Common_Params_Setup.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/Common_Params_Setup.l1v
new file mode 100644
index 0000000..cf3a326
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/Common_Params_Setup.l1v
@@ -0,0 +1,49 @@
+{ Validation }
+Title = "[R9_LTE]00_Common_Parameter_Setup"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_COMMON_PARAMS_SETUP
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ l1edps_inject_bitmap_struct injectBitmap;
+ EARFCN dlEarfcn;
+ kal_uint16 physCellId;
+ el1_bandwidth_enum mibDlBandwidth;
+ el1_ch_antn_port_num_enum antennaPortNum;
+ el1_bandwidth_enum sib2UlBandwidth;
+} l1edps_common_params_setup_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[injectBitmap] "injectBitmap"
+@INJECT_BMP_NONE
+
+[dlEarfcn] "dlEarfcn"
+@0
+
+[physCellId] "physCellId"
+@0xFFFF
+
+[mibDlBandwidth] "mibDlBandwidth"
+@BW_100_RB
+
+[antennaPortNum] "antennaPortNum"
+@EL1_CH_ANTN_PORT_NUM_1
+
+[sib2UlBandwidth] "sib2UlBandwidth"
+@BW_100_RB
+
diff --git a/mcu/service/dhl/database/l1validation_db/dps_Test_Stop.l1v b/mcu/service/dhl/database/l1validation_db/dps_Test_Stop.l1v
new file mode 100755
index 0000000..d40908d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/dps_Test_Stop.l1v
@@ -0,0 +1,13 @@
+{ Validation }
+Title = "Stop Currently Running Test"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_TEST_STOP2_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct {
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+}dps_test_stop2_req_struct;
+*/
+
+{Parameters}
diff --git a/mcu/service/dhl/database/l1validation_db/dummy.l1v b/mcu/service/dhl/database/l1validation_db/dummy.l1v
new file mode 100755
index 0000000..4ab14be
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/dummy.l1v
@@ -0,0 +1,7 @@
+{ Validation }
+Title = "Dummy Test"
+ModuleID = MOD_TST
+MsgID = MSG_ID_TST_INJECT_STRING
+
+{ Parameters }
+
diff --git a/mcu/service/dhl/database/l1validation_db/l1v_db.c b/mcu/service/dhl/database/l1validation_db/l1v_db.c
new file mode 100644
index 0000000..c75b1a6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/l1v_db.c
@@ -0,0 +1,1137 @@
+/********************************************************************************************
+ * LEGAL DISCLAIMER
+ *
+ * (Header of MediaTek Software/Firmware Release or Documentation)
+ *
+ * BY OPENING OR USING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE") RECEIVED
+ * FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON AN "AS-IS" BASIS
+ * ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES, EXPRESS OR IMPLIED,
+ * INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR
+ * A PARTICULAR PURPOSE OR NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY
+ * WHATSOEVER WITH RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK
+ * ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+ * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S SPECIFICATION
+ * OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+ *
+ * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE LIABILITY WITH
+ * RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION,
+ *
+ * TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE
+ * FEES OR SERVICE CHARGE PAID BY BUYER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE WITH THE LAWS
+ * OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF LAWS PRINCIPLES.
+ ************************************************************************************************/
+
+
+/*******************************************************************************
+ *
+ * Filename:
+ * ---------
+ * l1v_db.c
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * This file used for pre-processing to build L1V DB
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
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+ *
+ * removed!
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+ *
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+ * removed!
+ * removed!
+ * removed!
+ *
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+ * removed!
+ * removed!
+ * removed!
+ *
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+ *
+ * removed!
+ * removed!
+ * removed!
+ *
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+ * removed!
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+ *
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+ * removed!
+ * removed!
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+ * removed!
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+ *
+ * removed!
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+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
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+ *
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+ *
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+ *
+ * removed!
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+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ * How to add a new gv script
+ * 1. Put the l1v script into the proper folder e.g: \dhl\database\l1validation_db
+ *
+ * 2. #include "xxx.l1v".
+ *
+ *******************************************************************************/
+
+#ifdef STDC_HEADERS
+#undef STDC_HEADERS //it will include stdio.h
+#endif
+
+#ifdef __UMTS_RAT__
+//For 3G Project, please include your header here, e.g: #include "dps_D1_MT_call.l1v"
+//Please put your gv files to \dhl\database\l1validation_db\
+
+#include "0_3G_Single_Channel/1_Idle/udps_I1_Initial_Cell_Search.l1v"
+#include "0_3G_Single_Channel/1_Idle/udps_I2_SFN_Read_SIB_Listen.l1v"
+#include "0_3G_Single_Channel/1_Idle/udps_I3_Paging_Response.l1v"
+#include "0_3G_Single_Channel/1_Idle/udps_I4_Target_Cell_Search.l1v"
+#include "0_3G_Single_Channel/1_Idle/udps_I10_UL1D_CS_Test.l1v"
+#include "0_3G_Single_Channel/1_Idle/udps_I12_pch_measurement_8960.l1v"
+#include "0_3G_Single_Channel/1_Idle/udps_I13_Continual_ICS.l1v"
+#include "0_3G_Single_Channel/2_Access/udps_A1_UL_Open_Loop_Pwr_Ctrl.l1v"
+#include "0_3G_Single_Channel/2_Access/udps_A2_Tx_On_Off_Time_Mask.l1v"
+#include "0_3G_Single_Channel/2_Access/udps_A3_Rx_ACK_on_AICH.l1v"
+#include "0_3G_Single_Channel/2_Access/udps_A4_Rx_No_ACK_on_AICH.l1v"
+#include "0_3G_Single_Channel/2_Access/udps_A5_Rx_NACK_on_AICH.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC12.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC144.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC384.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC64.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/CD10/udps_CD10_DL_Pwr_Ctrl_Const_BLER_RMC12.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/CD10/udps_CD10_DL_Pwr_Ctrl_Const_BLER_RMC64.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/CD13/udps_CD13_Pef_in_SHO_RMC12.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/CD13/udps_CD13_Pef_in_SHO_RMC64.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD01_UL_Inner_Loop_Pwr_Ctrl.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD02_Out_of_Sync_Handling.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD03_Change_of_TFC.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD04_UL_Compressed_Mode.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD09_Pef_in_TX_Div_Mode.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD11_Pef_in_DL_Compressed_Mode.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD12_Pef_of_BTFD.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD14_Pef_of_TPC_Combining.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD15_Pef_in_SSDT_Pwr_Ctrl.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD16_Active_Set_Update_Delay.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD17_TX_Timing_in_SHO.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD18_Intra_Freq_TRHHO_Delay.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD19_Inter_Freq_TRHHO_Delay.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD20_RRC_Re_estab_Delay.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD21_Inter_Freq_TMHHO.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD22_Inter_Freq_TRHHO_Revert.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD23_Inter_Freq_TMHHO_Revert.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD24_abort_enter_DCH.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD39_BER_test_in_DCH_mode.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD40_SADCH_TTI_eighty.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD41_SADCH_TTI_eighty_with_CM.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD50.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD51_DCH_FACH_transition.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_AMR_LoRx01.l1v"
+#include "0_3G_Single_Channel/udps_Test_Stop.l1v"
+#include "1_3G_Single_Meas/udps_CRS1_Inter_Freq_Crs_in_Idle.l1v"
+#include "1_3G_Single_Meas/udps_CRS2_Intra_Freq_Crs_in_Fach.l1v"
+#include "1_3G_Single_Meas/udps_CRS3_Inter_Freq_Crs_in_Fach.l1v"
+#include "1_3G_Single_Meas/udps_M01_Intra_Freq_Reporting_Delay.l1v"
+#include "1_3G_Single_Meas/udps_M03_Inter_Freq_Reporting_Delay.l1v"
+#include "1_3G_Single_Meas/udps_M04_Abs_Intra_Freq_Cpich_Rscp.l1v"
+#include "1_3G_Single_Meas/udps_M05_Rel_Intra_Freq_Cpich_Rscp.l1v"
+#include "1_3G_Single_Meas/udps_M06_Rel_Inter_Freq_Cpich_Rscp.l1v"
+#include "1_3G_Single_Meas/udps_M07_Abs_Intra_Freq_Cpich_Ecio.l1v"
+#include "1_3G_Single_Meas/udps_M08_Rel_Intra_Freq_Cpich_Ecio.l1v"
+#include "1_3G_Single_Meas/udps_M09_Rel_Inter_Freq_Cpich_Ecio.l1v"
+#include "1_3G_Single_Meas/udps_M10_Abs_Utra_Carrier_Rssi.l1v"
+#include "1_3G_Single_Meas/udps_M11_Rel_Utra_Carrier_Rssi.l1v"
+#include "1_3G_Single_Meas/udps_M12_Intra_Freq_Sfn_Cfn_Diff.l1v"
+#include "1_3G_Single_Meas/udps_M13_Inter_Freq_Sfn_Cfn_Diff.l1v"
+#include "1_3G_Single_Meas/udps_M14_Sfn_Sfn_Diff_Type1.l1v"
+#include "1_3G_Single_Meas/udps_M15_UE_Tx_Power.l1v"
+#include "2_3G_Dual_Mode/udps_GM1_Gsm_Meas_in_Null.l1v"
+#include "2_3G_Dual_Mode/udps_GM2_Gsm_Meas_in_Idle.l1v"
+#include "2_3G_Dual_Mode/udps_GM3_Gsm_Meas_in_Fach.l1v"
+#include "2_3G_Dual_Mode/udps_GM4_Gsm_Reporting_Delay.l1v"
+#include "2_3G_Dual_Mode/udps_GM5_Gsm_Reporting_Delay_No_Bsic.l1v"
+#include "2_3G_Dual_Mode/udps_GM6_Abs_Gsm_Carrier_Rssi.l1v"
+#include "2_3G_Dual_Mode/udps_UM1_Wcdma_Meas_in_Scan.l1v"
+#include "2_3G_Dual_Mode/udps_UM2_Wcdma_Meas_in_Idle.l1v"
+#include "2_3G_Dual_Mode/udps_UM3_Wcdma_Meas_in_Dedi.l1v"
+#include "2_3G_Dual_Mode/udps_UM4_Wcdma_Meas_in_Pidle.l1v"
+#include "2_3G_Dual_Mode/udps_UM5_Wcdma_Meas_in_Ptx.l1v"
+#include "2_3G_Dual_Mode/udps_IRT1_Gsm_Crs_to_Umts.l1v"
+#include "2_3G_Dual_Mode/udps_IRT2_Umts_Crs_to_Gsm.l1v"
+#include "2_3G_Dual_Mode/udps_IRT3_Gsm_Hho_to_Umts.l1v"
+#include "3_3G_CSD_Request/udps_I5_PCH_reading_on_STTD_Cell.l1v"
+#include "3_3G_CSD_Request/udps_I6_Pch_Receive.l1v"
+#include "3_3G_CSD_Request/udps_I8_Recursive_TCS_in_PCH.l1v"
+#include "3_3G_CSD_Request/udps_I9_Recursive_ICS_in_NULL.l1v"
+#include "3_3G_CSD_Request/udps_I11_Recursive_IPS_in_NULL.l1v"
+#include "3_3G_CSD_Request/udps_A6_Best_Effort_for_PRACH.l1v"
+#include "3_3G_CSD_Request/udps_A7_Recursive_TCS_in_FACH.l1v"
+#include "3_3G_CSD_Request/udps_CD25_Recursive_TCS_in_DCH.l1v"
+#include "3_3G_CSD_Request/udps_CD26_Unknown_SFN_Decoding_in_DCH.l1v"
+#include "3_3G_CSD_Request/udps_CD28_TPC_Combining_Reliable_Test.l1v"
+#include "3_3G_CSD_Request/udps_CD31_SIR_Meas_In_DCH_with_TXTD_CM.l1v"
+#include "3_3G_CSD_Request/udps_CD32_DLPC_Test_Wind_Up_Down.l1v"
+#include "3_3G_CSD_Request/udps_CD33_Pef_of_TrCH_Reconfig.l1v"
+#include "3_3G_CSD_Request/udps_CD34_DLPC_for_Diff_TF.l1v"
+#include "3_3G_CSD_Request/udps_CD35_DLPC_for_BTFD_Dual_TF.l1v"
+#include "3_3G_CSD_Request/udps_CD36_DLPC_for_TFCI_Dual_TF.l1v"
+#include "3_3G_CSD_Request/udps_CD37_DLPC_Test_Initial_Convergence.l1v"
+#include "3_3G_CSD_Request/udps_CD38_ULPC_for_TX_AGC_test.l1v"
+#include "3_3G_CSD_Request/udps_M16_all_meas_statistic.l1v"
+#include "3_3G_CSD_Request/udps_UM6_Recursive_TCS_in_2G_Idle.l1v"
+#include "3_3G_CSD_Request/udps_UM7_Recursive_TCS_in_2G_Dedi.l1v"
+#include "11_HSDPA/udps_DPAS_SL1.l1v"
+#include "11_HSDPA/udps_DPAS_SL2.l1v"
+#include "11_HSDPA/udps_DPAS_SL3.l1v"
+#include "11_HSDPA/udps_DPAS_SL4.l1v"
+#include "11_HSDPA/udps_DPAS_SL5.l1v"
+#include "11_HSDPA/udps_DPAS_SL6.l1v"
+#include "11_HSDPA/udps_DPAS_SL7.l1v"
+#include "11_HSDPA/udps_DPAS_SL8.l1v"
+#include "11_HSDPA/udps_DPAS_SL9.l1v"
+#include "11_HSDPA/udps_DPAS_SL10.l1v"
+#include "11_HSDPA/udps_DPAS_SL11.l1v"
+#include "11_HSDPA/udps_DPAS_SL12.l1v"
+#include "11_HSDPA/udps_DPAS_SL13.l1v"
+#include "11_HSDPA/udps_DPAS_CC1.l1v"
+#include "11_HSDPA/udps_DPAS_CC2.l1v"
+#include "11_HSDPA/udps_DPAS_CC3.l1v"
+#include "11_HSDPA/udps_DPAS_CC4.l1v"
+#include "11_HSDPA/udps_DPAS_CC5.l1v"
+#include "11_HSDPA/udps_DPAS_CC6.l1v"
+#include "11_HSDPA/udps_DPAS_TGPS1.l1v"
+#include "11_HSDPA/udps_DPAS_TGPS2.l1v"
+#include "11_HSDPA/udps_DPAS_MEAS1.l1v"
+#include "11_HSDPA/udps_DPAS_MEAS2.l1v"
+#include "11_HSDPA/udps_DPAS_MEAS3.l1v"
+#include "11_HSDPA/udps_DPAS_OCIC1.l1v"
+#include "11_HSDPA/udps_DPAS_OCIC2.l1v"
+#include "11_HSDPA/udps_DPAS02_OCIC.l1v"
+#include "11_HSDPA/udps_DPAS08_1.l1v"
+#include "11_HSDPA/udps_DPAF01.l1v"
+#include "11_HSDPA/udps_DPAF02.l1v"
+#include "11_HSDPA/udps_DPAF03.l1v"
+#include "11_HSDPA/udps_DPAF04.l1v"
+#include "11_HSDPA/udps_DPAF07.l1v"
+#include "11_HSDPA/udps_DPAF08.l1v"
+#include "11_HSDPA/udps_DPAF09.l1v"
+#include "11_HSDPA/udps_DPAF10.l1v"
+#include "11_HSDPA/udps_DPAF11.l1v"
+#include "11_HSDPA/udps_DPAF11_1.l1v"
+#include "11_HSDPA/udps_DPAF12.l1v"
+#include "11_HSDPA/udps_DPAF13.l1v"
+#include "11_HSDPA/udps_DPAF14.l1v"
+#include "11_HSDPA/udps_DPAF15.l1v"
+#include "11_HSDPA/1_FDDTest_8960/udps_DPAS_FDD_Test1.l1v"
+#include "11_HSDPA/1_FDDTest_8960/udps_DPAS_FDD_Test2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN01_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN01_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN02_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN02_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN03_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN03_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN04_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN04_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN05_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN05_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN06_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN06_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN07_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN07_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN08_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN08_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN09_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN09_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN10_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN10_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN11_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN11_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN12_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN12_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN13_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN13_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN14_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN14_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN15_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN15_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN16.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN17_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN17_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN18_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN18_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN19_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN19_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN20.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN21.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN22.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN90_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN90_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN91_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN91_2.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW01_1.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW01_2.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW02.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW03.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW04.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW05.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW06_1.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW06_2.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW06_3.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW07_1.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW07_2.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW07_3.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW08_1.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW08_2.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW08_3.l1v"
+#include "12_HSUPA_R6/3_CM/udps_R6_CM01_1.l1v"
+#include "12_HSUPA_R6/3_CM/udps_R6_CM01_2.l1v"
+#include "12_HSUPA_R6/3_CM/udps_R6_CM02_1.l1v"
+#include "12_HSUPA_R6/3_CM/udps_R6_CM02_2.l1v"
+#include "12_HSUPA_R6/3_CM/udps_R6_CM03_1.l1v"
+#include "12_HSUPA_R6/3_CM/udps_R6_CM03_2.l1v"
+#include "12_HSUPA_R6/3_CM/udps_R6_CM04.l1v"
+#include "12_HSUPA_R6/3_CM/udps_R6_CM05_1.l1v"
+#include "12_HSUPA_R6/3_CM/udps_R6_CM05_2.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI01_1.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI01_2.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI02_1.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI02_2.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI03_1.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI03_2.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI04_1.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI04_2.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG01_1.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG01_2.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG02.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG03_1.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG03_2.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG04_1.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG04_2.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG01_1.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG01_2.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG02_1.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG02_2.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG03_1.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG03_2.l1v"
+#include "12_HSUPA_R6/5_E_TFC/udps_R6_TF01_1.l1v"
+#include "12_HSUPA_R6/5_E_TFC/udps_R6_TF01_2.l1v"
+#include "12_HSUPA_R6/5_E_TFC/udps_R6_TF02_1.l1v"
+#include "12_HSUPA_R6/5_E_TFC/udps_R6_TF02_2.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CD01_1.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI01_1.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI01_2.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI02_1.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI02_2.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI03_1.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI03_2.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI04_1.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI04_2.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG01_1.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG01_2.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG02.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG03_1.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG03_2.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG04_1.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG04_2.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG01_1.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG01_2.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG02_1.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG02_2.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_PW02.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_PW03.l1v"
+#include "12_HSUPA_R6/7_AGL8960/udps_R6_AGL01_1.l1v"
+#include "12_HSUPA_R6/7_AGL8960/udps_R6_AGL01_2.l1v"
+#include "12_HSUPA_R6/7_AGL8960/udps_R6_AGL02_1.l1v"
+#include "12_HSUPA_R6/7_AGL8960/udps_R6_AGL02_2.l1v"
+#include "12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_1_ACK.l1v"
+#include "12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_1_FALSE_ACK.l1v"
+#include "12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_2_ACK.l1v"
+#include "12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_2_FALSE_ACK.l1v"
+#include "12_HSUPA_R6/7_AGL8960/udps_R6_AGL_AG01_1.l1v"
+#include "12_HSUPA_R6/7_AGL8960/udps_R6_AGL_AG01_2.l1v"
+#include "12_HSUPA_R6/8_MEAS/udps_R6_ME01_1.l1v"
+#include "12_HSUPA_R6/8_MEAS/udps_R6_ME01_2.l1v"
+#include "12_HSUPA_R6/8_MEAS/udps_R6_ME02_1.l1v"
+#include "12_HSUPA_R6/8_MEAS/udps_R6_ME02_2.l1v"
+#include "12_HSUPA_R6/8_MEAS/udps_R6_ME02_3.l1v"
+#include "12_HSUPA_R6/8_MEAS/udps_R6_ME03_1.l1v"
+#include "12_HSUPA_R6/8_MEAS/udps_R6_ME03_2.l1v"
+#include "12_HSUPA_R6/8_MEAS/udps_R6_ME03_3.l1v"
+#include "13_R7R8/DpsTest_R7_HSDPA_01.l1v"
+#include "13_R7R8/DpsTest_R7_HSDPA_02.l1v"
+#include "13_R7R8/DpsTest_R7_HSDPA_03.l1v"
+#include "13_R7R8/DpsTest_R7_HSDPA_04.l1v"
+#include "13_R7R8/DpsTest_R7_HSDPA_05.l1v"
+#include "13_R7R8/DpsTest_R7_HSDPA_06.l1v"
+#include "13_R7R8/DpsTest_R7_HSDPA_07.l1v"
+#include "13_R7R8/DpsTest_R7_HSDPA_08.l1v"
+#include "13_R7R8/udps_R7_TF01_1.l1v"
+#include "13_R7R8/udps_R7_TF01_2.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_01.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_02.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_03.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_04.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_05.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_06.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_07.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_08.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_09.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_10.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_11.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_12.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_13.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_14.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_15.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_16.l1v"
+#include "13_R7R8/DpsTest_R7_FDPCH_01.l1v"
+#include "13_R7R8/DpsTest_R7_FDPCH_02.l1v"
+#include "13_R7R8/DpsTest_R7_FDPCH_03.l1v"
+#include "13_R7R8/DpsTest_R7_FDPCH_04.l1v"
+#include "13_R7R8/DpsTest_R7_FDPCH_05.l1v"
+#include "13_R7R8/DpsTest_R7_EFACH_01.l1v"
+#include "13_R7R8/DpsTest_R7_EFACH_02.l1v"
+#include "13_R7R8/DpsTest_R7_EFACH_03.l1v"
+#include "13_R7R8/DpsTest_R7_EFACH_04.l1v"
+#include "13_R7R8/DpsTest_R7_EFACH_05.l1v"
+#include "13_R7R8/DpsTest_R7_EFACH_06.l1v"
+#include "13_R7R8/DpsTest_R7_EFACH_07.l1v"
+#include "13_R7R8/DpsTest_R8_CEDCH_01.l1v"
+#include "13_R7R8/DpsTest_R8_CEDCH_02.l1v"
+#include "13_R7R8/DpsTest_R8_CEDCH_03.l1v"
+#include "13_R7R8/DpsTest_R8_CEDCH_04.l1v"
+#include "13_R7R8/DpsTest_R8_CEDCH_05.l1v"
+#include "13_R7R8/DpsTest_R8_CEDCH_06.l1v"
+#include "13_R7R8/DpsTest_R8_CEDCH_07.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_01.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_02.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_03.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_04.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_05.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_06.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_07.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_08.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_09.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_10.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_11.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_12.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_13.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_14.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_15.l1v"
+#include "13_R7R8/DpsTest_R8_FACHDRX_01.l1v"
+#include "13_R7R8/DpsTest_R8_FACHDRX_02.l1v"
+#include "13_R7R8/DpsTest_R8_FACHDRX_03.l1v"
+#include "13_R7R8/DpsTest_R8_LessMode_01.l1v"
+#include "13_R7R8/DpsTest_R8_LessMode_02.l1v"
+#include "13_R7R8/DpsTest_R8_LessMode_03.l1v"
+#include "13_R7R8/DpsTest_R8_LessMode_04.l1v"
+#include "13_R7R8/DpsTest_R8_LessMode_05.l1v"
+#include "13_R7R8/DpsTest_R8_M1.l1v"
+#include "13_R7R8/DpsTest_R8_M2.l1v"
+#include "13_R7R8/DpsTest_R8_M3.l1v"
+#include "13_R7R8/DpsTest_R8_M4.l1v"
+#include "13_R7R8/DpsTest_R8_M5.l1v"
+#include "13_R7R8/DpsTest_R8_M6.l1v"
+#include "13_R7R8/DpsTest_R8_M7.l1v"
+#include "13_R7R8/DpsTest_R8_M8.l1v"
+#include "13_R7R8/DpsTest_R8_M9.l1v"
+#include "13_R7R8/DpsTest_R8_M10.l1v"
+#include "13_R7R8/DpsTest_R8_MCPC1_01.l1v"
+#include "13_R7R8/DpsTest_R8_MCPC1_02.l1v"
+#include "13_R7R8/DpsTest_R8_MCPC2_01.l1v"
+#include "13_R7R8/DpsTest_R8_MCPC2_02.l1v"
+#include "13_R7R8/DpsTest_R8_CRS1.l1v"
+#include "13_R7R8/DpsTest_R8_CRS2.l1v"
+#include "15_R9R10/udps_R9_DB_DCHSDPA_01.l1v"
+#include "15_R9R10/udps_R9_TF_01.l1v"
+#include "15_R9R10/udps_R9_dchsupa_01.l1v"
+#include "15_R9R10/udps_R9_dchsupa_02.l1v"
+#include "15_R9R10/udps_R9_dchsupa_03.l1v"
+#include "15_R9R10/udps_R9_dchsupa_04.l1v"
+#include "15_R9R10/udps_R9_dchsupa_05.l1v"
+#include "15_R9R10/udps_R9_dchsupa_06.l1v"
+#include "15_R9R10/udps_R9_dchsupa_07.l1v"
+#include "15_R9R10/udps_R9_dchsupa_08.l1v"
+#include "15_R9R10/udps_R9_dchsupa_09.l1v"
+#include "15_R9R10/udps_R9_pw01.l1v"
+#include "15_R9R10/udps_R9_pw02.l1v"
+#include "15_R9R10/udps_R9_pw03.l1v"
+#include "15_R9R10/udps_R9_pw04.l1v"
+#include "15_R9R10/udps_R9_pw05.l1v"
+#include "15_R9R10/udps_R9_tgps_01.l1v"
+#include "15_R9R10/udps_R9_hi01.l1v"
+#include "15_R9R10/udps_R9_rg01.l1v"
+#include "15_R9R10/udps_R9_ag01.l1v"
+#include "15_R9R10/udps_R9_ag02.l1v"
+#include "15_R9R10/udps_R9_cpc_01.l1v"
+#include "15_R9R10/udps_R9_cpc_02.l1v"
+#include "15_R9R10/udps_R9_cpc_03.l1v"
+#include "15_R9R10/udps_R9_cpc_04.l1v"
+#include "15_R9R10/udps_R9_cpc_05.l1v"
+#include "15_R9R10/udps_R9_cpc_06.l1v"
+#include "15_R9R10/udps_R9_cpc_07.l1v"
+#include "15_R9R10/udps_R9_cpc_08.l1v"
+#include "15_R9R10/udps_R9_cpc_09.l1v"
+#include "15_R9R10/udps_R9_cpc_10.l1v"
+#include "15_R9R10/udps_R9_cpc_11.l1v"
+#include "15_R9R10/udps_R10_3chsdpa_01.l1v"
+#include "15_R9R10/udps_R10_3chsdpa_02.l1v"
+#include "15_R9R10/udps_R10_3chsdpa_03.l1v"
+#include "15_R9R10/udps_R10_3chsdpa_04.l1v"
+#include "15_R9R10/udps_R10_3chsdpa_05.l1v"
+#include "15_R9R10/udps_R10_3chsdpa_06.l1v"
+#include "15_R9R10/udps_R10_3chsdpa_07.l1v"
+#include "15_R9R10/udps_R10_3chsdpa_08.l1v"
+#include "15_R9R10/udps_R10_lessmode_01.l1v"
+#include "15_R9R10/udps_R10_lessmode_02.l1v"
+#include "15_R9R10/udps_R10_lessmode_03.l1v"
+#include "15_R9R10/udps_R10_m01.l1v"
+#include "15_R9R10/udps_R10_m02.l1v"
+#include "15_R9R10/udps_R10_m03.l1v"
+#include "15_R9R10/udps_R10_m04.l1v"
+#endif //__UMTS_RAT__
+
+
+
+
+
+//For GSM/GPRS Project, please include your header here, e.g: #include "dps_D1_MT_call.l1v"
+//Please put your gv files to \dhl\database\l1validation_db
+
+#ifdef __GSM_RAT__
+
+#include "4_2G_FT/dps_FT1_PowerScanWithStoredList.l1v"
+#ifdef __PS_SERVICE__ // Jeff Lee 20100331
+#include "4_2G_FT/dps_FT2_CCCh_nonSig_FT.l1v"
+#endif /* __PS_SERVICE__ */
+#include "4_2G_FT/dps_FT3_CCCh_Comb_Page_Reorg.l1v"
+#include "5_2G_Scan/dps_S1_PowerScan.l1v"
+#include "5_2G_Scan/dps_S2_FBSBsearch.l1v"
+#include "5_2G_Scan/dps_S3_repeated_FBSB.l1v"
+#include "5_2G_Scan/dps_S4_BCCH_SI_receive.l1v"
+#include "6_2G_Idle/dps_I1_RepeatCampOn.l1v"
+#include "6_2G_Idle/dps_I2_EnterIdleState.l1v"
+#include "6_2G_Idle/dps_I3_SC_Test.l1v"
+#include "6_2G_Idle/dps_I4_CBCH_receive.l1v"
+#include "6_2G_Idle/dps_I5_LocUpdate.l1v"
+#include "7_2G_Dedicated/dps_D1_MT_call.l1v"
+#include "7_2G_Dedicated/dps_D2_MO_call.l1v"
+#ifdef __PS_SERVICE__ // Jeff Lee 20100331
+#include "8_2G_Pkt_Idle/dps_PI1_CCCh_Pkt_Idle1.l1v"
+#include "8_2G_Pkt_Idle/dps_PI2_CCCh_Pkt_Idle2.l1v"
+#include "8_2G_Pkt_Idle/dps_PI3_CCCh_Idle_Read_Pbcch.l1v"
+#include "8_2G_Pkt_Idle/dps_PI4_PCCCh_Pkt_Idle.l1v"
+#include "8_2G_Pkt_Idle/dps_PI5_PCCCh_Pkt_Idle_Pbcch_Update.l1v"
+#include "8_2G_Pkt_Idle/dps_PI6_PCCCh_Pkt_Idle_SC_Test.l1v"
+#include "8_2G_Pkt_Idle/dps_PI7_PCCCh_Pkt_Idle_SC_Test_Pbcch_Update.l1v"
+#include "8_2G_Pkt_Idle/dps_PI8_PCCCh_NCMeas.l1v"
+#include "8_2G_Pkt_Idle/dps_PI9_PCCCh_ExtMeas.l1v"
+#include "8_2G_Pkt_Idle/dps_PI10_CCCh_Pkt_Idle_SC_Test.l1v"
+#include "8_2G_Pkt_Idle/dps_PI11_CCChNCMeas.l1v"
+#include "8_2G_Pkt_Idle/dps_PI12_CCChExtMeas.l1v"
+#include "8_2G_Pkt_Idle/dps_PI13_CCCh_Gprs_Attach_One_Phase.l1v"
+#include "8_2G_Pkt_Idle/dps_PI14_CCCh_Gprs_Attach_Two_Phase.l1v"
+#include "8_2G_Pkt_Idle/dps_PI15_PCCCh_Gprs_Attach_One_Phase.l1v"
+#include "8_2G_Pkt_Idle/dps_PI16_PCCCh_Gprs_Attach_Two_Phase.l1v"
+#ifdef __EGPRS_MODE__ // Jeff Lee 20100331
+#include "8_2G_Pkt_Idle/dps_PI17_CCCh_Egprs_Attach_One_Phase.l1v"
+#include "8_2G_Pkt_Idle/dps_PI19_CCCh_Egprs_Attach_Two_Phase.l1v"
+#include "8_2G_Pkt_Idle/dps_PI20_PCCCh_Egprs_Attach_One_Phase.l1v"
+#include "8_2G_Pkt_Idle/dps_PI22_PCCCh_Egprs_Attach_Two_Phase.l1v"
+#endif /* __EGPRS_MODE__ */
+#include "9_2G_Pkt_Transfer/dps_PT8_Serving_PBCCh_Update_During_TBF.l1v"
+#include "9_2G_Pkt_Transfer/dps_PT9_CCCh_TBF_SC_Test.l1v"
+#include "9_2G_Pkt_Transfer/dps_PT10-1_CCCh_Nbr_PBCCh_Update_During_TBF.l1v"
+#include "9_2G_Pkt_Transfer/dps_PT10-2_PCCCh_Nbr_PBCCh_Update_During_TBF.l1v"
+#include "9_2G_Pkt_Transfer/dps_PT11_CCCh_ICMP.l1v"
+#include "9_2G_Pkt_Transfer/dps_PT12_CCCh_nonSignaling.l1v"
+#ifdef __EGPRS_MODE__ // Jeff Lee 20100331
+#include "9_2G_Pkt_Transfer/dps_PT16_CCCH_Egprs_TBF_NBCCH_Req.l1v"
+#include "9_2G_Pkt_Transfer/dps_PT17_CCCH_Egprs_TBF_NPBCCH_Req.l1v"
+#include "9_2G_Pkt_Transfer/dps_PT18_PCCCh_Egprs_TBF_NPBCCH_Req.l1v"
+#endif /* __EGPRS_MODE__ */
+#endif /* __PS_SERVICE__ */
+#include "10_2G_L1D/dps_l1d_lp1.l1v"
+#include "10_2G_L1D/dps_l1d_lp2.l1v"
+#include "10_2G_L1D/dps_l1d_lp3.l1v"
+#include "10_2G_L1D/dps_l1d_lp5_23.l1v"
+#include "10_2G_L1D/dps_l1d_lp5.l1v"
+#include "10_2G_L1D/dps_l1d_lp6.l1v"
+#include "10_2G_L1D/dps_l1d_lp7.l1v"
+#include "10_2G_L1D/dps_l1d_lp8.l1v"
+
+#include "dps_Test_Stop.l1v"
+#endif //__GSM_RAT__
+
+#include "dummy.l1v"
+
+#if defined(__LTE_RAT__) && defined(__L1EDPS_ENABLE__)
+#include "R9_LTE/Common_Params_Setup.l1v"
+#include "R9_LTE/01_NOCH/NOCH_RESET_01.l1v"
+#include "R9_LTE/01_NOCH/NOCH_CSR_01.l1v"
+#include "R9_LTE/01_NOCH/NOCH_CSR_02.l1v"
+#include "R9_LTE/01_NOCH/NOCH_CSR_03.l1v"
+#include "R9_LTE/01_NOCH/NOCH_CSR_04.l1v"
+#include "R9_LTE/01_NOCH/NOCH_CSR_05.l1v"
+#include "R9_LTE/01_NOCH/NOCH_CSR_06.l1v"
+#include "R9_LTE/01_NOCH/NOCH_CSR_07.l1v"
+#include "R9_LTE/01_NOCH/NOCH_CSR_08.l1v"
+#include "R9_LTE/01_NOCH/NOCH_CSR_09.l1v"
+#include "R9_LTE/01_NOCH/NOCH_CSR_10.l1v"
+#include "R9_LTE/01_NOCH/NOCH_CSR_11.l1v"
+#include "R9_LTE/01_NOCH/NOCH_SCS_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CSR_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CSR_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_BCCH_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_BCCH_01_5.l1v"
+#include "R9_LTE/02_IDLE/IDLE_BCCH_01_10.l1v"
+#include "R9_LTE/02_IDLE/IDLE_BCCH_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_BCCH_03.l1v"
+#include "R9_LTE/02_IDLE/IDLE_BCCH_04.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_03.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_TDD_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_TDD_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PWS_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PWS_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PWS_03.l1v"
+#include "R9_LTE/02_IDLE/IDLE_MBMS_MCCH_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_MBMS_MCCH_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CELL_RESEL_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CELL_RESEL_01_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CELL_RESEL_01_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CELL_RESEL_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CELL_RESEL_02_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CELL_RESEL_02_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CELL_RESEL_03.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CELL_RESEL_03_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CELL_RESEL_03_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CELL_RESEL_04.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CELL_RESEL_04_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CELL_RESEL_04_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PLMN_LIST_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PLMN_LIST_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_OOS_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_OOS_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_OOS_03.l1v"
+#include "R9_LTE/02_IDLE/IDLE_OOS_04.l1v"
+#include "R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_01.l1v"
+#include "R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_02.l1v"
+#include "R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_02_5.l1v"
+#include "R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_02_10.l1v"
+#include "R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_03.l1v"
+#include "R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_04.l1v"
+#include "R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_05.l1v"
+#include "R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_06.l1v"
+#include "R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_07.l1v"
+#include "R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_08.l1v"
+#include "R9_LTE/03_IDLE_SCH/IDLE_SCH_CONN_EST_01.l1v"
+#include "R9_LTE/04_SCH/SCH_TPC_01.l1v"
+#include "R9_LTE/04_SCH/SCH_TPC_02.l1v"
+#include "R9_LTE/04_SCH/SCH_TPC_03.l1v"
+#include "R9_LTE/04_SCH/SCH_TPC_04.l1v"
+#include "R9_LTE/04_SCH/SCH_TPC_05.l1v"
+#include "R9_LTE/04_SCH/SCH_TPC_06.l1v"
+#include "R9_LTE/04_SCH/SCH_TX_01.l1v"
+#include "R9_LTE/04_SCH/SCH_TX_02.l1v"
+#include "R9_LTE/04_SCH/SCH_TX_03.l1v"
+#include "R9_LTE/04_SCH/SCH_TX_04.l1v"
+#include "R9_LTE/04_SCH/SCH_TX_05.l1v"
+#include "R9_LTE/04_SCH/SCH_TX_06.l1v"
+#include "R9_LTE/04_SCH/SCH_PC_01.l1v"
+#include "R9_LTE/04_SCH/SCH_PCQI_01_01.l1v"
+#include "R9_LTE/04_SCH/SCH_PCQI_01_02.l1v"
+#include "R9_LTE/04_SCH/SCH_PCQI_01_03.l1v"
+#include "R9_LTE/04_SCH/SCH_PCQI_01_04.l1v"
+#include "R9_LTE/04_SCH/SCH_ACQI_01_01.l1v"
+#include "R9_LTE/04_SCH/SCH_ACQI_01_02.l1v"
+#include "R9_LTE/04_SCH/SCH_ACQI_01_03.l1v"
+#include "R9_LTE/04_SCH/SCH_ACQI_01_04.l1v"
+#include "R9_LTE/04_SCH/SCH_ACQI_01_05.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_01.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_02.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_02_01.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_02_02.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_02_03.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_02_04.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_02_05.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_02_06.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_02_07.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_03.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_04.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_04_01.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_04_02.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_04_03.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_04_04.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_04_05.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_04_06.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_04_07.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_05.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_06.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_06_01.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_06_02.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_06_03.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_06_04.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_06_05.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_06_06.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_06_07.l1v"
+#include "R9_LTE/04_SCH/SCH_SYNC_HANDOVER_01.l1v"
+#include "R9_LTE/04_SCH/SCH_INTRAHO_01.l1v"
+#include "R9_LTE/04_SCH/SCH_CSG_01.l1v"
+#include "R9_LTE/04_SCH/SCH_CSG_02.l1v"
+#include "R9_LTE/04_SCH/SCH_SI_MODIFY_01.l1v"
+#include "R9_LTE/04_SCH/SCH_PWS_01.l1v"
+#include "R9_LTE/04_SCH/SCH_PWS_02.l1v"
+#include "R9_LTE/04_SCH/SCH_PWS_03.l1v"
+#include "R9_LTE/04_SCH/SCH_PAG_GAP_01.l1v"
+#include "R9_LTE/04_SCH/SCH_CONN_REEST_01.l1v"
+#include "R9_LTE/04_SCH/SCH_CONN_REEST_02.l1v"
+#include "R9_LTE/04_SCH/SCH_CONN_REEST_03.l1v"
+#include "R9_LTE/04_SCH/SCH_CONN_REEST_04.l1v"
+#include "R9_LTE/04_SCH/SCH_RLM_01.l1v"
+#include "R9_LTE/04_SCH/SCH_RLM_02.l1v"
+#include "R9_LTE/04_SCH/SCH_RLM_03.l1v"
+#include "R9_LTE/04_SCH/SCH_RLM_04.l1v"
+#include "R9_LTE/04_SCH/SCH_RLM_05.l1v"
+#include "R9_LTE/04_SCH/SCH_RLM_06.l1v"
+#include "R9_LTE/04_SCH/SCH_RLM_07.l1v"
+#include "R9_LTE/04_SCH/SCH_RLM_08.l1v"
+#include "R9_LTE/04_SCH/SCH_RLM_DRX_01.l1v"
+#include "R9_LTE/04_SCH/SCH_RLM_DRX_02.l1v"
+#include "R9_LTE/04_SCH/SCH_RLM_DRX_03.l1v"
+#include "R9_LTE/04_SCH/SCH_RLM_DRX_04.l1v"
+#include "R9_LTE/04_SCH/SCH_DRX_TRANS_01.l1v"
+#include "R9_LTE/04_SCH/SCH_REDIRECTION_01.l1v"
+#include "R9_LTE/04_SCH/SCH_REDIRECTION_02.l1v"
+#include "R9_LTE/04_SCH/SCH_REDIRECTION_03.l1v"
+#include "R9_LTE/04_SCH/SCH_REDIRECTION_04.l1v"
+#if 1
+#include "R9_LTE/02_IDLE/IDLE_PCH_01_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_01_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_01_03.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_01_04.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_01_05.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_01_06.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_01_07.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_01_08.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_01_09.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_01_10.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_01_11.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_01_12.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_03.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_04.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_05.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_06.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_07.l1v"
+#include "R9_LTE/05_MEAS/BCCH_Meas_01.l1v"
+#include "R9_LTE/05_MEAS/BCCH_Meas_02.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_01_01.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_01_02.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_01_03.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_01_04.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_02_01.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_02_02.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_02_03.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_02_04.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_03_01.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_03_02.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_03_03.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_03_04.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_04_01.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_04_02.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_04_03.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_04_04.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_05_01.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_05_02.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_05_03.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_05_04.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_06_01.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_06_02.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_06_03.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_06_04.l1v"
+#include "R9_LTE/05_MEAS/IDLE_SCH_Meas_01.l1v"
+#include "R9_LTE/05_MEAS/IDLE_SCH_Meas_02.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_01_01.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_01_02.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_01_03.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_01_04.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_02_01.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_02_02.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_02_03.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_02_04.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_02_05.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_02_06.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_02_07.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_02_08.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_03_01.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_03_02.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_03_03.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_03_04.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_03_05.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_03_06.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_03_07.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_03_08.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_04_01.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_04_02.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_04_03.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_04_04.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_05_01.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_05_02.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_05_03.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_05_04.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_05_05.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_05_06.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_05_07.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_05_08.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_06_01.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_06_02.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_06_03.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_06_04.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_06_05.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_06_06.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_06_07.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_06_08.l1v"
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+#include "R9_LTE/06_TRX/SCH_TRX_01_01.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_02.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_03.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_04.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_05.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_06.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_07.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_08.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_09.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_10.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_11.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_12.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_13.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_14.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_15.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_16.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_17.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_18.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_19.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_20.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_21.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_22.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_23.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_24.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_25.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_26.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_27.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_28.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_29.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_30.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_31.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_32.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_33.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_34.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_35.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_36.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_37.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_38.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_39.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_40.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_41.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_42.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_43.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_44.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_45.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_46.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_47.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_48.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_49.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_50.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_51.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_52.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_53.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_54.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_55.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_56.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_57.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_58.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_59.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_60.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_61.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_62.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_63.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_01.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_02.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_03.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_04.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_05.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_06.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_07.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_08.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_09.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_10.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_11.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_12.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_13.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_14.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_15.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_16.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_17.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_18.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_19.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_20.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_21.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_22.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_23.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_24.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_25.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_26.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_27.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_28.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_03.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_04.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_GAP_FDD_01.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_GAP_FDD_02.l1v"
+
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_01.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_02.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_03.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_04.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_05.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_06.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_07.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_08.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_09.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_10.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_11.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_12.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_13.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_14.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_15.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_16.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_17.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_18.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_19.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_20.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_21.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_22.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_23.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_24.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_25.l1v"
+#include "R11_LTE/04_SCH/SCH_TX_SIMULT_01.l1v"
+#include "R11_LTE/04_SCH/SCH_TX_SIMULT_02.l1v"
+#include "R11_LTE/04_SCH/SCH_TX_RATYPE1_01.l1v"
+#include "R11_LTE/04_SCH/SCH_TX_RATYPE1_02.l1v"
+#include "R11_LTE/04_SCH/SCH_RLM_eICIC_01.l1v"
+#include "R11_LTE/04_SCH/SCH_RLM_eICIC_02.l1v"
+#include "R11_LTE/04_SCH/SCH_MBMS_MCCH_01.l1v"
+#include "R11_LTE/04_SCH/SCH_MBMS_MCCH_02.l1v"
+
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_01.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_02.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_03.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_04.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_05.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_06.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_07.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_08.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_09.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_10.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_11.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_12.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_13.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_14.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_15.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_16.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_17.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_18.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_19.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_20.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_eicic_01.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_eicic_02.l1v"
+#include "R11_LTE/06_TRX/SCH_Trx_ca_01.l1v"
+#include "R11_LTE/06_TRX/SCH_Trx_ca_02.l1v"
+#include "R11_LTE/06_TRX/SCH_Trx_ca_03.l1v"
+#include "R11_LTE/06_TRX/SCH_Trx_ca_04.l1v"
+#include "R11_LTE/06_TRX/SCH_Trx_ca_05.l1v"
+#include "R11_LTE/06_TRX/SCH_Trx_ca_06.l1v"
+#include "R11_LTE/06_TRX/SCH_Trx_ca_07.l1v"
+#include "R12_LTE/3DL1UL/3DL1UL_basic_01.l1v"
+#include "R12_LTE/3DL1UL/3DL1UL_basic_01_1.l1v"
+#include "R12_LTE/3DL1UL/3DL1UL_fdd_basic_3.l1v"
+#include "R12_LTE/3DL1UL/3DL1UL_fdd_basic_4.l1v"
+#include "R12_LTE/3DL1UL/3DL1UL_tdd_basic_3.l1v"
+#include "R12_LTE/3DL1UL/3DL1UL_tdd_basic_4.l1v"
+#include "R12_LTE/2DL1UL/2DL1UL_basic_01.l1v"
+#include "R12_LTE/2DL1UL/2DL1UL_basic_02.l1v"
+#include "R12_LTE/4DL1UL/4DL1UL_fdd_basic_23.l1v"
+#include "R12_LTE/4DL1UL/4DL1UL_fdd_basic_24.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_fdd_basic_05.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_fdd_basic_06.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_fdd_basic_07.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_fdd_basic_08.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_fdd_basic_09.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_fdd_basic_10.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_fdd_basic_11.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_fdd_basic_12.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_fdd_basic_13.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_tdd_basic_05.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_tdd_basic_06.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_tdd_basic_08.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_tdd_basic_09.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_tdd_basic_10.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_tdd_basic_11.l1v"
+#include "R12_LTE/3DL2UL/3DL2UL_fdd_basic_14.l1v"
+#include "R12_LTE/3DL2UL/3DL2UL_fdd_basic_15.l1v"
+#include "R12_LTE/3DL2UL/3DL2UL_tdd_fdd_basic_14.l1v"
+
+
+#endif
+#endif
+
diff --git a/mcu/service/dhl/database/msg_id_to_em_info_map.h b/mcu/service/dhl/database/msg_id_to_em_info_map.h
new file mode 100644
index 0000000..5c28ae6
--- /dev/null
+++ b/mcu/service/dhl/database/msg_id_to_em_info_map.h
@@ -0,0 +1,92 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * msg_id_to_em_info_map.h
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * Message id to em info mapping table
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 01 14 2014 stanleyhy.chen
+ * [MOLY00053071] EM type access level control. Add em_info_access_level_map
+ * Add a new table msg_id_access_level_map and a new file em_mapping_for_tool.h
+ *
+ * 01 10 2014 stanleyhy.chen
+ * [MOLY00053071] EM type access level control. Add em_info_access_level_map
+ * Use MSG ID instead of EM Type
+ *
+ * 01 09 2014 stanleyhy.chen
+ * [MOLY00053071] EM type access level control. Add em_info_access_level_map
+ * .
+ *
+ * 07 19 2013 stanleyhy.chen
+ * [MOLY00030529] Add elemts into EM mapping table for CSCE
+ * Add CSCE's EM types into mapping table
+ *
+ * 07 17 2013 shyla.lan
+ * [MOLY00030123] EM filtering
+ * .
+ *
+ * 06 04 2013 moja.hsu
+ * [MOLY00024129] Add EM Registration path to L4c
+ * add message id and EM Type mapping in mapping table.
+ *
+ * 06 03 2013 ken.liu
+ * [MOLY00024730] DHL multimode engineering mode and air message logging support
+ * add dummy declaration to fix codegen error.
+ *
+ * 06 03 2013 ken.liu
+ * [MOLY00024730] DHL multimode engineering mode and air message logging support
+ * add msg id to em_info_enum mapping table.
+ *
+ ****************************************************************************/
+
+#ifdef GEN_FOR_CPARSER
+
+#endif
diff --git a/mcu/service/dhl/database/msglog_db/custom_parse_db.c b/mcu/service/dhl/database/msglog_db/custom_parse_db.c
new file mode 100644
index 0000000..9ef46f4
--- /dev/null
+++ b/mcu/service/dhl/database/msglog_db/custom_parse_db.c
@@ -0,0 +1,215 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ *
+ * Filename:
+ * ---------
+ * custom_parse_db.c
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * This file collects the customer module/primitve information to be included
+ * in the database.
+ * The enum id for module type is "customer_module_type".
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * =============================================================================
+ * $Log$
+ *
+ * 10 18 2021 ot_muhammed.rafy
+ * [MOLY00572177] Bar cell????
+ *
+ * .
+ *
+ * 07 19 2021 vend_mtb_aritha009
+ * [MOLY00572177] Bar cell????
+ *
+ * .
+ *
+ * 04 08 2020 jack-mh.tsai
+ * [MOLY00510555] [Coverity]Fix DMF coverity and secure coding
+ *
+ * 04 06 2020 jack-mh.tsai
+ * [MOLY00509913] [Coverity Scanned Code Defect][MPD][CERT L1 for C]CID:976804 code defect happened in /mcu/protocol/dmf/InfoCollect/dmf_info_at_hdlr.c
+ *
+ * 01 14 2020 jack-mh.tsai
+ * [MOLY00474607] ModemºÝ¤j?Õu¦¬¶°(MPD)
+ *
+ * 01 03 2020 jack-mh.tsai
+ * [MOLY00469943] DMF Customization Framework (MPD)
+ *
+ * 09 23 2019 yaoyong.ju
+ * [MOLY00442618] [VMOLY]Rebuild NVRAM file to fix LID description not match in SW RD and MPD domain
+ *
+ * .
+ * Fix OA domain build issue
+ *
+ * 03 15 2019 bo-hun.chen
+ * [MOLY00378534] [Mcddll] VGSM/VGMM part - subsidiary(ADZ) build error.
+ *
+ * 03 13 2019 bo-hun.chen
+ * [MOLY00378534] [Mcddll] VGSM/VGMM part
+ *
+ * [MOLY00378534] [VGSM] mcddll
+ *
+ * 07 30 2018 chi-chun.lu
+ * [MOLY00342741] [MakeFile] [UMOLYE] [Modify Makefile Rules] enhance build flow for cgen tdd/fdd preprocessing files
+ *
+ * .
+ *
+ *******************************************************************************/
+/********************************************* Warning **********************************************
+* Please make sure header file is included correctly!
+* If the common header file is added to custom_parse_db_tdd_fdd.c, the context of header file will be preprocessed twice.
+* The change as mentioned previously can lead to build time inefficiency.
+*
+* common header file => custom_parse_db.c
+* Tdd/Fdd(2g/3g) header file => custom_parse_db_tdd_fdd.c
+*
+* If the header file relate to Tdd/Fdd (2g/3g), please include the header file in custom_parse_db_tdd_fdd.c
+* If the header file is common header file or is not related to Tdd/Fdd(2g/3g), please add the header file to custom_parse_db.c
+********************************************** Warning **********************************************/
+
+#ifdef _MODIS_ON_VC9_
+#define __w64
+#endif
+
+
+typedef int cgen_use_spare_msg_id;
+typedef int cgen_use_spare_sap_id;
+typedef int cgen_use_spare_module_id;
+typedef unsigned short msg_type;
+typedef unsigned short sap_type;
+typedef unsigned short module_type;
+
+
+#ifdef __GNUC__
+ typedef struct __va_list { void *__ap; } __builtin_va_list;
+ #define INLINE __inline
+ #define inline __inline
+#endif
+
+#define __declspec(s)
+
+#ifdef __RVCT__
+#ifndef __int64
+ typedef long long __int64;
+#endif
+
+#define _ARMABI
+#endif
+
+#include "kal_public_api.h"
+#include "kal_public_defs.h" //MSBB change #include "stack_msgs.h"
+#include "sap_info.h"
+#include "msg_id_to_em_info_map.h"
+
+#include "stack_ltlcom.h"
+
+#include "l4c2uem_struct.h"
+
+#ifndef NVRAM_NOT_PRESENT
+#include "nvram_gen_trc.h"
+#endif
+
+// #ifndef __L1_STANDALONE__
+#include "nvram_data_items.h"
+#include "ex_item.h"
+
+#if defined (__MMI_FMI__)
+ #include "nvram_common_defs.h"
+ #include "nvram_user_defs.h"
+ #include "common_nvram_editor_data_item.h"
+ #include "custom_nvram_editor_data_item.h"
+#endif
+
+#include "nvram_editor_data_item.h"
+#include "nvram_editor.h"
+#include "nvram_lid_list_for_mcf.h"
+#include "nvram_lid_structure_check_extend_list.h"
+// #endif /* __L1_STANDALONE__ */
+
+
+
+#if !defined(__MAUI_BASIC__)&&(defined(__DHL_MODULE__)||defined(__TST_MODULE__))
+#include "custom_nvram_database.h"
+#endif
+
+/*Add for CustPack*/
+#include "resource_audio.h"
+
+//Add here for global enum re-composition
+#include "module_msg_range.h"
+#include "sap_range.h"
+
+#include "tst_msgid.h"
+#include "md_svc_sap.h"
+
+#ifdef __CDMA2000_RAT__
+/* Add C2K EM headers */
+#include "em_public_struct_evl1.h"
+#include "em_public_struct_xl1.h"
+#include "em_public_struct_chsc.h"
+#include "em_public_struct_evl2.h"
+#include "em_public_struct_xl2.h"
+#include "em_public_struct_evl3.h"
+#include "em_public_struct_xl3.h"
+#include "em_public_struct_c2k_hlp.h"
+#include "em_public_struct_cval.h"
+#endif /* __CDMA2000_RAT__ */
+
+#include "atp_dmf_struct.h"
+#include "dmf_public_event.h"
+#include "custom_dmf_app.h"
+
+/********************************************* Warning **********************************************
+* Please make sure header file is included correctly!
+* If the common header file is added to custom_parse_db_tdd_fdd.c, the context of header file will be preprocessed twice.
+* The change as mentioned previously can lead to build time inefficiency.
+*
+* common header file => custom_parse_db.c
+* Tdd/Fdd(2g/3g) header file => custom_parse_db_tdd_fdd.c
+*
+* If the header file relate to Tdd/Fdd (2g/3g), please include the header file in custom_parse_db_tdd_fdd.c
+* If the header file is common header file or is not related to Tdd/Fdd(2g/3g), please add the header file to custom_parse_db.c
+********************************************** Warning **********************************************/
diff --git a/mcu/service/dhl/database/msglog_db/custom_parse_db_tdd_fdd.c b/mcu/service/dhl/database/msglog_db/custom_parse_db_tdd_fdd.c
new file mode 100644
index 0000000..a267b79
--- /dev/null
+++ b/mcu/service/dhl/database/msglog_db/custom_parse_db_tdd_fdd.c
@@ -0,0 +1,89 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ *
+ * Filename:
+ * ---------
+ * custom_parse_db.c
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * This file collects the customer module/primitve information to be included
+ * in the database.
+ * The enum id for module type is "customer_module_type".
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * =============================================================================
+ * $Log$
+ *
+ *
+ *******************************************************************************/
+#ifdef _MODIS_ON_VC9_
+#define __w64
+#endif
+
+
+typedef int cgen_use_spare_msg_id;
+typedef int cgen_use_spare_sap_id;
+typedef int cgen_use_spare_module_id;
+typedef unsigned short msg_type;
+typedef unsigned short sap_type;
+typedef unsigned short module_type;
+
+
+#ifdef __GNUC__
+ typedef struct __va_list { void *__ap; } __builtin_va_list;
+ #define INLINE __inline
+ #define inline __inline
+#endif
+
+#define __declspec(s)
+
+#ifdef __RVCT__
+#ifndef __int64
+ typedef long long __int64;
+#endif
+
+#define _ARMABI
+
+#endif
\ No newline at end of file
diff --git a/mcu/service/dhl/database/msglog_db/libParseDbModem.c b/mcu/service/dhl/database/msglog_db/libParseDbModem.c
new file mode 100644
index 0000000..52bf2b8
--- /dev/null
+++ b/mcu/service/dhl/database/msglog_db/libParseDbModem.c
@@ -0,0 +1,2986 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ *
+ * Filename:
+ * ---------
+ * libParserDbModem.c
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * This file collects primitve IDs and struct definition from the Modem
+ * application part for pre-processing.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * =============================================================================
+ * $Log$
+ *
+ * 12 16 2021 changlong.chen
+ * [MOLY00774161] [mt2735][CS eCall][NG eCall][patch back] ecall patch back from NR15.R3.MD700.MP.ECAll.DEV
+ *
+ * .
+ * l5uecall patch(MPD domain) back from NR15.R3.MD700.MP.ECAll.DEV
+ *
+ * 01 22 2021 kiwi.zhang
+ * [MOLY00608850] NRTC CoEx command support is needed
+ *
+ * .L5 NRTC MPD Modify
+ *
+ * 12 03 2020 tongkun.zhang
+ * [MOLY00593154] [L5] patch back L5 from NR15.R3.MD700.MP to NR15.R3.MD700.MP
+ *
+ * [L5IO]unify AT handle
+ * 1. send ilm to replace recurse
+ * 2. handle mulit-at from CUST/MBCI/MIPC
+ * 3. meta_ctxt rearch...
+ *
+ * 11 16 2020 shih-yu.chen
+ * [MOLY00595245] [Colgin] TMC development
+ * [TMC] patch back to MD700.
+ *
+ * 11 13 2020 harold.liu
+ * [MOLY00594647] [MD700][L5]patch back L5 to NR15.R3.MD700.MP
+ * io track add cmd id
+ * FROM:CL13166290
+ *
+ * 11 11 2020 chih-ting.yeh
+ * [MOLY00590833] ICD JSON Auto Gen Feature
+ * [Enhance] ICD header package refinement
+ * ======
+ * - add new generated ICD header to DB
+ * - move including ICD code range from interface to internal header
+ * - add ICD mock header
+ *
+ * 11 11 2020 fengwen.weng
+ * [MOLY00543445] [Gen97][Colgin] TFWK Thermal Development
+ * .display structure info on ELT
+ *
+ * 11 10 2020 tongkun.zhang
+ * [MOLY00593154] [L5] patch back L5 from NR15.R3.MD700.MP to NR15.R3.MD700.MP
+ * [L5][MPD]libParseDbModem
+ *
+ * 09 24 2020 harold.liu
+ * [MOLY00560596] [T700][L5]patch back L5 to NR15.R3.T700.MP
+ *
+ * io track add cmd id
+ *
+ * 09 18 2020 cosmo.sung
+ * [MOLY00569501] [Gen97] TC10 patch back
+ *
+ * - L4 CC/SS
+ *
+ * 09 18 2020 cosmo.sung
+ * [MOLY00569501] [Gen97] TC10 patch back
+ *
+ * - L4 CC/SS
+ *
+ * 09 18 2020 cosmo.sung
+ * [MOLY00569501] [Gen97] TC10 patch back
+ *
+ * - L4 CC/SS
+ *
+ * 09 18 2020 cosmo.sung
+ * [MOLY00569501] [Gen97] TC10 patch back
+ *
+ * - L4 CC/SS
+ *
+ * 08 28 2020 tong.li
+ * [MOLY00562709] [5GHP][feature][Data&Call]game space mode
+ * .
+ *
+ * 08 19 2020 guo-huei.chang
+ * [MOLY00538247] ?�维测�?求�?�ICD??��?�modem 待机??�工作状?�相?��?��?��
+ *
+ * DHL part
+ *
+ * 08 13 2020 ken.li
+ * [MOLY00543497] [MT6873][Margaux][R0][MP5][in-house FTA][LTE][7.1.1.2]enable volte fail
+ *
+ * UPCM TESTMODE drops non-loopback data for obtaining IP address case (MPD, libParseDbModem)
+ *
+ * 07 27 2020 dennis.tsai
+ * [MOLY00549478] [Gen97][HE3.0]N3GPP offload over data feature
+ *
+ * patch back from dev for vodata feature.
+ *
+ * 07 27 2020 dennis.tsai
+ * [MOLY00549478] [Gen97][HE3.0]N3GPP offload over data feature
+ *
+ * patch back from dev for vodata feature.
+ *
+ * 07 23 2020 dennis.tsai
+ * [MOLY00546023] [Gen97][VoDATA] implement intctrl and feature for VoDATA
+ * add ddm_intctrl_struct.h to db.
+ *
+ * 07 17 2020 dennis.tsai
+ * [MOLY00546023] [Gen97][VoDATA] implement intctrl and feature for VoDATA
+ *
+ * add intctrl msgid to libparsedb, fix build error.
+ *
+ * 07 16 2020 ssu-hsien.wu
+ * [MOLY00545981] [Gen97][N3GPP_OVER_DATA] Add feature option and compile option for N3GPP offload over data.
+ *
+ * Rollback libParseDbModem.c to fix build error.
+ *
+ * 06 29 2020 lucien.li
+ * [MOLY00535120] [Gen97] Intra-Band DR-DSDS
+ *
+ * [L4C] DSDA rename
+ *
+ * 06 13 2020 yilun.yang
+ * [MOLY00530105] [MP5][SQC][MT6885][Petrus][Q0][MP2][AT&T][10776v20_1][R3MP][PTN][simulation][inhouse][RnS][ATTACH/RESTART][LTE-BTR-1-8212]Test case failed due to ## LTE ## EsmPdnConnectivityRequest TimeOut
+ * Route PS_EVENT_IND to DDM through L4BNW.
+ *
+ * 06 10 2020 yilun.yang
+ * [MOLY00530105] [MP5][SQC][MT6885][Petrus][Q0][MP2][AT&T][10776v20_1][R3MP][PTN][simulation][inhouse][RnS][ATTACH/RESTART][LTE-BTR-1-8212]Test case failed due to ## LTE ## EsmPdnConnectivityRequest TimeOut
+ * Send PS_EVENT_REPORT_IND to DDM through L4BNW.
+ *
+ * 03 06 2020 tim-yw.liu
+ * [MOLY00503552] [UESIM] Re-arch VMMI to support dummyAP and ATcmd multi-channel
+ *
+ * Add DummyAP and support ATcmd multi-channel
+ *
+ * 02 26 2020 willy-wj.chen
+ * [MOLY00501981] [Gen97][UPCM] TMO-US F4L data performance patch sync from Gen93
+ * [UPCM] put small UDP packet into pri-SIT upon channel lock.
+ *
+ * 02 14 2020 you-ren.chen
+ * [MOLY00466485] [Gen97][NWSIM][4G][LTE_01_07]Bearer Resource Modification Request Timeout
+ *
+ * Dedicated bearer clear mode should not be thought as dedicated bearer setting.
+ *
+ * 02 14 2020 you-ren.chen
+ * [MOLY00466485] [Gen97][NWSIM][4G][LTE_01_07]Bearer Resource Modification Request Timeout
+ *
+ * Dedicated bearer clear mode should not be thought as dedicated bearer setting.
+ *
+ * 02 14 2020 actory.ou
+ * [MOLY00499908] [MT6873][Margaux][Q0][MP2][SQC][Log profiling]LTE VoLTE PS Standard filter - W06 target fail - MOD_CCISMCORE
+ * [VMOLY][MPD] add ccci enum for log reduction
+ *
+ * 02 13 2020 chia-yu.ku
+ * [MOLY00488288] [FTAA][CNY][MT6873][Margaux][Q0][MP2][SQC][NSA][CU FT][China][Shanghai][Nokia][MDST][Static][SWIFT][SIM1:CU],mtkrild:AT command pending too long. assert!!! AT cmd: COPS
+ *
+ * .
+ *
+ * 02 13 2020 chia-yu.ku
+ * [MOLY00488288] [FTAA][CNY][MT6873][Margaux][Q0][MP2][SQC][NSA][CU FT][China][Shanghai][Nokia][MDST][Static][SWIFT][SIM1:CU],mtkrild:AT command pending too long. assert!!! AT cmd: COPS
+ *
+ * .
+ *
+ * 02 12 2020 kc.lin
+ * [MOLY00499183] [VMOLY][LADN-IT] LADN bugs check-in
+ * .
+ *
+ * 02 04 2020 allen.keh
+ * [MOLY00476273] [MT6297][gemini][VGMM] gemini phase 2 development
+ * .1. not perform gemini abort MRU during MSPM_IMS_CALL_ALT1 or MSPM_IMS_CALL_ALT2 session
+ * 2. paging period protect
+ * 3. paging DRB protect
+ * 4. DL data protect
+ *
+ * 01 21 2020 louis-tw.huang
+ * [MOLY00475688] [Gen97][VMOLY][UT][MRDC-IDC] enable dummy L1 IDC module for ERRC UT verification
+ * .
+ *
+ * 01 14 2020 yongjian.zhao
+ * [MOLY00469848] root certificate feature check in
+ *
+ * certificate refactoring
+ *
+ * 01 02 2020 icy.li
+ * [MOLY00469376] [VMOLY][WLC] correct WLC compile option
+ *
+ * .
+ *
+ * 12 24 2019 po-chun.lee
+ * [MOLY00467645] [MT6885][Petrus][Q0][MP2][SQC][IMS][TW][FET][VoWiFi][TCID:W_PS_02] no WiFi call
+ *
+ * [MOLY00467243] [ePDG][RFT][VMOLY.1001.DEV][VMOLY][PatchBack]
+ *
+ * .
+ *
+ * 12 24 2019 po-chun.lee
+ * [MOLY00467645] [MT6885][Petrus][Q0][MP2][SQC][IMS][TW][FET][VoWiFi][TCID:W_PS_02] no WiFi call
+ *
+ * [MOLY00467243] [ePDG][RFT][VMOLY.1001.DEV][VMOLY][PatchBack]
+ *
+ * .
+ *
+ * 12 24 2019 po-chun.lee
+ * [MOLY00467645] [MT6885][Petrus][Q0][MP2][SQC][IMS][TW][FET][VoWiFi][TCID:W_PS_02] no WiFi call
+ *
+ * [MOLY00467243] [ePDG][RFT][VMOLY.1001.DEV][VMOLY][PatchBack]
+ *
+ * .
+ *
+ * 12 23 2019 po-chun.lee
+ * [MOLY00467645] [MT6885][Petrus][Q0][MP2][SQC][IMS][TW][FET][VoWiFi][TCID:W_PS_02] no WiFi call
+ * [MOLY00467243] [ePDG][RFT][VMOLY.1001.DEV][VMOLY][PatchBack]
+ *
+ * .
+ *
+ * 12 08 2019 icy.li
+ * [MOLY00463016] [Submarine] Add __MD_WLC_SUPPORT__to replace __SUBMARINE_SUPPORT__ flag
+ *
+ * .
+ *
+ * 12 06 2019 yu-ting.hsu
+ * [MOLY00464179] [6297] ENRLC module level 1001 patch back to VMOLY
+ *
+ * ENRLC module level patch back
+ *
+ * 12 06 2019 can.lin
+ * [MOLY00463601] [Gen97] Modify SASE module
+ *
+ * SASE DHL Definition
+ *
+ * 12 06 2019 po-chun.lee
+ * [MOLY00463967] [N3X][VMOLY] Patch Back-
+ *
+ * ATP
+ *
+ * 12 05 2019 tc.chang
+ * [MOLY00446861] [Gen97][Code Sync] [B190414-819]?Ä£??{d?AI??450 (?`X?A?h`?) According to data type to release HPS for paging.
+ *
+ * 12 04 2019 jie-yu.wang
+ * [MOLY00462619] [GNSS_TC/LBS/GPS] code change and make file change
+ * [LBS] Trace.
+ *
+ * 12 03 2019 prime.xiao
+ * [MOLY00456600] [Gen97] NR Map Feature
+ *
+ * .
+ *
+ * 12 02 2019 jun-han.lin
+ * [MOLY00462166] MDFPM support feature option on/off
+ *
+ * MDFPM feature option on/off
+ *
+ * 12 02 2019 prime.xiao
+ * [MOLY00381008] [Gen97][GMSS] 5G related feature
+ *
+ * .MOLY00366859
+ * MOLY00438399
+ * MOLY00442288
+ * MOLY00442633
+ * MOLY00442781
+ * MOLY00443807
+ *
+ * 11 29 2019 chang-yen.chih
+ * [MOLY00462536] [VMOLY] Support getting RAN info in EPDN
+ *
+ * EPDN RAN (interface & D2RM)
+ *
+ * 11 29 2019 chang-yen.chih
+ * [MOLY00462536] [VMOLY] Support getting RAN info in EPDN
+ * EPDN RAN (interface & D2RM)
+ *
+ * 11 08 2019 ya.li
+ * [MOLY00419192] [MT6779][Lafite][P0][WW FT][Singapore][IMS][SQC Excluded][VoLTE][TPG][TCID: V_SS_013] DUT is showing error when selecting 'show number' & 'network default' in CLIR settings while working fine when selecting 'hide number'
+ *
+ * .
+ *
+ * 11 05 2019 yenchih.yang
+ * [MOLY00456796] 2501730----��?�d�A��??��5G??�ANetwork Selecting��?��NR/LTE/UMTS/GSM/C2K,����`?5G.
+ *
+ * 10 17 2019 jani.manninen
+ * [MOLY00448006] [MT6885][Petrus][MP1][SQC][SH][5GMM][Static][CU][MDST][SWIFT][S] [Fatal error(buf)] err_code1:0x00000823 err_code2:0x00000020 err_code3:0xCCCCCCCC
+ *
+ * .
+ *
+ * 09 25 2019 ian-yw.chen
+ * [MOLY00401131] [Gen97] porting from 95
+ * .
+ *
+ * 09 25 2019 chen-wei.lan
+ * [MOLY00443561] [Gen97] SCBM
+ * SCBM
+ *
+ * 09 24 2019 howen.pu
+ * [MOLY00440880] EM info with XCAP information
+ * XCAP - VMOLY Common.
+ *
+ * 09 23 2019 louis-tw.huang
+ * [MOLY00439533] [Gen97][IDC] IDC feature development [EWSP0000046233]
+ *
+ * 09 23 2019 jerry-kirk.yang
+ * [MOLY00441364] [UPDS] Add new task for UE policy delivery service
+ * [VMOLY_TRUNK][MPD][UPDS] DB update.
+ *
+ * 09 21 2019 guan-ren.chen
+ * [MOLY00327199] [Gen97] Development
+ * 1. ULSP DSP refactory
+ * 2. Remove SW pull power when PB is not empty
+ * 3. Move DSP ST log definition file from HWRD to MPD
+ *
+ * 09 18 2019 guan-ren.chen
+ * [MOLY00327199] [Gen97] Development
+ * 1. ULSP DSP refactory
+ * 2. Remove SW pull power when PB is not empty
+ * 3. Move DSP ST log definition file from HWRD to MPD
+ *
+ * 09 16 2019 harish.reddy
+ * [MOLY00438652] [CODE SYNC] ????????????????? - DMF Report Part
+ *
+ * 09 09 2019 yu-hsiang.peng
+ * [MOLY00402569] [VMOLY] Logging Related Feature Patch
+ * [TRUNK] MPD, custom cmd + sap reboot
+ * 2019.09.09
+ *
+ * 09 06 2019 vend_mti_wsd_005
+ * [MOLY00437612] [VMOLY][New feature check-ins] Add SWLA customLog in wifiproxy for performance profile
+ *
+ * [MPD] Add SWLA customLog in wifiproxy for performance profile
+ *
+ * 09 06 2019 amit.singh
+ * [MOLY00433282] VMOLY KPALV module check-in
+ *
+ * VMOLY Latest patch MPD C.
+ *
+ * 09 03 2019 chun-yu.chien
+ * [MOLY00436706] [Code Sync] DMF report part porting
+ *
+ * DMF report part porting - Source
+ *
+ * 08 26 2019 shi-yang.huang
+ * [MOLY00434739] [6297][ENDC][SLEEP] ENDC common gap framework modification for sleep mode
+ *
+ * Trigger auto-sync[SKIP EWSP: Fix build error, trigger auto-sync to Mercury]
+ *
+ * 08 26 2019 shi-yang.huang
+ * [MOLY00434739] [6297][ENDC][SLEEP] ENDC common gap framework modification for sleep mode
+ *
+ * [Skip EWSP: Pass EWSP with another shelved CL: EWSP0000035957]
+ *
+ * 08 26 2019 chen-wei.lan
+ * [MOLY00433041] [Gen97][EPSFB] IT related issues
+ * uac
+ *
+ * 08 21 2019 cheng-dao.lee
+ * [MOLY00433074] [VMOLY] MCIF patches
+ *
+ * enable MCIF
+ *
+ * 08 15 2019 lucien.li
+ * [MOLY00427072] [Gen97][NSA] Deactivate ENDC feature
+ * [SQC][OPPO][L4C] SCG activation
+ *
+ * 08 09 2019 danny.kuo
+ * [MOLY00430467] [Gen97] DMF patch back to Gen97
+ * .
+ *
+ * 08 08 2019 mika.kaikkonen
+ * [MOLY00397648] [Submarine] Modem Certificate module
+ *
+ * Cert definitions to libParseDbModem.c and srcParseDbModem.c.
+ *
+ * 08 02 2019 digvijay.arya
+ * [MOLY00401209] [VMOLY]Submarine Crypto module checkin
+ *
+ * Add crypto struct info for logs
+ *
+ * 07 25 2019 head.hsu
+ * [MOLY00383920] [New Task] PERF (Protocol Exception Framework) task create
+ * PERF structure & enum shown in ELT
+ *
+ * 07 24 2019 tim-yw.liu
+ * [MOLY00395518] [Submarine] N3SAM development
+ * N3X/WLC Trace Configuration
+ *
+ * 07 24 2019 head.hsu
+ * [MOLY00383920] [New Task] PERF (Protocol Exception Framework) task create
+ * fix build error
+ *
+ * 07 24 2019 head.hsu
+ * [MOLY00383920] [New Task] PERF (Protocol Exception Framework) task create
+ * PERF API enable (MPD)
+ *
+ * 07 24 2019 peter.yu
+ * [MOLY00420694] [MT6297][Apollo][MP1][SQC][EM][China][Shenzhen][FDD][4GMM][CU+NA][TCID:EM_EL2_001]SRB/DRB number doesn't display the value.
+ * Change structure file for MD database.
+ *
+ * 07 23 2019 ari.simonen
+ * [MOLY00392197] [Submarine] Modem DNS module
+ *
+ * ILM database updates for DNS and Ethernet Service
+ *
+ * 07 18 2019 jun-quan.chen
+ * [MOLY00422579] [MDDP] DPFM porting to VMOLY
+ * [MPD] DPFM patch back
+ *
+ * 07 17 2019 titi.wu
+ * [MOLY00387219] [Gen97] SBP todo list
+ * MOLY00357235 code sync
+ *
+ * 07 16 2019 mika.leinonen
+ * [MOLY00422303] Submarine VMOLY patch back - EAP module
+ * MPD files
+ *
+ * 07 15 2019 konark.mehra
+ * [MOLY00411914] [New feature check-ins] WIFI Proxy feature check-ins
+ *
+ * SUBMARINE patchback
+ *
+ * 07 12 2019 deepti.singh
+ * [MOLY00397188] [Submarine]HTTP dev
+ * HTTP VMOLY PB
+ *
+ * 07 09 2019 amit.singh
+ * [MOLY00420334] Dispatcher module check-in VMOLY [SUBMARINE]
+ *
+ * Dispatcher code check-in
+ *
+ * 07 04 2019 bo-kai.huang
+ * [MOLY00357061] 97 Code Merge
+ * [WT] merge.
+ *
+ * 07 03 2019 mark.ng
+ * [MOLY00415229] NMAC RBR feature development
+ * RBR interface and code (MPD)
+ *
+ * 06 27 2019 aaron.liu
+ * [MOLY00415398] [Gen97][NR][General Error Recovery] ERM: Errory Recovery Module part.
+ * Add __NR_RAT__.
+ *
+ * 06 26 2019 aaron.liu
+ * [MOLY00415398] [Gen97][NR][General Error Recovery] ERM: Errory Recovery Module part.
+ * ERM main body.
+ *
+ * 06 14 2019 chunchieh.liao
+ * [MOLY00412901] [GEN97][MML1][CDF] Header re-organization for trace enum.
+ *
+ * -- [EWSP0000017597] (MPD)
+ *
+ * 06 14 2019 chunchieh.liao
+ * [MOLY00412901] [GEN97][MML1][CDF] Header re-organization for trace enum.
+ * -- [EWSP0000017597] (MPD)
+ *
+ * 06 12 2019 ari.simonen
+ * [MOLY00402881] [Gen97][Submarine] Submarine M1 VMOLY patch back - IMS
+ *
+ * Trace database updates for IMS and NAL monitor
+ *
+ * 06 06 2019 olivia.peng
+ * [MOLY00411717] [Gen97][Submarine]IPsec Patchback -part 2
+ * .
+ *
+ * 06 04 2019 danny.kuo
+ * [MOLY00409125] [VMOLY] Create new module L4APS
+ *
+ * .L4BPDN part
+ *
+ * 05 28 2019 yuchi.huang
+ * [MOLY00408807] [MT6297][NR][EM] NL1 EMdevelopment
+ *
+ * -add EM interface
+ *
+ * 05 13 2019 clint.chang
+ * [MOLY00401827] [MT6297][EL1D][LPCC] Low power central control feature development
+ * [EWSP0000009929]
+ * - Modify trace
+ * - Modify interaction between RAS and LPCC
+ *
+ * 05 07 2019 savvas.chou
+ * [MOLY00403400] [Submarine] M1 to VMOLY
+ * .
+ *
+ * 05 03 2019 guan-ren.chen
+ * [MOLY00400853] [Gen97] Logging service enhancement
+ * ULSP to SIB path implement.
+ *
+ * 04 19 2019 max.mo
+ * [MOLY00399993] [Gen97][VMOLY] interworking withN26 features
+ * . [MPD] Max
+ *
+ * 04 12 2019 head.hsu
+ * [MOLY00398433] [Gen97][VMOLY] Protocol Assert Remove phase 1
+ * PERF (Protocol Exception Recovery Framework) create
+ *
+ * 03 26 2019 max.mo
+ * [MOLY00393456] [Gen97][VMOLY] 45G InterRAT & interSystem feature.Max
+ *
+ * 03 26 2019 max.mo
+ * [MOLY00393456] [Gen97][VMOLY] 45G InterRAT & interSystem feature.Max
+ *
+ * 03 15 2019 bo-hun.chen
+ * [MOLY00378534] [Mcddll] VGSM/VGMM part - subsidiary(ADZ) build error.
+ *
+ * 03 13 2019 bo-hun.chen
+ * [MOLY00378534] [Mcddll] VGSM/VGMM part
+ *
+ * [MOLY00378534] [VGSM] mcddll
+ *
+ * 03 12 2019 ian-yw.chen
+ * [MOLY00390240] [Gen97] SMS features and revise
+ * .
+ *
+ * 03 11 2019 prime.xiao
+ * [MOLY00384534] [MT6297][Apollo][PreSQC][MP0.5][Idea][4G][SIM1][FDD][SVFO_in-house_4.98.4.2][1][core2,vpe0,tc0(vpe6)] Fatal Error (0x305, 0x888800e9, 0xcccccccc) - L4
+ *
+ * .
+ *
+ * 02 27 2019 yuri.huang
+ * [MOLY00377335] [MakeFile] [UMOLYE] [Modify Makefile Rules] MPD SUB flow for 2g/3g
+ *
+ * .
+ *
+ * 02 21 2019 yiting.cheng
+ * [MOLY00383950] [GEN97][ENPDCP] Let ELT able to parse NPDCP_NRLC_DL_DATA_IND message
+ * .
+ *
+ * 02 19 2019 yuri.huang
+ * [MOLY00377335] [MakeFile] [UMOLYE] [Modify Makefile Rules] MPD SUB flow for 2g/3g
+ *
+ * .
+ *
+ * 02 18 2019 chester-zd.huang
+ * [MOLY00384995] [VMOLY] GEMINI 3.0, AFR, Unify Frequency scan, BGSEARCH
+ * - RSVAK/RSVAN Part
+ *
+ * 02 18 2019 lucien.li
+ * [MOLY00384997] [VMOLY] NR Type Switch
+ * [NR Type Switch][L4]
+ *
+ * 02 15 2019 tzu-ying.chen
+ * [MOLY00384621] [Gen97][LBS] Location information API for MD modules
+ *
+ * .
+ *
+ * 02 15 2019 kuan-wei.chen
+ * [MOLY00346647] [MT6297][VDM/L4] changes for 97
+ * [VMOLY.EVB.SEPT.DEV][MPD] sync VDM CL: 7356214~7518611
+ *
+ * 02 14 2019 yiting.cheng
+ * [MOLY00327926] [GEN97][ENPDCP] base development check-in
+ * .
+ *
+ * 02 12 2019 head.hsu
+ * [MOLY00383920] [New Task] PERF (Protocol Exception Framework) task create
+ * rollback
+ *
+ * 02 12 2019 yiting.cheng
+ * [MOLY00327926] [GEN97][ENPDCP] base development check-in
+ * .
+ *
+ * 02 11 2019 prime.xiao
+ * [MOLY00383493] [Gen97][MRS] 5G related feature
+ *
+ * . operator feature table (MPD part)
+ *
+ * 01 28 2019 jun-quan.chen
+ * [MOLY00381488] [Gen97] [MCF] MCF porting to VMOLY
+ * [MCF] [MPD] MCF porting to VMOLY
+ *
+ * 01 21 2019 devin.yang
+ * [MOLY00378746] [System Service] [KAL Config] ISR Centraliztion Framework.
+ * ISR Centralization Framework.
+ *
+ * 01 10 2019 chengyu.chen
+ * [MPD][MOLY00378065][CMCC SMS in MSHC][VMOLY.EVB.SEPT.DEV][Sanity on Eiger(MT3967)] SMS is not able to be sent on LTE
+ *
+ * 01 07 2019 hamilton.liang
+ * [MOLY00332682] Gen97 relevant feature/structure change
+ *
+ * 1. compile option change for ML1S LTE test
+ *
+ * 12 27 2018 sc.tung
+ * [MOLY00337982] [NMAC][BSR] BSR main function body check-in
+ *
+ * [NMAC] remove include nmac_enum_struct.h to avoid build fail in C2K.
+ *
+ * 12 24 2018 sc.tung
+ * [MOLY00337982] [NMAC][BSR] BSR main function body check-in
+ *
+ * [NMAC][BSR] issue fix and log reduction.
+ *
+ * 12 20 2018 yu-hsiang.peng
+ * [MOLY00372896] [Gen97] sAP logging support
+ * [VMOLY.EVB.SEPT] sAP support - DB part
+ *
+ * 12 19 2018 jie-yu.wang
+ * [MOLY00324633] [LPP file part] VZW MDMI LPP related IE
+ * [VMOLY.EVB.SEPT.DEV][MPD][LPP] MDMI code sync.
+ *
+ * 11 29 2018 ian-yw.chen
+ * [MOLY00365575] [Gen97] 5G CB/PWS development
+ * L4/SMSAL interfaces
+ *
+ * 11 29 2018 jacky-ch.chang
+ * [MOLY00346978] [6297][NR][RFCC] Development -
+ * Trace for enum [ERS00022721]
+ *
+ * 11 28 2018 jacky-ch.chang
+ * [MOLY00363206] [6297][NR][RFCC] Development -
+ * Add MIMO CFG trace for debugging [ERS00022721]
+ *
+ * 11 07 2018 su-jen.yang
+ * [MOLY00349128] [VMOLY]Code sync
+ * [ERS00020803]Trace for enum - move enum to nr_mpc_comm_enum.h
+ * and trace word
+ *
+ * 10 31 2018 kun-lin.wu
+ * [MOLY00361478] [Gen97] Gemini Compile Option Clean Up
+ *
+ * 10 30 2018 wangtao.wan
+ * [MOLY00326328] [MT6297][EL1D RX] CSI development update.
+ * [ERS00019335][EL1D RX][CSI] modify 5cc trace
+ *
+ * 10 16 2018 kai-hsiang.hsu
+ * [MOLY00319465] [MT6297] MML1 common device framework integration
+ * [ERS00017831][MML1_CDF] fix Gen95 codgen fail
+ *
+ * 10 16 2018 kai-hsiang.hsu
+ * [MOLY00319465] [MT6297] MML1 common device framework integration
+ * [ERS00017776][MML1_CDF] enable target trace enum
+ *
+ * 10 08 2018 guan-ren.chen
+ * [MOLY00327199] [Gen97] Development
+ * On-demand logging porting.
+ *
+ * 10 05 2018 yuyang.hsiao
+ * [MOLY00351872] [MMRFD] Driver Porting [ERS00016470]
+ * 1. Add serdes restore function into wake up flow and refine DFE restore function
+ * 2. Update UT case
+ * 3. DSB flow for Write back function
+ * 4. Update RFPOR and filter mode
+ * 5. Remove reduntent code
+ *
+ * 10 03 2018 ming.shen
+ * [MOLY00356286] [Gen97] background search feature - interface
+ *
+ * 09 28 2018 bob.chiang
+ * [MOLY00355821] [GEN97][VGMM][NAS MoDIS IT][Phase 1] integration
+ *
+ * 08 30 2018 kun-lin.wu
+ * [MOLY00348690] Revise MSPM file placement
+ *
+ * 08 29 2018 ian-yw.chen
+ * [MOLY00348528] [Gen97] SMS over 5G NAS
+ * SMS part
+ *
+ * 08 27 2018 mars.chang
+ * [MOLY00331434] [MT6297] NL1TST Common modify
+ * modify union_tag codegen error
+ *
+ * 08 27 2018 norman.chang
+ * [MOLY00346399] [Gen97][System Selection] MCC Pool
+ * .
+ *
+ * 08 23 2018 yu-hsiang.peng
+ * [MOLY00343261] [MT6297] [Logging Service] DHL 2.0 Landing
+ * [DHL2.0] Port to VMOLY (dhl mak & DB)
+ *
+ * 08 22 2018 lucien.li
+ * [MOLY00347660] [ENDC] ENDC related Information
+ * [ENDC] Interface between RAC-NRRC
+ *
+ * 08 21 2018 yc.chen
+ * [MOLY00346302] [Gen97][VGMM] check-in VGMM to VMOLY from GEN97.DEV
+ * [non-MPD] wrap VGMM header file with 5G option in libParseDbModem.c
+ *
+ * 08 20 2018 chester-zd.huang
+ * [MOLY00346991] [RSVAN] GEN97.DEV merge to VMOLY. Codes
+ * - RSVAN interface
+ *
+ * 08 17 2018 poying.chuang
+ * [MOLY00346763] [6297] Gen97 L4 PS Check-In
+ *
+ * - interfaces .
+ *
+ * 08 17 2018 norman.chang
+ * [MOLY00346399] [Gen97][System Selection] MCC Pool
+ * [GMSS] MCC Pool
+ *
+ * 08 17 2018 yc.chen
+ * [MOLY00346302] [Gen97][VGMM] check-in VGMM to VMOLY from GEN97.DEV
+ * [non-MPD] modify related files
+ *
+ * 08 17 2018 norman.chang
+ * [MOLY00346398] [Gen97][System Selection] MRS operator band table
+ * [Operator based Band Table] MRS part
+ *
+ * 08 17 2018 kuan-wei.chen
+ * [MOLY00346647] [MT6297][VDM/L4] changes for 97
+ * [VMOLY] vdm related others
+ *
+ * 08 17 2018 james-chi-ju.chang
+ * [MOLY00306148] [NAS] pangu giant CR
+ * interface
+ *
+ * 07 30 2018 chi-chun.lu
+ * [MOLY00342741] [MakeFile] [UMOLYE] [Modify Makefile Rules] enhance build flow for cgen tdd/fdd preprocessing files
+ *
+ * .
+ *
+ *
+ *******************************************************************************/
+/********************************************* Warning **********************************************
+* Please make sure header file is included correctly!
+* If the common header file is added to libParseDbModem_tdd_fdd.c, the context of header file will be preprocessed twice.
+* The change as above can lead to build time inefficiency.
+*
+* common header file => libParseDbModem.c
+* Tdd/Fdd(2g/3g) header file => libParseDbModem_tdd_fdd.c
+*
+* If the header file relate to Tdd/Fdd (2g/3g), please include the header file in libParseDbModem_tdd_fdd.c
+* If the header file is common header file or is not related to Tdd/Fdd(2g/3g), please add the header file to libParseDbModem.c
+********************************************** Warning **********************************************/
+
+#ifdef __NR_RAT__
+/* Move to lte_sec libParseDbModem.c */
+// #include "nr_mpc_comm_enum.h"
+#endif
+
+#ifdef _MODIS_ON_VC9_
+#define __w64
+#endif
+typedef int cgen_use_spare_msg_id;
+typedef int cgen_use_spare_sap_id;
+typedef int cgen_use_spare_module_id;
+typedef unsigned short msg_type;
+typedef unsigned short sap_type;
+typedef unsigned short module_type;
+
+#ifdef __GNUC__
+ typedef struct __va_list { void *__ap; } __builtin_va_list;
+ #define INLINE __inline
+ #define inline __inline
+#endif
+
+#define __declspec(s)
+//"ps\\tools\\asn1lib\\include\\act-ttbuffmgr.h"
+#undef STDC_HEADERS //it will include stdio.h
+
+#ifdef __RVCT__
+#ifndef __int64
+ typedef long long __int64;
+#endif
+
+
+#define _ARMABI
+
+#endif
+
+#ifdef __UE_SIMULATOR__
+#ifndef __int64
+ typedef long long __int64;
+#endif
+
+/* VMMI */
+#include "l4c2uegw_struct.h"
+
+#endif /* __UE_SIMULATOR__ */
+
+#include "L1Trc.h"
+
+#include "kal_public_api.h"
+#include "kal_public_defs.h"
+#include "sap_info.h"
+#include "msg_id_to_em_info_map.h"
+#include "em_mapping_for_tool.h"
+
+#include "kal_trace.h"
+
+#include "stacklib.h"
+#include "stack_timer.h"
+#include "event_shed.h"
+
+#include "intrCtrl.h"
+
+#include "mddbg_public.h"
+#if !defined(DISABLE_MDDBG_FUNCTION)
+#include "mddbg.h"
+#endif
+
+#include "em_struct.h"
+/* Start of EM related structure */
+#include "em_audio_public_struct.h"
+#include "em_cc_public_struct.h"
+#include "em_dhl_public_struct.h"
+#include "em_el1_public_struct.h"
+#ifdef __EL2_ARCH_V1__
+#include "em_el2_public_struct.h"
+#endif
+#ifdef __EL2_ARCH_V2__
+#include "em_enl2_public_struct.h"
+#endif
+#include "em_emm_public_struct.h"
+#include "em_errc_public_struct.h"
+#include "em_esm_public_struct.h"
+#include "em_imc_public_struct.h"
+#include "em_l1_public_struct.h"
+#include "em_l4_public_struct.h"
+#include "em_llc_public_struct.h"
+#include "em_ltecsr_public_struct.h"
+#include "em_mcf_public_struct.h"
+#include "em_mm_public_struct.h"
+#include "em_mmrf_public_struct.h"
+#include "em_nwsel_public_struct.h"
+#include "em_public_struct.h"
+#include "em_ratcm_public_struct.h"
+#include "em_sim_public_struct.h"
+#include "em_sm_public_struct.h"
+#include "em_sndcp_public_struct.h"
+#include "em_ss_public_struct.h"
+#include "em_ul1_public_struct.h"
+#include "em_ul2_public_struct.h"
+#include "em_vdm_public_struct.h"
+#include "em_mtf_public_struct.h"
+#include "em_nl1_public_struct.h"
+#include "em_sbp_public_struct.h"
+#include "em_uas_public_struct.h"
+#include "em_xcap_public_struct.h"
+#include "em_ostd_public_struct.h"
+
+/* End of EM related structure */
+
+/*lte %M trace usage*/
+#include "lrxpublic.h"
+#include "llpwrlpccpublic.h"
+
+#ifdef __NR_RAT__
+/* NR %M trace usage */
+/* Move to lte_sec libParseDbModem.c */
+// #include "nr_rfcc_trc_enum.h"
+#endif
+
+#if defined(__LTE_RAT__) || defined(__NR_RAT__)
+#include "l4c_enl2_struct.h"
+#endif /* __LTE_RAT__ or __NR_RAT__ */
+
+#ifdef __CDMA2000_RAT__
+#include "c2k_irat_msg_struct.h"
+#endif
+
+/* DVFS */
+#ifdef DVFS_ENABLE
+#include "DVFS_drv.h"
+#include "DVFS_drv_md.h"
+#include "DVFS_drv_modem.h"
+#include "DVFS_drv_md_public.h"
+#include "DVFS_drv_modem_public.h"
+#endif
+
+/* l1 */
+#include "l4c_l1_struct.h"
+#ifdef __PS_SERVICE__
+#endif
+#if ( defined(__GSM_RAT__) || defined(__UMTS_RAT__) )
+/* For Dual Mode L1 */
+#include "mph_dm_def.h"
+#include "mph_dm_msg.h"
+/* For Dual Mode L1 */
+#endif /* __GSM_RAT__ && __UMTS_RAT__ */
+
+#ifdef UNIT_TEST
+#endif
+
+#ifdef __MINI_LOG_SUPPORT__
+#endif /* __MINI_LOG_SUPPORT__ */
+
+#include "GV.h"
+#if defined (__DHL_V2_ENABLE__)
+/*reserve for 2.0*/
+#include "dhl_def.h"
+#include "icd_logging.h"
+#include "icd_dhl.h"
+#include "dhl_ulsp.h"
+#include "dhl_on_demand_logging_interface.h"
+#include "dhl_dsp_def.h"
+#include "dhl_ut_def.h"
+#else
+#include "dhl_def.h"
+#include "icd_logging.h"
+#include "icd_dhl.h"
+#include "dhl_internal_def.h"
+#include "dhl_notify.h"
+#endif
+
+#include "dhl_cmd_struct_def.h"
+#ifdef UNIT_TEST
+#include "dhlsim_def.h"
+#endif
+
+#ifdef __MINI_LOG_SUPPORT__
+#include "tst_mini_log.h"
+#endif /* __MINI_LOG_SUPPORT__ */
+
+#if defined(GEN_FOR_PC)
+#include "tst_Catcher_version.h"
+#include "tst_catcher_diagonsis_info.h"
+#endif //#if defined(GEN_FOR_PC)
+
+#include "custom_cmd.h"
+
+#ifndef NWSEL_NOT_PRESENT
+#endif
+
+#include "gmss_public.h"
+
+#ifndef GMSS_NOT_PRESENT
+#include "gmss_msgid.h"
+#include "gmss_nwsel_struct.h"
+#include "gmss_common.h"
+#include "gmss_context.h"
+#include "gmss_css_recv.h"
+#include "gmss_css_send.h"
+#include "gmss_def.h"
+#include "gmss_main.h"
+#include "gmss_mcc_pool.h"
+#include "gmss_nwsel_recv.h"
+#include "gmss_nwsel_send.h"
+#include "gmss_rat_ctrl.h"
+#include "gmss_sim_access.h"
+#include "gmss_geo_center.h"
+#include "gmss_nr_map.h"
+#include "gmss_state.h"
+#include "gmss_timer.h"
+#include "gmss_trc.h"
+#include "gmss_utility.h"
+#include "gmss_ut.h"
+#endif
+
+#include "nas_sv_msgid.h"
+#include "nas_task.h"
+
+#ifndef __L1_STANDALONE__
+#include "nas_sv_trc.h"
+#endif
+
+#include "nas_sv_context.h"
+#include "rac_nas_sv_struct.h"
+#include "nas_sv_css_struct.h"
+#include "nas_sv_errc_struct.h"
+#include "l4c_nas_sv_struct.h"
+#include "ddm_l4c_struct.h"
+#include "l4c_mrs_struct.h"
+
+#include "smic_msgid.h"
+#include "smic_context.h"
+#include "smic_utility.h"
+#include "smic_epsb.h"
+#include "smic_struct.h"
+#include "tcm_smic_struct.h"
+
+#ifdef __FIVEG_NAS__
+#include "vgmm_trc.h"
+#include "mcd_vgmm_gen_peer.h"
+#endif
+
+
+#ifdef DUMMY_PROTOCOL
+#ifdef __GSM_RAT__
+#endif //__GSM_RAT__
+#endif
+
+/* other module */
+#include "RM_public.h"
+
+#ifndef __L1_STANDALONE__
+/*For Protol modules*/
+
+#ifdef __PS_SERVICE__
+//#include "asn-incl.h"
+#endif
+
+#include "l4c_context.h"
+#include "l4c_common_enum.h"
+#include "l4_defs.h"
+
+/* MBMSAL */
+#include "mbmsal_defs.h"
+
+/* FLC */
+#if defined(__FLC2__) && defined(__FLC_SUPPORT__)
+#include "flc2_config.h"
+#endif
+
+#ifdef __MOD_CC__
+#include "mcd_ss_parameters.h"
+#include "mcd_ss_tcapmessages.h"
+#include "mcd_cc_peer.h"
+#include "ps2sat_struct.h"
+#include "l4c_common_enum.h"
+#include "csmcc_enums.h"
+#include "csmcc_common_enums.h"
+#include "ps2sat_struct.h"
+#include "l4c2csm_cc_struct.h"
+#include "mncc_struct.h"
+#include "mm2cm_struct.h"
+#include "cm2mm_struct.h"
+#include "cm2csce_struct.h"
+#include "cm2gas_struct.h"
+
+#include "stacklib.h"
+#include "event_shed.h"
+#include "stack_timer.h"
+#include "cc_defs.h"
+#include "cc_std_defs.h"
+#include "cc_ss_defs.h"
+#include "cc_types.h"
+#endif
+
+
+#ifdef __MOD_CSM__
+
+
+#if defined(__L1_GPS_REF_TIME_SUPPORT__) || defined(__L1_GPS_AUTO_TIMING_SYNC_SUPPORT__)
+#include "Hal_el1_struct.h"
+#endif
+
+#ifdef __AGPS_CONTROL_PLANE__
+/* SSAGPS */
+#ifdef GEN_FOR_PC
+ #ifndef __RVCT__
+ #define __int64
+ #endif //#if !defined(__RVCT__)
+#define __cdecl
+#endif //#ifndef __L1_STANDALONE__
+
+#include "applib2_asn_common.h"
+#include "applib2_mtkasn_global.h"
+#include "ss_asn.h"
+#include "l4c2csm_ss_lcs_struct.h"
+#endif
+#include "l4c_lbs_struct.h"
+#include "mnss_struct.h"
+#include "csmss_common_enums.h"
+#endif /*__MOD_CSM__*/
+
+#ifdef __MOD_SIM__
+#include "stack_timer.h"
+
+#include "phb_utils.h"
+#include "ps2sat_struct.h"
+#include "l4c2csm_cc_struct.h"
+#include "l4c_common_enum.h"
+#include "csmcc_enums.h"
+#include "csmcc_common_enums.h"
+#include "ps2sat_struct.h"
+#include "l4c2csm_cc_struct.h"
+ /* ripple */
+#include "cc2sat_struct.h"
+#include "sat_def.h"
+#include "ps2sim_struct.h"
+
+/* C2K */
+#ifdef __CDMA2000_RAT__
+#include "sim_cuim_utility.h"
+#endif /* __CDMA2000_RAT__ */
+
+#endif /*__MOD_SIM__*/
+
+#ifdef __MOD_SMU__
+
+#if defined(__MMI_FMI__)
+#endif
+#include "l4c2smu_struct.h"
+#include "ps2sim_struct.h"
+#include "ps2sat_struct.h"
+#include "smu_common_enums.h"
+#include "smu_def.h"
+#endif /*__MOD_SMU__*/
+
+#ifdef __MOD_PHB__
+#include "l4c2phb_enums.h"
+#include "l4c2phb_struct.h"
+#endif /*__MOD_PHB__*/
+
+#ifdef __MOD_UEM__
+#include "uart_sw.h"
+#include "mcd_uem_peer.h"
+#endif /*__MOD_UEM__*/
+
+#ifdef __MOD_SMSAL__
+#include "smsal_l4c_defs.h"
+#include "smsal_l4c_enum.h"
+
+/* for context */
+#include "l3_inc_enums.h"
+#include "smsal_timer.h"
+#include "smsal_enums.h"
+#include "smsal_defs.h"
+#include "l4c2smsal_struct.h"
+#include "smsal_peer_struct.h"
+
+#include "mnsms_struct.h"
+#include "smsal_structs.h"
+#include "smsal_context.h"
+#endif /*__MOD_SMSAL__*/
+
+#ifdef __MOD_SMS__
+
+/* SMS <--> SMSAL */
+#include "mnsms_struct.h"
+#include "sms_enum.h"
+#include "event_shed.h"
+#include "sms_timer.h"
+
+/* SMS Context */
+#include "sms_defs.h"
+#include "sms_tl.h"
+#include "sms_rl.h"
+#include "sms_cm.h"
+#include "sms_context.h"
+
+/* SMS <--> MM */
+#include "mcd_sms_gen_peer.h"
+#include "mcd_l3_inc_gprs_struct.h"
+#include "cm2mm_struct.h"
+#include "mm2cm_struct.h"
+#include "sms2mm_struct.h"
+#include "mm2sms_struct.h"
+
+/* SMS <--> EMM */
+#ifdef __LTE_RAT__
+#include "sms_emm_struct.h"
+#endif
+
+/* SMS <--> VGMM */
+#ifdef __NR_RAT__
+#include "sms_vgmm_struct.h"
+#endif
+
+#endif
+
+#ifndef PPP_NOT_PRESENT
+#include "mcd_l3_inc_struct.h"
+#include "mcd_l3_inc_gprs_struct.h"
+#include "l3_inc_local.h"
+#include "tcm2sm_struct.h"
+#include "tcm2ppp_struct.h"
+#include "ppp2tcm_struct.h"
+#include "ppp_l4_enums.h"
+/* PPP for CSD usage */
+ #ifdef __PPP_UT__
+ #endif // ~ #ifdef __PPP_UT__
+#endif /* ~PPP_NOT_PRESENT */
+
+#ifdef __MOD_CISS__
+#include "mcd_ss_parameters.h"
+#include "mcd_ss_tcapmessages.h"
+#include "mnss_struct.h"
+#include "mm2cm_struct.h"
+#include "cm2mm_struct.h"
+#include "mcd_l3_inc_struct.h"
+#include "mcd_l3_inc_gprs_struct.h"
+#include "l3_inc_local.h"
+#include "mcd_ciss_peer.h"
+#include "ciss_enum.h"
+#include "ciss_eval_struct.h"
+#endif /* __MOD_CISS__ */
+
+//#ifdef __PS_SERVICE__
+#ifdef __MOD_TCM__
+#include "mcd_l3_inc_struct.h"
+#include "mcd_l3_inc_gprs_struct.h"
+#include "l3_inc_local.h"
+#include "tcm2sm_struct.h"
+#include "sm2tcm_struct.h"
+#include "rat_tcm_context.h"
+#if defined(__MMI_FMI__)
+#endif
+#include "l4c2abm_struct.h"
+/* mtk00938 2008-02-20: for streaming and secondary PDP context */
+#include "mmi_sm_enums.h"
+/* End of Jeff Wu */
+#include "abm2l4c_struct.h"
+#include "l4c2tcm_struct.h"
+#include "l4c2tcm_func.h"
+#include "tcm2l4c_struct.h"
+#include "ppp2tcm_struct.h"
+#include "tcm2ppp_struct.h"
+#include "snd2tcm_struct.h"
+#include "tcm2snd_struct.h"
+#include "tcm_rattcm_struct.h"
+#include "tcm_context.h"
+
+#include "tcm_assert.h"
+#include "tcm_at_handler.h"
+#include "tcm_gprs_statistic.h"
+#include "tcm_init.h"
+#include "tcm_main.h"
+#include "tcm_pco_api.h"
+#include "tcm_qos_api.h"
+#include "tcm_reset.h"
+#include "tcm_send_msg.h"
+
+#include "tcm_sic_context.h"
+
+#include "psilib_context.h"
+#include "psilib_api.h"
+
+#ifdef __TURN_ON_GENERAL_SECONDARY_PDP__
+#include "tcm_tft_api.h"
+#endif /* __TURN_ON_GENERAL_SECONDARY_PDP__ */
+
+#ifdef __ACL_SUPPORT__
+#endif /* __ACL_SUPPORT__ */
+
+#ifdef __UGTCM__
+#include "tcm_ugtcm_check.h"
+#include "tcm_ugtcm_fsm.h"
+#include "tcm_ugtcm_send_msg.h"
+#include "tcm_ugtcm_timer.h"
+#endif /* __UGTCM__ */
+
+#endif /* __MOD_TCM__ */
+//#endif /* __PS_SERVICE__ */
+
+
+#ifndef RR_NOT_PRESENT
+#ifdef __UMTS_RAT__
+#endif
+
+/* For Poring CSN.1*/
+
+
+
+
+#include "security_keys_enums.h"
+#include "security_keys_struct.h"
+#include "as2nas_struct.h"
+#include "mcd_l3_inc_struct.h"
+#include "mcd_l3_inc_gprs_struct.h"
+#include "l3_inc_local.h"
+#include "l3_inc_enums.h"
+
+#ifdef __UMTS_RAT__
+/* John 2006/06/10*/
+#include "mcd_l3_inc_struct.h"
+#include "l3_inc_enums.h"
+#include "l3_inc_local.h"
+#ifdef __GSM_RAT__
+#endif
+#ifdef __UMTS_RAT__
+#endif
+
+#include "mrs_common_band_table.h"
+#include "mrs_common_operator_feature_table.h"
+#include "mrs_common_search.h"
+
+#ifdef __LTE_RAT__
+#endif
+
+#if defined(__LTE_RAT__)
+#include "l4c_el1_struct.h"
+#endif /* __LTE_RAT__ */
+
+
+#include "l4c_nrrc_struct.h"
+#include "rac_nrrc_struct.h"
+
+#ifdef __NR_RAT__
+#include "smsal_nrrc_struct.h"
+#endif /* __NR_RAT__ */
+
+/* For generating 3G LBM TRACE_PEER enum */
+#include "ratcm_loop_mode.h"
+
+#endif /* __UMTS_RAT__ */
+
+#if defined(__GEMINI__)
+#include "rsvas_enum.h"
+#include "rsvas_struct.h"
+#include "rsvas_mspm_struct.h"
+#include "mspm_public_api.h"
+#include "mspm_fsm.h"
+#if defined(__UMTS_RAT__)
+#include "rsvak_public_enum.h"
+#include "rsvak_enum.h"
+#include "rsvak_struct.h"
+#include "urr_rsvau_struct.h"
+#ifdef __GSM_RAT__
+#include "gas_rsva_struct.h"
+#endif /* __GSM_RAT__ */
+#endif /* __UMTS_RAT__ */
+#ifdef __LTE_RAT__
+#include "eas_rsva_struct.h"
+#include "rsvae_fsm.h"
+#endif /* __LTE_RAT__ */
+#ifdef __NR_RAT__
+#include "nrrc_rsva_struct.h"
+#include "rsvan_fsm.h"
+#endif /* __NR_RAT__ */
+#ifdef __CDMA2000_RAT__
+#include "c2k_rsva_struct.h"
+#include "rsvac_fsm.h"
+#endif /* __CDMA2000_RAT__ */
+#endif /* __GEMINI__ */
+
+#ifdef __GEMINI__
+#include "as_access_sem_context.h"
+#include "as_access_sem_funcs.h"
+#endif /* __GEMINI__ */
+
+#include "rr2lapdm_struct.h"
+#include "lapdm2rr_struct.h"
+#ifdef __GEMINI__
+#include "rr2prr_struct.h"
+#endif
+#include "l4c_l1_struct.h"
+
+/* CSN codec*/
+
+#ifdef __PS_SERVICE__
+#include "gprs_rlcmac_ul.h"
+/* Evelyn 20090415: Merge R6 */
+#endif
+
+
+#ifdef __PS_SERVICE__
+#include "mcd_l3_inc_struct.h"
+#include "mcd_l3_inc_gprs_struct.h"
+#include "l3_inc_local.h"
+#include "l3_inc_enums.h"
+
+/* peer message */
+#include "si_peer.h"
+#include "nstd_alloc_bitmap.h"
+#include "nstd_mobile_alloc_peer.h"
+#include "nstd_pmo.h"
+#include "gprs_rlcmac_dl.h"
+#include "nstd_pkt_meas_report.h"
+#include "gprs_rlcmac_ul.h"
+#include "rmc_peer.h"
+#include "gprs_rlcmac_peer.h"
+#include "meascell.h"
+#include "gprs_rlcmac_common.h"
+
+#include "llcrlc_enums.h"
+#include "rmpc_rlc_enums.h"
+#include "llc2rlc_struct.h"
+#ifdef __ADAPTIVE_PAGING_PERIOD_IN_UNACK_MODE__
+#include "rlc2rmpc_struct.h"
+#endif
+#include "rmpc2rlc_struct.h"
+#include "rmpc2mac_struct.h"
+#include "rlc2reasm_struct.h"
+#include "reasm2rlc_struct.h"
+#ifndef __MTK_TARGET__
+#endif
+#endif /* end of __PS_SERVICE__ */
+
+#ifdef __UMTS_RAT__
+
+#endif /* __UMTS_RAT__ */
+
+
+
+#include "lapdm_enums.h"
+
+// Evelyn 20080902: For MAC UT
+// Rachel 20101114: For MPAL UT
+
+/* MD IDC Start */
+#if defined (__MD97__) && !defined (__UE_SIMULATOR__)
+#include "idc_el1rx_enum.h"
+#include "idc_el1rx_str.h"
+#include "idc_el1mpc_str.h"
+#include "idc_el1tx_str.h"
+#include "idc_emac_enum.h"
+#include "idc_emac_str.h"
+#include "idc_errc_enum.h"
+#include "idc_errc_str.h"
+#include "idc_nl1rx_enum.h"
+#include "idc_nl1rx_str.h"
+#include "idc_nl1mpc_str.h"
+#include "idc_nl1tx_enum.h"
+#include "idc_nl1tx_str.h"
+#include "idc_sm_common.h"
+#include "idc_swmsg_str.h"
+#include "idc.h"
+#endif
+/* MD IDC End */
+
+#include "mll1_msgid.h"
+#include "mll1_eutran.h"
+#include "mll1_umts_tdd.h"
+
+
+#ifdef __AGPS_CONTROL_PLANE__
+#endif
+
+#endif /* RR_NOT_PRESENT */
+
+#ifndef MM_NOT_PRESENT
+
+
+
+
+
+#ifdef __PS_SERVICE__
+#endif
+
+
+#endif /* #ifndef MM_NOT_PRESENT */
+
+
+#ifdef __MOD_L4A__
+#endif
+
+#ifdef WISDOM_MMI
+#endif
+
+#ifndef VDM_NOT_PRESENT
+/* VDM */
+#include "vdm_atp_struct.h"
+#include "vdm_imc_struct.h"
+#include "vdm_eval_struct.h"
+#include "vdm_l4c_struct.h"
+#include "vdm_sdm_struct.h"
+#include "vdm_rac_struct.h"
+#include "vdm_trk_ads_msg.h"
+#include "vdm_trk_vcc_msg.h"
+#include "vdm_ads_vcc_msg.h"
+#include "vdm_ut.h"
+#include "vdm_trk_ut.h"
+#include "vdm_ads_ut.h"
+#include "vdm_vcc_ut.h"
+#include "vdm_cval_struct.h"
+#endif /* ifndef VDM_NOT_PRESENT */
+
+/**************************************************************************
+ * GPRS NAS DATA PATH BEGINS
+ **************************************************************************/
+#ifdef __PS_SERVICE__
+
+#include "sm2l4c_struct.h"
+#include "l4c2sm_struct.h"
+#include "sm_esm_struct.h"
+
+#ifndef SNDCP_NOT_PRESENT
+/* other needed struct and enums */
+#include "snd_defines.h"
+#include "sndllc_enums.h"
+#include "data_plane_sm_enums.h"
+#include "mcd_snd_peer.h"
+/* sndcp peer struct */
+/* sm local struct */
+#include "snd2tcm_struct.h"
+#include "tcm2snd_struct.h"
+#include "snd2llc_struct.h"
+#include "llc2snd_struct.h"
+#include "llc2l3_struct.h"
+#include "ratdm_sndcp_struct.h"
+#include "snd_enums.h"
+#include "snd_comp_interface.h"
+#include "snd_flc.h"
+
+#include "snd_xid.h"
+#include "snd_rfc1144.h"
+#include "snd_context.h"
+
+#endif /* SNDCP_NOT_PRESENT */
+
+#ifndef SM_NOT_PRESENT
+/* other needed struct and enums */
+
+#include "mcd_l3_inc_struct.h"
+#include "mcd_l3_inc_gprs_struct.h"
+#include "l3_inc_local.h"
+#include "l3_inc_enums.h"
+#include "mmi_sm_enums.h"
+#include "data_plane_sm_enums.h"
+#include "smmm_enums.h"
+#include "sm_common_enums.h"
+
+/* sm peer struct */
+#include "mcd_sm_gen_peer.h"
+/* sm local struct */
+#include "sm2mm_struct.h"
+#include "mm2sm_struct.h"
+#include "data_plane2sm_struct.h"
+#include "sm2data_plane_struct.h"
+#include "tcm2sm_struct.h"
+#include "sm2tcm_struct.h"
+#include "sm_defines.h"
+#include "sm_context.h"
+#include "sm_tcm_responser.h"
+
+/* sm conn sturct */
+#include "sm_core_conn_enum.h"
+#include "sm_core_conn_interface.h"
+#include "sm_conn_timer.h"
+#include "sm_conn_private_def.h"
+
+
+#endif /* SM_NOT_PRESENT */
+
+
+
+#ifndef LLC_NOT_PRESENT
+
+/* other needed struct and enums */
+#include "gmmllc_enums.h"
+#include "mmllc_enums.h"
+#include "sndllc_enums.h"
+#include "llccipher_enums.h"
+#include "llcrlc_enums.h"
+#include "security_keys_enums.h"
+/* In interface/include */
+#include "llc_peer_interface.h"
+
+/* llc local struct */
+#include "security_keys_struct.h"
+#include "l32llc_struct.h"
+#include "llc2l3_struct.h"
+#include "llc2rlc_struct.h"
+#include "rlc2llc_struct.h"
+#include "snd2llc_struct.h"
+#include "llc2snd_struct.h"
+#include "llc_flowctrl.h"
+
+#include "ratcm_llc_struct.h"
+
+/* llc asn peer struct (Order shall be kept) */
+#include "mcd_llc_peer_struct.h"
+
+/* other needed struct and enums */
+#include "stacklib.h"
+#include "stack_timer.h"
+#include "event_shed.h"
+#include "llc_lcdiplqueue.h"
+
+#include "llc_defs.h"
+#include "llc_context.h"
+#include "llc_specific_defines.h"
+
+#endif /* LLC_NOT_PRESENT */
+
+#endif /* __PS_SERVICE__ */
+
+#endif /*__L1_STANDALONE__*/
+
+/**************************************************************************
+ * GPRS NAS DATA PATH ENDS
+ **************************************************************************/
+
+#ifndef DATA_NOT_PRESENT
+
+
+
+
+
+#endif /* DATA_NOT_PRESENT */
+
+#if defined(__UMTS_RAT__) && defined(__MTK_UL1_FDD__)
+#include "ul1cal.h"
+#endif
+
+#ifdef __AST_TL1_TDD__
+#endif
+
+
+
+//#ifdef __MCD__
+
+//#endif
+
+#include "uart_sw.h"
+
+#ifdef __IRDA_SUPPORT__
+#ifndef OBEX_NOT_PRESENT
+#endif
+
+#ifndef IRCOMM_NOT_PRESENT
+#endif
+#endif /* __IRDA_SUPPORT__ */
+
+#if defined(__MOD_SMSAL__) && !defined(SOC_NOT_PRESENT) //kevin 05/23
+#endif /*__MOD_SMSAL__*/
+
+#ifndef __L1_STANDALONE__
+#include "smsal_as_struct.h"
+#endif
+
+#ifdef __LTE_RAT__
+#include "mll1_msgid.h"
+#include "mll1_eutran.h"
+#include "mll1_umts_tdd.h"
+#endif /*__LTE_RAT__*/
+
+#if defined(__MOD_RAC__)
+#include "l4c2rac_struct.h"
+#include "rac2l4c_struct.h"
+#ifdef __LTE_RAT__
+#include "rac_eval_struct.h"
+#endif /* __LTE_RAT__ */
+#include "mmi2mm_struct.h"
+#include "mm2mmi_struct.h"
+#include "rac_defs.h"
+#include "rac_mrs_struct.h"
+#include "rac_em_struct.h"
+#include "rac_context.h"
+#include "rac_gmss_struct.h"
+#endif /* __MOD_RAC__ */
+
+#ifndef L4_NOT_PRESENT
+#include "rmmi_context.h"
+#include "drvsignals.h"
+#include "l4_ipc_msg_struct.h"
+#endif
+
+/* for BMT */
+#include "drvsignals.h"
+/* for BMT */
+
+#include "audio_enum.h"
+
+#ifdef __WIFI_SUPPORT__
+#ifdef WIFI_BB_MT5921
+#endif
+#endif
+
+#define BREAK
+
+#ifndef __L1_STANDALONE__
+#ifdef GEN_FOR_PC
+//#include "sasken_msg.h"
+//#include "smsal_peer.h"
+//#include "mpal2rr_unpack_struct.h"
+//#include "rr2mpal_unpack_struct.h"
+#ifdef __UMTS_FDD_MODE__
+//#include "nas_msg.h"
+#endif
+
+#ifdef __UMTS_RAT__
+#endif /* #ifdef __UMTS_RAT__ */
+#ifdef __PS_SERVICE__
+#include "rlc2mac_unpack_struct.h"
+#endif /*__PS_SERVICE__*/
+#endif /*GEN_FOR_PC*/
+#endif /*__L1_STANDALONE__*/
+
+
+#ifdef __PS_SERVICE__
+#endif
+
+#ifndef __MTK_TARGET__
+#endif
+
+
+#ifdef __IPERF__
+#endif /* __IPERF__ */
+
+#ifdef __DRM_SUPPORT__
+#endif /* __DRM_SUPPORT__ */
+
+#ifdef GIS_SUPPORT
+#endif
+
+#ifdef __CMUX_SUPPORT__
+#include "cmux_struct.h"
+#include "cmux_def.h"
+#endif /* __CMUX_SUPPORT__ */
+
+
+#ifdef __IPCORE_SUPPORT__
+#include "ipc_struct.h"
+#endif /* __IPCORE_SUPPORT__ */
+
+#ifdef __IPFCORE_SUPPORT__
+#include "ipfc_enums.h"
+#endif /* __IPFCORE_SUPPORT__ */
+
+#ifdef __DPFM_SUPPORT__
+#include "dpfm_enums.h"
+#include "dpfm_struct.h"
+#endif /* __DPFM_SUPPORT__ */
+
+#ifdef __TMC_SUPPORT__
+#include "tmc_struct.h"
+#include "tmc_enums.h"
+#endif /* __TMC_SUPPORT__ */
+
+#ifdef __HIF_AOMGR_SUPPORT__
+#endif /* __HIF_AOMGR_SUPPORT__ */
+
+#ifdef __ETHERCORE_SUPPORT__
+#endif /* __ETHERCORE_SUPPORT__ */
+
+#ifdef __NMU_ENABLE__
+#include "dhcp4c_struct.h"
+#include "ndpc_struct.h"
+#endif
+
+#ifdef __USB_ECM_SUPPORT__
+#endif
+
+#if defined(__GPS_SUPPORT__) || defined(__BT_GPS_SUPPORT__)
+#include "gps_struct.h"
+#endif
+
+#ifndef __L1_STANDALONE__
+
+/* for NAS/RATCM inerface */
+#include "mcd_l3_inc_struct.h"
+#include "mcd_l3_inc_gprs_struct.h"
+#include "l3_inc_local.h"
+#include "l3_inc_enums.h"
+
+#include "smsal_ratcm_struct.h"
+#include "nwsel_ratdm_struct.h"
+
+#ifdef __PS_SERVICE__
+#include "mm_ratdm_struct.h"
+#include "sm_ratdm_struct.h"
+#include "esm_ratdm_struct.h"
+#include "smic_ratdm_struct.h"
+
+#ifndef UART_SW_H
+#include "uart_sw.h"
+#endif // ~ #ifndef UART_SW_H
+#ifndef _PS_RATDM_STRUCT_H
+#endif // ~ #ifndef _PS_RATDM_STRUCT_H
+#include "tcm_ratdm_struct.h"
+#ifdef __CGEN_UMTS_FDD_MODE__ /* __UMTS_FDD_MODE__ */
+#endif
+/* L4C -> RATDM */
+//#ifndef _L4C_RATDM_STRUCT_H
+#ifdef __CGEN_UMTS_FDD_MODE__ /* __UMTS_FDD_MODE__ */
+#endif
+//#endif
+
+/* L4C -> IPCORE */
+#include "l4c_ipcore_struct.h"
+
+/* For RATDM/RABM UT */
+#endif
+
+#ifdef __GSM_RAT__
+/* for RATCM/GAS interface */
+#include "ratcm_gas_enums.h"
+#include "ratcm_gas_struct.h"
+#endif
+
+#endif /* ! __L1_STANDALONE__ */
+
+
+/* mtk04121 */
+#if defined(__MOD_TCM__)
+#include "l3_inc_local.h"
+#include "tcm2sm_struct.h"
+#include "sm2tcm_struct.h"
+#include "rat_tcm_context.h"
+#include "flc2_config.h"
+#include "mmi_sm_enums.h"
+#include "l4c2tcm_struct.h"
+#include "l4c2tcm_func.h"
+#include "tcm_api.h"
+#include "tcm2l4c_struct.h"
+#include "tcm_rattcm_struct.h"
+/* PPP Dial-up */
+#include "ppp2tcm_struct.h"
+#include "tcm2ppp_struct.h"
+#include "snd2tcm_struct.h"
+#include "tcm2snd_struct.h"
+#include "tcm_rattcm_struct.h"
+#include "tcm_context.h"
+#include "tcm_assert.h"
+#include "tcm_at_handler.h"
+#include "tcm_gprs_statistic.h"
+#include "tcm_init.h"
+#include "tcm_main.h"
+#include "tcm_pco_api.h"
+#include "tcm_qos_api.h"
+#include "tcm_reset.h"
+#include "tcm_send_msg.h"
+
+#ifdef __TURN_ON_GENERAL_SECONDARY_PDP__
+#include "tcm_tft_api.h"
+#endif /* __TURN_ON_GENERAL_SECONDARY_PDP__ */
+
+#ifdef __ACL_SUPPORT__
+#endif /* __ACL_SUPPORT__ */
+
+#ifdef __UGTCM__
+#include "tcm_ugtcm_check.h"
+#include "tcm_ugtcm_fsm.h"
+#include "tcm_ugtcm_send_msg.h"
+#include "tcm_ugtcm_timer.h"
+#endif /* __UGTCM__ */
+
+#if defined(__ETCM__)
+#include "eval_msgid.h"
+#include "upcm_msgid.h"
+#include "tcm_eval_enums.h"
+#include "tcm_eval_struct.h"
+#include "tcm_upcm_struct.h"
+#include "tcm_etcm_utility.h"
+#endif
+#endif
+
+/**************************************************************************
+ * WCDMA INTERFACE BEGINS
+ **************************************************************************/
+#ifdef __UMTS_RAT__
+#ifdef __CGEN_UMTS_FDD_MODE__ /* __UMTS_FDD_MODE__ */
+#endif
+#ifdef __CGEN_UMTS_TDD128_MODE__
+#endif
+#include "kal_public_api.h"
+
+#ifdef __CGEN_UMTS_FDD_MODE__ /* __UMTS_FDD_MODE__ */
+#endif /*__UMTS_FDD_MODE__*/
+
+#ifdef __CGEN_UMTS_FDD_MODE__ /* __UMTS_FDD_MODE__ */
+#include "hal_ul1_def.h"
+#include "hal_ul1_struct.h"
+#endif /*__UMTS_FDD_MODE__*/
+
+#ifdef __UL1_ON_MNT__
+/* for UL1 MoDIS */
+#endif
+
+#ifdef DUMMY_PROTOCOL
+/* 3G DPS */
+#endif
+
+
+/* for MAL1 interface */
+#ifdef __MA_L1__
+#endif
+
+#ifndef __L1_STANDALONE__
+
+
+/* for UAS common structure and enums */
+
+/* for inter-core common structure and enum */
+#include "as_inter_core_enum.h"
+#include "as_inter_core_struct.h"
+#include "gise_str.h"
+
+#ifdef GEN_FOR_PC
+#include "mcd_rrc_asn.h"
+//John 960724
+#include "asn_aper_common.h"
+#include "mcd_h245_asn.h"
+#endif
+
+//#ifdef __UMTS_FDD_MODE__
+//#endif
+
+/* for UAS internal interface */
+/* for URR/UL2D interface */
+#include "meme_drlc_struct.h"
+#ifdef __CGEN_UMTS_FDD_MODE__
+#endif
+
+
+/* for URR/UL2 interface */
+
+/* for UL2/UL2D interface */
+#ifdef __CGEN_UMTS_FDD_MODE__ /* __UMTS_FDD_MODE__ */
+#endif
+#ifdef __CGEN_UMTS_FDD_MODE__ /* __UMTS_FDD_MODE__ */
+#endif
+/* for URR internal interface */
+#include "ex_item.h"
+#include "sim_public_enum.h"
+//#ifdef __UMTS_FDD_MODE__
+//#endif
+
+/* discuss with SIM owner, UAS add sim header file when requirement.*/
+#if defined(UNIT_TEST) && defined(__UMTS_TDD128_MODE__)
+#include "sim_private_struct.h"
+#endif
+
+/* for RATCM/UAS interface */
+#include "ratcm_uas_enums.h"
+#include "ratcm_slce_enums.h"
+#include "ratcm_rrce_enums.h"
+#include "ratcm_uas_struct.h"
+#include "ratcm_rrce_struct.h"
+#include "ratcm_slce_struct.h"
+#include "ratcm_cse_enums.h"
+#include "ratcm_cse_struct.h"
+#include "ratcm_bmc_struct.h"
+#include "ratcm_urlc_struct.h"
+#include "ratdm_urlc_struct.h"
+
+/* for EAS interface */
+#include "ratdm_el2_struct.h"
+
+/* for UAS/GAS interface */
+
+#include "nas_as_inter_core_struct.h"
+
+#ifdef __GEMINI__
+/* for GAS/UL2 interface */
+#include "l3_inc_enums.h"
+#endif /* __GEMINI__ */
+
+/*Vito: for CSR UT */
+
+/* Jeff Wu 2006-02-13: For RABM/PDCP UT */
+#include "flc2_config.h"
+
+/* Evan Chen 2007-08-13: For MM UT */
+
+/* Gibran Chang 2006/03/23: For CSCE */
+
+/* Nicky Chou 2014/08/25: For LCSCE */
+#include "urr_inter_core_enum.h"
+#include "as_inter_core_enum.h"
+
+/* For LMEME */
+
+/*For LRRCE*/
+#if defined(__CGEN_UMTS_TDD128_MODE__)
+#endif
+
+/* Dennis Weng 2010/08/09: For SIBE */
+/* YenChih Yang 2012/04/18: For USIME */
+
+/* For MEME */
+/* For TDD please modify the code wrapped by __UMTS_TDD128_MODE__ */
+/* For TDD please modify the code wrapped by __UMTS_FDD_MODE__ */
+#ifdef __GEMINI__
+#endif
+
+#if defined(__CGEN_UMTS_TDD128_MODE__)
+#endif
+
+#if defined(__CGEN_UMTS_FDD_MODE__) /* defined(__UMTS_FDD_MODE__) */
+#endif
+
+/* MH Change 2006/04/18: For RRCE */
+
+/* John Tang 2005/11/08: For DB Unit-test tool */
+#ifdef GEN_FOR_PC
+
+#define __int64
+#define __cdecl
+#include "db_io.h"
+#include "./fdd/db_dump_api_fdd.h"
+#ifdef __UMTS_TDD128_MODE__
+#include "./tdd/db_dump_api_tdd.h"
+#endif
+#endif //#ifndef __L1_STANDALONE__
+
+
+
+
+/* Alfie: 2006-0422 For SLCE Trace Info Start */
+#ifndef __size_t
+#define __size_t 1
+typedef unsigned int size_t; /* used for dbme.h */
+#endif
+
+#ifdef __CGEN_UMTS_FDD_MODE__ /* __UMTS_FDD_MODE__ */
+#endif
+/* Alfie: 2006-0422 For SLCE Trace Info End */
+
+
+/*Christine 2006/05/02*/
+
+#endif
+//Matt 2007/11/30 for VT feature
+/*
+#ifdef __VIDEO_CALL_SUPPORT__
+#include "..\..\..\3g324m\interface\inc\vt_tst_enum.h"
+#include "..\..\..\3g324m\appl\inc\vt_ut_struct.h"
+#endif
+*/
+
+#endif /* __UMTS_RAT__ */
+#ifdef __L1_STANDALONE__
+#ifdef __MOD_NVRAM__
+#include "ex_item.h"
+
+#if defined(__MMI_FMI__)
+#endif
+
+#endif /*__MOD_NVRAM__*/
+#endif
+/**************************************************************************
+ * WCDMA INTERFACE ENDS
+ **************************************************************************/
+
+#if defined(__GPS_SUPPORT__) || defined(__BT_GPS_SUPPORT__)
+#include "gps_struct.h"
+#ifdef __AGPS_SUPPORT__
+#include "gps2lcsp_enum.h"
+#include "gps2lcsp_struct.h"
+#endif /* __AGPS_SUPPORT__ */
+#endif
+
+#include "lbs_dhl_struct.h"
+#include "lbs_loc_info_struct.h"
+#include "lbs_gnss_tc_struct.h"
+#include "gnss_tc_common_struct.h"
+#include "gnss_tc_lte_struct.h"
+#include "gnss_tc_nr_struct.h"
+#include "gnss_tc_wcdma_struct.h"
+#include "gnss_tc_context.h"
+
+#ifdef __RRLP_SUPPORT__
+#include "rr2rrlp_struct.h"
+#include "rrlp_common_headers.h"
+#include "rrlp_enum.h"
+#endif /* __RRLP_SUPPORT__ */
+
+#ifdef __AGPS_SUPPORT__
+
+#if defined(__UAGPS_CP_SUPPORT__)
+#include "uagps_cp_sibe_struct.h"
+#include "uagps_cp_meme_struct.h"
+#include "l4c_uagps_cp_struct.h"
+#include "uagps_cp_gps_struct.h"
+#endif /* __UAGPS_CP_SUPPORT__ */
+
+#include "lbs_common_enum.h"
+#endif /* __AGPS_SUPPORT__ */
+
+//#if defined(__AGNSS_SUPPORT__)
+#include "gnss2lcsp_struct.h"
+#include "gnss2lcsp_enum.h"
+//#endif /* #if defined(__AGNSS_SUPPORT__) */
+
+/* for LPP*/
+#if defined(__LTE_RAT__) && defined(__LPP_SUPPORT__)
+#include "lpp_msg_struct.h"
+#include "lpp_msg_enum.h"
+#include "lpp_lbs_msg_struct.h"
+#include "lpp_context.h"
+#include "lpp_mcd_struct_id.h"
+#include "Hal_el1_def.h"
+#include "Hal_el1_struct.h"
+/* LPPe */
+#if defined(__LPP_EXT_SUPPORT__)
+#include "lpp_lppe_struct.h"
+#include "lpp_ext_context.h"
+#endif
+#endif
+#include "as2l4c_struct.h"
+
+//#ifdef __ACMT_SUPPORT__
+#include "nas2l4c_struct.h"
+//#endif
+
+/*For UL1A*/
+#if defined(__UMTS_RAT__) && defined(__MTK_UL1_FDD__)
+#include "ul1a_enum.h"
+#endif
+
+#if defined (__WMT_SUPPORT__) || defined(__WIFI_BT_SINGLE_ANTENNA_SUPPORT__)
+#endif /* __WMT_SUPPORT__*/
+
+#ifdef __GADGET_SUPPORT__
+#endif /* __GADGET_SUPPORT__ */
+
+#if defined(__RMMI_UT__)
+#include "tcm_context.h"
+#endif
+
+#include "sim_public_struct.h"
+#include "sim_private_struct.h"
+#include "sim_public_enum.h"
+
+#ifndef __MTK_TARGET__
+#include "l4c_context.h"
+#endif
+
+#if defined(__L4C_GPRS_UT__)
+#include "rmmi_context.h"
+#endif
+
+#ifndef __L1_STANDALONE__
+#include "rmmi_common_enum.h"
+#include "rmmi_struct.h"
+#endif
+#ifdef __VIDEO_ARCHI_V2__
+#endif /* __VIDEO_ARCHI_V2__ */
+
+/* mpl & source*/
+
+#if defined(__L1_GPS_REF_TIME_SUPPORT__) || defined(__L1_GPS_AUTO_TIMING_SYNC_SUPPORT__)
+#include "hal_l1_struct.h"
+#endif /*(__L1_GPS_REF_TIME_SUPPORT__) || (__L1_GPS_AUTO_TIMING_SYNC_SUPPORT__)*/
+
+#if defined (__MOD_NVRAM__)
+#endif
+/* mtk04121 */
+
+/* SIM CODEGEN begin */
+#ifndef SIM_NOT_PRESENT
+#include "sim_ps_struct.h"
+#include "sim_public_struct.h"
+#endif
+/* SIM CODEGEN end */
+
+/* EVAL CODEGEN begin */
+#ifdef __EVAL_ENABLE__
+#include "eval_msgid.h"
+#include "l4c_eval_struct.h"
+#include "nwsel_eval_struct.h"
+#include "rac_eval_struct.h"
+#include "tcm_eval_struct.h"
+#include "sms_eval_struct.h"
+#include "smsal_eval_struct.h"
+#endif
+/* EVAL CODEGEN end */
+
+//etc interface
+#include "etc_upcm_struct.h"
+#include "etc_msgid.h"
+
+/* TFTLIB CODEGEN */
+#include "tftlib_common_struct.h"
+#include "tftlib_msgid.h"
+#include "tftlib_msg_struct.h"
+
+/* mtk00938: Multimode interfaces */
+#ifdef __LTE_RAT__
+#include "mm_emm_struct.h"
+#include "mm_errc_struct.h"
+#include "sm_esm_struct.h"
+#endif
+
+/* mtk00938: This file is necessary even without LTE */
+
+/* MOD_PAM */
+#ifdef __PS_SERVICE__
+#include "pam_msg_struct.h"
+#include "nwsel_pam_struct.h"
+#include "pam_context.h"
+#include "pam_sm_proc.h"
+#include "pam_vzw_util.h"
+#include "pam_send_msg.h"
+#include "pam_assert.h"
+#include "pam_main.h"
+#include "pam_public_api.h"
+#include "pam2tcm_struct.h"
+#include "usm_context.h"
+#endif /* __PS_SERVICE__ */
+
+/* SMIC */
+#ifdef __PS_SERVICE__
+#include "smic_common_def.h"
+#include "smic_context.h"
+#include "smic_main.h"
+#include "smic_utility.h"
+#endif /* __PS_SERVICE__ */
+
+/* UTT/LTT/GTEST */
+#ifdef __LTT_ENABLE__
+#endif /* __LTT_ENABLE__ */
+
+#if 0
+#if defined (__EL1_ENABLE__) && !defined(__UE_SIMULATOR__)
+/* under construction !*/
+/* under construction !*/
+#if defined(__LTE_RAT__) && defined(__L1EDPS_ENABLE__)
+#endif /* __LTE_RAT__ */
+#if defined(__MTK_TARGET__) && !defined(__L1EDPS_ENABLE__)
+/* under construction !*/
+#endif /* __MTK_TARGET__ */
+#endif /* __EL1_ENABLE__ */
+#endif
+
+#if defined (__IDC_ENABLED__)
+#if defined (__MD97__)
+#include "idc_md_msgid.h"
+#include "idc_msgid.h"
+#else
+#include "ccci_ipc_msgid.h"
+#endif
+#endif
+
+#if defined (__EL2_V2_ENABLE__) || defined(__L1EDPS_ENABLE__)
+#include "emac_ml1s_msg.h"
+#endif
+#include "mdfpm_msgid.h"
+
+
+#if 0
+#if defined(__EL2_ENABLE__) || defined(__L1EDPS_ENABLE__)
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+#endif
+
+/* global enum */
+/***************************************************************
+* if add _msgid.h or _sap.h file, should include the _msgid.h or _sap.h in : *
+* kal_debug_msg_sap_defs.h & libParseDbModem.c & srcParseDbModem.c *
+****************************************************************/
+#include "module_msg_range.h"
+#include "perf_msgid.h"
+#include "sysservice_msgid.h"
+#include "cc_msgid.h"
+#include "ciss_msgid.h"
+#include "mm_msgid.h"
+#include "sms_msgid.h"
+#include "sim_public_msgid.h"
+#include "sim_ps_msgid.h"
+#include "ps_public_l4_msgid.h"
+#include "l4_msgid.h"
+#include "psdm_msgid.h"
+#include "rr_msgid.h"
+#include "llc_msgid.h"
+#include "p2p_msgid.h"
+#include "sndcp_msgid.h"
+#include "sm_msgid.h"
+#include "pam_msgid.h"
+#include "data_msgid.h"
+#include "ps_public_vt_msgid.h"
+#include "VT_msgid.h"
+#include "nvram_msgid.h"
+#include "l1_msgid.h"
+#include "hal_l1_msgid.h"
+#include "l1hisr_msgid.h"
+#include "ft_msgid.h"
+#include "tst_msgid.h"
+#include "audio_msgid.h"
+#include "cldmacore_msgid.h"
+#include "ratcm_msgid.h"
+#include "ratdm_msgid.h"
+#include "uas_gas_msgid.h"
+#include "mrs_msgid.h"
+#include "uas_gas_gemini_msgid.h"
+#include "ul1_msgid.h"
+#include "ul1data_msgid.h"
+#include "ul1hisr_msgid.h"
+#include "ul1c_msgid.h"
+#include "ll1_msgid.h"
+#include "ul1tst_msgid.h"
+#include "ulcs_msgid.h"
+#include "tl1_msgid.h"
+#include "lpp_msgid.h"
+#include "tl1data_ast_msgid.h"
+#include "tl1fta_ast_msgid.h"
+#include "rsva_msgid.h"
+#include "mspm_msgid.h"
+#include "ndis_msgid.h"
+#include "ps_public_ups_msgid.h"
+#include "ups_msgid.h"
+#include "ps_public_supl_msgid.h"
+#include "supl_msgid.h"
+#include "cmux_msgid.h"
+#include "ppp_msgid.h"
+#include "ext_modem_msgid.h"
+#include "wmt_msgid.h"
+#include "em_msgid.h"
+#include "fs_msgid.h"
+#include "med_msgid.h"
+#include "dps_msgid.h"
+#include "udps_msgid.h"
+#include "drv_msgid.h"
+#include "meut_msgid.h"
+#include "l1_ext_msgid.h"
+#include "haplus_msgid.h"
+#include "hif_mw_msgid.h"
+#include "hif_svc_msgid.h"
+#include "el1_msgid.h"
+#include "mcf_msgid.h"
+#include "sap_relayer_msgid.h"
+
+#include "sap_range.h"
+#include "svc_sap.h"
+#include "md_sap.h"
+#include "md_svc_sap.h"
+#include "md_drv_sap.h"
+#include "md_mmi_sap.h"
+#include "md_mw_sap.h"
+#include "mw_sap.h"
+#include "drv_sap.h"
+
+#include "srv_modid.h"
+#include "modem_2g3g_modid.h"
+#include "modem_4g_modid.h"
+#include "modem_5g_modid.h"
+#include "middleware_modid.h"
+#include "drv_modid.h"
+#include "hisr_modid.h"
+#include "isr_modid.h"
+#include "system_profiler_public.h"
+#if defined(__GSM_RAT__) || defined(__UMTS_RAT__) // BJM
+#include "l1_core_private.h"
+#include "l1_rtb.h"
+#include "l1_rtb_timertype.h"
+#ifdef __MTK_UL1_FDD__
+#include "ul1c_trc.h"
+#include "ul1c_core_private.h"
+#include "ul1_public.h"
+#endif /* __MTK_UL1_FDD__ */
+#endif /* defined(__GSM_RAT__) || defined(__UMTS_RAT__) */
+
+//mtk04121
+#if defined(__ETCM__)
+#include "tcm_eval_struct.h"
+#include "tcm_eval_enums.h"
+#include "tcm_upcm_struct.h"
+
+#include "eval_msgid.h"
+#include "upcm_msgid.h"
+
+#endif
+
+#include "mtf_msgid.h"
+
+#ifdef __MT_FRAMEWORK_SUPPORT__
+#include "mtf_struct.h"
+#endif
+
+#include "qmu_bm_enum.h"
+#include "upcm_enum.h"
+#include "tft_pf_enum.h"
+
+#include "qbm_stats.h"
+#include "upcm_em_struct.h"
+#include "eval_upcm_struct.h"
+
+#include "mrs_upcm_struct.h"
+
+#include "upcm.h"
+
+/* for RAC/GAS interface */
+#include "rac_gas_enums.h"
+#include "rac_gas_struct.h"
+
+#if defined(__IMS_SUPPORT__)
+/* SDM */
+#include "sdm_atp_struct.h"
+#include "sdm_atp_enums.h"
+#include "sdm_imcsms_enums.h"
+#include "sdm_imcsms_struct.h"
+#include "sdm_trc.h"
+#include "sdm_msgid.h"
+#include "sdm_context.h"
+#include "sdm_imc_struct.h"
+
+/* IMSP */
+#include "atp_structs.h"
+#include "atp_msgid.h"
+#include "atp_imcsms_struct.h"
+#include "atp_dmf_struct.h"
+
+/* IMC */
+#include "dhl_ims_sap_collect.h"
+
+/* IMCSMS */
+#include "imcsms_msgid.h"
+#include "imcsms_imc_struct.h"
+#include "imcsms_enums.h"
+#include "imcsms_defs.h"
+#include "imcsms_rl.h"
+#include "imcsms_context.h"
+#include "imcsms_timer.h"
+
+/* IWLAN */
+#include "iwlan_msg_struct.h"
+#include "iwlan_sdm_struct.h"
+#include "iwlan_public_defs.h"
+
+/* IMCB */
+#include "imcb_msgid.h"
+#include "imsm_imcb_struct.h"
+//#include "imsvt_imcb_struct.h"
+#ifdef __FIVEG_VOICE__
+#include "atp_imcb_struct.h"
+#endif /* __FIVEG_VOICE__ */
+
+/* IMS_STACK */
+#include "ims_stack_msgid.h"
+#include "ims_stack_struct.h"
+#include "ims_common_def.h"
+
+/* IMSUA */
+#include "imsua_msgid.h"
+#include "imcb_imsua_struct.h"
+#include "imc_imsua_struct.h"
+
+#endif /* defined(__IMS_SUPPORT__) */
+
+
+#ifdef __N3GPP_OFFLOAD_ENABLE__
+
+/* N3ANS */
+#include "n3ans_msgid.h"
+#include "n3epc_n3ans_struct.h"
+#include "atp_n3ans_struct.h"
+#include "n3ans_l4bnw_struct.h"
+
+/* N3CF */
+#include "n3cf_msgid.h"
+#include "n3cf_msg_struct.h"
+#include "n3cf_atp_struct.h"
+#include "custom_n3cf_config.h"
+
+/* N3EPC */
+#include "n3epc_msgid.h"
+#include "d2pm_n3epc_struct.h"
+#include "d2rm_n3epc_struct.h"
+#include "iwlan_n3epc_struct.h"
+#include "atp_n3epc_struct.h"
+
+/* N3SAM */
+#include "n3sam_msgid.h"
+#include "n3epc_n3sam_struct.h"
+#include "n3sam_eap_proxy_struct.h"
+#include "n3sam_primitive_log_struct.h"
+
+#endif /* __N3GPP_OFFLOAD_ENABLE__ */
+
+
+#ifdef __MD_WLC_SUPPORT__
+
+#include "wlc_msgid.h"
+#include "atp_wlc_struct.h"
+#include "wlc_atp_struct.h"
+#include "wlc_user_struct.h"
+#include "tcpip_wlc_struct.h"
+
+#endif /* __MD_WLC_SUPPORT__ */
+
+/* CCCI IPC */
+#if defined(__CCCIDEV_SUPPORT__)
+#include "ccci_ipc_msgid.h"
+#include "cccisrv_struct.h"
+#include "ccci_fs_if.h"
+#endif /*defined(__CCCIDEV_SUPPORT__)*/
+#include "mdfpm_msgid.h"
+
+/* CCISM */
+#if defined(__HIF_CCISM_SUPPORT__)
+#include "ccismcore_msgid.h"
+#endif /*defined(__HIF_CCISM_SUPPORT__)*/
+
+/* MCIF */
+#if defined(__MCIF_SUPPORT__)
+#include "mcif_msgid.h"
+#include "mcif_public_api.h"
+#ifdef __MCIF_WIFI_SUPPORT__
+#include "wsvc_msgid.h"
+#include "wsvc_msg_struct.h"
+#include "wfpm_msgid.h"
+#include "wfpm_struct.h"
+#endif
+#endif /*defined(__MCIF_SUPPORT__)*/
+
+#ifdef __MD_IPSEC_SUPPORT__
+#include "ipsec_msgid.h"
+#include "ipsec_tcpip_msg.h"
+#include "ipsec_cp_msg.h"
+#include "ipsec_wtunnel_msg.h"
+#include "ipsec_atp_msg.h"
+#include "wtunnel_msgid.h"
+#include "n3sam_wt_struct.h"
+#endif /* __MD_IPSEC_SUPPORT__ */
+
+#include "ps_public_struct.h"
+
+#ifdef __IPCORE_SUPPORT__
+#include "pfm_struct.h"
+#include "pfm_enums.h"
+#endif /* __IPCORE_SUPPORT__ */
+
+#if defined(__HLT_SUPPORT__)
+#include "hlt_if.h"
+#endif
+#include "mmrf_msgid.h"
+#include "mmrf_msg_interface.h"
+#include "ftc_msg.h"
+#include "l1tst_msgid.h"
+#include "el1tst_msgid.h"
+
+#ifdef __MTK_MD_DIRECT_USB_SUPPORT__
+#endif
+
+#ifdef __WIFIPROXY_SUPPORT__
+#include "wifi_proxy_msgid.h"
+#include "wifi_proxy_public.h"
+#include "wifi_proxy_struct.h"
+#endif
+
+#include "l1d_gpt_if.h"
+#include "el1d_gpt_if.h"
+#include "ul1d_gpt_if.h"
+#include "nl1_gpt_if.h"
+#include "mml1_gpt_if.h"
+
+#include "mml1_rf_interface.h"
+
+#if defined(__MD97__)
+#include "mml1_cdf_trc_enum.h"
+#include "mml1_endc_trc_enum.h"
+#endif
+
+#include "iwlan_errc_struct.h"
+#include "iwlan_atp_struct.h"
+
+#ifdef __EL1_ENABLE__
+#include "el1d_trace_public_common.h"
+#include "el1d_public.h"
+#include "el1cd_common.h"
+#include "el1_phs_trace_enum.h"
+#endif
+
+#ifdef __MD_TCPIP_SUPPORT__
+#include "tcpip_msgid.h"
+#include "tcpip_struct.h"
+#include "nal_msgid.h"
+#include "nal_struct.h"
+#ifdef __NAL_TEST__
+#endif
+#endif
+
+/* DNS */
+#ifdef __MD_TCPIP_SUPPORT__
+#include "dns_msgid.h"
+#include "dns_struct.h"
+#endif
+
+/* Ethernet Service */
+#ifdef __ETHERNET_SERVICE_SUPPORT__
+#include "ethsvc_msgid.h"
+#include "ethsvc_struct.h"
+#endif
+
+/* L4B Begin */
+#include "l4b_internal_defs.h"
+#include "atp_msgid.h"
+#include "atp_l4b_struct.h"
+#include "l4b_atci_struct.h"
+#include "l4b_cval_struct.h"
+#include "l4bpwr_struct.h"
+#include "l4bnw_struct.h"
+#include "l4bpwr_l4bnw_struct.h"
+#include "val_msgid.h"
+#include "l4bsim_struct.h"
+#include "l4bsat_struct.h"
+#include "l4bsms_struct.h"
+#include "l4aps_l4bpdn_struct.h"
+#include "ddm_l4aps_struct.h"
+#include "l4bpdn_l4c_struct.h"
+#include "l4bpdn_tcm_struct.h"
+#include "l4bpdn_cval_struct.h"
+#include "l4bpdn_struct.h"
+#include "tcm_cval_struct.h"
+#include "l4bpdn_upcm_struct.h"
+#include "l4c_upcm_struct.h"
+#include "l4bpdn_leisim.h"
+#include "l4bpdn_context.h"
+#include "l4b_vdm_struct.h"
+#include "l4bcc_struct.h"
+#include "l4bsbp_struct.h"
+#include "l4bpwr_l4bsbp_struct.h"
+#include "l4bss_struct.h"
+#include "ddm_l4bnw_struct.h"
+#include "wo_l4bnw_struct.h"
+#include "l4bnw_l4c_struct.h"
+#include "l4bpwr_l4c_struct.h"
+#ifndef __MTK_TARGET__
+//for l4b.gv
+#endif
+/* L4B End */
+
+#include "nas_sv_msgid.h"
+
+#include "ddm_msgid.h"
+#include "d2_msgid.h"
+#include "intctrl_msgid.h"
+
+#include "imsm_msgid.h"
+#include "imsm_struct.h"
+
+#include "atp_d2at_struct.h"
+#include "atp_imsm_struct.h"
+#include "atp_ddm_struct.h"
+#include "d2cm_struct.h"
+#include "d2am_struct.h"
+#include "d2_struct_tmp.h"
+#include "d2apn_struct.h"
+#include "em_ddm_public_struct.h"
+
+#include "simmngr_msgid.h"
+#include "simmngr_struct.h"
+#include "d2pm_ddm_struct.h"
+
+#include "iwlan_msgid.h"
+#include "atp_iwlan_struct.h"
+
+#include "atp_d2rm_struct.h"
+#include "d2pm_d2rm_struct.h"
+#include "d2rm_ddm_struct.h"
+#include "d2rm_iwlan_struct.h"
+#include "imc_iwlan_struct.h"
+#include "wipc_iwlan_struct.h"
+
+#include "d2ut_struct.h"
+#include "d2pm_struct.h"
+#include "d2apn_struct.h"
+
+#include "ursp_struct.h"
+#include "intctrl_user_struct.h"
+#include "ddm_intctrl_struct.h"
+
+#include "wo_msgid.h"
+
+#include "eap_common_struct.h"
+#include "eap_msgid.h"
+
+#include "atp_ltecsr_struct.h"
+#include "sim_dummy_driver.h"
+
+#include "l4c_imc_struct.h"
+#include "l4c_mt_struct.h"
+
+#include "atp_l4c_struct.h"
+#include "atp_smsal_struct.h"
+#include "atp_sms_struct.h"
+#include "sdm_sms_struct.h"
+
+#ifdef __KPALV_SUPPORT__
+#include "kpalv_msgid.h"
+#include "kpalv_struct.h"
+#endif
+
+/* MCF */
+#include "mcf_struct.h"
+#include "mcf_enum.h"
+
+#ifdef __CDMA2000_RAT__
+#include "cas_eas_struct.h"
+#include "evl1shsch.h"
+#include "rmcsch.h"
+#include "evl1fhrrm.h"
+#include "evl1fhhsca.h"
+#include "evl1fhmain.h"
+#include "evl1shmain.h"
+#include "evl1flbrphandler.h"
+#include "cphevdosch.h"
+#include "cl1tstl1psif.h"
+#include "cl1tst_l1ps_msgid.h"
+#undef register
+#define register
+#include "systyp.h"
+#include "psw_nvram.h"
+#include "elt_msg_struct.h"
+#include "cl1_elt_msg_struct.h"
+#include "elt_msgid.h"
+#include "l1d_msgid.h"
+#include "l1d_msg_struct.h"
+#include "lmd_msg_struct.h"
+#include "lmd_msgid.h"
+#include "lmds_msgid.h"
+#include "psw_msg_struct.h"
+#include "psw_msgid.h"
+#include "psws_msg_struct.h"
+#include "psws_msgid.h"
+#include "rlp_msg_struct.h"
+#include "rlp_msgid.h"
+#include "do_fcp_msg_struct.h"
+#include "do_fcp_msgid.h"
+#include "lec_msg_struct.h"
+#include "lec_msgid.h"
+#include "do_clc_msg_struct.h"
+#include "do_clc_msgid.h"
+#include "do_slc_msg_struct.h"
+#include "do_slc_msgid.h"
+#include "do_rmc_msg_struct.h"
+#include "do_rmc_msgid.h"
+#include "do_sec_msg_struct.h"
+#include "do_sec_msgid.h"
+#include "do_rcp_msg_struct.h"
+#include "do_rcp_msgid.h"
+#include "rcp_dhl_trace_enum.h"
+#include "cpbuf.h"
+#include "hlp_msgid.h"
+#include "hlp_msg_struct.h"
+#include "PPP.H"
+#include "css_msgid.h"
+#include "css_msg_struct.h"
+#include "cssdefs.h"
+#include "hsc_msgid.h"
+#include "hsc_msg_struct.h"
+#include "stub_msgid.h"
+#include "val_msgid.h"
+#include "val_msg_struct.h"
+#include "valpsdm.h"
+#include "valpdp.h"
+#include "uim_msgid.h"
+#include "uim_msg_struct.h"
+#include "uim_proxy_private_api.h"
+#include "cuim_private_api.h"
+#include "valsmsdandcn.h"
+#include "evl1fhdfs.h"
+#include "evl1fhinterho.h"
+#include "l1dsch.h"
+#include "xl1fhsth.h"
+#include "xl1shsch.h"
+#include "xl1shtmglp.h"
+#include "xl1shrfc.h"
+#include "lmdapi.h"
+#include "rmcfmp.h"
+#include "cphevdoflsrp.h"
+#include "cl1shrfc.h"
+#include "cval_ratdm_struct.h"
+#include "ratdm_chlp_struct.h"
+#include "cl1rcreq.h"
+#include "cl1rcseq.h"
+#include "cl1rcd.h"
+#include "evl1fhmm.h"
+#include "evl1fhgm.h"
+#include "rmcdrcdefs.h"
+#include "cl1shmmafc.h"
+#include "evl1shsch.h"
+#include "hscapi.h"
+#include "stub_msg_struct.h"
+#include "tas.h"
+#include "gmss_cval_struct.h"
+
+/* Add C2K EM headers */
+#include "em_public_struct_evl1.h"
+#include "em_public_struct_xl1.h"
+#include "em_public_struct_chsc.h"
+#include "em_public_struct_evl2.h"
+#include "em_public_struct_xl2.h"
+#include "em_public_struct_evl3.h"
+#include "em_public_struct_xl3.h"
+#include "em_public_struct_c2k_hlp.h"
+#include "em_public_struct_cval.h"
+
+#include "em_lbs_public_struct.h"
+#include "em_lpp_public_struct.h"
+
+#ifdef __BIP_SUPPORT__
+#include "bip_msgid.h"
+#include "bip_if.h"
+#endif
+
+//#include "ssds_imc_struct.h"
+#include "ssds_l4c_struct.h"
+
+#ifdef __XCAP_SUPPORT__
+#include "xcap_msgid.h"
+#include "xcap_if.h"
+#include "atp_xcap_struct.h"
+#endif
+
+#ifdef __DISPATCHER_SUPPORT__
+#include "dispatcher_msgid.h"
+#include "ipcore_dispatcher_struct.h"
+#include "n3epc_dispatcher_struct.h"
+#endif
+
+#ifdef __MD_CRYPTO_SUPPORT__
+#include "crypto_msgid.h"
+#include "crypto_struct.h"
+#endif
+
+#undef register
+#endif /* __CDMA2000_RAT__ */
+
+#ifdef __HTTP_TLS_SUPPORT__
+#include "http_tls_msgid.h"
+#include "http_if.h"
+#include "tls_if.h"
+#endif
+
+#ifdef __MD_CERT_SUPPORT__
+#include "cert_msgid.h"
+#include "cert_struct.h"
+#endif
+
+#ifdef __SASE_SUPPORT__
+#include "sase_msgid.h"
+#include "sase_if.h"
+#endif
+
+#if defined(__FIVEG_NAS__)
+#include "vgmm_ratdm_struct.h"
+#include "nas_sv_vgmm_struct.h"
+#include "vgmm_upcm_struct.h"
+#include "ddm_vgmm_struct.h"
+//#include "vgmm_msg_unpack.h"
+//#include "vgsm_msg_unpack.h"
+
+/* UPDS */
+#include "upds_msgid.h"
+#include "upds_common.h"
+#include "upds_context.h"
+#include "ursp_upds_struct.h"
+#include "upds_vgmm_struct.h"
+
+#endif /* __FIVEG_NAS__ */
+
+
+#if defined (__NR_RAT__)
+#if defined (__ENDC__)
+#include "errc_nrrc_struct.h"
+#endif /*__ENDC__*/
+#include "rrc_nrrc_struct.h"
+#include "rr_nrrc_struct.h"
+#include "upcm_nmac_struct.h"
+//#include "nmac_enum_struct.h"
+#include "erm_nrrc_struct.h" /// ERM NRRC SAP
+#endif /* __NR_RAT__ */
+
+#ifdef __PERF_SUPPORT__
+#include "perf.h" /// protocol exception recovery framework enum for format string
+#endif // ~ #ifdef __PERF_SUPPORT__
+#include "perf_api.h" /// protocol exception recovery framework API
+
+#ifdef __IPC_ADAPTER__
+#ifndef __MTK_TARGET__
+#include "oemdebug.h"
+#include "oemutility.h"
+#endif
+#include "ipc_adapter_public_struct.h"
+#include "ipc_adapter_public_def.h"
+#include "ipc_adapter_public_em_struct.h"
+#include "ipc_adapter_msgid.h"
+#include "ipc_adapter_cc_struct.h"
+#include "ipc_adapter_pwr_struct.h"
+#include "ipc_adapter_sms_struct.h"
+#include "ipc_adapter_atp_struct.h"
+#include "ipc_adapter_sat_struct.h"
+#include "ipc_adapter_phb_struct.h"
+#include "ipc_adapter_smu_struct.h"
+#include "ipc_adapter_ss_struct.h"
+#include "ipc_adapter_imei_struct.h"
+#include "ipc_adapter_cfg_struct.h"
+#include "ipc_adapter_embms_struct.h"
+#include "ipc_adapter_l23_struct.h"
+#include "ipc_adapter_domestic_struct.h"
+#include "ipc_adapter_jpn_struct.h"
+#include "ipca_smu_private_enum.h"
+#include "ipca_smu_context.h"
+#include "ipca_embms_context.h"
+#include "ipca_ctrl_struct.h"
+#include "ipca_phb_enum.h"
+#include "ipca_imei_enum.h"
+#include "ipca_pwr_enum.h"
+#include "ipca_pwr_context.h"
+#include "ipca_sms_hdlr.h"
+#include "ipc_adapter_nw_struct.h"
+#include "ipc_adapter_dspl_struct.h"
+#include "ipc_adapter_misc_struct.h"
+#include "ipca_nw_enum.h"
+#include "ipca_nw_context.h"
+#include "ipca_misc_enum.h"
+#include "ipc_adapter_enum.h"
+#include "ipc_adapter_gprs_struct.h"
+#include "ipca_ctrl_context.h"
+#include "ipca_factory_enum.h"
+#include "ipc_adapter_factory_struct.h"
+#include "ipc_adapter_sap_struct.h"
+#include "ipca_gprs_enum.h"
+#include "ipca_gprs_context.h"
+#include "ipca_gprs_ps.h"
+#include "ipca_gprs_ps_routine_struct.h"
+#include "ipc_adapter_em_struct.h"
+#include "ipca_sat_private_struct.h"
+#include "ipca_sat_private_enum.h"
+#include "ipca_cc_utility.h"
+#include "ipc_adapter_srlte_struct.h"
+#include "ipca_srlte_context.h"
+#include "ipca_em_struct.h"
+#include "ipca_jpn_private_struct.h"
+#include "ipca_jpn_private_defs.h"
+#include "ipca_domestic_main.h"
+#include "ipca_sap_enum.h"
+#include "ipca_sap_context.h"
+#endif //__IPC_ADAPTER__
+
+#ifdef __L5_SUPPORT__
+#include "l5_msgid.h"
+#include "l5_structs.h"
+#include "l5ath_def.h"
+#include "l5ath_switch_def.h"
+#include "l5ath_rf_def.h"
+#include "l5uss_def.h"
+#include "l5ucat_def.h"
+#include "l5mipc_sms.h"
+#include "l5sms_def.h"
+#include "l5sys_def.h"
+#include "l5usms_def.h"
+#include "l5ath_ss_def.h"
+#include "l5mipc_struct.h"
+#include "l5updn_def.h"
+#include "l5_nw_structs.h"
+#include "l5usim_struct.h"
+#include "l5_switch_structs.h"
+#include "l5_common.h"
+#include "tmc_l5_struct.h"
+#include "l5ucc_struct.h"
+#include "l5u_structs.h"
+#include "l5uims_def.h"
+#include "l5io_structs.h"
+#include "l5u_structs.h"
+#include "ath_cmd.h"
+#include "nccmni_if.h"
+#include "idc_l5_str.h"
+#if ((defined __ECALL_SUPPORT__) || (defined __NG_ECALL_SUPPORT__))
+#include "l5uecall_def.h"
+#endif
+#endif /* __L5_SUPPORT__ */
+
+#ifdef __MD_TFWK__
+#include "tfwk.h"
+#endif
+
+/********************************************* Warning **********************************************
+* Please make sure header file is included correctly!
+* If the common header file is added to libParseDbModem_tdd_fdd.c, the context of header file will be preprocessed twice.
+* The change as above can lead to build time inefficiency.
+*
+* common header file => libParseDbModem.c
+* Tdd/Fdd(2g/3g) header file => libParseDbModem_tdd_fdd.c
+*
+* If the header file relate to Tdd/Fdd (2g/3g), please include the header file in libParseDbModem_tdd_fdd.c
+* If the header file is common header file or is not related to Tdd/Fdd(2g/3g), please add the header file to libParseDbModem.c
+********************************************** Warning **********************************************/
diff --git a/mcu/service/dhl/database/msglog_db/libParseDbModem_4g.c b/mcu/service/dhl/database/msglog_db/libParseDbModem_4g.c
new file mode 100644
index 0000000..a699fa0
--- /dev/null
+++ b/mcu/service/dhl/database/msglog_db/libParseDbModem_4g.c
@@ -0,0 +1,81 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ *
+ * Filename:
+ * ---------
+ * swParseDbModem.c
+ *
+ * Project:
+ * --------
+ * VMOLY
+ *
+ * Description:
+ * ------------
+ * This file collects the customer module/primitve information to be included
+ * in the database.
+ * The enum id for module type is "customer_module_type".
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * =============================================================================
+ * $Log$
+ *
+ *
+ *******************************************************************************/
+
+#ifdef _MODIS_ON_VC9_
+#define __w64
+#endif
+
+typedef int cgen_use_spare_msg_id;
+typedef int cgen_use_spare_sap_id;
+typedef int cgen_use_spare_module_id;
+typedef unsigned short msg_type;
+typedef unsigned short sap_type;
+typedef unsigned short module_type;
+
+
+#ifdef __GNUC__
+ typedef struct __va_list { void *__ap; } __builtin_va_list;
+ #define INLINE __inline
+ #define inline __inline
+#endif
+
+#define __declspec(s)
+
diff --git a/mcu/service/dhl/database/msglog_db/libParseDbModem_tdd_fdd.c b/mcu/service/dhl/database/msglog_db/libParseDbModem_tdd_fdd.c
new file mode 100644
index 0000000..2efdd56
--- /dev/null
+++ b/mcu/service/dhl/database/msglog_db/libParseDbModem_tdd_fdd.c
@@ -0,0 +1,1454 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ *
+ * Filename:
+ * ---------
+ * libParserDbModem.c
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * This file collects primitve IDs and struct definition from the Modem
+ * application part for pre-processing.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * =============================================================================
+ * $Log$
+ *
+ * 09 23 2019 louis-tw.huang
+ * [MOLY00439533] [Gen97][IDC] IDC feature development [EWSP0000046233]
+ *
+ * 10 31 2018 kun-lin.wu
+ * [MOLY00361478] [Gen97] Gemini Compile Option Clean Up
+ *
+ * 08 23 2018 yu-hsiang.peng
+ * [MOLY00343261] [MT6297] [Logging Service] DHL 2.0 Landing
+ * [DHL2.0] Port to VMOLY (dhl mak & DB)
+ *
+ * 08 21 2018 yi-lin.lee
+ * [MOLY00346596] [VMOLY][UTT] code sync - Change LTT to UTT
+ *
+ *******************************************************************************/
+
+/********************************************* Warning **********************************************
+* Please make sure header file is included correctly!
+* If the common header file is added to libParseDbModem_tdd_fdd.c, the context of header file will be preprocessed twice.
+* The change as mentioned previously can lead to build time inefficiency.
+*
+* common header file => libParseDbModem.c
+* Tdd/Fdd(2g/3g) header file => libParseDbModem_tdd_fdd.c
+*
+* If the header file relate to Tdd/Fdd (2g/3g), please include the header file in libParseDbModem_tdd_fdd.c
+* If the header file is common header file or is not related to Tdd/Fdd(2g/3g), please add the header file to libParseDbModem.c
+********************************************** Warning **********************************************/
+
+#ifdef _MODIS_ON_VC9_
+#define __w64
+#endif
+typedef int cgen_use_spare_msg_id;
+typedef int cgen_use_spare_sap_id;
+typedef int cgen_use_spare_module_id;
+typedef unsigned short msg_type;
+typedef unsigned short sap_type;
+typedef unsigned short module_type;
+
+#ifdef __GNUC__
+ typedef struct __va_list { void *__ap; } __builtin_va_list;
+ #define INLINE __inline
+ #define inline __inline
+#endif
+
+#define __declspec(s)
+//"ps\\tools\\asn1lib\\include\\act-ttbuffmgr.h"
+#undef STDC_HEADERS //it will include stdio.h
+
+#ifdef __RVCT__
+#ifndef __int64
+ typedef long long __int64;
+#endif
+
+
+#define _ARMABI
+
+#endif
+
+#ifdef __UE_SIMULATOR__
+#ifndef __int64
+ typedef long long __int64;
+#endif
+#endif
+
+#include "kal_public_api.h"
+#include "kal_public_defs.h" //MSBB change #include "stack_msgs.h"
+#include "sap_info.h"
+#include "msg_id_to_em_info_map.h"
+#include "em_mapping_for_tool.h"
+
+#include "SST_sla.h"
+#if !defined(DISABLE_MDDBG_FUNCTION)
+#endif
+
+/* Start of EM related structure */
+#include "em_l4_common_public_struct.h"
+#include "em_as_common_public_struct.h"
+#include "em_nwsel_common_public_struct.h"
+#include "em_gas_public_struct.h"
+#include "em_uas_public_struct.h"
+/* End of EM related structure */
+
+#ifdef __CDMA2000_RAT__
+#endif
+
+/* DVFS */
+#ifdef DVFS_ENABLE
+#endif
+
+/* l1 */
+#include "mph_types.h"
+#include "mph_cs_def.h"
+#include "mph_cs_msg.h"
+#ifdef __PS_SERVICE__
+#include "mph_ps_def.h"
+#include "mph_ps_msg.h"
+#endif
+#if ( defined(__GSM_RAT__) || defined(__UMTS_RAT__) )
+/* For Dual Mode L1 */
+/* For Dual Mode L1 */
+#endif /* __GSM_RAT__ && __UMTS_RAT__ */
+
+#if defined(GEN_FOR_PC)
+#endif //#if defined(GEN_FOR_PC)
+
+#ifndef NWSEL_NOT_PRESENT
+#include "nwsel_msgid.h"
+#include "nwsel_mm_struct.h"
+#include "nwsel_ratcm_struct.h"
+#include "nwsel_context.h"
+#include "nwsel_def.h"
+#include "nwsel_eval_struct.h"
+#include "ddm_nwsel_struct.h"
+#endif
+
+#ifndef GMSS_NOT_PRESENT
+#endif
+
+#ifdef DUMMY_PROTOCOL
+#ifdef __GSM_RAT__
+#include "dps_testTool.h"
+#include "dps_rlc_sap.h"
+#endif //__GSM_RAT__
+#endif
+
+/* other module */
+
+#ifndef __L1_STANDALONE__
+/*For Protol modules*/
+
+#ifdef __PS_SERVICE__
+//#include "asn-incl.h"
+#endif
+
+#include "irat_common_struct.h"
+
+/* MBMSAL */
+
+/* FLC */
+#if defined(__FLC2__) && defined(__FLC_SUPPORT__)
+#endif
+
+#ifdef __MOD_CC__
+
+
+#endif
+
+
+#ifdef __MOD_CSM__
+#include "mcd_ss_parameters.h"
+#include "mcd_ss_tcapmessages.h"
+#include "ps2sat_struct.h"
+#include "l4c_aux_struct.h"
+#include "l4c_common_enum.h"
+#include "csmcc_enums.h"
+#include "csmcc_common_enums.h"
+#include "ps2sat_struct.h"
+#include "l4c2csm_cc_struct.h"
+#include "mncc_struct.h"
+
+#include "stack_timer.h"
+#include "l4_defs.h"
+#include "csmcc_defs.h"
+#include "csmcc_bc_defs.h"
+#include "csmcc_bc_types.h"
+#include "csmcc_common_enums.h"
+#include "csmcc_enums.h"
+#include "csmcc_types.h"
+#include "csmcc_atfunc.h"
+
+#include "l4c2csm_ss_struct.h"
+
+
+#if defined(__L1_GPS_REF_TIME_SUPPORT__) || defined(__L1_GPS_AUTO_TIMING_SYNC_SUPPORT__)
+#endif
+
+#ifdef __AGPS_CONTROL_PLANE__
+/* SSAGPS */
+#ifdef GEN_FOR_PC
+ #ifndef __RVCT__
+ #define __int64
+ #endif //#if !defined(__RVCT__)
+#define __cdecl
+#endif //#ifndef __L1_STANDALONE__
+
+#include "applib2_asn_common.h"
+#include "applib2_mtkasn_global.h"
+#include "ss_asn.h"
+#include "l4c2csm_ss_lcs_struct.h"
+#endif
+#include "l4c_lbs_struct.h"
+#include "mnss_struct.h"
+#include "csmss_common_enums.h"
+#endif /*__MOD_CSM__*/
+
+#ifdef __MOD_SIM__
+#include "sim_common_enums.h"
+
+ /* ripple */
+
+/* C2K */
+#ifdef __CDMA2000_RAT__
+#endif /* __CDMA2000_RAT__ */
+
+#endif /*__MOD_SIM__*/
+
+#ifdef __MOD_SMU__
+
+#if defined(__MMI_FMI__)
+#endif
+#include "sim_common_enums.h"
+#endif /*__MOD_SMU__*/
+
+#ifdef __MOD_PHB__
+#endif /*__MOD_PHB__*/
+
+#ifdef __MOD_UEM__
+#include "device.h"
+#endif /*__MOD_UEM__*/
+
+#ifdef __MOD_SMSAL__
+
+/* for context */
+
+#endif /*__MOD_SMSAL__*/
+
+#ifdef __MOD_SMS__
+
+/* SMS <--> SMSAL */
+
+/* SMS Context */
+
+/* SMS <--> MM */
+#endif
+
+#ifndef PPP_NOT_PRESENT
+#include "l4c2ppp_struct.h"
+#include "ppp2l4c_struct.h"
+/* PPP for CSD usage */
+#include "tcpip2ppp_struct.h"
+#include "ppp2csd_struct.h"
+ #ifdef __PPP_UT__
+#include "ppp_types.h"
+#include "ppp_buff_mgr.h"
+#include "ppp_fsm.h"
+#include "ppp_crc.h"
+#include "ppp_lcp.h"
+#include "ppp_ipcp.h"
+#include "ppp_main.h"
+#include "ext_modem_ppp_struct.h"
+ #endif // ~ #ifdef __PPP_UT__
+#endif /* ~PPP_NOT_PRESENT */
+
+#ifdef __MOD_CISS__
+#endif /* __MOD_CISS__ */
+
+//#ifdef __PS_SERVICE__
+#ifdef __MOD_TCM__
+#if defined(__MMI_FMI__)
+#endif
+/* mtk00938 2008-02-20: for streaming and secondary PDP context */
+/* End of Jeff Wu */
+
+
+
+#ifdef __TURN_ON_GENERAL_SECONDARY_PDP__
+#endif /* __TURN_ON_GENERAL_SECONDARY_PDP__ */
+
+#ifdef __ACL_SUPPORT__
+#include "tcm_acl_support.h"
+#endif /* __ACL_SUPPORT__ */
+
+#ifdef __UGTCM__
+#endif /* __UGTCM__ */
+
+#endif /* __MOD_TCM__ */
+//#endif /* __PS_SERVICE__ */
+
+#include "nwsel_def.h"
+#include "nwsel_context.h"
+#include "nwsel_mm_struct.h"
+#include "nwsel_ratcm_struct.h"
+
+#ifndef RR_NOT_PRESENT
+#ifdef __UMTS_RAT__
+#include "as_common.h"
+#endif
+
+/* For Poring CSN.1*/
+
+#include "rr_common_headers.h"
+#include "rr_common_def.h"
+#include "rr_context.h"
+
+
+#include "rr_mpal_interface.h"
+#include "rmc_lapdm_interface.h"
+
+
+#ifdef __UMTS_RAT__
+/* John 2006/06/10*/
+#include "csi_asn.h"
+#ifdef __GSM_RAT__
+#include "csi_gsm_asn.h"
+#endif
+#ifdef __UMTS_RAT__
+#include "csi_umts_asn.h"
+#endif
+
+#include "uas_gas_enums.h"
+#include "uas_gas_struct.h"
+#include "mrs_utility.h"
+
+#ifdef __LTE_RAT__
+#include "uas_eas_struct.h"
+#include "gas_eas_struct.h"
+#include "mtk_uper_asn.h"
+#endif
+#include "mrs_as_struct.h"
+#include "rac_mrs_struct.h"
+
+#if defined(__LTE_RAT__)
+#endif
+
+/* For generating 3G LBM TRACE_PEER enum */
+
+#endif /* __UMTS_RAT__ */
+
+#if defined(__GEMINI__)
+#if defined(__UMTS_RAT__)
+#ifdef __GSM_RAT__
+#endif /* __GSM_RAT__ */
+#endif /* __UMTS_RAT__ */
+#ifdef __LTE_RAT__
+#endif /* __LTE_RAT__ */
+#ifdef __CDMA2000_RAT__
+#endif /* __CDMA2000_RAT__ */
+#endif /* __GEMINI__ */
+
+#ifdef __GEMINI__
+#endif /* __GEMINI__ */
+
+#include "rr2mpal_struct.h"
+#include "mpal2rr_struct.h"
+#include "rrm2rmpc_struct.h"
+#include "mph_cs_msg.h"
+#include "sim_common_enums.h"
+
+/* CSN codec*/
+#include "mtk_csn.h"
+
+#ifdef __PS_SERVICE__
+/* Evelyn 20090415: Merge R6 */
+#endif
+
+#include "rrm_context.h"
+#include "lapdm_common.h"
+#include "psi_si_common.h"
+#include "si.h"
+#include "si_context.h"
+#include "rr_sendmsgs_to_mpal.h"
+#include "si_update_funcs.h"
+#include "si_msg_decode.h"
+#include "rmc_enums.h"
+#include "rmc_peer_msg_enums.h"
+
+#ifdef __PS_SERVICE__
+
+/* peer message */
+#include "rmc_peer_dl.h"
+
+#include "rlc_mac_enums.h"
+#include "rlc2mac_struct.h"
+#include "rlcmac_struct.h"
+#include "mac2rlc_struct.h"
+#include "mac2rmpc_struct.h"
+#ifdef __ADAPTIVE_PAGING_PERIOD_IN_UNACK_MODE__
+#endif
+#include "rr_data_ind.h"
+#include "psi_si_common.h"
+#include "psi.h"
+#include "mac_context.h"
+#include "rlc_context.h"
+#include "reasm_context.h"
+#ifndef __MTK_TARGET__
+#include "gprs_rlcmac_common_struct.h"
+#endif
+#endif /* end of __PS_SERVICE__ */
+
+#ifdef __UMTS_RAT__
+#include "uas_gas_enums.h"
+
+#endif /* __UMTS_RAT__ */
+
+#include "meas_context.h"
+#include "rmc_context.h"
+
+#include "rcs_context.h"
+
+#include "lapdm_context.h"
+#include "rmc_common_access.h"
+#include "rmc_cell_resel.h"
+#include "rmpc_common_func.h"
+#include "rmc_meas.h"
+#include "rr_utils.h"
+#include "rr_peh.h"
+#include "rmc_dedicated_proc.h"
+#include "csrr_utils.h"
+#include "csrr_recv_lapdm_mesgs.h"
+#include "csrr_recv_mpal_mesgs.h"
+#include "csrr_ded_access.h"
+#include "csrr_ded_proc.h"
+#include "rmc_dedicated_meas.h"
+#include "rmpc_nbr_cell.h"
+
+// Evelyn 20080902: For MAC UT
+// Rachel 20101114: For MPAL UT
+#include "mpal_context.h"
+
+
+
+#include "mll1_gsm.h"
+#include "mll1_umts_fdd.h"
+
+
+#ifdef __AGPS_CONTROL_PLANE__
+#include "csrr_agps_context.h"
+#endif
+
+#endif /* RR_NOT_PRESENT */
+
+#ifndef MM_NOT_PRESENT
+#include "l3_inc_enums.h"
+#include "mm_mmi_enums.h"
+#include "mmcm_enums.h"
+#include "mmas_enums.h"
+#include "mm_ratcm_enums.h"
+#include "mm_ratcm_struct.h"
+#include "security_keys_enums.h"
+
+#include "mcd_l3_inc_struct.h"
+#include "mcd_l3_inc_gprs_struct.h"
+#include "l3_inc_local.h"
+#include "mcd_mm_common_gen_struct.h"
+#include "mcd_mm_cs_peer_struct.h"
+
+#include "security_keys_struct.h"
+#include "mm2cm_struct.h"
+#include "mm2mmi_struct.h"
+#include "cm2mm_struct.h"
+#include "mmi2mm_struct.h"
+#include "mm_common.h"
+#include "mm_cs_defs.h"
+
+#include "mm_mmi_enums.h"
+#include "l4crac_enums.h"
+#include "l3_inc_enums.h"
+#include "nvram_enums.h"
+#include "mm2sms_enums.h"
+
+#include "mcd_l3_inc_struct.h"
+#include "mcd_l3_inc_gprs_struct.h"
+#include "l3_inc_local.h"
+#include "mmi2mm_struct.h"
+#include "mm2mmi_struct.h"
+#include "l4c2rac_struct.h"
+#include "rac2l4c_struct.h"
+#include "nvram_struct.h"
+#include "as2mmi_struct.h"
+
+#ifdef __PS_SERVICE__
+#include "mcd_mm_ps_peer_struct.h"
+#include "mm_ps_defs.h"
+#include "mm_ps_context.h"
+#endif
+
+#include "mm_cs_context.h"
+#include "mm_common_context.h"
+
+#endif /* #ifndef MM_NOT_PRESENT */
+
+
+#ifdef __MOD_L4A__
+#include "l4a.h"
+#endif
+
+#ifdef WISDOM_MMI
+#include "ws_msg_struct.h"
+#endif
+
+/**************************************************************************
+ * GPRS NAS DATA PATH BEGINS
+ **************************************************************************/
+#ifdef __PS_SERVICE__
+
+
+#ifndef SNDCP_NOT_PRESENT
+/* other needed struct and enums */
+/* sndcp peer struct */
+/* sm local struct */
+
+
+#endif /* SNDCP_NOT_PRESENT */
+
+#ifndef SM_NOT_PRESENT
+/* other needed struct and enums */
+
+
+/* sm peer struct */
+/* sm local struct */
+
+/* sm conn sturct */
+
+
+#endif /* SM_NOT_PRESENT */
+
+
+
+#ifndef LLC_NOT_PRESENT
+
+/* other needed struct and enums */
+#include "l3llc_enums.h"
+/* In interface/include */
+
+/* llc local struct */
+#include "cipher2llc_struct.h"
+
+
+/* llc asn peer struct (Order shall be kept) */
+
+/* other needed struct and enums */
+
+
+#endif /* LLC_NOT_PRESENT */
+
+#endif /* __PS_SERVICE__ */
+
+#endif /*__L1_STANDALONE__*/
+
+/**************************************************************************
+ * GPRS NAS DATA PATH ENDS
+ **************************************************************************/
+
+#ifndef DATA_NOT_PRESENT
+
+
+
+
+
+#endif /* DATA_NOT_PRESENT */
+
+#include "m12190_pcore.h"
+#if defined(__UMTS_RAT__) && defined(__MTK_UL1_FDD__)
+#endif
+
+#ifdef __AST_TL1_TDD__
+#include "tl1cal_ast.h"
+#endif
+
+#include "l1cal.h"
+
+
+//#ifdef __MCD__
+
+//#endif
+
+#include "uart_sw.h"
+
+#ifdef __IRDA_SUPPORT__
+#ifndef OBEX_NOT_PRESENT
+#include "irda_enums.h"
+#include "irda_struct.h"
+#include "obex_app_enums.h"
+#include "obex2app_struct.h"
+#include "app2obex_struct.h"
+#endif
+
+#ifndef IRCOMM_NOT_PRESENT
+#include "irda_enums.h"
+#include "irda_struct.h"
+#include "ircomm_app_enums.h"
+#include "app2ircomm_struct.h"
+#include "ircomm2app_struct.h"
+#endif
+#endif /* __IRDA_SUPPORT__ */
+
+#if defined(__MOD_SMSAL__) && !defined(SOC_NOT_PRESENT) //kevin 05/23
+#include "smsal2soc_struct.h"
+#endif /*__MOD_SMSAL__*/
+
+#ifndef __L1_STANDALONE__
+#endif
+
+#ifdef __LTE_RAT__
+#include "mll1_gsm.h"
+#include "mll1_umts_fdd.h"
+#endif /*__LTE_RAT__*/
+
+#if defined(__MOD_RAC__)
+#ifdef __LTE_RAT__
+#endif /* __LTE_RAT__ */
+#endif /* __MOD_RAC__ */
+
+#ifndef L4_NOT_PRESENT
+#endif
+
+/* for BMT */
+/* for BMT */
+
+
+#ifdef __WIFI_SUPPORT__
+#include "wndrv_cnst.h"
+#include "wndrv_cal.h"
+#include "wndrv_ft_types.h"
+#include "wndrv_ft_msg.h"
+#include "wndrv_supc_types.h"
+#include "wndrv_supc_msg.h"
+#include "wndrv_tool_types.h"
+#include "wndrv_tool_msg.h"
+#include "supc_abm_msgs.h"
+#include "mmi2abm_struct.h"
+#include "wndrv_abm_msg.h"
+#ifdef WIFI_BB_MT5921
+#include "wndrv_trace_enum.h"
+#endif
+#endif
+
+#ifndef __L1_STANDALONE__
+#ifdef GEN_FOR_PC
+#include "sasken_msg.h"
+#include "smsal_peer.h"
+#include "mpal2rr_unpack_struct.h"
+#include "rr2mpal_unpack_struct.h"
+#ifdef __UMTS_FDD_MODE__
+#include "nas_msg.h"
+#endif
+
+#ifdef __UMTS_RAT__
+#include "ub_msg.h"
+#endif /* #ifdef __UMTS_RAT__ */
+#ifdef __PS_SERVICE__
+#endif /*__PS_SERVICE__*/
+#endif /*GEN_FOR_PC*/
+#endif /*__L1_STANDALONE__*/
+
+
+#ifdef __PS_SERVICE__
+#include "ps_ratdm_struct.h"
+#endif
+
+#ifndef __MTK_TARGET__
+#include "uart_sim_struct.h"
+#endif
+
+
+#ifdef __IPERF__
+#include "soc_api.h"
+#endif /* __IPERF__ */
+
+#ifdef __DRM_SUPPORT__
+#endif /* __DRM_SUPPORT__ */
+
+#ifdef GIS_SUPPORT
+#include "gis_struct.h"
+#endif
+
+#ifdef __CMUX_SUPPORT__
+#endif /* __CMUX_SUPPORT__ */
+
+
+#ifdef __IPCORE_SUPPORT__
+#include "ipc_enums.h"
+#endif /* __IPCORE_SUPPORT__ */
+
+#ifdef __IPFCORE_SUPPORT__
+#endif /* __IPFCORE_SUPPORT__ */
+
+#ifdef __TMC_SUPPORT__
+#endif /* __TMC_SUPPORT__ */
+
+#ifdef __HIF_AOMGR_SUPPORT__
+#include "aomgr_struct.h"
+#include "aomgr_enums.h"
+#endif /* __HIF_AOMGR_SUPPORT__ */
+
+#ifdef __ETHERCORE_SUPPORT__
+#include "ethercore_struct.h"
+#endif /* __ETHERCORE_SUPPORT__ */
+
+#ifdef __NMU_ENABLE__
+#endif
+
+#ifdef __USB_ECM_SUPPORT__
+#include "cdcecm_struct.h"
+#endif
+
+#if defined(__GPS_SUPPORT__) || defined(__BT_GPS_SUPPORT__)
+#endif
+
+#ifndef __L1_STANDALONE__
+
+/* for NAS/RATCM inerface */
+
+#include "ratcm_ratdm_struct.h"
+#include "ratcm_context.h"
+
+#ifdef __PS_SERVICE__
+
+#ifndef UART_SW_H
+#endif // ~ #ifndef UART_SW_H
+#ifndef _PS_RATDM_STRUCT_H
+#include "ps_ratdm_struct.h"
+#endif // ~ #ifndef _PS_RATDM_STRUCT_H
+#ifdef __CGEN_UMTS_FDD_MODE__ /* __UMTS_FDD_MODE__ */
+#include "ndis_ratdm_struct.h"
+#endif
+/* L4C -> RATDM */
+//#ifndef _L4C_RATDM_STRUCT_H
+#ifdef __CGEN_UMTS_FDD_MODE__ /* __UMTS_FDD_MODE__ */
+#include "l4c_ratdm_struct.h"
+#endif
+//#endif
+
+/* L4C -> IPCORE */
+
+/* For RATDM/RABM UT */
+#include "dlist.h"
+#include "ratdm_context.h"
+#endif
+
+#ifdef __GSM_RAT__
+/* for RATCM/GAS interface */
+#endif
+
+#endif /* ! __L1_STANDALONE__ */
+
+
+/* mtk04121 */
+#if defined(__MOD_TCM__)
+/* PPP Dial-up */
+
+#ifdef __TURN_ON_GENERAL_SECONDARY_PDP__
+#endif /* __TURN_ON_GENERAL_SECONDARY_PDP__ */
+
+#ifdef __ACL_SUPPORT__
+#include "tcm_acl_support.h"
+#endif /* __ACL_SUPPORT__ */
+
+#ifdef __UGTCM__
+#endif /* __UGTCM__ */
+
+#if defined(__ETCM__)
+#endif
+#endif
+
+/**************************************************************************
+ * WCDMA INTERFACE BEGINS
+ **************************************************************************/
+#ifdef __UMTS_RAT__
+#ifdef __CGEN_UMTS_FDD_MODE__ /* __UMTS_FDD_MODE__ */
+#include "ul1_cnst.h"
+#include "ul1_def.h"
+#include "ul1_struct.h"
+#include "ul1hisr_struct.h"
+#endif
+#ifdef __CGEN_UMTS_TDD128_MODE__
+#include "tl1_cnst.h"
+#include "tl1_def.h"
+#include "tl1_struct.h"
+#endif
+
+#ifdef __CGEN_UMTS_FDD_MODE__ /* __UMTS_FDD_MODE__ */
+#include "mll1_umts_fdd.h"
+#endif /*__UMTS_FDD_MODE__*/
+
+#ifdef __CGEN_UMTS_FDD_MODE__ /* __UMTS_FDD_MODE__ */
+#endif /*__UMTS_FDD_MODE__*/
+
+#ifdef __UL1_ON_MNT__
+/* for UL1 MoDIS */
+#include "ul1_types.h"
+#endif
+
+#ifdef DUMMY_PROTOCOL
+/* 3G DPS */
+#include "udps_testTool.h"
+#endif
+
+
+/* for MAL1 interface */
+#ifdef __MA_L1__
+#include "mal1_def.h"
+#include "cti_msg.h"
+#include "dual_msg.h"
+#include "mal1_struct.h"
+#endif
+
+#ifndef __L1_STANDALONE__
+
+#include "as_common.h"
+
+/* for UAS common structure and enums */
+#include "uas_common_enums.h"
+#include "uas_common_struct.h"
+
+/* for inter-core common structure and enum */
+#include "gas_gise_def.h"
+#include "gas_gise_enum.h"
+#include "gas_gise_struct.h"
+#include "uas_gas_inter_core_enum.h"
+#include "uas_gas_inter_core_struct.h"
+#include "gas_eas_inter_core_enum.h"
+#include "gas_eas_inter_core_struct.h"
+
+#ifdef GEN_FOR_PC
+//John 960724
+#endif
+
+#include "rrc_asn.h"
+#include "urr_common.h"
+//#ifdef __UMTS_FDD_MODE__
+#include "urr_enums.h"
+#include "urr_struct.h"
+//#endif
+
+/* for UAS internal interface */
+/* for URR/UL2D interface */
+#include "cbmc_enums.h"
+#include "cbmc_struct.h"
+#include "bmc_common.h"
+#include "cpdcp_enums.h"
+#include "cpdcp_struct.h"
+#include "ccsr_struct.h"
+#include "crabm_struct.h"
+#include "meme_umac_enums.h"
+#include "meme_umac_struct.h"
+#include "rrce_urlc_enums.h"
+#include "rrce_urlc_struct.h"
+#ifdef __CGEN_UMTS_FDD_MODE__
+#include "rrce_pdcp_struct.h"
+#endif
+#include "rrce_umac_struct.h"
+#include "rrce_bmc_struct.h"
+#include "rrce_drlc_struct.h"
+
+
+/* for URR/UL2 interface */
+#include "ul2_common_def.h"
+#include "crlc_enums.h"
+#include "crlc_struct.h"
+#include "cmac_enums.h"
+#include "capability.h"
+#include "cmac_struct.h"
+#include "umac_common_enums.h"
+#include "umac_context.h"
+
+/* for UL2/UL2D interface */
+#ifdef __CGEN_UMTS_FDD_MODE__ /* __UMTS_FDD_MODE__ */
+#include "rlc_cid.h"
+#endif
+#include "csr_umac_enums.h"
+#include "csr_umac_struct.h"
+#include "csr_drlc_struct.h"
+#include "pdcp_drlc_struct.h"
+#include "rabm_pdcp_struct.h"
+#include "drlc_urlc_struct.h"
+#include "urlc_umac_enums.h"
+#include "urlc_umac_struct.h"
+#include "drlc_umac_struct.h"
+#include "pdcp_urlc_struct.h"
+#include "rlc_common.h"
+#include "l2l_comm.h"
+#include "ul2_common.h"
+#include "ciphering_common.h"
+#include "retransmission_buffer.h"
+#ifdef __CGEN_UMTS_FDD_MODE__ /* __UMTS_FDD_MODE__ */
+#include "rlc_cid.h"
+#include "urlc_drv_enums.h"
+#include "urlc_drv_struct.h"
+#include "seq_common.h"
+#include "urlc_seq_struct.h"
+#include "umac_seq_struct.h"
+#include "cseq_struct.h"
+#include "bmc_urlc_struct.h"
+#endif
+/* for URR internal interface */
+#include "urr_acknowledge.h"
+#include "urr_slce_enums.h"
+#include "urr_slce_struct.h"
+#include "rrce_csce_enums.h"
+#include "rrce_csce_struct.h"
+#include "rrce_meme_enums.h"
+#include "rrce_meme_struct.h"
+#include "rrce_sibe_enums.h"
+#include "rrce_sibe_struct.h"
+#include "rrce_slce_enums.h"
+#include "rrce_slce_struct.h"
+#include "rrce_usime_struct.h"
+#include "csce_usime_struct.h"
+#include "seq_enums.h"
+#include "seq_struct.h"
+#include "csce_cse_enums.h"
+#include "cse_racache.h"
+#include "csce_cse_struct.h"
+#include "csce_meme_enums.h"
+#include "csce_meme_struct.h"
+#include "csce_sibe_enums.h"
+#include "csce_sibe_struct.h"
+#include "cse_slce_struct.h"
+#include "csce_slce_struct.h"
+#include "cse_meme_struct.h"
+#include "cse_sibe_enums.h"
+#include "cse_sibe_struct.h"
+#include "sibe_slce_enums.h"
+#include "sibe_slce_struct.h"
+#include "adr_drlc_enums.h"
+#include "adr_drlc_struct.h"
+#include "bmc_drlc_struct.h"
+#include "meme_sibe_enums.h"
+#include "meme_sibe_struct.h"
+#include "meme_slce_enums.h"
+#include "meme_slce_struct.h"
+#include "dbme_struct.h"
+#include "urr_signal_in.h"
+#include "nvram_data_items.h"
+//#ifdef __UMTS_FDD_MODE__
+#include "sibe_enums.h"
+#include "sibe_struct.h"
+#include "usime_struct.h"
+//#endif
+
+/* discuss with SIM owner, UAS add sim header file when requirement.*/
+#if defined(UNIT_TEST) && defined(__UMTS_TDD128_MODE__)
+#endif
+
+/* for RATCM/UAS interface */
+#include "usim_data.h"
+#include "ratcm_csce_enums.h"
+#include "ratcm_csce_struct.h"
+#include "cs_types.h"
+#include "ratcm_csr_struct.h"
+#include "ratdm_rabm_struct.h"
+
+/* for EAS interface */
+
+/* for UAS/GAS interface */
+#include "uas_gas_enums.h"
+#include "uas_gas_struct.h"
+
+
+#ifdef __GEMINI__
+/* for GAS/UL2 interface */
+#include "gas_ul2_gemini_struct.h"
+#include "gas_ul2d_gemini_struct.h"
+#endif /* __GEMINI__ */
+
+/*Vito: for CSR UT */
+#include "rab.h"
+#include "csr_fsm.h"
+
+/* Jeff Wu 2006-02-13: For RABM/PDCP UT */
+#include "as_common.h"
+#include "cpdcp.h"
+#include "pdcp.h"
+#include "ps_data.h"
+#include "bigend.h"
+#include "pdcp_context.h"
+#include "rabm_fsm.h"
+#include "rabm_context.h"
+#include "rabm_timer.h"
+
+/* Evan Chen 2007-08-13: For MM UT */
+
+
+/* Gibran Chang 2006/03/23: For CSCE */
+#include "csce_fsm.h"
+#include "csce_context.h"
+
+/* Nicky Chou 2014/08/25: For LCSCE */
+#include "lcsce_context.h"
+#include "lcsce.h"
+#include "lcsce_struct.h"
+#include "lcsce_enum.h"
+#include "csce_lcsce_struct.h"
+#include "csce_lcsce_enum.h"
+#include "csce_meme_inter_core_struct.h"
+#include "csce_meme_inter_core_enum.h"
+
+/* For LMEME */
+#include "lmeme.h"
+#include "lmeme_context.h"
+#include "lmeme_struct.h"
+#include "lmeme_enum.h"
+#include "meme_lmeme_struct.h"
+#include "meme_lmeme_enum.h"
+
+/*For LRRCE*/
+#if defined(__CGEN_UMTS_TDD128_MODE__)
+#include "lrrce.h"
+#include "lrrce_lurlc_struct.h"
+#include "rrce_lrrce_enum.h"
+#include "rrce_lrrce_struct.h"
+#endif
+
+/* Dennis Weng 2010/08/09: For SIBE */
+#include "sibe_fsm.h"
+/* YenChih Yang 2012/04/18: For USIME */
+#include "usime_context.h"
+
+/* For MEME */
+/* For TDD please modify the code wrapped by __UMTS_TDD128_MODE__ */
+/* For TDD please modify the code wrapped by __UMTS_FDD_MODE__ */
+#ifdef __GEMINI__
+#endif
+
+#if defined(__CGEN_UMTS_TDD128_MODE__)
+#include "meme_fsm.h"
+#include "memetypes.h"
+#include "meme_def.h"
+#include "rrc_meme_utilities.h"
+#include "rrc_meme_timing.h"
+#include "meme_context.h"
+#include "rrc_protocol_timing.h"
+#endif
+
+#if defined(__CGEN_UMTS_FDD_MODE__) /* defined(__UMTS_FDD_MODE__) */
+#include "meme_fsm.h"
+#include "meme_def.h"
+#include "rrc_meme_utilities.h"
+#include "meme_context.h"
+#include "rrc_meme_phys_layer.h"
+#endif
+
+/* MH Change 2006/04/18: For RRCE */
+#include "rrci_fsm.h"
+#include "rrcn_fsm.h"
+#include "rrce_context.h"
+#include "rrc_fsm_tmr_utils.h"
+#include "rrce_fsm.h"
+
+/* John Tang 2005/11/08: For DB Unit-test tool */
+#ifdef GEN_FOR_PC
+
+#define __int64
+#define __cdecl
+#include "db_schema.h"
+#include "./fdd/db_dump_api_fdd.h"
+#ifdef __UMTS_TDD128_MODE__
+#include "./tdd/db_dump_api_tdd.h"
+#endif
+#endif //#ifndef __L1_STANDALONE__
+
+
+#include "rrc_db_all_struct.h"
+
+
+/* Alfie: 2006-0422 For SLCE Trace Info Start */
+#ifndef __size_t
+#define __size_t 1
+typedef unsigned int size_t; /* used for dbme.h */
+#endif
+
+#include "uas_common_enums.h"
+#include "db_access.h"
+#ifdef __CGEN_UMTS_FDD_MODE__ /* __UMTS_FDD_MODE__ */
+#include "dbme_context.h"
+#endif
+#include "crlc_enums.h"
+#include "crlc_struct.h"
+#include "rrce_slce_enums.h"
+#include "seq_enums.h"
+#include "seq_struct.h"
+#include "slce_context.h"
+#include "slce_fsm.h"
+/* Alfie: 2006-0422 For SLCE Trace Info End */
+
+
+/*Christine 2006/05/02*/
+#include "transaction.h"
+#include "rrcc_fsm.h"
+
+#endif
+//Matt 2007/11/30 for VT feature
+/*
+#ifdef __VIDEO_CALL_SUPPORT__
+#include "vt_med_enum.h"
+#include "vt_med_struct.h"
+#include "vt_mmi_struct.h"
+#include "..\..\..\3g324m\interface\inc\vt_tst_enum.h"
+#include "..\..\..\3g324m\appl\inc\vt_ut_struct.h"
+#include "csm2vt_struct.h"
+#endif
+*/
+
+#endif /* __UMTS_RAT__ */
+#ifdef __L1_STANDALONE__
+#ifdef __MOD_NVRAM__
+#include "nvram_data_items.h"
+
+#if defined(__MMI_FMI__)
+#include "nvram_common_defs.h"
+#include "common_nvram_editor_data_item.h"
+#endif
+
+#include "nvram_editor_data_item.h"
+#endif /*__MOD_NVRAM__*/
+#endif
+/**************************************************************************
+ * WCDMA INTERFACE ENDS
+ **************************************************************************/
+
+#if defined(__GPS_SUPPORT__) || defined(__BT_GPS_SUPPORT__)
+#ifdef __AGPS_SUPPORT__
+#endif /* __AGPS_SUPPORT__ */
+#endif
+
+
+#ifdef __RRLP_SUPPORT__
+#endif /* __RRLP_SUPPORT__ */
+
+#ifdef __AGPS_SUPPORT__
+
+#if defined(__UAGPS_CP_SUPPORT__)
+#include "uagps_cp_csce_struct.h"
+#endif /* __UAGPS_CP_SUPPORT__ */
+
+#endif /* __AGPS_SUPPORT__ */
+
+//#if defined(__AGNSS_SUPPORT__)
+//#endif /* #if defined(__AGNSS_SUPPORT__) */
+
+/* for LPP*/
+#if defined(__LTE_RAT__) && defined(__LPP_SUPPORT__)
+/* LPPe */
+#if defined(__LPP_EXT_SUPPORT__)
+#endif
+#endif
+
+//#ifdef __ACMT_SUPPORT__
+//#endif
+
+/*For UL1A*/
+#if defined(__UMTS_RAT__) && defined(__MTK_UL1_FDD__)
+#endif
+
+#if defined (__WMT_SUPPORT__) || defined(__WIFI_BT_SINGLE_ANTENNA_SUPPORT__)
+#include "wmt_struct.h"
+#endif /* __WMT_SUPPORT__*/
+
+#ifdef __GADGET_SUPPORT__
+#include "widget_adp_struct.h"
+#endif /* __GADGET_SUPPORT__ */
+
+#if defined(__RMMI_UT__)
+#include "l3_inc_struct.h"
+#include "tcm_common_enums.h"
+#include "tcm_common.h"
+#include "tcm_timer.h"
+#endif
+
+
+#ifndef __MTK_TARGET__
+#include "ciss_context.h"
+#include "l4c_ps_c2k.h"
+#endif
+
+#if defined(__L4C_GPRS_UT__)
+#endif
+
+#ifndef __L1_STANDALONE__
+#endif
+#ifdef __VIDEO_ARCHI_V2__
+#endif /* __VIDEO_ARCHI_V2__ */
+
+/* mpl & source*/
+
+#if defined(__L1_GPS_REF_TIME_SUPPORT__) || defined(__L1_GPS_AUTO_TIMING_SYNC_SUPPORT__)
+#endif /*(__L1_GPS_REF_TIME_SUPPORT__) || (__L1_GPS_AUTO_TIMING_SYNC_SUPPORT__)*/
+
+#if defined (__MOD_NVRAM__)
+#include "nvram_editor_data_item.h"
+#endif
+/* mtk04121 */
+
+/* SIM CODEGEN begin */
+#ifndef SIM_NOT_PRESENT
+#endif
+/* SIM CODEGEN end */
+
+/* EVAL CODEGEN begin */
+#ifdef __EVAL_ENABLE__
+#endif
+/* EVAL CODEGEN end */
+
+//etc interface
+
+/* TFTLIB CODEGEN */
+
+/* mtk00938: Multimode interfaces */
+#ifdef __LTE_RAT__
+#endif
+
+/* mtk00938: This file is necessary even without LTE */
+#include "irat_common_struct.h"
+
+/* MOD_PAM */
+#ifdef __PS_SERVICE__
+#endif /* __PS_SERVICE__ */
+
+/* UTT/LTT/GTEST */
+#ifdef __GTEST_ENABLE__
+// #include "ltt_msgid.h"
+#include "utt_msgid.h"
+#include "utt_msg_struct.h"
+#include "utt_main_cfg_includes.h"
+#endif /* __GTEST_ENABLE__ */
+
+#if 0
+#if defined (__EL1_ENABLE__) && !defined(__UE_SIMULATOR__)
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#if defined(__LTE_RAT__) && defined(__L1EDPS_ENABLE__)
+/* under construction !*/
+/* under construction !*/
+#endif /* __LTE_RAT__ */
+#if defined(__MTK_TARGET__) && !defined(__L1EDPS_ENABLE__)
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif /* __MTK_TARGET__ */
+#endif /* __EL1_ENABLE__ */
+#endif
+
+#if (defined (__IDC_ENABLED__) || defined(__HQA_IDC_ENABLED__))
+#if (CUR_GEN <= MD_GEN95)
+#include "el1_ipc_str.h"
+#include "el1_idc.h"
+#endif
+#endif
+#if defined(__EL2_ENABLE__) || defined(__L1EDPS_ENABLE__)
+#endif
+
+
+#if 0
+#if defined(__EL2_ENABLE__) || defined(__L1EDPS_ENABLE__)
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+#endif
+
+/* global enum */
+/***************************************************************
+* if add _msgid.h or _sap.h file, should include the _msgid.h or _sap.h in : *
+* kal_debug_msg_sap_defs.h & libParseDbModem.c & srcParseDbModem.c *
+****************************************************************/
+#include "urr_msgid.h"
+#include "ul2_msgid.h"
+#include "ul2d_msgid.h"
+
+
+#if defined(__GSM_RAT__) || defined(__UMTS_RAT__) // BJM
+#include "l1_dm.h"
+#ifdef __MTK_UL1_FDD__
+#endif /* __MTK_UL1_FDD__ */
+#endif /* defined(__GSM_RAT__) || defined(__UMTS_RAT__) */
+
+//mtk04121
+#if defined(__ETCM__)
+
+
+#endif
+
+
+#include "uas_data_common.h"
+
+/* for RAC/GAS interface */
+
+#if defined(__IMS_SUPPORT__)
+/* VDM */
+
+/* SDM */
+
+/* IMSP */
+
+/* IMC */
+
+/* IMCSMS */
+
+/* IWLAN */
+
+
+#endif /* defined(__IMS_SUPPORT__) */
+
+/* CCCI IPC */
+#if defined(__CCCIDEV_SUPPORT__)
+#endif /*defined(__CCCIDEV_SUPPORT__)*/
+
+/* CCISM */
+#if defined(__HIF_CCISM_SUPPORT__)
+#endif /*defined(__HIF_CCISM_SUPPORT__)*/
+
+
+#ifdef __IPCORE_SUPPORT__
+#endif /* __IPCORE_SUPPORT__ */
+
+#if defined(__HLT_SUPPORT__)
+#endif
+#include "mml1_meta_if.h"
+#include "ft_msg.h"
+
+#ifdef __MTK_MD_DIRECT_USB_SUPPORT__
+#include "ufpm_em_struct.h"
+#endif
+
+
+
+#ifdef __EL1_ENABLE__
+#endif
+
+#ifdef __MD_TCPIP_SUPPORT__
+#ifdef __NAL_TEST__
+#include "nal_tp_struct.h"
+#endif
+#endif
+
+/* L4B Begin */
+#include "l4b_msgid.h"
+#ifndef __MTK_TARGET__
+//for l4b.gv
+#include "l4b_context.h"
+#include "l4bpwr_context.h"
+#include "l4bnw_context.h"
+#include "l4bsim_context.h"
+#include "l4bsms_context.h"
+#include "l4bsbp_context.h"
+#endif
+/* L4B End */
+
+
+
+
+
+
+
+
+
+
+
+#ifdef __CDMA2000_RAT__
+#include "cphevdoflbrp.h"
+#undef register
+#define register
+#include "PPP.H"
+#include "evl1shtimingloop.h"
+#include "cph1xflrake.h"
+
+/* Add C2K EM headers */
+
+#undef register
+#endif /* __CDMA2000_RAT__ */
+
+/********************************************* Warning **********************************************
+* Please make sure header file is included correctly!
+* If the common header file is added to libParseDbModem_tdd_fdd.c, the context of header file will be preprocessed twice.
+* The change as mentioned previously can lead to build time inefficiency.
+*
+* common header file => libParseDbModem.c
+* Tdd/Fdd(2g/3g) header file => libParseDbModem_tdd_fdd.c
+*
+* If the header file relate to Tdd/Fdd (2g/3g), please include the header file in libParseDbModem_tdd_fdd.c
+* If the header file is common header file or is not related to Tdd/Fdd(2g/3g), please add the header file to libParseDbModem.c
+********************************************** Warning **********************************************/
diff --git a/mcu/service/dhl/database/msglog_db/srcParseDbModem.c b/mcu/service/dhl/database/msglog_db/srcParseDbModem.c
new file mode 100644
index 0000000..f17c6eb
--- /dev/null
+++ b/mcu/service/dhl/database/msglog_db/srcParseDbModem.c
@@ -0,0 +1,994 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ *
+ * Filename:
+ * ---------
+ * srcParseDbModem.c
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * This file collects primitve IDs and struct definition from the Modem
+ * part for pre-processing.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * =============================================================================
+ * $Log$
+ *
+ * 11 16 2020 shih-yu.chen
+ * [MOLY00595245] [Colgin] TMC development
+ * [TMC] patch back to MD700.
+ *
+ * 09 18 2020 tingwen.chen
+ * [MOLY00569501] [Gen97] TC10 patch back
+ * - Porting : 11422244 (smu_handler.c) / 11420054 (smu_handler.c) / 12120489 (smu_hander.c)
+ * - Porting : srcParseDbModem.c, IPCA part
+ *
+ * 09 18 2020 guanglong.wu
+ * [MOLY00554348] [Colgin] cell measure and white cell lock feature development
+ *
+ * [white cell list] From MP7.PreCheckin branch sync CL 12992971 to R3.MP
+ *
+ * 07 17 2020 can.lin
+ * [MOLY00520469] [5G] Add MISC (0x0A) / LTE fallback Message (0x62).
+ * Enhance ENDC control for NR15.R3.MP (MPD)
+ *
+ * 02 14 2020 actory.ou
+ * [MOLY00499908] [MT6873][Margaux][Q0][MP2][SQC][Log profiling]LTE VoLTE PS Standard filter - W06 target fail - MOD_CCISMCORE
+ * [VMOLY][MPD] add ccci enum for log reduction
+ *
+ * 12 09 2019 tingwen.chen
+ * [MOLY00464446] [VZW] Remote SIM Lock modem part (MPD)
+ * - Verizon RSU
+ * - Align all operator locks in l4c_sim_cmd
+ * - Code revise
+ *
+ * 12 09 2019 jun-jie.su
+ * [MOLY00395217] [Gen97] TMC development
+ * add tmc header file.
+ *
+ * 12 09 2019 jun-jie.su
+ * [MOLY00395217] [Gen97] TMC development
+ * add TX pwr struct reference.
+ *
+ * 12 06 2019 can.lin
+ * [MOLY00463601] [Gen97] Modify SASE module
+ *
+ * SASE DHL Definition
+ *
+ * 12 02 2019 jun-han.lin
+ * [MOLY00462166] MDFPM support feature option on/off
+ *
+ * MDFPM feature option on/off
+ *
+ * 11 08 2019 ya.li
+ * [MOLY00419192] [MT6779][Lafite][P0][WW FT][Singapore][IMS][SQC Excluded][VoLTE][TPG][TCID: V_SS_013] DUT is showing error when selecting 'show number' & 'network default' in CLIR settings while working fine when selecting 'hide number'
+ *
+ * .
+ *
+ * 10 27 2019 ian-yw.chen
+ * [MOLY00452386] [Rose][Petrus][Q0]Failed to read NVRAM_EF_MTF_DMF_MISC_STATISTICS_LID record pop up during test.(5/5)
+ * .
+ *
+ * 09 24 2019 howen.pu
+ * [MOLY00440880] EM info with XCAP information
+ * XCAP - VMOLY Common.
+ *
+ * 09 23 2019 louis-tw.huang
+ * [MOLY00439533] [Gen97][IDC] IDC feature development [EWSP0000046233]
+ *
+ * 09 09 2019 yu-hsiang.peng
+ * [MOLY00402569] [VMOLY] Logging Related Feature Patch
+ * [TRUNK] MPD, custom cmd + sap reboot
+ * 2019.09.09
+ *
+ * 09 06 2019 amit.singh
+ * [MOLY00433282] VMOLY KPALV module check-in
+ *
+ * VMOLY Latest patch MPD C.
+ *
+ * 08 26 2019 chen-wei.lan
+ * [MOLY00433041] [Gen97][EPSFB] IT related issues
+ * uac
+ *
+ * 08 08 2019 mika.kaikkonen
+ * [MOLY00397648] [Submarine] Modem Certificate module
+ *
+ * Cert definitions to libParseDbModem.c and srcParseDbModem.c.
+ *
+ * 07 29 2019 peter.yu
+ * [MOLY00425848] [MT6297][Apollo][MP1][SQC][EM][China][Shenzhen][FDD][4GMM][CU+NA][TCID:EM_EL2_001]the active of SRB1 display KAL_FALSE,not KAL_TRUE.
+ * Correct EM structure header files for database.
+ *
+ * 07 18 2019 jun-quan.chen
+ * [MOLY00422579] [MDDP] DPFM porting to VMOLY
+ * [MPD] DPFM patch back
+ *
+ * 07 12 2019 deepti.singh
+ * [MOLY00397188] [Submarine]HTTP dev
+ * HTTP VMOLY PB
+ *
+ * 07 09 2019 amit.singh
+ * [MOLY00420334] Dispatcher module check-in VMOLY [SUBMARINE]
+ *
+ * Dispatcher code check-in
+ *
+ * 04 24 2019 ian-yw.chen
+ * [MOLY00401131] [Gen97] porting from 95
+ *
+ * [porting from UMOLYE][to_20181230]
+ * other part
+ * (MPD)
+ *
+ * 04 12 2019 head.hsu
+ * [MOLY00398433] [Gen97][VMOLY] Protocol Assert Remove phase 1
+ * PERF (Protocol Exception Recovery Framework) create
+ *
+ * 03 28 2019 mingchuang.qiao
+ * [MOLY00394747] [Gen97][DPMAIF] Reduce log
+ * Reduce DPMAIF Log Throughput.
+ *
+ * 03 26 2019 max.mo
+ * [MOLY00393456] [Gen97][VMOLY] 45G InterRAT & interSystem feature.Max
+ *
+ * 03 26 2019 max.mo
+ * [MOLY00393456] [Gen97][VMOLY] 45G InterRAT & interSystem feature.Max
+ *
+ * 03 15 2019 bo-hun.chen
+ * [MOLY00378534] [Mcddll] VGSM/VGMM part - subsidiary(ADZ) build error.
+ *
+ * 03 13 2019 bo-hun.chen
+ * [MOLY00378534] [Mcddll] VGSM/VGMM part
+ *
+ * [MOLY00378534] [VGSM] mcddll
+ *
+ * 02 27 2019 yuri.huang
+ * [MOLY00377335] [MakeFile] [UMOLYE] [Modify Makefile Rules] MPD SUB flow for 2g/3g
+ *
+ * .
+ *
+ * 02 12 2019 head.hsu
+ * [MOLY00383920] [New Task] PERF (Protocol Exception Framework) task create
+ * rollback
+ *
+ * 01 28 2019 jun-quan.chen
+ * [MOLY00381488] [Gen97] [MCF] MCF porting to VMOLY
+ * [MCF] [MPD] MCF porting to VMOLY
+ *
+ * 01 21 2019 devin.yang
+ * [MOLY00378746] [System Service] [KAL Config] ISR Centraliztion Framework.
+ * ISR Centralization Framework.
+ *
+ * 01 02 2019 jocobrian.chang
+ * [MOLY00327370] [Gen97]MML1 framework development.
+ * Remove unused code.
+ * ERS00026161.
+ *
+ * 12 20 2018 yu-hsiang.peng
+ * [MOLY00372896] [Gen97] sAP logging support
+ * [VMOLY.EVB.SEPT] sAP support - DB part
+ *
+ * 10 12 2018 mt.tsai
+ * [MOLY00357585] [Gen95][WIPC] WIPC Module removal
+ * [MD95] WIPC module removal
+ *
+ * 10 12 2018 jocobrian.chang
+ * [MOLY00313049] [Gen97]NL1 LCM development. ERS00017231.
+ *
+ * 08 29 2018 shen-pin.lin
+ * [MOLY00348913] [MT6297][L4][PS]+E5GOPT for 5G
+ *
+ * E5GOPT merge from UMOLYE
+ *
+ * 08 29 2018 shen-pin.lin
+ * [MOLY00348913] [MT6297][L4][PS]+E5GOPT for 5G
+ *
+ * E5GOPT merge from UMOLYE
+ *
+ * 08 29 2018 shen-pin.lin
+ * [MOLY00348913] [MT6297][L4][PS]+E5GOPT for 5G
+ *
+ * E5GOPT merge from UMOLYE
+ *
+ * 08 23 2018 yu-hsiang.peng
+ * [MOLY00343261] [MT6297] [Logging Service] DHL 2.0 Landing
+ * [DHL2.0] Port to VMOLY (dhl mak & DB)
+ *
+ * 08 20 2018 yingfui.hung
+ * [MOLY00346992] [Gen97][RAC] RAC revise and vgRAC implementation
+ * CL6151862 - 6171771
+ *
+ * 08 17 2018 kuan-wei.chen
+ * [MOLY00346647] [MT6297][VDM/L4] changes for 97
+ * [VMOLY] vdm related others
+ *
+ * 08 17 2018 james-chi-ju.chang
+ * [MOLY00306148] [NAS] pangu giant CR
+ * interface
+ *
+ * 07 30 2018 chi-chun.lu
+ * [MOLY00342741] [MakeFile] [UMOLYE] [Modify Makefile Rules] enhance build flow for cgen tdd/fdd preprocessing files
+ *
+ * .
+ *
+ *******************************************************************************/
+/********************************************* Warning **********************************************
+* Please make sure header file is included correctly!
+* If the common header file is added to srcParseDbModem_tdd_fdd.c, the context of header file will be preprocessed twice.
+* The change as mentioned previously can lead to build time inefficiency.
+*
+* common header file => srcParseDbModem.c
+* Tdd/Fdd(2g/3g) header file => srcParseDbModem_tdd_fdd.c
+*
+* If the header file relate to Tdd/Fdd (2g/3g), please include the header file in srcParseDbModem_tdd_fdd.c
+* If the header file is common header file or is not related to Tdd/Fdd(2g/3g), please add the header file to srcParseDbModem.c
+********************************************** Warning **********************************************/
+
+#ifdef _MODIS_ON_VC9_
+#define __w64
+#endif
+
+typedef int cgen_use_spare_msg_id;
+typedef int cgen_use_spare_sap_id;
+typedef int cgen_use_spare_module_id;
+typedef unsigned short msg_type;
+typedef unsigned short sap_type;
+typedef unsigned short module_type;
+
+#ifdef __GNUC__
+ typedef struct __va_list { void *__ap; } __builtin_va_list;
+ #define INLINE __inline
+ #define inline __inline
+#endif
+
+#define __declspec(s)
+//"ps\\tools\\asn1lib\\include\\act-ttbuffmgr.h"
+#undef STDC_HEADERS //it will include stdio.h
+
+#ifdef __RVCT__
+#ifndef __int64
+ typedef long long __int64;
+#endif
+
+
+#define _ARMABI
+
+#endif
+#include "L1Trc.h"
+
+#include "kal_public_api.h"
+#include "kal_public_defs.h" //MSBB change #include "stack_msgs.h"
+#include "sap_info.h"
+#include "msg_id_to_em_info_map.h"
+
+#include "kal_trace.h"
+#include "stack_ltlcom.h"
+#include "stacklib.h" /* Basic type for dll, evshed, stacktimer */
+#include "stack_timer.h"
+#include "event_shed.h"
+
+#include "intrCtrl.h"
+
+#if defined (__DHL_V2_ENABLE__)
+//reserve for dhl2.0
+#include "GV.h"
+#include "dhl_def.h"
+#else
+#include "GV.h"
+#include "dhl_def.h"
+#include "dhl_notify.h"
+#endif
+
+#include "custom_cmd.h"
+
+#include "protocol_section.h"
+
+#if defined(GEN_FOR_PC)
+//#include "tst_Catcher_version.h"
+#endif //#if defined(GEN_FOR_PC)
+
+#ifndef L4_NOT_PRESENT
+#include "l4c2uem_struct.h"
+#include "l4c2smu_struct.h"
+#include "l4c2smu_vzw_struct.h"
+#include "l4c2csm_cc_struct.h"
+#include "l4c2smsal_struct.h"
+#endif
+
+#ifdef __MOD_NVRAM__
+#include "nvram_data_items.h"
+#include "ex_item.h"
+
+#if defined(__MMI_FMI__)
+#include "nvram_common_defs.h"
+#include "common_nvram_editor_data_item.h"
+#endif
+
+#include "nvram_editor_data_item.h"
+#include "nvram_editor.h"
+#include "nvram_lid_list_for_mcf.h"
+#include "nvram_lid_structure_check_extend_list.h"
+#endif /*__MOD_NVRAM__*/
+
+#include "perf_api.h" /// protocol exception recovery framework API
+
+#ifdef __EM_MODE__
+#include "em_l4_common_public_struct.h"
+#include "em_as_common_public_struct.h"
+#include "em_nwsel_common_public_struct.h"
+#include "em_struct.h"
+/* Start of EM related structure */
+#include "em_audio_public_struct.h"
+#include "em_cc_public_struct.h"
+#include "em_dhl_public_struct.h"
+#include "em_el1_public_struct.h"
+#ifdef __EL2_ARCH_V1__
+#include "em_el2_public_struct.h"
+#endif
+#ifdef __EL2_ARCH_V2__
+#include "em_enl2_public_struct.h"
+#endif
+#include "em_emm_public_struct.h"
+#include "em_errc_public_struct.h"
+#include "em_esm_public_struct.h"
+#include "em_gas_public_struct.h"
+#include "em_imc_public_struct.h"
+#include "em_l1_public_struct.h"
+#include "em_l4_public_struct.h"
+#include "em_llc_public_struct.h"
+#include "em_ltecsr_public_struct.h"
+#include "em_mcf_public_struct.h"
+#include "em_mm_public_struct.h"
+#include "em_mmrf_public_struct.h"
+#include "em_nwsel_public_struct.h"
+#include "em_public_struct.h"
+#include "em_ratcm_public_struct.h"
+#include "em_sim_public_struct.h"
+#include "em_sm_public_struct.h"
+#include "em_sndcp_public_struct.h"
+#include "em_ss_public_struct.h"
+#include "em_uas_public_struct.h"
+#include "em_ul1_public_struct.h"
+#include "em_ul2_public_struct.h"
+#include "em_vdm_public_struct.h"
+#include "em_sms_public_struct.h"
+#include "em_imcsms_public_struct.h"
+#include "em_xcap_public_struct.h"
+/* End of EM related structure */
+#endif /* __EM_MODE__ */
+
+
+
+#ifndef ABM_NOT_PRESENT
+#include "abm_soc_enums.h"
+#include "abm2soc_struct.h"
+#include "app2cbm_struct.h"
+#include "wndrv_cnst.h"
+#include "wndrv_supc_types.h"
+#include "wndrv_api.h"
+#include "supc_abm_msgs.h"
+#include "mmi2abm_struct.h"
+#include "soc2abm_struct.h"
+
+#if defined(__MMI_FMI__)
+#endif
+
+#include "l4c2abm_struct.h"
+/* Jeff Wu 2008-02-20: for streaming and secondary PDP context */
+#include "mmi_sm_enums.h"
+/* End of Jeff Wu */
+#include "abm2l4c_struct.h"
+#include "l4c2ppp_struct.h"
+#include "ppp2l4c_struct.h"
+#include "abm_def.h"
+#endif /* ~ABM_NOT_PRESENT */
+
+
+
+#ifndef MED_NOT_PRESENT
+#include "aud_defs.h"
+#include "med_struct.h"
+#endif /* MED_NOT_PRESENT */
+
+#ifndef MED_V_NOT_PRESENT
+#include "med_global.h"
+#endif /* MED_V_NOT_PRESENT */
+#if defined(__VIDEO_ARCHI_V2__)
+#endif
+#ifndef TCPIP_NOT_PRESENT
+#include "soc_api.h"
+#include "soc2tcpip_struct.h"
+#include "tcpip2ppp_struct.h"
+#include "ppp2tcpip_struct.h"
+#endif
+
+#ifdef __HOTSPOT_SUPPORT__
+#include "hostap_abm_msgs.h"
+#endif
+
+#ifndef SOC_NOT_PRESENT
+#include "inet_ut_struct.h"
+#include "..\..\..\inet_ps\soc\include\soc_feature.h"
+#include "soc_api.h"
+#include "app2soc_struct.h"
+#include "soc2tcpip_struct.h"
+#include "abm_soc_enums.h"
+#include "abm2soc_struct.h"
+#include "soc2abm_struct.h"
+#include "soc_enum.h"
+#endif
+
+#ifdef __J2ME__
+#include ".\..\..\applib\misc\include\app_datetime.h"
+#endif
+
+#ifdef __EMAIL__
+#include "rtc_sw.h"
+#ifdef __SSL_SUPPORT__
+#endif /* __SSL_SUPPORT__ */
+#include "che_api.h"
+
+
+#endif /* __EMAIL__ */
+
+#ifdef __IMPS__
+#include "fs_type.h"
+#include "fat_fs.h"
+#endif /* __IMPS__ */
+
+#ifdef WAP_SUPPORT
+#include "custom_wap_config.h"
+#endif
+#ifdef MMS_SUPPORT
+#endif
+#include "resource_audio.h"
+
+#if defined (__MTV_SUPPORT__) || defined(__ATV_SUPPORT__)
+#endif
+#if defined (__CMMB_SUPPORT__)
+#include ".\..\..\plutommi\MtkApp\DTVPlayer\DTVPlayerInc\DTVPlayerEnum.h"
+#endif
+
+
+#ifdef NEPTUNE_MMI
+#ifndef __L1_STANDALONE__
+#endif /* __L1_STANDALONE__ */
+#endif
+
+#ifdef __XDM__
+#include "fs_type.h"
+#include "fat_fs.h"
+#endif /* __XDM__ */
+
+#ifdef __RTSP__
+#include "app2rtsp_struct.h"
+#endif /* __RTSP__ */
+
+/* for BMT */
+#include "drvsignals.h"
+/* for BMT */
+
+#ifdef __SIP__
+#include "inet_msg_def.h"
+#endif /* __SIP__ */
+
+#ifdef __POC__
+#include "mmi2poc_struct.h"
+#include "poc_enum.h"
+#endif /* __POC__ */
+
+#ifdef __BTMTK__
+#include "bluetooth_bm_struct.h"
+#include "bluetooth_struct.h"
+#include "bt_dm_struct.h"
+#include "bt_hfg_struct.h"
+#include "bt_hsg_struct.h"
+#include "bt_hidd_struct.h"
+#include "bt_a2dp_base_struct.h"
+#endif
+
+#ifdef __SYNCML_SUPPORT__
+#endif
+
+#include "mexe_struct.h"
+
+#ifdef __VOIP__
+#endif /* __VOIP__ */
+
+#ifdef __TCPIP__
+#include "..\..\..\inet_ps\tcpip\include\tcpip_config.h"
+#include "..\..\..\inet_ps\tcpip\include\in.h"
+#include "..\..\..\inet_ps\tcpip\include\ip.h"
+#include "..\..\..\inet_ps\tcpip\include\tcp.h"
+#include "..\..\..\inet_ps\tcpip\include\if.h"
+#ifdef __WIFI_SUPPORT__
+#include "wndrv_cnst.h"
+#include "wndrv_tcpip_msg.h"
+#endif /* __WIFI_SUPPORT__ */
+#endif /* __TCPIP__ */
+
+
+#ifdef __WIFI_SUPPORT__
+#include "..\..\..\inet_ps\dhcp\include\dhcp_const.h"
+#include "..\..\..\inet_ps\dhcp\include\dhcp_enum.h"
+#include "..\..\..\inet_ps\dhcp\include\dhcp_context.h"
+#include "dhcp_abm_enums.h"
+#include "dhcp_sip_enums.h"
+#include "dhcp2abm_struct.h"
+#include "dhcp2sip_struct.h"
+#include "tcpip2dhcp_struct.h"
+#endif /* __WIFI_SUPPORT__ */
+#ifdef __HOTSPOT_SUPPORT__
+#include "dhcpd2abm_struct.h"
+#endif /* __HOTSPOT_SUPPORT__ */
+
+#ifdef __SAF__
+#endif /* __SAF__ */
+
+#ifdef NEPTUNE_MMI
+#include ".\..\..\interface\modem\mmi_msg_struct.h"
+#endif
+
+#ifdef __SSL_SUPPORT__
+#endif /* __SSL_SUPPORT__ */
+
+#if defined(__GPS_SUPPORT__) || defined(__BT_GPS_SUPPORT__)
+#include "gps_struct.h"
+#endif
+
+#ifdef __CERTMAN_SUPPORT__
+#endif
+
+#if defined __SUPL_SUPPORT__
+#include "supl2lcsp_enums.h"
+#include "supl2lcsp_struct.h"
+#endif
+
+#ifndef FMT_NOT_PRESENT
+#endif
+
+#if defined(__UDX_SUPPORT__) || defined(__MULTI_VCARD_SUPPORT__)
+#endif
+
+#ifdef WAP_SUPPORT
+#endif /* WAP_SUPPORT */
+
+#ifdef __CCA_SUPPORT__
+#endif /* __CCA_SUPPORT__ */
+
+#ifdef __MTP_ENABLE__
+#endif
+
+#ifndef __MTK_TARGET__
+#include "rmmi_context.h"
+#endif
+
+#if defined(OPERA_V10_BROWSER) || defined(__GADGET_SUPPORT__)
+#endif
+
+#if defined (__MMI_IMAGE_VIEWER__) && !defined (NEPTUNE_MMI)
+#endif /* __MMI_IMAGE_VIEWER__ */
+
+#ifdef __CMMB_CAS_MBBMS_SUPPORT__
+#endif
+
+#if defined(__CMMB_SUPPORT__)
+#endif
+#if defined(__H264_HW_OPEN_API_SUPPORT__) || defined(__H264_DEC_HW_SUPPORT__) || defined (__H264_SW_OPEN_API_SUPPORT__)
+#endif
+
+#if defined(DRV_DISPLAY_DRIVER_V2)
+#include ".\..\..\interface\hal\display\wfc\wfc.h"
+#include ".\..\..\hal\display\debug\inc\lcd_catcher_log.h"
+#include ".\..\..\interface\hal\display\common\display_io.h"
+#include ".\..\..\hal\display\common\include\display_io_internal.h"
+#endif
+
+#include "fs_gprot.h"
+
+#ifdef __PLST_SERVICE_DB_SUPPORT__
+#include "..\..\..\plutommi\Service\PlstSrv\PlstSrvMsgStruct.h"
+#endif
+
+#include "mspm_public_api.h"
+
+/* global enum */
+/***************************************************************
+* if add _msgid.h or _sap.h file, should include the _msgid.h or _sap.h in : *
+* kal_debug_msg_sap_defs.h & srcParseDbModem.c & srcParseDbModem.c *
+****************************************************************/
+#include "module_msg_range.h"
+#include "perf_msgid.h"
+#include "sysservice_msgid.h"
+#include "cc_msgid.h"
+#include "ciss_msgid.h"
+#include "nwsel_msgid.h"
+#include "gmss_msgid.h"
+#include "mm_msgid.h"
+#include "sms_msgid.h"
+#include "sim_public_msgid.h"
+#include "sim_ps_msgid.h"
+#include "ps_public_l4_msgid.h"
+#include "l4_msgid.h"
+#include "psdm_msgid.h"
+#include "rr_msgid.h"
+#include "llc_msgid.h"
+#include "p2p_msgid.h"
+#include "sndcp_msgid.h"
+#include "sm_msgid.h"
+#include "data_msgid.h"
+#include "ps_public_vt_msgid.h"
+#include "VT_msgid.h"
+#include "nvram_msgid.h"
+#include "l1_msgid.h"
+#include "mll1_msgid.h"
+#include "hal_l1_msgid.h"
+#include "l1hisr_msgid.h"
+#include "ft_msgid.h"
+#include "tst_msgid.h"
+#include "audio_msgid.h"
+#include "cldmacore_msgid.h"
+#include "ratcm_msgid.h"
+#include "ratdm_msgid.h"
+#include "urr_msgid.h"
+#include "ul2_msgid.h"
+#include "ul2d_msgid.h"
+#include "uas_gas_msgid.h"
+#include "mrs_msgid.h"
+#include "uas_gas_gemini_msgid.h"
+#include "ul1_msgid.h"
+#include "ul1data_msgid.h"
+#include "ul1hisr_msgid.h"
+#include "ul1c_msgid.h"
+#include "ll1_msgid.h"
+#include "ul1tst_msgid.h"
+#include "ulcs_msgid.h"
+#include "lpp_msgid.h"
+#include "gps_msgid.h"
+#include "tl1_msgid.h"
+#include "tl1data_ast_msgid.h"
+// #include "tl1hisr_ast_msgid.h" File Removed (Tafang)
+#include "tl1fta_ast_msgid.h"
+#include "rsva_msgid.h"
+#include "mspm_msgid.h"
+#include "ndis_msgid.h"
+#include "ps_public_ups_msgid.h"
+#include "ups_msgid.h"
+#include "ps_public_supl_msgid.h"
+#include "supl_msgid.h"
+#include "cmux_msgid.h"
+#include "ppp_msgid.h"
+#include "ext_modem_msgid.h"
+#include "wmt_msgid.h"
+#include "em_msgid.h"
+#include "fs_msgid.h"
+#include "med_msgid.h"
+#include "dps_msgid.h"
+#include "udps_msgid.h"
+#include "drv_msgid.h"
+#include "meut_msgid.h"
+#include "l1_ext_msgid.h"
+#include "haplus_msgid.h"
+#include "hif_mw_msgid.h"
+#include "hif_svc_msgid.h"
+#include "las_msgid.h"
+#include "el1_msgid.h"
+#include "mcf_msgid.h"
+#include "sap_relayer_msgid.h"
+
+#include "sap_range.h"
+#include "svc_sap.h"
+#include "md_sap.h"
+#include "md_svc_sap.h"
+#include "md_drv_sap.h"
+#include "md_mmi_sap.h"
+#include "md_mw_sap.h"
+#include "mw_sap.h"
+#include "drv_sap.h"
+
+#if defined (__IDC_ENABLED__) && defined (__MD97__)
+#include "idc_md_msgid.h"
+#include "idc_msgid.h"
+#endif
+
+#include "srv_modid.h"
+#include "modem_2g3g_modid.h"
+#include "modem_4g_modid.h"
+#include "modem_5g_modid.h"
+#include "middleware_modid.h"
+#include "drv_modid.h"
+#include "hisr_modid.h"
+#include "isr_modid.h"
+#if defined(__CL1_TASK_ENABLE__)
+#include "cl1d_rf_tst_elt_msg_struct.h"
+#include "elt_msgid.h"
+#endif
+#include "mbci_struct.h"
+
+#if defined (__ETCM__)
+#include "eval_msgid.h"
+#include "upcm_msgid.h"
+#endif
+
+#include "l4c_eval_struct.h"
+
+#include "mdfpm_msgid.h"
+
+/* CCCI IPC */
+#if defined(__CCCIDEV_SUPPORT__)
+#include "ccci_ipc_msgid.h"
+#endif
+/* CCCI IPC */
+#if defined(__CCCIDEV_SUPPORT__)
+#include "ccci_tty_if.h" //dump dev_id enum
+#include "ccci_fs_if.h" //dump op enum
+#include "dcl.h" //dump SIO_CMD enum
+#endif
+
+#if defined(__HIF_LHIF_SUPPORT__)
+#include "lhifcore_msgid.h"
+#endif
+
+/* CCISM */
+#if defined(__HIF_CCISM_SUPPORT__)
+#include "ccismcore_msgid.h"
+#endif /*defined(__HIF_CCISM_SUPPORT__)*/
+
+#ifdef __IPCORE_SUPPORT__
+#include "ipc_struct.h"
+#include "ipc_enums.h"
+#include "pfm_struct.h"
+#include "pfm_enums.h"
+#endif /* __IPCORE_SUPPORT__ */
+
+#ifdef __IPFCORE_SUPPORT__
+#include "ipfc_enums.h"
+#endif /* __IPFCORE_SUPPORT__ */
+
+#ifdef __DPFM_SUPPORT__
+#include "dpfm_enums.h"
+#include "dpfm_struct.h"
+#endif /* __DPFM_SUPPORT__ */
+
+#ifdef __TMC_SUPPORT__
+#include "tmc_struct.h"
+#include "tmc_enums.h"
+#include "tmc_l5_struct.h"
+#endif /* __TMC_SUPPORT__ */
+
+#if defined(__HLT_SUPPORT__)
+#include "hlt_if.h"
+#endif
+
+#ifdef __MTK_MD_DIRECT_USB_SUPPORT__
+#include "ufpm_em_struct.h"
+#endif
+
+#ifdef __BIP_SUPPORT__
+#include "bip_msgid.h"
+#include "bip_if.h"
+#endif
+
+#ifdef __MCF_SUPPORT__
+#include "mcf_struct.h"
+#include "mcf_enum.h"
+#endif
+
+#include "iwlan_msgid.h"
+
+#include "ssds_msgid.h"
+#include "atp_ssds_struct.h"
+//#include "ssds_imc_struct.h"
+#include "ssds_l4c_struct.h"
+
+#include "atp_analyzer.h"
+#include "atp_structs.h"
+#include "atp_msgid.h"
+#include "atp_l4c_struct.h"
+#include "l4c2rac_struct.h"
+
+#include "atp_defs.h"
+
+#ifdef __KPALV_SUPPORT__
+#include "kpalv_msgid.h"
+#include "kpalv_struct.h"
+#endif
+
+#ifdef __CDMA2000_RAT__
+/* Add C2K EM headers */
+#include "em_public_struct_evl1.h"
+#include "em_public_struct_xl1.h"
+#include "em_public_struct_chsc.h"
+#include "em_public_struct_evl2.h"
+#include "em_public_struct_xl2.h"
+#include "em_public_struct_evl3.h"
+#include "em_public_struct_xl3.h"
+#include "em_public_struct_c2k_hlp.h"
+#include "em_public_struct_cval.h"
+#endif /* __CDMA2000_RAT__ */
+
+#ifdef __MD_TCPIP_SUPPORT__
+#include "tcpip_msgid.h"
+#endif
+
+#include "vdm_l4c_struct.h"
+#include "sdm_l4c_struct.h"
+#include "vdm_gmss_struct.h"
+#ifdef __XCAP_SUPPORT__
+#include "xcap_msgid.h"
+#include "xcap_if.h"
+#endif
+
+#ifdef __SASE_SUPPORT__
+#include "sase_msgid.h"
+#include "sase_if.h"
+#include "atp_sase_struct.h"
+#endif
+
+#ifdef __NR_ENABLE__
+#include "tmc_l1_struct.h"
+#endif
+
+#ifdef __DISPATCHER_SUPPORT__
+#include "dispatcher_msgid.h"
+#include "ipcore_dispatcher_struct.h"
+#include "n3epc_dispatcher_struct.h"
+#endif
+
+#ifdef __MT_FRAMEWORK_SUPPORT__
+#include "mtf_struct.h"
+#endif
+
+#include "nas_sv_msgid.h"
+#include "smic_msgid.h"
+
+/* Move to lte_sec libParseDbModem.c */
+//#if defined(__FIVEG_NAS__)
+//For MCDDLL
+//#include "vgmm_msg_unpack.h"
+//#include "vgsm_msg_unpack.h"
+//#endif /* __FIVEG_NAS__ */
+
+/* Move to lte_sec libParseDbModem.c */
+// #if defined (__NR_RAT__)
+// #include "nr_fwk_trace_enum.h"
+// #include "nr_rx_trace_enum.h"
+// #include "nr_tx_trace_enum.h"
+// #include "mml1_fwk_lcm_public.h"
+// #endif /* __NR_RAT__ */
+
+#if defined(__HIF_DPMAIF_DP_SUPPORT__)
+#include "dpmaif_msgid.h"
+#endif
+
+#ifdef __HTTP_TLS_SUPPORT__
+#include "http_tls_msgid.h"
+#include "http_if.h"
+#include "tls_if.h"
+#endif
+
+#ifdef __MD_CERT_SUPPORT__
+#include "cert_msgid.h"
+#endif
+
+
+#ifdef __IPC_ADAPTER__
+#ifndef __MTK_TARGET__
+#include "oemdebug.h"
+#include "oemutility.h"
+#endif
+#include "ipc_adapter_public_struct.h"
+#include "ipc_adapter_public_def.h"
+#include "ipc_adapter_public_em_struct.h"
+#include "ipc_adapter_msgid.h"
+#include "ipc_adapter_cc_struct.h"
+#include "ipc_adapter_pwr_struct.h"
+#include "ipc_adapter_sms_struct.h"
+#include "ipc_adapter_atp_struct.h"
+#include "ipc_adapter_sat_struct.h"
+#include "ipc_adapter_phb_struct.h"
+#include "ipc_adapter_smu_struct.h"
+#include "ipc_adapter_ss_struct.h"
+#include "ipc_adapter_imei_struct.h"
+#include "ipc_adapter_cfg_struct.h"
+#include "ipc_adapter_embms_struct.h"
+#include "ipc_adapter_l23_struct.h"
+#include "ipc_adapter_domestic_struct.h"
+#include "ipc_adapter_jpn_struct.h"
+#include "ipca_smu_private_enum.h"
+#include "ipca_smu_context.h"
+#include "ipca_embms_context.h"
+#include "ipca_ctrl_struct.h"
+#include "ipca_phb_enum.h"
+#include "ipca_imei_enum.h"
+#include "ipca_pwr_enum.h"
+#include "ipca_pwr_context.h"
+#include "ipca_sms_hdlr.h"
+#include "ipc_adapter_nw_struct.h"
+#include "ipc_adapter_dspl_struct.h"
+#include "ipc_adapter_misc_struct.h"
+#include "ipca_nw_enum.h"
+#include "ipca_nw_context.h"
+#include "ipca_misc_enum.h"
+#include "ipc_adapter_enum.h"
+#include "ipc_adapter_gprs_struct.h"
+#include "ipca_ctrl_context.h"
+#include "ipca_factory_enum.h"
+#include "ipc_adapter_factory_struct.h"
+#include "ipc_adapter_sap_struct.h"
+#include "ipca_gprs_enum.h"
+#include "ipca_gprs_context.h"
+#include "ipca_gprs_ps.h"
+#include "ipca_gprs_ps_routine_struct.h"
+#include "ipc_adapter_em_struct.h"
+#include "ipca_sat_private_struct.h"
+#include "ipca_sat_private_enum.h"
+#include "ipca_cc_utility.h"
+#include "ipc_adapter_srlte_struct.h"
+#include "ipca_srlte_context.h"
+#include "ipca_em_struct.h"
+#include "ipca_jpn_private_struct.h"
+#include "ipca_jpn_private_defs.h"
+#include "ipca_domestic_main.h"
+#include "ipca_sap_enum.h"
+#include "ipca_sap_context.h"
+#endif //__IPC_ADAPTER__
+
+
+#ifdef __WHITE_CELL_LOCK__
+#ifdef __L5_SUPPORT__
+#include "l5_l4c_struct.h"
+#endif /* __L5_SUPPORT__*/
+#endif /* __WHITE_CELL_LOCK__ */
+
+/********************************************* Warning **********************************************
+* Please make sure header file is included correctly!
+* If the common header file is added to srcParseDbModem_tdd_fdd.c, the context of header file will be preprocessed twice.
+* The change as mentioned previously can lead to build time inefficiency.
+*
+* common header file => srcParseDbModem.c
+* Tdd/Fdd(2g/3g) header file => srcParseDbModem_tdd_fdd.c
+*
+* If the header file relate to Tdd/Fdd (2g/3g), please include the header file in srcParseDbModem_tdd_fdd.c
+* If the header file is common header file or is not related to Tdd/Fdd(2g/3g), please add the header file to srcParseDbModem.c
+********************************************** Warning **********************************************/
diff --git a/mcu/service/dhl/database/msglog_db/srcParseDbModem_tdd_fdd.c b/mcu/service/dhl/database/msglog_db/srcParseDbModem_tdd_fdd.c
new file mode 100644
index 0000000..d1143fc
--- /dev/null
+++ b/mcu/service/dhl/database/msglog_db/srcParseDbModem_tdd_fdd.c
@@ -0,0 +1,111 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ *
+ * Filename:
+ * ---------
+ * srcParseDbModem.c
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * This file collects primitve IDs and struct definition from the Modem
+ * part for pre-processing.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * =============================================================================
+ * $Log$
+ *
+ *******************************************************************************/
+/********************************************* Warning **********************************************
+* Please make sure header file is included correctly!
+* If the common header file is added to srcParseDbModem_tdd_fdd.c, the context of header file will be preprocessed twice.
+* The change as mentioned previously can lead to build time inefficiency.
+*
+* common header file => srcParseDbModem.c
+* Tdd/Fdd(2g/3g) header file => srcParseDbModem_tdd_fdd.c
+*
+* If the header file relate to Tdd/Fdd (2g/3g), please include the header file in srcParseDbModem_tdd_fdd.c
+* If the header file is common header file or is not related to Tdd/Fdd(2g/3g), please add the header file to srcParseDbModem.c
+********************************************** Warning **********************************************/
+
+#ifdef _MODIS_ON_VC9_
+#define __w64
+#endif
+
+typedef int cgen_use_spare_msg_id;
+typedef int cgen_use_spare_sap_id;
+typedef int cgen_use_spare_module_id;
+typedef unsigned short msg_type;
+typedef unsigned short sap_type;
+typedef unsigned short module_type;
+
+#ifdef __GNUC__
+ typedef struct __va_list { void *__ap; } __builtin_va_list;
+ #define INLINE __inline
+ #define inline __inline
+#endif
+
+#define __declspec(s)
+//"ps\\tools\\asn1lib\\include\\act-ttbuffmgr.h"
+#undef STDC_HEADERS //it will include stdio.h
+
+#ifdef __RVCT__
+#ifndef __int64
+ typedef long long __int64;
+#endif
+
+#define _ARMABI
+
+#endif
+
+/********************************************* Warning **********************************************
+* Please make sure header file is included correctly!
+* If the common header file is added to srcParseDbModem_tdd_fdd.c, the context of header file will be preprocessed twice.
+* The change as mentioned previously can lead to build time inefficiency.
+*
+* common header file => srcParseDbModem.c
+* Tdd/Fdd(2g/3g) header file => srcParseDbModem_tdd_fdd.c
+*
+* If the header file relate to Tdd/Fdd (2g/3g), please include the header file in srcParseDbModem_tdd_fdd.c
+* If the header file is common header file or is not related to Tdd/Fdd(2g/3g), please add the header file to srcParseDbModem.c
+********************************************** Warning **********************************************/
\ No newline at end of file
diff --git a/mcu/service/dhl/database/msglog_db/swParseDbModem.c b/mcu/service/dhl/database/msglog_db/swParseDbModem.c
new file mode 100644
index 0000000..bf3b882
--- /dev/null
+++ b/mcu/service/dhl/database/msglog_db/swParseDbModem.c
@@ -0,0 +1,106 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ *
+ * Filename:
+ * ---------
+ * custom_parse_db.c
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * This file collects the customer module/primitve information to be included
+ * in the database.
+ * The enum id for module type is "customer_module_type".
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * =============================================================================
+ * $Log$
+ *
+ * 09 19 2019 yaoyong.ju
+ * [MOLY00441460] [VMOLY]Rebuild NVRAM file in SW RD dormain
+ * .
+ * Fix the build issue that LID info will not be updated on SW RD dormain
+ *
+ * 07 30 2018 chi-chun.lu
+ * [MOLY00342741] [MakeFile] [UMOLYE] [Modify Makefile Rules] enhance build flow for cgen tdd/fdd preprocessing files
+ *
+ * .
+ *
+ *******************************************************************************/
+
+#ifdef _MODIS_ON_VC9_
+#define __w64
+#endif
+
+typedef int cgen_use_spare_msg_id;
+typedef int cgen_use_spare_sap_id;
+typedef int cgen_use_spare_module_id;
+typedef unsigned short msg_type;
+typedef unsigned short sap_type;
+typedef unsigned short module_type;
+
+
+#ifdef __GNUC__
+ typedef struct __va_list { void *__ap; } __builtin_va_list;
+ #define INLINE __inline
+ #define inline __inline
+#endif
+
+#define __declspec(s)
+
+#include "kal_public_api.h"
+
+#ifdef __MOD_NVRAM__
+#include "nvram_data_items.h"
+#include "ex_item.h"
+
+#if defined(__MMI_FMI__)
+#include "nvram_common_defs.h"
+#include "common_nvram_editor_data_item.h"
+#endif
+
+#include "nvram_editor_data_item.h"
+#include "nvram_editor.h"
+#include "nvram_lid_list_for_mcf.h"
+#include "nvram_lid_structure_check_extend_list.h"
+#endif /*__MOD_NVRAM__*/
diff --git a/mcu/service/dhl/database/sap_info.h b/mcu/service/dhl/database/sap_info.h
new file mode 100644
index 0000000..bdd48eb
--- /dev/null
+++ b/mcu/service/dhl/database/sap_info.h
@@ -0,0 +1,3388 @@
+// SAP info define macros for use in MSC composer
+#ifdef GEN_FOR_CPARSER
+#define BEGIN_SAP_INFO \
+ typedef enum {
+#define SAP_INFO(_SAP,_MODA,_MODB) \
+ _SAP##__##_MODA##__##_MODB,
+#define END_SAP_INFO \
+ } sap_info;
+#else
+#define BEGIN_SAP_INFO
+#define SAP_INFO(_SAP,_MODA,_MODB)
+#define END_SAP_INFO
+#endif
+
+/* SAP info is used by MSC composer to infer the SAP for messages between modules.
+ * For example,
+ * SAP_INFO(RRM_RMPC_SAP,MOD_RRM,MOD_RMC)
+ * declares messages between MOD_RRM and MOD_RMC modules belong to RRM_RMPC_SAP.
+
+ * Syntax rules for SAP_INFO:
+ * 1. ANY is used to match any modules
+ * 2. a SAP can exist between more than one pair of modules
+ * 3. INVALID_SAP is the default SAP between two modules if there is no matching SAP_INFO(...)
+ * 4. SAP can be directional if both SAP_INFO(SAP_A_B,MOD_A,MOD_B) and SAP_INFO(SAP_B_A,MOD_B,MOD_A) exist.
+ * 5. SAP and module names should not begin or end with '_'.
+ * 6. SAP info search priority for messages from MOD_A to MOD_B
+ * 1) MOD_A MOD_B
+ * 2) MOD_B MOD_A
+ * 3) MOD_A ANY
+ * 4) ANY MOD_A
+ * 5) ANY MOD_B
+ * 6) MOD_B ANY
+ * 7) INVALID_SAP (default)
+ */
+BEGIN_SAP_INFO
+ SAP_INFO(GMMREG_SAP,MOD_MM,MOD_RAC)
+ SAP_INFO(MM_SMS_SAP,MOD_MM,MOD_SMS)
+ SAP_INFO(MM_CC_SAP,MOD_MM,MOD_CC)
+ SAP_INFO(MM_SS_SAP,MOD_MM,MOD_CISS)
+ SAP_INFO(MM_AS_SAP,MOD_MM,MOD_AS_FDD)
+ SAP_INFO(MM_AS_SAP,MOD_MM,MOD_AS_TDD)
+ SAP_INFO(MM_AS_SAP,MOD_MM,MOD_RRM_FDD)
+ SAP_INFO(MM_AS_SAP,MOD_MM,MOD_RRM_TDD)
+ SAP_INFO(MM_SIM_SAP,MOD_MM,MOD_SIM)
+ SAP_INFO(GMM_SM_SAP,MOD_MM,MOD_SM)
+ SAP_INFO(MNCC_SAP,MOD_CC,MOD_CSM)
+ SAP_INFO(MNSMS_SAP,MOD_SMS,MOD_SMSAL)
+ SAP_INFO(MNSS_SAP,MOD_CISS,MOD_CSM)
+ SAP_INFO(CISS_CISS_SAP,MOD_CISS,MOD_CISS)
+ SAP_INFO(CSM_TDT_SAP,MOD_CSM,MOD_TDT)
+ SAP_INFO(CSM_L2R_SAP,MOD_CSM,MOD_L2R)
+ SAP_INFO(CSM_SIM_SAP,MOD_CSM,MOD_SIM)
+ SAP_INFO(CSM_L4C_SAP,MOD_CSM,MOD_L4C)
+ SAP_INFO(L4C_CISS_SAP,MOD_L4C,MOD_CISS)
+ #ifdef __TC7__CS__SUPPORT__
+ SAP_INFO(CSM_RRCE_SAP,MOD_CSM,MOD_RRCE)
+ #endif
+ SAP_INFO(SMSAL_L4C_SAP,MOD_SMSAL,MOD_L4C)
+ SAP_INFO(UEM_L4C_SAP,MOD_UEM,MOD_L4C)
+ SAP_INFO(PHB_L4C_SAP,MOD_PHB,MOD_L4C)
+ SAP_INFO(SMU_L4C_SAP,MOD_SMU,MOD_L4C)
+ SAP_INFO(L4C_RAT_TCM_SAP,MOD_L4C,MOD_RAT_TCM)
+ SAP_INFO(L4C_RAT_TCM_SAP,MOD_RAT_TCM,MOD_L4C)
+ SAP_INFO(RAT_TCM_TCM_SAP,MOD_RAT_TCM,MOD_TCM)
+ SAP_INFO(RAT_TCM_TCM_SAP,MOD_TCM,MOD_RAT_TCM)
+ SAP_INFO(RAC_L4C_SAP,MOD_L4C,MOD_RAC)
+ SAP_INFO(UART_L4C_SAP,MOD_UART,MOD_L4C)
+ SAP_INFO(L4C_SM_SAP,MOD_SM,MOD_L4C)
+ SAP_INFO(L4C_SM_SAP,MOD_L4C,MOD_SM)
+ SAP_INFO(L4C_ESM_SAP,MOD_ESM,MOD_L4C)
+ SAP_INFO(L4C_ESM_SAP,MOD_L4C,MOD_ESM)
+ SAP_INFO(L4C_SAP,MOD_L4C,MOD_L4C_2)
+ SAP_INFO(RRM_RMPC_SAP,MOD_RRM_FDD,MOD_RMC_FDD)
+ SAP_INFO(RRM_RMPC_SAP,MOD_RRM_TDD,MOD_RMC_TDD)
+ SAP_INFO(RRM_RMPC_SAP,MOD_RRM_FDD,MOD_RMPC_FDD)
+ SAP_INFO(RRM_RMPC_SAP,MOD_RRM_TDD,MOD_RMPC_TDD)
+ SAP_INFO(RRM_RMPC_SAP,MOD_RRM_FDD,MOD_AS_FDD)
+ SAP_INFO(RRM_RMPC_SAP,MOD_RRM_TDD,MOD_AS_TDD)
+ SAP_INFO(RMC_LAPDM_SAP,MOD_RMC,MOD_LAPDM_FDD)
+ SAP_INFO(RMC_LAPDM_SAP,MOD_RMC,MOD_LAPDM_TDD)
+ SAP_INFO(LAPDM_MPAL_SAP,MOD_LAPDM_FDD,MOD_MPAL_FDD)
+ SAP_INFO(LAPDM_MPAL_SAP,MOD_LAPDM_TDD,MOD_MPAL_TDD)
+ SAP_INFO(RLC_MAC_SAP,MOD_RLC_FDD,MOD_MAC_FDD)
+ SAP_INFO(RLC_MAC_SAP,MOD_RLC_TDD,MOD_MAC_TDD)
+ SAP_INFO(RLC_RMPC_SAP,MOD_RLC_FDD,MOD_RMPC_FDD)
+ SAP_INFO(RLC_RMPC_SAP,MOD_RLC_TDD,MOD_RMPC_TDD)
+ SAP_INFO(RLC_MPAL_SAP,MOD_RLC_FDD,MOD_MPAL_FDD)
+ SAP_INFO(RLC_MPAL_SAP,MOD_RLC_TDD,MOD_MPAL_TDD)
+ SAP_INFO(RLC_REASM_SAP,MOD_RLC_FDD,MOD_REASM_FDD)
+ SAP_INFO(RLC_REASM_SAP,MOD_RLC_TDD,MOD_REASM_TDD)
+ SAP_INFO(MAC_RMPC_SAP,MOD_MAC_FDD,MOD_RMPC_FDD)
+ SAP_INFO(MAC_RMPC_SAP,MOD_MAC_TDD,MOD_RMPC_TDD)
+ SAP_INFO(RRM_MPAL_SAP,MOD_RRM_FDD,MOD_MPAL_FDD)
+ SAP_INFO(RRM_MPAL_SAP,MOD_RRM_TDD,MOD_MPAL_TDD)
+ SAP_INFO(RMPC_MPAL_SAP,MOD_RMPC_FDD,MOD_MPAL_FDD)
+ SAP_INFO(RMPC_MPAL_SAP,MOD_RMPC_TDD,MOD_MPAL_TDD)
+ SAP_INFO(RMPC_MPAL_SAP,MOD_RMC,MOD_MPAL_FDD)
+ SAP_INFO(RMPC_MPAL_SAP,MOD_RMC,MOD_MPAL_TDD)
+ SAP_INFO(RMPC_MPAL_SAP,MOD_AS_FDD,MOD_MPAL_FDD)
+ SAP_INFO(RMPC_MPAL_SAP,MOD_AS_TDD,MOD_MPAL_TDD)
+ SAP_INFO(MAC_MPAL_SAP,MOD_MAC_FDD,MOD_MPAL_FDD)
+ SAP_INFO(MAC_MPAL_SAP,MOD_MAC_TDD,MOD_MPAL_TDD)
+ SAP_INFO(GISE_SAP,MOD_GISE_FDD,MOD_RRM_FDD)
+ SAP_INFO(GISE_SAP,MOD_GISE_TDD,MOD_RRM_TDD)
+
+ SAP_INFO(GISE_SAP,MOD_GISE_FDD,MOD_MPAL_FDD)
+ SAP_INFO(GISE_SAP,MOD_GISE_TDD,MOD_MPAL_TDD)
+ SAP_INFO(GISE_SAP,MOD_MPAL_FDD,MOD_GISE_FDD)
+ SAP_INFO(GISE_SAP,MOD_MPAL_TDD,MOD_GISE_TDD)
+ SAP_INFO(MMI_AS_SAP,MOD_RAC,MOD_AS_FDD)
+ SAP_INFO(MMI_AS_SAP,MOD_RAC,MOD_AS_TDD)
+ SAP_INFO(SMSAL_AS_SAP,MOD_SMS,MOD_AS_FDD)
+ SAP_INFO(SMSAL_AS_SAP,MOD_SMS,MOD_AS_TDD)
+ SAP_INFO(LLC_GMM_SAP,MOD_LLC,MOD_MM)
+ SAP_INFO(LLC_RLC_SAP,MOD_LLC,MOD_RLC_FDD)
+ SAP_INFO(LLC_RLC_SAP,MOD_LLC,MOD_RLC_TDD)
+ SAP_INFO(LLC_SNDCP_SAP,MOD_LLC,MOD_SNDCP)
+ SAP_INFO(LLC_SMS_SAP,MOD_LLC,MOD_SMS)
+ SAP_INFO(GMM_RLC_SAP,MOD_MM,MOD_RLC_FDD)
+ SAP_INFO(GMM_RLC_SAP,MOD_MM,MOD_RLC_TDD)
+ SAP_INFO(SNDCP_REG_SAP,MOD_SNDCP,MOD_TCM)
+ SAP_INFO(SM_SNDCP_SAP,MOD_SM,MOD_SNDCP)
+ SAP_INFO(SMREG_SAP,MOD_SM,MOD_PAM)
+ SAP_INFO(SMREG_SAP,MOD_PAM,MOD_SM)
+ SAP_INFO(TCM_PAM_SAP,MOD_TCM,MOD_PAM)
+ SAP_INFO(TCM_PAM_SAP,MOD_PAM,MOD_TCM)
+ SAP_INFO(PPP_L4C_SAP,MOD_PPP,MOD_L4C)
+ SAP_INFO(PPP_RAT_TCM_SAP,MOD_PPP,MOD_RAT_TCM)
+ SAP_INFO(PPP_RAT_TCM_SAP,MOD_RAT_TCM,MOD_PPP)
+ SAP_INFO(L2R_RLP_SAP,MOD_L2R,MOD_RLP)
+ SAP_INFO(RLP_RA_SAP,MOD_RLP,MOD_L1)
+ SAP_INFO(SNDCP_PPP_SAP,MOD_SNDCP,MOD_PPP)
+ SAP_INFO(DATA_MPAL_SAP,MOD_RLP,MOD_MPAL_FDD)
+ SAP_INFO(DATA_MPAL_SAP,MOD_RLP,MOD_MPAL_TDD)
+ SAP_INFO(PS_NVRAM_SAP,MOD_NVRAM,ANY)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM,MOD_SMU)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM,MOD_L4C)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM,MOD_AS_FDD)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM,MOD_AS_TDD)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM,MOD_RRM_FDD)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM,MOD_RRM_TDD)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM,MOD_MM)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM,MOD_NWSEL)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM,MOD_GMSS)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM,MOD_EVAL)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM,MOD_USIME_FDD)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM_2,MOD_USIME_FDD_2)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM_3,MOD_USIME_FDD_3)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM_4,MOD_USIME_FDD_4)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM,MOD_SMSAL)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM,MOD_CSM)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM,MOD_BT)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM,MOD_PHB)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM,MOD_L4BSAT)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM_2,MOD_L4BSAT_2)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM_3,MOD_L4BSAT_3)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM_4,MOD_L4BSAT_4)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM,MOD_L4BSIM)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM_2,MOD_L4BSIM_2)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM_3,MOD_L4BSIM_3)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM_4,MOD_L4BSIM_4)
+ SAP_INFO(SIM_SIM_SAP,MOD_SIM,MOD_SIM)
+ SAP_INFO(SIM_SIM_SAP,MOD_SIM,MOD_SIM_2)
+ SAP_INFO(MED_SAP,MOD_MED,ANY)
+ SAP_INFO(MMI_L4C_SAP,MOD_MMI,MOD_L4C)
+ SAP_INFO(ABM_SOC_SAP,MOD_ABM,MOD_SOC)
+ SAP_INFO(L4C_ABM_SAP,MOD_L4C,MOD_ABM)
+ SAP_INFO(TCPIP_SOC_SAP,MOD_TCPIP,MOD_SOC)
+ SAP_INFO(WAP_MMI_SAP,MOD_MMI,MOD_WAP)
+ SAP_INFO(TDT_PPP_SAP,MOD_TDT,MOD_PPP)
+ SAP_INFO(L2R_PPP_SAP,MOD_L2R,MOD_PPP)
+ SAP_INFO(PPP_TCPIP_SAP,MOD_PPP,MOD_TCPIP)
+ SAP_INFO(TCM_TCPIP_SAP,MOD_TCM,MOD_TCPIP)
+ SAP_INFO(SOC_APP_SAP,MOD_SOC,ANY)
+ SAP_INFO(SMSAL_SOC_SAP,MOD_SMSAL,MOD_SOC)
+ SAP_INFO(EM_PS_SAP,MOD_DHL,ANY)
+ SAP_INFO(EM_LUMAC_SAP,MOD_L4C,MOD_LUMAC_TDD)
+ SAP_INFO(MPAL_L1_SAP,MOD_MPAL_FDD,MOD_L1)
+ SAP_INFO(MPAL_L1_SAP,MOD_MPAL_TDD,MOD_L1)
+ SAP_INFO(MAC_L1_SAP,MOD_MAC_FDD,MOD_L1)
+ SAP_INFO(MAC_L1_SAP,MOD_MAC_TDD,MOD_L1)
+ SAP_INFO(RMC_LAPDM_SAP,MOD_AS_FDD,MOD_LAPDM_FDD)
+ SAP_INFO(RMC_LAPDM_SAP,MOD_AS_TDD,MOD_LAPDM_TDD)
+ SAP_INFO(MAC_RRM_SAP,MOD_MAC_FDD,MOD_AS_FDD)
+ SAP_INFO(MAC_RRM_SAP,MOD_MAC_TDD,MOD_AS_TDD)
+ SAP_INFO(MAC_RMPC_SAP,MOD_MAC_FDD,MOD_AS_FDD)
+ SAP_INFO(MAC_RMPC_SAP,MOD_MAC_TDD,MOD_AS_TDD)
+ SAP_INFO(UL1_MAL1_SAP,MOD_MAL1,MOD_UL1)
+ SAP_INFO(RATCM_RRCE_SAP,MOD_RATCM,MOD_RRCE)
+ SAP_INFO(RATCM_RRCE_SAP,MOD_RATCM_2,MOD_RRCE_2)
+ SAP_INFO(RATCM_RRCE_SAP,MOD_RATCM,MOD_RRCE_TDD)
+ SAP_INFO(RATCM_RRCE_SAP,MOD_RATCM_2,MOD_RRCE_TDD_2)
+ SAP_INFO(RATCM_SLCE_SAP,MOD_RATCM,MOD_SLCE)
+ SAP_INFO(RATCM_SLCE_SAP,MOD_RATCM_2,MOD_SLCE_2)
+ SAP_INFO(RATCM_SLCE_SAP,MOD_RATCM,MOD_SLCE_TDD)
+ SAP_INFO(RATCM_SLCE_SAP,MOD_RATCM_2,MOD_SLCE_TDD_2)
+ SAP_INFO(RATCM_CSCE_SAP,MOD_RATCM,MOD_CSCE)
+ SAP_INFO(RATCM_CSCE_SAP,MOD_RATCM,MOD_CSCE_FDD)
+ SAP_INFO(RATCM_CSCE_SAP,MOD_RATCM,MOD_CSCE_TDD)
+ SAP_INFO(RATCM_CSCE_SAP,MOD_RATCM_2,MOD_CSCE_2)
+ SAP_INFO(RATCM_CSCE_SAP,MOD_RATCM_2,MOD_CSCE_FDD_2)
+ SAP_INFO(RATCM_CSE_SAP,MOD_RATCM,MOD_CSE)
+ SAP_INFO(RATCM_CSE_SAP,MOD_RATCM,MOD_CSE_TDD)
+ SAP_INFO(RATCM_CSE_SAP,MOD_RATCM_2,MOD_CSE_2)
+ SAP_INFO(RATCM_USIME_SAP,MOD_RATCM,MOD_USIME_FDD)
+ SAP_INFO(RATCM_USIME_SAP,MOD_RATCM_2,MOD_USIME_FDD_2)
+ SAP_INFO(RATCM_USIME_SAP,MOD_RATCM_3,MOD_USIME_FDD_3)
+ SAP_INFO(RATCM_USIME_SAP,MOD_RATCM_4,MOD_USIME_FDD_4)
+ SAP_INFO(RATCM_USIME_SAP,MOD_RATCM,MOD_USIME_TDD)
+ SAP_INFO(RATCM_CSR_SAP,MOD_RATCM,MOD_CSR_TDD)
+ SAP_INFO(RATCM_CSR_SAP,MOD_RATCM,MOD_CSR_FDD)
+ SAP_INFO(RATCM_CSR_SAP,MOD_RATCM,MOD_CSR_FDD_2)
+ SAP_INFO(RATCM_CSR_SAP,MOD_RATCM,MOD_CSR_FDD_3)
+ SAP_INFO(RATCM_CSR_SAP,MOD_RATCM,MOD_CSR_FDD_4)
+ SAP_INFO(RATCM_CSR_SAP,MOD_VT,MOD_CSR_TDD)
+ SAP_INFO(RATCM_CSR_SAP,MOD_VT,MOD_CSR_FDD)
+ SAP_INFO(RATCM_CSR_SAP,MOD_VT_2,MOD_CSR_FDD_2)
+ SAP_INFO(RATCM_CSR_SAP,MOD_VT_3,MOD_CSR_FDD_3)
+ SAP_INFO(RATCM_CSR_SAP,MOD_VT_4,MOD_CSR_FDD_4)
+ SAP_INFO(CSR_L1AUD_SAP,MOD_CSR_TDD,MOD_L1SP)
+ SAP_INFO(CSR_L1AUD_SAP,MOD_CSR_FDD,MOD_L1SP)
+ SAP_INFO(CSR_L1AUD_SAP,MOD_CSR_FDD_2,MOD_L1SP)
+ SAP_INFO(CSR_L1AUD_SAP,MOD_CSR_FDD_3,MOD_L1SP)
+ SAP_INFO(CSR_L1AUD_SAP,MOD_CSR_FDD_4,MOD_L1SP)
+ SAP_INFO(RATCM_BMC_SAP,MOD_RATCM,MOD_BMC_FDD)
+ SAP_INFO(RATCM_BMC_SAP,MOD_RATCM_2,MOD_BMC_FDD_2)
+ SAP_INFO(RATCM_BMC_SAP,MOD_RATCM_3,MOD_BMC_FDD_3)
+ SAP_INFO(RATCM_BMC_SAP,MOD_RATCM_4,MOD_BMC_FDD_4)
+ SAP_INFO(RATCM_URLC_SAP,MOD_RATCM,MOD_URLC_FDD)
+ SAP_INFO(RATCM_URLC_SAP,MOD_RATCM_2,MOD_URLC_FDD_2)
+ SAP_INFO(RATCM_URLC_SAP,MOD_RATCM_3,MOD_URLC_FDD_3)
+ SAP_INFO(RATCM_URLC_SAP,MOD_RATCM_4,MOD_URLC_FDD_4)
+ SAP_INFO(RATCM_URLC_SAP,MOD_RATCM,MOD_URLC_TDD)
+ SAP_INFO(RATCM_URLC_SAP,MOD_RATCM_2,MOD_URLC_TDD_2)
+ SAP_INFO(RATCM_UL2_SAP,MOD_RATCM,MOD_UL2_TDD)
+ SAP_INFO(RATCM_UL2D_SAP,MOD_RATCM,MOD_UL2D_TDD)
+ SAP_INFO(UAS_GAS_SAP,MOD_UAS,MOD_GAS_FDD)
+ SAP_INFO(UAS_GAS_SAP,MOD_UAS,MOD_GAS_TDD)
+ SAP_INFO(SLCE_URLC_SAP,MOD_SLCE,MOD_URLC_FDD)
+ SAP_INFO(SLCE_URLC_SAP,MOD_SLCE_2,MOD_URLC_FDD_2)
+ SAP_INFO(SLCE_URLC_SAP,MOD_SLCE_TDD,MOD_URLC_TDD)
+ SAP_INFO(SLCE_URLC_SAP,MOD_SLCE_TDD_2,MOD_URLC_TDD_2)
+ SAP_INFO(RRCE_URLC_SAP,MOD_RRCE,MOD_URLC_FDD)
+ SAP_INFO(RRCE_URLC_SAP,MOD_RRCE_2,MOD_URLC_FDD_2)
+ SAP_INFO(RRCE_URLC_SAP,MOD_RRCE_TDD,MOD_URLC_TDD)
+ SAP_INFO(RRCE_URLC_SAP,MOD_RRCE_TDD_2,MOD_URLC_TDD_2)
+ SAP_INFO(URR_SAP,MOD_URR_FDD,ANY)
+ SAP_INFO(URR_SAP,MOD_URR_FDD_2,ANY)
+ SAP_INFO(URR_SAP,MOD_URR_FDD_3,ANY)
+ SAP_INFO(URR_SAP,MOD_URR_FDD_4,ANY)
+ SAP_INFO(URR_SAP,MOD_URR_TDD,ANY)
+ SAP_INFO(URR_SAP,MOD_URR_TDD_2,ANY)
+ SAP_INFO(URR_SAP,MOD_URR_TDD_3,ANY)
+ SAP_INFO(URR_SAP,MOD_URR_TDD_4,ANY)
+ SAP_INFO(LURR_SAP,MOD_URR_FDD,MOD_LURR_FDD)
+ SAP_INFO(LURR_SAP,MOD_URR_FDD_2,MOD_LURR_FDD_2)
+ SAP_INFO(LURR_SAP,MOD_URR_FDD_3,MOD_LURR_FDD_3)
+ SAP_INFO(LURR_SAP,MOD_URR_FDD_4,MOD_LURR_FDD_4)
+ SAP_INFO(LURR_SAP,MOD_URR_TDD,MOD_LURR_TDD)
+ SAP_INFO(LURR_SAP,MOD_URR_TDD_2,MOD_LURR_TDD_2)
+ SAP_INFO(LURR_SAP,MOD_URR_TDD_3,MOD_LURR_TDD_3)
+ SAP_INFO(LURR_SAP,MOD_URR_TDD_4,MOD_LURR_TDD_4)
+ SAP_INFO(CSR_DRLC_SAP,MOD_CSR_TDD,MOD_DRLC_TDD)
+ SAP_INFO(CSR_DRLC_SAP,MOD_CSR_FDD,MOD_DRLC_FDD)
+ SAP_INFO(CSR_DRLC_SAP,MOD_CSR_FDD_2,MOD_DRLC_FDD_2)
+ SAP_INFO(CSR_DRLC_SAP,MOD_CSR_FDD_3,MOD_DRLC_FDD_3)
+ SAP_INFO(CSR_DRLC_SAP,MOD_CSR_FDD_4,MOD_DRLC_FDD_4)
+ SAP_INFO(BMC_DRLC_SAP,MOD_BMC_FDD,MOD_DRLC_FDD)
+ SAP_INFO(BMC_DRLC_SAP,MOD_BMC_FDD_2,MOD_DRLC_FDD_2)
+ SAP_INFO(BMC_DRLC_SAP,MOD_BMC_FDD_3,MOD_DRLC_FDD_3)
+ SAP_INFO(BMC_DRLC_SAP,MOD_BMC_FDD_4,MOD_DRLC_FDD_4)
+ SAP_INFO(BMC_DRLC_SAP,MOD_BMC_TDD,MOD_DRLC_TDD)
+ SAP_INFO(BMC_DRLC_SAP,MOD_BMC_TDD_2,MOD_DRLC_TDD_2)
+ SAP_INFO(BMC_URLC_SAP,MOD_BMC_FDD,MOD_URLC_FDD)
+ SAP_INFO(BMC_URLC_SAP,MOD_BMC_FDD_2,MOD_URLC_FDD_2)
+ SAP_INFO(BMC_URLC_SAP,MOD_BMC_FDD_3,MOD_URLC_FDD_3)
+ SAP_INFO(BMC_URLC_SAP,MOD_BMC_FDD_4,MOD_URLC_FDD_4)
+ SAP_INFO(PDCP_DRLC_SAP,MOD_PDCP_TDD,MOD_DRLC_TDD)
+ SAP_INFO(PDCP_DRLC_SAP,MOD_PDCP_FDD,MOD_DRLC_FDD)
+ SAP_INFO(PDCP_DRLC_SAP,MOD_PDCP_FDD_2,MOD_DRLC_FDD_2)
+ SAP_INFO(PDCP_DRLC_SAP,MOD_PDCP_FDD_3,MOD_DRLC_FDD_3)
+ SAP_INFO(PDCP_DRLC_SAP,MOD_PDCP_FDD_4,MOD_DRLC_FDD_4)
+ SAP_INFO(PDCP_URLC_SAP,MOD_PDCP_TDD,MOD_URLC_TDD)
+ SAP_INFO(PDCP_URLC_SAP,MOD_PDCP_FDD,MOD_URLC_FDD)
+ SAP_INFO(PDCP_URLC_SAP,MOD_PDCP_FDD_2,MOD_URLC_FDD_2)
+ SAP_INFO(PDCP_URLC_SAP,MOD_PDCP_FDD_3,MOD_URLC_FDD_3)
+ SAP_INFO(PDCP_URLC_SAP,MOD_PDCP_FDD_4,MOD_URLC_FDD_4)
+ SAP_INFO(RRCE_DRLC_SAP,MOD_RRCE_FDD,MOD_DRLC_FDD)
+ SAP_INFO(RRCE_DRLC_SAP,MOD_RRCE_FDD_2,MOD_DRLC_FDD_2)
+ SAP_INFO(RRCE_DRLC_SAP,MOD_RRCE_FDD_3,MOD_DRLC_FDD_3)
+ SAP_INFO(RRCE_DRLC_SAP,MOD_RRCE_FDD_4,MOD_DRLC_FDD_4)
+ SAP_INFO(RRCE_DRLC_SAP,MOD_RRCE_TDD,MOD_DRLC_TDD)
+ SAP_INFO(RRCE_DRLC_SAP,MOD_RRCE_TDD_2,MOD_DRLC_TDD_2)
+ SAP_INFO(MEME_DRLC_SAP,MOD_MEME_FDD,MOD_DRLC_FDD)
+ SAP_INFO(MEME_DRLC_SAP,MOD_MEME_TDD,MOD_DRLC_TDD)
+ SAP_INFO(MEME_DRLC_SAP,MOD_MEME_FDD_2,MOD_DRLC_FDD_2)
+ SAP_INFO(MEME_DRLC_SAP,MOD_MEME_FDD_3,MOD_DRLC_FDD_3)
+ SAP_INFO(MEME_DRLC_SAP,MOD_MEME_FDD_4,MOD_DRLC_FDD_4)
+ SAP_INFO(MEME_DRLC_SAP,MOD_MEME_TDD,MOD_DRLC_TDD)
+ SAP_INFO(MEME_DRLC_SAP,MOD_MEME_TDD,MOD_DRLC_TDD)
+ SAP_INFO(MEME_DRLC_SAP,MOD_MEME_TDD_2,MOD_DRLC_TDD_2)
+ SAP_INFO(MEME_DRLC_SAP,MOD_MEME_TDD_3,MOD_DRLC_TDD_3)
+ SAP_INFO(MEME_DRLC_SAP,MOD_MEME_TDD_4,MOD_DRLC_TDD_4)
+ SAP_INFO(ADR_DRLC_SAP,MOD_ADR_FDD,MOD_DRLC_FDD)
+ SAP_INFO(ADR_DRLC_SAP,MOD_ADR_FDD_2,MOD_DRLC_FDD_2)
+ SAP_INFO(ADR_DRLC_SAP,MOD_ADR_TDD,MOD_DRLC_TDD)
+ SAP_INFO(ADR_DRLC_SAP,MOD_ADR_TDD_2,MOD_DRLC_TDD_2)
+ SAP_INFO(DRLC_URLC_SAP,MOD_DRLC_FDD,MOD_URLC_FDD)
+ SAP_INFO(DRLC_URLC_SAP,MOD_DRLC_FDD_2,MOD_URLC_FDD_2)
+ SAP_INFO(DRLC_URLC_SAP,MOD_DRLC_TDD,MOD_URLC_TDD)
+ SAP_INFO(DRLC_URLC_SAP,MOD_DRLC_TDD_2,MOD_URLC_TDD_2)
+ SAP_INFO(SLCE_PDCP_SAP,MOD_SLCE_TDD,MOD_PDCP_TDD)
+ SAP_INFO(SLCE_PDCP_SAP,MOD_SLCE_FDD,MOD_PDCP_FDD)
+ SAP_INFO(SLCE_PDCP_SAP,MOD_SLCE_FDD_2,MOD_PDCP_FDD_2)
+ SAP_INFO(SLCE_PDCP_SAP,MOD_SLCE_FDD_3,MOD_PDCP_FDD_3)
+ SAP_INFO(SLCE_PDCP_SAP,MOD_SLCE_FDD_4,MOD_PDCP_FDD_4)
+ SAP_INFO(RRCE_PDCP_SAP,MOD_RRCE_TDD,MOD_PDCP_TDD)
+ SAP_INFO(RRCE_PDCP_SAP,MOD_RRCE_FDD,MOD_PDCP_FDD)
+ SAP_INFO(RRCE_PDCP_SAP,MOD_RRCE_FDD_2,MOD_PDCP_FDD_2)
+ SAP_INFO(RRCE_PDCP_SAP,MOD_RRCE_FDD_3,MOD_PDCP_FDD_3)
+ SAP_INFO(RRCE_PDCP_SAP,MOD_RRCE_FDD_4,MOD_PDCP_FDD_4)
+ SAP_INFO(PDCP_RABM_SAP,MOD_PDCP_TDD,MOD_RABM_TDD)
+ SAP_INFO(PDCP_RABM_SAP,MOD_PDCP_FDD,MOD_RABM_FDD)
+ SAP_INFO(PDCP_RABM_SAP,MOD_PDCP_FDD_2,MOD_RABM_FDD_2)
+ SAP_INFO(PDCP_RABM_SAP,MOD_PDCP_FDD_3,MOD_RABM_FDD_3)
+ SAP_INFO(PDCP_RABM_SAP,MOD_PDCP_FDD_4,MOD_RABM_FDD_4)
+ SAP_INFO(SLCE_BMC_SAP,MOD_SLCE_FDD,MOD_BMC_FDD)
+ SAP_INFO(SLCE_BMC_SAP,MOD_SLCE_FDD_2,MOD_BMC_FDD_2)
+ SAP_INFO(SLCE_BMC_SAP,MOD_SLCE_FDD_3,MOD_BMC_FDD_3)
+ SAP_INFO(SLCE_BMC_SAP,MOD_SLCE_FDD_4,MOD_BMC_FDD_4)
+ SAP_INFO(SLCE_BMC_SAP,MOD_SLCE_TDD,MOD_BMC_TDD)
+ SAP_INFO(SLCE_BMC_SAP,MOD_SLCE_TDD_2,MOD_BMC_TDD_2)
+ SAP_INFO(RRCE_BMC_SAP,MOD_RRCE,MOD_BMC_FDD)
+ SAP_INFO(RRCE_BMC_SAP,MOD_RRCE_2,MOD_BMC_FDD_2)
+ SAP_INFO(RRCE_BMC_SAP,MOD_RRCE_TDD,MOD_BMC_TDD)
+ SAP_INFO(RRCE_BMC_SAP,MOD_RRCE_TDD_2,MOD_BMC_TDD_2)
+ SAP_INFO(SLCE_RABM_SAP,MOD_SLCE_TDD,MOD_RABM_TDD)
+ SAP_INFO(SLCE_RABM_SAP,MOD_SLCE_FDD,MOD_RABM_FDD)
+ SAP_INFO(SLCE_RABM_SAP,MOD_SLCE_FDD_2,MOD_RABM_FDD_2)
+ SAP_INFO(SLCE_RABM_SAP,MOD_SLCE_FDD_3,MOD_RABM_FDD_3)
+ SAP_INFO(SLCE_RABM_SAP,MOD_SLCE_FDD_4,MOD_RABM_FDD_4)
+ SAP_INFO(SLCE_CSR_SAP,MOD_SLCE_TDD,MOD_CSR_TDD)
+ SAP_INFO(SLCE_CSR_SAP,MOD_SLCE_FDD,MOD_CSR_FDD)
+ SAP_INFO(SLCE_CSR_SAP,MOD_SLCE_FDD_2,MOD_CSR_FDD_2)
+ SAP_INFO(SLCE_CSR_SAP,MOD_SLCE_FDD_3,MOD_CSR_FDD_3)
+ SAP_INFO(SLCE_CSR_SAP,MOD_SLCE_FDD_4,MOD_CSR_FDD_4)
+ SAP_INFO(SLCE_UMAC_SAP,MOD_SLCE,MOD_UMAC_FDD)
+ SAP_INFO(SLCE_UMAC_SAP,MOD_SLCE_2,MOD_UMAC_FDD_2)
+ SAP_INFO(SLCE_UMAC_SAP,MOD_SLCE_TDD,MOD_UMAC_TDD)
+ SAP_INFO(SLCE_UMAC_SAP,MOD_SLCE_TDD_2,MOD_UMAC_TDD_2)
+ SAP_INFO(RRCE_UMAC_SAP,MOD_RRCE,MOD_UMAC_FDD)
+ SAP_INFO(RRCE_UMAC_SAP,MOD_RRCE_TDD,MOD_UMAC_TDD)
+ SAP_INFO(RRCE_UMAC_SAP,MOD_RRCE_2,MOD_UMAC_FDD_2)
+ SAP_INFO(RRCE_UMAC_SAP,MOD_RRCE_TDD_2,MOD_UMAC_TDD_2)
+ SAP_INFO(MEME_UMAC_SAP,MOD_MEME_FDD,MOD_UMAC_FDD)
+ SAP_INFO(MEME_UMAC_SAP,MOD_MEME_TDD,MOD_UMAC_TDD)
+ SAP_INFO(MEME_UMAC_SAP,MOD_MEME_FDD_2,MOD_UMAC_FDD_2)
+ SAP_INFO(MEME_UMAC_SAP,MOD_MEME_FDD_3,MOD_UMAC_FDD_3)
+ SAP_INFO(MEME_UMAC_SAP,MOD_MEME_FDD_4,MOD_UMAC_FDD_4)
+ SAP_INFO(URLC_UMAC_SAP,MOD_URLC_FDD,MOD_UMAC_FDD)
+ SAP_INFO(URLC_UMAC_SAP,MOD_URLC_TDD,MOD_UMAC_TDD)
+ SAP_INFO(URLC_UMAC_SAP,MOD_URLC_FDD_2,MOD_UMAC_FDD_2)
+ SAP_INFO(URLC_UMAC_SAP,MOD_URLC_FDD_3,MOD_UMAC_FDD_3)
+ SAP_INFO(URLC_UMAC_SAP,MOD_URLC_FDD_4,MOD_UMAC_FDD_4)
+ SAP_INFO(URLC_UMAC_SAP,MOD_URLC_TDD_2,MOD_UMAC_TDD_2)
+ SAP_INFO(URLC_URLC_SAP,MOD_URLC_FDD,MOD_URLC_FDD)
+ SAP_INFO(URLC_URLC_SAP,MOD_URLC_FDD_2,MOD_URLC_FDD_2)
+ SAP_INFO(URLC_URLC_SAP,MOD_URLC_FDD_3,MOD_URLC_FDD_3)
+ SAP_INFO(URLC_URLC_SAP,MOD_URLC_FDD_4,MOD_URLC_FDD_4)
+ SAP_INFO(URLC_URLC_SAP,MOD_URLC_TDD,MOD_URLC_TDD)
+ SAP_INFO(URLC_URLC_SAP,MOD_URLC_TDD_2,MOD_URLC_TDD_2)
+ SAP_INFO(CSR_UMAC_SAP,MOD_CSR_TDD,MOD_UMAC_TDD)
+ SAP_INFO(CSR_UMAC_SAP,MOD_CSR_FDD,MOD_UMAC_FDD)
+ SAP_INFO(CSR_UMAC_SAP,MOD_CSR_FDD_2,MOD_UMAC_FDD_2)
+ SAP_INFO(CSR_UMAC_SAP,MOD_CSR_FDD_3,MOD_UMAC_FDD_3)
+ SAP_INFO(CSR_UMAC_SAP,MOD_CSR_FDD_4,MOD_UMAC_FDD_4)
+ SAP_INFO(RRCE_CSCE_SAP,MOD_RRCE,MOD_CSCE)
+ SAP_INFO(RRCE_CSCE_SAP,MOD_RRCE_2,MOD_CSCE_2)
+ SAP_INFO(RRCE_CSCE_SAP,MOD_RRCE_TDD,MOD_CSCE_TDD)
+ SAP_INFO(RRCE_CSCE_SAP,MOD_RRCE_TDD_2,MOD_CSCE_TDD_2)
+ SAP_INFO(RRCE_MEME_SAP,MOD_RRCE_TDD,MOD_MEME_TDD)
+ SAP_INFO(RRCE_RRCE_SAP,MOD_RRCE,MOD_RRCE)
+ SAP_INFO(RRCE_RRCE_SAP,MOD_RRCE_2,MOD_RRCE_2)
+ SAP_INFO(RRCE_RRCE_SAP,MOD_RRCE_TDD,MOD_RRCE_TDD)
+ SAP_INFO(RRCE_RRCE_SAP,MOD_RRCE_TDD_2,MOD_RRCE_TDD_2)
+ SAP_INFO(RRCE_LRRCE_SAP,MOD_RRCE_TDD,MOD_LRRCE_TDD)
+ SAP_INFO(LRRCE_LURLC_SAP,MOD_LRRCE_TDD,MOD_LURLC_TDD)
+ SAP_INFO(CSCE_MEME_SAP,MOD_CSCE_FDD,MOD_MEME_FDD)
+ SAP_INFO(CSCE_MEME_SAP,MOD_CSCE_TDD,MOD_MEME_TDD)
+ SAP_INFO(CSCE_MEME_SAP,MOD_CSCE_FDD_2,MOD_MEME_FDD_2)
+ SAP_INFO(CSCE_MEME_SAP,MOD_CSCE_FDD_3,MOD_MEME_FDD_3)
+ SAP_INFO(CSCE_MEME_SAP,MOD_CSCE_FDD_4,MOD_MEME_FDD_4)
+ SAP_INFO(CSCE_LCSCE_SAP,MOD_CSCE,MOD_LCSCE)
+ SAP_INFO(CSCE_LCSCE_SAP,MOD_CSCE_FDD,MOD_LCSCE_FDD)
+ SAP_INFO(CSCE_LCSCE_SAP,MOD_CSCE_TDD,MOD_LCSCE_TDD)
+ SAP_INFO(CSCE_LCSCE_SAP,MOD_CSCE_2,MOD_LCSCE_2)
+ SAP_INFO(CSCE_LCSCE_SAP,MOD_CSCE_FDD_2,MOD_LCSCE_FDD_2)
+ SAP_INFO(LCSCE_UL1_SAP,MOD_LCSCE,MOD_UL1)
+ SAP_INFO(LCSCE_UL1_SAP,MOD_LCSCE_2,MOD_UL1_2)
+ SAP_INFO(LCSCE_LMEME_SAP,MOD_LCSCE_FDD,MOD_LMEME_FDD)
+ SAP_INFO(LCSCE_LMEME_SAP,MOD_LCSCE_TDD,MOD_LMEME_TDD)
+ SAP_INFO(LCSCE_LMEME_SAP,MOD_LCSCE_FDD_2,MOD_LMEME_FDD_2)
+ SAP_INFO(LCSCE_MEME_SAP,MOD_LCSCE_FDD,MOD_MEME_FDD)
+ SAP_INFO(LCSCE_MEME_SAP,MOD_LCSCE_TDD,MOD_MEME_TDD)
+ SAP_INFO(LCSCE_MEME_SAP,MOD_LCSCE_FDD_2,MOD_MEME_FDD_2)
+ SAP_INFO(LCSCE_MEME_SAP,MOD_LCSCE_FDD_3,MOD_MEME_FDD_3)
+ SAP_INFO(LCSCE_MEME_SAP,MOD_LCSCE_FDD_4,MOD_MEME_FDD_4)
+ SAP_INFO(MEME_LMEME_SAP,MOD_MEME_FDD,MOD_LMEME_FDD)
+ SAP_INFO(MEME_LMEME_SAP,MOD_MEME_TDD,MOD_LMEME_TDD)
+ SAP_INFO(MEME_LMEME_SAP,MOD_MEME_FDD_2,MOD_LMEME_FDD_2)
+ SAP_INFO(MEME_LMEME_SAP,MOD_MEME_FDD_3,MOD_LMEME_FDD_3)
+ SAP_INFO(MEME_LMEME_SAP,MOD_MEME_FDD_4,MOD_LMEME_FDD_4)
+ SAP_INFO(MEME_LMEME_SAP,MOD_MEME_FDD,MOD_URR_FDD)
+ SAP_INFO(MEME_LMEME_SAP,MOD_MEME_TDD,MOD_URR_TDD)
+ SAP_INFO(MEME_LMEME_SAP,MOD_MEME_FDD_2,MOD_URR_FDD_2)
+ SAP_INFO(MEME_LMEME_SAP,MOD_MEME_FDD_3,MOD_URR_FDD_3)
+ SAP_INFO(MEME_LMEME_SAP,MOD_MEME_FDD_4,MOD_URR_FDD_4)
+ SAP_INFO(CSE_MEME_SAP,MOD_CSE_FDD,MOD_MEME_FDD)
+ SAP_INFO(CSE_MEME_SAP,MOD_CSE_TDD,MOD_MEME_TDD)
+ SAP_INFO(CSE_MEME_SAP,MOD_CSE_FDD_2,MOD_MEME_FDD_2)
+ SAP_INFO(CSE_MEME_SAP,MOD_CSE_FDD_3,MOD_MEME_FDD_3)
+ SAP_INFO(CSE_MEME_SAP,MOD_CSE_FDD_4,MOD_MEME_FDD_4)
+ SAP_INFO(CSCE_SLCE_SAP,MOD_CSCE,MOD_SLCE)
+ SAP_INFO(CSCE_SLCE_SAP,MOD_CSCE_2,MOD_SLCE_2)
+ SAP_INFO(CSCE_SLCE_SAP,MOD_CSCE_TDD,MOD_SLCE_TDD)
+ SAP_INFO(CSCE_SLCE_SAP,MOD_CSCE_TDD_2,MOD_SLCE_TDD_2)
+ SAP_INFO(RRCE_SLCE_SAP,MOD_RRCE,MOD_SLCE)
+ SAP_INFO(RRCE_SLCE_SAP,MOD_RRCE_2,MOD_SLCE_2)
+ SAP_INFO(RRCE_SLCE_SAP,MOD_RRCE_TDD,MOD_SLCE_TDD)
+ SAP_INFO(RRCE_SLCE_SAP,MOD_RRCE_TDD_2,MOD_SLCE_TDD_2)
+ SAP_INFO(SIBE_SLCE_SAP,MOD_SIBE,MOD_SLCE)
+ SAP_INFO(SIBE_SLCE_SAP,MOD_SIBE_2,MOD_SLCE_2)
+ SAP_INFO(SIBE_SLCE_SAP,MOD_SIBE_TDD,MOD_SLCE_TDD)
+ SAP_INFO(SIBE_SLCE_SAP,MOD_SIBE_2,MOD_SLCE_TDD_2)
+ SAP_INFO(MEME_SLCE_SAP,MOD_MEME_TDD,MOD_SLCE_TDD)
+ SAP_INFO(CSE_SLCE_SAP,MOD_CSE,MOD_SLCE)
+ SAP_INFO(CSE_SLCE_SAP,MOD_CSE_2,MOD_SLCE_2)
+ SAP_INFO(CSE_SLCE_SAP,MOD_CSE_TDD,MOD_SLCE_TDD)
+ SAP_INFO(CSE_SLCE_SAP,MOD_CSE_TDD_2,MOD_SLCE_TDD_2)
+ SAP_INFO(SLCE_SLCE_SAP,MOD_SLCE,MOD_SLCE)
+ SAP_INFO(SLCE_SLCE_SAP,MOD_SLCE_2,MOD_SLCE_2)
+ SAP_INFO(SLCE_SLCE_SAP,MOD_SLCE_TDD,MOD_SLCE_TDD)
+ SAP_INFO(SLCE_SLCE_SAP,MOD_SLCE_TDD_2,MOD_SLCE_TDD_2)
+ SAP_INFO(CSCE_CSE_SAP,MOD_CSCE,MOD_CSE)
+ SAP_INFO(CSCE_CSE_SAP,MOD_CSCE_FDD,MOD_CSE_FDD)
+ SAP_INFO(CSCE_CSE_SAP,MOD_CSCE_TDD,MOD_CSE_TDD)
+ SAP_INFO(CSCE_CSE_SAP,MOD_CSCE_2,MOD_CSE_2)
+ SAP_INFO(CSCE_CSE_SAP,MOD_CSCE_FDD_2,MOD_CSE_FDD_2)
+ SAP_INFO(CSCE_SIBE_SAP,MOD_CSCE,MOD_SIBE)
+ SAP_INFO(CSCE_SIBE_SAP,MOD_CSCE_TDD,MOD_SIBE_TDD)
+ SAP_INFO(CSCE_SIBE_SAP,MOD_CSCE_2,MOD_SIBE_2)
+ SAP_INFO(CSCE_SIBE_SAP,MOD_CSCE_FDD,MOD_SIBE_FDD)
+ SAP_INFO(CSCE_SIBE_SAP,MOD_CSCE_FDD2,MOD_SIBE_FDD_2)
+ SAP_INFO(CSCE_USIME_SAP,MOD_CSCE_FDD,MOD_USIME_FDD)
+ SAP_INFO(CSCE_USIME_SAP,MOD_CSCE_FDD_2,MOD_USIME_FDD_2)
+ SAP_INFO(CSCE_USIME_SAP,MOD_CSCE_FDD_3,MOD_USIME_FDD_3)
+ SAP_INFO(CSCE_USIME_SAP,MOD_CSCE_FDD_4,MOD_USIME_FDD_4)
+ SAP_INFO(CSCE_USIME_SAP,MOD_CSCE_TDD,MOD_USIME_TDD)
+ SAP_INFO(CSE_SIBE_SAP,MOD_CSE,MOD_SIBE)
+ SAP_INFO(CSE_SIBE_SAP,MOD_CSE_TDD,MOD_SIBE_TDD)
+ SAP_INFO(CSE_SIBE_SAP,MOD_CSE_2,MOD_SIBE_2)
+ SAP_INFO(RRCE_SIBE_SAP,MOD_RRCE,MOD_SIBE)
+ SAP_INFO(RRCE_SIBE_SAP,MOD_RRCE_2,MOD_SIBE_2)
+ SAP_INFO(RRCE_SIBE_SAP,MOD_RRCE_TDD,MOD_SIBE_TDD)
+ SAP_INFO(RRCE_SIBE_SAP,MOD_RRCE_TDD_2,MOD_SIBE_TDD_2)
+ SAP_INFO(MEME_SIBE_SAP,MOD_MEME_FDD,MOD_SIBE_FDD)
+ SAP_INFO(MEME_SIBE_SAP,MOD_MEME_TDD,MOD_SIBE_TDD)
+ SAP_INFO(MEME_SIBE_SAP,MOD_MEME_FDD_2,MOD_SIBE_FDD_2)
+ SAP_INFO(MEME_SIBE_SAP,MOD_MEME_FDD_3,MOD_SIBE_FDD_3)
+ SAP_INFO(MEME_SIBE_SAP,MOD_MEME_FDD_4,MOD_SIBE_FDD_4)
+ SAP_INFO(RRCE_USIME_SAP,MOD_RRCE_TDD,MOD_USIME_TDD)
+ SAP_INFO(RRCE_USIME_SAP,MOD_RRCE_TDD_2,MOD_USIME_TDD_2)
+ SAP_INFO(SLCE_UL1_SAP,MOD_SLCE,MOD_UL1)
+ SAP_INFO(SLCE_UL1_SAP,MOD_SLCE_2,MOD_UL1_2)
+ SAP_INFO(SLCE_UL1_SAP,MOD_SLCE_TDD,MOD_UL1)
+ SAP_INFO(SLCE_UL1_SAP,MOD_SLCE_TDD_2,MOD_UL1_2)
+ SAP_INFO(MEME_UL1_SAP,MOD_MEME_FDD,MOD_UL1)
+ SAP_INFO(MEME_UL1_SAP,MOD_MEME_FDD_2,MOD_UL1_2)
+ SAP_INFO(MEME_UL1_SAP,MOD_MEME_FDD_3,MOD_UL1_3)
+ SAP_INFO(MEME_UL1_SAP,MOD_MEME_FDD_4,MOD_UL1_4)
+ SAP_INFO(RRCE_UL1_SAP,MOD_RRCE,MOD_UL1)
+ SAP_INFO(RRCE_UL1_SAP,MOD_RRCE_2,MOD_UL1_2)
+ SAP_INFO(CSE_UL1_SAP,MOD_CSE,MOD_UL1)
+ SAP_INFO(CSE_UL1_SAP,MOD_CSE_2,MOD_UL1_2)
+ SAP_INFO(UMAC_UL1_SAP,MOD_UMAC_FDD,MOD_UL1)
+ SAP_INFO(UMAC_UL1_SAP,MOD_UMAC_FDD_2,MOD_UL1_2)
+ SAP_INFO(UMAC_UL1_SAP,MOD_UMAC_FDD_3,MOD_UL1_3)
+ SAP_INFO(UMAC_UL1_SAP,MOD_UMAC_FDD_4,MOD_UL1_4)
+ SAP_INFO(MM_RATCM_SAP,MOD_MM,MOD_RATCM)
+ SAP_INFO(SM_RATCM_SAP,MOD_SM,MOD_RATCM)
+ SAP_INFO(SMSAL_RATCM_SAP,MOD_SMSAL,MOD_RATCM)
+ SAP_INFO(RATCM_LLC_SAP,MOD_RATCM,MOD_LLC)
+ SAP_INFO(RATCM_GAS_SAP,MOD_RATCM,MOD_GAS_FDD)
+ SAP_INFO(RATCM_GAS_SAP,MOD_RATCM,MOD_GAS_TDD)
+ SAP_INFO(RATCM_GAS_SAP,MOD_RATCM,MOD_RRM_FDD)
+ SAP_INFO(RATCM_GAS_SAP,MOD_RATCM,MOD_RRM_TDD)
+ SAP_INFO(RATCM_RLC_SAP,MOD_RATCM,MOD_RLC_FDD)
+ SAP_INFO(RATCM_RLC_SAP,MOD_RATCM,MOD_RLC_TDD)
+ SAP_INFO(GAS_CSCE_SAP,MOD_GAS_FDD,MOD_CSCE)
+ SAP_INFO(GAS_CSCE_SAP,MOD_GAS_FDD,MOD_CSCE_FDD)
+ SAP_INFO(GAS_CSCE_SAP,MOD_GAS_TDD,MOD_CSCE_TDD)
+ SAP_INFO(GAS_CSCE_SAP,MOD_GAS_FDD_2,MOD_CSCE_2)
+ SAP_INFO(GAS_CSCE_SAP,MOD_GAS_FDD_2,MOD_CSCE_FDD_2)
+ SAP_INFO(GAS_CSCE_SAP,MOD_GAS_TDD_2,MOD_CSCE_2)
+ SAP_INFO(GAS_CSCE_SAP,MOD_RRM_FDD,MOD_CSCE)
+ SAP_INFO(GAS_CSCE_SAP,MOD_RRM_FDD,MOD_CSCE_FDD)
+ SAP_INFO(GAS_CSCE_SAP,MOD_RRM_TDD,MOD_CSCE_TDD)
+ SAP_INFO(GAS_CSCE_SAP,MOD_RRM_FDD_2,MOD_CSCE_2)
+ SAP_INFO(GAS_CSCE_SAP,MOD_RRM_FDD_2,MOD_CSCE_FDD_2)
+ SAP_INFO(GAS_CSCE_SAP,MOD_RRM_TDD_2,MOD_CSCE_TDD_2)
+ SAP_INFO(GAS_MEME_SAP,MOD_GAS_FDD,MOD_MEME_FDD)
+ SAP_INFO(GAS_MEME_SAP,MOD_GAS_TDD,MOD_MEME_TDD)
+ SAP_INFO(GAS_MEME_SAP,MOD_GAS_FDD_2,MOD_MEME_FDD_2)
+ SAP_INFO(GAS_MEME_SAP,MOD_GAS_FDD_3,MOD_MEME_FDD_3)
+ SAP_INFO(GAS_MEME_SAP,MOD_GAS_FDD_4,MOD_MEME_FDD_4)
+ SAP_INFO(GAS_MEME_SAP,MOD_RRM_FDD,MOD_MEME_FDD)
+ SAP_INFO(GAS_MEME_SAP,MOD_RRM_TDD,MOD_MEME_TDD)
+ SAP_INFO(GAS_MEME_SAP,MOD_RRM_FDD_2,MOD_MEME_FDD_2)
+ SAP_INFO(GAS_MEME_SAP,MOD_RRM_FDD_3,MOD_MEME_FDD_3)
+ SAP_INFO(GAS_MEME_SAP,MOD_RRM_FDD_4,MOD_MEME_FDD_4)
+ SAP_INFO(GAS_RRCE_SAP,MOD_GAS_FDD,MOD_RRCE)
+ SAP_INFO(GAS_RRCE_SAP,MOD_GAS_FDD_2,MOD_RRCE_2)
+ SAP_INFO(GAS_RRCE_SAP,MOD_GAS_TDD,MOD_RRCE_TDD)
+ SAP_INFO(GAS_RRCE_SAP,MOD_GAS_TDD_2,MOD_RRCE_TDD_2)
+ SAP_INFO(GAS_RRCE_SAP,MOD_RRM_FDD,MOD_RRCE)
+ SAP_INFO(GAS_RRCE_SAP,MOD_RRM_TDD,MOD_RRCE_TDD)
+ SAP_INFO(SIP_APP_SAP,MOD_SIP,ANY)
+ SAP_INFO(UMAC_UMAC_SAP,MOD_UMAC_FDD,MOD_UMAC_FDD)
+ SAP_INFO(UMAC_UMAC_SAP,MOD_UMAC_TDD,MOD_UMAC_TDD)
+ SAP_INFO(UMAC_UMAC_SAP,MOD_UMAC_FDD_2,MOD_UMAC_FDD_2)
+ SAP_INFO(UMAC_UMAC_SAP,MOD_UMAC_FDD_3,MOD_UMAC_FDD_3)
+ SAP_INFO(UMAC_UMAC_SAP,MOD_UMAC_FDD_4,MOD_UMAC_FDD_4)
+ SAP_INFO(DRLC_UMAC_SAP,MOD_DRLC_FDD,MOD_UMAC_FDD)
+ SAP_INFO(DRLC_UMAC_SAP,MOD_DRLC_TDD,MOD_UMAC_TDD)
+ SAP_INFO(DRLC_UMAC_SAP,MOD_DRLC_FDD_2,MOD_UMAC_FDD_2)
+ SAP_INFO(DRLC_UMAC_SAP,MOD_DRLC_FDD_3,MOD_UMAC_FDD_3)
+ SAP_INFO(DRLC_UMAC_SAP,MOD_DRLC_FDD_4,MOD_UMAC_FDD_4)
+ SAP_INFO(DRLC_UMAC_SAP,MOD_DRLC_TDD_2,MOD_UMAC_TDD_2)
+ SAP_INFO(GMMREG_SAP,MOD_MM_2,MOD_RAC_2)
+ SAP_INFO(MM_SMS_SAP,MOD_MM_2,MOD_SMS_2)
+ SAP_INFO(MM_CC_SAP,MOD_MM_2,MOD_CC_2)
+ SAP_INFO(MM_SS_SAP,MOD_MM_2,MOD_CISS_2)
+ SAP_INFO(MM_AS_SAP,MOD_MM_2,MOD_AS_FDD_2)
+ SAP_INFO(MM_AS_SAP,MOD_MM_2,MOD_AS_TDD_2)
+ SAP_INFO(MM_AS_SAP,MOD_MM_2,MOD_RRM_FDD_2)
+ SAP_INFO(MM_AS_SAP,MOD_MM_2,MOD_RRM_TDD_2)
+ SAP_INFO(MM_SIM_SAP,MOD_MM_2,MOD_SIM_2)
+ SAP_INFO(GMM_SM_SAP,MOD_MM_2,MOD_SM_2)
+ SAP_INFO(MNCC_SAP,MOD_CC_2,MOD_CSM_2)
+ SAP_INFO(MNSMS_SAP,MOD_SMS_2,MOD_SMSAL_2)
+ SAP_INFO(MNSS_SAP,MOD_CISS_2,MOD_CSM_2)
+ SAP_INFO(CISS_CISS_SAP,MOD_CISS_2,MOD_CISS_2)
+ SAP_INFO(CSM_TDT_SAP,MOD_CSM_2,MOD_TDT_2)
+ SAP_INFO(CSM_L2R_SAP,MOD_CSM_2,MOD_L2R_2)
+ SAP_INFO(CSM_SIM_SAP,MOD_CSM_2,MOD_SIM_2)
+ SAP_INFO(CSM_L4C_SAP,MOD_CSM_2,MOD_L4C_2)
+ SAP_INFO(SMSAL_L4C_SAP,MOD_SMSAL_2,MOD_L4C_2)
+ SAP_INFO(UEM_L4C_SAP,MOD_UEM,MOD_L4C_2)
+ SAP_INFO(PHB_L4C_SAP,MOD_PHB_2,MOD_L4C_2)
+ SAP_INFO(SMU_L4C_SAP,MOD_SMU_2,MOD_L4C_2)
+ SAP_INFO(L4C_RAT_TCM_SAP,MOD_L4C_2,MOD_RAT_TCM_2)
+ SAP_INFO(L4C_RAT_TCM_SAP,MOD_RAT_TCM_2,MOD_L4C_2)
+ SAP_INFO(RAT_TCM_TCM_SAP,MOD_RAT_TCM_2,MOD_TCM_2)
+ SAP_INFO(RAT_TCM_TCM_SAP,MOD_TCM_2,MOD_RAT_TCM_2)
+ SAP_INFO(RAC_L4C_SAP,MOD_L4C_2,MOD_RAC_2)
+ SAP_INFO(UART_L4C_SAP,MOD_UART,MOD_L4C_2)
+ SAP_INFO(RRM_RMPC_SAP,MOD_RRM_FDD_2,MOD_RMC_2)
+ SAP_INFO(RRM_RMPC_SAP,MOD_RRM_TDD_2,MOD_RMC_2)
+ SAP_INFO(RRM_RMPC_SAP,MOD_RRM_FDD_2,MOD_RMPC_FDD_2)
+ SAP_INFO(RRM_RMPC_SAP,MOD_RRM_TDD_2,MOD_RMPC_TDD_2)
+ SAP_INFO(RRM_RMPC_SAP,MOD_RRM_FDD_2,MOD_AS_FDD_2)
+ SAP_INFO(RRM_RMPC_SAP,MOD_RRM_TDD_2,MOD_AS_TDD_2)
+ SAP_INFO(RMC_LAPDM_SAP,MOD_RMC_FDD_2,MOD_LAPDM_FDD_2)
+ SAP_INFO(RMC_LAPDM_SAP,MOD_RMC_TDD_2,MOD_LAPDM_TDD_2)
+ SAP_INFO(LAPDM_MPAL_SAP,MOD_LAPDM_FDD_2,MOD_MPAL_FDD_2)
+ SAP_INFO(LAPDM_MPAL_SAP,MOD_LAPDM_TDD_2,MOD_MPAL_TDD_2)
+ SAP_INFO(RLC_MAC_SAP,MOD_RLC_FDD_2,MOD_MAC_FDD_2)
+ SAP_INFO(RLC_MAC_SAP,MOD_RLC_TDD_2,MOD_MAC_TDD_2)
+ SAP_INFO(RLC_RMPC_SAP,MOD_RLC_FDD_2,MOD_RMPC_FDD_2)
+ SAP_INFO(RLC_RMPC_SAP,MOD_RLC_TDD_2,MOD_RMPC_TDD_2)
+ SAP_INFO(RLC_MPAL_SAP,MOD_RLC_FDD_2,MOD_MPAL_FDD_2)
+ SAP_INFO(RLC_MPAL_SAP,MOD_RLC_TDD_2,MOD_MPAL_TDD_2)
+ SAP_INFO(RLC_REASM_SAP,MOD_RLC_FDD_2,MOD_REASM_FDD_2)
+ SAP_INFO(RLC_REASM_SAP,MOD_RLC_TDD_2,MOD_REASM_TDD_2)
+ SAP_INFO(MAC_RMPC_SAP,MOD_MAC_FDD_2,MOD_RMPC_FDD_2)
+ SAP_INFO(MAC_RMPC_SAP,MOD_MAC_TDD_2,MOD_RMPC_TDD_2)
+ SAP_INFO(RRM_MPAL_SAP,MOD_RRM_FDD_2,MOD_MPAL_FDD_2)
+ SAP_INFO(RRM_MPAL_SAP,MOD_RRM_TDD_2,MOD_MPAL_TDD_2)
+ SAP_INFO(RMPC_MPAL_SAP,MOD_RMPC_FDD_2,MOD_MPAL_FDD_2)
+ SAP_INFO(RMPC_MPAL_SAP,MOD_RMPC_TDD_2,MOD_MPAL_TDD_2)
+ SAP_INFO(RMPC_MPAL_SAP,MOD_RMC_FDD_2,MOD_MPAL_FDD_2)
+ SAP_INFO(RMPC_MPAL_SAP,MOD_RMC_TDD_2,MOD_MPAL_TDD_2)
+ SAP_INFO(RMPC_MPAL_SAP,MOD_AS_FDD_2,MOD_MPAL_FDD_2)
+ SAP_INFO(RMPC_MPAL_SAP,MOD_AS_TDD_2,MOD_MPAL_TDD_2)
+ SAP_INFO(MAC_MPAL_SAP,MOD_MAC_FDD_2,MOD_MPAL_FDD_2)
+ SAP_INFO(MAC_MPAL_SAP,MOD_MAC_TDD_2,MOD_MPAL_TDD_2)
+ SAP_INFO(GISE_SAP,MOD_GISE_FDD_2,MOD_RRM_FDD_2)
+ SAP_INFO(GISE_SAP,MOD_GISE_FDD_2,MOD_MPAL_FDD_2)
+ SAP_INFO(GISE_SAP,MOD_MPAL_FDD_2,MOD_GISE_FDD_2)
+ SAP_INFO(GISE_SAP,MOD_GISE_TDD_2,MOD_RRM_TDD_2)
+ SAP_INFO(GISE_SAP,MOD_GISE_TDD_2,MOD_MPAL_TDD_2)
+ SAP_INFO(GISE_SAP,MOD_MPAL_TDD_2,MOD_GISE_TDD_2)
+ SAP_INFO(MMI_AS_SAP,MOD_RAC_2,MOD_AS_FDD_2)
+ SAP_INFO(MMI_AS_SAP,MOD_RAC_2,MOD_AS_TDD_2)
+ SAP_INFO(SMSAL_AS_SAP,MOD_SMS_2,MOD_AS_FDD_2)
+ SAP_INFO(SMSAL_AS_SAP,MOD_SMS_2,MOD_AS_TDD_2)
+ SAP_INFO(LLC_GMM_SAP,MOD_LLC_2,MOD_MM_2)
+ SAP_INFO(LLC_RLC_SAP,MOD_LLC_2,MOD_RLC_FDD_2)
+ SAP_INFO(LLC_RLC_SAP,MOD_LLC_2,MOD_RLC_TDD_2)
+ SAP_INFO(LLC_SNDCP_SAP,MOD_LLC_2,MOD_SNDCP_2)
+ SAP_INFO(LLC_SMS_SAP,MOD_LLC_2,MOD_SMS_2)
+ SAP_INFO(GMM_RLC_SAP,MOD_MM_2,MOD_RLC_FDD_2)
+ SAP_INFO(GMM_RLC_SAP,MOD_MM_2,MOD_RLC_TDD_2)
+ SAP_INFO(SNDCP_REG_SAP,MOD_SNDCP_2,MOD_TCM_2)
+ SAP_INFO(SM_SNDCP_SAP,MOD_SM_2,MOD_SNDCP_2)
+ SAP_INFO(SMREG_SAP,MOD_SM_2,MOD_PAM_2)
+ SAP_INFO(SMREG_SAP,MOD_PAM_2,MOD_SM_2)
+ SAP_INFO(SMREG_SAP,MOD_SM_3,MOD_PAM_3)
+ SAP_INFO(SMREG_SAP,MOD_PAM_3,MOD_SM_3)
+ SAP_INFO(SMREG_SAP,MOD_SM_4,MOD_PAM_4)
+ SAP_INFO(SMREG_SAP,MOD_PAM_4,MOD_SM_4)
+ SAP_INFO(TCM_PAM_SAP,MOD_TCM_2,MOD_PAM_2)
+ SAP_INFO(TCM_PAM_SAP,MOD_PAM_2,MOD_TCM_2)
+ SAP_INFO(TCM_PAM_SAP,MOD_TCM_3,MOD_PAM_3)
+ SAP_INFO(TCM_PAM_SAP,MOD_PAM_3,MOD_TCM_3)
+ SAP_INFO(TCM_PAM_SAP,MOD_TCM_4,MOD_PAM_4)
+ SAP_INFO(TCM_PAM_SAP,MOD_PAM_4,MOD_TCM_4)
+ SAP_INFO(PPP_L4C_SAP,MOD_PPP,MOD_L4C_2)
+ SAP_INFO(PPP_RAT_TCM_SAP,MOD_PPP,MOD_RAT_TCM_2)
+ SAP_INFO(PPP_RAT_TCM_SAP,MOD_RAT_TCM_2,MOD_PPP)
+ SAP_INFO(L2R_RLP_SAP,MOD_L2R_2,MOD_RLP_2)
+ SAP_INFO(RLP_RA_SAP,MOD_RLP_2,MOD_L1_2)
+ SAP_INFO(SNDCP_PPP_SAP,MOD_SNDCP_2,MOD_PPP)
+ SAP_INFO(DATA_MPAL_SAP,MOD_RLP_2,MOD_MPAL_FDD_2)
+ SAP_INFO(DATA_MPAL_SAP,MOD_RLP_2,MOD_MPAL_TDD_2)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM_2,MOD_SMU_2)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM_2,MOD_L4C_2)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM_2,MOD_AS_FDD_2)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM_2,MOD_AS_TDD_2)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM_2,MOD_RRM_FDD_2)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM_2,MOD_RRM_TDD_2)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM_2,MOD_MM_2)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM_2,MOD_NWSEL_2)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM_2,MOD_GMSS_2)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM_2,MOD_EVAL_2)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM_2,MOD_MEME_FDD_2)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM_2,MOD_SMSAL_2)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM_2,MOD_CSM_2)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM_2,MOD_BT_2)
+ SAP_INFO(PS_SIM_SAP,MOD_SIM_2,MOD_PHB_2)
+ SAP_INFO(SIM_SIM_SAP,MOD_SIM_2,MOD_SIM_2)
+ SAP_INFO(SIM_SIM_SAP,MOD_SIM_2,MOD_SIM)
+ SAP_INFO(MMI_L4C_SAP,MOD_MMI,MOD_L4C_2)
+ SAP_INFO(L4C_ABM_SAP,MOD_L4C_2,MOD_ABM)
+ SAP_INFO(TDT_PPP_SAP,MOD_TDT_2,MOD_PPP)
+ SAP_INFO(L2R_PPP_SAP,MOD_L2R_2,MOD_PPP)
+ SAP_INFO(TCM_TCPIP_SAP,MOD_TCM_2,MOD_TCPIP)
+ SAP_INFO(SMSAL_SOC_SAP,MOD_SMSAL_2,MOD_SOC)
+ SAP_INFO(MPAL_L1_SAP,MOD_MPAL_FDD_2,MOD_L1_2)
+ SAP_INFO(MPAL_L1_SAP,MOD_MPAL_TDD_2,MOD_L1_2)
+ SAP_INFO(MAC_L1_SAP,MOD_MAC_FDD_2,MOD_L1_2)
+ SAP_INFO(MAC_L1_SAP,MOD_MAC_TDD_2,MOD_L1_2)
+ SAP_INFO(RMC_LAPDM_SAP,MOD_AS_FDD_2,MOD_LAPDM_FDD_2)
+ SAP_INFO(RMC_LAPDM_SAP,MOD_AS_TDD_2,MOD_LAPDM_TDD_2)
+ SAP_INFO(MAC_RMPC_SAP,MOD_MAC_FDD_2,MOD_AS_FDD_2)
+ SAP_INFO(MAC_RMPC_SAP,MOD_MAC_TDD_2,MOD_AS_TDD_2)
+ SAP_INFO(RR_PRR_SAP,MOD_AS_FDD,MOD_AS_FDD_2)
+ SAP_INFO(RR_PRR_SAP,MOD_AS_TDD,MOD_AS_TDD_2)
+ SAP_INFO(J2ME_MMI_SAP,MOD_J2ME,MOD_MMI)
+ SAP_INFO(MMI_J2ME_SAP,MOD_MMI,MOD_J2ME)
+ SAP_INFO(RRM_LAPDM_SAP,MOD_RRM_FDD,MOD_LAPDM_FDD)
+ SAP_INFO(RRM_LAPDM_SAP,MOD_RRM_TDD,MOD_LAPDM_TDD)
+ SAP_INFO(GPS_SUPL_SAP,MOD_GPS,MOD_SUPL)
+ SAP_INFO(GPS_LCSP_SAP,MOD_RRLP,MOD_GPS)
+ SAP_INFO(RR_RRLP_SAP,MOD_AS_FDD,MOD_RRLP)
+ SAP_INFO(RR_RRLP_SAP,MOD_AS_TDD,MOD_RRLP)
+ SAP_INFO(RR_PRR_SAP,MOD_RRM_FDD,MOD_RRM_FDD_2)
+ SAP_INFO(RR_PRR_SAP,MOD_RRM_TDD,MOD_RRM_TDD_2)
+ SAP_INFO(ADR_UL1_SAP,MOD_ADR_FDD,MOD_UL1)
+ SAP_INFO(TCPIP_ABM_SAP,MOD_TCPIP,MOD_ABM)
+ SAP_INFO(ABM_APP_SAP,MOD_ABM,ANY)
+ SAP_INFO(MM_RATDM_SAP,MOD_MM,MOD_RATDM)
+ SAP_INFO(MM_RATDM_SAP,MOD_MM_2,MOD_RATDM_2)
+ SAP_INFO(MM_RATDM_SAP,MOD_MM_3,MOD_RATDM_3)
+ SAP_INFO(MM_RATDM_SAP,MOD_MM_4,MOD_RATDM_4)
+ SAP_INFO(SM_RATDM_SAP,MOD_SM,MOD_RATDM)
+ SAP_INFO(SM_RATDM_SAP,MOD_SM_2,MOD_RATDM_2)
+ SAP_INFO(SM_RATDM_SAP,MOD_SM_3,MOD_RATDM_3)
+ SAP_INFO(SM_RATDM_SAP,MOD_SM_4,MOD_RATDM_4)
+ SAP_INFO(TCM_RATDM_SAP,MOD_TCM,MOD_RATDM)
+ SAP_INFO(TCM_RATDM_SAP,MOD_TCM_2,MOD_RATDM_2)
+ SAP_INFO(TCM_RATDM_SAP,MOD_TCM_3,MOD_RATDM_3)
+ SAP_INFO(TCM_RATDM_SAP,MOD_TCM_4,MOD_RATDM_4)
+ SAP_INFO(RATCM_RATDM_SAP,MOD_RATCM,MOD_RATDM)
+ SAP_INFO(RATCM_RATDM_SAP,MOD_RATCM_2,MOD_RATDM_2)
+ SAP_INFO(RATCM_RATDM_SAP,MOD_RATCM_3,MOD_RATDM_3)
+ SAP_INFO(RATCM_RATDM_SAP,MOD_RATCM_4,MOD_RATDM_4)
+ SAP_INFO(RATDM_RATDM_SAP,MOD_RATDM,MOD_RATDM)
+ SAP_INFO(RATDM_RATDM_SAP,MOD_RATDM_2,MOD_RATDM_2)
+ SAP_INFO(RATDM_RATDM_SAP,MOD_RATDM_3,MOD_RATDM_3)
+ SAP_INFO(RATDM_RATDM_SAP,MOD_RATDM_4,MOD_RATDM_4)
+ SAP_INFO(RATDM_RABM_SAP,MOD_RATDM,MOD_RABM_TDD)
+ SAP_INFO(RATDM_RABM_SAP,MOD_RATDM,MOD_RABM_FDD)
+ SAP_INFO(RATDM_RABM_SAP,MOD_RATDM_2,MOD_RABM_FDD_2)
+ SAP_INFO(RATDM_RABM_SAP,MOD_RATDM_3,MOD_RABM_FDD_3)
+ SAP_INFO(RATDM_RABM_SAP,MOD_RATDM_4,MOD_RABM_FDD_4)
+ SAP_INFO(RATDM_SNDCP_SAP,MOD_RATDM,MOD_SNDCP)
+ SAP_INFO(RATDM_SNDCP_SAP,MOD_RATDM_2,MOD_SNDCP_2)
+ SAP_INFO(RATDM_SNDCP_SAP,MOD_RATDM_3,MOD_SNDCP_3)
+ SAP_INFO(RATDM_SNDCP_SAP,MOD_RATDM_4,MOD_SNDCP_4)
+ SAP_INFO(RATDM_URLC_SAP,MOD_RATDM,MOD_URLC_TDD)
+ SAP_INFO(RATDM_URLC_SAP,MOD_RATDM,MOD_URLC_FDD)
+ SAP_INFO(RATDM_URLC_SAP,MOD_RATDM_2,MOD_URLC_FDD_2)
+ SAP_INFO(RATDM_URLC_SAP,MOD_RATDM_3,MOD_URLC_FDD_3)
+ SAP_INFO(RATDM_URLC_SAP,MOD_RATDM_4,MOD_URLC_FDD_4)
+ SAP_INFO(CVAL_RATDM_SAP,MOD_CVAL,MOD_RATDM)
+ SAP_INFO(CVAL_RATDM_SAP,MOD_CVAL,MOD_RATDM_2)
+ SAP_INFO(CVAL_RATDM_SAP,MOD_CVAL,MOD_RATDM_3)
+ SAP_INFO(CVAL_RATDM_SAP,MOD_CVAL,MOD_RATDM_4)
+ SAP_INFO(RATDM_CHLP_SAP,MOD_RATDM,MOD_CHLP)
+ SAP_INFO(RATDM_CHLP_SAP,MOD_RATDM_2,MOD_CHLP)
+ SAP_INFO(RATDM_CHLP_SAP,MOD_RATDM_3,MOD_CHLP)
+ SAP_INFO(RATDM_CHLP_SAP,MOD_RATDM_4,MOD_CHLP)
+ SAP_INFO(UMAC_SEQ_SAP,MOD_UMAC_FDD,MOD_SEQ_FDD)
+ SAP_INFO(UMAC_SEQ_SAP,MOD_UMAC_FDD_2,MOD_SEQ_FDD)
+ SAP_INFO(UMAC_SEQ_SAP,MOD_UMAC_FDD_3,MOD_SEQ_FDD)
+ SAP_INFO(UMAC_SEQ_SAP,MOD_UMAC_FDD_4,MOD_SEQ_FDD)
+ SAP_INFO(URLC_SEQ_SAP,MOD_URLC_FDD,MOD_SEQ_FDD)
+ SAP_INFO(URLC_SEQ_SAP,MOD_URLC_FDD_2,MOD_SEQ_FDD)
+ SAP_INFO(URLC_SEQ_SAP,MOD_URLC_FDD_3,MOD_SEQ_FDD)
+ SAP_INFO(URLC_SEQ_SAP,MOD_URLC_FDD_4,MOD_SEQ_FDD)
+ SAP_INFO(URLC_SEQ_SAP,MOD_URLC_TDD,MOD_SEQ_TDD)
+ SAP_INFO(URLC_SEQ_SAP,MOD_URLC_TDD_2,MOD_SEQ_TDD)
+ SAP_INFO(SEQ_SEQ_SAP,MOD_SEQ_FDD,MOD_SEQ_FDD)
+ SAP_INFO(TL1_MAL1_SAP,MOD_MAL1,MOD_TL1)
+ SAP_INFO(SLCE_TL1_SAP,MOD_SLCE,MOD_TL1)
+ SAP_INFO(SLCE_TL1_SAP,MOD_SLCE_TDD,MOD_TL1)
+ SAP_INFO(MEME_TL1_SAP,MOD_MEME_TDD,MOD_TL1)
+ SAP_INFO(RRCE_TL1_SAP,MOD_RRCE_TDD,MOD_TL1)
+ SAP_INFO(CSE_TL1_SAP,MOD_CSE,MOD_TL1)
+ SAP_INFO(CSE_TL1_SAP,MOD_CSE_TDD,MOD_TL1)
+ SAP_INFO(UMAC_TL1_SAP,MOD_UMAC_TDD,MOD_TL1)
+ SAP_INFO(ADR_TL1_SAP,MOD_ADR_TDD,MOD_TL1)
+ SAP_INFO(URLC_UL2ACCRXHISR_SAP,MOD_URLC_FDD,MOD_UL2ACCRXHISR)
+ SAP_INFO(URLC_UL2ACCRXHISR_SAP,MOD_URLC_FDD_2,MOD_UL2ACCRXHISR)
+ SAP_INFO(URLC_UL2ACCRXHISR_SAP,MOD_URLC_FDD_3,MOD_UL2ACCRXHISR)
+ SAP_INFO(URLC_UL2ACCRXHISR_SAP,MOD_URLC_FDD_4,MOD_UL2ACCRXHISR)
+ SAP_INFO(L1ADT_TL1_SAP,MOD_L1ADT,MOD_TL1)
+ SAP_INFO(L1ADT_UL1_SAP,MOD_L1ADT,MOD_UL1)
+ SAP_INFO(L1ADT_EL1_SAP,MOD_L1ADT,MOD_EL1)
+ SAP_INFO(L1ADT_L4C_SAP,MOD_L1ADT,MOD_L4C)
+ SAP_INFO(UMAC_UL2ACCRXHISR_SAP,MOD_UMAC_FDD,MOD_UL2ACCRXHISR)
+ SAP_INFO(UMAC_UL2ACCRXHISR_SAP,MOD_UMAC_FDD_2,MOD_UL2ACCRXHISR)
+ SAP_INFO(UMAC_UL2ACCRXHISR_SAP,MOD_UMAC_FDD_3,MOD_UL2ACCRXHISR)
+ SAP_INFO(UMAC_UL2ACCRXHISR_SAP,MOD_UMAC_FDD_4,MOD_UL2ACCRXHISR)
+ SAP_INFO(SLCE_UL2SEQ_SAP,MOD_SLCE_FDD,MOD_SEQ_FDD)
+ SAP_INFO(SLCE_UL2SEQ_SAP,MOD_SLCE_FDD_2,MOD_SEQ_FDD)
+ SAP_INFO(SLCE_UL2SEQ_SAP,MOD_SLCE_FDD_3,MOD_SEQ_FDD)
+ SAP_INFO(SLCE_UL2SEQ_SAP,MOD_SLCE_FDD_4,MOD_SEQ_FDD)
+ SAP_INFO(SLCE_UL2SEQ_SAP,MOD_SLCE_TDD,MOD_SEQ_TDD)
+ SAP_INFO(SLCE_UL2SEQ_SAP,MOD_SLCE_TDD_2,MOD_SEQ_TDD)
+ SAP_INFO(CMUX_UH_SAP,MOD_CMUX,MOD_CMUXUH)
+ SAP_INFO(CMUX_SAP,MOD_CMUX,MOD_CMUX)
+ SAP_INFO(UPS_SAP,MOD_UPS,MOD_UPS)
+ SAP_INFO(UPS_SAP,MOD_UPS,MOD_TCM)
+ SAP_INFO(EEM_EEM_SAP,MOD_EEM,MOD_EEM)
+ SAP_INFO(EEM_HISR_SAP,MOD_EEM,MOD_DRV_HISR)
+ SAP_INFO(EEM_HISR_SAP,MOD_DRV_HISR,MOD_EEM)
+ SAP_INFO(MMI_MMI_SAP,MOD_MMI,MOD_MMI)
+ SAP_INFO(MAC_RRM_SAP,MOD_MAC,MOD_RRM)
+ SAP_INFO(MAC_RRM_SAP,MOD_MAC_2,MOD_RRM_2)
+ SAP_INFO(MAC_RRM_SAP,MOD_MAC_FDD,MOD_RRM_FDD)
+ SAP_INFO(MAC_RRM_SAP,MOD_MAC_TDD,MOD_RRM_TDD)
+ SAP_INFO(MAC_RRM_SAP,MOD_MAC_FDD_2,MOD_RRM_FDD_2)
+ SAP_INFO(MAC_RRM_SAP,MOD_MAC_TDD_2,MOD_RRM_TDD_2)
+ SAP_INFO(L4C_ME_SAP,MOD_L4C,ANY)
+ SAP_INFO(L4C_ME_SAP,MOD_L4C_2,ANY)
+ /* ETC related SAP INFO */
+ SAP_INFO(UPCM_ETC_SAP, MOD_UPCM, MOD_ETC)
+ SAP_INFO(ETC_EMM_SAP, MOD_ETC, MOD_EMM)
+ SAP_INFO(ETC_NRRC_SAP, MOD_ETC, MOD_NRRC)
+ SAP_INFO(ETC_VGMM_SAP, MOD_ETC, MOD_VGMM)
+ /* EVAL related SAP INFO */
+ SAP_INFO(LPP_EVAL_SAP, MOD_LPP, MOD_EVAL)
+ SAP_INFO(NWSEL_EVAL_SAP, MOD_NWSEL, MOD_EVAL)
+ SAP_INFO(NWSEL_EVAL_SAP, MOD_NWSEL_2, MOD_EVAL_2)
+ SAP_INFO(RAC_EVAL_SAP, MOD_RAC, MOD_EVAL)
+ SAP_INFO(TCM_EVAL_SAP, MOD_TCM, MOD_EVAL)
+ SAP_INFO(L4C_EVAL_SAP, MOD_L4C, MOD_EVAL)
+ SAP_INFO(SMS_EVAL_SAP, MOD_SMS, MOD_EVAL)
+ SAP_INFO(SMSAL_EVAL_SAP, MOD_SMSAL, MOD_EVAL)
+ SAP_INFO(CISS_EVAL_SAP, MOD_CISS, MOD_EVAL)
+ SAP_INFO(EVAL_EMM_SAP, MOD_EVAL, MOD_EMM)
+ SAP_INFO(EVAL_EMM_SAP, MOD_EVAL_2, MOD_EMM_2)
+ SAP_INFO(EVAL_ESM_SAP, MOD_EVAL, MOD_ESM)
+ SAP_INFO(ESMREG_SAP, MOD_PAM, MOD_ESM)
+ SAP_INFO(ESMREG_SAP, MOD_ESM, MOD_PAM)
+ SAP_INFO(ESMREG_SAP, MOD_PAM_2, MOD_ESM_2) //GEMINI L+L ESM UT
+ SAP_INFO(ESMREG_SAP, MOD_ESM_2, MOD_PAM_2) //GEMINI L+L ESM UT
+ SAP_INFO(TCM_PAM_SAP, MOD_TCM, MOD_PAM)
+ SAP_INFO(TCM_PAM_SAP, MOD_PAM, MOD_TCM)
+ SAP_INFO(EVAL_ERRC_SAP, MOD_EVAL, MOD_ERRC)
+ SAP_INFO(EVAL_ERRC_SAP, MOD_EVAL_2, MOD_ERRC_2)
+ SAP_INFO(L4C_ERRC_SAP, MOD_ERRC_EVTH, MOD_L4C)
+ SAP_INFO(L4C_ERRC_SAP, MOD_ERRC_EVTH_2, MOD_L4C_2)
+ SAP_INFO(PERF_ERRC_SAP, MOD_ERRC, MOD_PERF)
+ SAP_INFO(PERF_ERRC_SAP, MOD_ERRC_2, MOD_PERF)
+ SAP_INFO(PERF_SAP,MOD_PERF,ANY)
+ SAP_INFO(PERF_SAP,ANY,MOD_PERF)
+ SAP_INFO(PERF_SAP,MOD_ERM,ANY)
+ SAP_INFO(PERF_SAP,ANY,MOD_ERM)
+
+ /* ERRC ineternal module SAP INFO */
+ SAP_INFO(EVTH_ALL_SAP, MOD_ERRC_EVTH, MOD_ERRC_CEL)
+ SAP_INFO(EVTH_ALL_SAP, MOD_ERRC_EVTH, MOD_ERRC_CHM)
+ SAP_INFO(EVTH_ALL_SAP, MOD_ERRC_EVTH, MOD_ERRC_CONN)
+ SAP_INFO(EVTH_ALL_SAP, MOD_ERRC_EVTH, MOD_ERRC_MOB)
+ SAP_INFO(EVTH_ALL_SAP, MOD_ERRC_EVTH, MOD_ERRC_SPV)
+ SAP_INFO(EVTH_ALL_SAP, MOD_ERRC_EVTH, MOD_ERRC_SYS)
+ SAP_INFO(EVTH_ALL_SAP, MOD_ERRC_EVTH, MOD_ERRC_RCM)
+ SAP_INFO(EVTH_ALL_SAP, MOD_ERRC_EVTH, MOD_ERRC_EVTH)
+ SAP_INFO(RCM_CONN_SAP, MOD_ERRC_RCM, MOD_ERRC_CONN)
+ SAP_INFO(RCM_MOB_SAP, MOD_ERRC_RCM, MOD_ERRC_MOB)
+ SAP_INFO(RCM_SPV_SAP, MOD_ERRC_RCM, MOD_ERRC_SPV)
+ SAP_INFO(RCM_LCEL_SAP, MOD_ERRC_RCM, MOD_ERRC_LCEL)
+ SAP_INFO(CEL_CHM_SAP, MOD_ERRC_CEL, MOD_ERRC_CHM)
+ SAP_INFO(CEL_CONN_SAP, MOD_ERRC_CEL, MOD_ERRC_CONN)
+ SAP_INFO(CEL_MOB_SAP, MOD_ERRC_CEL, MOD_ERRC_MOB)
+ SAP_INFO(CEL_SPV_SAP, MOD_ERRC_CEL, MOD_ERRC_SPV)
+ SAP_INFO(CEL_SYS_SAP, MOD_ERRC_CEL, MOD_ERRC_SYS)
+ SAP_INFO(CHM_CONN_SAP, MOD_ERRC_CHM, MOD_ERRC_CONN)
+ SAP_INFO(CHM_MOB_SAP, MOD_ERRC_CHM, MOD_ERRC_MOB)
+ SAP_INFO(CHM_SYS_SAP, MOD_ERRC_CHM, MOD_ERRC_SYS)
+ SAP_INFO(CONN_MOB_SAP, MOD_ERRC_CONN, MOD_ERRC_MOB)
+ SAP_INFO(CONN_SPV_SAP, MOD_ERRC_CONN, MOD_ERRC_SPV)
+ SAP_INFO(MOB_SPV_SAP, MOD_ERRC_MOB, MOD_ERRC_SPV)
+ SAP_INFO(MOB_SPV_SAP, MOD_ERRC_SPV, MOD_ERRC_MOB)
+ SAP_INFO(LCEL_CEL_SAP, MOD_ERRC_LCEL, MOD_ERRC_CEL)
+ SAP_INFO(LSYS_SYS_SAP, MOD_ERRC_LSYS, MOD_ERRC_SYS)
+ SAP_INFO(ERRC_CEL_SAP, MOD_ERRC_CEL, MOD_ERRC_CEL)
+ SAP_INFO(ERRC_CHM_SAP, MOD_ERRC_CHM, MOD_ERRC_CHM)
+ SAP_INFO(ERRC_CONN_SAP, MOD_ERRC_CONN, MOD_ERRC_CONN)
+ SAP_INFO(ERRC_MOB_SAP, MOD_ERRC_MOB, MOD_ERRC_MOB)
+ SAP_INFO(ERRC_RCM_SAP, MOD_ERRC_RCM, MOD_ERRC_RCM)
+ SAP_INFO(ERRC_SPV_SAP, MOD_ERRC_SPV, MOD_ERRC_SPV)
+ SAP_INFO(ERRC_SYS_SAP, MOD_ERRC_SYS, MOD_ERRC_SYS)
+ SAP_INFO(ERRC_LCEL_SAP, MOD_ERRC_LCEL, MOD_ERRC_LCEL)
+ SAP_INFO(ERRC_LSYS_SAP, MOD_ERRC_LSYS, MOD_ERRC_LSYS)
+ SAP_INFO(CHM_SPV_SAP, MOD_ERRC_SPV, MOD_ERRC_CHM)
+//#ifdef __GEMINI_LTE__
+ SAP_INFO(EVTH_ALL_SAP, MOD_ERRC_EVTH_2, MOD_ERRC_CEL_2)
+ SAP_INFO(EVTH_ALL_SAP, MOD_ERRC_EVTH_2, MOD_ERRC_CHM_2)
+ SAP_INFO(EVTH_ALL_SAP, MOD_ERRC_EVTH_2, MOD_ERRC_CONN_2)
+ SAP_INFO(EVTH_ALL_SAP, MOD_ERRC_EVTH_2, MOD_ERRC_MOB_2)
+ SAP_INFO(EVTH_ALL_SAP, MOD_ERRC_EVTH_2, MOD_ERRC_SPV_2)
+ SAP_INFO(EVTH_ALL_SAP, MOD_ERRC_EVTH_2, MOD_ERRC_SYS_2)
+ SAP_INFO(EVTH_ALL_SAP, MOD_ERRC_EVTH_2, MOD_ERRC_RCM_2)
+ SAP_INFO(EVTH_ALL_SAP, MOD_ERRC_EVTH_2, MOD_ERRC_EVTH_2)
+ SAP_INFO(RCM_CONN_SAP, MOD_ERRC_RCM_2, MOD_ERRC_CONN_2)
+ SAP_INFO(RCM_MOB_SAP, MOD_ERRC_RCM_2, MOD_ERRC_MOB_2)
+ SAP_INFO(RCM_SPV_SAP, MOD_ERRC_RCM_2, MOD_ERRC_SPV_2)
+ SAP_INFO(RCM_LCEL_SAP, MOD_ERRC_RCM_2, MOD_ERRC_LCEL_2)
+ SAP_INFO(CEL_CHM_SAP, MOD_ERRC_CEL_2, MOD_ERRC_CHM_2)
+ SAP_INFO(CEL_CONN_SAP, MOD_ERRC_CEL_2, MOD_ERRC_CONN_2)
+ SAP_INFO(CEL_MOB_SAP, MOD_ERRC_CEL_2, MOD_ERRC_MOB_2)
+ SAP_INFO(CEL_SPV_SAP, MOD_ERRC_CEL_2, MOD_ERRC_SPV_2)
+ SAP_INFO(CEL_SYS_SAP, MOD_ERRC_CEL_2, MOD_ERRC_SYS_2)
+ SAP_INFO(CHM_CONN_SAP, MOD_ERRC_CHM_2, MOD_ERRC_CONN_2)
+ SAP_INFO(CHM_MOB_SAP, MOD_ERRC_CHM_2, MOD_ERRC_MOB_2)
+ SAP_INFO(CHM_SYS_SAP, MOD_ERRC_CHM_2, MOD_ERRC_SYS_2)
+ SAP_INFO(CONN_MOB_SAP, MOD_ERRC_CONN_2, MOD_ERRC_MOB_2)
+ SAP_INFO(CONN_SPV_SAP, MOD_ERRC_CONN_2, MOD_ERRC_SPV_2)
+ SAP_INFO(MOB_SPV_SAP, MOD_ERRC_MOB_2, MOD_ERRC_SPV_2)
+ SAP_INFO(MOB_SPV_SAP, MOD_ERRC_SPV_2, MOD_ERRC_MOB_2)
+ SAP_INFO(LCEL_CEL_SAP, MOD_ERRC_LCEL_2, MOD_ERRC_CEL_2)
+ SAP_INFO(LSYS_SYS_SAP, MOD_ERRC_LSYS_2, MOD_ERRC_SYS_2)
+ SAP_INFO(ERRC_CEL_SAP, MOD_ERRC_CEL_2, MOD_ERRC_CEL_2)
+ SAP_INFO(ERRC_CHM_SAP, MOD_ERRC_CHM_2, MOD_ERRC_CHM_2)
+ SAP_INFO(ERRC_CONN_SAP, MOD_ERRC_CONN_2, MOD_ERRC_CONN_2)
+ SAP_INFO(ERRC_MOB_SAP, MOD_ERRC_MOB_2, MOD_ERRC_MOB_2)
+ SAP_INFO(ERRC_RCM_SAP, MOD_ERRC_RCM_2, MOD_ERRC_RCM_2)
+ SAP_INFO(ERRC_SPV_SAP, MOD_ERRC_SPV_2, MOD_ERRC_SPV_2)
+ SAP_INFO(ERRC_SYS_SAP, MOD_ERRC_SYS_2, MOD_ERRC_SYS_2)
+ SAP_INFO(ERRC_LCEL_SAP, MOD_ERRC_LCEL_2, MOD_ERRC_LCEL_2)
+ SAP_INFO(ERRC_LSYS_SAP, MOD_ERRC_LSYS_2, MOD_ERRC_LSYS_2)
+ SAP_INFO(CHM_SPV_SAP, MOD_ERRC_SPV_2, MOD_ERRC_CHM_2)
+//#endif __GEMINI_LTE__
+
+ SAP_INFO(EMM_CALL_CONN_SAP, MOD_EMM_CALL, MOD_EMM_CONN)
+ SAP_INFO(EMM_CALL_ERRCIF_SAP, MOD_EMM_CALL, MOD_EMM_ERRCIF)
+ SAP_INFO(EMM_CALL_ESMIF_SAP, MOD_EMM_CALL, MOD_EMM_ESMIF)
+ SAP_INFO(EMM_CALL_EVALIF_SAP, MOD_EMM_CALL, MOD_EMM_EVALIF)
+ SAP_INFO(EMM_CALL_MSPMIF_SAP, MOD_EMM_CALL, MOD_EMM_MSPMIF)
+ SAP_INFO(EMM_CALL_EVTCTRL_SAP, MOD_EMM_CALL, MOD_EMM_EVTCTRL)
+ SAP_INFO(EMM_CALL_MMIF_SAP, MOD_EMM_CALL, MOD_EMM_MMIF)
+ SAP_INFO(EMM_CALL_NASMSG_SAP, MOD_EMM_CALL, MOD_EMM_NASMSG)
+ SAP_INFO(EMM_CALL_PLMNSEL_SAP, MOD_EMM_CALL, MOD_EMM_PLMNSEL)
+ SAP_INFO(EMM_CALL_RATBAND_SAP, MOD_EMM_CALL, MOD_EMM_RATBAND)
+ SAP_INFO(EMM_CALL_RATCHG_SAP, MOD_EMM_CALL, MOD_EMM_RATCHG)
+ SAP_INFO(EMM_CALL_REG_SAP, MOD_EMM_CALL, MOD_EMM_REG)
+ SAP_INFO(EMM_CALL_SEC_SAP, MOD_EMM_CALL, MOD_EMM_SEC)
+ SAP_INFO(EMM_CALL_SV_SAP, MOD_EMM_CALL, MOD_EMM_SV)
+ SAP_INFO(EMM_CALL_TIMERMNG_SAP, MOD_EMM_CALL, MOD_EMM_TIMERMNG)
+ SAP_INFO(EMM_CMNPROC_ERRCIF_SAP, MOD_EMM_CMNPROC, MOD_EMM_ERRCIF)
+ SAP_INFO(EMM_CMNPROC_EVALIF_SAP, MOD_EMM_CMNPROC, MOD_EMM_EVALIF)
+ SAP_INFO(EMM_CMNPROC_NASMSG_SAP, MOD_EMM_CMNPROC, MOD_EMM_NASMSG)
+ SAP_INFO(EMM_CMNPROC_PLMNSEL_SAP, MOD_EMM_CMNPROC, MOD_EMM_PLMNSEL)
+ SAP_INFO(EMM_CMNPROC_REG_SAP, MOD_EMM_CMNPROC, MOD_EMM_REG)
+ SAP_INFO(EMM_CONN_ERRCIF_SAP, MOD_EMM_CONN, MOD_EMM_ERRCIF)
+ SAP_INFO(EMM_CONN_ESMIF_SAP, MOD_EMM_CONN, MOD_EMM_ESMIF)
+ SAP_INFO(EMM_CONN_ETCIF_SAP, MOD_EMM_CONN, MOD_EMM_ETCIF)
+ SAP_INFO(EMM_CONN_EVALIF_SAP, MOD_EMM_CONN, MOD_EMM_EVALIF)
+ SAP_INFO(EMM_CONN_NASMSG_SAP, MOD_EMM_CONN, MOD_EMM_NASMSG)
+ SAP_INFO(EMM_CONN_PLMNSEL_SAP, MOD_EMM_CONN, MOD_EMM_PLMNSEL)
+ SAP_INFO(EMM_CONN_RATBAND_SAP, MOD_EMM_CONN, MOD_EMM_RATBAND)
+ SAP_INFO(EMM_CONN_RATCHG_SAP, MOD_EMM_CONN, MOD_EMM_RATCHG)
+ SAP_INFO(EMM_CONN_REG_SAP, MOD_EMM_CONN, MOD_EMM_REG)
+ SAP_INFO(EMM_CONN_SEC_SAP, MOD_EMM_CONN, MOD_EMM_SEC)
+ SAP_INFO(EMM_CONN_SV_SAP, MOD_EMM_CONN, MOD_EMM_SV)
+ SAP_INFO(EMM_CONN_TIMERMNG_SAP, MOD_EMM_CONN, MOD_EMM_TIMERMNG)
+ SAP_INFO(EMM_ERRCIF_ESMIF_SAP, MOD_EMM_ERRCIF, MOD_EMM_ESMIF)
+ SAP_INFO(EMM_ERRCIF_ETCIF_SAP, MOD_EMM_ERRCIF, MOD_EMM_ETCIF)
+ SAP_INFO(EMM_ERRCIF_NASMSG_SAP, MOD_EMM_ERRCIF, MOD_EMM_NASMSG)
+ SAP_INFO(EMM_ERRCIF_PLMNSEL_SAP, MOD_EMM_ERRCIF, MOD_EMM_PLMNSEL)
+ SAP_INFO(EMM_ERRCIF_RATBAND_SAP, MOD_EMM_ERRCIF, MOD_EMM_RATBAND)
+ SAP_INFO(EMM_ERRCIF_RATCHG_SAP, MOD_EMM_ERRCIF, MOD_EMM_RATCHG)
+ SAP_INFO(EMM_ERRCIF_REG_SAP, MOD_EMM_ERRCIF, MOD_EMM_REG)
+ SAP_INFO(EMM_ERRCIF_SEC_SAP, MOD_EMM_ERRCIF, MOD_EMM_SEC)
+ SAP_INFO(EMM_ERRCIF_SV_SAP, MOD_EMM_ERRCIF, MOD_EMM_SV)
+ SAP_INFO(EMM_ESMIF_NASMSG_SAP, MOD_EMM_ESMIF, MOD_EMM_NASMSG)
+ SAP_INFO(EMM_ESMIF_RATCHG_SAP, MOD_EMM_ESMIF, MOD_EMM_RATCHG)
+ SAP_INFO(EMM_ESMIF_REG_SAP, MOD_EMM_ESMIF, MOD_EMM_REG)
+ SAP_INFO(EMM_ESMIF_SEC_SAP, MOD_EMM_ESMIF, MOD_EMM_SEC)
+ SAP_INFO(EMM_ESMIF_SV_SAP, MOD_EMM_ESMIF, MOD_EMM_SV)
+ SAP_INFO(EMM_ESMIF_PLMNSEL_SAP, MOD_EMM_ESMIF, MOD_EMM_PLMNSEL)
+ SAP_INFO(EMM_ETCIF_NASMSG_SAP, MOD_EMM_ETCIF, MOD_EMM_NASMSG)
+ SAP_INFO(EMM_ETCIF_REG_SAP, MOD_EMM_ETCIF, MOD_EMM_REG)
+ SAP_INFO(EMM_ETCIF_SV_SAP, MOD_EMM_ETCIF, MOD_EMM_SV)
+ SAP_INFO(EMM_ETCIF_TIMERMNG_SAP, MOD_EMM_ETCIF, MOD_EMM_TIMERMNG)
+ SAP_INFO(EMM_ETCIF_PLMNSEL_SAP, MOD_EMM_ETCIF, MOD_EMM_PLMNSEL)
+ SAP_INFO(EMM_EVALIF_NASMSG_SAP, MOD_EMM_EVALIF, MOD_EMM_NASMSG)
+ SAP_INFO(EMM_EVALIF_PLMNSEL_SAP, MOD_EMM_EVALIF, MOD_EMM_PLMNSEL)
+ SAP_INFO(EMM_EVALIF_RATBAND_SAP, MOD_EMM_EVALIF, MOD_EMM_RATBAND)
+ SAP_INFO(EMM_EVALIF_RATCHG_SAP, MOD_EMM_EVALIF, MOD_EMM_RATCHG)
+ SAP_INFO(EMM_EVALIF_REG_SAP, MOD_EMM_EVALIF, MOD_EMM_REG)
+ SAP_INFO(EMM_EVALIF_SEC_SAP, MOD_EMM_EVALIF, MOD_EMM_SEC)
+ SAP_INFO(EMM_EVALIF_SV_SAP, MOD_EMM_EVALIF, MOD_EMM_SV)
+ SAP_INFO(EMM_EVALIF_TIMERMNG_SAP, MOD_EMM_EVALIF, MOD_EMM_TIMERMNG)
+ SAP_INFO(EMM_EVTCTRL_PLMNSEL_SAP, MOD_EMM_EVTCTRL, MOD_EMM_PLMNSEL)
+ SAP_INFO(EMM_EVTCTRL_RATBAND_SAP, MOD_EMM_EVTCTRL, MOD_EMM_RATBAND)
+ SAP_INFO(EMM_EVTCTRL_RATCHG_SAP, MOD_EMM_EVTCTRL, MOD_EMM_RATCHG)
+ SAP_INFO(EMM_EVTCTRL_REG_SAP, MOD_EMM_EVTCTRL, MOD_EMM_REG)
+ SAP_INFO(EMM_EVTCTRL_SV_SAP, MOD_EMM_EVTCTRL, MOD_EMM_SV)
+ SAP_INFO(EMM_MMIF_RATCHG_SAP, MOD_EMM_MMIF, MOD_EMM_RATCHG)
+ SAP_INFO(EMM_MMIF_REG_SAP, MOD_EMM_MMIF, MOD_EMM_REG)
+ SAP_INFO(EMM_MMIF_TIMERMNG_SAP, MOD_EMM_MMIF, MOD_EMM_TIMERMNG)
+ SAP_INFO(EMM_MSPMIF_SEC_SAP, MOD_EMM_MSPMIF, MOD_EMM_SEC)
+ SAP_INFO(EMM_NASMSG_PLMNSEL_SAP, MOD_EMM_NASMSG, MOD_EMM_PLMNSEL)
+ SAP_INFO(EMM_NASMSG_REG_SAP, MOD_EMM_NASMSG, MOD_EMM_REG)
+ SAP_INFO(EMM_NASMSG_SEC_SAP, MOD_EMM_NASMSG, MOD_EMM_SEC)
+ SAP_INFO(EMM_PLMNSEL_RATCHG_SAP, MOD_EMM_PLMNSEL, MOD_EMM_RATCHG)
+ SAP_INFO(EMM_PLMNSEL_REG_SAP, MOD_EMM_PLMNSEL, MOD_EMM_REG)
+ SAP_INFO(EMM_PLMNSEL_SEC_SAP, MOD_EMM_PLMNSEL, MOD_EMM_SEC)
+ SAP_INFO(EMM_PLMNSEL_SV_SAP, MOD_EMM_PLMNSEL, MOD_EMM_SV)
+ SAP_INFO(EMM_PLMNSEL_TIMERMNG_SAP, MOD_EMM_PLMNSEL, MOD_EMM_TIMERMNG)
+ SAP_INFO(EMM_RATBAND_RATCHG_SAP, MOD_EMM_RATBAND, MOD_EMM_RATCHG)
+ SAP_INFO(EMM_RATBAND_REG_SAP, MOD_EMM_RATBAND, MOD_EMM_REG)
+ SAP_INFO(EMM_RATBAND_SV_SAP, MOD_EMM_RATBAND, MOD_EMM_SV)
+ SAP_INFO(EMM_RATBAND_TIMERMNG_SAP, MOD_EMM_RATBAND, MOD_EMM_TIMERMNG)
+ SAP_INFO(EMM_RATCHG_REG_SAP, MOD_EMM_RATCHG, MOD_EMM_REG)
+ SAP_INFO(EMM_RATCHG_SEC_SAP, MOD_EMM_RATCHG, MOD_EMM_SEC)
+ SAP_INFO(EMM_RATCHG_SV_SAP, MOD_EMM_RATCHG, MOD_EMM_SV)
+ SAP_INFO(EMM_RATCHG_TIMERMNG_SAP, MOD_EMM_RATCHG, MOD_EMM_TIMERMNG)
+ SAP_INFO(EMM_REG_SEC_SAP, MOD_EMM_REG, MOD_EMM_SEC)
+ SAP_INFO(EMM_REG_SV_SAP, MOD_EMM_REG, MOD_EMM_SV)
+ SAP_INFO(EMM_REG_TIMERMNG_SAP, MOD_EMM_REG, MOD_EMM_TIMERMNG)
+ SAP_INFO(EMM_REG_MSPMIF_SAP, MOD_EMM_REG, MOD_EMM_MSPMIF)
+ SAP_INFO(EMM_SEC_SV_SAP, MOD_EMM_SEC, MOD_EMM_SV)
+ SAP_INFO(EMM_SEC_TIMERMNG_SAP, MOD_EMM_SEC, MOD_EMM_TIMERMNG)
+ SAP_INFO(EMM_SV_TIMERMNG_SAP, MOD_EMM_SV, MOD_EMM_TIMERMNG)
+
+
+ SAP_INFO(MM_EMM_SAP, MOD_MM, MOD_EMM)
+ SAP_INFO(EMM_ERRC_SAP, MOD_ERRC, MOD_EMM)
+ SAP_INFO(EMM_ERRC_SAP, MOD_ERRC_2, MOD_EMM_2)
+ SAP_INFO(EMM_CALL_CONN_SAP, MOD_EMM_CALL_2, MOD_EMM_CONN_2)
+ SAP_INFO(EMM_CALL_ERRCIF_SAP, MOD_EMM_CALL_2, MOD_EMM_ERRCIF_2)
+ SAP_INFO(EMM_CALL_ESMIF_SAP, MOD_EMM_CALL_2, MOD_EMM_ESMIF_2)
+ SAP_INFO(EMM_CALL_EVALIF_SAP, MOD_EMM_CALL_2, MOD_EMM_EVALIF_2)
+ SAP_INFO(EMM_CALL_MSPMIF_SAP, MOD_EMM_CALL_2, MOD_EMM_MSPMIF_2)
+ SAP_INFO(EMM_CALL_EVTCTRL_SAP, MOD_EMM_CALL_2, MOD_EMM_EVTCTRL_2)
+ SAP_INFO(EMM_CALL_MMIF_SAP, MOD_EMM_CALL_2, MOD_EMM_MMIF_2)
+ SAP_INFO(EMM_CALL_NASMSG_SAP, MOD_EMM_CALL_2, MOD_EMM_NASMSG_2)
+ SAP_INFO(EMM_CALL_PLMNSEL_SAP, MOD_EMM_CALL_2, MOD_EMM_PLMNSEL_2)
+ SAP_INFO(EMM_CALL_RATCHG_SAP, MOD_EMM_CALL_2, MOD_EMM_RATCHG_2)
+ SAP_INFO(EMM_CALL_RATBAND_SAP, MOD_EMM_CALL_2, MOD_EMM_RATBAND_2)
+ SAP_INFO(EMM_CALL_REG_SAP, MOD_EMM_CALL_2, MOD_EMM_REG_2)
+ SAP_INFO(EMM_CALL_SEC_SAP, MOD_EMM_CALL_2, MOD_EMM_SEC_2)
+ SAP_INFO(EMM_CALL_SV_SAP, MOD_EMM_CALL_2, MOD_EMM_SV_2)
+ SAP_INFO(EMM_CALL_TIMERMNG_SAP, MOD_EMM_CALL_2, MOD_EMM_TIMERMNG_2)
+ SAP_INFO(EMM_CMNPROC_ERRCIF_SAP, MOD_EMM_CMNPROC_2, MOD_EMM_ERRCIF_2)
+ SAP_INFO(EMM_CMNPROC_EVALIF_SAP, MOD_EMM_CMNPROC_2, MOD_EMM_EVALIF_2)
+ SAP_INFO(EMM_CMNPROC_NASMSG_SAP, MOD_EMM_CMNPROC_2, MOD_EMM_NASMSG_2)
+ SAP_INFO(EMM_CMNPROC_PLMNSEL_SAP, MOD_EMM_CMNPROC_2, MOD_EMM_PLMNSEL_2)
+ SAP_INFO(EMM_CMNPROC_REG_SAP, MOD_EMM_CMNPROC_2, MOD_EMM_REG_2)
+ SAP_INFO(EMM_CONN_ERRCIF_SAP, MOD_EMM_CONN_2, MOD_EMM_ERRCIF_2)
+ SAP_INFO(EMM_CONN_ESMIF_SAP, MOD_EMM_CONN_2, MOD_EMM_ESMIF_2)
+ SAP_INFO(EMM_CONN_ETCIF_SAP, MOD_EMM_CONN_2, MOD_EMM_ETCIF_2)
+ SAP_INFO(EMM_CONN_EVALIF_SAP, MOD_EMM_CONN_2, MOD_EMM_EVALIF_2)
+ SAP_INFO(EMM_CONN_NASMSG_SAP, MOD_EMM_CONN_2, MOD_EMM_NASMSG_2)
+ SAP_INFO(EMM_CONN_PLMNSEL_SAP, MOD_EMM_CONN_2, MOD_EMM_PLMNSEL_2)
+ SAP_INFO(EMM_CONN_RATBAND_SAP, MOD_EMM_CONN_2, MOD_EMM_RATBAND_2)
+ SAP_INFO(EMM_CONN_RATCHG_SAP, MOD_EMM_CONN_2, MOD_EMM_RATCHG_2)
+ SAP_INFO(EMM_CONN_REG_SAP, MOD_EMM_CONN_2, MOD_EMM_REG_2)
+ SAP_INFO(EMM_CONN_SEC_SAP, MOD_EMM_CONN_2, MOD_EMM_SEC_2)
+ SAP_INFO(EMM_CONN_TIMERMNG_SAP, MOD_EMM_CONN_2, MOD_TIMERMNG_2)
+ SAP_INFO(EMM_ERRCIF_ESMIF_SAP, MOD_EMM_ERRCIF_2, MOD_EMM_ESMIF_2)
+ SAP_INFO(EMM_ERRCIF_ETCIF_SAP, MOD_EMM_ERRCIF_2, MOD_EMM_ETCIF_2)
+ SAP_INFO(EMM_ERRCIF_NASMSG_SAP, MOD_EMM_ERRCIF_2, MOD_EMM_NASMSG_2)
+ SAP_INFO(EMM_ERRCIF_PLMNSEL_SAP, MOD_EMM_ERRCIF_2, MOD_EMM_PLMNSEL_2)
+ SAP_INFO(EMM_ERRCIF_RATBAND_SAP, MOD_EMM_ERRCIF_2, MOD_EMM_RATBAND_2)
+ SAP_INFO(EMM_ERRCIF_RATCHG_SAP, MOD_EMM_ERRCIF_2, MOD_EMM_RATCHG_2)
+ SAP_INFO(EMM_ERRCIF_REG_SAP, MOD_EMM_ERRCIF_2, MOD_EMM_REG_2)
+ SAP_INFO(EMM_ERRCIF_SEC_SAP, MOD_EMM_ERRCIF_2, MOD_EMM_SEC_2)
+ SAP_INFO(EMM_ERRCIF_SV_SAP, MOD_EMM_ERRCIF_2, MOD_EMM_SV_2)
+ SAP_INFO(EMM_ESMIF_NASMSG_SAP, MOD_EMM_ESMIF_2, MOD_EMM_NASMSG_2)
+ SAP_INFO(EMM_ESMIF_RATCHG_SAP, MOD_EMM_ESMIF_2, MOD_EMM_RATCHG_2)
+ SAP_INFO(EMM_ESMIF_REG_SAP, MOD_EMM_ESMIF_2, MOD_EMM_REG_2)
+ SAP_INFO(EMM_ESMIF_SEC_SAP, MOD_EMM_ESMIF_2, MOD_EMM_SEC_2)
+ SAP_INFO(EMM_ESMIF_SV_SAP, MOD_EMM_ESMIF_2, MOD_EMM_SV_2)
+ SAP_INFO(EMM_ESMIF_PLMNSEL_SAP, MOD_EMM_ESMIF_2, MOD_EMM_PLMNSEL_2)
+ SAP_INFO(EMM_ETCIF_NASMSG_SAP, MOD_EMM_ETCIF_2, MOD_EMM_NASMSG_2)
+ SAP_INFO(EMM_ETCIF_REG_SAP, MOD_EMM_ETCIF_2, MOD_EMM_REG_2)
+ SAP_INFO(EMM_ETCIF_SV_SAP, MOD_EMM_ETCIF_2, MOD_EMM_SV_2)
+ SAP_INFO(EMM_ETCIF_TIMERMNG_SAP, MOD_EMM_ETCIF_2, MOD_TIMERMNG_2)
+ SAP_INFO(EMM_ETCIF_PLMNSEL_SAP, MOD_EMM_ETCIF_2, MOD_EMM_PLMNSEL_2)
+ SAP_INFO(EMM_EVALIF_NASMSG_SAP, MOD_EMM_EVALIF_2, MOD_EMM_NASMSG_2)
+ SAP_INFO(EMM_EVALIF_PLMNSEL_SAP, MOD_EMM_EVALIF_2, MOD_EMM_PLMNSEL_2)
+ SAP_INFO(EMM_EVALIF_RATBAND_SAP, MOD_EMM_EVALIF_2, MOD_EMM_RATBAND_2)
+ SAP_INFO(EMM_EVALIF_RATCHG_SAP, MOD_EMM_EVALIF_2, MOD_EMM_RATCHG_2)
+ SAP_INFO(EMM_EVALIF_REG_SAP, MOD_EMM_EVALIF_2, MOD_EMM_REG_2)
+ SAP_INFO(EMM_EVALIF_SEC_SAP, MOD_EMM_EVALIF_2, MOD_EMM_SEC_2)
+ SAP_INFO(EMM_EVALIF_SV_SAP, MOD_EMM_EVALIF_2, MOD_EMM_SV_2)
+ SAP_INFO(EMM_EVALIF_TIMERMNG_SAP, MOD_EMM_EVALIF_2, MOD_EMM_TIMERMNG_2)
+ SAP_INFO(EMM_EVTCTRL_PLMNSEL_SAP, MOD_EMM_EVTCTRL_2, MOD_EMM_PLMNSEL_2)
+ SAP_INFO(EMM_EVTCTRL_RATBAND_SAP, MOD_EMM_EVTCTRL_2, MOD_EMM_RATBAND_2)
+ SAP_INFO(EMM_EVTCTRL_RATCHG_SAP, MOD_EMM_EVTCTRL_2, MOD_EMM_RATCHG_2)
+ SAP_INFO(EMM_EVTCTRL_REG_SAP, MOD_EMM_EVTCTRL_2, MOD_EMM_REG_2)
+ SAP_INFO(EMM_EVTCTRL_SV_SAP, MOD_EMM_EVTCTRL_2, MOD_EMM_SV_2)
+ SAP_INFO(EMM_MMIF_RATCHG_SAP, MOD_EMM_MMIF_2, MOD_EMM_RATCHG_2)
+ SAP_INFO(EMM_MMIF_REG_SAP, MOD_EMM_MMIF_2, MOD_EMM_REG_2)
+ SAP_INFO(EMM_MSPMIF_SEC_SAP, MOD_EMM_MSPMIF_2, MOD_EMM_SEC_2)
+ SAP_INFO(EMM_NASMSG_PLMNSEL_SAP, MOD_EMM_NASMSG_2, MOD_EMM_PLMNSEL_2)
+ SAP_INFO(EMM_NASMSG_REG_SAP, MOD_EMM_NASMSG_2, MOD_EMM_REG_2)
+ SAP_INFO(EMM_NASMSG_SEC_SAP, MOD_EMM_NASMSG_2, MOD_EMM_SEC_2)
+ SAP_INFO(EMM_PLMNSEL_RATCHG_SAP, MOD_EMM_PLMNSEL_2, MOD_EMM_RATCHG_2)
+ SAP_INFO(EMM_PLMNSEL_REG_SAP, MOD_EMM_PLMNSEL_2, MOD_EMM_REG_2)
+ SAP_INFO(EMM_PLMNSEL_SEC_SAP, MOD_EMM_PLMNSEL_2, MOD_EMM_SEC_2)
+ SAP_INFO(EMM_PLMNSEL_SV_SAP, MOD_EMM_PLMNSEL_2, MOD_EMM_SV_2)
+ SAP_INFO(EMM_PLMNSEL_TIMERMNG_SAP, MOD_EMM_PLMNSEL_2, MOD_EMM_TIMERMNG_2)
+ SAP_INFO(EMM_RATBAND_RATCHG_SAP, MOD_EMM_RATBAND_2, MOD_EMM_RATCHG_2)
+ SAP_INFO(EMM_RATBAND_REG_SAP, MOD_EMM_RATBAND_2, MOD_EMM_REG_2)
+ SAP_INFO(EMM_RATBAND_SV_SAP, MOD_EMM_RATBAND_2, MOD_EMM_SV_2)
+ SAP_INFO(EMM_RATBAND_TIMERMNG_SAP, MOD_EMM_RATBAND_2, MOD_EMM_TIMERMNG_2)
+ SAP_INFO(EMM_RATCHG_REG_SAP, MOD_EMM_RATCHG_2, MOD_EMM_REG_2)
+ SAP_INFO(EMM_RATCHG_SEC_SAP, MOD_EMM_RATCHG_2, MOD_EMM_SEC_2)
+ SAP_INFO(EMM_RATCHG_SV_SAP, MOD_EMM_RATCHG_2, MOD_EMM_SV_2)
+ SAP_INFO(EMM_RATCHG_TIMERMNG_SAP, MOD_EMM_RATCHG_2, MOD_EMM_TIMERMNG_2)
+ SAP_INFO(EMM_REG_SEC_SAP, MOD_EMM_REG_2, MOD_EMM_SEC_2)
+ SAP_INFO(EMM_REG_SV_SAP, MOD_EMM_REG_2, MOD_EMM_SV_2)
+ SAP_INFO(EMM_REG_TIMERMNG_SAP, MOD_EMM_REG_2, MOD_EMM_TIMERMNG_2)
+ SAP_INFO(EMM_REG_MSPMIF_SAP, MOD_EMM_REG_2, MOD_EMM_MSPMIF_2)
+ SAP_INFO(EMM_SEC_SV_SAP, MOD_EMM_SEC_2, MOD_EMM_SV_2)
+ SAP_INFO(EMM_SEC_TIMERMNG_SAP, MOD_EMM_SEC_2, MOD_EMM_TIMERMNG_2)
+ SAP_INFO(EMM_SV_TIMERMNG_SAP, MOD_EMM_SV_2, MOD_EMM_TIMERMNG_2)
+
+ SAP_INFO(MM_EMM_SAP, MOD_MM_2, MOD_EMM_2)
+
+
+ /* ESM SAP INFO */
+ SAP_INFO(SM_ESM_SAP, MOD_SM, MOD_ESM)
+ SAP_INFO(SM_ESM_SAP, MOD_SM_2, MOD_ESM)
+ SAP_INFO(NIL_ESM_SAP, MOD_NIL, MOD_ESM)
+ SAP_INFO(ESM_RATDM_SAP, MOD_ESM, MOD_RATDM)
+ SAP_INFO(ESM_EMM_SAP, MOD_ESM, MOD_EMM)
+ SAP_INFO(ESM_ESM_SAP, MOD_ESM, MOD_ESM)
+
+ SAP_INFO(LTM_SAP, MOD_LTM, ANY)
+ SAP_INFO(UPCM_SAP, MOD_UPCM, ANY)
+
+ SAP_INFO(DISPATCHER_SAP, MOD_DISPATCHER, ANY)
+ SAP_INFO(DISPATCHER_SAP, ANY, MOD_DISPATCHER)
+
+ SAP_INFO(ERRC_EL1_SAP, MOD_ERRC, MOD_EL1)
+ SAP_INFO(ERRC_EL1MPC_SAP, MOD_ERRC, MOD_EL1_MPC)
+ SAP_INFO(ERRC_NL1_SAP, MOD_ERRC, MOD_NL1)
+ SAP_INFO(EMAC_EL1_SAP, MOD_EMAC, MOD_EL1)
+ SAP_INFO(EL1_EL1_SAP, MOD_EL1, MOD_EL1)
+ SAP_INFO(EL1_EL1MPC_SAP, MOD_EL1, MOD_EL1_MPC)
+// SAP_INFO(EL1_EL1_PHS_SAP, MOD_EL1_PHS, MOD_EL1_PHS)
+// SAP_INFO(EL1_EL1_TX_SAP, MOD_EL1_TX, MOD_EL1_TX)
+ SAP_INFO(EMAC_EL1TX_SAP, MOD_EMAC, MOD_EL1TX)
+ SAP_INFO(EL1_EL1TX_SAP, MOD_EL1, MOD_EL1TX)
+
+ SAP_INFO(ERRC_EL1_SAP, MOD_ERRC_2, MOD_EL1_2)
+ SAP_INFO(ERRC_EL1_SAP, MOD_ERRC_3, MOD_EL1_3)
+ SAP_INFO(ERRC_EL1_SAP, MOD_ERRC_4, MOD_EL1_4)
+ SAP_INFO(ERRC_EL1MPC_SAP, MOD_ERRC_2, MOD_EL1_MPC_2)
+ SAP_INFO(ERRC_EL1MPC_SAP, MOD_ERRC_3, MOD_EL1_MPC_3)
+ SAP_INFO(ERRC_EL1MPC_SAP, MOD_ERRC_4, MOD_EL1_MPC_4)
+
+ /* UPCM SAP */
+ SAP_INFO(EVAL_UPCM_SAP, MOD_EVAL, MOD_UPCM)
+ SAP_INFO(EVAL_UPCM_SAP, MOD_EVAL_2, MOD_UPCM_2)
+
+ /* EPDCP SAP */
+ SAP_INFO(ERRC_ENPDCP_SAP, MOD_ERRC, MOD_ENPDCP)
+ SAP_INFO(ERRC_EPDCP_SAP, MOD_ERRC, MOD_EPDCP)
+ SAP_INFO(EPDCP_EPDCP_SAP, MOD_EPDCP, MOD_EPDCP)
+ SAP_INFO(RATDM_EPDCP_SAP, MOD_RATDM, MOD_EPDCP)
+
+ SAP_INFO(ERRC_EPDCP_SAP, MOD_ERRC_2, MOD_EPDCP_2)
+ SAP_INFO(EMM_ENPDCP_SAP, MOD_EMM, MOD_ENPDCP)
+ SAP_INFO(EMM_ENPDCP_SAP, MOD_EMM_2, MOD_ENPDCP_2)
+
+ /* ERLC SAP */
+ SAP_INFO(ERRC_ERLCUL_SAP, MOD_ERRC, MOD_ERLCUL)
+ SAP_INFO(ERRC_ERLCDL_SAP, MOD_ERRC, MOD_ERLCDL)
+ SAP_INFO(EPDCP_ERLCUL_SAP, MOD_EPDCP, MOD_ERLCUL)
+ SAP_INFO(EPDCP_ERLCDL_SAP, MOD_EPDCP, MOD_ERLCDL)
+ SAP_INFO(ERLCUL_ERLCDL_SAP, MOD_ERLCUL, MOD_ERLCDL)
+
+ SAP_INFO(ERRC_ERLCUL_SAP, MOD_ERRC_2, MOD_ERLCUL_2)
+ SAP_INFO(ERRC_ERLCDL_SAP, MOD_ERRC_2, MOD_ERLCDL_2)
+
+ /* EMAC SAP */
+ SAP_INFO(EMAC_INT_EMAC_SAP, MOD_EMAC_INT, MOD_EMAC)
+ SAP_INFO(ERRC_EMAC_SAP, MOD_ERRC, MOD_EMAC)
+ SAP_INFO(ERRC_EMACMCH_SAP, MOD_ERRC, MOD_EMACMCH)
+ SAP_INFO(EMAC_ERLCUL_SAP, MOD_EMAC, MOD_ERLCUL)
+ SAP_INFO(ERLCUL_EMAC_SAP, MOD_ERLCUL, MOD_EMAC)
+ SAP_INFO(EMAC_ERLCDL_SAP, MOD_EMAC, MOD_ERLCDL)
+ SAP_INFO(RATDM_EMAC_SAP, MOD_RATDM, MOD_EMAC)
+ SAP_INFO(EMAC_EMAC_SAP, MOD_EMAC, MOD_EMAC)
+
+ SAP_INFO(ERRC_EMAC_SAP, MOD_ERRC_2, MOD_EMAC_2)
+ SAP_INFO(ERRC_EMACMCH_SAP, MOD_ERRC_2, MOD_EMACMCH_2)
+
+ SAP_INFO(LTE_DYN_SAP, MOD_EL2TASK, ANY)
+ SAP_INFO(LTE_TIMER_SAP, MOD_LTE_TIMER, ANY)
+
+ /* LTE test mode SAP */
+ SAP_INFO(DHL_ETSTM_SAP, MOD_DHL, MOD_ETSTM)
+ SAP_INFO(ETSTM_DHL_SAP, MOD_ETSTM, MOD_DHL)
+
+ /* SAP used to interface with the LTT */
+ SAP_INFO(LTT_SAP, MOD_LTT, ANY)
+ SAP_INFO(UTT_SAP, MOD_UTT, ANY)
+
+#ifdef UNIT_TEST
+ SAP_INFO(DS_DR_SAP, MOD_DHLSIM, MOD_DHL_READER)
+#endif
+ SAP_INFO(SYSTEM_DR_SAP, MOD_SYSTEM, MOD_DHL_READER)
+
+ SAP_INFO(TFTLIB_VGSM_SAP, MOD_TFTLIB, MOD_VGSM)
+ SAP_INFO(TFTLIB_SAP, MOD_TFTLIB, ANY)
+ SAP_INFO(TFTLIB_SAP, ANY, MOD_TFTLIB)
+ SAP_INFO(TFTLIB_DHL_SAP, MOD_TFTLIB, MOD_DHL)
+
+ SAP_INFO(NWSEL_MM_SAP, MOD_NWSEL, MOD_MM)
+ SAP_INFO(NWSEL_RATCM_SAP, MOD_NWSEL, MOD_RATCM)
+ SAP_INFO(NWSEL_RATDM_SAP, MOD_NWSEL, MOD_RATDM)
+ SAP_INFO(NWSEL_RATDM_SAP, MOD_NWSEL_2, MOD_RATDM_2)
+ SAP_INFO(NWSEL_RATDM_SAP, MOD_NWSEL_3, MOD_RATDM_3)
+ SAP_INFO(NWSEL_RATDM_SAP, MOD_NWSEL_4, MOD_RATDM_4)
+ SAP_INFO(DDM_NWSEL_SAP, MOD_DDM, MOD_NWSEL)
+ SAP_INFO(DDM_NWSEL_SAP, MOD_DDM_2, MOD_NWSEL_2)
+ SAP_INFO(NWSEL_NWSEL_SAP, MOD_NWSEL, MOD_NWSEL)
+
+ /* GMSS SAP */
+ SAP_INFO(RAC_GMSS_SAP, MOD_RAC, MOD_GMSS)
+ SAP_INFO(GMSS_NWSEL_SAP, MOD_GMSS, MOD_NWSEL)
+ SAP_INFO(GMSS_CSS_SAP, MOD_GMSS, MOD_CSS)
+ SAP_INFO(GMSS_SAP, MOD_GMSS, ANY)
+ SAP_INFO(GMSS_CVAL_SAP, MOD_GMSS, MOD_CVAL)
+
+ SAP_INFO(MRS_RAC_SAP, MOD_MRS, MOD_RAC)
+ SAP_INFO(MRS_RAC_SAP, MOD_MRS_2, MOD_RAC)
+ SAP_INFO(MRS_RRM_SAP, MOD_MRS, MOD_RRM_FDD)
+ SAP_INFO(MRS_RRM_SAP, MOD_MRS_2, MOD_RRM_FDD_2)
+ SAP_INFO(MRS_RRM_SAP, MOD_MRS, MOD_RRM_TDD)
+ SAP_INFO(MRS_RRM_SAP, MOD_MRS_2, MOD_RRM_TDD_2)
+ SAP_INFO(MRS_CSCE_SAP, MOD_MRS, MOD_CSCE)
+ SAP_INFO(MRS_CSCE_SAP, MOD_MRS, MOD_CSCE_FDD)
+ SAP_INFO(MRS_CSCE_SAP, MOD_MRS, MOD_CSCE_TDD)
+ SAP_INFO(MRS_CSCE_SAP, MOD_MRS_2, MOD_CSCE_2)
+ SAP_INFO(MRS_CSCE_SAP, MOD_MRS_2, MOD_CSCE_FDD_2)
+ SAP_INFO(MRS_RRCE_SAP, MOD_MRS, MOD_RRCE)
+ SAP_INFO(MRS_RRCE_SAP, MOD_MRS, MOD_RRCE_2)
+ SAP_INFO(MRS_RRCE_SAP, MOD_MRS, MOD_RRCE_TDD)
+ SAP_INFO(MRS_RRCE_SAP, MOD_MRS, MOD_RRCE_TDD_2)
+ SAP_INFO(MRS_USIME_SAP, MOD_MRS, MOD_USIME_FDD)
+ SAP_INFO(MRS_USIME_SAP, MOD_MRS, MOD_USIME_FDD_2)
+ SAP_INFO(MRS_USIME_SAP, MOD_MRS, MOD_USIME_FDD_3)
+ SAP_INFO(MRS_USIME_SAP, MOD_MRS, MOD_USIME_FDD_4)
+ SAP_INFO(MRS_USIME_SAP, MOD_MRS, MOD_USIME_TDD)
+ SAP_INFO(MRS_SIM_SAP, MOD_MRS, MOD_SIM)
+ SAP_INFO(MRS_EAS_SAP, MOD_MRS, MOD_EAS)
+ SAP_INFO(MRS_EAS_SAP, MOD_MRS_2, MOD_EAS_2)
+ SAP_INFO(MRS_EAS_SAP, MOD_ERRC, MOD_MRS)
+ SAP_INFO(MRS_EAS_SAP, MOD_ERRC_2, MOD_MRS_2)
+ SAP_INFO(MRS_EAS_SAP, MOD_NRRC, MOD_MRS)
+ SAP_INFO(MRS_NRRC_SAP, MOD_NRRC, MOD_MRS)
+ SAP_INFO(MRS_L4C_SAP, MOD_MRS, MOD_L4C)
+ SAP_INFO(MRS_L4C_SAP, MOD_MRS_2, MOD_L4C_2)
+ SAP_INFO(MRS_UPCM_SAP, MOD_MRS, MOD_UPCM)
+ SAP_INFO(MRS_UPCM_SAP, MOD_MRS_2, MOD_UPCM_2)
+
+ SAP_INFO(DHL_MRS_SAP, MOD_DHL, MOD_MRS)
+
+ SAP_INFO(GAS_EAS_SAP, MOD_ERRC, MOD_RRM_FDD)
+ SAP_INFO(GAS_EAS_SAP, MOD_ERRC_2, MOD_RRM_FDD_2)
+ SAP_INFO(GAS_EAS_SAP, MOD_ERRC, MOD_RRM_TDD)
+ SAP_INFO(GAS_EAS_SAP, MOD_ERRC_2, MOD_RRM_TDD_2)
+ SAP_INFO(GAS_EAS_SAP, MOD_RRM_FDD, MOD_EAS)
+ SAP_INFO(GAS_EAS_SAP, MOD_RRM_FDD_2, MOD_EAS_2)
+ SAP_INFO(GAS_EAS_SAP, MOD_RRM_TDD, MOD_EAS)
+ SAP_INFO(GAS_EAS_SAP, MOD_RRM_TDD_2, MOD_EAS_2)
+
+ SAP_INFO(EAS_CSCE_SAP, MOD_ERRC, MOD_CSCE)
+ SAP_INFO(EAS_CSCE_SAP, MOD_ERRC_2, MOD_CSCE_2)
+ SAP_INFO(EAS_CSCE_SAP, MOD_ERRC, MOD_CSCE_FDD)
+ SAP_INFO(EAS_CSCE_SAP, MOD_ERRC_2, MOD_CSCE_FDD_2)
+ SAP_INFO(EAS_CSCE_SAP, MOD_ERRC, MOD_CSCE_TDD)
+ SAP_INFO(EAS_RRCE_SAP, MOD_ERRC, MOD_RRCE)
+ SAP_INFO(EAS_RRCE_SAP, MOD_ERRC_2, MOD_RRCE_2)
+ SAP_INFO(EAS_RRCE_SAP, MOD_ERRC, MOD_RRCE_TDD)
+ SAP_INFO(EAS_MEME_SAP, MOD_ERRC, MOD_MEME_FDD)
+ SAP_INFO(EAS_MEME_SAP, MOD_ERRC_2, MOD_MEME_FDD_2)
+ SAP_INFO(EAS_MEME_SAP, MOD_ERRC, MOD_MEME_TDD)
+
+ SAP_INFO(EAS_RSVAE_SAP, MOD_ERRC, MOD_RSVAE)
+ /* for Gemini L+L RSVAE ERRC_x */
+ SAP_INFO(EAS_RSVAE_SAP, MOD_ERRC_2, MOD_RSVAE)
+ SAP_INFO(EAS_RSVAE_SAP, MOD_ERRC_3, MOD_RSVAE)
+ SAP_INFO(EAS_RSVAE_SAP, MOD_ERRC_4, MOD_RSVAE)
+ SAP_INFO(EAS_RSVAE_SAP, MOD_EAS, MOD_RSVAE)
+ SAP_INFO(EAS_RSVAE_SAP, MOD_EAS_2, MOD_RSVAE)
+ SAP_INFO(EAS_RSVAE_SAP, MOD_EAS_3, MOD_RSVAE)
+ SAP_INFO(EAS_RSVAE_SAP, MOD_EAS_4, MOD_RSVAE)
+
+ SAP_INFO(NRRC_RSVAN_SAP, MOD_NRRC, MOD_RSVAN)
+ /* for Gemini N+N RSVAN NRRC_x */
+ SAP_INFO(NRRC_RSVAN_SAP, MOD_NRRC_2, MOD_RSVAN)
+ SAP_INFO(NRRC_RSVAN_SAP, MOD_NRRC_3, MOD_RSVAN)
+ SAP_INFO(NRRC_RSVAN_SAP, MOD_NRRC_4, MOD_RSVAN)
+ //SAP_INFO(NRAS_RSVAN_SAP, MOD_NRAS, MOD_RSVAN)
+ //SAP_INFO(NRAS_RSVAN_SAP, MOD_NRAS_2, MOD_RSVAN)
+ //SAP_INFO(NRAS_RSVAN_SAP, MOD_NRAS_3, MOD_RSVAN)
+ //SAP_INFO(NRAS_RSVAN_SAP, MOD_NRAS_4, MOD_RSVAN)
+
+ SAP_INFO(ADR_ADR_SAP, MOD_ADR_FDD, MOD_ADR_FDD)
+ SAP_INFO(ADR_ADR_SAP, MOD_ADR_FDD_2, MOD_ADR_FDD_2)
+ SAP_INFO(SM_SM_SAP, MOD_SM, MOD_SM_2)
+ SAP_INFO(SM_SM_SAP, MOD_SM, MOD_SM)
+ SAP_INFO(SM_SM_SAP, MOD_SM_2, MOD_SM)
+ /*for MMDC TYPE2 single load*/
+ SAP_INFO(MM_EMM_SAP, MOD_MM_2, MOD_EMM)
+ SAP_INFO(MM_MM_SAP, MOD_MM_2, MOD_MM)
+ SAP_INFO(NWSEL_MM_SAP, MOD_NWSEL_2, MOD_MM_2)
+ SAP_INFO(NWSEL_RATCM_SAP, MOD_NWSEL_2, MOD_RATCM_2)
+ SAP_INFO(NWSEL_NWSEL_SAP, MOD_NWSEL_2, MOD_NWSEL_2)
+ /* GMSS SAP */
+ SAP_INFO(RAC_GMSS_SAP, MOD_RAC_2, MOD_GMSS_2)
+ SAP_INFO(GMSS_NWSEL_SAP, MOD_GMSS_2, MOD_NWSEL_2)
+ SAP_INFO(GMSS_SAP, MOD_GMSS_2, ANY)
+ SAP_INFO(GMSS_CVAL_SAP, MOD_GMSS_2, MOD_CVAL)
+
+ /* RSVA SAP */
+ SAP_INFO(RSVAS_SAP, MOD_RSVAS, ANY)
+ SAP_INFO(RSVAS_NIL_SAP, MOD_RSVAS, MOD_NIL)
+ SAP_INFO(RSVAS_RSVAU_SAP, MOD_RSVAS, MOD_RSVAU)
+ SAP_INFO(RSVAS_RSVAU_SAP, MOD_RSVAS, MOD_RSVAU_2)
+ SAP_INFO(RSVAS_L4C_SAP, MOD_RSVAS, MOD_L4C)
+ SAP_INFO(RSVAS_L4C_SAP, MOD_RSVAS, MOD_L4C_2)
+ SAP_INFO(RSVAS_MRS_SAP, MOD_RSVAS, MOD_MRS)
+ SAP_INFO(RSVAS_MRS_SAP, MOD_RSVAS, MOD_MRS_2)
+ SAP_INFO(RSVAS_URR_SAP, MOD_RSVAS, MOD_URR_FDD)
+ SAP_INFO(RSVAS_URR_SAP, MOD_RSVAS, MOD_URR_FDD_2)
+ SAP_INFO(RSVAS_URR_SAP, MOD_RSVAS, MOD_URR_FDD_3)
+ SAP_INFO(RSVAS_URR_SAP, MOD_RSVAS, MOD_URR_FDD_4)
+ SAP_INFO(RSVAS_URR_SAP, MOD_RSVAS, MOD_URR_TDD)
+ SAP_INFO(RSVAS_URR_SAP, MOD_RSVAS, MOD_URR_TDD_2)
+ SAP_INFO(RSVAS_URR_SAP, MOD_RSVAS, MOD_URR_TDD_3)
+ SAP_INFO(RSVAS_URR_SAP, MOD_RSVAS, MOD_URR_TDD_4)
+ SAP_INFO(RSVAS_RRCE_SAP, MOD_RSVAS, MOD_RRCE)
+ SAP_INFO(RSVAS_RRCE_SAP, MOD_RSVAS, MOD_RRCE_2)
+ SAP_INFO(RSVAS_RRCE_SAP, MOD_RSVAS, MOD_RRCE_TDD)
+ SAP_INFO(RSVAS_RRCE_SAP, MOD_RSVAS, MOD_RRCE_TDD_2)
+ SAP_INFO(RSVAS_CSCE_SAP, MOD_RSVAS, MOD_CSCE)
+ SAP_INFO(RSVAS_CSCE_SAP, MOD_RSVAS, MOD_CSCE_FDD)
+ SAP_INFO(RSVAS_CSCE_SAP, MOD_RSVAS, MOD_CSCE_TDD)
+ SAP_INFO(RSVAS_CSCE_SAP, MOD_RSVAS, MOD_CSCE_2)
+ SAP_INFO(RSVAS_CSCE_SAP, MOD_RSVAS, MOD_CSCE_FDD_2)
+ SAP_INFO(RSVAS_UL2_SAP, MOD_RSVAS, MOD_UL2_FDD)
+ SAP_INFO(RSVAS_UL2_SAP, MOD_RSVAS, MOD_UL2_FDD_2)
+ SAP_INFO(RSVAS_UL2_SAP, MOD_RSVAS, MOD_UL2_FDD_3)
+ SAP_INFO(RSVAS_UL2_SAP, MOD_RSVAS, MOD_UL2_FDD_4)
+ SAP_INFO(RSVAS_UL2D_SAP, MOD_RSVAS, MOD_UL2D_FDD)
+ SAP_INFO(RSVAS_UL2D_SAP, MOD_RSVAS, MOD_UL2D_FDD_2)
+ SAP_INFO(RSVAS_UL2D_SAP, MOD_RSVAS, MOD_UL2D_FDD_3)
+ SAP_INFO(RSVAS_UL2D_SAP, MOD_RSVAS, MOD_UL2D_FDD_4)
+ SAP_INFO(RSVAS_RRM_SAP, MOD_RSVAS, MOD_RRM_FDD)
+ SAP_INFO(RSVAS_RRM_SAP, MOD_RSVAS, MOD_RRM_TDD)
+ SAP_INFO(RSVAS_RRM_SAP, MOD_RSVAS, MOD_RRM_FDD_2)
+ SAP_INFO(RSVAS_RRM_SAP, MOD_RSVAS, MOD_RRM_TDD_2)
+ SAP_INFO(RSVAS_RRM_SAP, MOD_RSVAS, MOD_RRM_FDD_3)
+ SAP_INFO(RSVAS_RRM_SAP, MOD_RSVAS, MOD_RRM_TDD_3)
+ SAP_INFO(RSVAS_RRM_SAP, MOD_RSVAS, MOD_RRM_FDD_4)
+ SAP_INFO(RSVAS_RRM_SAP, MOD_RSVAS, MOD_RRM_TDD_4)
+ SAP_INFO(RSVAS_MPAL_SAP, MOD_RSVAS, MOD_MPAL_FDD)
+ SAP_INFO(RSVAS_MPAL_SAP, MOD_RSVAS, MOD_MPAL_TDD)
+ SAP_INFO(RSVAS_MPAL_SAP, MOD_RSVAS, MOD_MPAL_FDD_2)
+ SAP_INFO(RSVAS_MPAL_SAP, MOD_RSVAS, MOD_MPAL_TDD_2)
+ SAP_INFO(RSVAS_MPAL_SAP, MOD_RSVAS, MOD_MPAL_FDD_3)
+ SAP_INFO(RSVAS_MPAL_SAP, MOD_RSVAS, MOD_MPAL_TDD_3)
+ SAP_INFO(RSVAS_MPAL_SAP, MOD_RSVAS, MOD_MPAL_FDD_4)
+ SAP_INFO(RSVAS_MPAL_SAP, MOD_RSVAS, MOD_MPAL_TDD_4)
+ SAP_INFO(RSVAS_ERRC_SAP, MOD_RSVAS, MOD_ERRC)
+ SAP_INFO(RSVAS_ERRC_SAP, MOD_RSVAS, MOD_ERRC_2)
+ SAP_INFO(RSVAS_EL2HPORTAL_SAP, MOD_RSVAS, MOD_EL2HPORTAL)
+ SAP_INFO(RSVAS_EMACDLPORTAL_SAP, MOD_RSVAS, MOD_EMACDLPORTAL)
+ SAP_INFO(RSVAS_EL2PORTAL_SAP, MOD_RSVAS, MOD_EL2PORTAL)
+ SAP_INFO(RSVAS_UL1_SAP, MOD_RSVAS, MOD_UL1)
+ SAP_INFO(RSVAS_UL1_SAP, MOD_RSVAS, MOD_UL1_2)
+ SAP_INFO(RSVAS_TL1_SAP, MOD_RSVAS, MOD_TL1)
+ SAP_INFO(RSVAS_L1_SAP, MOD_RSVAS, MOD_L1)
+ SAP_INFO(RSVAS_L1_SAP, MOD_RSVAS, MOD_L1_2)
+ SAP_INFO(RSVAS_L1_SAP, MOD_RSVAS, MOD_L1_3)
+ SAP_INFO(RSVAS_L1_SAP, MOD_RSVAS, MOD_L1_4)
+ SAP_INFO(RSVAS_LL1_SAP, MOD_RSVAS, MOD_MLL1)
+ SAP_INFO(RSVAS_EL1_SAP, MOD_RSVAS, MOD_EL1)
+ SAP_INFO(RSVAS_RAC_SAP, MOD_RSVAS, MOD_RAC)
+ SAP_INFO(RSVAS_RAC_SAP, MOD_RSVAS, MOD_RAC_2)
+ SAP_INFO(RSVAS_CPSW_SAP, MOD_RSVAS, MOD_CPSW)
+ SAP_INFO(RSVAS_CHSC_SAP, MOD_RSVAS, MOD_CHSC)
+ SAP_INFO(RSVAS_NRRC_SAP, MOD_RSVAS, MOD_NRRC)
+ SAP_INFO(RSVAS_NRRC_SAP, MOD_RSVAS, MOD_NRRC_2)
+ SAP_INFO(RSVAS_NL1_SAP, MOD_RSVAS, MOD_NL1)
+ SAP_INFO(RSVAS_NL1_SAP, MOD_RSVAS, MOD_NL1_2)
+ SAP_INFO(RSVAS_NAS_SV_SAP, MOD_RSVAS, MOD_NAS_SV)
+ SAP_INFO(RSVAS_NAS_SV_SAP, MOD_RSVAS, MOD_NAS_SV_2)
+
+ SAP_INFO(RSVAK_SAP, MOD_RSVAN, MOD_RSVAK)
+
+ SAP_INFO(MSPM_SAP, MOD_ESM, MOD_MSPM)
+ SAP_INFO(MSPM_SAP, MOD_ESM_2, MOD_MSPM)
+ SAP_INFO(MSPM_SAP, MOD_ESM_3, MOD_MSPM)
+ SAP_INFO(MSPM_SAP, MOD_ESM_4, MOD_MSPM)
+ SAP_INFO(MSPM_SAP, MOD_L4C, MOD_MSPM)
+ SAP_INFO(MSPM_SAP, MOD_L4C_2, MOD_MSPM)
+ SAP_INFO(MSPM_SAP, MOD_L4C_3, MOD_MSPM)
+ SAP_INFO(MSPM_SAP, MOD_L4C_4, MOD_MSPM)
+
+ SAP_INFO(EVAL_CPSW_SAP, MOD_EVAL, MOD_CPSW)
+ SAP_INFO(EVAL_CPSW_SAP, MOD_EVAL_2, MOD_CPSW)
+ SAP_INFO(SLCE_RSVAU_SAP, MOD_SLCE, MOD_RSVAU)
+ SAP_INFO(SLCE_RSVAU_SAP, MOD_SLCE_2, MOD_RSVAU)
+ SAP_INFO(SLCE_RSVAU_SAP, MOD_SLCE_TDD, MOD_RSVAU)
+ SAP_INFO(SLCE_RSVAU_SAP, MOD_SLCE_TDD_2, MOD_RSVAU)
+ SAP_INFO(RSVAU_UL1_SAP, MOD_RSVAU, MOD_UL1)
+ SAP_INFO(RSVAU_UL1_SAP, MOD_RSVAU, MOD_UL1_2)
+ SAP_INFO(CSE_RSVAU_SAP, MOD_CSE, MOD_RSVAU)
+ SAP_INFO(CSE_RSVAU_SAP, MOD_CSE_TDD, MOD_RSVAU)
+ SAP_INFO(CSE_RSVAU_SAP, MOD_CSE_2, MOD_RSVAU)
+
+ SAP_INFO(RSVAK_SAP, MOD_RSVAK, MOD_RSVAN)
+
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_RSVAS)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_L4C)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_L4C_2)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_L4C_3)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_L4C_4)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_ESM)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_ESM_2)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_ESM_3)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_ESM_4)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_ERRC)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_ERRC_2)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_ERRC_3)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_ERRC_4)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_RRCE_FDD)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_RRCE_FDD_2)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_RRCE_FDD_3)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_RRCE_FDD_4)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_RRCE_TDD)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_RRCE_TDD_2)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_RRCE_TDD_3)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_RRCE_TDD_4)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_RRM_FDD)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_RRM_FDD_2)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_RRM_FDD_3)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_RRM_FDD_4)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_RRM_TDD)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_RRM_TDD_2)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_RRM_TDD_3)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_RRM_TDD_4)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_CPSW)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_VDM)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_VDM_2)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_VDM_3)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_VDM_4)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_SDM)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_SDM_2)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_SDM_3)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_SDM_4)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_NRRC)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_NRRC_1)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_NRRC_2)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_NRRC_3)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_NRRC_4)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_VGSM)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_VGSM_1)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_VGSM_2)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_VGSM_3)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_VGSM_4)
+
+ SAP_INFO(IWLAN_EVHD_WSEM_SAP, MOD_IWLAN_EVHD, ANY)
+ SAP_INFO(IWLAN_EVHD_WMOB_SAP, MOD_IWLAN_EVHD, ANY)
+ SAP_INFO(IWLAN_EVHD_WSEM_SAP, MOD_IWLAN_EVHD_2, ANY)
+ SAP_INFO(IWLAN_EVHD_WMOB_SAP, MOD_IWLAN_EVHD_2, ANY)
+ SAP_INFO(IWLAN_EVHD_WSEM_SAP, MOD_IWLAN_EVHD_3, ANY)
+ SAP_INFO(IWLAN_EVHD_WMOB_SAP, MOD_IWLAN_EVHD_3, ANY)
+ SAP_INFO(IWLAN_EVHD_WSEM_SAP, MOD_IWLAN_EVHD_4, ANY)
+ SAP_INFO(IWLAN_EVHD_WMOB_SAP, MOD_IWLAN_EVHD_4, ANY)
+
+ SAP_INFO(IWLAN_WMOB_SAP, MOD_IWLAN_WMOB, ANY)
+ SAP_INFO(IWLAN_WSEM_SAP, MOD_IWLAN_WSEM, ANY)
+ SAP_INFO(IWLAN_WMOB_SAP, MOD_IWLAN_WMOB_2, ANY)
+ SAP_INFO(IWLAN_WSEM_SAP, MOD_IWLAN_WSEM_2, ANY)
+ SAP_INFO(IWLAN_WMOB_SAP, MOD_IWLAN_WMOB_3, ANY)
+ SAP_INFO(IWLAN_WSEM_SAP, MOD_IWLAN_WSEM_3, ANY)
+ SAP_INFO(IWLAN_WMOB_SAP, MOD_IWLAN_WMOB_4, ANY)
+ SAP_INFO(IWLAN_WSEM_SAP, MOD_IWLAN_WSEM_4, ANY)
+
+ SAP_INFO(ATP_IWLAN_SAP, MOD_IWLAN, MOD_ATP)
+ SAP_INFO(ATP_IWLAN_SAP, MOD_ATP, MOD_IWLAN)
+ SAP_INFO(ATP_IWLAN_SAP, MOD_IWLAN_2, MOD_ATP_2)
+ SAP_INFO(ATP_IWLAN_SAP, MOD_ATP_2, MOD_IWLAN_2)
+ SAP_INFO(ATP_IWLAN_SAP, MOD_IWLAN_3, MOD_ATP_3)
+ SAP_INFO(ATP_IWLAN_SAP, MOD_ATP_3, MOD_IWLAN_3)
+ SAP_INFO(ATP_IWLAN_SAP, MOD_IWLAN_4, MOD_ATP_4)
+ SAP_INFO(ATP_IWLAN_SAP, MOD_ATP_4, MOD_IWLAN_4)
+
+ SAP_INFO(IWLAN_ERRC_SAP, MOD_IWLAN, MOD_ERRC)
+ SAP_INFO(IWLAN_ERRC_SAP, MOD_ERRC, MOD_IWLAN)
+ SAP_INFO(IWLAN_ERRC_SAP, MOD_IWLAN_2, MOD_ERRC_2)
+ SAP_INFO(IWLAN_ERRC_SAP, MOD_ERRC_2, MOD_IWLAN_2)
+ SAP_INFO(IWLAN_ERRC_SAP, MOD_IWLAN_3, MOD_ERRC_3)
+ SAP_INFO(IWLAN_ERRC_SAP, MOD_ERRC_3, MOD_IWLAN_3)
+ SAP_INFO(IWLAN_ERRC_SAP, MOD_IWLAN_4, MOD_ERRC_4)
+ SAP_INFO(IWLAN_ERRC_SAP, MOD_ERRC_4, MOD_IWLAN_4)
+
+ /* IMC */
+ SAP_INFO(DHL_IMC_SAP, ANY, MOD_IMC)
+ SAP_INFO(DHL_IMC_SAP, MOD_IMC, ANY)
+ SAP_INFO(DHL_IMC_SAP, ANY, MOD_IMC_2)
+ SAP_INFO(DHL_IMC_SAP, MOD_IMC_2, ANY)
+ SAP_INFO(DHL_IMC_SAP, ANY, MOD_IMC_3)
+ SAP_INFO(DHL_IMC_SAP, MOD_IMC_3, ANY)
+ SAP_INFO(DHL_IMC_SAP, ANY, MOD_IMC_4)
+ SAP_INFO(DHL_IMC_SAP, MOD_IMC_4, ANY)
+ SAP_INFO(IMC_IMC_SAP, MOD_IMC, MOD_IMC)
+ SAP_INFO(IMC_IMC_SAP, MOD_IMC_2, MOD_IMC_2)
+ SAP_INFO(IMC_IMC_SAP, MOD_IMC_3, MOD_IMC_3)
+ SAP_INFO(IMC_IMC_SAP, MOD_IMC_4, MOD_IMC_4)
+ SAP_INFO(ATP_IMC_SAP, MOD_ATP, MOD_IMC)
+ SAP_INFO(ATP_IMC_SAP, MOD_IMC, MOD_ATP)
+ SAP_INFO(ATP_IMC_SAP, MOD_ATP_2, MOD_IMC_2)
+ SAP_INFO(ATP_IMC_SAP, MOD_IMC_2, MOD_ATP_2)
+ SAP_INFO(ATP_IMC_SAP, MOD_ATP_3, MOD_IMC_3)
+ SAP_INFO(ATP_IMC_SAP, MOD_IMC_3, MOD_ATP_3)
+ SAP_INFO(ATP_IMC_SAP, MOD_ATP_4, MOD_IMC_4)
+ SAP_INFO(ATP_IMC_SAP, MOD_IMC_4, MOD_ATP_4)
+ SAP_INFO(IMC_LTECSR_SAP, MOD_LTECSR, MOD_IMC)
+ SAP_INFO(LTECSR_NRRC_SAP, MOD_NRRC, MOD_LTECSR)
+ SAP_INFO(IMC_LTECSR_SAP, MOD_IMC, MOD_LTECSR)
+ SAP_INFO(IMC_LTECSR_SAP, MOD_LTECSR, MOD_IMC_2)
+ SAP_INFO(IMC_LTECSR_SAP, MOD_IMC_2, MOD_LTECSR)
+ SAP_INFO(IMC_LTECSR_SAP, MOD_LTECSR, MOD_IMC_3)
+ SAP_INFO(IMC_LTECSR_SAP, MOD_IMC_3, MOD_LTECSR)
+ SAP_INFO(IMC_LTECSR_SAP, MOD_LTECSR, MOD_IMC_3)
+ SAP_INFO(IMC_LTECSR_SAP, MOD_IMC_3, MOD_LTECSR)
+ SAP_INFO(IMCB_IMC_SAP, MOD_IMC, MOD_IMCB)
+ SAP_INFO(IMCB_IMC_SAP, MOD_IMCB, MOD_IMC)
+ SAP_INFO(IMCB_IMC_SAP, MOD_IMC_2, MOD_IMCB_2)
+ SAP_INFO(IMCB_IMC_SAP, MOD_IMCB_2, MOD_IMC_2)
+ SAP_INFO(IMCB_IMC_SAP, MOD_IMC_3, MOD_IMCB_3)
+ SAP_INFO(IMCB_IMC_SAP, MOD_IMCB_3, MOD_IMC_3)
+ SAP_INFO(IMCB_IMC_SAP, MOD_IMC_4, MOD_IMCB_4)
+ SAP_INFO(IMCB_IMC_SAP, MOD_IMCB_4, MOD_IMC_4)
+ SAP_INFO(IMC_UPCM_SAP, MOD_IMC, MOD_UPCM)
+ SAP_INFO(IMC_UPCM_SAP, MOD_UPCM, MOD_IMC)
+ SAP_INFO(IMC_UPCM_SAP, MOD_IMC_2, MOD_UPCM_2)
+ SAP_INFO(IMC_UPCM_SAP, MOD_UPCM_2, MOD_IMC_2)
+ SAP_INFO(IMC_UPCM_SAP, MOD_IMC_3, MOD_UPCM_3)
+ SAP_INFO(IMC_UPCM_SAP, MOD_UPCM_3, MOD_IMC_3)
+ SAP_INFO(IMC_UPCM_SAP, MOD_IMC_4, MOD_UPCM_4)
+ SAP_INFO(IMC_UPCM_SAP, MOD_UPCM_4, MOD_IMC_4)
+ SAP_INFO(IMC_IWLAN_SAP, MOD_IWLAN, MOD_IMC)
+ SAP_INFO(IMC_IWLAN_SAP, MOD_IMC, MOD_IWLAN)
+ SAP_INFO(IMC_IWLAN_SAP, MOD_IWLAN_2, MOD_IMC_2)
+ SAP_INFO(IMC_IWLAN_SAP, MOD_IMC_2, MOD_IWLAN_2)
+ SAP_INFO(IMC_IWLAN_SAP, MOD_IWLAN_3, MOD_IMC_3)
+ SAP_INFO(IMC_IWLAN_SAP, MOD_IMC_3, MOD_IWLAN_3)
+ SAP_INFO(IMC_IWLAN_SAP, MOD_IWLAN_4, MOD_IMC_4)
+ SAP_INFO(IMC_IWLAN_SAP, MOD_IMC_4, MOD_IWLAN_4)
+ SAP_INFO(D2_IMC_SAP, MOD_D2, MOD_IMC)
+ SAP_INFO(D2_IMC_SAP, MOD_IMC, MOD_D2)
+ SAP_INFO(D2_IMC_SAP, MOD_D2_2, MOD_IMC_2)
+ SAP_INFO(D2_IMC_SAP, MOD_IMC_2, MOD_D2_2)
+ SAP_INFO(D2_IMC_SAP, MOD_D2_3, MOD_IMC_3)
+ SAP_INFO(D2_IMC_SAP, MOD_IMC_3, MOD_D2_3)
+ SAP_INFO(D2_IMC_SAP, MOD_D2_4, MOD_IMC_4)
+ SAP_INFO(D2_IMC_SAP, MOD_IMC_4, MOD_D2_4)
+ SAP_INFO(L4C_IMC_SAP, MOD_L4C, MOD_IMC)
+ SAP_INFO(L4C_IMC_SAP, MOD_IMC, MOD_L4C)
+ SAP_INFO(L4C_IMC_SAP, MOD_L4C_2, MOD_IMC_2)
+ SAP_INFO(L4C_IMC_SAP, MOD_IMC_2, MOD_L4C_2)
+ SAP_INFO(L4C_IMC_SAP, MOD_L4C_3, MOD_IMC_3)
+ SAP_INFO(L4C_IMC_SAP, MOD_IMC_3, MOD_L4C_3)
+ SAP_INFO(L4C_IMC_SAP, MOD_L4C_4, MOD_IMC_4)
+ SAP_INFO(L4C_IMC_SAP, MOD_IMC_4, MOD_L4C_4)
+ SAP_INFO(MSPM_SAP, MOD_IMC, MOD_MSPM)
+ SAP_INFO(MSPM_SAP, MOD_IMC_2, MOD_MSPM)
+ SAP_INFO(MSPM_SAP, MOD_IMC_3, MOD_MSPM)
+ SAP_INFO(MSPM_SAP, MOD_IMC_4, MOD_MSPM)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_IMC)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_IMC_2)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_IMC_3)
+ SAP_INFO(MSPM_SAP, MOD_MSPM, MOD_IMC_4)
+
+ /* SDM */
+ SAP_INFO(SDM_ATP_SAP, MOD_SDM, MOD_ATP)
+ SAP_INFO(SDM_ATP_SAP, MOD_ATP, MOD_SDM)
+ SAP_INFO(SDM_IMC_SAP, MOD_SDM, MOD_IMC)
+ SAP_INFO(SDM_IMC_SAP, MOD_IMC, MOD_SDM)
+ SAP_INFO(SDM_IMC_SAP, MOD_SDM_2, MOD_IMC_2)
+ SAP_INFO(SDM_IMC_SAP, MOD_IMC_2, MOD_SDM_2)
+ SAP_INFO(SDM_IMC_SAP, MOD_SDM_3, MOD_IMC_3)
+ SAP_INFO(SDM_IMC_SAP, MOD_IMC_3, MOD_SDM_3)
+ SAP_INFO(SDM_IMC_SAP, MOD_SDM_4, MOD_IMC_4)
+ SAP_INFO(SDM_IMC_SAP, MOD_IMC_4, MOD_SDM_4)
+ SAP_INFO(SDM_IMC_SAP, MOD_SDM, MOD_IMCSMS)
+ SAP_INFO(SDM_ATP_SAP, MOD_SDM_2, MOD_ATP_2)
+ SAP_INFO(SDM_ATP_SAP, MOD_ATP_2, MOD_SDM_2)
+ SAP_INFO(SDM_IMC_SAP, MOD_SDM_2, MOD_IMCSMS_2)
+ SAP_INFO(SDM_CVAL_SAP, MOD_SDM, MOD_CVAL)
+ SAP_INFO(SDM_CVAL_SAP, MOD_SDM_2, MOD_CVAL)
+ SAP_INFO(SDM_IWLAN_SAP, MOD_SDM, MOD_IWLAN)
+ SAP_INFO(SDM_IWLAN_SAP, MOD_IWLAN, MOD_SDM)
+ SAP_INFO(SDM_IWLAN_SAP, MOD_SDM_2, MOD_IWLAN_2)
+ SAP_INFO(SDM_IWLAN_SAP, MOD_IWLAN_2, MOD_SDM_2)
+
+ /* VDM */
+ SAP_INFO(VDM_ATP_SAP, MOD_VDM, MOD_ATP)
+ SAP_INFO(VDM_IMC_SAP, MOD_VDM, MOD_IMC)
+ SAP_INFO(VDM_IMC_SAP, MOD_IMC, MOD_VDM)
+ SAP_INFO(VDM_IMC_SAP, MOD_VDM_2, MOD_IMC_2)
+ SAP_INFO(VDM_IMC_SAP, MOD_IMC_2, MOD_VDM_2)
+ SAP_INFO(VDM_IMC_SAP, MOD_VDM_3, MOD_IMC_3)
+ SAP_INFO(VDM_IMC_SAP, MOD_IMC_3, MOD_VDM_3)
+ SAP_INFO(VDM_IMC_SAP, MOD_VDM_4, MOD_IMC_4)
+ SAP_INFO(VDM_IMC_SAP, MOD_IMC_4, MOD_VDM_4)
+ SAP_INFO(VDM_CTRL_TRK_SAP, MOD_VDM_CTRL, MOD_VDM_TRK)
+ SAP_INFO(VDM_CTRL_ADS_SAP, MOD_VDM_CTRL, MOD_VDM_ADS)
+ SAP_INFO(VDM_CTRL_VCC_SAP, MOD_VDM_CTRL, MOD_VDM_VCC)
+ SAP_INFO(VDM_TRK_ADS_SAP, MOD_VDM_TRK, MOD_VDM_ADS)
+ SAP_INFO(VDM_TRK_VCC_SAP, MOD_VDM_TRK, MOD_VDM_VCC)
+ SAP_INFO(VDM_ADS_VCC_SAP, MOD_VDM_ADS, MOD_VDM_VCC)
+ SAP_INFO(VDM_ATP_SAP, MOD_VDM_2, MOD_ATP_2)
+ SAP_INFO(VDM_CTRL_TRK_SAP, MOD_VDM_CTRL_2, MOD_VDM_TRK_2)
+ SAP_INFO(VDM_CTRL_ADS_SAP, MOD_VDM_CTRL_2, MOD_VDM_ADS_2)
+ SAP_INFO(VDM_CTRL_VCC_SAP, MOD_VDM_CTRL_2, MOD_VDM_VCC_2)
+ SAP_INFO(VDM_TRK_ADS_SAP, MOD_VDM_TRK_2, MOD_VDM_ADS_2)
+ SAP_INFO(VDM_TRK_VCC_SAP, MOD_VDM_TRK_2, MOD_VDM_VCC_2)
+ SAP_INFO(VDM_ADS_VCC_SAP, MOD_VDM_ADS_2, MOD_VDM_VCC_2)
+ SAP_INFO(VDM_L4B_SAP, MOD_VDM, MOD_L4B)
+ SAP_INFO(VDM_L4B_SAP, MOD_VDM_2, MOD_L4B_2)
+ SAP_INFO(VDM_CVAL_SAP, MOD_VDM, MOD_CVAL)
+ SAP_INFO(VDM_L4C_SAP, MOD_VDM, MOD_L4C)
+ SAP_INFO(VDM_L4C_SAP, MOD_VDM_2, MOD_L4C_2)
+ SAP_INFO(VDM_L4C_SAP, MOD_VDM_3, MOD_L4C_3)
+ SAP_INFO(VDM_L4C_SAP, MOD_VDM_4, MOD_L4C_4)
+ SAP_INFO(VDM_GMSS_SAP, MOD_VDM, MOD_GMSS)
+ SAP_INFO(VDM_GMSS_SAP, MOD_VDM_2, MOD_GMSS_2)
+ SAP_INFO(VDM_GMSS_SAP, MOD_VDM_3, MOD_GMSS_3)
+ SAP_INFO(VDM_GMSS_SAP, MOD_VDM_4, MOD_GMSS_4)
+ SAP_INFO(VDM_EVAL_SAP, MOD_VDM, MOD_EVAL)
+ SAP_INFO(VDM_EVAL_SAP, MOD_VDM_2, MOD_EVAL_2)
+ SAP_INFO(VDM_EVAL_SAP, MOD_VDM_3, MOD_EVAL_3)
+ SAP_INFO(VDM_EVAL_SAP, MOD_VDM_4, MOD_EVAL_4)
+
+ // LTECSR
+ SAP_INFO(LTECSR_DHL_SAP, ANY, MOD_LTECSR)
+ SAP_INFO(LTECSR_DHL_SAP, MOD_LTECSR, ANY)
+
+ // IMCSMS
+ SAP_INFO(IMCSMS_IMC_SAP, MOD_IMCSMS, MOD_IMC)
+ SAP_INFO(ATP_IMC_SAP, MOD_ATP, MOD_IMCSMS)
+ SAP_INFO(IMCSMS_IMC_SAP, MOD_IMCSMS_2, MOD_IMC_2)
+ SAP_INFO(ATP_IMC_SAP, MOD_ATP_2, MOD_IMCSMS_2)
+ SAP_INFO(IMCSMS_CVAL_SAP, MOD_IMCSMS, MOD_CVAL)
+ SAP_INFO(IMCSMS_CVAL_SAP, MOD_IMCSMS_2, MOD_CVAL)
+ SAP_INFO(IMCSMS_EVAL_SAP, MOD_IMCSMS, MOD_EVAL)
+ SAP_INFO(IMCSMS_EVAL_SAP, MOD_IMCSMS_2, MOD_EVAL_2)
+ SAP_INFO(IMCSMS_EVAL_SAP, MOD_IMCSMS_3, MOD_EVAL_3)
+ SAP_INFO(SMS_IMCSMS_SAP, MOD_SMS, MOD_IMCSMS)
+ SAP_INFO(SMS_IMCSMS_SAP, MOD_SMS_2, MOD_IMCSMS_2)
+ SAP_INFO(SMS_IMCSMS_SAP, MOD_SMS_3, MOD_IMCSMS_3)
+ SAP_INFO(IMCSMS_IMCSMS_SAP, MOD_IMCSMS, MOD_IMCSMS)
+ SAP_INFO(IMCSMS_IMCSMS_SAP, MOD_IMCSMS_2, MOD_IMCSMS_2)
+ SAP_INFO(IMCSMS_IMCSMS_SAP, MOD_IMCSMS_3, MOD_IMCSMS_3)
+ SAP_INFO(IMCSMS_IMCSMS_SAP, MOD_IMCSMS_4, MOD_IMCSMS_4)
+
+ //IMCSMS and IMSUA
+ SAP_INFO(IMCSMS_IMSUA_SAP, MOD_IMCSMS, MOD_IMSUA)
+ SAP_INFO(IMCSMS_IMSUA_SAP, MOD_IMCSMS_2, MOD_IMSUA_2)
+
+ SAP_INFO(ATP_IO_SAP, MOD_ATP_IO, MOD_ATP)
+ SAP_INFO(ATP_IO_SAP, MOD_ATP_IO, MOD_ATP_2)
+ SAP_INFO(ATP_IO_SAP, MOD_ATP_IO, MOD_ATP_3)
+ SAP_INFO(ATP_IO_SAP, MOD_ATP_IO, MOD_ATP_4)
+
+ SAP_INFO(ATP_IO_L4C_SAP, MOD_ATP_IO, MOD_L4C)
+ SAP_INFO(ATP_IO_L4C_SAP, MOD_ATP_IO, MOD_L4C_2)
+ SAP_INFO(ATP_IO_L4C_SAP, MOD_ATP_IO, MOD_L4C_3)
+ SAP_INFO(ATP_IO_L4C_SAP, MOD_ATP_IO, MOD_L4C_4)
+
+ SAP_INFO(ATP_L4BNW_SAP, MOD_ATP, MOD_L4BNW)
+ SAP_INFO(ATP_L4BNW_SAP, MOD_ATP_2, MOD_L4BNW_2)
+ SAP_INFO(ATP_L4BNW_SAP, MOD_ATP_3, MOD_L4BNW_3)
+ SAP_INFO(ATP_L4BNW_SAP, MOD_ATP_4, MOD_L4BNW_4)
+
+ SAP_INFO(SMSAL_SMSAL_SAP,MOD_SMSAL,MOD_SMSAL)
+ SAP_INFO(SMSAL_SMSAL_SAP,MOD_SMSAL_2,MOD_SMSAL_2)
+ SAP_INFO(SMSAL_SMSAL_SAP,MOD_SMSAL_3,MOD_SMSAL_3)
+ SAP_INFO(SMSAL_SMSAL_SAP,MOD_SMSAL_4,MOD_SMSAL_4)
+ SAP_INFO(SMSAL_IMCSMS_SAP,MOD_SMSAL,MOD_IMCSMS)
+ SAP_INFO(SMSAL_IMCSMS_SAP,MOD_SMSAL_2,MOD_IMCSMS_2)
+ SAP_INFO(SMSAL_IMCSMS_SAP,MOD_SMSAL_3,MOD_IMCSMS_3)
+ SAP_INFO(SMSAL_IMCSMS_SAP,MOD_SMSAL_4,MOD_IMCSMS_4)
+#if defined (__U4G_ADAPTOR__)
+ /* for U4G adaptor.*/
+ SAP_INFO(MLL1_UL1B_SAP,MOD_MLL1,MOD_UL1B)
+ SAP_INFO(UMAC_UL1B_SAP,MOD_UMAC_FDD,MOD_UL1B)
+ SAP_INFO(SLCE_UL1B_SAP,MOD_SLCE,MOD_UL1B)
+ SAP_INFO(SLCE_UL1B_SAP,MOD_SLCE_TDD,MOD_UL1B)
+ SAP_INFO(MEME_UL1B_SAP,MOD_MEME_FDD,MOD_UL1B)
+ SAP_INFO(SIBE_UL1B_SAP,MOD_SIBE,MOD_UL1B)
+ SAP_INFO(ADR_UL1B_SAP, MOD_ADR_FDD, MOD_UL1B)
+ #ifndef __UE_SIMULATOR__
+ SAP_INFO(U3L1_UL1B_SAP,MOD_U3L1,MOD_UL1B) /* for UL1B unit test.*/
+ #endif
+
+ SAP_INFO(ERRC_EL1B_SAP, MOD_ERRC, MOD_EL1B)
+ SAP_INFO(ERRC_EL1B_SAP, MOD_ERRC_2, MOD_EL1B_2)
+ SAP_INFO(EMAC_EL1B_SAP, MOD_EMAC, MOD_EL1B)
+ SAP_INFO(EL1B_EL1B_SAP, MOD_EL1, MOD_EL1B)
+ SAP_INFO(EMAC_EL1BTX_SAP, MOD_EMAC, MOD_EL1B)
+ SAP_INFO(EL1B_EL1BTX_SAP, MOD_EL1B, MOD_EL1B)
+#endif
+ SAP_INFO(ERRC_LBS_SAP,MOD_ERRC_MOB,MOD_LBS)
+ SAP_INFO(ERRC_LBS_SAP,MOD_ERRC_MOB_2,MOD_LBS)
+ SAP_INFO(ERRC_LBS_SAP,MOD_LBS,MOD_ERRC_MOB)
+ SAP_INFO(ERRC_LBS_SAP,MOD_LBS,MOD_ERRC_MOB_2)
+ SAP_INFO(ERRC_GPS_SAP, MOD_GPS, MOD_ERRC)
+ SAP_INFO(MOB_LMEME_SAP,MOD_ERRC_MOB,MOD_LMEME_FDD)/*similar to LMOB_LMEME_SAP */
+ SAP_INFO(MOB_LMEME_SAP,MOD_ERRC_MOB_2,MOD_LMEME_FDD_2)/*similar to LMOB_LMEME_SAP */
+ SAP_INFO(MOB_LMEME_SAP,MOD_ERRC_MOB,MOD_LMEME_TDD)/*similar to LMOB_LMEME_SAP */
+ SAP_INFO(MOB_GISE_SAP,MOD_ERRC_MOB,MOD_GISE) /*similar to LMOB_GISE_SAP */
+ SAP_INFO(MOB_GISE_SAP,MOD_ERRC_MOB_2,MOD_GISE_2) /*similar to LMOB_GISE_SAP */
+/* __LAS_MOB__ begin*/
+ SAP_INFO(MOB_LMOB_SAP,MOD_ERRC_MOB,MOD_LMOB)
+ SAP_INFO(MOB_LMOB_SAP,MOD_LMOB,MOD_ERRC_MOB)
+ SAP_INFO(LMOB_EL1_SAP,MOD_LMOB,MOD_EL1)
+ SAP_INFO(LMOB_EL1MPC_SAP,MOD_LMOB,MOD_EL1_MPC)
+ SAP_INFO(LMOB_LMEME_SAP,MOD_LMOB,MOD_LMEME_FDD)
+ SAP_INFO(LMOB_LMEME_SAP,MOD_LMOB,MOD_LMEME_TDD)
+ SAP_INFO(LMOB_GISE_SAP,MOD_LMOB,MOD_GISE)
+
+ SAP_INFO(CLC_ERRC_SAP, MOD_EVCLC, MOD_ERRC_MOB)
+ SAP_INFO(CLC_ERRC_SAP, MOD_ERRC_MOB, MOD_EVCLC)
+ SAP_INFO(CLC_LMOB_SAP, MOD_EVCLC, MOD_LMOB)
+ SAP_INFO(CLC_LMOB_SAP, MOD_LMOB, MOD_EVCLC)
+
+ /* For LAS task */
+ SAP_INFO(GMSS_LAS_SAP, MOD_GMSS, MOD_LAS)
+ SAP_INFO(ERRC_LAS_SAP, MOD_ERRC, MOD_LAS)
+ SAP_INFO(ERRC_LAS_SAP, MOD_ERRC, MOD_LCEL)
+ SAP_INFO(ERRC_LAS_SAP, MOD_ERRC, MOD_LMOB)
+ SAP_INFO(LAS_EL1_SAP, MOD_LAS, MOD_EL1)
+ SAP_INFO(LAS_EL1MPC_SAP, MOD_LAS, MOD_EL1_MPC)
+ SAP_INFO(LAS_EL1_SAP, MOD_LCEL, MOD_EL1)
+ SAP_INFO(LAS_EL1_SAP, MOD_LMOB, MOD_EL1)
+ SAP_INFO(LAS_EL1MPC_SAP, MOD_LMOB, MOD_EL1_MPC)
+
+//#ifdef __LTE_R11__
+ SAP_INFO(MBMSAL_ERRC_SAP, MOD_MBMSAL, MOD_ERRC_SPV)
+ SAP_INFO(MBMSAL_ERRC_SAP, MOD_MBMSAL_2, MOD_ERRC_SPV_2)
+//#endif
+
+ //RRCE_FDD && SLCE_FDD
+ SAP_INFO(ADR_ADR_SAP, MOD_ADR_FDD, MOD_ADR_FDD)
+ SAP_INFO(ADR_ADR_SAP, MOD_ADR_FDD_2, MOD_ADR_FDD_2)
+
+ SAP_INFO(L4C_MMRF_SAP, MOD_L4C, MOD_MMRF)
+ SAP_INFO(L4C_MMRF_SAP, MOD_L4C_2, MOD_MMRF)
+ SAP_INFO(L4C_MMRF_SAP, MOD_L4C_3, MOD_MMRF)
+ SAP_INFO(L4C_MMRF_SAP, MOD_L4C_4, MOD_MMRF)
+
+ SAP_INFO(ADR_ADR_SAP, MOD_ADR_FDD_3, MOD_ADR_FDD_3)
+ SAP_INFO(ADR_ADR_SAP, MOD_ADR_FDD_4, MOD_ADR_FDD_4)
+ SAP_INFO(ADR_DRLC_SAP,MOD_ADR_FDD,MOD_DRLC_FDD)
+ SAP_INFO(ADR_DRLC_SAP,MOD_ADR_FDD_2,MOD_DRLC_FDD_2)
+ SAP_INFO(ADR_DRLC_SAP,MOD_ADR_FDD_3,MOD_DRLC_FDD_3)
+ SAP_INFO(ADR_DRLC_SAP,MOD_ADR_FDD_4,MOD_DRLC_FDD_4)
+ SAP_INFO(RATCM_RRCE_SAP,MOD_RATCM,MOD_RRCE_FDD)
+ SAP_INFO(RATCM_RRCE_SAP,MOD_RATCM_2,MOD_RRCE_FDD_2)
+ SAP_INFO(RATCM_RRCE_SAP,MOD_RATCM_3,MOD_RRCE_FDD_3)
+ SAP_INFO(RATCM_RRCE_SAP,MOD_RATCM_4,MOD_RRCE_FDD_4)
+ SAP_INFO(RRCE_URLC_SAP,MOD_RRCE_FDD,MOD_URLC_FDD)
+ SAP_INFO(RRCE_URLC_SAP,MOD_RRCE_FDD_2,MOD_URLC_FDD_2)
+ SAP_INFO(RRCE_URLC_SAP,MOD_RRCE_FDD_3,MOD_URLC_FDD_3)
+ SAP_INFO(RRCE_URLC_SAP,MOD_RRCE_FDD_4,MOD_URLC_FDD_4)
+ SAP_INFO(RRCE_DRLC_SAP,MOD_RRCE_FDD,MOD_DRLC_FDD)
+ SAP_INFO(RRCE_DRLC_SAP,MOD_RRCE_FDD_2,MOD_DRLC_FDD_2)
+ SAP_INFO(RRCE_DRLC_SAP,MOD_RRCE_FDD_3,MOD_DRLC_FDD_3)
+ SAP_INFO(RRCE_DRLC_SAP,MOD_RRCE_FDD_4,MOD_DRLC_FDD_4)
+ SAP_INFO(RRCE_BMC_SAP,MOD_RRCE_FDD,MOD_BMC_FDD)
+ SAP_INFO(RRCE_BMC_SAP,MOD_RRCE_FDD_2,MOD_BMC_FDD_2)
+ SAP_INFO(RRCE_BMC_SAP,MOD_RRCE_FDD_3,MOD_BMC_FDD_3)
+ SAP_INFO(RRCE_BMC_SAP,MOD_RRCE_FDD_4,MOD_BMC_FDD_4)
+ SAP_INFO(RRCE_UMAC_SAP,MOD_RRCE_FDD,MOD_UMAC_FDD)
+ SAP_INFO(RRCE_UMAC_SAP,MOD_RRCE_FDD_2,MOD_UMAC_FDD_2)
+ SAP_INFO(RRCE_UMAC_SAP,MOD_RRCE_FDD_3,MOD_UMAC_FDD_3)
+ SAP_INFO(RRCE_UMAC_SAP,MOD_RRCE_FDD_4,MOD_UMAC_FDD_4)
+ SAP_INFO(RRCE_CSCE_SAP,MOD_RRCE_FDD,MOD_CSCE_FDD)
+ SAP_INFO(RRCE_CSCE_SAP,MOD_RRCE_FDD_2,MOD_CSCE_FDD_2)
+ SAP_INFO(RRCE_CSCE_SAP,MOD_RRCE_FDD_3,MOD_CSCE_FDD_3)
+ SAP_INFO(RRCE_CSCE_SAP,MOD_RRCE_FDD_4,MOD_CSCE_FDD_4)
+ SAP_INFO(RRCE_MEME_SAP,MOD_RRCE_FDD,MOD_MEME_FDD)
+ SAP_INFO(RRCE_MEME_SAP,MOD_RRCE_FDD_2,MOD_MEME_FDD_2)
+ SAP_INFO(RRCE_MEME_SAP,MOD_RRCE_FDD_3,MOD_MEME_FDD_3)
+ SAP_INFO(RRCE_MEME_SAP,MOD_RRCE_FDD_4,MOD_MEME_FDD_4)
+ SAP_INFO(RRCE_RRCE_SAP,MOD_RRCE_FDD,MOD_RRCE_FDD)
+ SAP_INFO(RRCE_RRCE_SAP,MOD_RRCE_FDD_2,MOD_RRCE_FDD_2)
+ SAP_INFO(RRCE_RRCE_SAP,MOD_RRCE_FDD_3,MOD_RRCE_FDD_3)
+ SAP_INFO(RRCE_RRCE_SAP,MOD_RRCE_FDD_4,MOD_RRCE_FDD_4)
+ SAP_INFO(RRCE_SLCE_SAP,MOD_RRCE_FDD,MOD_SLCE_FDD)
+ SAP_INFO(RRCE_SLCE_SAP,MOD_RRCE_FDD_2,MOD_SLCE_FDD_2)
+ SAP_INFO(RRCE_SLCE_SAP,MOD_RRCE_FDD_3,MOD_SLCE_FDD_3)
+ SAP_INFO(RRCE_SLCE_SAP,MOD_RRCE_FDD_4,MOD_SLCE_FDD_4)
+ SAP_INFO(RRCE_SIBE_SAP,MOD_RRCE_FDD,MOD_SIBE_FDD)
+ SAP_INFO(RRCE_SIBE_SAP,MOD_RRCE_FDD_2,MOD_SIBE_FDD_2)
+ SAP_INFO(RRCE_SIBE_SAP,MOD_RRCE_FDD_3,MOD_SIBE_FDD_3)
+ SAP_INFO(RRCE_SIBE_SAP,MOD_RRCE_FDD_4,MOD_SIBE_FDD_4)
+ SAP_INFO(RRCE_USIME_SAP,MOD_RRCE_FDD,MOD_USIME_FDD)
+ SAP_INFO(RRCE_USIME_SAP,MOD_RRCE_FDD_2,MOD_USIME_FDD_2)
+ SAP_INFO(RRCE_USIME_SAP,MOD_RRCE_FDD_3,MOD_USIME_FDD_3)
+ SAP_INFO(RRCE_USIME_SAP,MOD_RRCE_FDD_4,MOD_USIME_FDD_4)
+ SAP_INFO(RRCE_UL1_SAP,MOD_RRCE_FDD,MOD_UL1)
+ SAP_INFO(RRCE_UL1_SAP,MOD_RRCE_FDD_2,MOD_UL1_2)
+ SAP_INFO(RRCE_UL1_SAP,MOD_RRCE_FDD_3,MOD_UL1_3)
+ SAP_INFO(RRCE_UL1_SAP,MOD_RRCE_FDD_4,MOD_UL1_4)
+ SAP_INFO(GAS_RRCE_SAP,MOD_GAS_FDD,MOD_RRCE_FDD)
+ SAP_INFO(GAS_RRCE_SAP,MOD_GAS_2_FDD,MOD_RRCE_FDD_2)
+ SAP_INFO(GAS_RRCE_SAP,MOD_GAS_3_FDD,MOD_RRCE_FDD_3)
+ SAP_INFO(GAS_RRCE_SAP,MOD_GAS_4_FDD,MOD_RRCE_FDD_4)
+ SAP_INFO(GAS_RRCE_SAP,MOD_RRM_FDD,MOD_RRCE_FDD)
+ SAP_INFO(RRCE_TL1_SAP,MOD_RRCE_FDD,MOD_TL1)
+ SAP_INFO(MRS_RRCE_SAP, MOD_MRS, MOD_RRCE_FDD)
+ SAP_INFO(MRS_RRCE_SAP, MOD_MRS, MOD_RRCE_FDD_2)
+ SAP_INFO(MRS_RRCE_SAP, MOD_MRS, MOD_RRCE_FDD_3)
+ SAP_INFO(MRS_RRCE_SAP, MOD_MRS, MOD_RRCE_FDD_4)
+ SAP_INFO(EAS_RRCE_SAP, MOD_ERRC, MOD_RRCE_FDD)
+ SAP_INFO(EAS_RRCE_SAP, MOD_ERRC_2, MOD_RRCE_FDD_2)
+ SAP_INFO(RSVAS_RRCE_SAP, MOD_RSVAS, MOD_RRCE_FDD)
+ SAP_INFO(RSVAS_RRCE_SAP, MOD_RSVAS, MOD_RRCE_FDD_2)
+ SAP_INFO(RSVAS_RRCE_SAP, MOD_RSVAS, MOD_RRCE_FDD_3)
+ SAP_INFO(RSVAS_RRCE_SAP, MOD_RSVAS, MOD_RRCE_FDD_4)
+ SAP_INFO(RATCM_SLCE_SAP,MOD_RATCM,MOD_SLCE_FDD)
+ SAP_INFO(RATCM_SLCE_SAP,MOD_RATCM_2,MOD_SLCE_FDD_2)
+ SAP_INFO(RATCM_SLCE_SAP,MOD_RATCM_3,MOD_SLCE_FDD_3)
+ SAP_INFO(RATCM_SLCE_SAP,MOD_RATCM_4,MOD_SLCE_FDD_4)
+ SAP_INFO(SLCE_URLC_SAP,MOD_SLCE_FDD,MOD_URLC_FDD)
+ SAP_INFO(SLCE_URLC_SAP,MOD_SLCE_FDD_2,MOD_URLC_FDD_2)
+ SAP_INFO(SLCE_URLC_SAP,MOD_SLCE_FDD_3,MOD_URLC_FDD_3)
+ SAP_INFO(SLCE_URLC_SAP,MOD_SLCE_FDD_4,MOD_URLC_FDD_4)
+ SAP_INFO(SLCE_PDCP_SAP,MOD_SLCE_FDD,MOD_PDCP_FDD)
+ SAP_INFO(SLCE_PDCP_SAP,MOD_SLCE_FDD_2,MOD_PDCP_FDD_2)
+ SAP_INFO(SLCE_PDCP_SAP,MOD_SLCE_FDD_3,MOD_PDCP_FDD_3)
+ SAP_INFO(SLCE_PDCP_SAP,MOD_SLCE_FDD_4,MOD_PDCP_FDD_4)
+ SAP_INFO(SLCE_BMC_SAP,MOD_SLCE_FDD,MOD_BMC_FDD)
+ SAP_INFO(SLCE_BMC_SAP,MOD_SLCE_FDD_2,MOD_BMC_FDD_2)
+ SAP_INFO(SLCE_BMC_SAP,MOD_SLCE_FDD_3,MOD_BMC_FDD_3)
+ SAP_INFO(SLCE_BMC_SAP,MOD_SLCE_FDD_4,MOD_BMC_FDD_4)
+ SAP_INFO(SLCE_RABM_SAP,MOD_SLCE_FDD,MOD_RABM_FDD)
+ SAP_INFO(SLCE_RABM_SAP,MOD_SLCE_FDD_2,MOD_RABM_FDD_2)
+ SAP_INFO(SLCE_RABM_SAP,MOD_SLCE_FDD_3,MOD_RABM_FDD_3)
+ SAP_INFO(SLCE_RABM_SAP,MOD_SLCE_FDD_4,MOD_RABM_FDD_4)
+ SAP_INFO(SLCE_CSR_SAP,MOD_SLCE_FDD,MOD_CSR_FDD)
+ SAP_INFO(SLCE_CSR_SAP,MOD_SLCE_FDD_2,MOD_CSR_FDD_2)
+ SAP_INFO(SLCE_CSR_SAP,MOD_SLCE_FDD_3,MOD_CSR_FDD_3)
+ SAP_INFO(SLCE_CSR_SAP,MOD_SLCE_FDD_4,MOD_CSR_FDD_4)
+ SAP_INFO(SLCE_UMAC_SAP,MOD_SLCE_FDD,MOD_UMAC_FDD)
+ SAP_INFO(SLCE_UMAC_SAP,MOD_SLCE_FDD_2,MOD_UMAC_FDD_2)
+ SAP_INFO(SLCE_UMAC_SAP,MOD_SLCE_FDD_3,MOD_UMAC_FDD_3)
+ SAP_INFO(SLCE_UMAC_SAP,MOD_SLCE_FDD_4,MOD_UMAC_FDD_4)
+ SAP_INFO(CSCE_SLCE_SAP,MOD_CSCE_FDD,MOD_SLCE_FDD)
+ SAP_INFO(CSCE_SLCE_SAP,MOD_CSCE_FDD_2,MOD_SLCE_FDD_2)
+ SAP_INFO(CSCE_SLCE_SAP,MOD_CSCE_FDD_3,MOD_SLCE_FDD_3)
+ SAP_INFO(CSCE_SLCE_SAP,MOD_CSCE_FDD_4,MOD_SLCE_FDD_4)
+ SAP_INFO(SIBE_SLCE_SAP,MOD_SIBE_FDD,MOD_SLCE_FDD)
+ SAP_INFO(SIBE_SLCE_SAP,MOD_SIBE_FDD_2,MOD_SLCE_FDD_2)
+ SAP_INFO(SIBE_SLCE_SAP,MOD_SIBE_FDD_3,MOD_SLCE_FDD_3)
+ SAP_INFO(SIBE_SLCE_SAP,MOD_SIBE_FDD_4,MOD_SLCE_FDD_4)
+ SAP_INFO(MEME_SLCE_SAP,MOD_MEME_FDD,MOD_SLCE_FDD)
+ SAP_INFO(MEME_SLCE_SAP,MOD_MEME_FDD_2,MOD_SLCE_FDD_2)
+ SAP_INFO(MEME_SLCE_SAP,MOD_MEME_FDD_3,MOD_SLCE_FDD_3)
+ SAP_INFO(MEME_SLCE_SAP,MOD_MEME_FDD_4,MOD_SLCE_FDD_4)
+ SAP_INFO(CSE_SLCE_SAP,MOD_CSE_FDD,MOD_SLCE_FDD)
+ SAP_INFO(CSE_SLCE_SAP,MOD_CSE_FDD_2,MOD_SLCE_FDD_2)
+ SAP_INFO(CSE_SLCE_SAP,MOD_CSE_FDD_3,MOD_SLCE_FDD_3)
+ SAP_INFO(CSE_SLCE_SAP,MOD_CSE_FDD_4,MOD_SLCE_FDD_4)
+ SAP_INFO(SLCE_SLCE_SAP,MOD_SLCE_FDD,MOD_SLCE_FDD)
+ SAP_INFO(SLCE_SLCE_SAP,MOD_SLCE_FDD_2,MOD_SLCE_FDD_2)
+ SAP_INFO(SLCE_SLCE_SAP,MOD_SLCE_FDD_3,MOD_SLCE_FDD_3)
+ SAP_INFO(SLCE_SLCE_SAP,MOD_SLCE_FDD_4,MOD_SLCE_FDD_4)
+ SAP_INFO(SLCE_UL1_SAP,MOD_SLCE_FDD,MOD_UL1)
+ SAP_INFO(SLCE_UL1_SAP,MOD_SLCE_FDD_2,MOD_UL1_2)
+ SAP_INFO(SLCE_UL1_SAP,MOD_SLCE_FDD_3,MOD_UL1_3)
+ SAP_INFO(SLCE_UL1_SAP,MOD_SLCE_FDD_4,MOD_UL1_4)
+ SAP_INFO(SLCE_UL2SEQ_SAP,MOD_SLCE_FDD,MOD_SEQ_FDD)
+ SAP_INFO(SLCE_UL2SEQ_SAP,MOD_SLCE_FDD_2,MOD_SEQ_FDD)
+ SAP_INFO(SLCE_UL2SEQ_SAP,MOD_SLCE_FDD_3,MOD_SEQ_FDD)
+ SAP_INFO(SLCE_UL2SEQ_SAP,MOD_SLCE_FDD_4,MOD_SEQ_FDD)
+ SAP_INFO(SLCE_RSVAU_SAP, MOD_SLCE_FDD, MOD_RSVAU)
+ SAP_INFO(SLCE_RSVAU_SAP, MOD_SLCE_FDD_2, MOD_RSVAU)
+ SAP_INFO(SLCE_RSVAU_SAP, MOD_SLCE_FDD_3, MOD_RSVAU)
+ SAP_INFO(SLCE_RSVAU_SAP, MOD_SLCE_FDD_4, MOD_RSVAU)
+ SAP_INFO(SLCE_UL1B_SAP,MOD_SLCE_FDD,MOD_UL1B)
+ SAP_INFO(URR_SAP,MOD_URR_FDD,ANY)
+ SAP_INFO(URR_SAP,MOD_URR_FDD_2,ANY)
+ SAP_INFO(URR_SAP,MOD_URR_FDD_3,ANY)
+ SAP_INFO(URR_SAP,MOD_URR_FDD_4,ANY)
+ SAP_INFO(RSVAS_URR_SAP, MOD_RSVAS, MOD_URR_FDD)
+ SAP_INFO(RSVAS_URR_SAP, MOD_RSVAS, MOD_URR_FDD_2)
+ SAP_INFO(RSVAS_URR_SAP, MOD_RSVAS, MOD_URR_FDD_3)
+ SAP_INFO(RSVAS_URR_SAP, MOD_RSVAS, MOD_URR_FDD_4)
+
+ /* Force Timer Expiry */
+ SAP_INFO(NIL_RRCE_EXPIRY_TIMER_SAP, MOD_NIL, MOD_RRCE_FDD)
+ SAP_INFO(NIL_RRCE_EXPIRY_TIMER_SAP, MOD_NIL, MOD_RRCE_FDD_2)
+ SAP_INFO(NIL_RRCE_EXPIRY_TIMER_SAP, MOD_NIL, MOD_RRCE_FDD_3)
+ SAP_INFO(NIL_RRCE_EXPIRY_TIMER_SAP, MOD_NIL, MOD_RRCE_FDD_4)
+
+ /* TDD ES design */
+ SAP_INFO(NIL_RRCE_INJECT_TIMER_SAP, MOD_TIMER, MOD_RRCE_TDD)
+
+ /* For C2K */
+ SAP_INFO(CLC_ERRC_SAP, MOD_CLC, MOD_ERRC)
+ SAP_INFO(CLC_ERRC_SAP, MOD_ERRC, MOD_CLC)
+ SAP_INFO(CLC_LMOB_SAP, MOD_CLC, MOD_LMOB)
+ SAP_INFO(CLC_LMOB_SAP, MOD_LMOB, MOD_CLC)
+
+#if defined(__GEMINI_WCDMA__) && defined(__UAS_GEMINI_PROC_SHARING__)
+ SAP_INFO(CSCE_CSE_SAP, MOD_CSCE_FDD, MOD_CSCE_FDD_2)
+ SAP_INFO(CSCE_CSE_SAP, MOD_CSCE_FDD, MOD_CSCE_FDD_3)
+ SAP_INFO(CSCE_CSE_SAP, MOD_CSCE_FDD, MOD_CSCE_FDD_4)
+ SAP_INFO(CSCE_CSE_SAP, MOD_CSCE_FDD_2, MOD_CSCE_FDD_1)
+ SAP_INFO(CSCE_CSE_SAP, MOD_CSCE_FDD_2, MOD_CSCE_FDD_3)
+ SAP_INFO(CSCE_CSE_SAP, MOD_CSCE_FDD_2, MOD_CSCE_FDD_4)
+ SAP_INFO(CSCE_CSE_SAP, MOD_CSCE_FDD_3, MOD_CSCE_FDD_1)
+ SAP_INFO(CSCE_CSE_SAP, MOD_CSCE_FDD_3, MOD_CSCE_FDD_2)
+ SAP_INFO(CSCE_CSE_SAP, MOD_CSCE_FDD_3, MOD_CSCE_FDD_4)
+ SAP_INFO(CSCE_CSE_SAP, MOD_CSCE_FDD_4, MOD_CSCE_FDD_1)
+ SAP_INFO(CSCE_CSE_SAP, MOD_CSCE_FDD_4, MOD_CSCE_FDD_2)
+ SAP_INFO(CSCE_CSE_SAP, MOD_CSCE_FDD_4, MOD_CSCE_FDD_3)
+#endif
+
+ /*L4C */
+ SAP_INFO(L4C_LTECSR_SAP, MOD_L4C, MOD_LTECSR)
+ SAP_INFO(L4C_CVAL_SAP, MOD_L4C, MOD_CVAL)
+
+ SAP_INFO(CPSW_XRLP_SAP, MOD_CPSW, MOD_XRLP)
+ SAP_INFO(CLEC_CPSW_SAP, MOD_CLEC, MOD_CPSW)
+ SAP_INFO(CLEC_CVAL_SAP, MOD_CLEC, MOD_CVAL)
+ SAP_INFO(CLEC_L1D_MDM_SAP, MOD_CLEC, MOD_L1D_MDM)
+ SAP_INFO(CLEC_CHSC_SAP, MOD_CLEC, MOD_CHSC)
+ SAP_INFO(CLEC_CIPC_SAP, MOD_CLEC, MOD_CIPC)
+ SAP_INFO(CPSW_L1D_MDM_SAP, MOD_CPSW, MOD_L1D_MDM)
+ SAP_INFO(CPSW_CVAL_SAP, MOD_CPSW, MOD_CVAL)
+ SAP_INFO(CPSW_CVAL_ATC_SAP, MOD_CPSW, MOD_CVAL_ATC)
+ SAP_INFO(CPSW_CVAL_ATC_SAP, MOD_CVAL_ATC, MOD_CPSW)
+ SAP_INFO(CPSW_CVAL_STORAGE_SAP, MOD_CPSW, MOD_CVAL_STORAGE)
+ SAP_INFO(CPSW_CSS_SAP, MOD_CPSW, MOD_CSS)
+ SAP_INFO(CPSW_EVCLC_SAP, MOD_CPSW, MOD_EVCLC)
+ SAP_INFO(CPSW_DBM_SAP, MOD_CPSW, MOD_DBM)
+ SAP_INFO(CPSW_CUIM_PROXY_SAP, MOD_CPSW, MOD_UIM_PROXY)
+ SAP_INFO(CPSW_SLT_SAP, MOD_CPSW, MOD_SLT)
+ SAP_INFO(CPSW_CHWD_SAP, MOD_CPSW, MOD_CHWD)
+ SAP_INFO(CPSW_CIOP_SAP, MOD_CPSW, MOD_CIOP)
+ SAP_INFO(CPSW_ERRC_SAP, MOD_CPSW, MOD_ERRC)
+ SAP_INFO(CPSW_S_CHLP_SAP, MOD_CPSW_S, MOD_CHLP)
+ SAP_INFO(CPSW_S_CPSW_SAP, MOD_CPSW_S, MOD_CPSW)
+ SAP_INFO(CIOP_XRLP_SAP, MOD_XRLP, MOD_CIOP)
+
+ SAP_INFO(LMD_XRLP_SAP, MOD_LMD, MOD_XRLP)
+ SAP_INFO(LMD_CIPC_SAP, MOD_LMD, MOD_CIPC)/*it won't be used in 93m*/
+ SAP_INFO(LMD_L1D_MDM_SAP, MOD_LMD, MOD_L1D_MDM)
+ SAP_INFO(LMD_CPSW_SAP, MOD_LMD, MOD_CPSW)
+ SAP_INFO(LMD_LMDS_SAP, MOD_LMD, MOD_LMDS)
+ SAP_INFO(LMD_CHWD_SAP, MOD_LMD, MOD_CHWD)
+ SAP_INFO(LMD_CVAL_SAP, MOD_LMD, MOD_CVAL)
+ SAP_INFO(LMD_CVAL_ATC_SAP, MOD_LMD, MOD_CVAL_ATC)
+ SAP_INFO(LMD_CVAL_ATC_SAP, MOD_CVAL_ATC, MOD_LMD)
+ SAP_INFO(LMD_CVAL_STORAGE_SAP, MOD_LMD, MOD_CVAL_STORAGE)
+ SAP_INFO(LMDS_CPSW_SAP, MOD_LMDS, MOD_CPSW)
+
+ SAP_INFO(CVAL_CHWD_SAP, MOD_CVAL, MOD_CHWD)
+ SAP_INFO(CVAL_CSS_SAP, MOD_CVAL, MOD_CSS)
+ SAP_INFO(CVAL_XRLP_SAP, MOD_CVAL, MOD_XRLP )
+ SAP_INFO(CVAL_EVRMC_SAP, MOD_CVAL, MOD_EVRMC)
+ SAP_INFO(CVAL_DBM_SAP, MOD_CVAL, MOD_DBM)
+ SAP_INFO(CVAL_CUIM_SAP, MOD_CVAL, MOD_UIM)
+ SAP_INFO(CVAL_CIOP_SAP, MOD_CVAL, MOD_CIOP)
+
+ SAP_INFO(CHLP_CVAL_SAP, MOD_CHLP, MOD_CVAL)
+ SAP_INFO(CVAL_CVAL_ATC_SAP, MOD_CVAL, MOD_CVAL_ATC)
+ SAP_INFO(CVAL_CVAL_ATC_SAP, MOD_CVAL_ATC, MOD_CVAL)
+ SAP_INFO(CVAL_CLEC_SAP, MOD_CVAL, MOD_CLEC)
+ SAP_INFO(CVAL_CMON_SAP, MOD_CVAL, MOD_CMON)
+ SAP_INFO(CVAL_CHSC_SAP, MOD_CVAL, MOD_CHSC)
+ SAP_INFO(CVAL_CPSW_SAP, MOD_CVAL, MOD_CPSW)
+ SAP_INFO(CVAL_CHLP_SAP, MOD_CHLP, MOD_CVAL)
+ SAP_INFO(CVAL_CSEC_SAP, MOD_CVAL, MOD_CSEC)
+
+
+ SAP_INFO(CVAL_ATC_CHWD_SAP, MOD_CVAL_ATC, MOD_CHWD)
+ SAP_INFO(CVAL_ATC_XRLP_SAP, MOD_CVAL_ATC, MOD_XRLP )
+ SAP_INFO(CVAL_ATC_EVRMC_SAP, MOD_CVAL_ATC, MOD_EVRMC)
+ SAP_INFO(CVAL_ATC_DBM_SAP, MOD_CVAL_ATC, MOD_DBM)
+ SAP_INFO(CVAL_ATC_CUIM_SAP, MOD_CVAL_ATC, MOD_UIM)
+ SAP_INFO(CVAL_ATC_CIOP_SAP, MOD_CVAL_ATC, MOD_CIOP)
+ SAP_INFO(CVAL_ATC_CHSC_SAP, MOD_CVAL_ATC, MOD_CHSC)
+ SAP_INFO(CVAL_ATC_CMON_SAP, MOD_CVAL_ATC, MOD_CMON)
+ SAP_INFO(CVAL_ATC_EVRCP_SAP, MOD_CVAL_ATC, MOD_EVRCP)
+ SAP_INFO(CVAL_ATC_SYSTEM_SAP, MOD_CVAL_ATC, MOD_SYSTEM)
+
+
+ SAP_INFO(CVAL_ATC_CHWD_SAP, MOD_CHWD, MOD_CVAL_ATC)
+ SAP_INFO(CVAL_ATC_XRLP_SAP, MOD_XRLP, MOD_CVAL_ATC )
+ SAP_INFO(CVAL_ATC_EVRMC_SAP, MOD_EVRMC, MOD_CVAL_ATC)
+ SAP_INFO(CVAL_ATC_DBM_SAP, MOD_DBM, MOD_CVAL_ATC)
+ SAP_INFO(CVAL_ATC_CUIM_PROXY_SAP, MOD_UIM_PROXY, MOD_CVAL_ATC)
+ SAP_INFO(CVAL_ATC_CIOP_SAP, MOD_CIOP, MOD_CVAL_ATC)
+ SAP_INFO(CVAL_ATC_CHSC_SAP, MOD_CHSC, MOD_CVAL_ATC)
+ SAP_INFO(CVAL_ATC_CMON_SAP, MOD_CMON, MOD_CVAL_ATC)
+ SAP_INFO(CVAL_ATC_EVRCP_SAP, MOD_EVRCP, MOD_CVAL_ATC)
+ SAP_INFO(CVAL_ATC_SYSTEM_SAP, MOD_SYSTEM, MOD_CVAL_ATC)
+
+ SAP_INFO(CHLP_CVAL_ATC_SAP, MOD_CHLP, MOD_CVAL_ATC)
+ SAP_INFO(CHLP_CVAL_ATC_SAP, MOD_CVAL_ATC, MOD_CHLP)
+ SAP_INFO(CVAL_STORAGE_CHWD_SAP, MOD_CVAL, MOD_CHWD)
+ SAP_INFO(CVAL_STORAGE_XRLP_SAP, MOD_CVAL, MOD_XRLP )
+ SAP_INFO(CVAL_STORAGE_EVRMC_SAP, MOD_CVAL, MOD_EVRMC)
+ SAP_INFO(CVAL_STORAGE_DBM_SAP, MOD_CVAL, MOD_DBM)
+ SAP_INFO(CVAL_STORAGE_CUIM_SAP, MOD_CVAL, MOD_UIM_PROXY)
+ SAP_INFO(CVAL_STORAGE_CIOP_SAP, MOD_CVAL, MOD_CIOP)
+ SAP_INFO(CHLP_CVAL_STORAGE_SAP, MOD_CHLP, MOD_CVAL_STORAGE)
+
+
+ SAP_INFO(CHLP_CUIM_PROXY_SAP, MOD_CHLP, MOD_UIM_PROXY)
+ SAP_INFO(CHLP_CIOP_SAP, MOD_CHLP, MOD_CIOP)
+ SAP_INFO(CHLP_CPSW_SAP, MOD_CHLP, MOD_CPSW)
+ SAP_INFO(CHLP_XRLP_SAP, MOD_CHLP, MOD_XRLP)
+ SAP_INFO(CHLP_CSS_SAP, MOD_CHLP, MOD_CSS)
+ SAP_INFO(CHLP_DBM_SAP, MOD_CHLP, MOD_DBM)
+ SAP_INFO(CHLP_EVCLC_SAP, MOD_CHLP, MOD_EVCLC)
+ SAP_INFO(CHLP_EVFCP_SAP, MOD_CHLP, MOD_EVFCP)
+ SAP_INFO(CHLP_EVRCP_SAP, MOD_CHLP, MOD_EVRCP)
+ SAP_INFO(CHLP_EVSLC_SAP, MOD_CHLP, MOD_EVSLC)
+ SAP_INFO(CHLP_CIPC_SAP, MOD_CHLP, MOD_CIPC)/*it won't be used in 93m*/
+ SAP_INFO(CHLP_CSEC_SAP, MOD_CHLP, MOD_CSEC)
+ SAP_INFO(CHLP_CVAL_SAP, MOD_CVAL, MOD_CHLP)
+
+
+ SAP_INFO(CSEC_CVAL_SAP, MOD_CVAL, MOD_CSEC)
+ SAP_INFO(CSEC_CVAL_ATC_SAP, MOD_CVAL_ATC, MOD_CSEC)
+ SAP_INFO(CSEC_CVAL_ATC_SAP, MOD_CSEC, MOD_CVAL_ATC)
+ SAP_INFO(CSEC_CVAL_STORAGE_SAP, MOD_CVAL_STORAGE, MOD_CSEC)
+
+ SAP_INFO(CSEC_CIOP_SAP, MOD_CIOP, MOD_CSEC)
+ #if defined(MTK_DEV_C2K_SRLTE_L1) && defined(MTK_PLT_ON_PC) && defined(MTK_PLT_ON_PC_IT)
+ SAP_INFO(CHSC_CSTUB_SAP, MOD_CHSC, MOD_CSTUB)
+ #endif
+ SAP_INFO(CHSC_EVRMC_SAP, MOD_CHSC, MOD_EVRMC)
+ SAP_INFO(CHSC_L1D_MDM_SAP, MOD_CHSC, MOD_L1D_MDM)
+ SAP_INFO(CHSC_CPSW_SAP, MOD_CHSC, MOD_CPSW)
+ SAP_INFO(CHSC_MLL1_SAP, MOD_CHSC, MOD_MLL1)
+
+ SAP_INFO(CSS_CHSC_SAP, MOD_CSS, MOD_CHSC)
+ SAP_INFO(CSS_CVAL_SAP, MOD_CSS, MOD_CVAL)
+ SAP_INFO(CSS_CVAL_ATC_SAP, MOD_CSS, MOD_CVAL_ATC)
+ SAP_INFO(CSS_CVAL_STORAGE_SAP, MOD_CSS, MOD_CVAL_STORAGE)
+ SAP_INFO(CSS_DBM_SAP, MOD_CSS, MOD_DBM)
+ SAP_INFO(CSS_CUIM_PROXY_SAP, MOD_CSS, MOD_UIM_PROXY)
+ SAP_INFO(CSS_EVCLC_SAP, MOD_CSS, MOD_EVCLC)
+// SAP_INFO(CSS_EVALMP_SAP, MOD_CSS, MOD_EVALMP)
+ SAP_INFO(CSS_EVSLC_SAP, MOD_CSS, MOD_EVSLC)
+
+ SAP_INFO(EVRMC_CSS_SAP, MOD_EVRMC, MOD_CSS)
+ SAP_INFO(EVRMC_EVCLC_SAP, MOD_EVRMC, MOD_EVCLC)
+ SAP_INFO(EVRMC_CHLP_SAP, MOD_EVRMC, MOD_CHLP)
+ SAP_INFO(EVRMC_CHWD_SAP, MOD_EVRMC, MOD_CHWD)
+ SAP_INFO(EVRMC_CIPC_SAP, MOD_EVRMC, MOD_CIPC)
+ SAP_INFO(EVRMC_CLEC_SAP, MOD_EVRMC, MOD_CLEC)
+ SAP_INFO(EVRMC_CIOP_SAP, MOD_EVRMC, MOD_CIOP)
+
+
+ SAP_INFO(EVSLC_EVCLC_SAP, MOD_EVSLC, MOD_EVCLC)
+ SAP_INFO(EVSLC_EVRMC_SAP, MOD_EVSLC, MOD_EVRMC)
+ SAP_INFO(EVSLC_CPSW_S_SAP, MOD_EVSLC, MOD_CPSW_S)
+ SAP_INFO(EVSLC_SLT_SAP, MOD_EVSLC, MOD_SLT)
+ SAP_INFO(EVSLC_CHLP_SAP, MOD_EVSLC, MOD_CHLP)
+
+ SAP_INFO(EVFCP_EVRCP_SAP, MOD_EVFCP, MOD_EVRCP)
+ SAP_INFO(EVFCP_EVRMC_SAP, MOD_EVFCP, MOD_EVRMC)
+ SAP_INFO(EVFCP_EVCLC_SAP, MOD_EVFCP, MOD_EVCLC)
+ SAP_INFO(EVFCP_EVSLC_SAP, MOD_EVFCP, MOD_EVSLC)
+ SAP_INFO(EVFCP_CHLP_SAP, MOD_EVFCP, MOD_CHLP)
+ SAP_INFO(EVRCP_EVRMC_SAP, MOD_EVRCP, MOD_EVRMC)
+ SAP_INFO(EVRCP_EVSLC_SAP, MOD_EVRCP, MOD_EVSLC)
+ SAP_INFO(EVRCP_EVCLC_SAP, MOD_EVRCP, MOD_EVCLC)
+ SAP_INFO(EVRCP_CSS_SAP, MOD_EVRCP, MOD_CSS)
+ SAP_INFO(EVRCP_CHWD_SAP, MOD_EVRCP, MOD_CHWD)
+
+ SAP_INFO(EVCLC_CHSC_SAP, MOD_EVCLC, MOD_CHSC)
+ SAP_INFO(EVCLC_CVAL_SAP, MOD_EVCLC, MOD_CVAL)
+ SAP_INFO(EVCLC_CVAL_ATC_SAP, MOD_EVCLC, MOD_CVAL_ATC)
+ SAP_INFO(EVCLC_CVAL_ATC_SAP, MOD_CVAL_ATC, MOD_EVCLC)
+ SAP_INFO(EVCLC_CVAL_STORAGE_SAP, MOD_EVCLC, MOD_CVAL_STORAGE)
+ SAP_INFO(EVCLC_ERRC_SAP, MOD_EVCLC, MOD_ERRC)
+ SAP_INFO(EVCLC_L1D_MDM_SAP, MOD_EVCLC, MOD_L1D_MDM)
+ SAP_INFO(EVCLC_DBM_SAP, MOD_EVCLC, MOD_DBM)
+ SAP_INFO(EVCLC_SLT_SAP, MOD_EVCLC, MOD_SLT)
+ SAP_INFO(EVCLC_CHWD_SAP, MOD_EVCLC, MOD_CHWD)
+
+ SAP_INFO(L1D_MDM_CLEC_SAP, MOD_L1D_MDM, MOD_CLEC)
+ SAP_INFO(L1D_MDM_CVAL_SAP, MOD_L1D_MDM, MOD_CVAL)
+ SAP_INFO(L1D_MDM_CVAL_ATC_SAP, MOD_L1D_MDM, MOD_CVAL_ATC)
+ SAP_INFO(L1D_MDM_CVAL_ATC_SAP, MOD_CVAL_ATC, MOD_L1D_MDM)
+ SAP_INFO(L1D_MDM_CVAL_STORAGE_SAP, MOD_L1D_MDM, MOD_CVAL_STORAGE)
+ SAP_INFO(L1D_MDM_CHWD_SAP, MOD_L1D_MDM, MOD_CHWD)
+ SAP_INFO(L1D_MDM_CSS_SAP, MOD_L1D_MDM, MOD_CSS)
+ SAP_INFO(L1D_MDM_CIPC_SAP, MOD_L1D_MDM, MOD_CIPC)/*For 93m,it'll changed to L1D_MDM_CPH_SAP*/
+
+
+
+ SAP_INFO(CLEC_CHSC_SAP, MOD_CHSC, MOD_CLEC)
+ SAP_INFO(LMD_SPCH_SAP, MOD_LMD, MOD_SPCH)
+ SAP_INFO(EVRCP_CL1_1XHISR_SAP, MOD_CL1_1XHISR,MOD_EVRCP)
+ SAP_INFO(EVCLC_CL1_1XHISR_SAP, MOD_CL1_1XHISR,MOD_EVCLC)
+ SAP_INFO(CHLP_CL1_1XHISR_SAP, MOD_CL1_1XHISR,MOD_CHLP)
+ SAP_INFO(CHSC_CL1_1XHISR_SAP, MOD_CL1_1XHISR,MOD_CHSC)
+ SAP_INFO(EVRMC_CL1_1XHISR_SAP, MOD_CL1_1XHISR,MOD_EVRMC)
+ SAP_INFO(CHWD_CL1_1XHISR_SAP, MOD_CL1_1XHISR,MOD_CHWD)
+ SAP_INFO(CIPC_CL1_1XHISR_SAP, MOD_CL1_1XHISR,MOD_CIPC)
+ SAP_INFO(CPSW_CL1_1XHISR_SAP, MOD_CL1_1XHISR,MOD_CPSW)
+ SAP_INFO(CMON_CL1_1XHISR_SAP, MOD_CL1_1XHISR,MOD_CMON)
+ SAP_INFO(LMD_CL1_1XHISR_SAP, MOD_CL1_1XHISR,MOD_LMD)
+
+ SAP_INFO(CHSC_DOACTIONHISR_SAP, MOD_DOACTION_SYS_HISR, MOD_CHSC)
+ SAP_INFO(LMD_DOACTIONHISR_SAP, MOD_DOACTION_SYS_HISR, MOD_LMD)
+ SAP_INFO(EVRCP_DOACTIONHISR_SAP, MOD_DOACTION_SYS_HISR, MOD_EVRCP)
+ SAP_INFO(EVFCP_DOACTIONHISR_SAP, MOD_DOACTION_SYS_HISR, MOD_EVFCP)
+ SAP_INFO(EVRMC_DOACTIONHISR_SAP, MOD_DOACTION_SYS_HISR, MOD_EVRMC)
+ SAP_INFO(EVCLC_DOACTIONHISR_SAP, MOD_DOACTION_SYS_HISR, MOD_EVCLC)
+
+ SAP_INFO(CHSC_RTTSLOTHISR_SAP, MOD_RTTSLOT_SYS_HISR, MOD_CHSC)
+ SAP_INFO(LMD_RTTSLOTHISR_SAP, MOD_RTTSLOT_SYS_HISR, MOD_LMD)
+ SAP_INFO(L1D_MDM_RTTSLOTHISR_SAP, MOD_RTTSLOT_SYS_HISR, MOD_L1D_MDM)
+ SAP_INFO(CPSW_RTTSLOTHISR_SAP, MOD_RTTSLOT_SYS_HISR, MOD_CPSW)
+ SAP_INFO(XRLP_RTTSLOTHISR_SAP, MOD_RTTSLOT_SYS_HISR, MOD_XRLP)
+ SAP_INFO(EVCLC_RTTSLOTHISR_SAP, MOD_RTTSLOT_SYS_HISR, MOD_EVCLC)
+
+ SAP_INFO(CHSC_DOSLOTHISR_SAP, MOD_DOSLOT_SYS_HISR, MOD_CHSC)
+ SAP_INFO(LMD_DOSLOTHISR_SAP, MOD_DOSLOT_SYS_HISR, MOD_LMD)
+ SAP_INFO(EVRCP_DOSLOTHISR_SAP, MOD_DOSLOT_SYS_HISR, MOD_EVRCP)
+ SAP_INFO(EVFCP_DOSLOTHISR_SAP, MOD_DOSLOT_SYS_HISR, MOD_EVFCP)
+ SAP_INFO(EVRMC_DOSLOTHISR_SAP, MOD_DOSLOT_SYS_HISR, MOD_EVRMC)
+ SAP_INFO(EVCLC_DOSLOTHISR_SAP, MOD_DOSLOT_SYS_HISR, MOD_EVCLC)
+
+ SAP_INFO(CHSC_FHMSGDELI_HISR_SAP, MOD_FHMSG_DELIVER_HISR, MOD_CHSC)
+ SAP_INFO(LMD_FHMSGDELI_HISR_SAP, MOD_FHMSG_DELIVER_HISR, MOD_LMD)
+ SAP_INFO(EVRCP_FHMSGDELI_HISR_SAP, MOD_FHMSG_DELIVER_HISR, MOD_EVRCP)
+ SAP_INFO(L1D_MDM_FHMSGDELI_HISR_SAP, MOD_FHMSG_DELIVER_HISR, MOD_L1D_MDM)
+ SAP_INFO(CPSW_FHMSGDELI_HISR_SAP, MOD_FHMSG_DELIVER_HISR, MOD_CPSW)
+ SAP_INFO(EVFCP_FHMSGDELI_HISR_SAP, MOD_FHMSG_DELIVER_HISR, MOD_EVFCP)
+ SAP_INFO(EVRMC_FHMSGDELI_HISR_SAP, MOD_FHMSG_DELIVER_HISR, MOD_EVRMC)
+ SAP_INFO(EVCLC_FHMSGDELI_HISR_SAP, MOD_FHMSG_DELIVER_HISR, MOD_EVCLC)
+
+ SAP_INFO(CHSC_SHMSGDELI_HISR_SAP, MOD_SHMSG_DELIVER_HISR, MOD_CHSC)
+ SAP_INFO(LMD_SHMSGDELI_HISR_SAP, MOD_SHMSG_DELIVER_HISR, MOD_LMD)
+ SAP_INFO(EVRCP_SHMSGDELI_HISR_SAP, MOD_SHMSG_DELIVER_HISR, MOD_EVRCP)
+ SAP_INFO(L1D_MDM_SHMSGDELI_HISR_SAP, MOD_SHMSG_DELIVER_HISR, MOD_L1D_MDM)
+ SAP_INFO(CPSW_SHMSGDELI_HISR_SAP, MOD_SHMSG_DELIVER_HISR, MOD_CPSW)
+ SAP_INFO(EVFCP_SHMSGDELI_HISR_SAP, MOD_SHMSG_DELIVER_HISR, MOD_EVFCP)
+ SAP_INFO(EVRMC_SHMSGDELI_HISR_SAP, MOD_SHMSG_DELIVER_HISR, MOD_EVRMC)
+ SAP_INFO(EVCLC_SHMSGDELI_HISR_SAP, MOD_SHMSG_DELIVER_HISR, MOD_EVCLC)
+ SAP_INFO(UIM_SIM_SAP,MOD_SIM,MOD_UIM)
+
+
+ /* Add the module SAP here, use ANY for MOD_B */
+
+ SAP_INFO(CVAL_ATC_CUIM_PROXY_SAP, MOD_CVAL_ATC, MOD_UIM_PROXY)
+
+ SAP_INFO(XRLP_SAP, MOD_XRLP, ANY)
+ SAP_INFO(LMD_SAP, MOD_LMD, ANY)
+ SAP_INFO(LMDS_SAP, MOD_LMDS, ANY)
+ SAP_INFO(CHLP_SAP, MOD_CHLP, ANY)
+ SAP_INFO(CPSW_SAP, MOD_CPSW, ANY)
+ SAP_INFO(EVRCP_SAP, MOD_EVRCP, ANY)
+ SAP_INFO(EVFCP_SAP, MOD_EVFCP, ANY)
+ SAP_INFO(EVCLC_SAP, MOD_EVCLC, ANY)
+ SAP_INFO(EVRMC_SAP, MOD_EVRMC, ANY)
+ SAP_INFO(CVAL_SAP, MOD_CVAL, ANY)
+ SAP_INFO(CVAL_ATC_SAP, MOD_CVAL_ATC, ANY)
+ SAP_INFO(CSS_SAP, MOD_CSS, ANY)
+ SAP_INFO(EVSLC_SAP, MOD_EVSLC, ANY)
+
+ SAP_INFO(CLEC_SAP, MOD_CLEC, ANY)
+ SAP_INFO(EVL1_C2K_HWSIM_SAP, MOD_EVL1, MOD_C2K_HWSIM)
+ SAP_INFO(CSS_VMMI_SAP, MOD_CSS, MOD_VMMI_TASK)
+
+ SAP_INFO(DBM_SAP, MOD_DBM, ANY)
+
+ /* LBS */
+ SAP_INFO(DHL_LBS_SAP,MOD_DHL_READER,MOD_LBS)
+ SAP_INFO(DHL_LBS_SAP,MOD_LBS,MOD_DHL_READER)
+
+ SAP_INFO(RAC_CVAL_SAP, MOD_RAC, MOD_CVAL)
+ SAP_INFO(RAC_CVAL_SAP, MOD_CVAL, MOD_RAC)
+
+ /* L4B */
+ SAP_INFO(ATP_L4B_SAP, MOD_ATP, MOD_L4B)
+ SAP_INFO(ATP_L4B_SAP, MOD_ATP_2, MOD_L4B_2)
+ SAP_INFO(ATP_L4B_SAP, MOD_ATP_3, MOD_L4B_3)
+ SAP_INFO(ATP_L4B_SAP, MOD_ATP_4, MOD_L4B_4)
+
+ SAP_INFO(L4B_ATCI_SAP, MOD_L4B, MOD_ATCI)
+ SAP_INFO(L4B_ATCI_SAP, MOD_L4B_2, MOD_ATCI_2)
+ SAP_INFO(L4B_ATCI_SAP, MOD_L4B_3, MOD_ATCI_3)
+ SAP_INFO(L4B_ATCI_SAP, MOD_L4B_4, MOD_ATCI_4)
+
+ SAP_INFO(L4B_CVAL_SAP, MOD_L4B, MOD_CVAL)
+ SAP_INFO(L4B_CVAL_SAP, MOD_L4B_2, MOD_CVAL_2)
+ SAP_INFO(L4B_CVAL_SAP, MOD_L4B_3, MOD_CVAL_3)
+ SAP_INFO(L4B_CVAL_SAP, MOD_L4B_4, MOD_CVAL_4)
+
+ SAP_INFO(L4B_L4BPWR_SAP, MOD_L4B, MOD_L4BPWR)
+ SAP_INFO(L4B_L4BPWR_SAP, MOD_L4B_2, MOD_L4BPWR)
+ SAP_INFO(L4B_L4BPWR_SAP, MOD_L4B_3, MOD_L4BPWR)
+ SAP_INFO(L4B_L4BPWR_SAP, MOD_L4B_4, MOD_L4BPWR)
+ SAP_INFO(L4B_L4BPWR_SAP, MOD_L4BPWR, MOD_L4B)
+ SAP_INFO(L4B_L4BPWR_SAP, MOD_L4BPWR, MOD_L4B_2)
+ SAP_INFO(L4B_L4BPWR_SAP, MOD_L4BPWR, MOD_L4B_3)
+ SAP_INFO(L4B_L4BPWR_SAP, MOD_L4BPWR, MOD_L4B_4)
+
+ SAP_INFO(L4B_L4BSMS_SAP, MOD_L4B, MOD_L4BSMS)
+ SAP_INFO(L4B_L4BSMS_SAP, MOD_L4B_2, MOD_L4BSMS_2)
+ SAP_INFO(L4B_L4BSMS_SAP, MOD_L4B_3, MOD_L4BSMS_3)
+ SAP_INFO(L4B_L4BSMS_SAP, MOD_L4B_4, MOD_L4BSMS_4)
+
+ SAP_INFO(L4B_L4BSIM_SAP, MOD_L4B, MOD_L4BSIM)
+ SAP_INFO(L4B_L4BSIM_SAP, MOD_L4B_2, MOD_L4BSIM_2)
+ SAP_INFO(L4B_L4BSIM_SAP, MOD_L4B_3, MOD_L4BSIM_3)
+ SAP_INFO(L4B_L4BSIM_SAP, MOD_L4B_4, MOD_L4BSIM_4)
+
+ SAP_INFO(L4B_L4BSAT_SAP, MOD_L4B, MOD_L4BSAT)
+ SAP_INFO(L4B_L4BSAT_SAP, MOD_L4B_2, MOD_L4BSAT_2)
+ SAP_INFO(L4B_L4BSAT_SAP, MOD_L4B_3, MOD_L4BSAT_3)
+ SAP_INFO(L4B_L4BSAT_SAP, MOD_L4B_4, MOD_L4BSAT_4)
+
+ SAP_INFO(L4B_L4BSS_SAP, MOD_L4B, MOD_L4BSS)
+ SAP_INFO(L4B_L4BSS_SAP, MOD_L4B_2, MOD_L4BSS_2)
+ SAP_INFO(L4B_L4BSS_SAP, MOD_L4B_3, MOD_L4BSS_3)
+ SAP_INFO(L4B_L4BSS_SAP, MOD_L4B_4, MOD_L4BSS_4)
+
+ SAP_INFO(L4B_L4BCC_SAP, MOD_L4B, MOD_L4BCC)
+ SAP_INFO(L4B_L4BCC_SAP, MOD_L4B_2, MOD_L4BCC_2)
+ SAP_INFO(L4B_L4BCC_SAP, MOD_L4B_3, MOD_L4BCC_3)
+ SAP_INFO(L4B_L4BCC_SAP, MOD_L4B_4, MOD_L4BCC_4)
+
+ SAP_INFO(L4B_L4BNW_SAP, MOD_L4B, MOD_L4BNW)
+ SAP_INFO(L4B_L4BNW_SAP, MOD_L4B_2, MOD_L4BNW_2)
+ SAP_INFO(L4B_L4BNW_SAP, MOD_L4B_3, MOD_L4BNW_3)
+ SAP_INFO(L4B_L4BNW_SAP, MOD_L4B_4, MOD_L4BNW_4)
+
+ SAP_INFO(L4BNW_L4BPDN_SAP, MOD_L4BNW, MOD_L4BPDN)
+ SAP_INFO(L4BNW_L4BPDN_SAP, MOD_L4BNW_2, MOD_L4BPDN_2)
+ SAP_INFO(L4BNW_L4BPDN_SAP, MOD_L4BNW_3, MOD_L4BPDN_3)
+ SAP_INFO(L4BNW_L4BPDN_SAP, MOD_L4BNW_4, MOD_L4BPDN_4)
+
+ SAP_INFO(L4BNW_L4C_SAP, MOD_L4BNW, MOD_L4C)
+ SAP_INFO(L4BNW_L4C_SAP, MOD_L4BNW_2, MOD_L4C_2)
+ SAP_INFO(L4BNW_L4C_SAP, MOD_L4BNW_3, MOD_L4C_3)
+ SAP_INFO(L4BNW_L4C_SAP, MOD_L4BNW_4, MOD_L4C_4)
+
+ SAP_INFO(DDM_L4BNW_SAP, MOD_L4BNW, MOD_DDM)
+ SAP_INFO(DDM_L4BNW_SAP, MOD_L4BNW_2, MOD_DDM_2)
+ SAP_INFO(DDM_L4BNW_SAP, MOD_L4BNW_3, MOD_DDM_3)
+ SAP_INFO(DDM_L4BNW_SAP, MOD_L4BNW_4, MOD_DDM_4)
+
+ SAP_INFO(WO_L4BNW_SAP, MOD_L4BNW, MOD_WO)
+ SAP_INFO(WO_L4BNW_SAP, MOD_L4BNW_2, MOD_WO_2)
+ SAP_INFO(WO_L4BNW_SAP, MOD_L4BNW_3, MOD_WO_3)
+ SAP_INFO(WO_L4BNW_SAP, MOD_L4BNW_4, MOD_WO_4)
+
+ SAP_INFO(IMSM_L4BNW_SAP, MOD_L4BNW, MOD_IMSM)
+ SAP_INFO(IMSM_L4BNW_SAP, MOD_L4BNW_2, MOD_IMSM_2)
+ SAP_INFO(IMSM_L4BNW_SAP, MOD_L4BNW_3, MOD_IMSM_3)
+ SAP_INFO(IMSM_L4BNW_SAP, MOD_L4BNW_4, MOD_IMSM_4)
+
+ SAP_INFO(L4B_L4BSBP_SAP, MOD_L4B, MOD_L4BSBP)
+ SAP_INFO(L4B_L4BSBP_SAP, MOD_L4B_2, MOD_L4BSBP_2)
+ SAP_INFO(L4B_L4BSBP_SAP, MOD_L4B_3, MOD_L4BSBP_3)
+ SAP_INFO(L4B_L4BSBP_SAP, MOD_L4B_4, MOD_L4BSBP_4)
+
+ SAP_INFO(L4BSBP_ME_SAP, MOD_L4BSBP,ANY)
+ SAP_INFO(L4BSBP_ME_SAP, MOD_L4BSBP_2,ANY)
+ SAP_INFO(L4BSBP_ME_SAP, MOD_L4BSBP_3,ANY)
+ SAP_INFO(L4BSBP_ME_SAP, MOD_L4BSBP_4,ANY)
+
+ SAP_INFO(L4BSBP_L4C_SAP, MOD_L4BSBP, MOD_L4C)
+ SAP_INFO(L4BSBP_L4C_SAP, MOD_L4BSBP_2, MOD_L4C_2)
+ SAP_INFO(L4BSBP_L4C_SAP, MOD_L4BSBP_3, MOD_L4C_3)
+ SAP_INFO(L4BSBP_L4C_SAP, MOD_L4BSBP_4, MOD_L4C_4)
+ SAP_INFO(L4BSBP_L4C_SAP, MOD_L4C, MOD_L4BSBP)
+ SAP_INFO(L4BSBP_L4C_SAP, MOD_L4C_2, MOD_L4BSBP_2)
+ SAP_INFO(L4BSBP_L4C_SAP, MOD_L4C_3, MOD_L4BSBP_3)
+ SAP_INFO(L4BSBP_L4C_SAP, MOD_L4C_4, MOD_L4BSBP_4)
+
+ SAP_INFO(L4BPDN_L4C_SAP, MOD_L4BPDN, MOD_L4C)
+ SAP_INFO(L4BPDN_L4C_SAP, MOD_L4BPDN_2, MOD_L4C_2)
+ SAP_INFO(L4BPDN_L4C_SAP, MOD_L4BPDN_3, MOD_L4C_3)
+ SAP_INFO(L4BPDN_L4C_SAP, MOD_L4BPDN_4, MOD_L4C_4)
+ SAP_INFO(L4BPDN_L4C_SAP, MOD_L4C, MOD_L4BPDN)
+ SAP_INFO(L4BPDN_L4C_SAP, MOD_L4C_2, MOD_L4BPDN_2)
+ SAP_INFO(L4BPDN_L4C_SAP, MOD_L4C_3, MOD_L4BPDN_3)
+ SAP_INFO(L4BPDN_L4C_SAP, MOD_L4C_4, MOD_L4BPDN_4)
+
+ SAP_INFO(L4BPDN_CVAL_SAP, MOD_L4BPDN, MOD_CVAL)
+ SAP_INFO(L4BPDN_CVAL_SAP, MOD_L4BPDN_2, MOD_CVAL_2)
+ SAP_INFO(L4BPDN_CVAL_SAP, MOD_L4BPDN_3, MOD_CVAL_3)
+ SAP_INFO(L4BPDN_CVAL_SAP, MOD_L4BPDN_4, MOD_CVAL_4)
+ SAP_INFO(L4BPDN_CVAL_SAP, MOD_CVAL, MOD_L4BPDN)
+ SAP_INFO(L4BPDN_CVAL_SAP, MOD_CVAL_2, MOD_L4BPDN_2)
+ SAP_INFO(L4BPDN_CVAL_SAP, MOD_CVAL_3, MOD_L4BPDN_3)
+ SAP_INFO(L4BPDN_CVAL_SAP, MOD_CVAL_4, MOD_L4BPDN_4)
+
+ SAP_INFO(L4BPDN_TCM_SAP, MOD_L4BPDN, MOD_TCM)
+ SAP_INFO(L4BPDN_TCM_SAP, MOD_L4BPDN_2, MOD_TCM_2)
+ SAP_INFO(L4BPDN_TCM_SAP, MOD_L4BPDN_3, MOD_TCM_3)
+ SAP_INFO(L4BPDN_TCM_SAP, MOD_L4BPDN_4, MOD_TCM_4)
+ SAP_INFO(L4BPDN_TCM_SAP, MOD_TCM, MOD_L4BPDN)
+ SAP_INFO(L4BPDN_TCM_SAP, MOD_TCM_2, MOD_L4BPDN_2)
+ SAP_INFO(L4BPDN_TCM_SAP, MOD_TCM_3, MOD_L4BPDN_3)
+ SAP_INFO(L4BPDN_TCM_SAP, MOD_TCM_4, MOD_L4BPDN_4)
+
+ SAP_INFO(L4BPDN_SAP, MOD_L4BPDN, ANY)
+ SAP_INFO(L4BPDN_SAP, MOD_L4BPDN_2, ANY)
+ SAP_INFO(L4BPDN_SAP, MOD_L4BPDN_3, ANY)
+ SAP_INFO(L4BPDN_SAP, MOD_L4BPDN_4, ANY)
+ SAP_INFO(L4BPDN_SAP, ANY, MOD_L4BPDN)
+ SAP_INFO(L4BPDN_SAP, ANY, MOD_L4BPDN_2)
+ SAP_INFO(L4BPDN_SAP, ANY, MOD_L4BPDN_3)
+ SAP_INFO(L4BPDN_SAP, ANY, MOD_L4BPDN_4)
+
+ SAP_INFO(ATP_DDM_SAP, MOD_ATP, MOD_DDM)
+ SAP_INFO(ATP_DDM_SAP, MOD_ATP_2, MOD_DDM_2)
+ SAP_INFO(ATP_DDM_SAP, MOD_ATP_3, MOD_DDM_3)
+ SAP_INFO(ATP_DDM_SAP, MOD_ATP_4, MOD_DDM_4)
+ SAP_INFO(ATP_DDM_SAP, MOD_DDM, MOD_ATP)
+ SAP_INFO(ATP_DDM_SAP, MOD_DDM_2, MOD_ATP_2)
+ SAP_INFO(ATP_DDM_SAP, MOD_DDM_3, MOD_ATP_3)
+ SAP_INFO(ATP_DDM_SAP, MOD_DDM_4, MOD_ATP_4)
+
+ SAP_INFO(L4APS_TCM_SAP, MOD_TCM, MOD_L4APS)
+ SAP_INFO(L4APS_TCM_SAP, MOD_TCM_2, MOD_L4APS_2)
+ SAP_INFO(L4APS_TCM_SAP, MOD_TCM_3, MOD_L4APS_3)
+ SAP_INFO(L4APS_TCM_SAP, MOD_TCM_4, MOD_L4APS_4)
+ SAP_INFO(L4APS_TCM_SAP, MOD_L4APS, MOD_TCM)
+ SAP_INFO(L4APS_TCM_SAP, MOD_L4APS_2, MOD_TCM_2)
+ SAP_INFO(L4APS_TCM_SAP, MOD_L4APS_3, MOD_TCM_3)
+ SAP_INFO(L4APS_TCM_SAP, MOD_L4APS_4, MOD_TCM_4)
+
+ SAP_INFO(DDM_L4APS_SAP, MOD_DDM, MOD_L4APS)
+ SAP_INFO(DDM_L4APS_SAP, MOD_DDM_2, MOD_L4APS_2)
+ SAP_INFO(DDM_L4APS_SAP, MOD_DDM_3, MOD_L4APS_3)
+ SAP_INFO(DDM_L4APS_SAP, MOD_DDM_4, MOD_L4APS_4)
+ SAP_INFO(DDM_L4APS_SAP, MOD_L4APS, MOD_DDM)
+ SAP_INFO(DDM_L4APS_SAP, MOD_L4APS_2, MOD_DDM_2)
+ SAP_INFO(DDM_L4APS_SAP, MOD_L4APS_3, MOD_DDM_3)
+ SAP_INFO(DDM_L4APS_SAP, MOD_L4APS_4, MOD_DDM_4)
+
+
+ SAP_INFO(L4APS_L4BPDN_SAP, MOD_L4APS, MOD_L4BPDN)
+ SAP_INFO(L4APS_L4BPDN_SAP, MOD_L4APS_2, MOD_L4BPDN_2)
+ SAP_INFO(L4APS_L4BPDN_SAP, MOD_L4APS_3, MOD_L4BPDN_3)
+ SAP_INFO(L4APS_L4BPDN_SAP, MOD_L4APS_4, MOD_L4BPDN_4)
+ SAP_INFO(L4APS_L4BPDN_SAP, MOD_L4BPDN, MOD_L4APS)
+ SAP_INFO(L4APS_L4BPDN_SAP, MOD_L4BPDN_2, MOD_L4APS_2)
+ SAP_INFO(L4APS_L4BPDN_SAP, MOD_L4BPDN_3, MOD_L4APS_3)
+ SAP_INFO(L4APS_L4BPDN_SAP, MOD_L4BPDN_4, MOD_L4APS_4)
+
+ SAP_INFO(DDM_PAM_SAP, MOD_DDM, MOD_PAM)
+ SAP_INFO(DDM_PAM_SAP, MOD_DDM_2, MOD_PAM_2)
+ SAP_INFO(DDM_PAM_SAP, MOD_DDM_3, MOD_PAM_3)
+ SAP_INFO(DDM_PAM_SAP, MOD_DDM_4, MOD_PAM_4)
+ SAP_INFO(DDM_PAM_SAP, MOD_PAM, MOD_DDM)
+ SAP_INFO(DDM_PAM_SAP, MOD_PAM_2, MOD_DDM_2)
+ SAP_INFO(DDM_PAM_SAP, MOD_PAM_3, MOD_DDM_3)
+ SAP_INFO(DDM_PAM_SAP, MOD_PAM_4, MOD_DDM_4)
+
+ SAP_INFO(TCM_CVAL_SAP, MOD_TCM, MOD_CVAL)
+ SAP_INFO(TCM_CVAL_SAP, MOD_TCM_2, MOD_CVAL_2)
+ SAP_INFO(TCM_CVAL_SAP, MOD_TCM_3, MOD_CVAL_3)
+ SAP_INFO(TCM_CVAL_SAP, MOD_TCM_4, MOD_CVAL_4)
+ SAP_INFO(TCM_CVAL_SAP, MOD_CVAL, MOD_TCM)
+ SAP_INFO(TCM_CVAL_SAP, MOD_CVAL_2, MOD_TCM_2)
+ SAP_INFO(TCM_CVAL_SAP, MOD_CVAL_3, MOD_TCM_3)
+ SAP_INFO(TCM_CVAL_SAP, MOD_CVAL_4, MOD_TCM_4)
+ SAP_INFO(PS_CUIM_SAP, MOD_UIM, MOD_SMU)
+ SAP_INFO(PS_CUIM_SAP, MOD_UIM_2, MOD_SMU_2)
+ SAP_INFO(PS_CUIM_SAP, MOD_UIM, MOD_PHB)
+ SAP_INFO(PS_CUIM_SAP, MOD_UIM_2, MOD_PHB_2)
+ SAP_INFO(CVAL_CUIM_PROXY_SAP, MOD_CVAL, MOD_UIM_PROXY)
+
+ SAP_INFO(PS_SIM_SAP, MOD_SIM, MOD_IWLAN)
+ SAP_INFO(PS_SIM_SAP, MOD_SIM_2, MOD_IWLAN_2)
+ SAP_INFO(PS_SIM_SAP, MOD_SIM_3, MOD_IWLAN_3)
+ SAP_INFO(PS_SIM_SAP, MOD_SIM_4, MOD_IWLAN_4)
+
+
+ SAP_INFO(ATP_D2AT_SAP, MOD_ATP, MOD_D2AT)
+ SAP_INFO(ATP_D2AT_SAP, MOD_ATP_2, MOD_D2AT_2)
+ SAP_INFO(ATP_D2AT_SAP, MOD_ATP_3, MOD_D2AT_3)
+ SAP_INFO(ATP_D2AT_SAP, MOD_ATP_4, MOD_D2AT_4)
+ SAP_INFO(ATP_D2AT_SAP, MOD_D2AT, MOD_ATP)
+ SAP_INFO(ATP_D2AT_SAP, MOD_D2AT_2, MOD_ATP_2)
+ SAP_INFO(ATP_D2AT_SAP, MOD_D2AT_3, MOD_ATP_3)
+ SAP_INFO(ATP_D2AT_SAP, MOD_D2AT_4, MOD_ATP_4)
+
+ SAP_INFO(ATP_D2CM_SAP, MOD_ATP, MOD_D2CM)
+ SAP_INFO(ATP_D2CM_SAP, MOD_ATP_2, MOD_D2CM_2)
+ SAP_INFO(ATP_D2CM_SAP, MOD_ATP_3, MOD_D2CM_3)
+ SAP_INFO(ATP_D2CM_SAP, MOD_ATP_4, MOD_D2CM_4)
+ SAP_INFO(ATP_D2CM_SAP, MOD_D2CM, MOD_ATP)
+ SAP_INFO(ATP_D2CM_SAP, MOD_D2CM_2, MOD_ATP_2)
+ SAP_INFO(ATP_D2CM_SAP, MOD_D2CM_3, MOD_ATP_3)
+ SAP_INFO(ATP_D2CM_SAP, MOD_D2CM_4, MOD_ATP_4)
+
+ SAP_INFO(ATP_D2PM_SAP, MOD_ATP, MOD_D2PM)
+ SAP_INFO(ATP_D2PM_SAP, MOD_ATP_2, MOD_D2PM_2)
+ SAP_INFO(ATP_D2PM_SAP, MOD_ATP_3, MOD_D2PM_3)
+ SAP_INFO(ATP_D2PM_SAP, MOD_ATP_4, MOD_D2PM_4)
+ SAP_INFO(ATP_D2PM_SAP, MOD_D2PM, MOD_ATP)
+ SAP_INFO(ATP_D2PM_SAP, MOD_D2PM_2, MOD_ATP_2)
+ SAP_INFO(ATP_D2PM_SAP, MOD_D2PM_3, MOD_ATP_3)
+ SAP_INFO(ATP_D2PM_SAP, MOD_D2PM_4, MOD_ATP_4)
+
+ SAP_INFO(ATP_D2AM_SAP, MOD_ATP, MOD_D2AM)
+ SAP_INFO(ATP_D2AM_SAP, MOD_ATP_2, MOD_D2AM_2)
+ SAP_INFO(ATP_D2AM_SAP, MOD_ATP_3, MOD_D2AM_3)
+ SAP_INFO(ATP_D2AM_SAP, MOD_ATP_4, MOD_D2AM_4)
+ SAP_INFO(ATP_D2AM_SAP, MOD_D2AM, MOD_ATP)
+ SAP_INFO(ATP_D2AM_SAP, MOD_D2AM_2, MOD_ATP_2)
+ SAP_INFO(ATP_D2AM_SAP, MOD_D2AM_3, MOD_ATP_3)
+ SAP_INFO(ATP_D2AM_SAP, MOD_D2AM_4, MOD_ATP_4)
+
+ SAP_INFO(IMSM_D2CM_SAP, MOD_IMSM, MOD_D2CM)
+ SAP_INFO(IMSM_D2CM_SAP, MOD_IMSM_2, MOD_D2CM_2)
+ SAP_INFO(IMSM_D2CM_SAP, MOD_IMSM_3, MOD_D2CM_3)
+ SAP_INFO(IMSM_D2CM_SAP, MOD_IMSM_4, MOD_D2CM_4)
+ SAP_INFO(IMSM_D2CM_SAP, MOD_D2CM, MOD_IMSM)
+ SAP_INFO(IMSM_D2CM_SAP, MOD_D2CM_2, MOD_IMSM_2)
+ SAP_INFO(IMSM_D2CM_SAP, MOD_D2CM_3, MOD_IMSM_3)
+ SAP_INFO(IMSM_D2CM_SAP, MOD_D2CM_4, MOD_IMSM_4)
+
+ SAP_INFO(D2PM_IWLAN_SAP, MOD_D2PM, MOD_IWLAN)
+ SAP_INFO(D2PM_IWLAN_SAP, MOD_D2PM_2, MOD_IWLAN_2)
+ SAP_INFO(D2PM_IWLAN_SAP, MOD_D2PM_3, MOD_IWLAN_3)
+ SAP_INFO(D2PM_IWLAN_SAP, MOD_D2PM_4, MOD_IWLAN_4)
+ SAP_INFO(D2PM_IWLAN_SAP, MOD_IWLAN, MOD_D2PM)
+ SAP_INFO(D2PM_IWLAN_SAP, MOD_IWLAN_2, MOD_D2PM_2)
+ SAP_INFO(D2PM_IWLAN_SAP, MOD_IWLAN_3, MOD_D2PM_3)
+ SAP_INFO(D2PM_IWLAN_SAP, MOD_IWLAN_4, MOD_D2PM_4)
+
+ SAP_INFO(D2PM_DDM_SAP, MOD_D2PM, MOD_DDM)
+ SAP_INFO(D2PM_DDM_SAP, MOD_D2PM_2, MOD_DDM_2)
+ SAP_INFO(D2PM_DDM_SAP, MOD_D2PM_3, MOD_DDM_3)
+ SAP_INFO(D2PM_DDM_SAP, MOD_D2PM_4, MOD_DDM_4)
+ SAP_INFO(D2PM_DDM_SAP, MOD_DDM, MOD_D2PM)
+ SAP_INFO(D2PM_DDM_SAP, MOD_DDM_2, MOD_D2PM_2)
+ SAP_INFO(D2PM_DDM_SAP, MOD_DDM_3, MOD_D2PM_3)
+ SAP_INFO(D2PM_DDM_SAP, MOD_DDM_4, MOD_D2PM_4)
+
+ SAP_INFO(D2AM_DDM_SAP, MOD_D2AM, MOD_DDM)
+ SAP_INFO(D2AM_DDM_SAP, MOD_D2AM_2, MOD_DDM_2)
+ SAP_INFO(D2AM_DDM_SAP, MOD_D2AM_3, MOD_DDM_3)
+ SAP_INFO(D2AM_DDM_SAP, MOD_D2AM_4, MOD_DDM_4)
+ SAP_INFO(D2AM_DDM_SAP, MOD_DDM, MOD_D2AM)
+ SAP_INFO(D2AM_DDM_SAP, MOD_DDM_2, MOD_D2AM_2)
+ SAP_INFO(D2AM_DDM_SAP, MOD_DDM_3, MOD_D2AM_3)
+ SAP_INFO(D2AM_DDM_SAP, MOD_DDM_4, MOD_D2AM_4)
+
+ SAP_INFO(D2RM_IWLAN_SAP, MOD_D2RM, MOD_IWLAN)
+ SAP_INFO(D2RM_IWLAN_SAP, MOD_D2RM_2, MOD_IWLAN_2)
+ SAP_INFO(D2RM_IWLAN_SAP, MOD_D2RM_3, MOD_IWLAN_3)
+ SAP_INFO(D2RM_IWLAN_SAP, MOD_D2RM_4, MOD_IWLAN_4)
+ SAP_INFO(D2RM_IWLAN_SAP, MOD_IWLAN, MOD_D2RM)
+ SAP_INFO(D2RM_IWLAN_SAP, MOD_IWLAN_2, MOD_D2RM_2)
+ SAP_INFO(D2RM_IWLAN_SAP, MOD_IWLAN_3, MOD_D2RM_3)
+ SAP_INFO(D2RM_IWLAN_SAP, MOD_IWLAN_4, MOD_D2RM_4)
+
+ SAP_INFO(D2RM_DDM_SAP, MOD_D2RM, MOD_DDM)
+ SAP_INFO(D2RM_DDM_SAP, MOD_D2RM_2, MOD_DDM_2)
+ SAP_INFO(D2RM_DDM_SAP, MOD_D2RM_3, MOD_DDM_3)
+ SAP_INFO(D2RM_DDM_SAP, MOD_D2RM_4, MOD_DDM_4)
+ SAP_INFO(D2RM_DDM_SAP, MOD_DDM, MOD_D2RM)
+ SAP_INFO(D2RM_DDM_SAP, MOD_DDM_2, MOD_D2RM_2)
+ SAP_INFO(D2RM_DDM_SAP, MOD_DDM_3, MOD_D2RM_3)
+ SAP_INFO(D2RM_DDM_SAP, MOD_DDM_4, MOD_D2RM_4)
+
+ /*SAP_INFO(D2PM_D2RM_SAP, MOD_DAST, MOD_D2PM)
+ SAP_INFO(D2PM_D2RM_SAP, MOD_DAST_2, MOD_D2PM_2)
+ SAP_INFO(D2PM_D2RM_SAP, MOD_DAST_3, MOD_D2PM_3)
+ SAP_INFO(D2PM_D2RM_SAP, MOD_DAST_4, MOD_D2PM_4)
+ SAP_INFO(D2PM_D2RM_SAP, MOD_D2PM, MOD_DAST)
+ SAP_INFO(D2PM_D2RM_SAP, MOD_D2PM_2, MOD_DAST_2)
+ SAP_INFO(D2PM_D2RM_SAP, MOD_D2PM_3, MOD_DAST_3)
+ SAP_INFO(D2PM_D2RM_SAP, MOD_D2PM_4, MOD_DAST_4)*/
+
+ SAP_INFO(D2PM_D2RM_SAP, MOD_D2RM, MOD_D2PM)
+ SAP_INFO(D2PM_D2RM_SAP, MOD_D2RM_2, MOD_D2PM_2)
+ SAP_INFO(D2PM_D2RM_SAP, MOD_D2RM_3, MOD_D2PM_3)
+ SAP_INFO(D2PM_D2RM_SAP, MOD_D2RM_4, MOD_D2PM_4)
+ SAP_INFO(D2PM_D2RM_SAP, MOD_D2PM, MOD_D2RM)
+ SAP_INFO(D2PM_D2RM_SAP, MOD_D2PM_2, MOD_D2RM_2)
+ SAP_INFO(D2PM_D2RM_SAP, MOD_D2PM_3, MOD_D2RM_3)
+ SAP_INFO(D2PM_D2RM_SAP, MOD_D2PM_4, MOD_D2RM_4)
+
+ SAP_INFO(D2RM_WO_SAP, MOD_D2RM, MOD_WO)
+ SAP_INFO(D2RM_WO_SAP, MOD_D2RM_2, MOD_WO_2)
+ SAP_INFO(D2RM_WO_SAP, MOD_D2RM_3, MOD_WO_3)
+ SAP_INFO(D2RM_WO_SAP, MOD_D2RM_4, MOD_WO_4)
+ SAP_INFO(D2RM_WO_SAP, MOD_WO, MOD_D2RM)
+ SAP_INFO(D2RM_WO_SAP, MOD_WO_2, MOD_D2RM_2)
+ SAP_INFO(D2RM_WO_SAP, MOD_WO_3, MOD_D2RM_3)
+ SAP_INFO(D2RM_WO_SAP, MOD_WO_4, MOD_D2RM_4)
+
+ SAP_INFO(SIMMNGR_WO_SAP, MOD_SIMMNGR, MOD_WO)
+ SAP_INFO(SIMMNGR_WO_SAP, MOD_SIMMNGR_2, MOD_WO_2)
+ SAP_INFO(SIMMNGR_WO_SAP, MOD_SIMMNGR_3, MOD_WO_3)
+ SAP_INFO(SIMMNGR_WO_SAP, MOD_SIMMNGR_4, MOD_WO_4)
+ SAP_INFO(SIMMNGR_WO_SAP, MOD_WO, MOD_SIMMNGR)
+ SAP_INFO(SIMMNGR_WO_SAP, MOD_WO_2, MOD_SIMMNGR_2)
+ SAP_INFO(SIMMNGR_WO_SAP, MOD_WO_3, MOD_SIMMNGR_3)
+ SAP_INFO(SIMMNGR_WO_SAP, MOD_WO_4, MOD_SIMMNGR_4)
+
+ SAP_INFO(ATP_WO_SAP, MOD_ATP, MOD_WO)
+ SAP_INFO(ATP_WO_SAP, MOD_ATP_2, MOD_WO_2)
+ SAP_INFO(ATP_WO_SAP, MOD_ATP_3, MOD_WO_3)
+ SAP_INFO(ATP_WO_SAP, MOD_ATP_4, MOD_WO_4)
+ SAP_INFO(ATP_WO_SAP, MOD_WO, MOD_ATP)
+ SAP_INFO(ATP_WO_SAP, MOD_WO_2, MOD_ATP_2)
+ SAP_INFO(ATP_WO_SAP, MOD_WO_3, MOD_ATP_3)
+ SAP_INFO(ATP_WO_SAP, MOD_WO_4, MOD_ATP_4)
+
+ SAP_INFO(WO_ADPT_SAP, MOD_WO, MOD_WO_ADPT)
+ SAP_INFO(WO_ADPT_SAP, MOD_WO_2, MOD_WO_ADPT_2)
+ SAP_INFO(WO_ADPT_SAP, MOD_WO_3, MOD_WO_ADPT_3)
+ SAP_INFO(WO_ADPT_SAP, MOD_WO_4, MOD_WO_ADPT_4)
+ SAP_INFO(WO_ADPT_SAP, MOD_WO_ADPT, MOD_WO)
+ SAP_INFO(WO_ADPT_SAP, MOD_WO_ADPT_2, MOD_WO_2)
+ SAP_INFO(WO_ADPT_SAP, MOD_WO_ADPT_3, MOD_WO_3)
+ SAP_INFO(WO_ADPT_SAP, MOD_WO_ADPT_4, MOD_WO_4)
+
+ SAP_INFO(IMSM_SIMMNBR_SAP, MOD_IMSM, MOD_SIMMNGR)
+ SAP_INFO(IMSM_SIMMNBR_SAP, MOD_IMSM_2, MOD_SIMMNGR_2)
+ SAP_INFO(IMSM_SIMMNBR_SAP, MOD_IMSM_3, MOD_SIMMNGR_3)
+ SAP_INFO(IMSM_SIMMNBR_SAP, MOD_IMSM_4, MOD_SIMMNGR_4)
+ SAP_INFO(IMSM_SIMMNBR_SAP, MOD_SIMMNGR, MOD_IMSM)
+ SAP_INFO(IMSM_SIMMNBR_SAP, MOD_SIMMNGR_2, MOD_IMSM_2)
+ SAP_INFO(IMSM_SIMMNBR_SAP, MOD_SIMMNGR_3, MOD_IMSM_3)
+ SAP_INFO(IMSM_SIMMNBR_SAP, MOD_SIMMNGR_4, MOD_IMSM_4)
+
+ SAP_INFO(L4BSBP_L4BSIM_SAP, MOD_L4BSIM, MOD_L4BSBP)
+ SAP_INFO(L4BSBP_L4BSIM_SAP, MOD_L4BSIM_2, MOD_L4BSBP_2)
+ SAP_INFO(L4BSBP_L4BSIM_SAP, MOD_L4BSIM_3, MOD_L4BSBP_3)
+ SAP_INFO(L4BSBP_L4BSIM_SAP, MOD_L4BSIM_4, MOD_L4BSBP_4)
+
+ SAP_INFO(PS_SIM_SAP, MOD_SIM, MOD_SIMMNGR)
+ SAP_INFO(PS_SIM_SAP, MOD_SIM_2, MOD_SIMMNGR_2)
+ SAP_INFO(PS_SIM_SAP, MOD_SIM_3, MOD_SIMMNGR_3)
+ SAP_INFO(PS_SIM_SAP, MOD_SIM_4, MOD_SIMMNGR_4)
+
+ SAP_INFO(ATP_SIMMNGR_SAP, MOD_ATP, MOD_SIMMNGR)
+ SAP_INFO(ATP_SIMMNGR_SAP, MOD_ATP_2, MOD_SIMMNGR_2)
+ SAP_INFO(ATP_SIMMNGR_SAP, MOD_ATP_3, MOD_SIMMNGR_3)
+ SAP_INFO(ATP_SIMMNGR_SAP, MOD_ATP_4, MOD_SIMMNGR_4)
+ SAP_INFO(ATP_SIMMNGR_SAP, MOD_SIMMNGR, MOD_ATP)
+ SAP_INFO(ATP_SIMMNGR_SAP, MOD_SIMMNGR_2, MOD_ATP_2)
+ SAP_INFO(ATP_SIMMNGR_SAP, MOD_SIMMNGR_2, MOD_ATP_2)
+ SAP_INFO(ATP_SIMMNGR_SAP, MOD_SIMMNGR_2, MOD_ATP_2)
+
+ SAP_INFO(PS_SIM_SAP, MOD_SIM, MOD_L4BSBP)
+ SAP_INFO(PS_SIM_SAP, MOD_SIM_2, MOD_L4BSBP_2)
+ SAP_INFO(PS_SIM_SAP, MOD_SIM_3, MOD_L4BSBP_3)
+ SAP_INFO(PS_SIM_SAP, MOD_SIM_4, MOD_L4BSBP_4)
+
+ SAP_INFO(L4C_IPCORE_SAP, MOD_L4C, MOD_IPCORE)
+ SAP_INFO(L4C_IPCORE_SAP, MOD_L4C_2, MOD_IPCORE)
+ SAP_INFO(L4C_IPCORE_SAP, MOD_L4C_3, MOD_IPCORE)
+ SAP_INFO(L4C_IPCORE_SAP, MOD_L4C_4, MOD_IPCORE)
+
+ SAP_INFO(L4C_CSS_SAP, MOD_CSS, MOD_L4C)
+ SAP_INFO(L4C_CSS_SAP, MOD_CSS, MOD_L4C_2)
+ SAP_INFO(L4C_CSS_SAP, MOD_CSS, MOD_L4C_3)
+ SAP_INFO(L4C_CSS_SAP, MOD_CSS, MOD_L4C_4)
+
+ SAP_INFO(CPSW_L4C_SAP, MOD_L4C, MOD_CPSW)
+ SAP_INFO(CPSW_L4C_SAP, MOD_L4C_2, MOD_CPSW)
+ SAP_INFO(CPSW_L4C_SAP, MOD_L4C_3, MOD_CPSW)
+ SAP_INFO(CPSW_L4C_SAP, MOD_L4C_4, MOD_CPSW)
+
+ SAP_INFO(EVCLC_L4C_SAP, MOD_L4C, MOD_EVCLC)
+ SAP_INFO(EVCLC_L4C_SAP, MOD_L4C_2, MOD_EVCLC)
+ SAP_INFO(EVCLC_L4C_SAP, MOD_L4C_3, MOD_EVCLC)
+ SAP_INFO(EVCLC_L4C_SAP, MOD_L4C_4, MOD_EVCLC)
+
+ SAP_INFO(EVRMC_L4C_SAP, MOD_L4C, MOD_EVRMC)
+ SAP_INFO(EVRMC_L4C_SAP, MOD_L4C_2, MOD_EVRMC)
+ SAP_INFO(EVRMC_L4C_SAP, MOD_L4C_3, MOD_EVRMC)
+ SAP_INFO(EVRMC_L4C_SAP, MOD_L4C_4, MOD_EVRMC)
+
+ SAP_INFO(RRM_RR_SMP_SAP,MOD_RRM_FDD,MOD_RR_SMP)
+
+ SAP_INFO(RRM_RR_SMP_SAP,MOD_RRM_TDD,MOD_RR_SMP_TDD)
+ /* SSDS */
+ SAP_INFO(ATP_SSDS_SAP, MOD_ATP, MOD_SSDS)
+ SAP_INFO(ATP_SSDS_SAP, MOD_ATP_2, MOD_SSDS_2)
+ SAP_INFO(ATP_SSDS_SAP, MOD_ATP_3, MOD_SSDS_3)
+ SAP_INFO(ATP_SSDS_SAP, MOD_ATP_4, MOD_SSDS_4)
+ SAP_INFO(ATP_SSDS_SAP, MOD_SSDS, MOD_ATP)
+ SAP_INFO(ATP_SSDS_SAP, MOD_SSDS_2, MOD_ATP_2)
+ SAP_INFO(ATP_SSDS_SAP, MOD_SSDS_3, MOD_ATP_3)
+ SAP_INFO(ATP_SSDS_SAP, MOD_SSDS_4, MOD_ATP_4)
+ /*for gen95 start*/
+ SAP_INFO(SSDS_XCAP_SAP, MOD_XCAP_CLIENT, MOD_SSDS)
+ SAP_INFO(SSDS_XCAP_SAP, MOD_XCAP_CLIENT_2, MOD_SSDS_2)
+ SAP_INFO(SSDS_XCAP_SAP, MOD_XCAP_CLIENT_3, MOD_SSDS_3)
+ SAP_INFO(SSDS_XCAP_SAP, MOD_XCAP_CLIENT_4, MOD_SSDS_4)
+ SAP_INFO(SSDS_XCAP_SAP, MOD_SSDS, MOD_XCAP_CLIENT)
+ SAP_INFO(SSDS_XCAP_SAP, MOD_SSDS_2, MOD_XCAP_CLIENT_2)
+ SAP_INFO(SSDS_XCAP_SAP, MOD_SSDS_3, MOD_XCAP_CLIENT_3)
+ SAP_INFO(SSDS_XCAP_SAP, MOD_SSDS_4, MOD_XCAP_CLIENT_4)
+ /*for gen95 end*/
+ SAP_INFO(SSDS_XCAP_SAP, MOD_XCAP_CCCI, MOD_SSDS)
+ SAP_INFO(SSDS_XCAP_SAP, MOD_XCAP_CCCI, MOD_SSDS_2)
+ SAP_INFO(SSDS_XCAP_SAP, MOD_XCAP_CCCI, MOD_SSDS_3)
+ SAP_INFO(SSDS_XCAP_SAP, MOD_XCAP_CCCI, MOD_SSDS_4)
+ SAP_INFO(SSDS_XCAP_SAP, MOD_SSDS, MOD_XCAP_CCCI)
+ SAP_INFO(SSDS_XCAP_SAP, MOD_SSDS_2, MOD_XCAP_CCCI)
+ SAP_INFO(SSDS_XCAP_SAP, MOD_SSDS_3, MOD_XCAP_CCCI)
+ SAP_INFO(SSDS_XCAP_SAP, MOD_SSDS_4, MOD_XCAP_CCCI)
+ SAP_INFO(SSDS_SIMMNGR_SAP, MOD_SSDS, MOD_SIMMNGR)
+ SAP_INFO(SSDS_SIMMNGR_SAP, MOD_SSDS_2, MOD_SIMMNGR_2)
+ SAP_INFO(SSDS_SIMMNGR_SAP, MOD_SSDS_3, MOD_SIMMNGR_3)
+ SAP_INFO(SSDS_SIMMNGR_SAP, MOD_SSDS_4, MOD_SIMMNGR_4)
+ SAP_INFO(SSDS_D2CM_SAP, MOD_SSDS, MOD_D2CM)
+ SAP_INFO(SSDS_D2CM_SAP, MOD_SSDS_2, MOD_D2CM_2)
+ SAP_INFO(SSDS_D2CM_SAP, MOD_SSDS_3, MOD_D2CM_3)
+ SAP_INFO(SSDS_D2CM_SAP, MOD_SSDS_4, MOD_D2CM_4)
+
+ SAP_INFO(IMSM_SSDS_SAP, MOD_IMSM, MOD_SSDS)
+ SAP_INFO(IMSM_SSDS_SAP, MOD_IMSM_2, MOD_SSDS_2)
+ SAP_INFO(IMSM_SSDS_SAP, MOD_IMSM_3, MOD_SSDS_3)
+ SAP_INFO(IMSM_SSDS_SAP, MOD_IMSM_4, MOD_SSDS_4)
+ SAP_INFO(IMSM_SSDS_SAP, MOD_SSDS, MOD_IMSM)
+ SAP_INFO(IMSM_SSDS_SAP, MOD_SSDS_2, MOD_IMSM_2)
+ SAP_INFO(IMSM_SSDS_SAP, MOD_SSDS_3, MOD_IMSM_3)
+ SAP_INFO(IMSM_SSDS_SAP, MOD_SSDS_4, MOD_IMSM_4)
+ SAP_INFO(SSDS_SSDS_SAP, MOD_SSDS,MOD_SSDS_2)
+ SAP_INFO(SSDS_SSDS_SAP, MOD_SSDS,MOD_SSDS_3)
+ SAP_INFO(SSDS_SSDS_SAP, MOD_SSDS,MOD_SSDS_4)
+ SAP_INFO(SSDS_SSDS_SAP, MOD_SSDS_2,MOD_SSDS_3)
+ SAP_INFO(SSDS_SSDS_SAP, MOD_SSDS_2,MOD_SSDS_4)
+ SAP_INFO(SSDS_SSDS_SAP, MOD_SSDS_3,MOD_SSDS_4)
+
+ SAP_INFO(ATP_SLT_SAP, MOD_ATP, MOD_SLT_NL)
+ SAP_INFO(ATP_SLT_SAP, MOD_ATP_2, MOD_SLT_NL)
+ SAP_INFO(ATP_SLT_SAP, MOD_ATP_3, MOD_SLT_NL)
+ SAP_INFO(ATP_SLT_SAP, MOD_ATP_4, MOD_SLT_NL)
+
+ SAP_INFO(ATP_D2RM_SAP, MOD_ATP, MOD_DAST)
+ SAP_INFO(ATP_D2RM_SAP, MOD_ATP_2, MOD_DAST_2)
+ SAP_INFO(ATP_D2RM_SAP, MOD_ATP_3, MOD_DAST_3)
+ SAP_INFO(ATP_D2RM_SAP, MOD_ATP_4, MOD_DAST_4)
+ SAP_INFO(ATP_D2RM_SAP, MOD_DAST, MOD_ATP)
+ SAP_INFO(ATP_D2RM_SAP, MOD_DAST_2, MOD_ATP_2)
+ SAP_INFO(ATP_D2RM_SAP, MOD_DAST_3, MOD_ATP_3)
+ SAP_INFO(ATP_D2RM_SAP, MOD_DAST_4, MOD_ATP_4)
+
+ SAP_INFO(IMC_D2RM_SAP, MOD_IMC, MOD_DAST)
+ SAP_INFO(IMC_D2RM_SAP, MOD_IMC_2, MOD_DAST_2)
+ SAP_INFO(IMC_D2RM_SAP, MOD_IMC_3, MOD_DAST_3)
+ SAP_INFO(IMC_D2RM_SAP, MOD_IMC_4, MOD_DAST_4)
+ SAP_INFO(IMC_D2RM_SAP, MOD_DAST, MOD_IMC)
+ SAP_INFO(IMC_D2RM_SAP, MOD_DAST_2, MOD_IMC_2)
+ SAP_INFO(IMC_D2RM_SAP, MOD_DAST_3, MOD_IMC_3)
+ SAP_INFO(IMC_D2RM_SAP, MOD_DAST_4, MOD_IMC_4)
+
+ SAP_INFO(CVAL_PHB_SAP, MOD_CVAL, MOD_PHB)
+ SAP_INFO(CUIM_PROXY_UIM_SAP, MOD_UIM_PROXY, MOD_UIM)
+ SAP_INFO(CUIM_PROXY_UIM_SAP, MOD_UIM_PROXY, MOD_UIM_2)
+ SAP_INFO(CVAL_PHB_SAP, MOD_CVAL_ATC, MOD_PHB)
+
+ SAP_INFO(CUIM_SAP, MOD_UIM, MOD_UIM)
+ SAP_INFO(CUIM_SAP, MOD_UIM_2, MOD_UIM_2)
+
+ SAP_INFO(LCSP_GNSS_SAP, MOD_LPP, MOD_GPS)
+ SAP_INFO(LPP_ERRC_SAP, MOD_LPP, MOD_ERRC)
+ SAP_INFO(LPP_LPP_SAP, MOD_LPP, MOD_LPP)
+ SAP_INFO(LPP_L4C_SAP, MOD_LPP, MOD_L4C)
+ SAP_INFO(LPP_LBS_SAP, MOD_LPP, MOD_LBS)
+ SAP_INFO(LPP_LPPE_SAP, MOD_LPP, MOD_LPPE)
+ SAP_INFO(LPP_ETC_SAP, MOD_LPP, MOD_ETC)
+
+ SAP_INFO(IWLAN_L4C_SAP, MOD_IWLAN, MOD_L4C)
+ SAP_INFO(IWLAN_L4C_SAP, MOD_L4C, MOD_IWLAN)
+ SAP_INFO(CUIM_CPSW_SAP, MOD_UIM, MOD_CPSW)
+ SAP_INFO(CUIM_CPSW_SAP, MOD_UIM_2, MOD_CPSW)
+ SAP_INFO(CUIM_PHB_SAP, MOD_UIM, MOD_PHB)
+ SAP_INFO(CUIM_PHB_SAP, MOD_UIM_2, MOD_PHB_2)
+
+ /* L4BNW <-> CVAL */
+ SAP_INFO(L4BNW_CVAL_SAP, MOD_L4BNW, MOD_CVAL)
+ SAP_INFO(L4BNW_CVAL_SAP, MOD_L4BNW_2, MOD_CVAL)
+ SAP_INFO(L4BNW_CVAL_SAP, MOD_L4BNW_3, MOD_CVAL)
+ SAP_INFO(L4BNW_CVAL_SAP, MOD_L4BNW_4, MOD_CVAL)
+ SAP_INFO(L4BNW_CVAL_SAP, MOD_CVAL, MOD_L4BNW)
+ SAP_INFO(L4BNW_CVAL_SAP, MOD_CVAL, MOD_L4BNW_2)
+ SAP_INFO(L4BNW_CVAL_SAP, MOD_CVAL, MOD_L4BNW_3)
+ SAP_INFO(L4BNW_CVAL_SAP, MOD_CVAL, MOD_L4BNW_4)
+
+ SAP_INFO(IWLAN_L4BNW_SAP, MOD_IWLAN, MOD_L4BNW)
+ SAP_INFO(IWLAN_L4BNW_SAP, MOD_IWLAN_2, MOD_L4BNW_2)
+ SAP_INFO(IWLAN_L4BNW_SAP, MOD_IWLAN_3, MOD_L4BNW_3)
+ SAP_INFO(IWLAN_L4BNW_SAP, MOD_IWLAN_4, MOD_L4BNW_4)
+ SAP_INFO(IWLAN_L4BNW_SAP, MOD_L4BNW, MOD_IWLAN)
+ SAP_INFO(IWLAN_L4BNW_SAP, MOD_L4BNW_2, MOD_IWLAN_2)
+ SAP_INFO(IWLAN_L4BNW_SAP, MOD_L4BNW_3, MOD_IWLAN_3)
+ SAP_INFO(IWLAN_L4BNW_SAP, MOD_L4BNW_4, MOD_IWLAN_4)
+ SAP_INFO(UIM_SIM_SAP,MOD_SIM,MOD_UIM)
+ SAP_INFO(UIM_SIM_SAP,MOD_SIM_2,MOD_UIM_2)
+ SAP_INFO(UIM_SIM_SAP,MOD_SIM_3,MOD_UIM_3)
+
+#ifdef __IPC_ADAPTER__
+ /* IPCA */
+ SAP_INFO(IPCA_DOMESTIC_SAP, MOD_IPCA_NW, MOD_IPCA_DOMESTIC)
+ SAP_INFO(IPCA_DOMESTIC_SAP, MOD_IPCA_NW_2, MOD_IPCA_DOMESTIC_2)
+ SAP_INFO(IPCA_DOMESTIC_SAP, MOD_IPCA_DOMESTIC, MOD_USIME_FDD)
+ SAP_INFO(IPCA_DOMESTIC_SAP, MOD_IPCA_DOMESTIC_2, MOD_USIME_FDD_2)
+ SAP_INFO(IPCA_DOMESTIC_SAP, MOD_IPCA_DOMESTIC, MOD_USIME_TDD)
+ SAP_INFO(IPCA_DOMESTIC_SAP, MOD_IPCA_DOMESTIC_2, MOD_USIME_TDD_2)
+ SAP_INFO(IPCA_DOMESTIC_SAP, MOD_IPCA_DOMESTIC, MOD_IPCA_EM)
+ SAP_INFO(IPCA_DOMESTIC_SAP, MOD_IPCA_DOMESTIC_2, MOD_IPCA_EM_2)
+
+ SAP_INFO(IPCA_PWR_SAP, MOD_IPCA_CTRL, MOD_IPCA_PWR)
+ SAP_INFO(IPCA_PWR_SAP, MOD_IPCA_PWR, MOD_IPCA_PWR)
+ SAP_INFO(IPCA_PWR_SAP, MOD_IPCA_CTRL, MOD_IPCA_PWR_2)
+ SAP_INFO(IPCA_PWR_SAP, MOD_IPCA_PWR_2, MOD_IPCA_PWR_2)
+ SAP_INFO(IPCA_PWR_SAP, MOD_IPCA_CTRL, MOD_IPCA_PWR_3)
+ SAP_INFO(IPCA_PWR_SAP, MOD_IPCA_PWR_3, MOD_IPCA_PWR_3)
+ SAP_INFO(IPCA_PWR_SAP, MOD_IPCA_CTRL, MOD_IPCA_PWR_4)
+ SAP_INFO(IPCA_PWR_SAP, MOD_IPCA_PWR_4, MOD_IPCA_PWR_4)
+ SAP_INFO(IPCA_PWR_SAP, MOD_IPCA_DOMESTIC, MOD_IPCA_PWR)
+ SAP_INFO(IPCA_PWR_SAP, MOD_IPCA_DOMESTIC_2, MOD_IPCA_PWR_2)
+ SAP_INFO(IPCA_PWR_SAP, MOD_IPCA_PWR, MOD_IPCA_DOMESTIC)
+ SAP_INFO(IPCA_PWR_SAP, MOD_IPCA_PWR_2, MOD_IPCA_DOMESTIC_2)
+ SAP_INFO(IPCA_ATP_SAP, MOD_IPCA_CTRL, MOD_ATP)
+ SAP_INFO(IPCA_ATP_SAP, MOD_IPCA_CTRL, MOD_ATP_2)
+ SAP_INFO(IPCA_ATP_SAP, MOD_IPCA_CTRL, MOD_ATP_3)
+ SAP_INFO(IPCA_ATP_SAP, MOD_IPCA_CTRL, MOD_ATP_4)
+ SAP_INFO(IPCA_SMS_SAP, MOD_IPCA_CTRL, MOD_IPCA_SMS)
+ SAP_INFO(IPCA_SMU_SAP, MOD_IPCA_CTRL, MOD_IPCA_SMU)
+ SAP_INFO(IPCA_SMU_SAP, MOD_IPCA_CTRL, MOD_IPCA_SMU_2)
+ SAP_INFO(IPCA_SMU_SAP, MOD_IPCA_CTRL, MOD_IPCA_SMU_3)
+ SAP_INFO(IPCA_SMU_SAP, MOD_IPCA_CTRL, MOD_IPCA_SMU_4)
+ SAP_INFO(IPCA_SMU_SAP, MOD_IPCA_SMU, MOD_IPCA_SMU)
+ SAP_INFO(IPCA_SMU_SAP, MOD_IPCA_SMU_2, MOD_IPCA_SMU_2)
+ SAP_INFO(IPCA_SMU_SAP, MOD_IPCA_SMU_3, MOD_IPCA_SMU_3)
+ SAP_INFO(IPCA_SMU_SAP, MOD_IPCA_SMU_4, MOD_IPCA_SMU_4)
+ SAP_INFO(IPCA_PHB_SAP, MOD_IPCA_CTRL, MOD_IPCA_PHB)
+ SAP_INFO(IPCA_PHB_SAP, MOD_IPCA_CTRL, MOD_IPCA_PHB_2)
+ SAP_INFO(IPCA_PHB_SAP, MOD_IPCA_CTRL, MOD_IPCA_PHB_3)
+ SAP_INFO(IPCA_PHB_SAP, MOD_IPCA_CTRL, MOD_IPCA_PHB_4)
+ SAP_INFO(IPCA_CC_SAP, MOD_IPCA_CTRL, MOD_IPCA_CC)
+ SAP_INFO(IPCA_CC_SAP, MOD_IPCA_CTRL, MOD_IPCA_CC_2)
+ SAP_INFO(IPCA_CC_SAP, MOD_IPCA_CTRL, MOD_IPCA_CC_3)
+ SAP_INFO(IPCA_CC_SAP, MOD_IPCA_CTRL, MOD_IPCA_CC_4)
+ SAP_INFO(IPCA_CC_SAP, MOD_IPCA_SAT, MOD_IPCA_CC)
+ SAP_INFO(IPCA_CC_SAP, MOD_IPCA_SAT_2, MOD_IPCA_CC_2)
+ SAP_INFO(IPCA_CC_SAP, MOD_IPCA_SAT_3, MOD_IPCA_CC_3)
+ SAP_INFO(IPCA_CC_SAP, MOD_IPCA_SAT_4, MOD_IPCA_CC_4)
+ SAP_INFO(IPCA_SS_SAP, MOD_IPCA_CTRL, MOD_IPCA_SS)
+ SAP_INFO(IPCA_SS_SAP, MOD_IPCA_CTRL, MOD_IPCA_SS_2)
+ SAP_INFO(IPCA_SS_SAP, MOD_IPCA_CTRL, MOD_IPCA_SS_3)
+ SAP_INFO(IPCA_SS_SAP, MOD_IPCA_CTRL, MOD_IPCA_SS_4)
+ SAP_INFO(IPCA_NW_SAP, MOD_IPCA_CTRL, MOD_IPCA_NW)
+ SAP_INFO(IPCA_NW_SAP, MOD_IPCA_CTRL, MOD_IPCA_NW_2)
+ SAP_INFO(IPCA_NW_SAP, MOD_IPCA_CTRL, MOD_IPCA_NW_3)
+ SAP_INFO(IPCA_NW_SAP, MOD_IPCA_CTRL, MOD_IPCA_NW_4)
+ SAP_INFO(IPCA_MISC_SAP, MOD_IPCA_CTRL, MOD_IPCA_MISC)
+ SAP_INFO(IPCA_MISC_SAP, MOD_IPCA_CTRL, MOD_IPCA_MISC_2)
+ SAP_INFO(IPCA_MISC_SAP, MOD_IPCA_CTRL, MOD_IPCA_MISC_3)
+ SAP_INFO(IPCA_MISC_SAP, MOD_IPCA_CTRL, MOD_IPCA_MISC_4)
+ SAP_INFO(IPCA_MISC_SAP, MOD_IPCA_GPRS, MOD_IPCA_MISC)
+ SAP_INFO(IPCA_MISC_SAP, MOD_IPCA_GPRS_2, MOD_IPCA_MISC_2)
+ SAP_INFO(IPCA_MISC_SAP, MOD_IPCA_GPRS_3, MOD_IPCA_MISC_3)
+ SAP_INFO(IPCA_MISC_SAP, MOD_IPCA_GPRS_4, MOD_IPCA_MISC_4)
+ SAP_INFO(IPCA_MISC_SAP, MOD_IPCA_CC, MOD_IPCA_MISC)
+ SAP_INFO(IPCA_MISC_SAP, MOD_IPCA_CC_2, MOD_IPCA_MISC_2)
+ SAP_INFO(IPCA_MISC_SAP, MOD_IPCA_CC_3, MOD_IPCA_MISC_3)
+ SAP_INFO(IPCA_MISC_SAP, MOD_IPCA_CC_4, MOD_IPCA_MISC_4)
+ SAP_INFO(IPCA_GPRS_SAP, MOD_IPCA_CTRL, MOD_IPCA_GPRS)
+ SAP_INFO(IPCA_GPRS_SAP, MOD_IPCA_GPRS, MOD_IPCA_GPRS)
+
+ SAP_INFO(IPCA_ATP_SAP, MOD_IPCA_GPRS_ROUTINE, MOD_ATP)
+
+ SAP_INFO(IPCA_GPRS_ROUTINE_SAP, MOD_IPCA_GPRS, MOD_IPCA_GPRS_ROUTINE)
+ SAP_INFO(IPCA_GPRS_ROUTINE_SAP, MOD_IPCA_GPRS_ROUTINE, MOD_IPCA_GPRS)
+ SAP_INFO(IPCA_GPRS_ROUTINE_SAP, MOD_IPCA_OEM, MOD_IPCA_GPRS_ROUTINE)
+ SAP_INFO(IPCA_GPRS_ROUTINE_SAP, MOD_IPCA_GPRS_ROUTINE, MOD_IPCA_OEM)
+
+ SAP_INFO(IPCA_GPRS_ROUTINE_SAP, MOD_IPCA_GPRS_2, MOD_IPCA_GPRS_ROUTINE_2)
+ SAP_INFO(IPCA_GPRS_ROUTINE_SAP, MOD_IPCA_GPRS_ROUTINE_2, MOD_IPCA_GPRS_2)
+ SAP_INFO(IPCA_GPRS_ROUTINE_SAP, MOD_IPCA_OEM_2, MOD_IPCA_GPRS_ROUTINE_2)
+ SAP_INFO(IPCA_GPRS_ROUTINE_SAP, MOD_IPCA_GPRS_ROUTINE_2, MOD_IPCA_OEM_2)
+
+ SAP_INFO(IPCA_GPRS_ROUTINE_SAP, MOD_IPCA_GPRS_3, MOD_IPCA_GPRS_ROUTINE_3)
+ SAP_INFO(IPCA_GPRS_ROUTINE_SAP, MOD_IPCA_GPRS_ROUTINE_3, MOD_IPCA_GPRS_3)
+ SAP_INFO(IPCA_GPRS_ROUTINE_SAP, MOD_IPCA_OEM_3, MOD_IPCA_GPRS_ROUTINE_3)
+ SAP_INFO(IPCA_GPRS_ROUTINE_SAP, MOD_IPCA_GPRS_ROUTINE_3, MOD_IPCA_OEM_3)
+
+ SAP_INFO(IPCA_GPRS_ROUTINE_SAP, MOD_IPCA_GPRS_4, MOD_IPCA_GPRS_ROUTINE_4)
+ SAP_INFO(IPCA_GPRS_ROUTINE_SAP, MOD_IPCA_GPRS_ROUTINE_4, MOD_IPCA_GPRS_4)
+ SAP_INFO(IPCA_GPRS_ROUTINE_SAP, MOD_IPCA_OEM_4, MOD_IPCA_GPRS_ROUTINE_4)
+ SAP_INFO(IPCA_GPRS_ROUTINE_SAP, MOD_IPCA_GPRS_ROUTINE_4, MOD_IPCA_OEM_4)
+
+ SAP_INFO(IPCA_FACTORY_SAP, MOD_IPCA_CTRL, MOD_IPCA_FACTORY)
+ SAP_INFO(IPCA_FACTORY_SAP, MOD_IPCA_FACTORY, MOD_IPCA_FACTORY)
+ SAP_INFO(IPCA_DSPL_SAP, MOD_IPCA_CTRL, MOD_IPCA_DSPL)
+ SAP_INFO(IPCA_DSPL_SAP, MOD_IPCA_CTRL, MOD_IPCA_DSPL_2)
+ SAP_INFO(IPCA_DSPL_SAP, MOD_IPCA_CTRL, MOD_IPCA_DSPL_3)
+ SAP_INFO(IPCA_DSPL_SAP, MOD_IPCA_CTRL, MOD_IPCA_DSPL_4)
+ SAP_INFO(IPCA_DSPL_SAP, MOD_IPCA_EM, MOD_IPCA_DSPL)
+ SAP_INFO(IPCA_DSPL_SAP, MOD_IPCA_EM_2, MOD_IPCA_DSPL_2)
+ SAP_INFO(IPCA_DSPL_SAP, MOD_IPCA_EM_3, MOD_IPCA_DSPL_3)
+ SAP_INFO(IPCA_DSPL_SAP, MOD_IPCA_EM_4, MOD_IPCA_DSPL_4)
+ SAP_INFO(IPCA_UT_SAP, MOD_IPCA_CTRL, MOD_DHL)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_PHB, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_GPRS, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_GPRS)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_FACTORY, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_FACTORY)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_SMS, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_SS, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_SS_2, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_SS_3, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_SS_4, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_SMU, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_SMU_2, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_SMU_3, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_SMU_4, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_CC, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_DSPL, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_DSPL_2, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_DSPL_3, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_DSPL_4, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_CFG, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_CFG_2, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_CFG_3, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_CFG_4, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_CFG_SAP, MOD_IPCA_CTRL, MOD_IPCA_CFG)
+ SAP_INFO(IPCA_CFG_SAP, MOD_IPCA_CTRL, MOD_IPCA_CFG_2)
+ SAP_INFO(IPCA_CFG_SAP, MOD_IPCA_CTRL, MOD_IPCA_CFG_3)
+ SAP_INFO(IPCA_CFG_SAP, MOD_IPCA_CTRL, MOD_IPCA_CFG_4)
+
+ SAP_INFO(IPCA_CTRL_SAP, MOD_IPCA_CTRL, MOD_IPCA_CTRL)
+
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_NW, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_NW_2, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_NW_3, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_NW_4, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_NW)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_NW_2)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_NW_3)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_NW_4)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_NW, MOD_IPCA_NW)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_NW, MOD_IPCA_NW_2)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_NW, MOD_IPCA_NW_3)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_NW, MOD_IPCA_NW_4)
+
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_PWR, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_PWR)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_PWR_2, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_PWR_2)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_PWR_3, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_PWR_3)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_PWR_4, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_PWR_4)
+
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_MISC, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_MISC)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_MISC_2, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_MISC_2)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_MISC_3, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_MISC_3)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_MISC_4, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_MISC_4)
+
+ SAP_INFO(IPCA_ATP_SAP, MOD_IPCA_SAT, MOD_ATP)
+ SAP_INFO(IPCA_ATP_SAP, MOD_IPCA_SAT_2, MOD_ATP_2)
+ SAP_INFO(IPCA_ATP_SAP, MOD_IPCA_SAT_3, MOD_ATP_3)
+ SAP_INFO(IPCA_ATP_SAP, MOD_IPCA_SAT_4, MOD_ATP_4)
+ SAP_INFO(IPCA_SAT_SAP, MOD_IPCA_CTRL, MOD_IPCA_SAT)
+ SAP_INFO(IPCA_SAT_SAP, MOD_IPCA_SAT, MOD_IPCA_SAT)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_SAT, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_SAT)
+ SAP_INFO(IPCA_SAT_SAP, MOD_IPCA_CTRL, MOD_IPCA_SAT_2)
+ SAP_INFO(IPCA_SAT_SAP, MOD_IPCA_SAT_2, MOD_IPCA_SAT_2)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_SAT_2, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_SAT_2)
+ SAP_INFO(IPCA_SAT_SAP, MOD_IPCA_CTRL, MOD_IPCA_SAT_3)
+ SAP_INFO(IPCA_SAT_SAP, MOD_IPCA_SAT_3, MOD_IPCA_SAT_3)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_SAT_3, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_SAT_3)
+ SAP_INFO(IPCA_SAT_SAP, MOD_IPCA_CTRL, MOD_IPCA_SAT_4)
+ SAP_INFO(IPCA_SAT_SAP, MOD_IPCA_SAT_4, MOD_IPCA_SAT_4)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_SAT_4, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_SAT_4)
+
+ SAP_INFO(IPCA_SMS_SAP, MOD_IPCA_CTRL, MOD_IPCA_SMS_2)
+ SAP_INFO(IPCA_SMS_SAP, MOD_IPCA_SMS, MOD_IPCA_SMS)
+ SAP_INFO(IPCA_SMS_SAP, MOD_IPCA_SMS_2, MOD_IPCA_SMS_2)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_SMS_2, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_SMS_2)
+ SAP_INFO(IPCA_SMS_SAP, MOD_IPCA_CTRL, MOD_IPCA_SMS_3)
+ SAP_INFO(IPCA_SMS_SAP, MOD_IPCA_SMS_3, MOD_IPCA_SMS_3)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_SMS_3, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_SMS_3)
+ SAP_INFO(IPCA_SMS_SAP, MOD_IPCA_CTRL, MOD_IPCA_SMS_4)
+ SAP_INFO(IPCA_SMS_SAP, MOD_IPCA_SMS_4, MOD_IPCA_SMS_4)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_SMS_4, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_SMS_4)
+
+ SAP_INFO(IPCA_GPRS_SAP, MOD_IPCA_CTRL, MOD_IPCA_GPRS_2)
+ SAP_INFO(IPCA_GPRS_SAP, MOD_IPCA_GPRS_2, MOD_IPCA_GPRS_2)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_GPRS_2, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_GPRS_2)
+ SAP_INFO(IPCA_GPRS_SAP, MOD_IPCA_CTRL, MOD_IPCA_GPRS_3)
+ SAP_INFO(IPCA_GPRS_SAP, MOD_IPCA_GPRS_3, MOD_IPCA_GPRS_3)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_GPRS_3, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_GPRS_3)
+ SAP_INFO(IPCA_GPRS_SAP, MOD_IPCA_CTRL, MOD_IPCA_GPRS_4)
+ SAP_INFO(IPCA_GPRS_SAP, MOD_IPCA_GPRS_4, MOD_IPCA_GPRS_4)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_GPRS_4, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_GPRS_4)
+
+ SAP_INFO(IPCA_SND_SAP, MOD_IPCA_CTRL, MOD_IPCA_SND)
+
+ SAP_INFO(IPCA_SAP_SAP, MOD_IPCA_CTRL, MOD_IPCA_SAP)
+ SAP_INFO(IPCA_SAP_SAP, MOD_IPCA_SAP, MOD_IPCA_SAP)
+ SAP_INFO(IPCA_SAP_SAP, MOD_IPCA_CTRL, MOD_IPCA_SAP_2)
+ SAP_INFO(IPCA_SAP_SAP, MOD_IPCA_SAP_2, MOD_IPCA_SAP_2)
+ SAP_INFO(IPCA_SAP_SAP, MOD_IPCA_CTRL, MOD_IPCA_SAP_3)
+ SAP_INFO(IPCA_SAP_SAP, MOD_IPCA_SAP_3, MOD_IPCA_SAP_3)
+ SAP_INFO(IPCA_SAP_SAP, MOD_IPCA_CTRL, MOD_IPCA_SAP_4)
+ SAP_INFO(IPCA_SAP_SAP, MOD_IPCA_SAP_4, MOD_IPCA_SAP_4)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_SAP, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_SAP)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_SAP_2, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_SAP_2)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_SAP_3, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_SAP_3)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_SAP_4, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_SAP_4)
+ SAP_INFO(IPCA_NW_GPRS_SAP, MOD_IPCA_NW , MOD_IPCA_GPRS)
+ SAP_INFO(IPCA_NW_GPRS_SAP, MOD_IPCA_NW_2 , MOD_IPCA_GPRS_2)
+ SAP_INFO(IPCA_NW_GPRS_SAP, MOD_IPCA_NW_3 , MOD_IPCA_GPRS_3)
+ SAP_INFO(IPCA_NW_GPRS_SAP, MOD_IPCA_NW_4 , MOD_IPCA_GPRS_4)
+
+ SAP_INFO(IPCA_NW_GPRS_SAP, MOD_IPCA_GPRS , MOD_IPCA_NW)
+ SAP_INFO(IPCA_NW_GPRS_SAP, MOD_IPCA_GPRS_2 , MOD_IPCA_NW_2)
+ SAP_INFO(IPCA_NW_GPRS_SAP, MOD_IPCA_GPRS_3 , MOD_IPCA_NW_3)
+ SAP_INFO(IPCA_NW_GPRS_SAP, MOD_IPCA_GPRS_4 , MOD_IPCA_NW_4)
+
+ SAP_INFO(IPCA_NW_GPRS_SAP, MOD_IPCA_NW , MOD_IPCA_GPRS_ROUTINE)
+ SAP_INFO(IPCA_NW_GPRS_SAP, MOD_IPCA_NW_2 , MOD_IPCA_GPRS_ROUTINE_2)
+ SAP_INFO(IPCA_NW_GPRS_SAP, MOD_IPCA_NW_3 , MOD_IPCA_GPRS_ROUTINE_3)
+ SAP_INFO(IPCA_NW_GPRS_SAP, MOD_IPCA_NW_4 , MOD_IPCA_GPRS_ROUTINE_4)
+
+ SAP_INFO(IPCA_NW_GPRS_SAP, MOD_IPCA_GPRS_ROUTINE , MOD_IPCA_NW)
+ SAP_INFO(IPCA_NW_GPRS_SAP, MOD_IPCA_GPRS_ROUTINE_2 , MOD_IPCA_NW_2)
+ SAP_INFO(IPCA_NW_GPRS_SAP, MOD_IPCA_GPRS_ROUTINE_3 , MOD_IPCA_NW_3)
+ SAP_INFO(IPCA_NW_GPRS_SAP, MOD_IPCA_GPRS_ROUTINE_4 , MOD_IPCA_NW_4)
+
+ SAP_INFO(IPCA_GPRS_SAP, MOD_IPCA_SMU , MOD_IPCA_GPRS)
+ SAP_INFO(IPCA_GPRS_SAP, MOD_IPCA_SMU_2 , MOD_IPCA_GPRS_2)
+ SAP_INFO(IPCA_GPRS_SAP, MOD_IPCA_SMU_3 , MOD_IPCA_GPRS_3)
+ SAP_INFO(IPCA_GPRS_SAP, MOD_IPCA_SMU_4 , MOD_IPCA_GPRS_4)
+
+ SAP_INFO(IPCA_PWR_SAP, MOD_IPCA_GPRS, MOD_IPCA_PWR)
+ SAP_INFO(IPCA_PWR_SAP, MOD_IPCA_GPRS_2, MOD_IPCA_PWR_2)
+ SAP_INFO(IPCA_PWR_SAP, MOD_IPCA_GPRS_3, MOD_IPCA_PWR_3)
+ SAP_INFO(IPCA_PWR_SAP, MOD_IPCA_GPRS_4, MOD_IPCA_PWR_4)
+
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_EMBMS, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_EMBMS_2, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_EMBMS)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_EMBMS_2)
+ SAP_INFO(IPCA_EMBMS_SAP, MOD_IPCA_CTRL, MOD_IPCA_EMBMS)
+ SAP_INFO(IPCA_EMBMS_SAP, MOD_IPCA_CTRL, MOD_IPCA_EMBMS_2)
+ SAP_INFO(IPCA_EMBMS_SAP, MOD_IPCA_EMBMS, MOD_IPCA_CTRL)
+ SAP_INFO(IPCA_EMBMS_SAP, MOD_IPCA_EMBMS_2, MOD_IPCA_CTRL)
+ SAP_INFO(IPCA_ATP_SAP, MOD_IPCA_EMBMS, MOD_ATP)
+ SAP_INFO(IPCA_ATP_SAP, MOD_IPCA_EMBMS_2, MOD_ATP_2)
+ SAP_INFO(IPCA_ATP_SAP, MOD_ATP, MOD_IPCA_EMBMS)
+ SAP_INFO(IPCA_ATP_SAP, MOD_ATP_2, MOD_IPCA_EMBMS_2)
+
+ SAP_INFO(IPCA_WM_SAP, MOD_IPCA_CTRL, MOD_IPCA_WM)
+ SAP_INFO(IPCA_WM_SAP, MOD_IPCA_CTRL_2, MOD_IPCA_WM_2)
+ SAP_INFO(IPCA_WM_SAP, MOD_IPCA_CTRL_3, MOD_IPCA_WM_3)
+ SAP_INFO(IPCA_WM_SAP, MOD_IPCA_CTRL_4, MOD_IPCA_WM_4)
+
+ SAP_INFO(IPCA_EM_SAP, MOD_IPCA_EM, MOD_IPCA_EM)
+ SAP_INFO(IPCA_EM_SAP, MOD_IPCA_EM_2, MOD_IPCA_EM_2)
+ SAP_INFO(IPCA_EM_SAP, MOD_IPCA_OEM, MOD_IPCA_EM)
+ SAP_INFO(IPCA_EM_SAP, MOD_IPCA_OEM, MOD_IPCA_EM_2)
+ SAP_INFO(IPCA_EM_SAP, MOD_IPCA_CTRL, MOD_IPCA_EM)
+ SAP_INFO(IPCA_EM_SAP, MOD_IPCA_CTRL, MOD_IPCA_EM_2)
+
+ SAP_INFO(EM_PS_SAP, MOD_L4C, ANY)
+ SAP_INFO(IPCA_SBP_SAP, MOD_IPCA_IMEI, MOD_L4BSBP)
+
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_IMS, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_IMS_2, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_IMS)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_IMS_2)
+ SAP_INFO(IPCA_UPCM_SAP, MOD_IPCA_IMS, MOD_UPCM)
+ SAP_INFO(IPCA_UPCM_SAP, MOD_IPCA_IMS, MOD_UPCM_2)
+
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_DOMESTIC, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_DOMESTIC_2, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_DOMESTIC)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_DOMESTIC_2)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_DOMESTIC, MOD_IPCA_DOMESTIC)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_DOMESTIC_2, MOD_IPCA_DOMESTIC_2)
+
+ SAP_INFO(IPCA_ATP_SAP, MOD_IPCA_DOMESTIC, MOD_ATP)
+ SAP_INFO(IPCA_ATP_SAP, MOD_IPCA_DOMESTIC_2, MOD_ATP_2)
+ SAP_INFO(IPCA_ATP_SAP, MOD_ATP, MOD_IPCA_DOMESTIC)
+ SAP_INFO(IPCA_ATP_SAP, MOD_ATP_2, MOD_IPCA_DOMESTIC_2)
+
+ SAP_INFO(IPCA_ATP_SAP, MOD_IPCA_DOMESTIC, MOD_IPCA_CTRL)
+ SAP_INFO(IPCA_ATP_SAP, MOD_IPCA_DOMESTIC_2, MOD_IPCA_CTRL_2)
+ SAP_INFO(IPCA_ATP_SAP, MOD_IPCA_CTRL, MOD_IPCA_DOMESTIC)
+ SAP_INFO(IPCA_ATP_SAP, MOD_IPCA_CTRL_2, MOD_IPCA_DOMESTIC_2)
+
+ SAP_INFO(IPCA_ATP_SAP, MOD_IPCA_JPN, MOD_ATP)
+ SAP_INFO(IPCA_ATP_SAP, MOD_IPCA_JPN_2, MOD_ATP_2)
+ SAP_INFO(IPCA_JPN_SAP, MOD_IPCA_CTRL, MOD_IPCA_JPN)
+ SAP_INFO(IPCA_JPN_SAP, MOD_IPCA_JPN, MOD_IPCA_JPN)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_JPN, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_JPN)
+ SAP_INFO(IPCA_JPN_SAP, MOD_IPCA_CTRL, MOD_IPCA_JPN_2)
+ SAP_INFO(IPCA_JPN_SAP, MOD_IPCA_JPN_2, MOD_IPCA_JPN_2)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_JPN_2, MOD_IPCA_OEM)
+ SAP_INFO(IPCA_OEM_SAP, MOD_IPCA_OEM, MOD_IPCA_JPN_2)
+
+ SAP_INFO(IPC_SMU_SAP, MOD_IPCA_JPN, MOD_SMU)
+ SAP_INFO(IPC_SMU_SAP, MOD_IPCA_JPN_2, MOD_SMU_2)
+ SAP_INFO(IPC_SMU_SAP, MOD_IPCA_SMU, MOD_SMU)
+ SAP_INFO(IPC_SMU_SAP, MOD_IPCA_SMU_2, MOD_SMU_2)
+ SAP_INFO(IPCA_SMU_SIM_SAP, MOD_IPCA_SMU, MOD_SIM)
+ SAP_INFO(IPCA_SMU_SIM_SAP, MOD_IPCA_SMU_2, MOD_SIM_2)
+
+#endif
+
+#ifdef __TC10_IPC_CDMA_SUPPORT__
+
+ SAP_INFO(L4BSIM_IPCA_SRLTE_SAP, MOD_L4BSIM, MOD_IPCA_SRLTE)
+ SAP_INFO(L4BSIM_IPCA_SRLTE_SAP, MOD_L4BSIM_2, MOD_IPCA_SRLTE_2)
+ SAP_INFO(L4BSIM_IPCA_SRLTE_SAP, MOD_L4BSIM_3, MOD_IPCA_SRLTE_3)
+ SAP_INFO(L4BSIM_IPCA_SRLTE_SAP, MOD_L4BSIM_4, MOD_IPCA_SRLTE_4)
+
+ SAP_INFO(IPCA_SRLTE_SAP, MOD_IPCA_CTRL, MOD_IPCA_SRLTE)
+ SAP_INFO(IPCA_SRLTE_SAP, MOD_IPCA_CTRL, MOD_IPCA_SRLTE_2)
+ SAP_INFO(IPCA_SRLTE_SAP, MOD_IPCA_CTRL, MOD_IPCA_SRLTE_3)
+ SAP_INFO(IPCA_SRLTE_SAP, MOD_IPCA_CTRL, MOD_IPCA_SRLTE_4)
+
+ SAP_INFO(IPCA_CTRL_SAP, MOD_IPCA_SRLTE, MOD_IPCA_CTRL)
+ SAP_INFO(IPCA_CTRL_SAP, MOD_IPCA_SRLTE_2, MOD_IPCA_CTRL)
+ SAP_INFO(IPCA_CTRL_SAP, MOD_IPCA_SRLTE_3, MOD_IPCA_CTRL)
+ SAP_INFO(IPCA_CTRL_SAP, MOD_IPCA_SRLTE_4, MOD_IPCA_CTRL)
+#endif
+
+
+ SAP_INFO(EL1HISR_EL1D_SAP, MOD_EL1D, MOD_EL1D_HISR)
+ SAP_INFO(EL1D_L4C_SAP, MOD_EL1D, MOD_L4C)
+ SAP_INFO(EL1D_DCLC_SAP, MOD_EL1D, MOD_DCLC)
+ SAP_INFO(UL1_DCLC_SAP,MOD_UL1,MOD_DCLC)
+
+ SAP_INFO(D2RM_D2RM_SAP, MOD_D2RM, MOD_D2RM)
+ SAP_INFO(D2RM_D2RM_SAP, MOD_D2RM, MOD_D2RM_2)
+ SAP_INFO(D2RM_D2RM_SAP, MOD_D2RM, MOD_D2RM_3)
+ SAP_INFO(D2RM_D2RM_SAP, MOD_D2RM, MOD_D2RM_4)
+ SAP_INFO(D2RM_D2RM_SAP_2, MOD_D2RM, MOD_D2RM)
+ SAP_INFO(D2RM_D2RM_SAP_2, MOD_D2RM, MOD_D2RM_2)
+ SAP_INFO(D2RM_D2RM_SAP_2, MOD_D2RM, MOD_D2RM_3)
+ SAP_INFO(D2RM_D2RM_SAP_2, MOD_D2RM, MOD_D2RM_4)
+ SAP_INFO(D2RM_D2RM_SAP_3, MOD_D2RM, MOD_D2RM)
+ SAP_INFO(D2RM_D2RM_SAP_3, MOD_D2RM, MOD_D2RM_2)
+ SAP_INFO(D2RM_D2RM_SAP_3, MOD_D2RM, MOD_D2RM_3)
+ SAP_INFO(D2RM_D2RM_SAP_3, MOD_D2RM, MOD_D2RM_4)
+ SAP_INFO(D2RM_D2RM_SAP_4, MOD_D2RM, MOD_D2RM)
+ SAP_INFO(D2RM_D2RM_SAP_4, MOD_D2RM, MOD_D2RM_2)
+ SAP_INFO(D2RM_D2RM_SAP_4, MOD_D2RM, MOD_D2RM_3)
+ SAP_INFO(D2RM_D2RM_SAP_4, MOD_D2RM, MOD_D2RM_4)
+
+ SAP_INFO(NRRC_NRLCDL_SAP, MOD_NRRC, MOD_NRLCDL)
+ SAP_INFO(NRRC_NRLCUL_SAP, MOD_NRRC, MOD_NRLCUL)
+ SAP_INFO(NRRC_NMAC_SAP, MOD_NRRC, MOD_NMAC)
+ SAP_INFO(NRLCUL_NMAC_SAP, MOD_NRLCUL, MOD_NMAC)
+ SAP_INFO(NMACDL_SAP, MOD_NMACDL, MOD_NMACDL)
+ SAP_INFO(NRRC_NL1_SAP, MOD_NRRC, MOD_NL1)
+ SAP_INFO(NMAC_NL1_SAP, MOD_NMAC, MOD_NL1)
+ SAP_INFO(NMAC_SAP, MOD_NMAC, MOD_NMAC)
+ SAP_INFO(NRLCDL_NMAC_SAP, MOD_NRLCDL, MOD_NMAC)
+ SAP_INFO(UPCM_NMAC_SAP, MOD_UPCM, MOD_NMAC)
+ SAP_INFO(RSVAS_NMAC_SAP, MOD_RSVAS, MOD_NMAC)
+
+ SAP_INFO(NRRC_ENPDCP_SAP, MOD_NRRC, MOD_ENPDCP)
+ SAP_INFO(RATDM_SDAP_SAP, MOD_RATDM, MOD_SDAP)
+ SAP_INFO(RATDM_ENPDCP_SAP, MOD_RATDM, MOD_ENPDCP)
+ SAP_INFO(ENPDCP_ERLCUL_SAP, MOD_ENPDCP, MOD_ERLCUL)
+ SAP_INFO(ENPDCP_ERLCDL_SAP, MOD_ENPDCP, MOD_ERLCDL)
+ SAP_INFO(ENPDCP_NRLCUL_SAP, MOD_ENPDCP, MOD_NRLCUL)
+ SAP_INFO(ENPDCP_NRLCDL_SAP, MOD_ENPDCP, MOD_NRLCDL)
+ SAP_INFO(ENPDCP_NRLCP_SAP, MOD_ENPDCP, MOD_NRLCP)
+ SAP_INFO(ENPDCP_NMAC_SAP, MOD_ENPDCP, MOD_NMAC)
+ SAP_INFO(L2NOTIFHISR_ENPDCP_SAP, MOD_ENPDCP, MOD_ENPDCP)
+
+ SAP_INFO(ENL2_FREE_SAP,ANY,MOD_ENL2_FREE)
+
+ SAP_INFO(L4C_NRRC_SAP, MOD_L4C, MOD_NRRC)
+ SAP_INFO(GMSS_NRRC_SAP, MOD_GMSS, MOD_NRRC)
+ SAP_INFO(ERRC_NRRC_SAP, MOD_ERRC, MOD_NRRC)
+ SAP_INFO(RAC_NRRC_SAP, MOD_RAC, MOD_NRRC)
+ SAP_INFO(NRRC_INT_MAIN_SCG_SAP, MOD_NRRC_MAIN, MOD_NRRC_SCG)
+ SAP_INFO(NRRC_INT_MAIN_IDLE_SAP, MOD_NRRC_MAIN, MOD_NRRC_IDLE)
+ SAP_INFO(NRRC_INT_MAIN_NCONN_SAP, MOD_NRRC_MAIN, MOD_NRRC_NCONN)
+ SAP_INFO(NRRC_INT_MAIN_BACKGROUND_SAP, MOD_NRRC_MAIN, MOD_NRRC_BACKGROUND)
+ SAP_INFO(NRRC_INT_MAIN_SI_SAP, MOD_NRRC_MAIN, MOD_NRRC_SI)
+ SAP_INFO(NRRC_INT_MAIN_CONFIG_SAP, MOD_NRRC_MAIN, MOD_NRRC_CONFIG)
+ SAP_INFO(NRRC_INT_MAIN_MEAS_SAP, MOD_NRRC_MAIN, MOD_NRRC_MEAS)
+ SAP_INFO(NRRC_INT_SCG_CONFIG_SAP, MOD_NRRC_SCG, MOD_NRRC_CONFIG)
+ SAP_INFO(NRRC_INT_SCG_MEAS_SAP, MOD_NRRC_SCG, MOD_NRRC_MEAS)
+ SAP_INFO(NRRC_INT_IDLE_CONFIG_SAP, MOD_NRRC_IDLE, MOD_NRRC_CONFIG)
+ SAP_INFO(NRRC_INT_IDLE_SEARCH_SAP, MOD_NRRC_IDLE, MOD_NRRC_SEARCH)
+ SAP_INFO(NRRC_INT_IDLE_SI_SAP, MOD_NRRC_IDLE, MOD_NRRC_SI)
+ SAP_INFO(NRRC_INT_IDLE_MEAS_SAP, MOD_NRRC_IDLE, MOD_NRRC_MEAS)
+ SAP_INFO(NRRC_INT_NCONN_CONFIG_SAP, MOD_NRRC_NCONN, MOD_NRRC_CONFIG)
+ SAP_INFO(NRRC_INT_NCONN_SEARCH_SAP, MOD_NRRC_NCONN, MOD_NRRC_SEARCH)
+ SAP_INFO(NRRC_INT_NCONN_SI_SAP, MOD_NRRC_NCONN, MOD_NRRC_SI)
+ SAP_INFO(NRRC_INT_NCONN_MEAS_SAP, MOD_NRRC_NCONN, MOD_NRRC_MEAS)
+ SAP_INFO(NRRC_INT_MEAS_CONFIG_SAP, MOD_NRRC_MEAS, MOD_NRRC_CONFIG)
+ SAP_INFO(NRRC_INT_BACKGROUND_SEARCH_SAP, MOD_NRRC_BACKGROUND, MOD_NRRC_SEARCH)
+ SAP_INFO(NRRC_INT_MAIN_SAP, MOD_NRRC_MAIN, MOD_NRRC_MAIN)
+ SAP_INFO(NRRC_INT_SCG_SAP, MOD_NRRC_SCG, MOD_NRRC_SCG)
+ SAP_INFO(NRRC_INT_IDLE_SAP, MOD_NRRC_IDLE, MOD_NRRC_IDLE)
+ SAP_INFO(NRRC_INT_NCONN_SAP, MOD_NRRC_NCONN, MOD_NRRC_NCONN)
+ SAP_INFO(NRRC_INT_BACKGROUND_SAP, MOD_NRRC_BACKGROUND, MOD_NRRC_BACKGROUND)
+ SAP_INFO(NRRC_INT_CONFIG_SAP, MOD_NRRC_CONFIG, MOD_NRRC_CONFIG)
+ SAP_INFO(NRRC_INT_MEAS_SAP, MOD_NRRC_MEAS, MOD_NRRC_MEAS)
+ SAP_INFO(NRRC_INT_SEARCH_SAP, MOD_NRRC_SEARCH, MOD_NRRC_SEARCH)
+ SAP_INFO(NRRC_INT_SI_SAP, MOD_NRRC_SI, MOD_NRRC_SI)
+
+ SAP_INFO(VGSM_SAP, MOD_VGSM, MOD_VGSM)
+ SAP_INFO(PAM_VGSM_SAP, MOD_PAM, MOD_VGSM)
+ SAP_INFO(VGSM_VGMM_SAP, MOD_VGSM, MOD_VGMM)
+ SAP_INFO(VGSM_RATDM_SAP, MOD_VGSM, MOD_RATDM)
+ SAP_INFO(ESM_VGSM_SAP, MOD_ESM, MOD_VGSM)
+ SAP_INFO(ESM_VGSM_SAP, MOD_ESM_2, MOD_VGSM_2)
+ SAP_INFO(ESM_VGSM_SAP, MOD_VGSM, MOD_ESM)
+ SAP_INFO(ESM_VGSM_SAP, MOD_VGSM_2, MOD_ESM_2)
+ SAP_INFO(ENPDCP_NMAC_SAP, MOD_ENPDCP, MOD_NMAC)
+ SAP_INFO(ATP_L4C_SAP, MOD_ATP, MOD_L4C)
+ SAP_INFO(ATP_L4C_SAP, MOD_ATP_2, MOD_L4C_2)
+ SAP_INFO(ATP_L4C_SAP, MOD_ATP_3, MOD_L4C_3)
+ SAP_INFO(ATP_L4C_SAP, MOD_ATP_4, MOD_L4C_4)
+
+ SAP_INFO(ATP_SMSAL_SAP, MOD_ATP, MOD_SMSAL)
+ SAP_INFO(ATP_SMSAL_SAP, MOD_ATP_2, MOD_SMSAL_2)
+ SAP_INFO(ATP_SMSAL_SAP, MOD_ATP_3, MOD_SMSAL_3)
+ SAP_INFO(ATP_SMSAL_SAP, MOD_ATP_4, MOD_SMSAL_4)
+ SAP_INFO(ATP_SMSAL_SAP, MOD_SMSAL, MOD_ATP)
+ SAP_INFO(ATP_SMSAL_SAP, MOD_SMSAL_2, MOD_ATP_2)
+ SAP_INFO(ATP_SMSAL_SAP, MOD_SMSAL_3, MOD_ATP_3)
+ SAP_INFO(ATP_SMSAL_SAP, MOD_SMSAL_4, MOD_ATP_4)
+
+ SAP_INFO(ATP_SMS_SAP, MOD_ATP, MOD_SMS)
+ SAP_INFO(ATP_SMS_SAP, MOD_ATP_2, MOD_SMS_2)
+ SAP_INFO(ATP_SMS_SAP, MOD_ATP_3, MOD_SMS_3)
+ SAP_INFO(ATP_SMS_SAP, MOD_ATP_4, MOD_SMS_4)
+ SAP_INFO(ATP_SMS_SAP, MOD_SMS, MOD_ATP)
+ SAP_INFO(ATP_SMS_SAP, MOD_SMS_2, MOD_ATP_2)
+ SAP_INFO(ATP_SMS_SAP, MOD_SMS_3, MOD_ATP_3)
+ SAP_INFO(ATP_SMS_SAP, MOD_SMS_4, MOD_ATP_4)
+
+ SAP_INFO(SDM_SMS_SAP, MOD_SDM, MOD_SMS)
+ SAP_INFO(SDM_SMS_SAP, MOD_SDM_2, MOD_SMS_2)
+ SAP_INFO(SDM_SMS_SAP, MOD_SDM_3, MOD_SMS_3)
+ SAP_INFO(SDM_SMS_SAP, MOD_SDM_4, MOD_SMS_4)
+ SAP_INFO(SDM_SMS_SAP, MOD_SMS, MOD_ATP)
+ SAP_INFO(SDM_SMS_SAP, MOD_SMS_2, MOD_SDM_2)
+ SAP_INFO(SDM_SMS_SAP, MOD_SMS_3, MOD_SDM_3)
+ SAP_INFO(SDM_SMS_SAP, MOD_SMS_4, MOD_SDM_4)
+
+ SAP_INFO(VGMM_RATDM_SAP, MOD_VGMM, MOD_RATDM)
+
+ SAP_INFO(SMIC_SAP, MOD_SMIC, MOD_SMIC)
+ SAP_INFO(SMIC_SAP, MOD_SMIC_2, MOD_SMIC_2)
+ SAP_INFO(SMIC_SAP, MOD_SMIC_3, MOD_SMIC_3)
+ SAP_INFO(SMIC_SAP, MOD_SMIC_4, MOD_SMIC_4)
+
+ SAP_INFO(SMIC_SAP, MOD_SMIC, MOD_SM)
+ SAP_INFO(SMIC_SAP, MOD_SMIC_2, MOD_SM_2)
+ SAP_INFO(SMIC_SAP, MOD_SMIC_3, MOD_SM_3)
+ SAP_INFO(SMIC_SAP, MOD_SMIC_4, MOD_SM_4)
+
+ SAP_INFO(SMIC_SAP, MOD_SMIC, MOD_ESM)
+ SAP_INFO(SMIC_SAP, MOD_SMIC_2, MOD_ESM_2)
+ SAP_INFO(SMIC_SAP, MOD_SMIC_3, MOD_ESM_3)
+ SAP_INFO(SMIC_SAP, MOD_SMIC_4, MOD_ESM_4)
+
+ SAP_INFO(SMIC_SAP, MOD_SMIC, MOD_VGSM)
+ SAP_INFO(SMIC_SAP, MOD_SMIC_2, MOD_VGSM_2)
+ SAP_INFO(SMIC_SAP, MOD_SMIC_3, MOD_VGSM_3)
+ SAP_INFO(SMIC_SAP, MOD_SMIC_4, MOD_VGSM_4)
+
+ SAP_INFO(SMIC_SAP, MOD_SMIC, MOD_RAT_TCM)
+ SAP_INFO(SMIC_SAP, MOD_SMIC_2, MOD_RAT_TCM_2)
+ SAP_INFO(SMIC_SAP, MOD_SMIC_3, MOD_RAT_TCM_3)
+ SAP_INFO(SMIC_SAP, MOD_SMIC_4, MOD_RAT_TCM_4)
+
+ SAP_INFO(SMIC_SAP, MOD_SMIC, MOD_RATDM)
+ SAP_INFO(SMIC_SAP, MOD_SMIC_2, MOD_RATDM_2)
+ SAP_INFO(SMIC_SAP, MOD_SMIC_3, MOD_RATDM_3)
+ SAP_INFO(SMIC_SAP, MOD_SMIC_4, MOD_RATDM_4)
+
+ SAP_INFO(SMIC_SAP, MOD_TCM, MOD_SMIC)
+ SAP_INFO(SMIC_SAP, MOD_TCM_2, MOD_SMIC_2)
+ SAP_INFO(SMIC_SAP, MOD_TCM_3, MOD_SMIC_3)
+ SAP_INFO(SMIC_SAP, MOD_TCM_4, MOD_SMIC_4)
+
+ SAP_INFO(NAS_SV_SAP, MOD_NAS_SV, MOD_SMIC)
+ SAP_INFO(NAS_SV_SAP, MOD_NAS_SV_2, MOD_SMIC_2)
+ SAP_INFO(NAS_SV_SAP, MOD_NAS_SV_3, MOD_SMIC_3)
+ SAP_INFO(NAS_SV_SAP, MOD_NAS_SV_4, MOD_SMIC_4)
+
+ SAP_INFO(NAS_SV_SAP, MOD_RAC, MOD_NAS_SV)
+ SAP_INFO(NAS_SV_SAP, MOD_NAS_SV, MOD_RAC)
+ SAP_INFO(NAS_SV_SAP, MOD_MM, MOD_NAS_SV)
+ SAP_INFO(NAS_SV_SAP, MOD_NAS_SV, MOD_MM)
+ SAP_INFO(NAS_SV_SAP, MOD_EMM, MOD_NAS_SV)
+ SAP_INFO(NAS_SV_SAP, MOD_NAS_SV, MOD_EMM)
+ SAP_INFO(NAS_SV_SAP, MOD_NWSEL, MOD_NAS_SV)
+ SAP_INFO(NAS_SV_SAP, MOD_NAS_SV, MOD_NWSEL)
+ SAP_INFO(NAS_SV_SAP, MOD_EVAL, MOD_NAS_SV)
+ SAP_INFO(NAS_SV_SAP, MOD_NAS_SV, MOD_EVAL)
+ SAP_INFO(NAS_SV_SAP, MOD_PAM, MOD_NAS_SV)
+ SAP_INFO(NAS_SV_SAP, MOD_NAS_SV, MOD_PAM)
+ SAP_INFO(NAS_SV_SAP, MOD_RATCM, MOD_NAS_SV)
+ SAP_INFO(NAS_SV_SAP, MOD_NAS_SV, MOD_RATCM)
+ SAP_INFO(NAS_SV_SAP, MOD_GMSS, MOD_NAS_SV)
+ SAP_INFO(NAS_SV_SAP, MOD_NAS_SV, MOD_GMSS)
+ SAP_INFO(PS_SIM_SAP, MOD_SIM, MOD_NAS_SV)
+ SAP_INFO(PS_SIM_SAP, MOD_NAS_SV, MOD_SIM)
+ SAP_INFO(NAS_SV_SAP, MOD_SIM, MOD_NAS_SV)
+ SAP_INFO(NAS_SV_ERRC_SAP, MOD_NAS_SV, MOD_ERRC)
+ SAP_INFO(NAS_SV_ERRC_SAP, MOD_ERRC, MOD_NAS_SV)
+ SAP_INFO(NAS_SV_NRRC_SAP, MOD_NAS_SV, MOD_NRRC)
+ SAP_INFO(NAS_SV_NRRC_SAP, MOD_NRRC, MOD_NAS_SV)
+ SAP_INFO(NAS_SV_C2K_SAP, MOD_NAS_SV, MOD_CSS)
+ SAP_INFO(NAS_SV_C2K_SAP, MOD_CSS, MOD_NAS_SV)
+ SAP_INFO(L4C_NAS_SV_SAP, MOD_NAS_SV, MOD_SIM)
+ SAP_INFO(L4C_NAS_SV_SAP, MOD_L4C, MOD_NAS_SV)
+ SAP_INFO(NAS_SV_SAP, MOD_RATDM, MOD_NAS_SV)
+ SAP_INFO(NAS_SV_SAP, MOD_NAS_SV, MOD_RATDM)
+ SAP_INFO(RAC_NAS_SV_SAP, MOD_RAC, MOD_NAS_SV)
+ SAP_INFO(RAC_NAS_SV_SAP, MOD_NAS_SV, MOD_RAC)
+ SAP_INFO(SMS_VGMM_SAP, MOD_SMS, MOD_VGMM)
+ SAP_INFO(L4C_VGMM_SAP, MOD_L4C, MOD_VGMM)
+ SAP_INFO(VGMM_NRRC_SAP, MOD_VGMM, MOD_NRRC)
+ SAP_INFO(RAC_VGMM_SAP, MOD_RAC, MOD_VGMM)
+ SAP_INFO(SMS_EMM_SAP, MOD_SMS, MOD_EMM)
+
+ SAP_INFO(MCF_L4C_SAP, MOD_MCF, MOD_L4C)
+ SAP_INFO(MCF_L4C_SAP, MOD_MCF, MOD_L4C_2)
+ SAP_INFO(MCF_L4C_SAP, MOD_MCF, MOD_L4C_3)
+ SAP_INFO(MCF_L4C_SAP, MOD_MCF, MOD_L4C_4)
+ SAP_INFO(MCF_L4C_SAP, MOD_L4C, MOD_MCF)
+ SAP_INFO(MCF_L4C_SAP, MOD_L4C_2, MOD_MCF)
+ SAP_INFO(MCF_L4C_SAP, MOD_L4C_3, MOD_MCF)
+ SAP_INFO(MCF_L4C_SAP, MOD_L4C_4, MOD_MCF)
+ SAP_INFO(MT_L4C_SAP, MOD_MT, MOD_L4C)
+ SAP_INFO(MT_L4C_SAP, MOD_MT, MOD_L4C_2)
+ SAP_INFO(MT_L4C_SAP, MOD_MT, MOD_L4C_3)
+ SAP_INFO(MT_L4C_SAP, MOD_MT, MOD_L4C_4)
+ SAP_INFO(MT_L4C_SAP, MOD_L4C, MOD_MT)
+ SAP_INFO(MT_L4C_SAP, MOD_L4C_2, MOD_MT)
+ SAP_INFO(MT_L4C_SAP, MOD_L4C_3, MOD_MT)
+ SAP_INFO(MT_L4C_SAP, MOD_L4C_4, MOD_MT)
+
+ SAP_INFO(ATP_MT_SAP, MOD_ATP, MOD_MT)
+ SAP_INFO(ATP_MT_SAP, MOD_ATP_2, MOD_MT)
+ SAP_INFO(ATP_MT_SAP, MOD_ATP_3, MOD_MT)
+ SAP_INFO(ATP_MT_SAP, MOD_ATP_4, MOD_MT)
+
+ SAP_INFO(LBS_SAP, MOD_LBS, MOD_GMSS)
+ SAP_INFO(LBS_SAP, MOD_LBS, MOD_GMSS_2)
+ SAP_INFO(LBS_SAP, MOD_LBS, MOD_GMSS_3)
+ SAP_INFO(LBS_SAP, MOD_LBS, MOD_GMSS_4)
+ SAP_INFO(LBS_SAP, MOD_GMSS, MOD_LBS)
+ SAP_INFO(LBS_SAP, MOD_GMSS_2, MOD_LBS)
+ SAP_INFO(LBS_SAP, MOD_GMSS_3, MOD_LBS)
+ SAP_INFO(LBS_SAP, MOD_GMSS_4, MOD_LBS)
+ SAP_INFO(LBS_SAP,MOD_DHL_READER,MOD_LBS)
+ SAP_INFO(LBS_SAP,MOD_LBS,MOD_DHL_READER)
+ SAP_INFO(LBS_SAP,MOD_LBS,MOD_IMC)
+ SAP_INFO(LBS_SAP,MOD_LBS,MOD_IMC_2)
+ SAP_INFO(LBS_SAP,MOD_LBS,MOD_IMC_3)
+ SAP_INFO(LBS_SAP,MOD_LBS,MOD_IMC_4)
+ SAP_INFO(LBS_SAP,MOD_IMC,MOD_LBS)
+ SAP_INFO(LBS_SAP,MOD_IMC_2,MOD_LBS)
+ SAP_INFO(LBS_SAP,MOD_IMC_3,MOD_LBS)
+ SAP_INFO(LBS_SAP,MOD_IMC_4,MOD_LBS)
+
+ SAP_INFO(GNSS_TC_EL1_SAP, MOD_GNSS_TC, MOD_EL1)
+ SAP_INFO(GNSS_TC_EL1_SAP, MOD_GNSS_TC, MOD_EL1_2)
+ SAP_INFO(GNSS_TC_EL1_SAP, MOD_GNSS_TC, MOD_EL1_3)
+ SAP_INFO(GNSS_TC_EL1_SAP, MOD_GNSS_TC, MOD_EL1_4)
+ SAP_INFO(GNSS_TC_NL1_SAP, MOD_GNSS_TC, MOD_NL1)
+ SAP_INFO(GNSS_TC_NL1_SAP, MOD_GNSS_TC, MOD_NL1_2)
+ SAP_INFO(GNSS_TC_NL1_SAP, MOD_GNSS_TC, MOD_NL1_3)
+ SAP_INFO(GNSS_TC_NL1_SAP, MOD_GNSS_TC, MOD_NL1_4)
+ SAP_INFO(GNSS_TC_UL1_SAP, MOD_GNSS_TC, MOD_UL1)
+ SAP_INFO(GNSS_TC_UL1_SAP, MOD_GNSS_TC, MOD_UL1_2)
+ SAP_INFO(GNSS_TC_UL1_SAP, MOD_GNSS_TC, MOD_UL1_3)
+ SAP_INFO(GNSS_TC_UL1_SAP, MOD_GNSS_TC, MOD_UL1_4)
+
+ SAP_INFO(L4BPWR_L4C_SAP, MOD_L4BPWR, MOD_L4C)
+ SAP_INFO(L4BPWR_L4C_SAP, MOD_L4BPWR, MOD_L4C_2)
+ SAP_INFO(L4BPWR_L4C_SAP, MOD_L4BPWR, MOD_L4C_3)
+ SAP_INFO(L4BPWR_L4C_SAP, MOD_L4BPWR, MOD_L4C_4)
+ SAP_INFO(L4BPWR_L4C_SAP, MOD_L4C, MOD_L4BPWR)
+ SAP_INFO(L4BPWR_L4C_SAP, MOD_L4C_2, MOD_L4BPWR)
+ SAP_INFO(L4BPWR_L4C_SAP, MOD_L4C_3, MOD_L4BPWR)
+ SAP_INFO(L4BPWR_L4C_SAP, MOD_L4C_4, MOD_L4BPWR)
+
+ SAP_INFO(L4BPWR_CVAL_SAP, MOD_L4BPWR, MOD_CVAL)
+ SAP_INFO(L4BPWR_CVAL_SAP, MOD_CVAL, MOD_L4BPWR)
+
+ SAP_INFO(ATP_L4BPWR_SAP, MOD_ATP, MOD_L4BPWR)
+ SAP_INFO(ATP_L4BPWR_SAP, MOD_ATP_2, MOD_L4BPWR)
+ SAP_INFO(ATP_L4BPWR_SAP, MOD_ATP_3, MOD_L4BPWR)
+ SAP_INFO(ATP_L4BPWR_SAP, MOD_ATP_4, MOD_L4BPWR)
+ SAP_INFO(ATP_L4BPWR_SAP, MOD_L4BPWR, MOD_ATP)
+ SAP_INFO(ATP_L4BPWR_SAP, MOD_L4BPWR, MOD_ATP_2)
+ SAP_INFO(ATP_L4BPWR_SAP, MOD_L4BPWR, MOD_ATP_3)
+ SAP_INFO(ATP_L4BPWR_SAP, MOD_L4BPWR, MOD_ATP_4)
+
+ SAP_INFO(L4BPWR_L4BNW_SAP, MOD_L4BPWR, MOD_L4BNW)
+ SAP_INFO(L4BPWR_L4BNW_SAP, MOD_L4BPWR, MOD_L4BNW_2)
+ SAP_INFO(L4BPWR_L4BNW_SAP, MOD_L4BPWR, MOD_L4BNW_3)
+ SAP_INFO(L4BPWR_L4BNW_SAP, MOD_L4BPWR, MOD_L4BNW_4)
+ SAP_INFO(L4BPWR_L4BNW_SAP, MOD_L4BNW, MOD_L4BPWR)
+ SAP_INFO(L4BPWR_L4BNW_SAP, MOD_L4BNW_2, MOD_L4BPWR)
+ SAP_INFO(L4BPWR_L4BNW_SAP, MOD_L4BNW_3, MOD_L4BPWR)
+ SAP_INFO(L4BPWR_L4BNW_SAP, MOD_L4BNW_4, MOD_L4BPWR)
+
+ SAP_INFO(DDM_L4C_SAP, MOD_DDM, MOD_L4C)
+ SAP_INFO(DDM_L4C_SAP, MOD_DDM_2, MOD_L4C_2)
+ SAP_INFO(DDM_L4C_SAP, MOD_DDM_3, MOD_L4C_3)
+ SAP_INFO(DDM_L4C_SAP, MOD_DDM_4, MOD_L4C_4)
+ SAP_INFO(DDM_L4C_SAP, MOD_L4C, MOD_DDM)
+ SAP_INFO(DDM_L4C_SAP, MOD_L4C_2, MOD_DDM_2)
+ SAP_INFO(DDM_L4C_SAP, MOD_L4C_3, MOD_DDM_3)
+ SAP_INFO(DDM_L4C_SAP, MOD_L4C_4, MOD_DDM_4)
+
+ SAP_INFO(GAS_NRAS_SAP, MOD_RRM_TDD, MOD_NRRC)
+
+ SAP_INFO(L4C_ENPDCP_SAP, MOD_ENPDCP, MOD_L4C)
+ SAP_INFO(L4C_ENPDCP_SAP, MOD_ENPDCP_2, MOD_L4C_2)
+ SAP_INFO(L4C_ENPDCP_SAP, MOD_ENPDCP_3, MOD_L4C_3)
+ SAP_INFO(L4C_ENPDCP_SAP, MOD_ENPDCP_4, MOD_L4C_4)
+
+ /* HTTP TLS SAP INFO */
+ SAP_INFO(APP_HTTP_SAP, ANY, MOD_HTTP_TLS)
+ SAP_INFO(APP_HTTP_SAP, MOD_HTTP_TLS, ANY)
+ SAP_INFO(APP_HTTP_SAP, ANY, MOD_HTTP)
+ SAP_INFO(APP_HTTP_SAP, MOD_HTTP, ANY)
+ SAP_INFO(HTTP_TLS_SAP, MOD_TLS, MOD_HTTP)
+ SAP_INFO(HTTP_TLS_SAP, MOD_HTTP, MOD_TLS)
+
+ SAP_INFO(N3SAM_CERT_SAP, MOD_N3SAM, MOD_CERT)
+ SAP_INFO(N3SAM_CERT_SAP, MOD_CERT, MOD_N3SAM)
+ SAP_INFO(TLS_CERT_SAP, MOD_TLS, MOD_CERT)
+ SAP_INFO(TLS_CERT_SAP, MOD_CERT, MOD_TLS)
+
+
+ SAP_INFO(WIFI_PROXY_SAP, ANY, MOD_WIFI_PROXY)
+ SAP_INFO(WIFI_PROXY_SAP, MOD_WIFI_PROXY, ANY)
+
+ SAP_INFO(SIMMNGR_PS_SAP, MOD_SIMMNGR, MOD_SIMMNGR)
+ SAP_INFO(SIMMNGR_PS_SAP, MOD_SIMMNGR_2, MOD_SIMMNGR_2)
+ SAP_INFO(SIMMNGR_PS_SAP, MOD_SIMMNGR_3, MOD_SIMMNGR_3)
+ SAP_INFO(SIMMNGR_PS_SAP, MOD_SIMMNGR_4, MOD_SIMMNGR_4)
+
+ SAP_INFO(KPALV_SAP, ANY, MOD_KPALV)
+ SAP_INFO(KPALV_SAP, MOD_KPALV, ANY)
+
+ SAP_INFO(ERRC_MT_SAP, MOD_ERRC, MOD_MT)
+ SAP_INFO(ERRC_MT_SAP, MOD_ERRC_2, MOD_MT)
+
+ SAP_INFO(CC_GAS_SAP, MOD_CC, MOD_RRM_FDD)
+ SAP_INFO(CC_GAS_SAP, MOD_CC_2, MOD_RRM_FDD_2)
+ SAP_INFO(CC_GAS_SAP, MOD_CC, MOD_RRM_TDD)
+ SAP_INFO(CC_GAS_SAP, MOD_CC_2, MOD_RRM_TDD_2)
+
+
+ SAP_INFO(UPDS_VGMM_SAP, MOD_UPDS, MOD_VGMM)
+ SAP_INFO(URSP_UPDS_SAP, MOD_URSP, MOD_UPDS)
+ SAP_INFO(VGMM_UPCM_SAP, MOD_VGMM, MOD_UPCM)
+
+ SAP_INFO(TMC_L4BPWR_SAP, MOD_TMC, MOD_L4BPWR)
+ SAP_INFO(TMC_L4BPWR_SAP, MOD_L4BPWR, MOD_TMC)
+
+ SAP_INFO(SASE_L4C_SAP, MOD_SASE_CLIENT, MOD_L4C)
+ SAP_INFO(SASE_L4C_SAP, MOD_SASE_CLIENT_2, MOD_L4C_2)
+ SAP_INFO(SASE_L4C_SAP, MOD_SASE_CLIENT_3, MOD_L4C_3)
+ SAP_INFO(SASE_L4C_SAP, MOD_SASE_CLIENT_4, MOD_L4C_4)
+ SAP_INFO(SASE_L4C_SAP, MOD_L4C, MOD_SASE_CLIENT)
+ SAP_INFO(SASE_L4C_SAP, MOD_L4C_2, MOD_SASE_CLIENT_2)
+ SAP_INFO(SASE_L4C_SAP, MOD_L4C_3, MOD_SASE_CLIENT_3)
+ SAP_INFO(SASE_L4C_SAP, MOD_L4C_4, MOD_SASE_CLIENT_4)
+
+ SAP_INFO(NL1_MT_SAP, MOD_NL1, MOD_MT)
+ SAP_INFO(NL1_MT_SAP, MOD_NL1_2, MOD_MT)
+ SAP_INFO(NL1_MT_SAP, MOD_NL1_3, MOD_MT)
+ SAP_INFO(NL1_MT_SAP, MOD_NL1_4, MOD_MT)
+
+END_SAP_INFO
diff --git a/mcu/service/dhl/database/sim_union_tag.txt b/mcu/service/dhl/database/sim_union_tag.txt
new file mode 100755
index 0000000..63eb0ca
--- /dev/null
+++ b/mcu/service/dhl/database/sim_union_tag.txt
@@ -0,0 +1,16 @@
+
+ sim_intsim_access_req_struct op req_field :
+ {
+ SIM_INTSIM_ACCESS_FLIE_INFO file_info_req;
+ SIM_INTSIM_ACCESS_READ_BINARY read_req;
+ SIM_INTSIM_ACCESS_READ_RECORD read_req;
+ SIM_INTSIM_ACCESS_UPDATE_BINARY update_req;
+ SIM_INTSIM_ACCESS_UPDATE_RECORD update_req;
+ SIM_INTSIM_ACCESS_AUTHENTICATION auth_req;
+ SIM_INTSIM_ACCESS_INCREASE increase_req;
+ SIM_INTSIM_ACCESS_INVALIDATE invalidate_req;
+ SIM_INTSIM_ACCESS_REHABILITATE rehabilitate_req;
+
+} ;
+
+
\ No newline at end of file
diff --git a/mcu/service/dhl/database/unionTag/4g/unionTag_db_4g.c b/mcu/service/dhl/database/unionTag/4g/unionTag_db_4g.c
new file mode 100644
index 0000000..48f21e0
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/4g/unionTag_db_4g.c
@@ -0,0 +1,67 @@
+/********************************************************************************************
+ * LEGAL DISCLAIMER
+ *
+ * (Header of MediaTek Software/Firmware Release or Documentation)
+ *
+ * BY OPENING OR USING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE") RECEIVED
+ * FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON AN "AS-IS" BASIS
+ * ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES, EXPRESS OR IMPLIED,
+ * INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR
+ * A PARTICULAR PURPOSE OR NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY
+ * WHATSOEVER WITH RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK
+ * ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+ * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S SPECIFICATION
+ * OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+ *
+ * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE LIABILITY WITH
+ * RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION,
+ *
+ * TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE
+ * FEES OR SERVICE CHARGE PAID BY BUYER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE WITH THE LAWS
+ * OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF LAWS PRINCIPLES.
+ ************************************************************************************************/
+
+
+/*******************************************************************************
+ *
+ * Filename:
+ * ---------
+ * unionTag_db.c
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * This file used for pre-processing to build unionTag DB
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * How to add a new unionTag script
+ * 1. Put the unionTag script into the proper folder e.g: \tst\database\unionTag
+ * \tst\database_classb\unionTag
+ * \tst\database_classb_umts\unionTag
+ * \tst\database_modis\unionTag
+ * 2. #include <xxx.txt>.
+ * Notably, you should use #include <xxx.txt> rather than "xxx.txt"
+ * If you have two different scripts with the same name in database\unionTag
+ * and database_modis\unionTag, please make sure you use #include <xxx.txt>.
+ * If you use #include "xxx.txt", Codegen will process \tst\database\unionTag\xxx.txt
+ * instead of \tst\database_modis\unionTag\xxx.txt. So you are suggested to use
+ * #include <xxx.txt> all the way.
+ *******************************************************************************/
+#ifdef _MODIS_ON_VC9_
+#define __w64
+#endif
+
+#ifdef STDC_HEADERS
+#undef STDC_HEADERS //it will include stdio.h
+#endif
diff --git a/mcu/service/dhl/database/unionTag/FT_EL1TST_Gen93_UnionTag.txt b/mcu/service/dhl/database/unionTag/FT_EL1TST_Gen93_UnionTag.txt
new file mode 100755
index 0000000..19edd22
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/FT_EL1TST_Gen93_UnionTag.txt
@@ -0,0 +1,106 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+ * This file is used by cgen for union Tag information.
+ */
+dhl_to_el1tst_struct type param:
+{
+ 6 resetCounterParam;
+ 7 stopTestModeParam;
+ 10 getRfCapabilityParam;
+ 11 afcSingleToneTxParam;
+ 12 setAfcSettingParam;
+ 13 getAfcSettingParam;
+ 16 getPdValueParam;
+ 21 CheckIfFuncExist;
+ 36 nvramInfoReq;
+ 37 getCoClockDataParam;
+ 38 gpsCoClockData;
+ 63 tpcSingleToneTxV2Param;
+ 66 getTxRxRouteReqInfo;
+ 67 puschTxParam;
+ 68 pucchTxParam;
+ 69 prachTxParam;
+ 70 srsTxParam;
+ 71 mixRxParamCaMode;
+ 72 getMixRxCaRptParam;
+ 73 startNsftListParam;
+ 75 queryCaCfgTableV3Param;
+ 76 getRxTxDataV3ReqInfo;
+ 77 setRxTxDataV3ReqInfo;
+ 78 rssiRxV3Param;
+ 79 getRxGainV3ReqInfo;
+ 80 contRxV3Param;
+ 81 fhcV3Param;
+ 93 auxadcResult;
+ 94 ubinmodesetupParam;
+ 110 gettxpoweroffsetReq;
+ 111 settxpoweroffsetReq;
+};
+
+el1tst_to_dhl_struct type param:
+{
+ 6 resetCounterParam;
+ 7 stopTestModeParam;
+ 10 getRfCapabilityParam;
+ 11 startAfcToneTxParam;
+ 12 setAfcSettingParam;
+ 13 getAfcSettingParam;
+ 16 txPowerDetector;
+ 21 CheckIfFuncExist;
+ 36 nvramInfoCnf;
+ 37 gpsCoClockData;
+ 38 setCoClockData;
+ 63 startTpcToneTxV2Param;
+ 66 getTxRxRouteCnfInfo;
+ 67 startPuschTxParam;
+ 68 startPucchTxParam;
+ 69 startPrachTxParam;
+ 70 startSrsTxParam;
+ 71 startMixRxCaModeParam;
+ 72 mixRxRptCaMode;
+ 73 startNsftListParam;
+ 75 queryCaCfgTableV3Param;
+ 76 getRxTxDataV3CnfInfo;
+ 77 setRxTxDataV3CnfInfo;
+ 78 startRssiV3Param;
+ 79 getRxGainV3CnfInfo;
+ 80 startContRxV3Param;
+ 81 fhcV3Param;
+ 93 auxadcResult;
+ 94 ubinmodesetupParam;
+ 110 gettxpoweroffsetCnf;
+ 111 settxpoweroffsetCnf;
+};
diff --git a/mcu/service/dhl/database/unionTag/FT_EL1TST_Gen95_UnionTag.txt b/mcu/service/dhl/database/unionTag/FT_EL1TST_Gen95_UnionTag.txt
new file mode 100755
index 0000000..8ee9bf4
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/FT_EL1TST_Gen95_UnionTag.txt
@@ -0,0 +1,106 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+ * This file is used by cgen for union Tag information.
+ */
+dhl_to_el1tst_struct type param:
+{
+ 6 resetCounterParam;
+ 7 stopTestModeReqParam;
+ 10 getRfCapabilityReqParam;
+ 11 afcSingleToneTxReqParam;
+ 12 setAfcSettingReqParam;
+ 13 getAfcSettingReqParam;
+ 16 getPdValueReqParam;
+ 21 CheckIfFuncExist;
+ 37 getgetCoClockDataReqParam;
+ 38 setgpsCoClockDataReqParam;
+ 63 tpcSingleToneTxV2ReqParam;
+ 68 pucchTxParam;
+ 69 prachTxParam;
+ 76 getRxTxDataV3InfoReqParam;
+ 77 setRxTxDataV3InfoReqParam;
+ 78 rssiRxV3ReqParam;
+ 81 fhcV3ReqParam;
+ 88 startNsftListParamV3;
+ 93 auxadcResult;
+ 95 queryCaCfgTableV5ReqParam;
+ 96 getRxGainV5InfoReqParam;
+ 97 getTxRxRouteInfoV5ReqParam;
+ 98 startContRxV5ReqParam;
+ 99 mixRxParamCaModeV5;
+ 100 getMixRxCaRptParamV5;
+ 101 puschTxParamV5;
+ 102 srsTxParamV5;
+ 106 fhcAfcTxCalReqParam;
+ 110 gettxpoweroffsetReq;
+ 111 settxpoweroffsetReq;
+ 126 setTxCfgReq;
+};
+
+el1tst_to_dhl_struct type param:
+{
+ 6 resetCounterParam;
+ 7 stopTestModeCnfParam;
+ 10 getRfCapabilityCnfParam;
+ 11 startAfcToneCnfTxCnfParam;
+ 12 setAfcSettingCnfParam;
+ 13 getAfcSettingCnfParam;
+ 16 txPowerDetectorCnfParam;
+ 21 CheckIfFuncExist;
+ 37 getgpsCoClockDataCnfParam;
+ 38 setgpsCoClockDataCnfParam;
+ 63 startTpcToneTxV2CnfParam;
+ 68 startPucchTxParam;
+ 69 startPrachTxParam;
+ 76 getRxTxDataV3CnfInfo;
+ 77 setRxTxDataV3CnfInfo;
+ 78 startRssiV3CnfParam;
+ 81 fhcV3CnfParam;
+ 88 startNsftListParamV3;
+ 93 auxadcResult;
+ 95 queryCaCfgTableV5CnfParam;
+ 96 getRxGainV5CnfParam;
+ 97 getTxRxRouteInfoV5CnfParam;
+ 98 startContRxV5CnfParam;
+ 99 startMixRxCaModeParamV5;
+ 100 mixRxRptCaModeV5;
+ 101 startPuschTxParamV5;
+ 102 startSrsTxParamV5;
+ 106 fhcAfcTxCalCnfParam;
+ 110 gettxpoweroffsetCnf;
+ 111 settxpoweroffsetCnf;
+ 126 setTxCfgCnf;
+};
diff --git a/mcu/service/dhl/database/unionTag/FT_EL1TST_Gen97_UnionTag.txt b/mcu/service/dhl/database/unionTag/FT_EL1TST_Gen97_UnionTag.txt
new file mode 100644
index 0000000..1da7f71
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/FT_EL1TST_Gen97_UnionTag.txt
@@ -0,0 +1,112 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+ * This file is used by cgen for union Tag information.
+ */
+dhl_to_el1tst_struct type param:
+{
+ 6 resetCounterParam;
+ 7 stopTestModeReqParam;
+ 10 getRfCapabilityReqParam;
+ 11 afcSingleToneTxReqParam;
+ 12 setAfcSettingReqParam;
+ 13 getAfcSettingReqParam;
+ 16 getPdValueReqParam;
+ 21 CheckIfFuncExist;
+ 37 getgetCoClockDataReqParam;
+ 38 setgpsCoClockDataReqParam;
+ 63 tpcSingleToneTxV2ReqParam;
+ 68 pucchTxParam;
+ 69 prachTxParam;
+ 76 getRxTxDataV3InfoReqParam;
+ 77 setRxTxDataV3InfoReqParam;
+ 78 rssiRxV3ReqParam;
+ 81 fhcV3ReqParam;
+ 88 startNsftListParamV3;
+ 93 auxadcResult;
+ 95 queryCaCfgTableV5ReqParam;
+ 96 getRxGainV5InfoReqParam;
+ 97 getTxRxRouteInfoV5ReqParam;
+ 98 startContRxV5ReqParam;
+ 99 mixRxParamCaModeV5;
+ 100 getMixRxCaRptParamV5;
+ 101 puschTxParamV5;
+ 102 srsTxParamV5;
+ 106 fhcAfcTxCalReqParam;
+ 110 gettxpoweroffsetReq;
+ 111 settxpoweroffsetReq;
+ 126 setTxCfgReq;
+ 130 getHpueRouteInfoReq;
+ 134 startRssiRxReqV7;
+ 136 setRxCfgReq;
+};
+
+el1tst_to_dhl_struct type param:
+{
+ 6 resetCounterParam;
+ 7 stopTestModeCnfParam;
+ 10 getRfCapabilityCnfParam;
+ 11 startAfcToneCnfTxCnfParam;
+ 12 setAfcSettingCnfParam;
+ 13 getAfcSettingCnfParam;
+ 16 txPowerDetectorCnfParam;
+ 21 CheckIfFuncExist;
+ 37 getgpsCoClockDataCnfParam;
+ 38 setgpsCoClockDataCnfParam;
+ 63 startTpcToneTxV2CnfParam;
+ 68 startPucchTxParam;
+ 69 startPrachTxParam;
+ 76 getRxTxDataV3CnfInfo;
+ 77 setRxTxDataV3CnfInfo;
+ 78 startRssiV3CnfParam;
+ 81 fhcV3CnfParam;
+ 88 startNsftListParamV3;
+ 93 auxadcResult;
+ 95 queryCaCfgTableV5CnfParam;
+ 96 getRxGainV5CnfParam;
+ 97 getTxRxRouteInfoV5CnfParam;
+ 98 startContRxV5CnfParam;
+ 99 startMixRxCaModeParamV5;
+ 100 mixRxRptCaModeV5;
+ 101 startPuschTxParamV5;
+ 102 startSrsTxParamV5;
+ 106 fhcAfcTxCalCnfParam;
+ 110 gettxpoweroffsetCnf;
+ 111 settxpoweroffsetCnf;
+ 126 setTxCfgCnf;
+ 130 getHpueRouteInfoCnf;
+ 134 startRssiRxCnfV7;
+ 136 setRxCfgCnf;
+};
diff --git a/mcu/service/dhl/database/unionTag/FT_GL1TST_Gen93_UnionTag.txt b/mcu/service/dhl/database/unionTag/FT_GL1TST_Gen93_UnionTag.txt
new file mode 100755
index 0000000..785e2aa
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/FT_GL1TST_Gen93_UnionTag.txt
@@ -0,0 +1,137 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+This file is used by cgen for union Tag information.
+Usage:
+
+structure_name tag_field_name union_name:
+{
+ tag_fileld_value field_of_union_name;
+ tag_fileld_value field_of_union_name;
+};
+
+For Example:
+
+InvokeChoice ChoiceId a:
+{
+ 1 localValue;
+ 2 globalValue;
+};
+
+*/
+
+ft_to_gl1tst_struct type param:
+{
+ 0 pm;
+ 1 afc;
+ 2 nbTx;
+ 3 contRx;
+ 4 contTx;
+ 5 setBBTXCfg;
+ 6 selectPCS1900;
+ 8 msTx;
+ 9 setRampApcLevel;
+ 10 setAfcDacValue;
+ 11 BBTxCfg2;
+ 13 setCrystalCfg;
+ 16 setRampTable;
+ 17 setAfcSinWave;
+ 18 msTxEx;
+ 21 SetBSI;
+ 22 GetBSI;
+ 25 BBTxCfg3;
+ 24 contTxEx;
+ 28 contTxEx2;
+ 31 BBTxCfg4;
+ 47 NSFT_start;
+ 49 NSFT_change_power;
+ 56 PowerRollbackTable;
+ 61 m_u4NSFTSBERTestCount;
+ 65 m_u2NSFTRxQualBerDecile;
+ 66 m_IrPm;
+ 75 dcxoMode;
+ 78 setTxOctPaCoef;
+ 87 gainRfTx;
+ 92 path_flag;
+ 90 query_op_code;
+ 93 List_Mode_NSFT_start;
+ 99 is_uplate_to_NVRAM;
+ 101 is_uplate_to_NVRAM;
+ 106 afc_gpscoclockv2;
+ 107 is_uplate_to_NVRAM;
+ 109 set_txdata_req;
+ 110 get_txdata_req;
+};
+
+gl1tst_to_ft_struct type param:
+{
+ 0 pm;
+ 1 afc;
+ 12 BBTxCfg2;
+ 20 rfid;
+ 22 GetBSI;
+ 26 BBTxCfg3;
+ 30 GetAfcDacValueAtRTXOffsetCal;
+ 32 BBTxCfg4;
+ 35 calibration_32k;
+ 36 ms_capability_ex;
+ 44 dts_get_result_status;
+ 48 ok;
+ 49 ok;
+ 54 m_i1RfPwrState_FT;
+ 62 m_rNSFTSBER;
+ 64 m_u2NSFTRxLevel;
+ 65 m_u1NSFTRxQual;
+ 73 temperature;
+ 77 dts_get_result_status;
+ 82 dts_get_result_status;
+ 85 dts_get_result_status;
+ 88 m_ucNumOfGainRf;
+ 89 m_sBBPowerArrary;
+ 90 CheckIfFuncExist;
+ 91 rfTemperatureInfo;
+ 93 List_Mode_NSFT_result;
+ 97 dts_get_result_status;
+ 99 nvramAccessResult;
+ 100 nvramAccessResult;
+ 101 nvramAccessResult;
+ 102 nvramAccessResult;
+ 105 dts_get_result_status;
+ 106 afc_gpscoclockv2_result;
+ 107 nvramAccessResult;
+ 108 nvramAccessResult;
+ 109 set_txdata_cnf;
+ 110 get_txdata_cnf;
+};
diff --git a/mcu/service/dhl/database/unionTag/FT_GL1TST_Gen95_UnionTag.txt b/mcu/service/dhl/database/unionTag/FT_GL1TST_Gen95_UnionTag.txt
new file mode 100755
index 0000000..785e2aa
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/FT_GL1TST_Gen95_UnionTag.txt
@@ -0,0 +1,137 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+This file is used by cgen for union Tag information.
+Usage:
+
+structure_name tag_field_name union_name:
+{
+ tag_fileld_value field_of_union_name;
+ tag_fileld_value field_of_union_name;
+};
+
+For Example:
+
+InvokeChoice ChoiceId a:
+{
+ 1 localValue;
+ 2 globalValue;
+};
+
+*/
+
+ft_to_gl1tst_struct type param:
+{
+ 0 pm;
+ 1 afc;
+ 2 nbTx;
+ 3 contRx;
+ 4 contTx;
+ 5 setBBTXCfg;
+ 6 selectPCS1900;
+ 8 msTx;
+ 9 setRampApcLevel;
+ 10 setAfcDacValue;
+ 11 BBTxCfg2;
+ 13 setCrystalCfg;
+ 16 setRampTable;
+ 17 setAfcSinWave;
+ 18 msTxEx;
+ 21 SetBSI;
+ 22 GetBSI;
+ 25 BBTxCfg3;
+ 24 contTxEx;
+ 28 contTxEx2;
+ 31 BBTxCfg4;
+ 47 NSFT_start;
+ 49 NSFT_change_power;
+ 56 PowerRollbackTable;
+ 61 m_u4NSFTSBERTestCount;
+ 65 m_u2NSFTRxQualBerDecile;
+ 66 m_IrPm;
+ 75 dcxoMode;
+ 78 setTxOctPaCoef;
+ 87 gainRfTx;
+ 92 path_flag;
+ 90 query_op_code;
+ 93 List_Mode_NSFT_start;
+ 99 is_uplate_to_NVRAM;
+ 101 is_uplate_to_NVRAM;
+ 106 afc_gpscoclockv2;
+ 107 is_uplate_to_NVRAM;
+ 109 set_txdata_req;
+ 110 get_txdata_req;
+};
+
+gl1tst_to_ft_struct type param:
+{
+ 0 pm;
+ 1 afc;
+ 12 BBTxCfg2;
+ 20 rfid;
+ 22 GetBSI;
+ 26 BBTxCfg3;
+ 30 GetAfcDacValueAtRTXOffsetCal;
+ 32 BBTxCfg4;
+ 35 calibration_32k;
+ 36 ms_capability_ex;
+ 44 dts_get_result_status;
+ 48 ok;
+ 49 ok;
+ 54 m_i1RfPwrState_FT;
+ 62 m_rNSFTSBER;
+ 64 m_u2NSFTRxLevel;
+ 65 m_u1NSFTRxQual;
+ 73 temperature;
+ 77 dts_get_result_status;
+ 82 dts_get_result_status;
+ 85 dts_get_result_status;
+ 88 m_ucNumOfGainRf;
+ 89 m_sBBPowerArrary;
+ 90 CheckIfFuncExist;
+ 91 rfTemperatureInfo;
+ 93 List_Mode_NSFT_result;
+ 97 dts_get_result_status;
+ 99 nvramAccessResult;
+ 100 nvramAccessResult;
+ 101 nvramAccessResult;
+ 102 nvramAccessResult;
+ 105 dts_get_result_status;
+ 106 afc_gpscoclockv2_result;
+ 107 nvramAccessResult;
+ 108 nvramAccessResult;
+ 109 set_txdata_cnf;
+ 110 get_txdata_cnf;
+};
diff --git a/mcu/service/dhl/database/unionTag/FT_GL1TST_Gen97_UnionTag.txt b/mcu/service/dhl/database/unionTag/FT_GL1TST_Gen97_UnionTag.txt
new file mode 100644
index 0000000..785e2aa
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/FT_GL1TST_Gen97_UnionTag.txt
@@ -0,0 +1,137 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+This file is used by cgen for union Tag information.
+Usage:
+
+structure_name tag_field_name union_name:
+{
+ tag_fileld_value field_of_union_name;
+ tag_fileld_value field_of_union_name;
+};
+
+For Example:
+
+InvokeChoice ChoiceId a:
+{
+ 1 localValue;
+ 2 globalValue;
+};
+
+*/
+
+ft_to_gl1tst_struct type param:
+{
+ 0 pm;
+ 1 afc;
+ 2 nbTx;
+ 3 contRx;
+ 4 contTx;
+ 5 setBBTXCfg;
+ 6 selectPCS1900;
+ 8 msTx;
+ 9 setRampApcLevel;
+ 10 setAfcDacValue;
+ 11 BBTxCfg2;
+ 13 setCrystalCfg;
+ 16 setRampTable;
+ 17 setAfcSinWave;
+ 18 msTxEx;
+ 21 SetBSI;
+ 22 GetBSI;
+ 25 BBTxCfg3;
+ 24 contTxEx;
+ 28 contTxEx2;
+ 31 BBTxCfg4;
+ 47 NSFT_start;
+ 49 NSFT_change_power;
+ 56 PowerRollbackTable;
+ 61 m_u4NSFTSBERTestCount;
+ 65 m_u2NSFTRxQualBerDecile;
+ 66 m_IrPm;
+ 75 dcxoMode;
+ 78 setTxOctPaCoef;
+ 87 gainRfTx;
+ 92 path_flag;
+ 90 query_op_code;
+ 93 List_Mode_NSFT_start;
+ 99 is_uplate_to_NVRAM;
+ 101 is_uplate_to_NVRAM;
+ 106 afc_gpscoclockv2;
+ 107 is_uplate_to_NVRAM;
+ 109 set_txdata_req;
+ 110 get_txdata_req;
+};
+
+gl1tst_to_ft_struct type param:
+{
+ 0 pm;
+ 1 afc;
+ 12 BBTxCfg2;
+ 20 rfid;
+ 22 GetBSI;
+ 26 BBTxCfg3;
+ 30 GetAfcDacValueAtRTXOffsetCal;
+ 32 BBTxCfg4;
+ 35 calibration_32k;
+ 36 ms_capability_ex;
+ 44 dts_get_result_status;
+ 48 ok;
+ 49 ok;
+ 54 m_i1RfPwrState_FT;
+ 62 m_rNSFTSBER;
+ 64 m_u2NSFTRxLevel;
+ 65 m_u1NSFTRxQual;
+ 73 temperature;
+ 77 dts_get_result_status;
+ 82 dts_get_result_status;
+ 85 dts_get_result_status;
+ 88 m_ucNumOfGainRf;
+ 89 m_sBBPowerArrary;
+ 90 CheckIfFuncExist;
+ 91 rfTemperatureInfo;
+ 93 List_Mode_NSFT_result;
+ 97 dts_get_result_status;
+ 99 nvramAccessResult;
+ 100 nvramAccessResult;
+ 101 nvramAccessResult;
+ 102 nvramAccessResult;
+ 105 dts_get_result_status;
+ 106 afc_gpscoclockv2_result;
+ 107 nvramAccessResult;
+ 108 nvramAccessResult;
+ 109 set_txdata_cnf;
+ 110 get_txdata_cnf;
+};
diff --git a/mcu/service/dhl/database/unionTag/FT_MML1TST_Gen93_UnionTag.txt b/mcu/service/dhl/database/unionTag/FT_MML1TST_Gen93_UnionTag.txt
new file mode 100755
index 0000000..63007bd
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/FT_MML1TST_Gen93_UnionTag.txt
@@ -0,0 +1,106 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+ * This file is used by cgen for union Tag information.
+ */
+mmrftst_req_struct type param:
+{
+ 0 checkIfFuncExist;
+ 1 getRfCapability;
+ 2 dpd_fac_start_dim;
+ 3 dpd_fac_get_dim;
+ 4 dpd_fac_set_dim;
+ 5 dpd_fac_en_dis;
+ 6 cim3_fac_start_dim;
+ 7 cim3_fac_get_dim;
+ 8 cim3_fac_set_dim;
+ 9 cim3_fac_en_dis;
+ 10 startRfSelfKparam;
+ 11 getRfSelfKResult;
+ 12 setRfSelfKResult;
+ 13 getRfSelfKRltLen;
+ 14 startRfSelfKparamV2;
+ 15 getRfSelfKResultV2;
+ 16 setRfSelfKResultV2;
+ 17 getRfSelfKDbgInfoV2;
+ 18 getRfSelfKDbgInfo;
+ 19 getRfSelfKResultStr;
+ 20 getRfSelfKResultStrV2;
+ 25 cfg_tas;
+ 35 getTadcSetting;
+ 36 setTadcSetting;
+ 37 getRfTemp;
+ 38 getTemperatureInfo;
+ 44 queryVpaVoltageList;
+ 54 startRFSelfTestAnalyzer;
+ 56 getAfcSetting;
+ 57 setAfcSetting;
+ 58 getTasStateCfg;
+};
+
+mmrftst_cnf_struct type param:
+{
+ 0 checkIfFuncExist;
+ 1 getRfCapability;
+ 2 dpd_fac_rpt;
+ 3 get_dpd_fac_rpt;
+ 4 set_dpd_fac_rpt;
+ 5 dpd_fac_en_dis;
+ 6 cim3_fac_rpt;
+ 7 get_cim3_fac_rpt;
+ 8 set_cim3_fac_rpt;
+ 9 cim3_fac_en_dis;
+ 10 rfSelfKStatus;
+ 11 getRfSelfKResult;
+ 12 setRfSelfKResult;
+ 13 getRfSelfKRltLen;
+ 14 rfSelfKStatusV2;
+ 15 getRfSelfKResultV2;
+ 16 setRfSelfKResultV2;
+ 17 getRfSelfKDbgInfoV2;
+ 18 getRfSelfKDbgInfo;
+ 19 getRfSelfKResultStr;
+ 20 getRfSelfKResultStrV2;
+ 25 CfgTas;
+ 35 getTadcSetting;
+ 36 setTadcSetting;
+ 37 getRfTemp;
+ 38 getTemperatureInfo;
+ 44 queryVpaVoltageList;
+ 54 startRFSelfTestAnalyzer;
+ 56 getAfcSetting;
+ 57 setAfcSetting;
+ 58 getTasStateCfg;
+};
diff --git a/mcu/service/dhl/database/unionTag/FT_MML1TST_Gen95_UnionTag.txt b/mcu/service/dhl/database/unionTag/FT_MML1TST_Gen95_UnionTag.txt
new file mode 100755
index 0000000..93a0ba9
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/FT_MML1TST_Gen95_UnionTag.txt
@@ -0,0 +1,130 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+ * This file is used by cgen for union Tag information.
+ */
+mmrftst_req_struct type param:
+{
+ 0 checkIfFuncExist;
+ 1 getRfCapability;
+ 2 dpd_fac_start_dim;
+ 3 dpd_fac_get_dim;
+ 4 dpd_fac_set_dim;
+ 5 dpd_fac_en_dis;
+ 6 cim3_fac_start_dim;
+ 7 cim3_fac_get_dim;
+ 8 cim3_fac_set_dim;
+ 9 cim3_fac_en_dis;
+ 10 startRfSelfKparam;
+ 11 getRfSelfKResult;
+ 12 setRfSelfKResult;
+ 13 getRfSelfKRltLen;
+ 14 startRfSelfKparamV2;
+ 15 getRfSelfKResultV2;
+ 16 setRfSelfKResultV2;
+ 17 getRfSelfKDbgInfoV2;
+ 18 getRfSelfKDbgInfo;
+ 19 getRfSelfKResultStr;
+ 20 getRfSelfKResultStrV2;
+ 25 cfg_tas;
+ 35 getTadcSetting;
+ 36 setTadcSetting;
+ 37 getRfTemp;
+ 38 getTemperatureInfo;
+ 44 queryVpaVoltageList;
+ 54 startRFSelfTestAnalyzer;
+ 56 getAfcSetting;
+ 57 setAfcSetting;
+ 58 getTasStateCfg;
+ 75 getAfcSettingv2_req;
+ 76 setAfcSettingv2_req;
+ 77 xtal_tms_calibrated_req;
+ 85 getcotmsdata_req;
+ 86 setcotmsdata_req;
+ 88 AfcAacCal_req;
+ 89 getAfcSettingv3_req;
+ 90 setAfcSettingv3_req;
+ 92 heaterCtrol_req;
+ 93 getcotmsdatav3_req;
+ 94 setcotmsdatav3_req;
+ 116 check_mipi_component;
+};
+
+mmrftst_cnf_struct type param:
+{
+ 0 checkIfFuncExist;
+ 1 getRfCapability;
+ 2 dpd_fac_rpt;
+ 3 get_dpd_fac_rpt;
+ 4 set_dpd_fac_rpt;
+ 5 dpd_fac_en_dis;
+ 6 cim3_fac_rpt;
+ 7 get_cim3_fac_rpt;
+ 8 set_cim3_fac_rpt;
+ 9 cim3_fac_en_dis;
+ 10 rfSelfKStatus;
+ 11 getRfSelfKResult;
+ 12 setRfSelfKResult;
+ 13 getRfSelfKRltLen;
+ 14 rfSelfKStatusV2;
+ 15 getRfSelfKResultV2;
+ 16 setRfSelfKResultV2;
+ 17 getRfSelfKDbgInfoV2;
+ 18 getRfSelfKDbgInfo;
+ 19 getRfSelfKResultStr;
+ 20 getRfSelfKResultStrV2;
+ 25 CfgTas;
+ 35 getTadcSetting;
+ 36 setTadcSetting;
+ 37 getRfTemp;
+ 38 getTemperatureInfo;
+ 44 queryVpaVoltageList;
+ 54 startRFSelfTestAnalyzer;
+ 56 getAfcSetting;
+ 57 setAfcSetting;
+ 58 getTasStateCfg;
+ 75 getAfcSettingv2_cnf;
+ 76 setAfcSettingv2_cnf;
+ 77 xtal_tms_calibrated_cnf;
+ 85 getcotmsdata_cnf;
+ 86 setcotmsdata_cnf;
+ 88 AfcAacCal_cnf;
+ 89 getAfcSettingv3_cnf;
+ 90 setAfcSettingv3_cnf;
+ 92 heaterCtrol_cnf;
+ 93 getcotmsdatav3_cnf;
+ 94 setcotmsdatav3_cnf;
+ 116 check_mipi_component;
+};
diff --git a/mcu/service/dhl/database/unionTag/FT_MML1TST_Gen97_UnionTag.txt b/mcu/service/dhl/database/unionTag/FT_MML1TST_Gen97_UnionTag.txt
new file mode 100644
index 0000000..03ffbd7
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/FT_MML1TST_Gen97_UnionTag.txt
@@ -0,0 +1,236 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+ * This file is used by cgen for union Tag information.
+ */
+mmrftst_req_struct type param:
+{
+ 0 checkIfFuncExist;
+ 1 getRfCapability;
+ 2 dpd_fac_start_dim;
+ 3 dpd_fac_get_dim;
+ 4 dpd_fac_set_dim;
+ 5 dpd_fac_en_dis;
+ 6 cim3_fac_start_dim;
+ 7 cim3_fac_get_dim;
+ 8 cim3_fac_set_dim;
+ 9 cim3_fac_en_dis;
+ 10 startRfSelfKparam;
+ 11 getRfSelfKResult;
+ 12 setRfSelfKResult;
+ 13 getRfSelfKRltLen;
+ 14 startRfSelfKparamV2;
+ 15 getRfSelfKResultV2;
+ 16 setRfSelfKResultV2;
+ 17 getRfSelfKDbgInfoV2;
+ 18 getRfSelfKDbgInfo;
+ 19 getRfSelfKResultStr;
+ 20 getRfSelfKResultStrV2;
+ 31 mode_et_req;
+ 32 setToolUsage_req;
+ 35 getTadcSetting;
+ 36 setTadcSetting;
+ 37 getRfTemp;
+ 38 getTemperatureInfo;
+ 39 getSetBSICW;
+ 44 queryVpaVoltageList;
+ 54 startRFSelfTestAnalyzer;
+ 56 getAfcSetting;
+ 57 setAfcSetting;
+ 75 getAfcSettingv2_req;
+ 76 setAfcSettingv2_req;
+ 77 xtal_tms_calibrated_req;
+ 85 getcotmsdata_req;
+ 86 setcotmsdata_req;
+ 88 AfcAacCal_req;
+ 89 getAfcSettingv3_req;
+ 90 setAfcSettingv3_req;
+ 92 heaterCtrol_req;
+ 93 getcotmsdatav3_req;
+ 94 setcotmsdatav3_req;
+ 95 startRfSelfKparamV7;
+ 96 getRfSelfKResultV7;
+ 97 setRfSelfKResultV7;
+ 98 getRfSelfKDbgInfoV7;
+ 99 getRfSelfKResultInfoV7;
+ 100 checksum_read_req;
+ 101 checksum_trigger_req;
+ 102 FuncSupportedReq;
+ 103 EnStopReq;
+ 104 EnQueryConfigReq;
+ 105 EnTrxRouteCalculatorReq;
+ 106 EnSetTrxSettingReq;
+ 107 EnGetTrxSettingReq;
+ 108 EnStartCwTxToneReq;
+ 109 EnFetchCwTxPdValueReq;
+ 110 EnGetRxGainInfoReq;
+ 111 EnCwRssiReq;
+ 112 EnStartCwContRxReq;
+ 113 EnQueryTrxRouteInfopReq;
+ 114 EnFhcReq;
+ 116 check_mipi_component;
+ 118 EnEnQueryBlkNumByRouteReq;
+ 119 txf_req;
+ 120 queryCMRInfo_v7_req;
+ 121 start_et_v7_req;
+ 122 get_et_v7_req;
+ 123 set_et_v7_req;
+ 124 get_et_rf_capability_req;
+ 125 start_dpd_v7_req;
+ 126 set_dpd_all_v7_req;
+ 127 set_dpd_partial_v7_req;
+ 128 get_dpd_all_v7_req;
+ 129 get_dpd_rf_capability_req;
+ 130 force_tas_v7_req;
+ 131 query_tas_info_v7_req;
+ 136 get_et_lab_tuning_para_req;
+ 137 set_et_delay_offset_req;
+ 139 en_share_route_table_req;
+ 141 EnFoeSensEstimateReq;
+ 144 get_et_cal_log_v2_req;
+ 145 SerdesTestReq;
+ 146 query_tas_verify_list_req;
+ 147 get_pa_bias_tuning_freq_req;
+ 148 set_pa_bias_req;
+ 149 reset_pa_bias_req;
+ 150 rat_query_max_prf_per_route_req;
+ 153 en_query_sfft_sync_dlfreq_req;
+ 160 queryWaferInfo_req;
+ 165 get_set_mipi_cw_v7_req;
+ 177 EnQueryEtSmartCharDbReq;
+ 182 en_dynamic_query_req;
+ 199 query_cotms_degree_c_req;
+ 205 get_set_bpi_data_v7_req;
+ 237 EnCwRssi_v8_req;
+};
+
+mmrftst_cnf_struct type param:
+{
+ 0 checkIfFuncExist;
+ 1 getRfCapability;
+ 2 dpd_fac_rpt;
+ 3 get_dpd_fac_rpt;
+ 4 set_dpd_fac_rpt;
+ 5 dpd_fac_en_dis;
+ 6 cim3_fac_rpt;
+ 7 get_cim3_fac_rpt;
+ 8 set_cim3_fac_rpt;
+ 9 cim3_fac_en_dis;
+ 10 rfSelfKStatus;
+ 11 getRfSelfKResult;
+ 12 setRfSelfKResult;
+ 13 getRfSelfKRltLen;
+ 14 rfSelfKStatusV2;
+ 15 getRfSelfKResultV2;
+ 16 setRfSelfKResultV2;
+ 17 getRfSelfKDbgInfoV2;
+ 18 getRfSelfKDbgInfo;
+ 19 getRfSelfKResultStr;
+ 20 getRfSelfKResultStrV2;
+ 31 mode_et_cnf;
+ 32 setToolUsage_cnf;
+ 35 getTadcSetting;
+ 36 setTadcSetting;
+ 37 getRfTemp;
+ 38 getTemperatureInfo;
+ 39 getSetBSICW;
+ 44 queryVpaVoltageList;
+ 54 startRFSelfTestAnalyzer;
+ 56 getAfcSetting;
+ 57 setAfcSetting;
+ 75 getAfcSettingv2_cnf;
+ 76 setAfcSettingv2_cnf;
+ 77 xtal_tms_calibrated_cnf;
+ 85 getcotmsdata_cnf;
+ 86 setcotmsdata_cnf;
+ 88 AfcAacCal_cnf;
+ 89 getAfcSettingv3_cnf;
+ 90 setAfcSettingv3_cnf;
+ 92 heaterCtrol_cnf;
+ 93 getcotmsdatav3_cnf;
+ 94 setcotmsdatav3_cnf;
+ 95 startRfSelfKparamV7;
+ 96 getRfSelfKResultV7;
+ 97 setRfSelfKResultV7;
+ 98 getRfSelfKDbgInfoV7;
+ 99 getRfSelfKResultInfoV7;
+ 100 calc_checksum_cal_cnf;
+ 101 verify_checksum_cnf;
+ 102 FuncSupportedCnf;
+ 103 EnStopCnf;
+ 104 EnQueryConfigCnf;
+ 105 EnTrxRouteCalculatorCnf;
+ 106 EnSetTrxSettingCnf;
+ 107 EnGetTrxSettingCnf;
+ 108 EnStartCwTxToneCnf;
+ 109 EnFetchCwTxPdValueCnf;
+ 110 EnGetRxGainInfoCnf;
+ 111 EnCwRssiCnf;
+ 112 EnStartCwContRxCnf;
+ 113 EnQueryTrxRouteInfopCnf;
+ 114 EnFhcCnf;
+ 116 check_mipi_component;
+ 118 EnEnQueryBlkNumByRouteCnf;
+ 119 txf_cnf;
+ 120 queryCMRInfo_v7_cnf;
+ 121 start_et_v7_cnf;
+ 122 get_et_v7_cnf;
+ 123 set_et_v7_cnf;
+ 125 start_dpd_v7_cnf;
+ 126 set_dpd_all_v7_cnf;
+ 127 set_dpd_partial_v7_cnf;
+ 128 get_dpd_all_v7_cnf;
+ 130 force_tas_v7_cnf;
+ 131 query_tas_info_v7_cnf;
+ 136 get_et_lab_tuning_para_cnf;
+ 137 set_et_delay_offset_cnf;
+ 139 en_share_route_table_cnf;
+ 141 EnFoeSensEstimateCnf;
+ 144 get_et_cal_log_v2_cnf;
+ 145 SerdesTestcnf;
+ 146 query_tas_verify_list_cnf;
+ 147 get_pa_bias_tuning_freq_cnf;
+ 148 set_pa_bias_cnf;
+ 149 reset_pa_bias_cnf;
+ 150 rat_query_max_prf_per_route_cnf;
+ 153 en_query_sfft_sync_dlfreq_cnf;
+ 160 queryWaferInfo_cnf;
+ 165 get_set_mipi_cw_v7_cnf;
+ 177 EnQueryEtSmartCharDbCnf;
+ 182 en_dynamic_query_cnf;
+ 199 query_cotms_degree_c_cnf;
+ 205 get_set_bpi_data_v7_cnf;
+ 237 EnCwRssi_v8_cnf;
+};
\ No newline at end of file
diff --git a/mcu/service/dhl/database/unionTag/FT_NL1TST_Gen97_UnionTag.txt b/mcu/service/dhl/database/unionTag/FT_NL1TST_Gen97_UnionTag.txt
new file mode 100644
index 0000000..4d87547
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/FT_NL1TST_Gen97_UnionTag.txt
@@ -0,0 +1,126 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+ * This file is used by cgen for union Tag information.
+ */
+ft_to_nl1_struct type param:
+{
+ 0 FuncSupportedReq;
+ 1 StopReq;
+ 2 GetRfCapabilityReq;
+ 3 PuschTxReq;
+ 4 PucchTxReq;
+ 6 SrsTxReq;
+ 7 MixRxReq;
+ 8 MixRxRptReq;
+ 9 GetMimoBandReq;
+ 10 GetRouteReq;
+ 11 GetDlFreqReq;
+ 13 ListNsftReq;
+ 11 ResetCounterReq;
+ 14 MixRxUpdtReq;
+ 15 GetTxPowerOffsetReq;
+ 16 SetTxPowerOffsetReq;
+ 17 SensitivityQueryReq;
+};
+
+nl1_to_ft_struct type param:
+{
+ 0 FuncSupportedCnf;
+ 1 StopCnf;
+ 2 GetRfCapabilityCnf;
+ 3 PuschTxCnf;
+ 4 PucchTxCnf;
+ 6 SrsTxCnf;
+ 7 MixRxCnf;
+ 8 MixRxRptCnf;
+ 9 GetMimoBandCnf;
+ 10 GetTxRouteCnf;
+ 11 GetDlFreqCnf;
+ 13 GeneralCnf;
+ 11 ResetCounterCnf;
+ 14 MixRxUpdtCnf;
+ 15 GetTxPowerOffsetCnf;
+ 16 SetTxPowerOffsetCnf;
+ 17 SensitivityQueryCnf;
+};
+
+NL1TSTCmd_StartForcePuschTx_ReqParam txScs ulBandwidth:
+{
+ 0 scs_15_enum;
+ 1 scs_30_enum;
+ 2 scs_60_enum;
+ 5 scs_rssi_enum;
+};
+
+NL1TSTCmd_StartPucch_ReqParam txScs ulBandwidth:
+{
+ 0 scs_15_enum;
+ 1 scs_30_enum;
+ 2 scs_60_enum;
+ 5 scs_rssi_enum;
+};
+
+NL1TSTCmd_StartSrsTxC_ReqParam txScs ulBandwidth:
+{
+ 0 scs_15_enum;
+ 1 scs_30_enum;
+ 2 scs_60_enum;
+ 5 scs_rssi_enum;
+};
+
+NL1TSTCmd_StartForceMixRx_ReqParam trxScs dlBandwidth:
+{
+ 0 scs_15_enum;
+ 1 scs_30_enum;
+ 2 scs_60_enum;
+ 5 scs_rssi_enum;
+};
+
+NL1TST_NORMAL_MIX_RX_DL_UL_PARAM_T trxScs dlBandwidth:
+{
+ 0 scs_15_enum;
+ 1 scs_30_enum;
+ 2 scs_60_enum;
+ 5 scs_rssi_enum;
+};
+
+NL1TSTCmd_Nsft_List_RxTx_Freq_Param txScs ulBandwidth:
+{
+ 0 scs_15_enum;
+ 1 scs_30_enum;
+ 2 scs_60_enum;
+ 5 scs_rssi_enum;
+};
\ No newline at end of file
diff --git a/mcu/service/dhl/database/unionTag/FT_UL1TST_Gen93_UnionTag.txt b/mcu/service/dhl/database/unionTag/FT_UL1TST_Gen93_UnionTag.txt
new file mode 100755
index 0000000..a803e9b
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/FT_UL1TST_Gen93_UnionTag.txt
@@ -0,0 +1,67 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+This file is used by cgen for union Tag information.
+Usage:
+
+structure_name tag_field_name union_name:
+{
+ tag_fileld_value field_of_union_name;
+ tag_fileld_value field_of_union_name;
+};
+
+For Example:
+
+InvokeChoice ChoiceId a:
+{
+ 1 localValue;
+ 2 globalValue;
+};
+
+*/
+
+ft_to_ul1tst_struct type param:
+{
+ 0 txaccess;
+ 2 txdpch;
+ 3 rxdpch;
+ 6 afc;
+};
+
+ul1tst_to_ft_struct type param:
+{
+ 3 rx_dpch;
+ 6 afc;
+};
diff --git a/mcu/service/dhl/database/unionTag/FT_UL1TST_Gen95_UnionTag.txt b/mcu/service/dhl/database/unionTag/FT_UL1TST_Gen95_UnionTag.txt
new file mode 100755
index 0000000..a803e9b
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/FT_UL1TST_Gen95_UnionTag.txt
@@ -0,0 +1,67 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+This file is used by cgen for union Tag information.
+Usage:
+
+structure_name tag_field_name union_name:
+{
+ tag_fileld_value field_of_union_name;
+ tag_fileld_value field_of_union_name;
+};
+
+For Example:
+
+InvokeChoice ChoiceId a:
+{
+ 1 localValue;
+ 2 globalValue;
+};
+
+*/
+
+ft_to_ul1tst_struct type param:
+{
+ 0 txaccess;
+ 2 txdpch;
+ 3 rxdpch;
+ 6 afc;
+};
+
+ul1tst_to_ft_struct type param:
+{
+ 3 rx_dpch;
+ 6 afc;
+};
diff --git a/mcu/service/dhl/database/unionTag/FT_UL1TST_Gen97_UnionTag.txt b/mcu/service/dhl/database/unionTag/FT_UL1TST_Gen97_UnionTag.txt
new file mode 100755
index 0000000..a93d428
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/FT_UL1TST_Gen97_UnionTag.txt
@@ -0,0 +1,64 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+This file is used by cgen for union Tag information.
+Usage:
+
+structure_name tag_field_name union_name:
+{
+ tag_fileld_value field_of_union_name;
+ tag_fileld_value field_of_union_name;
+};
+
+For Example:
+
+InvokeChoice ChoiceId a:
+{
+ 1 localValue;
+ 2 globalValue;
+};
+
+*/
+
+ft_to_ul1tst_struct type param:
+{
+ 0 txaccess;
+ 6 afc;
+};
+
+ul1tst_to_ft_struct type param:
+{
+ 6 afc;
+};
diff --git a/mcu/service/dhl/database/unionTag/GAS_CS_MCDDLL_unionTag.txt b/mcu/service/dhl/database/unionTag/GAS_CS_MCDDLL_unionTag.txt
new file mode 100755
index 0000000..216c9a1
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/GAS_CS_MCDDLL_unionTag.txt
@@ -0,0 +1,146 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+This file is used by cgen for union Tag information.
+Usage:
+
+structure_name tag_field_name union_name:
+{
+ tag_fileld_value field_of_union_name;
+ tag_fileld_value field_of_union_name;
+};
+
+For Example:
+
+InvokeChoice ChoiceId a:
+{
+ 1 localValue;
+ 2 globalValue;
+};
+
+*/
+
+/****************************** GAS CS MCDDLL UnionTag ********************************/
+
+unpack_msg msg_type rr_peer_msg:
+{
+
+ STRUCT_ID_RR_PEER_ADDITIONAL_ASSIGNMENT_STRUCT additional_assignment;
+ STRUCT_ID_IMMEDIATE_ASSIGN_MESSAGE immediate_assign_msg;
+ STRUCT_ID_IMMEDIATE_ASSIGN_EXT_MESSAGE immediate_assign_ext_msg;
+ STRUCT_ID_IMM_ASGN_REJ_MSG_STRUCT imm_asgn_rej_msg;
+ STRUCT_ID_CIPHER_MODE_COMMAND_STRUCT cipher_mode_command;
+ STRUCT_ID_CIPHER_MODE_COMPLETE_STRUCT cipher_mode_complete;
+ STRUCT_ID_ASSIGNMENT_COMMAND_STRUCT assignment_command;
+ STRUCT_ID_ASSIGNMENT_COMPLETE_STRUCT assignment_complete;
+ STRUCT_ID_ASSIGNMENT_FAILURE_STRUCT assignment_failure;
+ STRUCT_ID_HANDOVER_COMMAND_STRUCT handover_command;
+ STRUCT_ID_HANDOVER_COMPLETE_STRUCT handover_complete;
+ STRUCT_ID_HANDOVER_FAILURE_STRUCT handover_failure;
+ STRUCT_ID_RR_CELL_CHANGE_ORDER_STRUCT rr_cell_change_order;
+ STRUCT_ID_PHYSICAL_INFORMATION_STRUCT physical_information;
+ STRUCT_ID_CHANNEL_RELEASE_STRUCT channel_release;
+ STRUCT_ID_RR_PEER_PARTIAL_RELEASE_STRUCT partial_release;
+ STRUCT_ID_RR_PEER_PARTIAL_RELEASE_COMPLETE_STRUCT rr_peer_partial_release_complete;
+ STRUCT_ID_PAGING_REQUEST_TYPE1_STRUCT paging_request_1;
+ STRUCT_ID_PAGING_REQUEST_TYPE2_STRUCT paging_request_2;
+ STRUCT_ID_PAGING_REQUEST_TYPE3_STRUCT paging_request_3;
+ STRUCT_ID_PAGING_RESPONSE paging_response;
+ STRUCT_ID_SI_1_STRUCT si_1;
+ STRUCT_ID_SI_2_STRUCT si_2;
+ STRUCT_ID_SI_2BIS_STRUCT si_2bis;
+ STRUCT_ID_SI_2TER_STRUCT si_2ter;
+ STRUCT_ID_SI_2QUATER_STRUCT si_2quater;
+ STRUCT_ID_SI_3_STRUCT si_3;
+ STRUCT_ID_SI_4_STRUCT si_4;
+ STRUCT_ID_SI_5_STRUCT si_5;
+ STRUCT_ID_SI_5BIS_STRUCT si_5bis;
+ STRUCT_ID_SI_5TER_STRUCT si_5ter;
+ STRUCT_ID_SI_6_STRUCT si_6;
+ STRUCT_ID_SI_7_STRUCT si_7;
+ STRUCT_ID_SI_8_STRUCT si_8;
+ STRUCT_ID_SI_16_STRUCT si_16;
+ STRUCT_ID_SI_17_STRUCT si_17;
+ STRUCT_ID_SI_18_STRUCT si_18;
+ STRUCT_ID_SI_19_STRUCT si_19;
+ STRUCT_ID_SI_20_STRUCT si_20;
+ STRUCT_ID_EXTENDED_MEASUREMENT_ORDER_STRUCT extended_measurement_order;
+ STRUCT_ID_EXTENDED_MEASUREMENT_REPORT_STRUCT extended_measurement_report;
+ STRUCT_ID_MEASUREMENT_REPORT_STRUCT measurement_report;
+ STRUCT_ID_MEASUREMENT_INFORMATION_STRUCT measurement_information_struct;
+ STRUCT_ID_ENHANCED_MEASUREMENT_REPORT_STRUCT enhanced_measurement_report_struct;
+ STRUCT_ID_CHANNEL_MODE_MODIFY_STRUCT channel_mode_modify;
+ STRUCT_ID_CHANNEL_MODE_MODIFY_ACK_STRUCT channel_mode_modify_ack_struct;
+ STRUCT_ID_RR_PEER_CLASSMARK_CHANGE_STRUCT classmark_change;
+ STRUCT_ID_RR_PEER_CLASSMARK_ENQUIRY_STRUCT classmark_enquiry;
+ STRUCT_ID_FREQUENCY_REDEFINITION_STRUCT frequency_redefinition;
+ STRUCT_ID_RR_STATUS_STRUCT rr_status;
+ STRUCT_ID_GPRS_SUSPENSION_REQUEST_STRUCT gprs_suspension_request;
+ STRUCT_ID_CONFIGURATION_CHANGE_COMMAND_STRUCT configuration_change_command;
+};
+
+ext_measurement_parameters_struct ext_measurement_parameters_struct_s_0_tag ext_measurement_parameters_struct_s_0_value:
+{
+ M_EM1_STRUCT m_em1_struct;
+};
+
+enh_measurement_parameters_struct enh_measurement_parameters_struct_s_1_tag enh_measurement_parameters_struct_s_1_value:
+{
+ ENH_MEASUREMENT_PARAMETERS_STRUCT_S_2 m_enh_measurement_parameters_struct_s_2;
+ PSI3_CHANGE_MARK psi3_change_mark;
+};
+
+measurement_information_struct s_9_tag s_9_value:
+{
+ S_10 m_s_10;
+};
+
+
+enhanced_measurement_report_struct enhanced_measurement_report_struct_s_5_tag
+enhanced_measurement_report_struct_s_5_value:
+{
+ ENHANCED_MEASUREMENT_REPORT_STRUCT_S_5_BIT m_enhanced_measurement_report_struct_s_5_bit;
+ ENHANCED_MEASUREMENT_REPORT_STRUCT_S_6 m_enhanced_measurement_report_struct_s_6;
+};
+
+cdma_2000_description_struct_mi_s_3 cdma_2000_description_struct_mi_s_3_tag cdma_2000_description_struct_mi_s_3_value:
+{
+ CDMA_2000_DESCRIPTION_STRUCT_MI_S_4 m_cdma_2000_description_struct_mi_s_4;
+ CDMA_2000_DESCRIPTION_STRUCT_MI_S_5 m_cdma_2000_description_struct_mi_s_5;
+ CDMA_2000_DESCRIPTION_STRUCT_MI_S_6 m_cdma_2000_description_struct_mi_s_6;
+ CDMA_2000_DESCRIPTION_STRUCT_MI_S_7 m_cdma_2000_description_struct_mi_s_7;
+ CDMA_2000_DESCRIPTION_STRUCT_MI_S_8 m_cdma_2000_description_struct_mi_s_8;
+};
+
diff --git a/mcu/service/dhl/database/unionTag/GAS_CS_MCDDLL_unionTag_tdd.txt b/mcu/service/dhl/database/unionTag/GAS_CS_MCDDLL_unionTag_tdd.txt
new file mode 100755
index 0000000..216c9a1
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/GAS_CS_MCDDLL_unionTag_tdd.txt
@@ -0,0 +1,146 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+This file is used by cgen for union Tag information.
+Usage:
+
+structure_name tag_field_name union_name:
+{
+ tag_fileld_value field_of_union_name;
+ tag_fileld_value field_of_union_name;
+};
+
+For Example:
+
+InvokeChoice ChoiceId a:
+{
+ 1 localValue;
+ 2 globalValue;
+};
+
+*/
+
+/****************************** GAS CS MCDDLL UnionTag ********************************/
+
+unpack_msg msg_type rr_peer_msg:
+{
+
+ STRUCT_ID_RR_PEER_ADDITIONAL_ASSIGNMENT_STRUCT additional_assignment;
+ STRUCT_ID_IMMEDIATE_ASSIGN_MESSAGE immediate_assign_msg;
+ STRUCT_ID_IMMEDIATE_ASSIGN_EXT_MESSAGE immediate_assign_ext_msg;
+ STRUCT_ID_IMM_ASGN_REJ_MSG_STRUCT imm_asgn_rej_msg;
+ STRUCT_ID_CIPHER_MODE_COMMAND_STRUCT cipher_mode_command;
+ STRUCT_ID_CIPHER_MODE_COMPLETE_STRUCT cipher_mode_complete;
+ STRUCT_ID_ASSIGNMENT_COMMAND_STRUCT assignment_command;
+ STRUCT_ID_ASSIGNMENT_COMPLETE_STRUCT assignment_complete;
+ STRUCT_ID_ASSIGNMENT_FAILURE_STRUCT assignment_failure;
+ STRUCT_ID_HANDOVER_COMMAND_STRUCT handover_command;
+ STRUCT_ID_HANDOVER_COMPLETE_STRUCT handover_complete;
+ STRUCT_ID_HANDOVER_FAILURE_STRUCT handover_failure;
+ STRUCT_ID_RR_CELL_CHANGE_ORDER_STRUCT rr_cell_change_order;
+ STRUCT_ID_PHYSICAL_INFORMATION_STRUCT physical_information;
+ STRUCT_ID_CHANNEL_RELEASE_STRUCT channel_release;
+ STRUCT_ID_RR_PEER_PARTIAL_RELEASE_STRUCT partial_release;
+ STRUCT_ID_RR_PEER_PARTIAL_RELEASE_COMPLETE_STRUCT rr_peer_partial_release_complete;
+ STRUCT_ID_PAGING_REQUEST_TYPE1_STRUCT paging_request_1;
+ STRUCT_ID_PAGING_REQUEST_TYPE2_STRUCT paging_request_2;
+ STRUCT_ID_PAGING_REQUEST_TYPE3_STRUCT paging_request_3;
+ STRUCT_ID_PAGING_RESPONSE paging_response;
+ STRUCT_ID_SI_1_STRUCT si_1;
+ STRUCT_ID_SI_2_STRUCT si_2;
+ STRUCT_ID_SI_2BIS_STRUCT si_2bis;
+ STRUCT_ID_SI_2TER_STRUCT si_2ter;
+ STRUCT_ID_SI_2QUATER_STRUCT si_2quater;
+ STRUCT_ID_SI_3_STRUCT si_3;
+ STRUCT_ID_SI_4_STRUCT si_4;
+ STRUCT_ID_SI_5_STRUCT si_5;
+ STRUCT_ID_SI_5BIS_STRUCT si_5bis;
+ STRUCT_ID_SI_5TER_STRUCT si_5ter;
+ STRUCT_ID_SI_6_STRUCT si_6;
+ STRUCT_ID_SI_7_STRUCT si_7;
+ STRUCT_ID_SI_8_STRUCT si_8;
+ STRUCT_ID_SI_16_STRUCT si_16;
+ STRUCT_ID_SI_17_STRUCT si_17;
+ STRUCT_ID_SI_18_STRUCT si_18;
+ STRUCT_ID_SI_19_STRUCT si_19;
+ STRUCT_ID_SI_20_STRUCT si_20;
+ STRUCT_ID_EXTENDED_MEASUREMENT_ORDER_STRUCT extended_measurement_order;
+ STRUCT_ID_EXTENDED_MEASUREMENT_REPORT_STRUCT extended_measurement_report;
+ STRUCT_ID_MEASUREMENT_REPORT_STRUCT measurement_report;
+ STRUCT_ID_MEASUREMENT_INFORMATION_STRUCT measurement_information_struct;
+ STRUCT_ID_ENHANCED_MEASUREMENT_REPORT_STRUCT enhanced_measurement_report_struct;
+ STRUCT_ID_CHANNEL_MODE_MODIFY_STRUCT channel_mode_modify;
+ STRUCT_ID_CHANNEL_MODE_MODIFY_ACK_STRUCT channel_mode_modify_ack_struct;
+ STRUCT_ID_RR_PEER_CLASSMARK_CHANGE_STRUCT classmark_change;
+ STRUCT_ID_RR_PEER_CLASSMARK_ENQUIRY_STRUCT classmark_enquiry;
+ STRUCT_ID_FREQUENCY_REDEFINITION_STRUCT frequency_redefinition;
+ STRUCT_ID_RR_STATUS_STRUCT rr_status;
+ STRUCT_ID_GPRS_SUSPENSION_REQUEST_STRUCT gprs_suspension_request;
+ STRUCT_ID_CONFIGURATION_CHANGE_COMMAND_STRUCT configuration_change_command;
+};
+
+ext_measurement_parameters_struct ext_measurement_parameters_struct_s_0_tag ext_measurement_parameters_struct_s_0_value:
+{
+ M_EM1_STRUCT m_em1_struct;
+};
+
+enh_measurement_parameters_struct enh_measurement_parameters_struct_s_1_tag enh_measurement_parameters_struct_s_1_value:
+{
+ ENH_MEASUREMENT_PARAMETERS_STRUCT_S_2 m_enh_measurement_parameters_struct_s_2;
+ PSI3_CHANGE_MARK psi3_change_mark;
+};
+
+measurement_information_struct s_9_tag s_9_value:
+{
+ S_10 m_s_10;
+};
+
+
+enhanced_measurement_report_struct enhanced_measurement_report_struct_s_5_tag
+enhanced_measurement_report_struct_s_5_value:
+{
+ ENHANCED_MEASUREMENT_REPORT_STRUCT_S_5_BIT m_enhanced_measurement_report_struct_s_5_bit;
+ ENHANCED_MEASUREMENT_REPORT_STRUCT_S_6 m_enhanced_measurement_report_struct_s_6;
+};
+
+cdma_2000_description_struct_mi_s_3 cdma_2000_description_struct_mi_s_3_tag cdma_2000_description_struct_mi_s_3_value:
+{
+ CDMA_2000_DESCRIPTION_STRUCT_MI_S_4 m_cdma_2000_description_struct_mi_s_4;
+ CDMA_2000_DESCRIPTION_STRUCT_MI_S_5 m_cdma_2000_description_struct_mi_s_5;
+ CDMA_2000_DESCRIPTION_STRUCT_MI_S_6 m_cdma_2000_description_struct_mi_s_6;
+ CDMA_2000_DESCRIPTION_STRUCT_MI_S_7 m_cdma_2000_description_struct_mi_s_7;
+ CDMA_2000_DESCRIPTION_STRUCT_MI_S_8 m_cdma_2000_description_struct_mi_s_8;
+};
+
diff --git a/mcu/service/dhl/database/unionTag/GAS_CS_PS_MCDDLL_unionTag.txt b/mcu/service/dhl/database/unionTag/GAS_CS_PS_MCDDLL_unionTag.txt
new file mode 100755
index 0000000..ff62582
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/GAS_CS_PS_MCDDLL_unionTag.txt
@@ -0,0 +1,1243 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+This file is used by cgen for union Tag information.
+Usage:
+
+structure_name tag_field_name union_name:
+{
+ tag_fileld_value field_of_union_name;
+ tag_fileld_value field_of_union_name;
+};
+
+For Example:
+
+InvokeChoice ChoiceId a:
+{
+ 1 localValue;
+ 2 globalValue;
+};
+
+*/
+
+/****************************** GAS CS PS MCDDLL UnionTag ********************************/
+
+unpack_msg msg_type rr_peer_msg:
+{
+
+ STRUCT_ID_RR_PEER_ADDITIONAL_ASSIGNMENT_STRUCT additional_assignment;
+ STRUCT_ID_IMMEDIATE_ASSIGN_MESSAGE immediate_assign_msg;
+ STRUCT_ID_IMMEDIATE_ASSIGN_EXT_MESSAGE immediate_assign_ext_msg;
+ STRUCT_ID_IMM_ASGN_REJ_MSG_STRUCT imm_asgn_rej_msg;
+ STRUCT_ID_CIPHER_MODE_COMMAND_STRUCT cipher_mode_command;
+ STRUCT_ID_CIPHER_MODE_COMPLETE_STRUCT cipher_mode_complete;
+ STRUCT_ID_ASSIGNMENT_COMMAND_STRUCT assignment_command;
+ STRUCT_ID_ASSIGNMENT_COMPLETE_STRUCT assignment_complete;
+ STRUCT_ID_ASSIGNMENT_FAILURE_STRUCT assignment_failure;
+ STRUCT_ID_PDCH_ASSIGNMENT_COMMAND_STRUCT pdch_assignment_command;
+ STRUCT_ID_HANDOVER_COMMAND_STRUCT handover_command;
+ STRUCT_ID_HANDOVER_COMPLETE_STRUCT handover_complete;
+ STRUCT_ID_HANDOVER_FAILURE_STRUCT handover_failure;
+ STRUCT_ID_RR_CELL_CHANGE_ORDER_STRUCT rr_cell_change_order;
+ STRUCT_ID_PHYSICAL_INFORMATION_STRUCT physical_information;
+ STRUCT_ID_CHANNEL_RELEASE_STRUCT channel_release;
+ STRUCT_ID_RR_PEER_PARTIAL_RELEASE_STRUCT partial_release;
+ STRUCT_ID_RR_PEER_PARTIAL_RELEASE_COMPLETE_STRUCT rr_peer_partial_release_complete;
+ STRUCT_ID_PAGING_REQUEST_TYPE1_STRUCT paging_request_1;
+ STRUCT_ID_PAGING_REQUEST_TYPE2_STRUCT paging_request_2;
+ STRUCT_ID_PAGING_REQUEST_TYPE3_STRUCT paging_request_3;
+ STRUCT_ID_PAGING_RESPONSE paging_response;
+ STRUCT_ID_SI_1_STRUCT si_1;
+ STRUCT_ID_SI_2_STRUCT si_2;
+ STRUCT_ID_SI_2BIS_STRUCT si_2bis;
+ STRUCT_ID_SI_2TER_STRUCT si_2ter;
+ STRUCT_ID_SI_2QUATER_STRUCT si_2quater;
+ STRUCT_ID_SI_3_STRUCT si_3;
+ STRUCT_ID_SI_4_STRUCT si_4;
+ STRUCT_ID_SI_5_STRUCT si_5;
+ STRUCT_ID_SI_5BIS_STRUCT si_5bis;
+ STRUCT_ID_SI_5TER_STRUCT si_5ter;
+ STRUCT_ID_SI_6_STRUCT si_6;
+ STRUCT_ID_SI_7_STRUCT si_7;
+ STRUCT_ID_SI_8_STRUCT si_8;
+ STRUCT_ID_SI_9_STRUCT si_9;
+ STRUCT_ID_SI_13_STRUCT si_13;
+ STRUCT_ID_SI_16_STRUCT si_16;
+ STRUCT_ID_SI_17_STRUCT si_17;
+ STRUCT_ID_SI_18_STRUCT si_18;
+ STRUCT_ID_SI_19_STRUCT si_19;
+ STRUCT_ID_SI_20_STRUCT si_20;
+ STRUCT_ID_EXTENDED_MEASUREMENT_ORDER_STRUCT extended_measurement_order;
+ STRUCT_ID_EXTENDED_MEASUREMENT_REPORT_STRUCT extended_measurement_report;
+ STRUCT_ID_MEASUREMENT_REPORT_STRUCT measurement_report;
+ STRUCT_ID_MEASUREMENT_INFORMATION_STRUCT measurement_information_struct;
+ STRUCT_ID_ENHANCED_MEASUREMENT_REPORT_STRUCT enhanced_measurement_report_struct;
+ STRUCT_ID_CHANNEL_MODE_MODIFY_STRUCT channel_mode_modify;
+ STRUCT_ID_CHANNEL_MODE_MODIFY_ACK_STRUCT channel_mode_modify_ack_struct;
+ STRUCT_ID_RR_PEER_CLASSMARK_CHANGE_STRUCT classmark_change;
+ STRUCT_ID_RR_PEER_CLASSMARK_ENQUIRY_STRUCT classmark_enquiry;
+ STRUCT_ID_FREQUENCY_REDEFINITION_STRUCT frequency_redefinition;
+ STRUCT_ID_RR_STATUS_STRUCT rr_status;
+ STRUCT_ID_GPRS_SUSPENSION_REQUEST_STRUCT gprs_suspension_request;
+ STRUCT_ID_CONFIGURATION_CHANGE_COMMAND_STRUCT configuration_change_command;
+ STRUCT_ID_PACKET_ACCESS_REJECT_MESSAGE_CONTENT paj;
+ STRUCT_ID_PACKET_QUEUEING_NOTIFICATION_MESSAGE_CONTENT pqn;
+ STRUCT_ID_PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT puas;
+ STRUCT_ID_PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT pdas;
+ STRUCT_ID_PACKET_TBF_RELEASE_MESSAGE_CONTENT pkt_tbf_release;
+ STRUCT_ID_PACKET_PAGING_REQUEST_MESSAGE_CONTENT pkt_paging;
+ STRUCT_ID_PACKET_UPLINK_ACK_NACK_MESSAGE_CONTENT puan;
+ STRUCT_ID_PSI1_MESSAGE_CONTENT psi1;
+ STRUCT_ID_PSI2_MESSAGE_CONTENT psi2;
+ STRUCT_ID_PSI3_MESSAGE_CONTENT psi3;
+ STRUCT_ID_PSI3_BIS_MESSAGE_CONTENT psi3bis;
+ STRUCT_ID_PSI4_MESSAGE_CONTENT psi4;
+ STRUCT_ID_PSI5_MESSAGE_CONTENT psi5;
+ STRUCT_ID_PSI13_MESSAGE_CONTENT psi13;
+ STRUCT_ID_PACKET_CELL_CHANGE_ORDER_MESSAGE_CONTENT pcco;
+ STRUCT_ID_PACKET_DOWNLINK_DUMMY_CONTROL_BLOCK_MESSAGE_CONTENT pkt_dl_dummy;
+ STRUCT_ID_PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT pmo;
+ STRUCT_ID_PACKET_PDCH_RELEASE_MESSAGE_CONTENT pdch_release;
+ STRUCT_ID_PACKET_POLLING_REQUEST_MESSAGE_CONTENT packet_polling;
+ STRUCT_ID_PACKET_POWER_CONTROL_TIMING_ADVANCE_MESSAGE_CONTENT pkt_pc_n_ta;
+ STRUCT_ID_PACKET_PRACH_PARAMETERS_MESSAGE_CONTENT pkt_prach_params;
+ STRUCT_ID_PACKET_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT pkt_timeslot_reconfig;
+ STRUCT_ID_PACKET_CELL_CHANGE_CONTINUE_MESSAGE_CONTENT pccc;
+ STRUCT_ID_PACKET_NEIGHBOUR_CELL_DATA_MESSAGE_CONTENT pncd;
+ STRUCT_ID_PACKET_SERVING_CELL_DATA_MESSAGE_CONTENT pscd;
+ STRUCT_ID_PSI3_TER_MESSAGE_CONTENT psi3ter;
+ STRUCT_ID_PSI3_QUATER_MESSAGE_CONTENT psi3quater;
+ STRUCT_ID_PSI6_MESSAGE_CONTENT psi6;
+ STRUCT_ID_PSI7_MESSAGE_CONTENT psi7;
+ STRUCT_ID_PSI8_MESSAGE_CONTENT psi8;
+ STRUCT_ID_PSI14_MESSAGE_CONTENT psi14;
+ STRUCT_ID_PSI15_MESSAGE_CONTENT psi15;
+ STRUCT_ID_PSI16_MESSAGE_CONTENT psi16;
+ STRUCT_ID_MULTIPLE_TBF_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT mtdas;
+ STRUCT_ID_MULTIPLE_TBF_UPLINK_ASSIGNMENT_MESSAGE_CONTENT mtuas;
+ STRUCT_ID_MULTIPLE_TBF_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT mttr;
+ STRUCT_ID_PS_HANDOVER_COMMAND_MESSAGE_CONTENT ps_ho_command;
+ STRUCT_ID_PACKET_CONTROL_ACKNOWLEDGEMENT_MESSAGE_CONTENT pca;
+ STRUCT_ID_PACKET_CELL_CHANGE_FAILURE_MESSAGE_CONTENT pkt_cell_change_failure;
+ STRUCT_ID_PACKET_CELL_CHANGE_NOTIFICATION_MESSAGE_CONTENT pccn;
+ STRUCT_ID_PACKET_DOWNLINK_ACK_NACK_MESSAGE_CONTENT pdan;
+ STRUCT_ID_EGPRS_PACKET_DOWNLINK_ACK_NACK_MESSAGE_CONTENT egprs_pdan;
+ STRUCT_ID_PACKET_UPLINK_DUMMY_CONTROL_BLOCK_MESSAGE_CONTENT pkt_ul_dummy;
+ STRUCT_ID_PACKET_MEASUREMENT_REPORT_MESSAGE_CONTENT pkt_meas_report;
+ STRUCT_ID_PACKET_MOBILE_TBF_STATUS_MESSAGE_CONTENT ptk_tbfstatus;
+ STRUCT_ID_PACKET_ENHANCED_MEASUREMENT_REPORT_MESSAGE_CONTENT pkt_enh_meas_report;
+ STRUCT_ID_PACKET_RESOURCE_REQUEST_MESSAGE_CONTENT prr;
+ STRUCT_ID_PACKET_PSI_STATUS_MESSAGE_CONTENT psistatus;
+ STRUCT_ID_PACKET_SI_STATUS_MESSAGE_CONTENT pkt_si_status;
+ STRUCT_ID_PACKET_PAUSE_MESSAGE_CONTENT pkt_pause;
+ STRUCT_ID_ADDITIONAL_MS_RADIO_ACCESS_CAPABILITIES_MESSAGE_CONTENT arac;
+};
+
+cdma_2000_description_struct_mi_s_3 cdma_2000_description_struct_mi_s_3_tag cdma_2000_description_struct_mi_s_3_value:
+{
+ CDMA_2000_DESCRIPTION_STRUCT_MI_S_4 m_cdma_2000_description_struct_mi_s_4;
+ CDMA_2000_DESCRIPTION_STRUCT_MI_S_5 m_cdma_2000_description_struct_mi_s_5;
+ CDMA_2000_DESCRIPTION_STRUCT_MI_S_6 m_cdma_2000_description_struct_mi_s_6;
+ CDMA_2000_DESCRIPTION_STRUCT_MI_S_7 m_cdma_2000_description_struct_mi_s_7;
+ CDMA_2000_DESCRIPTION_STRUCT_MI_S_8 m_cdma_2000_description_struct_mi_s_8;
+};
+global_tfi_ie global_tfi_ie_s_0_tag global_tfi_ie_s_0_value:
+{
+ UPLINK_TFI uplink_tfi;
+ DOWNLINK_TFI downlink_tfi;
+};
+gprs_mobile_allocation_ie gprs_mobile_allocation_ie_s_2_tag gprs_mobile_allocation_ie_s_2_value:
+{
+ GPRS_MOBILE_ALLOCATION_IE_S_3 m_gprs_mobile_allocation_ie_s_3;
+ GPRS_MOBILE_ALLOCATION_IE_S_4 m_gprs_mobile_allocation_ie_s_4;
+};
+lsa_id_information_struct_s_1 lsa_id_information_struct_s_2_tag lsa_id_information_struct_s_2_value:
+{
+ LSA_ID lsa_id;
+ SHORTLSA_ID shortlsa_id;
+};
+cdma2000_description_struct_s_3 cdma2000_description_struct_s_3_tag cdma2000_description_struct_s_3_value:
+{
+ CDMA2000_DESCRIPTION_STRUCT_S_4 m_cdma2000_description_struct_s_4;
+ CDMA2000_DESCRIPTION_STRUCT_S_5 m_cdma2000_description_struct_s_5;
+ CDMA2000_DESCRIPTION_STRUCT_S_6 m_cdma2000_description_struct_s_6;
+ CDMA2000_DESCRIPTION_STRUCT_S_7 m_cdma2000_description_struct_s_7;
+ CDMA2000_DESCRIPTION_STRUCT_S_8 m_cdma2000_description_struct_s_8;
+};
+container_repetition_struct exclusion_choice_tag exclusion_choice_value:
+{
+ CONTAINER_DATA m_container_data;
+ CONTAINER_DATA_1 m_container_data_1;
+};
+si13_pbcch_location_struct_1 si13_pbcch_location_struct_1_s_0_tag si13_pbcch_location_struct_1_s_0_value:
+{
+ SI13_LOCATION si13_location;
+ SI13_PBCCH_LOCATION_STRUCT_1_S_1 m_si13_pbcch_location_struct_1_s_1;
+};
+pbcch_description_struct pbcch_description_struct_s_1_tag pbcch_description_struct_s_1_value:
+{
+ ARFCN2 arfcn2;
+ MAIO maio;
+};
+channel_group_struct channel_group_struct_s_1_tag channel_group_struct_s_1_value:
+{
+ CHANNEL_GROUP_STRUCT_ARFCN channel_group_struct_arfcn;
+ CHANNEL_GROUP_STRUCT_S_2 m_channel_group_struct_s_2;
+};
+repeated_page_info_struct_1_s_1 repeated_page_info_struct_1_s_1_tag repeated_page_info_struct_1_s_1_value:
+{
+ PTMSI ptmsi;
+ REPEATED_PAGE_INFO_STRUCT_1_S_2 m_repeated_page_info_struct_1_s_2;
+};
+repeated_page_info_struct_1_s_3 repeated_page_info_struct_1_s_4_tag repeated_page_info_struct_1_s_4_value:
+{
+ TMSI tmsi;
+ REPEATED_PAGE_INFO_STRUCT_1_S_5 m_repeated_page_info_struct_1_s_5;
+};
+repeated_page_info_struct_1 repeated_page_info_struct_1_s_0_tag repeated_page_info_struct_1_s_0_value:
+{
+ REPEATED_PAGE_INFO_STRUCT_1_S_1 m_repeated_page_info_struct_1_s_1;
+ REPEATED_PAGE_INFO_STRUCT_1_S_3 m_repeated_page_info_struct_1_s_3;
+};
+reject_struct_1_s_2 reject_struct_1_s_2_tag reject_struct_1_s_2_value:
+{
+ PACKET_REQUEST_REFERENCE packet_request_reference;
+ GLOBAL_TFI global_tfi;
+};
+reject_struct_1 reject_struct_1_s_1_tag reject_struct_1_s_1_value:
+{
+ TLLI___G_RNTI tlli___g_rnti;
+ REJECT_STRUCT_1_S_2 m_reject_struct_1_s_2;
+};
+downlink_tbf_assignment_struct_for_mttr downlink_tbf_assignment_struct_for_mttr_s_1_tag downlink_tbf_assignment_struct_for_mttr_s_1_value:
+{
+ RB_ID rb_id;
+ DOWNLINK_TBF_ASSIGNMENT_STRUCT_FOR_MTTR_S_2 m_downlink_tbf_assignment_struct_for_mttr_s_2;
+};
+uplink_tbf_assignment_struct uplink_tbf_assignment_struct_s_6_tag uplink_tbf_assignment_struct_s_6_value:
+{
+ USF_ALLOCATION usf_allocation;
+ UPLINK_TBF_ASSIGNMENT_STRUCT_S_7 m_uplink_tbf_assignment_struct_s_7;
+};
+timeslot_description_struct timeslot_description_struct_s_0_tag timeslot_description_struct_s_0_value:
+{
+ MS_TIMESLOT_ALLOCATION ms_timeslot_allocation;
+ TIMESLOT_DESCRIPTION_STRUCT_S_1 m_timeslot_description_struct_s_1;
+};
+downlink_tbf_assignment_struct downlink_tbf_assignment_struct_s_1_tag downlink_tbf_assignment_struct_s_1_value:
+{
+ DOWNLINK_TBF_ASSIGNMENT_STRUCT_RB_ID rb_id;
+ DOWNLINK_TBF_ASSIGNMENT_STRUCT_S_2 m_downlink_tbf_assignment_struct_s_2;
+};
+dynamic_allocation_2_struct_s_9 dynamic_allocation_2_struct_s_11_tag dynamic_allocation_2_struct_s_11_value:
+{
+ DYNAMIC_ALLOCATION_2_STRUCT_S_12 m_dynamic_allocation_2_struct_s_12;
+ DYNAMIC_ALLOCATION_2_STRUCT_S_15 m_dynamic_allocation_2_struct_s_15;
+};
+dynamic_allocation_2_struct dynamic_allocation_2_struct_s_6_tag dynamic_allocation_2_struct_s_6_value:
+{
+ DYNAMIC_ALLOCATION_2_STRUCT_S_7 m_dynamic_allocation_2_struct_s_7;
+ DYNAMIC_ALLOCATION_2_STRUCT_S_9 m_dynamic_allocation_2_struct_s_9;
+};
+timeslot_description_2_struct timeslot_description_2_struct_s_0_tag timeslot_description_2_struct_s_0_value:
+{
+ TIMESLOT_DESCRIPTION_2_STRUCT_S_1 m_timeslot_description_2_struct_s_1;
+ TIMESLOT_DESCRIPTION_2_STRUCT_S_3 m_timeslot_description_2_struct_s_3;
+};
+dual_carrier_timeslot_description_struct dual_carrier_timeslot_description_struct_s_0_tag dual_carrier_timeslot_description_struct_s_0_value:
+{
+ DUAL_CARRIER_TIMESLOT_DESCRIPTION_STRUCT_S_1 m_dual_carrier_timeslot_description_struct_s_1;
+ DUAL_CARRIER_TIMESLOT_DESCRIPTION_STRUCT_S_3 m_dual_carrier_timeslot_description_struct_s_3;
+};
+uplink_tbf_assignment_2_struct uplink_tbf_assignment_2_struct_s_8_tag uplink_tbf_assignment_2_struct_s_8_value:
+{
+ UPLINK_TBF_ASSIGNMENT_2_STRUCT_S_9 m_uplink_tbf_assignment_2_struct_s_9;
+ UPLINK_TBF_ASSIGNMENT_2_STRUCT_S_11 m_uplink_tbf_assignment_2_struct_s_11;
+};
+pdch_pairs_description_ie_s_1 pdch_pairs_description_ie_s_1_tag pdch_pairs_description_ie_s_1_value:
+{
+ PDCH_PAIRS_DESCRIPTION_IE_S_2 m_pdch_pairs_description_ie_s_2;
+};
+pdch_pairs_description_ie_s_3 pdch_pairs_description_ie_s_3_tag pdch_pairs_description_ie_s_3_value:
+{
+ PDCH_PAIRS_DESCRIPTION_IE_S_4 m_pdch_pairs_description_ie_s_4;
+};
+pdch_pairs_description_ie pdch_pairs_description_ie_s_0_tag pdch_pairs_description_ie_s_0_value:
+{
+ PDCH_PAIRS_DESCRIPTION_IE_S_1 m_pdch_pairs_description_ie_s_1;
+ PDCH_PAIRS_DESCRIPTION_IE_S_3 m_pdch_pairs_description_ie_s_3;
+};
+pulse_format_ie pulse_format_ie_s_0_tag pulse_format_ie_s_0_value:
+{
+ PULSE_FORMAT_CODING_1 pulse_format_coding_1;
+ PULSE_FORMAT_CODING_2 pulse_format_coding_2;
+};
+uplink_tbf_assignment_2_struct_for_mttr uplink_tbf_assignment_2_struct_for_mttr_s_8_tag uplink_tbf_assignment_2_struct_for_mttr_s_8_value:
+{
+ UPLINK_TBF_ASSIGNMENT_2_STRUCT_FOR_MTTR_S_9 m_uplink_tbf_assignment_2_struct_for_mttr_s_9;
+ UPLINK_TBF_ASSIGNMENT_2_STRUCT_FOR_MTTR_S_11 m_uplink_tbf_assignment_2_struct_for_mttr_s_11;
+};
+uplink_tbf_assignment_2_struct_in_ps_ho_rr_2 uplink_tbf_assignment_2_struct_in_ps_ho_rr_2_s_9_tag uplink_tbf_assignment_2_struct_in_ps_ho_rr_2_s_9_value:
+{
+ UPLINK_TBF_ASSIGNMENT_2_STRUCT_IN_PS_HO_RR_2_S_10 m_uplink_tbf_assignment_2_struct_in_ps_ho_rr_2_s_10;
+ UPLINK_TBF_ASSIGNMENT_2_STRUCT_IN_PS_HO_RR_2_S_12 m_uplink_tbf_assignment_2_struct_in_ps_ho_rr_2_s_12;
+};
+bep_measurement_report_struct_s_2 bep_measurement_report_struct_s_2_tag bep_measurement_report_struct_s_2_value:
+{
+ GMSK_MEAN_BEP__TN0 gmsk_mean_bep__tn0;
+ P_8_PSK_MEAN_BEP__TN0 p_8_psk_mean_bep__tn0;
+};
+bep_measurement_report_struct_s_4 bep_measurement_report_struct_s_4_tag bep_measurement_report_struct_s_4_value:
+{
+ GMSK_MEAN_BEP__TN1 gmsk_mean_bep__tn1;
+ P_8_PSK_MEAN_BEP__TN1 p_8_psk_mean_bep__tn1;
+};
+bep_measurement_report_struct_s_6 bep_measurement_report_struct_s_6_tag bep_measurement_report_struct_s_6_value:
+{
+ GMSK_MEAN_BEP__TN2 gmsk_mean_bep__tn2;
+ P_8_PSK_MEAN_BEP__TN2 p_8_psk_mean_bep__tn2;
+};
+bep_measurement_report_struct_s_8 bep_measurement_report_struct_s_8_tag bep_measurement_report_struct_s_8_value:
+{
+ GMSK_MEAN_BEP__TN3 gmsk_mean_bep__tn3;
+ P_8_PSK_MEAN_BEP__TN3 p_8_psk_mean_bep__tn3;
+};
+bep_measurement_report_struct_s_10 bep_measurement_report_struct_s_10_tag bep_measurement_report_struct_s_10_value:
+{
+ GMSK_MEAN_BEP__TN4 gmsk_mean_bep__tn4;
+ P_8_PSK_MEAN_BEP__TN4 p_8_psk_mean_bep__tn4;
+};
+bep_measurement_report_struct_s_12 bep_measurement_report_struct_s_12_tag bep_measurement_report_struct_s_12_value:
+{
+ GMSK_MEAN_BEP__TN5 gmsk_mean_bep__tn5;
+ P_8_PSK_MEAN_BEP__TN5 p_8_psk_mean_bep__tn5;
+};
+bep_measurement_report_struct_s_14 bep_measurement_report_struct_s_14_tag bep_measurement_report_struct_s_14_value:
+{
+ GMSK_MEAN_BEP__TN6 gmsk_mean_bep__tn6;
+ P_8_PSK_MEAN_BEP__TN6 p_8_psk_mean_bep__tn6;
+};
+bep_measurement_report_struct_s_16 bep_measurement_report_struct_s_16_tag bep_measurement_report_struct_s_16_value:
+{
+ GMSK_MEAN_BEP__TN7 gmsk_mean_bep__tn7;
+ P_8_PSK_MEAN_BEP__TN7 p_8_psk_mean_bep__tn7;
+};
+si_message_list_struct_s_1 si_message_list_struct_s_2_tag si_message_list_struct_s_2_value:
+{
+ SI_MESSAGE_LIST_STRUCT_S_3 m_si_message_list_struct_s_3;
+ SIX_CHANGE_MARK six_change_mark;
+};
+enhanced_measurement_report_struct_s_6 enhanced_measurement_report_struct_s_9_tag enhanced_measurement_report_struct_s_9_value:
+{
+ ENHANCED_MEASUREMENT_REPORT_STRUCT_S_9_BIT m_enhanced_measurement_report_struct_s_9_bit;
+ ENHANCED_MEASUREMENT_REPORT_STRUCT_S_10 m_enhanced_measurement_report_struct_s_10;
+};
+enhanced_measurement_report_struct enhanced_measurement_report_struct_s_5_tag enhanced_measurement_report_struct_s_5_value:
+{
+ ENHANCED_MEASUREMENT_REPORT_STRUCT_S_5_BIT m_enhanced_measurement_report_struct_s_5_bit;
+ ENHANCED_MEASUREMENT_REPORT_STRUCT_S_6 m_enhanced_measurement_report_struct_s_6;
+};
+gas_meas_content_struct_s_2 gas_meas_content_struct_s_4_tag gas_meas_content_struct_s_4_value:
+{
+ UTRAN_CSG_MEASUREMENT_REPORT utran_csg_measurement_report;
+};
+gas_meas_content_struct gas_meas_content_struct_s_1_tag gas_meas_content_struct_s_1_value:
+{
+ GAS_MEAS_CONTENT_STRUCT_S_2 m_gas_meas_content_struct_s_2;
+};
+fixed_allocation_struct_s_2 fixed_allocation_struct_s_6_tag fixed_allocation_struct_s_6_value:
+{
+ FIXED_ALLOCATION_STRUCT_S_7 m_fixed_allocation_struct_s_7;
+ ALLOCATION_BITMAP m_allocation_bitmap;
+};
+fixed_allocation_struct fixed_allocation_struct_s_1_tag fixed_allocation_struct_s_1_value:
+{
+ TS_OVERRIDE ts_override;
+ FIXED_ALLOCATION_STRUCT_S_2 m_fixed_allocation_struct_s_2;
+};
+egprs_ack_nack_description_ie egprs_ack_nack_description_ie_s_0_tag egprs_ack_nack_description_ie_s_0_value:
+{
+ M_EGPRS_ACK_NACK_DESCRIPTION_STRUCT m_egprs_ack_nack_description_struct;
+ EGPRS_ACK_NACK_DESCRIPTION_IE_S_1 m_egprs_ack_nack_description_ie_s_1;
+};
+ccch_access_information_struct_s_4 ccch_access_information_struct_s_5_tag ccch_access_information_struct_s_5_value:
+{
+ CCCH_ACCESS_INFORMATION_STRUCT_S_5_BIT m_ccch_access_information_struct_s_5_bit;
+ CCCH_ACCESS_INFORMATION_STRUCT_S_6 m_ccch_access_information_struct_s_6;
+};
+ccch_access_information_struct ccch_access_information_struct_s_3_tag ccch_access_information_struct_s_3_value:
+{
+ CCCH_ACCESS_INFORMATION_STRUCT_S_3_BIT m_ccch_access_information_struct_s_3_bit;
+ CCCH_ACCESS_INFORMATION_STRUCT_S_4 m_ccch_access_information_struct_s_4;
+};
+ncp2_repeat_struct_s_1 ncp2_repeat_struct_s_2_tag ncp2_repeat_struct_s_2_value:
+{
+ NCP2_REPEAT_STRUCT_S_3 m_ncp2_repeat_struct_s_3;
+};
+compact_ncp2_repeat_struct_s_1 compact_ncp2_repeat_struct_s_2_tag compact_ncp2_repeat_struct_s_2_value:
+{
+ COMPACT_NCP2_REPEAT_STRUCT_S_3 m_compact_ncp2_repeat_struct_s_3;
+};
+repeated_iu_page_info_struct_s_1 repeated_iu_page_info_struct_s_2_tag repeated_iu_page_info_struct_s_2_value:
+{
+ REPEATED_IU_PAGE_INFO_STRUCT_TMSI tmsi;
+ REPEATED_IU_PAGE_INFO_STRUCT_PTMSI ptmsi;
+ REPEATED_IU_PAGE_INFO_STRUCT_S_3 m_repeated_iu_page_info_struct_s_3;
+};
+repeated_iu_page_info_struct repeated_iu_page_info_struct_s_0_tag repeated_iu_page_info_struct_s_0_value:
+{
+ G_RNTI g_rnti;
+ REPEATED_IU_PAGE_INFO_STRUCT_S_1 m_repeated_iu_page_info_struct_s_1;
+};
+dynamic_allocation_struct dynamic_allocation_struct_s_6_tag dynamic_allocation_struct_s_6_value:
+{
+ TIMESLOT_ALLOCATION timeslot_allocation;
+ TIMESLOT_ALLOCATION_WITH_POWER_CONTROL timeslot_allocation_with_power_control;
+};
+dynamic_allocation_in_ptr_struct dynamic_allocation_in_ptr_struct_s_5_tag dynamic_allocation_in_ptr_struct_s_5_value:
+{
+ DYNAMIC_ALLOCATION_IN_PTR_STRUCT_TIMESLOT_ALLOCATION timeslot_allocation;
+ DYNAMIC_ALLOCATION_IN_PTR_STRUCT_TIMESLOT_ALLOCATION_WITH_POWER_CONTROL timeslot_allocation_with_power_control;
+};
+dual_carrier_frequency_parameters_ie dual_carrier_frequency_parameters_ie_s_1_tag dual_carrier_frequency_parameters_ie_s_1_value:
+{
+ DUAL_CARRIER_FREQUENCY_PARAMETERS_IE_S_2 m_dual_carrier_frequency_parameters_ie_s_2;
+ INDIRECT_ENCODING indirect_encoding;
+ DIRECT_ENCODING_1 direct_encoding_1;
+ DIRECT_ENCODING_2 direct_encoding_2;
+};
+pdch_pairs_description_ie_for_mttr_s_1 pdch_pairs_description_ie_for_mttr_s_2_tag pdch_pairs_description_ie_for_mttr_s_2_value:
+{
+ PDCH_PAIRS_DESCRIPTION_IE_FOR_MTTR_S_3 m_pdch_pairs_description_ie_for_mttr_s_3;
+};
+pdch_pairs_description_ie_for_mttr_s_5 pdch_pairs_description_ie_for_mttr_s_6_tag pdch_pairs_description_ie_for_mttr_s_6_value:
+{
+ PDCH_PAIRS_DESCRIPTION_IE_FOR_MTTR_S_7 m_pdch_pairs_description_ie_for_mttr_s_7;
+};
+pdch_pairs_description_ie_for_mttr pdch_pairs_description_ie_for_mttr_s_0_tag pdch_pairs_description_ie_for_mttr_s_0_value:
+{
+ PDCH_PAIRS_DESCRIPTION_IE_FOR_MTTR_S_1 m_pdch_pairs_description_ie_for_mttr_s_1;
+ PDCH_PAIRS_DESCRIPTION_IE_FOR_MTTR_S_5 m_pdch_pairs_description_ie_for_mttr_s_5;
+};
+packet_control_acknowledgement_message_content_s_2 packet_control_acknowledgement_message_content_s_5_tag packet_control_acknowledgement_message_content_s_5_value:
+{
+ PACKET_CONTROL_ACKNOWLEDGEMENT_MESSAGE_CONTENT_S_5_BIT m_packet_control_acknowledgement_message_content_s_5_bit;
+ PACKET_CONTROL_ACKNOWLEDGEMENT_MESSAGE_CONTENT_S_6 m_packet_control_acknowledgement_message_content_s_6;
+};
+packet_control_acknowledgement_message_content packet_control_acknowledgement_message_content_s_1_tag packet_control_acknowledgement_message_content_s_1_value:
+{
+ PACKET_CONTROL_ACKNOWLEDGEMENT_MESSAGE_CONTENT_S_1_BIT m_packet_control_acknowledgement_message_content_s_1_bit;
+ PACKET_CONTROL_ACKNOWLEDGEMENT_MESSAGE_CONTENT_S_2 m_packet_control_acknowledgement_message_content_s_2;
+};
+packet_control_acknowledgement_11_bit_message packet_control_acknowledgement_11_bit_message_s_1_tag packet_control_acknowledgement_11_bit_message_s_1_value:
+{
+ PACKET_CONTROL_ACKNOWLEDGEMENT_11_BIT_MESSAGE_S_2 m_packet_control_acknowledgement_11_bit_message_s_2;
+};
+packet_control_acknowledgement_8_bit_message packet_control_acknowledgement_8_bit_message_s_1_tag packet_control_acknowledgement_8_bit_message_s_1_value:
+{
+ TN_RRBP tn_rrbp;
+};
+packet_cell_change_failure_message_content_s_9 packet_cell_change_failure_message_content_s_11_tag packet_cell_change_failure_message_content_s_11_value:
+{
+ PACKET_CELL_CHANGE_FAILURE_MESSAGE_CONTENT_S_11_BIT m_packet_cell_change_failure_message_content_s_11_bit;
+ PACKET_CELL_CHANGE_FAILURE_MESSAGE_CONTENT_S_12 m_packet_cell_change_failure_message_content_s_12;
+};
+packet_cell_change_failure_message_content_s_6 packet_cell_change_failure_message_content_s_8_tag packet_cell_change_failure_message_content_s_8_value:
+{
+ PACKET_CELL_CHANGE_FAILURE_MESSAGE_CONTENT_S_8_BIT m_packet_cell_change_failure_message_content_s_8_bit;
+ PACKET_CELL_CHANGE_FAILURE_MESSAGE_CONTENT_S_9 m_packet_cell_change_failure_message_content_s_9;
+};
+packet_cell_change_failure_message_content_s_2 packet_cell_change_failure_message_content_s_5_tag packet_cell_change_failure_message_content_s_5_value:
+{
+ PACKET_CELL_CHANGE_FAILURE_MESSAGE_CONTENT_S_5_BIT m_packet_cell_change_failure_message_content_s_5_bit;
+ PACKET_CELL_CHANGE_FAILURE_MESSAGE_CONTENT_S_6 m_packet_cell_change_failure_message_content_s_6;
+};
+packet_cell_change_failure_message_content packet_cell_change_failure_message_content_s_1_tag packet_cell_change_failure_message_content_s_1_value:
+{
+ PACKET_CELL_CHANGE_FAILURE_MESSAGE_CONTENT_S_1_BIT m_packet_cell_change_failure_message_content_s_1_bit;
+ PACKET_CELL_CHANGE_FAILURE_MESSAGE_CONTENT_S_2 m_packet_cell_change_failure_message_content_s_2;
+};
+packet_cell_change_notification_message_content_s_9 packet_cell_change_notification_message_content_s_10_tag packet_cell_change_notification_message_content_s_10_value:
+{
+ UTRAN_CSG_TARGET_CELL_MEASUREMENT_REPORT utran_csg_target_cell_measurement_report;
+ E_UTRAN_CSG_TARGET_CELL_MEASUREMENT_REPORT e_utran_csg_target_cell_measurement_report;
+};
+packet_cell_change_notification_message_content_s_14 packet_cell_change_notification_message_content_s_16_tag packet_cell_change_notification_message_content_s_16_value:
+{
+ PACKET_CELL_CHANGE_NOTIFICATION_MESSAGE_CONTENT_S_16_BIT m_packet_cell_change_notification_message_content_s_16_bit;
+ PACKET_CELL_CHANGE_NOTIFICATION_MESSAGE_CONTENT_S_17 m_packet_cell_change_notification_message_content_s_17;
+};
+packet_cell_change_notification_message_content packet_cell_change_notification_message_content_s_1_tag packet_cell_change_notification_message_content_s_1_value:
+{
+ PACKET_CELL_CHANGE_NOTIFICATION_MESSAGE_CONTENT_S_2 m_packet_cell_change_notification_message_content_s_2;
+ P_3_G_TARGET_CELL p_3_g_target_cell;
+ PACKET_CELL_CHANGE_NOTIFICATION_MESSAGE_CONTENT_S_3 m_packet_cell_change_notification_message_content_s_3;
+ PACKET_CELL_CHANGE_NOTIFICATION_MESSAGE_CONTENT_S_9 m_packet_cell_change_notification_message_content_s_9;
+};
+packet_cell_change_notification_message_content packet_cell_change_notification_message_content_s_12_tag packet_cell_change_notification_message_content_s_12_value:
+{
+ BA_USED ba_used;
+ PSI3_CHANGE_MARK psi3_change_mark;
+};
+packet_cell_change_notification_message_content packet_cell_change_notification_message_content_s_13_tag packet_cell_change_notification_message_content_s_13_value:
+{
+ PACKET_CELL_CHANGE_NOTIFICATION_MESSAGE_CONTENT_S_13_BIT m_packet_cell_change_notification_message_content_s_13_bit;
+ PACKET_CELL_CHANGE_NOTIFICATION_MESSAGE_CONTENT_S_14 m_packet_cell_change_notification_message_content_s_14;
+};
+packet_downlink_ack_nack_message_content_s_6 packet_downlink_ack_nack_message_content_s_10_tag packet_downlink_ack_nack_message_content_s_10_value:
+{
+ PACKET_DOWNLINK_ACK_NACK_MESSAGE_CONTENT_S_10_BIT m_packet_downlink_ack_nack_message_content_s_10_bit;
+ PACKET_DOWNLINK_ACK_NACK_MESSAGE_CONTENT_S_11 m_packet_downlink_ack_nack_message_content_s_11;
+};
+packet_downlink_ack_nack_message_content_s_3 packet_downlink_ack_nack_message_content_s_5_tag packet_downlink_ack_nack_message_content_s_5_value:
+{
+ PACKET_DOWNLINK_ACK_NACK_MESSAGE_CONTENT_S_5_BIT m_packet_downlink_ack_nack_message_content_s_5_bit;
+ PACKET_DOWNLINK_ACK_NACK_MESSAGE_CONTENT_S_6 m_packet_downlink_ack_nack_message_content_s_6;
+};
+packet_downlink_ack_nack_message_content packet_downlink_ack_nack_message_content_s_2_tag packet_downlink_ack_nack_message_content_s_2_value:
+{
+ PACKET_DOWNLINK_ACK_NACK_MESSAGE_CONTENT_S_2_BIT m_packet_downlink_ack_nack_message_content_s_2_bit;
+ PACKET_DOWNLINK_ACK_NACK_MESSAGE_CONTENT_S_3 m_packet_downlink_ack_nack_message_content_s_3;
+};
+packet_uplink_dummy_control_block_message_content packet_uplink_dummy_control_block_message_content_s_1_tag packet_uplink_dummy_control_block_message_content_s_1_value:
+{
+ PACKET_UPLINK_DUMMY_CONTROL_BLOCK_MESSAGE_CONTENT_S_1_BIT m_packet_uplink_dummy_control_block_message_content_s_1_bit;
+ PACKET_UPLINK_DUMMY_CONTROL_BLOCK_MESSAGE_CONTENT_S_2 m_packet_uplink_dummy_control_block_message_content_s_2;
+};
+packet_measurement_report_message_content_s_6 packet_measurement_report_message_content_s_7_tag packet_measurement_report_message_content_s_7_value:
+{
+ PACKET_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_8 m_packet_measurement_report_message_content_s_8;
+ PACKET_MEASUREMENT_REPORT_MESSAGE_CONTENT_PSI3_CHANGE_MARK psi3_change_mark;
+};
+packet_measurement_report_message_content_s_14 packet_measurement_report_message_content_s_16_tag packet_measurement_report_message_content_s_16_value:
+{
+ PACKET_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_16_BIT m_packet_measurement_report_message_content_s_16_bit;
+ PACKET_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_17 m_packet_measurement_report_message_content_s_17;
+};
+packet_measurement_report_message_content_s_11 packet_measurement_report_message_content_s_13_tag packet_measurement_report_message_content_s_13_value:
+{
+ PACKET_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_13_BIT m_packet_measurement_report_message_content_s_13_bit;
+ PACKET_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_14 m_packet_measurement_report_message_content_s_14;
+};
+packet_measurement_report_message_content_s_4 packet_measurement_report_message_content_s_10_tag packet_measurement_report_message_content_s_10_value:
+{
+ PACKET_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_10_BIT m_packet_measurement_report_message_content_s_10_bit;
+ PACKET_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_11 m_packet_measurement_report_message_content_s_11;
+};
+packet_measurement_report_message_content packet_measurement_report_message_content_s_2_tag packet_measurement_report_message_content_s_2_value:
+{
+ NC_MEASUREMENT_REPORT nc_measurement_report;
+ EXT_MEASUREMENT_REPORT ext_measurement_report;
+};
+packet_measurement_report_message_content packet_measurement_report_message_content_s_3_tag packet_measurement_report_message_content_s_3_value:
+{
+ PACKET_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_3_BIT m_packet_measurement_report_message_content_s_3_bit;
+ PACKET_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_4 m_packet_measurement_report_message_content_s_4;
+};
+packet_psi_status_message_content packet_psi_status_message_content_s_1_tag packet_psi_status_message_content_s_1_value:
+{
+ PACKET_PSI_STATUS_MESSAGE_CONTENT_S_1_BIT m_packet_psi_status_message_content_s_1_bit;
+ PACKET_PSI_STATUS_MESSAGE_CONTENT_S_2 m_packet_psi_status_message_content_s_2;
+};
+packet_si_status_message_content packet_si_status_message_content_s_1_tag packet_si_status_message_content_s_1_value:
+{
+ PACKET_SI_STATUS_MESSAGE_CONTENT_S_1_BIT m_packet_si_status_message_content_s_1_bit;
+ PACKET_SI_STATUS_MESSAGE_CONTENT_S_2 m_packet_si_status_message_content_s_2;
+};
+additional_ms_radio_access_capabilities_message_content additional_ms_radio_access_capabilities_message_content_s_1_tag additional_ms_radio_access_capabilities_message_content_s_1_value:
+{
+ ADDITIONAL_MS_RADIO_ACCESS_CAPABILITIES_MESSAGE_CONTENT_GLOBAL_TFI global_tfi;
+ TLLI tlli;
+};
+nc_measurement_report_struct_en nc_measurement_report_struct_en_s_1_tag nc_measurement_report_struct_en_s_1_value:
+{
+ NC_MEASUREMENT_REPORT_STRUCT_EN_S_2 m_nc_measurement_report_struct_en_s_2;
+ NC_MEASUREMENT_REPORT_STRUCT_EN_PSI3_CHANGE_MARK psi3_change_mark;
+};
+frequency_parameters_ie frequency_parameters_ie_s_1_tag frequency_parameters_ie_s_1_value:
+{
+ ARFCN1 arfcn1;
+ FREQUENCY_PARAMETERS_IE_INDIRECT_ENCODING indirect_encoding;
+ FREQUENCY_PARAMETERS_IE_DIRECT_ENCODING_1 direct_encoding_1;
+ FREQUENCY_PARAMETERS_IE_DIRECT_ENCODING_2 direct_encoding_2;
+};
+fixed_allocation_struct_2 fixed_allocation_struct_2_s_1_tag fixed_allocation_struct_2_s_1_value:
+{
+ UPLINK_TIMESLOT_ALLOCATION uplink_timeslot_allocation;
+ POWER_CONTROL_PARAMETERS power_control_parameters;
+};
+fixed_allocation_struct_2 fixed_allocation_struct_2_s_7_tag fixed_allocation_struct_2_s_7_value:
+{
+ FIXED_ALLOCATION_STRUCT_2_S_8 m_fixed_allocation_struct_2_s_8;
+ ALLOCATION_BITMAP_1 m_allocation_bitmap_1;
+};
+pbcch_description_struct_2 pbcch_description_struct_2_s_1_tag pbcch_description_struct_2_s_1_value:
+{
+ PBCCH_DESCRIPTION_STRUCT_2_S_1_BIT m_pbcch_description_struct_2_s_1_bit;
+ PSI_CHANGED_IND psi_changed_ind;
+};
+pccch_description_struct_1 pccch_description_struct_1_s_1_tag pccch_description_struct_1_s_1_value:
+{
+ NON_HOPPING_PCCCH_CARRIERS non_hopping_pccch_carriers;
+ PCCCH_DESCRIPTION_STRUCT_1_S_2 m_pccch_description_struct_1_s_2;
+};
+em1_struct_s_2 em1_struct_s_2_tag em1_struct_s_2_value:
+{
+ NCC_PERMITTED ncc_permitted;
+ EM1_STRUCT_S_3 m_em1_struct_s_3;
+};
+ps_handover_radio_resources_ie ps_handover_radio_resources_ie_s_11_tag ps_handover_radio_resources_ie_s_11_value:
+{
+ GPRS_MODE gprs_mode;
+ EGPRS_MODE egprs_mode;
+};
+egprs_mode_struct_in_ps_ho_rr_2_s_19 egprs_mode_struct_in_ps_ho_rr_2_s_20_tag egprs_mode_struct_in_ps_ho_rr_2_s_20_value:
+{
+ EGPRS_MODE_STRUCT_IN_PS_HO_RR_2_S_21 m_egprs_mode_struct_in_ps_ho_rr_2_s_21;
+};
+egprs_mode_struct_in_ps_ho_rr_2_s_23 egprs_mode_struct_in_ps_ho_rr_2_s_24_tag egprs_mode_struct_in_ps_ho_rr_2_s_24_value:
+{
+ EGPRS_MODE_STRUCT_IN_PS_HO_RR_2_S_25 m_egprs_mode_struct_in_ps_ho_rr_2_s_25;
+};
+egprs_mode_struct_in_ps_ho_rr_2_s_18 egprs_mode_struct_in_ps_ho_rr_2_s_18_tag egprs_mode_struct_in_ps_ho_rr_2_s_18_value:
+{
+ EGPRS_MODE_STRUCT_IN_PS_HO_RR_2_S_19 m_egprs_mode_struct_in_ps_ho_rr_2_s_19;
+ EGPRS_MODE_STRUCT_IN_PS_HO_RR_2_S_23 m_egprs_mode_struct_in_ps_ho_rr_2_s_23;
+};
+packet_enhanced_measurement_report_message_content_s_6 packet_enhanced_measurement_report_message_content_s_9_tag packet_enhanced_measurement_report_message_content_s_9_value:
+{
+ PACKET_ENHANCED_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_9_BIT m_packet_enhanced_measurement_report_message_content_s_9_bit;
+ PACKET_ENHANCED_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_10 m_packet_enhanced_measurement_report_message_content_s_10;
+};
+packet_enhanced_measurement_report_message_content_s_3 packet_enhanced_measurement_report_message_content_s_5_tag packet_enhanced_measurement_report_message_content_s_5_value:
+{
+ PACKET_ENHANCED_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_5_BIT m_packet_enhanced_measurement_report_message_content_s_5_bit;
+ PACKET_ENHANCED_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_6 m_packet_enhanced_measurement_report_message_content_s_6;
+};
+packet_enhanced_measurement_report_message_content packet_enhanced_measurement_report_message_content_s_2_tag packet_enhanced_measurement_report_message_content_s_2_value:
+{
+ PACKET_ENHANCED_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_2_BIT m_packet_enhanced_measurement_report_message_content_s_2_bit;
+ PACKET_ENHANCED_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_3 m_packet_enhanced_measurement_report_message_content_s_3;
+};
+packet_resource_request_message_content_s_20 packet_resource_request_message_content_s_25_tag packet_resource_request_message_content_s_25_value:
+{
+ PACKET_RESOURCE_REQUEST_MESSAGE_CONTENT_S_25_BIT m_packet_resource_request_message_content_s_25_bit;
+ PACKET_RESOURCE_REQUEST_MESSAGE_CONTENT_S_26 m_packet_resource_request_message_content_s_26;
+};
+packet_resource_request_message_content_s_15 packet_resource_request_message_content_s_19_tag packet_resource_request_message_content_s_19_value:
+{
+ PACKET_RESOURCE_REQUEST_MESSAGE_CONTENT_S_19_BIT m_packet_resource_request_message_content_s_19_bit;
+ PACKET_RESOURCE_REQUEST_MESSAGE_CONTENT_S_20 m_packet_resource_request_message_content_s_20;
+};
+packet_resource_request_message_content packet_resource_request_message_content_s_2_tag packet_resource_request_message_content_s_2_value:
+{
+ PACKET_RESOURCE_REQUEST_MESSAGE_CONTENT_GLOBAL_TFI global_tfi;
+ PACKET_RESOURCE_REQUEST_MESSAGE_CONTENT_TLLI___G_RNTI tlli___g_rnti;
+};
+packet_resource_request_message_content packet_resource_request_message_content_s_14_tag packet_resource_request_message_content_s_14_value:
+{
+ PACKET_RESOURCE_REQUEST_MESSAGE_CONTENT_S_14_BIT m_packet_resource_request_message_content_s_14_bit;
+ PACKET_RESOURCE_REQUEST_MESSAGE_CONTENT_S_15 m_packet_resource_request_message_content_s_15;
+};
+header_struct1 pay_load_tag pay_load_value:
+{
+ DATA_BLK_HDR data_blk_hdr;
+ CTRL_BLK_HDR1 ctrl_blk_hdr1;
+ CTRL_BLK_HDR2 ctrl_blk_hdr2;
+};
+packet_timeslot_reconfigure_message_content_s_14 packet_timeslot_reconfigure_message_content_s_18_tag packet_timeslot_reconfigure_message_content_s_18_value:
+{
+ PACKET_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_S_18_BIT m_packet_timeslot_reconfigure_message_content_s_18_bit;
+ PACKET_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_S_19 m_packet_timeslot_reconfigure_message_content_s_19;
+};
+packet_timeslot_reconfigure_message_content_s_11 packet_timeslot_reconfigure_message_content_s_13_tag packet_timeslot_reconfigure_message_content_s_13_value:
+{
+ PACKET_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_S_13_BIT m_packet_timeslot_reconfigure_message_content_s_13_bit;
+ PACKET_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_S_14 m_packet_timeslot_reconfigure_message_content_s_14;
+};
+packet_timeslot_reconfigure_message_content_s_5 packet_timeslot_reconfigure_message_content_s_9_tag packet_timeslot_reconfigure_message_content_s_9_value:
+{
+ DYNAMIC_ALLOCATION dynamic_allocation;
+ FIXED_ALLOCATION fixed_allocation;
+};
+packet_timeslot_reconfigure_message_content_s_5 packet_timeslot_reconfigure_message_content_s_10_tag packet_timeslot_reconfigure_message_content_s_10_value:
+{
+ PACKET_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_S_10_BIT m_packet_timeslot_reconfigure_message_content_s_10_bit;
+ PACKET_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_S_11 m_packet_timeslot_reconfigure_message_content_s_11;
+};
+s_40 s_44_tag s_44_value:
+{
+ S_44_BIT m_s_44_bit;
+ S_45 m_s_45;
+};
+s_35 s_39_tag s_39_value:
+{
+ S_39_BIT m_s_39_bit;
+ S_40 m_s_40;
+};
+s_25 s_33_tag s_33_value:
+{
+ PACKET_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_DYNAMIC_ALLOCATION dynamic_allocation;
+ PACKET_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_FIXED_ALLOCATION fixed_allocation;
+};
+s_25 s_34_tag s_34_value:
+{
+ S_34_BIT m_s_34_bit;
+ S_35 m_s_35;
+};
+s_60 s_61_tag s_61_value:
+{
+ S_62 m_s_62;
+};
+s_63 s_64_tag s_64_value:
+{
+ S_65 m_s_65;
+};
+s_58 s_59_tag s_59_value:
+{
+ S_60 m_s_60;
+ S_63 m_s_63;
+};
+s_49 s_55_tag s_55_value:
+{
+ S_56 m_s_56;
+ S_58 m_s_58;
+};
+s_49 s_66_tag s_66_value:
+{
+ S_67 m_s_67;
+ DUAL_CARRIER_FREQUENCY_PARAMETERS dual_carrier_frequency_parameters;
+};
+s_23 s_23_tag s_23_value:
+{
+ S_24 m_s_25;
+ S_48 m_s_49;
+};
+packet_timeslot_reconfigure_message_content packet_timeslot_reconfigure_message_content_s_3_tag packet_timeslot_reconfigure_message_content_s_3_value:
+{
+ PACKET_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_S_4 m_packet_timeslot_reconfigure_message_content_s_5;
+ S_23 m_s_23;
+};
+packet_uplink_ack_nack_message_content_s_12 packet_uplink_ack_nack_message_content_s_14_tag packet_uplink_ack_nack_message_content_s_14_value:
+{
+ PACKET_UPLINK_ACK_NACK_MESSAGE_CONTENT_S_14_BIT m_packet_uplink_ack_nack_message_content_s_14_bit;
+ PACKET_UPLINK_ACK_NACK_MESSAGE_CONTENT_S_15 m_packet_uplink_ack_nack_message_content_s_15;
+};
+packet_uplink_ack_nack_message_content_s_5 packet_uplink_ack_nack_message_content_s_11_tag packet_uplink_ack_nack_message_content_s_11_value:
+{
+ PACKET_UPLINK_ACK_NACK_MESSAGE_CONTENT_S_11_BIT m_packet_uplink_ack_nack_message_content_s_11_bit;
+ PACKET_UPLINK_ACK_NACK_MESSAGE_CONTENT_S_12 m_packet_uplink_ack_nack_message_content_s_12;
+};
+packet_uplink_ack_nack_message_content_s_21 packet_uplink_ack_nack_message_content_s_29_tag packet_uplink_ack_nack_message_content_s_29_value:
+{
+ PACKET_UPLINK_ACK_NACK_MESSAGE_CONTENT_S_29_BIT m_packet_uplink_ack_nack_message_content_s_29_bit;
+ PACKET_UPLINK_ACK_NACK_MESSAGE_CONTENT_S_30 m_packet_uplink_ack_nack_message_content_s_30;
+};
+packet_uplink_ack_nack_message_content packet_uplink_ack_nack_message_content_s_3_tag packet_uplink_ack_nack_message_content_s_3_value:
+{
+ PACKET_UPLINK_ACK_NACK_MESSAGE_CONTENT_S_4 m_packet_uplink_ack_nack_message_content_s_5;
+ PACKET_UPLINK_ACK_NACK_MESSAGE_CONTENT_S_18 m_packet_uplink_ack_nack_message_content_s_21;
+};
+psi14_message_content psi14_message_content_s_1_tag psi14_message_content_s_1_value:
+{
+ CCCH_ACCESS_INFORMATION ccch_access_information;
+ PSI14_MESSAGE_CONTENT_S_2 m_psi14_message_content_s_2;
+};
+psi13_message_content_s_9 psi13_message_content_s_10_tag psi13_message_content_s_10_value:
+{
+ PSI13_MESSAGE_CONTENT_S_10_BIT m_psi13_message_content_s_10_bit;
+ PSI13_MESSAGE_CONTENT_S_11 m_psi13_message_content_s_11;
+};
+psi13_message_content_s_7 psi13_message_content_s_8_tag psi13_message_content_s_8_value:
+{
+ PSI13_MESSAGE_CONTENT_S_8_BIT m_psi13_message_content_s_8_bit;
+ PSI13_MESSAGE_CONTENT_S_9 m_psi13_message_content_s_9;
+};
+psi13_message_content psi13_message_content_s_3_tag psi13_message_content_s_3_value:
+{
+ PSI13_MESSAGE_CONTENT_S_4 m_psi13_message_content_s_4;
+ PSI13_MESSAGE_CONTENT_S_5 m_psi13_message_content_s_5;
+};
+psi13_message_content psi13_message_content_s_6_tag psi13_message_content_s_6_value:
+{
+ PSI13_MESSAGE_CONTENT_S_6_BIT m_psi13_message_content_s_6_bit;
+ PSI13_MESSAGE_CONTENT_S_7 m_psi13_message_content_s_7;
+};
+psi8_message_content psi8_message_content_s_2_tag psi8_message_content_s_2_value:
+{
+ PSI8_MESSAGE_CONTENT_S_2_BIT m_psi8_message_content_s_2_bit;
+ PSI8_MESSAGE_CONTENT_S_3 m_psi8_message_content_s_3;
+};
+psi3_quater_message_content_s_8 psi3_quater_message_content_s_11_tag psi3_quater_message_content_s_11_value:
+{
+ PSI3_QUATER_MESSAGE_CONTENT_S_11_BIT m_psi3_quater_message_content_s_11_bit;
+ PSI3_QUATER_MESSAGE_CONTENT_S_12 m_psi3_quater_message_content_s_12;
+};
+psi3_quater_message_content_s_1 psi3_quater_message_content_s_6_tag psi3_quater_message_content_s_6_value:
+{
+ PSI3_QUATER_MESSAGE_CONTENT_S_7 m_psi3_quater_message_content_s_7;
+ PSI3_QUATER_MESSAGE_CONTENT_S_8 m_psi3_quater_message_content_s_8;
+};
+psi3_bis_message_content_s_11 psi3_bis_message_content_s_13_tag psi3_bis_message_content_s_13_value:
+{
+ PSI3_BIS_MESSAGE_CONTENT_S_13_BIT m_psi3_bis_message_content_s_13_bit;
+ PSI3_BIS_MESSAGE_CONTENT_S_14 m_psi3_bis_message_content_s_14;
+};
+psi3_bis_message_content_s_8 psi3_bis_message_content_s_10_tag psi3_bis_message_content_s_10_value:
+{
+ PSI3_BIS_MESSAGE_CONTENT_S_10_BIT m_psi3_bis_message_content_s_10_bit;
+ PSI3_BIS_MESSAGE_CONTENT_S_11 m_psi3_bis_message_content_s_11;
+};
+psi3_bis_message_content_s_5 psi3_bis_message_content_s_7_tag psi3_bis_message_content_s_7_value:
+{
+ PSI3_BIS_MESSAGE_CONTENT_S_7_BIT m_psi3_bis_message_content_s_7_bit;
+ PSI3_BIS_MESSAGE_CONTENT_S_8 m_psi3_bis_message_content_s_8;
+};
+psi3_bis_message_content_s_1 psi3_bis_message_content_s_4_tag psi3_bis_message_content_s_4_value:
+{
+ PSI3_BIS_MESSAGE_CONTENT_S_4_BIT m_psi3_bis_message_content_s_4_bit;
+ PSI3_BIS_MESSAGE_CONTENT_S_5 m_psi3_bis_message_content_s_5;
+};
+psi3_message_content_s_9 psi3_message_content_s_11_tag psi3_message_content_s_11_value:
+{
+ PSI3_MESSAGE_CONTENT_S_11_BIT m_psi3_message_content_s_11_bit;
+ PSI3_MESSAGE_CONTENT_S_12 m_psi3_message_content_s_12;
+};
+psi3_message_content_s_6 psi3_message_content_s_8_tag psi3_message_content_s_8_value:
+{
+ PSI3_MESSAGE_CONTENT_S_8_BIT m_psi3_message_content_s_8_bit;
+ PSI3_MESSAGE_CONTENT_S_9 m_psi3_message_content_s_9;
+};
+psi3_message_content_s_3 psi3_message_content_s_5_tag psi3_message_content_s_5_value:
+{
+ PSI3_MESSAGE_CONTENT_S_5_BIT m_psi3_message_content_s_5_bit;
+ PSI3_MESSAGE_CONTENT_S_6 m_psi3_message_content_s_6;
+};
+psi3_message_content psi3_message_content_s_2_tag psi3_message_content_s_2_value:
+{
+ PSI3_MESSAGE_CONTENT_S_2_BIT m_psi3_message_content_s_2_bit;
+ PSI3_MESSAGE_CONTENT_S_3 m_psi3_message_content_s_3;
+};
+psi1_message_content_s_3 psi1_message_content_s_4_tag psi1_message_content_s_4_value:
+{
+ PSI1_MESSAGE_CONTENT_S_5 m_psi1_message_content_s_5;
+};
+psi1_message_content psi1_message_content_s_2_tag psi1_message_content_s_2_value:
+{
+ PSI1_MESSAGE_CONTENT_S_3 m_psi1_message_content_s_3;
+};
+packet_power_control_timing_advance_message_content_s_11 packet_power_control_timing_advance_message_content_s_11_tag packet_power_control_timing_advance_message_content_s_11_value:
+{
+ GLOBAL_PACKET_TIMING_ADVANCE global_packet_timing_advance;
+ PACKET_POWER_CONTROL_TIMING_ADVANCE_MESSAGE_CONTENT_POWER_CONTROL_PARAMETERS power_control_parameters;
+};
+packet_power_control_timing_advance_message_content_s_13 packet_power_control_timing_advance_message_content_s_15_tag packet_power_control_timing_advance_message_content_s_15_value:
+{
+ PACKET_POWER_CONTROL_TIMING_ADVANCE_MESSAGE_CONTENT_S_15_BIT m_packet_power_control_timing_advance_message_content_s_15_bit;
+ PACKET_POWER_CONTROL_TIMING_ADVANCE_MESSAGE_CONTENT_S_16 m_packet_power_control_timing_advance_message_content_s_16;
+};
+packet_power_control_timing_advance_message_content packet_power_control_timing_advance_message_content_s_3_tag packet_power_control_timing_advance_message_content_s_3_value:
+{
+ PACKET_POWER_CONTROL_TIMING_ADVANCE_MESSAGE_CONTENT_GLOBAL_TFI global_tfi;
+ TQI tqi;
+ PACKET_POWER_CONTROL_TIMING_ADVANCE_MESSAGE_CONTENT_PACKET_REQUEST_REFERENCE packet_request_reference;
+};
+packet_power_control_timing_advance_message_content packet_power_control_timing_advance_message_content_s_9_tag packet_power_control_timing_advance_message_content_s_9_value:
+{
+ PACKET_POWER_CONTROL_TIMING_ADVANCE_MESSAGE_CONTENT_S_10 m_packet_power_control_timing_advance_message_content_s_10;
+ PACKET_POWER_CONTROL_TIMING_ADVANCE_MESSAGE_CONTENT_S_11 m_packet_power_control_timing_advance_message_content_s_11;
+};
+packet_power_control_timing_advance_message_content packet_power_control_timing_advance_message_content_s_12_tag packet_power_control_timing_advance_message_content_s_12_value:
+{
+ PACKET_POWER_CONTROL_TIMING_ADVANCE_MESSAGE_CONTENT_S_12_BIT m_packet_power_control_timing_advance_message_content_s_12_bit;
+ PACKET_POWER_CONTROL_TIMING_ADVANCE_MESSAGE_CONTENT_S_13 m_packet_power_control_timing_advance_message_content_s_13;
+};
+packet_polling_request_message_content packet_polling_request_message_content_s_3_tag packet_polling_request_message_content_s_3_value:
+{
+ PACKET_POLLING_REQUEST_MESSAGE_CONTENT_GLOBAL_TFI global_tfi;
+ PACKET_POLLING_REQUEST_MESSAGE_CONTENT_TLLI___G_RNTI tlli___g_rnti;
+ PACKET_POLLING_REQUEST_MESSAGE_CONTENT_TQI tqi;
+};
+packet_polling_request_message_content packet_polling_request_message_content_s_6_tag packet_polling_request_message_content_s_6_value:
+{
+ PACKET_POLLING_REQUEST_MESSAGE_CONTENT_S_6_BIT m_packet_polling_request_message_content_s_6_bit;
+ PACKET_POLLING_REQUEST_MESSAGE_CONTENT_S_7 m_packet_polling_request_message_content_s_7;
+};
+packet_paging_request_message_content_s_3 packet_paging_request_message_content_s_5_tag packet_paging_request_message_content_s_5_value:
+{
+ PACKET_PAGING_REQUEST_MESSAGE_CONTENT_S_5_BIT m_packet_paging_request_message_content_s_5_bit;
+ PACKET_PAGING_REQUEST_MESSAGE_CONTENT_S_6 m_packet_paging_request_message_content_s_6;
+};
+packet_downlink_assignment_message_content_s_31 packet_downlink_assignment_message_content_s_33_tag packet_downlink_assignment_message_content_s_33_value:
+{
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_33_BIT m_packet_downlink_assignment_message_content_s_33_bit;
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_34 m_packet_downlink_assignment_message_content_s_34;
+};
+packet_downlink_assignment_message_content_s_24 packet_downlink_assignment_message_content_s_30_tag packet_downlink_assignment_message_content_s_30_value:
+{
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_30_BIT m_packet_downlink_assignment_message_content_s_30_bit;
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_31 m_packet_downlink_assignment_message_content_s_31;
+};
+packet_downlink_assignment_message_content_s_17 packet_downlink_assignment_message_content_s_23_tag packet_downlink_assignment_message_content_s_23_value:
+{
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_23_BIT m_packet_downlink_assignment_message_content_s_23_bit;
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_24 m_packet_downlink_assignment_message_content_s_24;
+};
+packet_downlink_assignment_message_content_s_10 packet_downlink_assignment_message_content_s_16_tag packet_downlink_assignment_message_content_s_16_value:
+{
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_16_BIT m_packet_downlink_assignment_message_content_s_16_bit;
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_17 m_packet_downlink_assignment_message_content_s_17;
+};
+packet_downlink_assignment_message_content_s_43 packet_downlink_assignment_message_content_s_44_tag packet_downlink_assignment_message_content_s_44_value:
+{
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_45 m_packet_downlink_assignment_message_content_s_45;
+};
+packet_downlink_assignment_message_content_s_46 packet_downlink_assignment_message_content_s_47_tag packet_downlink_assignment_message_content_s_47_value:
+{
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_48 m_packet_downlink_assignment_message_content_s_48;
+};
+packet_downlink_assignment_message_content_s_42 packet_downlink_assignment_message_content_s_42_tag packet_downlink_assignment_message_content_s_42_value:
+{
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_43 m_packet_downlink_assignment_message_content_s_43;
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_46 m_packet_downlink_assignment_message_content_s_46;
+};
+packet_downlink_assignment_message_content_s_38 packet_downlink_assignment_message_content_s_39_tag packet_downlink_assignment_message_content_s_39_value:
+{
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_40 m_packet_downlink_assignment_message_content_s_40;
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_42 m_packet_downlink_assignment_message_content_s_42;
+};
+packet_downlink_assignment_message_content_s_38 packet_downlink_assignment_message_content_s_49_tag packet_downlink_assignment_message_content_s_49_value:
+{
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_50 m_packet_downlink_assignment_message_content_s_50;
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_DUAL_CARRIER_FREQUENCY_PARAMETERS dual_carrier_frequency_parameters;
+};
+packet_downlink_assignment_message_content packet_downlink_assignment_message_content_s_4_tag packet_downlink_assignment_message_content_s_4_value:
+{
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_GLOBAL_TFI global_tfi;
+ TLLI__G_RNTI tlli__g_rnti;
+};
+packet_downlink_assignment_message_content packet_downlink_assignment_message_content_s_5_tag packet_downlink_assignment_message_content_s_5_value:
+{
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_6 m_packet_downlink_assignment_message_content_s_7;
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_36 m_packet_downlink_assignment_message_content_s_38;
+};
+packet_access_reject_message_content_s_4 packet_access_reject_message_content_s_6_tag packet_access_reject_message_content_s_6_value:
+{
+ PACKET_ACCESS_REJECT_MESSAGE_CONTENT_S_6_BIT m_packet_access_reject_message_content_s_6_bit;
+ PACKET_ACCESS_REJECT_MESSAGE_CONTENT_S_7 m_packet_access_reject_message_content_s_8;
+};
+packet_access_reject_message_content_s_1 packet_access_reject_message_content_s_3_tag packet_access_reject_message_content_s_3_value:
+{
+ PACKET_ACCESS_REJECT_MESSAGE_CONTENT_S_3_BIT m_packet_access_reject_message_content_s_3_bit;
+ PACKET_ACCESS_REJECT_MESSAGE_CONTENT_S_4 m_packet_access_reject_message_content_s_4;
+};
+packet_uplink_assignment_message_content_s_14 packet_uplink_assignment_message_content_s_17_tag packet_uplink_assignment_message_content_s_17_value:
+{
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_17_BIT m_packet_uplink_assignment_message_content_s_17_bit;
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_18 m_packet_uplink_assignment_message_content_s_18;
+};
+packet_uplink_assignment_message_content_s_11 packet_uplink_assignment_message_content_s_13_tag packet_uplink_assignment_message_content_s_13_value:
+{
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_13_BIT m_packet_uplink_assignment_message_content_s_13_bit;
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_14 m_packet_uplink_assignment_message_content_s_14;
+};
+packet_uplink_assignment_message_content_s_7 packet_uplink_assignment_message_content_s_9_tag packet_uplink_assignment_message_content_s_9_value:
+{
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_DYNAMIC_ALLOCATION dynamic_allocation;
+ SINGLE_BLOCK_ALLOCATION single_block_allocation;
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_FIXED_ALLOCATION fixed_allocation;
+};
+packet_uplink_assignment_message_content_s_7 packet_uplink_assignment_message_content_s_10_tag packet_uplink_assignment_message_content_s_10_value:
+{
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_10_BIT m_packet_uplink_assignment_message_content_s_10_bit;
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_11 m_packet_uplink_assignment_message_content_s_11;
+};
+packet_uplink_assignment_message_content_s_36 packet_uplink_assignment_message_content_s_39_tag packet_uplink_assignment_message_content_s_39_value:
+{
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_39_BIT m_packet_uplink_assignment_message_content_s_39_bit;
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_40 m_packet_uplink_assignment_message_content_s_40;
+};
+packet_uplink_assignment_message_content_s_32 packet_uplink_assignment_message_content_s_35_tag packet_uplink_assignment_message_content_s_35_value:
+{
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_35_BIT m_packet_uplink_assignment_message_content_s_35_bit;
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_36 m_packet_uplink_assignment_message_content_s_36;
+};
+packet_uplink_assignment_message_content_s_23 packet_uplink_assignment_message_content_s_30_tag packet_uplink_assignment_message_content_s_30_value:
+{
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_DYNAMIC_ALLOCATION1 dynamic_allocation;
+ MULTI_BLOCK_ALLOCATION multi_block_allocation;
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_FIXED_ALLOCATION1 fixed_allocation;
+};
+packet_uplink_assignment_message_content_s_23 packet_uplink_assignment_message_content_s_31_tag packet_uplink_assignment_message_content_s_31_value:
+{
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_31_BIT m_packet_uplink_assignment_message_content_s_31_bit;
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_32 m_packet_uplink_assignment_message_content_s_32;
+};
+packet_uplink_assignment_message_content_s_43 packet_uplink_assignment_message_content_s_50_tag packet_uplink_assignment_message_content_s_50_value:
+{
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_51 m_packet_uplink_assignment_message_content_s_51;
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_DUAL_CARRIER_FREQUENCY_PARAMETERS dual_carrier_frequency_parameters;
+};
+packet_uplink_assignment_message_content_s_21 packet_uplink_assignment_message_content_s_21_tag packet_uplink_assignment_message_content_s_21_value:
+{
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_22 m_packet_uplink_assignment_message_content_s_23;
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_42 m_packet_uplink_assignment_message_content_s_43;
+};
+packet_uplink_assignment_message_content packet_uplink_assignment_message_content_s_4_tag packet_uplink_assignment_message_content_s_4_value:
+{
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_GLOBAL_TFI global_tfi;
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_TLLI___G_RNTI tlli___g_rnti;
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_TQI tqi;
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_PACKET_REQUEST_REFERENCE packet_request_reference;
+};
+packet_uplink_assignment_message_content packet_uplink_assignment_message_content_s_5_tag packet_uplink_assignment_message_content_s_5_value:
+{
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_6 m_packet_uplink_assignment_message_content_s_7;
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_21 m_packet_uplink_assignment_message_content_s_21;
+};
+multiple_tbf_downlink_assignment_message_content_s_8 multiple_tbf_downlink_assignment_message_content_s_22_tag multiple_tbf_downlink_assignment_message_content_s_22_value:
+{
+ MULTIPLE_TBF_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_22_BIT m_multiple_tbf_downlink_assignment_message_content_s_22_bit;
+ MULTIPLE_TBF_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_23 m_multiple_tbf_downlink_assignment_message_content_s_23;
+};
+multiple_tbf_downlink_assignment_message_content_s_52 multiple_tbf_downlink_assignment_message_content_s_53_tag multiple_tbf_downlink_assignment_message_content_s_53_value:
+{
+ MULTIPLE_TBF_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_54 m_multiple_tbf_downlink_assignment_message_content_s_54;
+};
+multiple_tbf_downlink_assignment_message_content_s_56 multiple_tbf_downlink_assignment_message_content_s_57_tag multiple_tbf_downlink_assignment_message_content_s_57_value:
+{
+ MULTIPLE_TBF_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_58 m_multiple_tbf_downlink_assignment_message_content_s_58;
+};
+multiple_tbf_downlink_assignment_message_content_s_51 multiple_tbf_downlink_assignment_message_content_s_51_tag multiple_tbf_downlink_assignment_message_content_s_51_value:
+{
+ MULTIPLE_TBF_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_52 m_multiple_tbf_downlink_assignment_message_content_s_52;
+ MULTIPLE_TBF_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_56 m_multiple_tbf_downlink_assignment_message_content_s_56;
+};
+multiple_tbf_downlink_assignment_message_content_s_33 multiple_tbf_downlink_assignment_message_content_s_34_tag multiple_tbf_downlink_assignment_message_content_s_34_value:
+{
+ MULTIPLE_TBF_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_35 m_multiple_tbf_downlink_assignment_message_content_s_35;
+ MULTIPLE_TBF_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_DUAL_CARRIER_FREQUENCY_PARAMETERS dual_carrier_frequency_parameters;
+};
+multiple_tbf_downlink_assignment_message_content multiple_tbf_downlink_assignment_message_content_s_4_tag multiple_tbf_downlink_assignment_message_content_s_4_value:
+{
+ MULTIPLE_TBF_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_GLOBAL_TFI global_tfi;
+ MULTIPLE_TBF_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_5 m_multiple_tbf_downlink_assignment_message_content_s_5;
+};
+multiple_tbf_downlink_assignment_message_content multiple_tbf_downlink_assignment_message_content_s_6_tag multiple_tbf_downlink_assignment_message_content_s_6_value:
+{
+ MULTIPLE_TBF_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_7 m_multiple_tbf_downlink_assignment_message_content_s_8;
+ MULTIPLE_TBF_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_25 m_multiple_tbf_downlink_assignment_message_content_s_28;
+};
+multiple_tbf_uplink_assignment_message_content_s_15 multiple_tbf_uplink_assignment_message_content_s_22_tag multiple_tbf_uplink_assignment_message_content_s_22_value:
+{
+ MULTIPLE_TBF_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_22_BIT m_multiple_tbf_uplink_assignment_message_content_s_22_bit;
+ MULTIPLE_TBF_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_23 m_multiple_tbf_uplink_assignment_message_content_s_23;
+};
+multiple_tbf_uplink_assignment_message_content_s_26 multiple_tbf_uplink_assignment_message_content_s_31_tag multiple_tbf_uplink_assignment_message_content_s_31_value:
+{
+ MULTIPLE_TBF_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_32 m_multiple_tbf_uplink_assignment_message_content_s_32;
+ MULTIPLE_TBF_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_DUAL_CARRIER_FREQUENCY_PARAMETERS dual_carrier_frequency_parameters;
+};
+multiple_tbf_uplink_assignment_message_content_s_13 multiple_tbf_uplink_assignment_message_content_s_13_tag multiple_tbf_uplink_assignment_message_content_s_13_value:
+{
+ MULTIPLE_TBF_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_14 m_multiple_tbf_uplink_assignment_message_content_s_15;
+ MULTIPLE_TBF_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_25 m_multiple_tbf_uplink_assignment_message_content_s_26;
+};
+multiple_tbf_uplink_assignment_message_content multiple_tbf_uplink_assignment_message_content_s_4_tag multiple_tbf_uplink_assignment_message_content_s_4_value:
+{
+ MULTIPLE_TBF_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_GLOBAL_TFI global_tfi;
+ MULTIPLE_TBF_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_5 m_multiple_tbf_uplink_assignment_message_content_s_5;
+};
+multiple_tbf_uplink_assignment_message_content multiple_tbf_uplink_assignment_message_content_s_6_tag multiple_tbf_uplink_assignment_message_content_s_6_value:
+{
+ MULTIPLE_TBF_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_7 m_multiple_tbf_uplink_assignment_message_content_s_8;
+ MULTIPLE_TBF_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_13 m_multiple_tbf_uplink_assignment_message_content_s_13;
+};
+multiple_tbf_timeslot_reconfigure_message_content_s_12 multiple_tbf_timeslot_reconfigure_message_content_s_22_tag multiple_tbf_timeslot_reconfigure_message_content_s_22_value:
+{
+ MULTIPLE_TBF_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_S_22_BIT m_multiple_tbf_timeslot_reconfigure_message_content_s_22_bit;
+ MULTIPLE_TBF_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_S_23 m_multiple_tbf_timeslot_reconfigure_message_content_s_23;
+};
+multiple_tbf_timeslot_reconfigure_message_content_s_26 multiple_tbf_timeslot_reconfigure_message_content_s_34_tag multiple_tbf_timeslot_reconfigure_message_content_s_34_value:
+{
+ MULTIPLE_TBF_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_S_35 m_multiple_tbf_timeslot_reconfigure_message_content_s_35;
+ MULTIPLE_TBF_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_DUAL_CARRIER_FREQUENCY_PARAMETERS dual_carrier_frequency_parameters;
+};
+multiple_tbf_timeslot_reconfigure_message_content_s_10 multiple_tbf_timeslot_reconfigure_message_content_s_10_tag multiple_tbf_timeslot_reconfigure_message_content_s_10_value:
+{
+ MULTIPLE_TBF_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_S_11 m_multiple_tbf_timeslot_reconfigure_message_content_s_12;
+ MULTIPLE_TBF_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_S_25 m_multiple_tbf_timeslot_reconfigure_message_content_s_26;
+};
+multiple_tbf_timeslot_reconfigure_message_content multiple_tbf_timeslot_reconfigure_message_content_s_3_tag multiple_tbf_timeslot_reconfigure_message_content_s_3_value:
+{
+ MULTIPLE_TBF_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_S_4 m_multiple_tbf_timeslot_reconfigure_message_content_s_5;
+ MULTIPLE_TBF_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_S_10 m_multiple_tbf_timeslot_reconfigure_message_content_s_10;
+};
+enh_measurement_parameters_struct enh_measurement_parameters_struct_s_1_tag enh_measurement_parameters_struct_s_1_value:
+{
+ ENH_MEASUREMENT_PARAMETERS_STRUCT_S_2 m_enh_measurement_parameters_struct_s_2;
+ ENH_MEASUREMENT_PARAMETERS_STRUCT_PSI3_CHANGE_MARK psi3_change_mark;
+};
+ext_measurement_parameters_struct ext_measurement_parameters_struct_s_0_tag ext_measurement_parameters_struct_s_0_value:
+{
+ M_EM1_STRUCT m_em1_struct;
+};
+gsm_target_cell_struct_s_18 gsm_target_cell_struct_s_19_tag gsm_target_cell_struct_s_19_value:
+{
+ GSM_TARGET_CELL_STRUCT_S_19_BIT m_gsm_target_cell_struct_s_19_bit;
+ GSM_TARGET_CELL_STRUCT_S_20 m_gsm_target_cell_struct_s_20;
+};
+gsm_target_cell_struct_s_11 gsm_target_cell_struct_s_17_tag gsm_target_cell_struct_s_17_value:
+{
+ GSM_TARGET_CELL_STRUCT_S_17_BIT m_gsm_target_cell_struct_s_17_bit;
+ GSM_TARGET_CELL_STRUCT_S_18 m_gsm_target_cell_struct_s_18;
+};
+gsm_target_cell_struct_s_7 gsm_target_cell_struct_s_10_tag gsm_target_cell_struct_s_10_value:
+{
+ GSM_TARGET_CELL_STRUCT_S_10_BIT m_gsm_target_cell_struct_s_10_bit;
+ GSM_TARGET_CELL_STRUCT_S_11 m_gsm_target_cell_struct_s_11;
+};
+gsm_target_cell_struct_s_5 gsm_target_cell_struct_s_6_tag gsm_target_cell_struct_s_6_value:
+{
+ GSM_TARGET_CELL_STRUCT_S_6_BIT m_gsm_target_cell_struct_s_6_bit;
+ GSM_TARGET_CELL_STRUCT_S_7 m_gsm_target_cell_struct_s_7;
+};
+gsm_target_cell_struct_s_2 gsm_target_cell_struct_s_4_tag gsm_target_cell_struct_s_4_value:
+{
+ GSM_TARGET_CELL_STRUCT_S_4_BIT m_gsm_target_cell_struct_s_4_bit;
+ GSM_TARGET_CELL_STRUCT_S_5 m_gsm_target_cell_struct_s_5;
+};
+gsm_target_cell_struct gsm_target_cell_struct_s_1_tag gsm_target_cell_struct_s_1_value:
+{
+ GSM_TARGET_CELL_STRUCT_S_1_BIT m_gsm_target_cell_struct_s_1_bit;
+ GSM_TARGET_CELL_STRUCT_S_2 m_gsm_target_cell_struct_s_2;
+};
+ps_handover_radio_resources_2_ie ps_handover_radio_resources_2_ie_s_5_tag ps_handover_radio_resources_2_ie_s_5_value:
+{
+ PS_HANDOVER_RADIO_RESOURCES_2_IE_S_6 m_ps_handover_radio_resources_2_ie_s_6;
+ PS_HANDOVER_RADIO_RESOURCES_2_IE_DUAL_CARRIER_FREQUENCY_PARAMETERS dual_carrier_frequency_parameters;
+};
+ms_ra_capability_value_part_struct ms_ra_capability_value_part_struct_s_1_tag ms_ra_capability_value_part_struct_s_1_value:
+{
+ ACCESS_CAPABILITIES access_capabilities;
+ MS_RA_CAPABILITY_VALUE_PART_STRUCT_S_2 m_ms_ra_capability_value_part_struct_s_2;
+};
+psi5_message_content_s_7 psi5_message_content_s_9_tag psi5_message_content_s_9_value:
+{
+ PSI5_MESSAGE_CONTENT_S_9_BIT m_psi5_message_content_s_9_bit;
+ PSI5_MESSAGE_CONTENT_S_10 m_psi5_message_content_s_10;
+};
+psi5_message_content_s_4 psi5_message_content_s_6_tag psi5_message_content_s_6_value:
+{
+ PSI5_MESSAGE_CONTENT_S_6_BIT m_psi5_message_content_s_6_bit;
+ PSI5_MESSAGE_CONTENT_S_7 m_psi5_message_content_s_7;
+};
+psi5_message_content psi5_message_content_s_3_tag psi5_message_content_s_3_value:
+{
+ PSI5_MESSAGE_CONTENT_S_3_BIT m_psi5_message_content_s_3_bit;
+ PSI5_MESSAGE_CONTENT_S_4 m_psi5_message_content_s_4;
+};
+psi2_message_content_s_1 psi2_message_content_s_4_tag psi2_message_content_s_4_value:
+{
+ PSI2_MESSAGE_CONTENT_S_4_BIT m_psi2_message_content_s_4_bit;
+ PSI2_MESSAGE_CONTENT_S_5 m_psi2_message_content_s_5;
+};
+packet_measurement_order_message_content_s_25 packet_measurement_order_message_content_s_26_tag packet_measurement_order_message_content_s_26_value:
+{
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_S_26_BIT m_packet_measurement_order_message_content_s_26_bit;
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_S_27 m_packet_measurement_order_message_content_s_27;
+};
+packet_measurement_order_message_content_s_18 packet_measurement_order_message_content_s_24_tag packet_measurement_order_message_content_s_24_value:
+{
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_S_24_BIT m_packet_measurement_order_message_content_s_24_bit;
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_S_25 m_packet_measurement_order_message_content_s_25;
+};
+packet_measurement_order_message_content_s_15 packet_measurement_order_message_content_s_17_tag packet_measurement_order_message_content_s_17_value:
+{
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_S_17_BIT m_packet_measurement_order_message_content_s_17_bit;
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_S_18 m_packet_measurement_order_message_content_s_18;
+};
+packet_measurement_order_message_content_s_12 packet_measurement_order_message_content_s_14_tag packet_measurement_order_message_content_s_14_value:
+{
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_S_14_BIT m_packet_measurement_order_message_content_s_14_bit;
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_S_15 m_packet_measurement_order_message_content_s_15;
+};
+packet_measurement_order_message_content_s_9 packet_measurement_order_message_content_s_11_tag packet_measurement_order_message_content_s_11_value:
+{
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_S_11_BIT m_packet_measurement_order_message_content_s_11_bit;
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_S_12 m_packet_measurement_order_message_content_s_12;
+};
+packet_measurement_order_message_content packet_measurement_order_message_content_s_3_tag packet_measurement_order_message_content_s_3_value:
+{
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_GLOBAL_TFI global_tfi;
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_TLLI___G_RNTI tlli___g_rnti;
+};
+packet_measurement_order_message_content packet_measurement_order_message_content_s_8_tag packet_measurement_order_message_content_s_8_value:
+{
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_S_8_BIT m_packet_measurement_order_message_content_s_8_bit;
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_S_9 m_packet_measurement_order_message_content_s_9;
+};
+packet_cell_change_order_message_content_s_10 packet_cell_change_order_message_content_s_13_tag packet_cell_change_order_message_content_s_13_value:
+{
+ PACKET_CELL_CHANGE_ORDER_MESSAGE_CONTENT_S_13_BIT m_packet_cell_change_order_message_content_s_13_bit;
+ PACKET_CELL_CHANGE_ORDER_MESSAGE_CONTENT_S_14 m_packet_cell_change_order_message_content_s_14;
+};
+packet_cell_change_order_message_content packet_cell_change_order_message_content_s_3_tag packet_cell_change_order_message_content_s_3_value:
+{
+ PACKET_CELL_CHANGE_ORDER_MESSAGE_CONTENT_GLOBAL_TFI global_tfi;
+ PACKET_CELL_CHANGE_ORDER_MESSAGE_CONTENT_TLLI___G_RNTI tlli___g_rnti;
+};
+packet_cell_change_order_message_content packet_cell_change_order_message_content_s_4_tag packet_cell_change_order_message_content_s_4_value:
+{
+ PACKET_CELL_CHANGE_ORDER_MESSAGE_CONTENT_S_5 m_packet_cell_change_order_message_content_s_6;
+ PACKET_CELL_CHANGE_ORDER_MESSAGE_CONTENT_S_7 m_packet_cell_change_order_message_content_s_10;
+};
+ps_handover_to_a_gb_mode_payload ps_handover_command_message_content_s_4_tag ps_handover_command_message_content_s_4_value:
+{
+ PS_HANDOVER_RR_INFO ps_handover_rr_info;
+ PS_HANDOVER_RR_2_INFO ps_handover_rr_2_info;
+};
+ps_handover_command_message_content ps_handover_command_message_content_s_3_tag ps_handover_command_message_content_s_3_value:
+{
+ PS_HANDOVER_TO_A_GB_MODE_PAYLOAD m_ps_handover_to_a_gb_mode_payload;
+ PS_HANDOVER_TO_UTRAN_PAYLOAD ps_handover_to_utran_payload;
+};
+redirection_target_struct redirection_target_struct_s_1_tag redirection_target_struct_s_1_value:
+{
+ rdrct_gsm_desc rdrct_gsm_desc;
+ rdrct_utran_fdd rdrct_utran_fdd;
+ rdrct_utran_tdd rdrct_utran_tdd;
+ rdrct_e_utran rdrct_e_utran;
+};
diff --git a/mcu/service/dhl/database/unionTag/GAS_CS_PS_MCDDLL_unionTag_tdd.txt b/mcu/service/dhl/database/unionTag/GAS_CS_PS_MCDDLL_unionTag_tdd.txt
new file mode 100755
index 0000000..fb52cbc
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/GAS_CS_PS_MCDDLL_unionTag_tdd.txt
@@ -0,0 +1,1152 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+This file is used by cgen for union Tag information.
+Usage:
+
+structure_name tag_field_name union_name:
+{
+ tag_fileld_value field_of_union_name;
+ tag_fileld_value field_of_union_name;
+};
+
+For Example:
+
+InvokeChoice ChoiceId a:
+{
+ 1 localValue;
+ 2 globalValue;
+};
+
+*/
+
+/****************************** GAS CS PS MCDDLL UnionTag ********************************/
+
+unpack_msg msg_type rr_peer_msg:
+{
+
+ STRUCT_ID_RR_PEER_ADDITIONAL_ASSIGNMENT_STRUCT additional_assignment;
+ STRUCT_ID_IMMEDIATE_ASSIGN_MESSAGE immediate_assign_msg;
+ STRUCT_ID_IMMEDIATE_ASSIGN_EXT_MESSAGE immediate_assign_ext_msg;
+ STRUCT_ID_IMM_ASGN_REJ_MSG_STRUCT imm_asgn_rej_msg;
+ STRUCT_ID_CIPHER_MODE_COMMAND_STRUCT cipher_mode_command;
+ STRUCT_ID_CIPHER_MODE_COMPLETE_STRUCT cipher_mode_complete;
+ STRUCT_ID_ASSIGNMENT_COMMAND_STRUCT assignment_command;
+ STRUCT_ID_ASSIGNMENT_COMPLETE_STRUCT assignment_complete;
+ STRUCT_ID_ASSIGNMENT_FAILURE_STRUCT assignment_failure;
+ STRUCT_ID_PDCH_ASSIGNMENT_COMMAND_STRUCT pdch_assignment_command;
+ STRUCT_ID_HANDOVER_COMMAND_STRUCT handover_command;
+ STRUCT_ID_HANDOVER_COMPLETE_STRUCT handover_complete;
+ STRUCT_ID_HANDOVER_FAILURE_STRUCT handover_failure;
+ STRUCT_ID_RR_CELL_CHANGE_ORDER_STRUCT rr_cell_change_order;
+ STRUCT_ID_PHYSICAL_INFORMATION_STRUCT physical_information;
+ STRUCT_ID_CHANNEL_RELEASE_STRUCT channel_release;
+ STRUCT_ID_RR_PEER_PARTIAL_RELEASE_STRUCT partial_release;
+ STRUCT_ID_RR_PEER_PARTIAL_RELEASE_COMPLETE_STRUCT rr_peer_partial_release_complete;
+ STRUCT_ID_PAGING_REQUEST_TYPE1_STRUCT paging_request_1;
+ STRUCT_ID_PAGING_REQUEST_TYPE2_STRUCT paging_request_2;
+ STRUCT_ID_PAGING_REQUEST_TYPE3_STRUCT paging_request_3;
+ STRUCT_ID_PAGING_RESPONSE paging_response;
+ STRUCT_ID_SI_1_STRUCT si_1;
+ STRUCT_ID_SI_2_STRUCT si_2;
+ STRUCT_ID_SI_2BIS_STRUCT si_2bis;
+ STRUCT_ID_SI_2TER_STRUCT si_2ter;
+ STRUCT_ID_SI_2QUATER_STRUCT si_2quater;
+ STRUCT_ID_SI_3_STRUCT si_3;
+ STRUCT_ID_SI_4_STRUCT si_4;
+ STRUCT_ID_SI_5_STRUCT si_5;
+ STRUCT_ID_SI_5BIS_STRUCT si_5bis;
+ STRUCT_ID_SI_5TER_STRUCT si_5ter;
+ STRUCT_ID_SI_6_STRUCT si_6;
+ STRUCT_ID_SI_7_STRUCT si_7;
+ STRUCT_ID_SI_8_STRUCT si_8;
+ STRUCT_ID_SI_9_STRUCT si_9;
+ STRUCT_ID_SI_13_STRUCT si_13;
+ STRUCT_ID_SI_16_STRUCT si_16;
+ STRUCT_ID_SI_17_STRUCT si_17;
+ STRUCT_ID_SI_18_STRUCT si_18;
+ STRUCT_ID_SI_19_STRUCT si_19;
+ STRUCT_ID_SI_20_STRUCT si_20;
+ STRUCT_ID_EXTENDED_MEASUREMENT_ORDER_STRUCT extended_measurement_order;
+ STRUCT_ID_EXTENDED_MEASUREMENT_REPORT_STRUCT extended_measurement_report;
+ STRUCT_ID_MEASUREMENT_REPORT_STRUCT measurement_report;
+ STRUCT_ID_MEASUREMENT_INFORMATION_STRUCT measurement_information_struct;
+ STRUCT_ID_ENHANCED_MEASUREMENT_REPORT_STRUCT enhanced_measurement_report_struct;
+ STRUCT_ID_CHANNEL_MODE_MODIFY_STRUCT channel_mode_modify;
+ STRUCT_ID_CHANNEL_MODE_MODIFY_ACK_STRUCT channel_mode_modify_ack_struct;
+ STRUCT_ID_RR_PEER_CLASSMARK_CHANGE_STRUCT classmark_change;
+ STRUCT_ID_RR_PEER_CLASSMARK_ENQUIRY_STRUCT classmark_enquiry;
+ STRUCT_ID_FREQUENCY_REDEFINITION_STRUCT frequency_redefinition;
+ STRUCT_ID_RR_STATUS_STRUCT rr_status;
+ STRUCT_ID_GPRS_SUSPENSION_REQUEST_STRUCT gprs_suspension_request;
+ STRUCT_ID_CONFIGURATION_CHANGE_COMMAND_STRUCT configuration_change_command;
+ STRUCT_ID_PACKET_ACCESS_REJECT_MESSAGE_CONTENT paj;
+ STRUCT_ID_PACKET_QUEUEING_NOTIFICATION_MESSAGE_CONTENT pqn;
+ STRUCT_ID_PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT puas;
+ STRUCT_ID_PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT pdas;
+ STRUCT_ID_PACKET_TBF_RELEASE_MESSAGE_CONTENT pkt_tbf_release;
+ STRUCT_ID_PACKET_PAGING_REQUEST_MESSAGE_CONTENT pkt_paging;
+ STRUCT_ID_PACKET_UPLINK_ACK_NACK_MESSAGE_CONTENT puan;
+ STRUCT_ID_PSI1_MESSAGE_CONTENT psi1;
+ STRUCT_ID_PSI2_MESSAGE_CONTENT psi2;
+ STRUCT_ID_PSI3_MESSAGE_CONTENT psi3;
+ STRUCT_ID_PSI3_BIS_MESSAGE_CONTENT psi3bis;
+ STRUCT_ID_PSI4_MESSAGE_CONTENT psi4;
+ STRUCT_ID_PSI5_MESSAGE_CONTENT psi5;
+ STRUCT_ID_PSI13_MESSAGE_CONTENT psi13;
+ STRUCT_ID_PACKET_CELL_CHANGE_ORDER_MESSAGE_CONTENT pcco;
+ STRUCT_ID_PACKET_DOWNLINK_DUMMY_CONTROL_BLOCK_MESSAGE_CONTENT pkt_dl_dummy;
+ STRUCT_ID_PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT pmo;
+ STRUCT_ID_PACKET_PDCH_RELEASE_MESSAGE_CONTENT pdch_release;
+ STRUCT_ID_PACKET_POLLING_REQUEST_MESSAGE_CONTENT packet_polling;
+ STRUCT_ID_PACKET_POWER_CONTROL_TIMING_ADVANCE_MESSAGE_CONTENT pkt_pc_n_ta;
+ STRUCT_ID_PACKET_PRACH_PARAMETERS_MESSAGE_CONTENT pkt_prach_params;
+ STRUCT_ID_PACKET_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT pkt_timeslot_reconfig;
+ STRUCT_ID_PACKET_CELL_CHANGE_CONTINUE_MESSAGE_CONTENT pccc;
+ STRUCT_ID_PACKET_NEIGHBOUR_CELL_DATA_MESSAGE_CONTENT pncd;
+ STRUCT_ID_PACKET_SERVING_CELL_DATA_MESSAGE_CONTENT pscd;
+ STRUCT_ID_PSI3_TER_MESSAGE_CONTENT psi3ter;
+ STRUCT_ID_PSI3_QUATER_MESSAGE_CONTENT psi3quater;
+ STRUCT_ID_PSI6_MESSAGE_CONTENT psi6;
+ STRUCT_ID_PSI7_MESSAGE_CONTENT psi7;
+ STRUCT_ID_PSI8_MESSAGE_CONTENT psi8;
+ STRUCT_ID_PSI14_MESSAGE_CONTENT psi14;
+ STRUCT_ID_PSI15_MESSAGE_CONTENT psi15;
+ STRUCT_ID_PSI16_MESSAGE_CONTENT psi16;
+ STRUCT_ID_MULTIPLE_TBF_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT mtdas;
+ STRUCT_ID_MULTIPLE_TBF_UPLINK_ASSIGNMENT_MESSAGE_CONTENT mtuas;
+ STRUCT_ID_MULTIPLE_TBF_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT mttr;
+ STRUCT_ID_PS_HANDOVER_COMMAND_MESSAGE_CONTENT ps_ho_command;
+ STRUCT_ID_PACKET_CONTROL_ACKNOWLEDGEMENT_MESSAGE_CONTENT pca;
+ STRUCT_ID_PACKET_CELL_CHANGE_FAILURE_MESSAGE_CONTENT pkt_cell_change_failure;
+ STRUCT_ID_PACKET_CELL_CHANGE_NOTIFICATION_MESSAGE_CONTENT pccn;
+ STRUCT_ID_PACKET_DOWNLINK_ACK_NACK_MESSAGE_CONTENT pdan;
+ STRUCT_ID_EGPRS_PACKET_DOWNLINK_ACK_NACK_MESSAGE_CONTENT egprs_pdan;
+ STRUCT_ID_PACKET_UPLINK_DUMMY_CONTROL_BLOCK_MESSAGE_CONTENT pkt_ul_dummy;
+ STRUCT_ID_PACKET_MEASUREMENT_REPORT_MESSAGE_CONTENT pkt_meas_report;
+ STRUCT_ID_PACKET_MOBILE_TBF_STATUS_MESSAGE_CONTENT ptk_tbfstatus;
+ STRUCT_ID_PACKET_ENHANCED_MEASUREMENT_REPORT_MESSAGE_CONTENT pkt_enh_meas_report;
+ STRUCT_ID_PACKET_RESOURCE_REQUEST_MESSAGE_CONTENT prr;
+ STRUCT_ID_PACKET_PSI_STATUS_MESSAGE_CONTENT psistatus;
+ STRUCT_ID_PACKET_SI_STATUS_MESSAGE_CONTENT pkt_si_status;
+ STRUCT_ID_PACKET_PAUSE_MESSAGE_CONTENT pkt_pause;
+ STRUCT_ID_ADDITIONAL_MS_RADIO_ACCESS_CAPABILITIES_MESSAGE_CONTENT arac;
+};
+
+cdma_2000_description_struct_mi_s_3 cdma_2000_description_struct_mi_s_3_tag cdma_2000_description_struct_mi_s_3_value:
+{
+ CDMA_2000_DESCRIPTION_STRUCT_MI_S_4 m_cdma_2000_description_struct_mi_s_4;
+ CDMA_2000_DESCRIPTION_STRUCT_MI_S_5 m_cdma_2000_description_struct_mi_s_5;
+ CDMA_2000_DESCRIPTION_STRUCT_MI_S_6 m_cdma_2000_description_struct_mi_s_6;
+ CDMA_2000_DESCRIPTION_STRUCT_MI_S_7 m_cdma_2000_description_struct_mi_s_7;
+ CDMA_2000_DESCRIPTION_STRUCT_MI_S_8 m_cdma_2000_description_struct_mi_s_8;
+};
+global_tfi_ie global_tfi_ie_s_0_tag global_tfi_ie_s_0_value:
+{
+ UPLINK_TFI uplink_tfi;
+ DOWNLINK_TFI downlink_tfi;
+};
+gprs_mobile_allocation_ie gprs_mobile_allocation_ie_s_2_tag gprs_mobile_allocation_ie_s_2_value:
+{
+ GPRS_MOBILE_ALLOCATION_IE_S_3 m_gprs_mobile_allocation_ie_s_3;
+ GPRS_MOBILE_ALLOCATION_IE_S_4 m_gprs_mobile_allocation_ie_s_4;
+};
+lsa_id_information_struct_s_1 lsa_id_information_struct_s_2_tag lsa_id_information_struct_s_2_value:
+{
+ LSA_ID lsa_id;
+ SHORTLSA_ID shortlsa_id;
+};
+cdma2000_description_struct_s_3 cdma2000_description_struct_s_3_tag cdma2000_description_struct_s_3_value:
+{
+ CDMA2000_DESCRIPTION_STRUCT_S_4 m_cdma2000_description_struct_s_4;
+ CDMA2000_DESCRIPTION_STRUCT_S_5 m_cdma2000_description_struct_s_5;
+ CDMA2000_DESCRIPTION_STRUCT_S_6 m_cdma2000_description_struct_s_6;
+ CDMA2000_DESCRIPTION_STRUCT_S_7 m_cdma2000_description_struct_s_7;
+ CDMA2000_DESCRIPTION_STRUCT_S_8 m_cdma2000_description_struct_s_8;
+};
+container_repetition_struct exclusion_choice_tag exclusion_choice_value:
+{
+ CONTAINER_DATA m_container_data;
+ CONTAINER_DATA_1 m_container_data_1;
+};
+si13_pbcch_location_struct_1 si13_pbcch_location_struct_1_s_0_tag si13_pbcch_location_struct_1_s_0_value:
+{
+ SI13_LOCATION si13_location;
+ SI13_PBCCH_LOCATION_STRUCT_1_S_1 m_si13_pbcch_location_struct_1_s_1;
+};
+pbcch_description_struct pbcch_description_struct_s_1_tag pbcch_description_struct_s_1_value:
+{
+ ARFCN2 arfcn2;
+ MAIO maio;
+};
+channel_group_struct channel_group_struct_s_1_tag channel_group_struct_s_1_value:
+{
+ CHANNEL_GROUP_STRUCT_ARFCN channel_group_struct_arfcn;
+ CHANNEL_GROUP_STRUCT_S_2 m_channel_group_struct_s_2;
+};
+repeated_page_info_struct_1_s_1 repeated_page_info_struct_1_s_1_tag repeated_page_info_struct_1_s_1_value:
+{
+ PTMSI ptmsi;
+ REPEATED_PAGE_INFO_STRUCT_1_S_2 m_repeated_page_info_struct_1_s_2;
+};
+repeated_page_info_struct_1_s_3 repeated_page_info_struct_1_s_4_tag repeated_page_info_struct_1_s_4_value:
+{
+ TMSI tmsi;
+ REPEATED_PAGE_INFO_STRUCT_1_S_5 m_repeated_page_info_struct_1_s_5;
+};
+repeated_page_info_struct_1 repeated_page_info_struct_1_s_0_tag repeated_page_info_struct_1_s_0_value:
+{
+ REPEATED_PAGE_INFO_STRUCT_1_S_1 m_repeated_page_info_struct_1_s_1;
+ REPEATED_PAGE_INFO_STRUCT_1_S_3 m_repeated_page_info_struct_1_s_3;
+};
+reject_struct_1_s_2 reject_struct_1_s_2_tag reject_struct_1_s_2_value:
+{
+ PACKET_REQUEST_REFERENCE packet_request_reference;
+ GLOBAL_TFI global_tfi;
+};
+reject_struct_1 reject_struct_1_s_1_tag reject_struct_1_s_1_value:
+{
+ TLLI___G_RNTI tlli___g_rnti;
+ REJECT_STRUCT_1_S_2 m_reject_struct_1_s_2;
+};
+downlink_tbf_assignment_struct_for_mttr downlink_tbf_assignment_struct_for_mttr_s_1_tag downlink_tbf_assignment_struct_for_mttr_s_1_value:
+{
+ RB_ID rb_id;
+ DOWNLINK_TBF_ASSIGNMENT_STRUCT_FOR_MTTR_S_2 m_downlink_tbf_assignment_struct_for_mttr_s_2;
+};
+uplink_tbf_assignment_struct uplink_tbf_assignment_struct_s_6_tag uplink_tbf_assignment_struct_s_6_value:
+{
+ USF_ALLOCATION usf_allocation;
+ UPLINK_TBF_ASSIGNMENT_STRUCT_S_7 m_uplink_tbf_assignment_struct_s_7;
+};
+timeslot_description_struct timeslot_description_struct_s_0_tag timeslot_description_struct_s_0_value:
+{
+ MS_TIMESLOT_ALLOCATION ms_timeslot_allocation;
+ TIMESLOT_DESCRIPTION_STRUCT_S_1 m_timeslot_description_struct_s_1;
+};
+downlink_tbf_assignment_struct downlink_tbf_assignment_struct_s_1_tag downlink_tbf_assignment_struct_s_1_value:
+{
+ DOWNLINK_TBF_ASSIGNMENT_STRUCT_RB_ID rb_id;
+ DOWNLINK_TBF_ASSIGNMENT_STRUCT_S_2 m_downlink_tbf_assignment_struct_s_2;
+};
+dynamic_allocation_2_struct_s_9 dynamic_allocation_2_struct_s_11_tag dynamic_allocation_2_struct_s_11_value:
+{
+ DYNAMIC_ALLOCATION_2_STRUCT_S_12 m_dynamic_allocation_2_struct_s_12;
+ DYNAMIC_ALLOCATION_2_STRUCT_S_15 m_dynamic_allocation_2_struct_s_15;
+};
+dynamic_allocation_2_struct dynamic_allocation_2_struct_s_6_tag dynamic_allocation_2_struct_s_6_value:
+{
+ DYNAMIC_ALLOCATION_2_STRUCT_S_7 m_dynamic_allocation_2_struct_s_7;
+ DYNAMIC_ALLOCATION_2_STRUCT_S_9 m_dynamic_allocation_2_struct_s_9;
+};
+timeslot_description_2_struct timeslot_description_2_struct_s_0_tag timeslot_description_2_struct_s_0_value:
+{
+ TIMESLOT_DESCRIPTION_2_STRUCT_S_1 m_timeslot_description_2_struct_s_1;
+ TIMESLOT_DESCRIPTION_2_STRUCT_S_3 m_timeslot_description_2_struct_s_3;
+};
+dual_carrier_timeslot_description_struct dual_carrier_timeslot_description_struct_s_0_tag dual_carrier_timeslot_description_struct_s_0_value:
+{
+ DUAL_CARRIER_TIMESLOT_DESCRIPTION_STRUCT_S_1 m_dual_carrier_timeslot_description_struct_s_1;
+ DUAL_CARRIER_TIMESLOT_DESCRIPTION_STRUCT_S_3 m_dual_carrier_timeslot_description_struct_s_3;
+};
+uplink_tbf_assignment_2_struct uplink_tbf_assignment_2_struct_s_8_tag uplink_tbf_assignment_2_struct_s_8_value:
+{
+ UPLINK_TBF_ASSIGNMENT_2_STRUCT_S_9 m_uplink_tbf_assignment_2_struct_s_9;
+ UPLINK_TBF_ASSIGNMENT_2_STRUCT_S_11 m_uplink_tbf_assignment_2_struct_s_11;
+};
+pdch_pairs_description_ie_s_1 pdch_pairs_description_ie_s_1_tag pdch_pairs_description_ie_s_1_value:
+{
+ PDCH_PAIRS_DESCRIPTION_IE_S_2 m_pdch_pairs_description_ie_s_2;
+};
+pdch_pairs_description_ie_s_3 pdch_pairs_description_ie_s_3_tag pdch_pairs_description_ie_s_3_value:
+{
+ PDCH_PAIRS_DESCRIPTION_IE_S_4 m_pdch_pairs_description_ie_s_4;
+};
+pdch_pairs_description_ie pdch_pairs_description_ie_s_0_tag pdch_pairs_description_ie_s_0_value:
+{
+ PDCH_PAIRS_DESCRIPTION_IE_S_1 m_pdch_pairs_description_ie_s_1;
+ PDCH_PAIRS_DESCRIPTION_IE_S_3 m_pdch_pairs_description_ie_s_3;
+};
+pulse_format_ie pulse_format_ie_s_0_tag pulse_format_ie_s_0_value:
+{
+ PULSE_FORMAT_CODING_1 pulse_format_coding_1;
+ PULSE_FORMAT_CODING_2 pulse_format_coding_2;
+};
+uplink_tbf_assignment_2_struct_for_mttr uplink_tbf_assignment_2_struct_for_mttr_s_8_tag uplink_tbf_assignment_2_struct_for_mttr_s_8_value:
+{
+ UPLINK_TBF_ASSIGNMENT_2_STRUCT_FOR_MTTR_S_9 m_uplink_tbf_assignment_2_struct_for_mttr_s_9;
+ UPLINK_TBF_ASSIGNMENT_2_STRUCT_FOR_MTTR_S_11 m_uplink_tbf_assignment_2_struct_for_mttr_s_11;
+};
+uplink_tbf_assignment_2_struct_in_ps_ho_rr_2 uplink_tbf_assignment_2_struct_in_ps_ho_rr_2_s_9_tag uplink_tbf_assignment_2_struct_in_ps_ho_rr_2_s_9_value:
+{
+ UPLINK_TBF_ASSIGNMENT_2_STRUCT_IN_PS_HO_RR_2_S_10 m_uplink_tbf_assignment_2_struct_in_ps_ho_rr_2_s_10;
+ UPLINK_TBF_ASSIGNMENT_2_STRUCT_IN_PS_HO_RR_2_S_12 m_uplink_tbf_assignment_2_struct_in_ps_ho_rr_2_s_12;
+};
+bep_measurement_report_struct_s_2 bep_measurement_report_struct_s_2_tag bep_measurement_report_struct_s_2_value:
+{
+ GMSK_MEAN_BEP__TN0 gmsk_mean_bep__tn0;
+ P_8_PSK_MEAN_BEP__TN0 p_8_psk_mean_bep__tn0;
+};
+bep_measurement_report_struct_s_4 bep_measurement_report_struct_s_4_tag bep_measurement_report_struct_s_4_value:
+{
+ GMSK_MEAN_BEP__TN1 gmsk_mean_bep__tn1;
+ P_8_PSK_MEAN_BEP__TN1 p_8_psk_mean_bep__tn1;
+};
+bep_measurement_report_struct_s_6 bep_measurement_report_struct_s_6_tag bep_measurement_report_struct_s_6_value:
+{
+ GMSK_MEAN_BEP__TN2 gmsk_mean_bep__tn2;
+ P_8_PSK_MEAN_BEP__TN2 p_8_psk_mean_bep__tn2;
+};
+bep_measurement_report_struct_s_8 bep_measurement_report_struct_s_8_tag bep_measurement_report_struct_s_8_value:
+{
+ GMSK_MEAN_BEP__TN3 gmsk_mean_bep__tn3;
+ P_8_PSK_MEAN_BEP__TN3 p_8_psk_mean_bep__tn3;
+};
+bep_measurement_report_struct_s_10 bep_measurement_report_struct_s_10_tag bep_measurement_report_struct_s_10_value:
+{
+ GMSK_MEAN_BEP__TN4 gmsk_mean_bep__tn4;
+ P_8_PSK_MEAN_BEP__TN4 p_8_psk_mean_bep__tn4;
+};
+bep_measurement_report_struct_s_12 bep_measurement_report_struct_s_12_tag bep_measurement_report_struct_s_12_value:
+{
+ GMSK_MEAN_BEP__TN5 gmsk_mean_bep__tn5;
+ P_8_PSK_MEAN_BEP__TN5 p_8_psk_mean_bep__tn5;
+};
+bep_measurement_report_struct_s_14 bep_measurement_report_struct_s_14_tag bep_measurement_report_struct_s_14_value:
+{
+ GMSK_MEAN_BEP__TN6 gmsk_mean_bep__tn6;
+ P_8_PSK_MEAN_BEP__TN6 p_8_psk_mean_bep__tn6;
+};
+bep_measurement_report_struct_s_16 bep_measurement_report_struct_s_16_tag bep_measurement_report_struct_s_16_value:
+{
+ GMSK_MEAN_BEP__TN7 gmsk_mean_bep__tn7;
+ P_8_PSK_MEAN_BEP__TN7 p_8_psk_mean_bep__tn7;
+};
+si_message_list_struct_s_1 si_message_list_struct_s_2_tag si_message_list_struct_s_2_value:
+{
+ SI_MESSAGE_LIST_STRUCT_S_3 m_si_message_list_struct_s_3;
+ SIX_CHANGE_MARK six_change_mark;
+};
+enhanced_measurement_report_struct_s_6 enhanced_measurement_report_struct_s_9_tag enhanced_measurement_report_struct_s_9_value:
+{
+ ENHANCED_MEASUREMENT_REPORT_STRUCT_S_9_BIT m_enhanced_measurement_report_struct_s_9_bit;
+ ENHANCED_MEASUREMENT_REPORT_STRUCT_S_10 m_enhanced_measurement_report_struct_s_10;
+};
+enhanced_measurement_report_struct enhanced_measurement_report_struct_s_5_tag enhanced_measurement_report_struct_s_5_value:
+{
+ ENHANCED_MEASUREMENT_REPORT_STRUCT_S_5_BIT m_enhanced_measurement_report_struct_s_5_bit;
+ ENHANCED_MEASUREMENT_REPORT_STRUCT_S_6 m_enhanced_measurement_report_struct_s_6;
+};
+gas_meas_content_struct_s_2 gas_meas_content_struct_s_4_tag gas_meas_content_struct_s_4_value:
+{
+ UTRAN_CSG_MEASUREMENT_REPORT utran_csg_measurement_report;
+};
+gas_meas_content_struct gas_meas_content_struct_s_1_tag gas_meas_content_struct_s_1_value:
+{
+ GAS_MEAS_CONTENT_STRUCT_S_2 m_gas_meas_content_struct_s_2;
+};
+fixed_allocation_struct_s_2 fixed_allocation_struct_s_6_tag fixed_allocation_struct_s_6_value:
+{
+ FIXED_ALLOCATION_STRUCT_S_7 m_fixed_allocation_struct_s_7;
+ ALLOCATION_BITMAP m_allocation_bitmap;
+};
+fixed_allocation_struct fixed_allocation_struct_s_1_tag fixed_allocation_struct_s_1_value:
+{
+ TS_OVERRIDE ts_override;
+ FIXED_ALLOCATION_STRUCT_S_2 m_fixed_allocation_struct_s_2;
+};
+egprs_ack_nack_description_ie egprs_ack_nack_description_ie_s_0_tag egprs_ack_nack_description_ie_s_0_value:
+{
+ M_EGPRS_ACK_NACK_DESCRIPTION_STRUCT m_egprs_ack_nack_description_struct;
+ EGPRS_ACK_NACK_DESCRIPTION_IE_S_1 m_egprs_ack_nack_description_ie_s_1;
+};
+ccch_access_information_struct_s_4 ccch_access_information_struct_s_5_tag ccch_access_information_struct_s_5_value:
+{
+ CCCH_ACCESS_INFORMATION_STRUCT_S_5_BIT m_ccch_access_information_struct_s_5_bit;
+ CCCH_ACCESS_INFORMATION_STRUCT_S_6 m_ccch_access_information_struct_s_6;
+};
+ccch_access_information_struct ccch_access_information_struct_s_3_tag ccch_access_information_struct_s_3_value:
+{
+ CCCH_ACCESS_INFORMATION_STRUCT_S_3_BIT m_ccch_access_information_struct_s_3_bit;
+ CCCH_ACCESS_INFORMATION_STRUCT_S_4 m_ccch_access_information_struct_s_4;
+};
+ncp2_repeat_struct_s_1 ncp2_repeat_struct_s_2_tag ncp2_repeat_struct_s_2_value:
+{
+ NCP2_REPEAT_STRUCT_S_3 m_ncp2_repeat_struct_s_3;
+};
+compact_ncp2_repeat_struct_s_1 compact_ncp2_repeat_struct_s_2_tag compact_ncp2_repeat_struct_s_2_value:
+{
+ COMPACT_NCP2_REPEAT_STRUCT_S_3 m_compact_ncp2_repeat_struct_s_3;
+};
+repeated_iu_page_info_struct_s_1 repeated_iu_page_info_struct_s_2_tag repeated_iu_page_info_struct_s_2_value:
+{
+ REPEATED_IU_PAGE_INFO_STRUCT_TMSI tmsi;
+ REPEATED_IU_PAGE_INFO_STRUCT_PTMSI ptmsi;
+ REPEATED_IU_PAGE_INFO_STRUCT_S_3 m_repeated_iu_page_info_struct_s_3;
+};
+repeated_iu_page_info_struct repeated_iu_page_info_struct_s_0_tag repeated_iu_page_info_struct_s_0_value:
+{
+ G_RNTI g_rnti;
+ REPEATED_IU_PAGE_INFO_STRUCT_S_1 m_repeated_iu_page_info_struct_s_1;
+};
+dynamic_allocation_struct dynamic_allocation_struct_s_6_tag dynamic_allocation_struct_s_6_value:
+{
+ TIMESLOT_ALLOCATION timeslot_allocation;
+ TIMESLOT_ALLOCATION_WITH_POWER_CONTROL timeslot_allocation_with_power_control;
+};
+dynamic_allocation_in_ptr_struct dynamic_allocation_in_ptr_struct_s_5_tag dynamic_allocation_in_ptr_struct_s_5_value:
+{
+ DYNAMIC_ALLOCATION_IN_PTR_STRUCT_TIMESLOT_ALLOCATION timeslot_allocation;
+ DYNAMIC_ALLOCATION_IN_PTR_STRUCT_TIMESLOT_ALLOCATION_WITH_POWER_CONTROL timeslot_allocation_with_power_control;
+};
+dual_carrier_frequency_parameters_ie dual_carrier_frequency_parameters_ie_s_1_tag dual_carrier_frequency_parameters_ie_s_1_value:
+{
+ DUAL_CARRIER_FREQUENCY_PARAMETERS_IE_S_2 m_dual_carrier_frequency_parameters_ie_s_2;
+ INDIRECT_ENCODING indirect_encoding;
+ DIRECT_ENCODING_1 direct_encoding_1;
+ DIRECT_ENCODING_2 direct_encoding_2;
+};
+pdch_pairs_description_ie_for_mttr_s_1 pdch_pairs_description_ie_for_mttr_s_2_tag pdch_pairs_description_ie_for_mttr_s_2_value:
+{
+ PDCH_PAIRS_DESCRIPTION_IE_FOR_MTTR_S_3 m_pdch_pairs_description_ie_for_mttr_s_3;
+};
+pdch_pairs_description_ie_for_mttr_s_5 pdch_pairs_description_ie_for_mttr_s_6_tag pdch_pairs_description_ie_for_mttr_s_6_value:
+{
+ PDCH_PAIRS_DESCRIPTION_IE_FOR_MTTR_S_7 m_pdch_pairs_description_ie_for_mttr_s_7;
+};
+pdch_pairs_description_ie_for_mttr pdch_pairs_description_ie_for_mttr_s_0_tag pdch_pairs_description_ie_for_mttr_s_0_value:
+{
+ PDCH_PAIRS_DESCRIPTION_IE_FOR_MTTR_S_1 m_pdch_pairs_description_ie_for_mttr_s_1;
+ PDCH_PAIRS_DESCRIPTION_IE_FOR_MTTR_S_5 m_pdch_pairs_description_ie_for_mttr_s_5;
+};
+packet_control_acknowledgement_message_content_s_2 packet_control_acknowledgement_message_content_s_5_tag packet_control_acknowledgement_message_content_s_5_value:
+{
+ PACKET_CONTROL_ACKNOWLEDGEMENT_MESSAGE_CONTENT_S_5_BIT m_packet_control_acknowledgement_message_content_s_5_bit;
+ PACKET_CONTROL_ACKNOWLEDGEMENT_MESSAGE_CONTENT_S_6 m_packet_control_acknowledgement_message_content_s_6;
+};
+packet_control_acknowledgement_message_content packet_control_acknowledgement_message_content_s_1_tag packet_control_acknowledgement_message_content_s_1_value:
+{
+ PACKET_CONTROL_ACKNOWLEDGEMENT_MESSAGE_CONTENT_S_1_BIT m_packet_control_acknowledgement_message_content_s_1_bit;
+ PACKET_CONTROL_ACKNOWLEDGEMENT_MESSAGE_CONTENT_S_2 m_packet_control_acknowledgement_message_content_s_2;
+};
+packet_control_acknowledgement_11_bit_message packet_control_acknowledgement_11_bit_message_s_1_tag packet_control_acknowledgement_11_bit_message_s_1_value:
+{
+ PACKET_CONTROL_ACKNOWLEDGEMENT_11_BIT_MESSAGE_S_2 m_packet_control_acknowledgement_11_bit_message_s_2;
+};
+packet_control_acknowledgement_8_bit_message packet_control_acknowledgement_8_bit_message_s_1_tag packet_control_acknowledgement_8_bit_message_s_1_value:
+{
+ TN_RRBP tn_rrbp;
+};
+packet_cell_change_failure_message_content_s_9 packet_cell_change_failure_message_content_s_11_tag packet_cell_change_failure_message_content_s_11_value:
+{
+ PACKET_CELL_CHANGE_FAILURE_MESSAGE_CONTENT_S_11_BIT m_packet_cell_change_failure_message_content_s_11_bit;
+ PACKET_CELL_CHANGE_FAILURE_MESSAGE_CONTENT_S_12 m_packet_cell_change_failure_message_content_s_12;
+};
+packet_cell_change_failure_message_content_s_6 packet_cell_change_failure_message_content_s_8_tag packet_cell_change_failure_message_content_s_8_value:
+{
+ PACKET_CELL_CHANGE_FAILURE_MESSAGE_CONTENT_S_8_BIT m_packet_cell_change_failure_message_content_s_8_bit;
+ PACKET_CELL_CHANGE_FAILURE_MESSAGE_CONTENT_S_9 m_packet_cell_change_failure_message_content_s_9;
+};
+packet_cell_change_failure_message_content_s_2 packet_cell_change_failure_message_content_s_5_tag packet_cell_change_failure_message_content_s_5_value:
+{
+ PACKET_CELL_CHANGE_FAILURE_MESSAGE_CONTENT_S_5_BIT m_packet_cell_change_failure_message_content_s_5_bit;
+ PACKET_CELL_CHANGE_FAILURE_MESSAGE_CONTENT_S_6 m_packet_cell_change_failure_message_content_s_6;
+};
+packet_cell_change_failure_message_content packet_cell_change_failure_message_content_s_1_tag packet_cell_change_failure_message_content_s_1_value:
+{
+ PACKET_CELL_CHANGE_FAILURE_MESSAGE_CONTENT_S_1_BIT m_packet_cell_change_failure_message_content_s_1_bit;
+ PACKET_CELL_CHANGE_FAILURE_MESSAGE_CONTENT_S_2 m_packet_cell_change_failure_message_content_s_2;
+};
+packet_cell_change_notification_message_content_s_9 packet_cell_change_notification_message_content_s_10_tag packet_cell_change_notification_message_content_s_10_value:
+{
+ UTRAN_CSG_TARGET_CELL_MEASUREMENT_REPORT utran_csg_target_cell_measurement_report;
+ E_UTRAN_CSG_TARGET_CELL_MEASUREMENT_REPORT e_utran_csg_target_cell_measurement_report;
+};
+packet_cell_change_notification_message_content_s_14 packet_cell_change_notification_message_content_s_16_tag packet_cell_change_notification_message_content_s_16_value:
+{
+ PACKET_CELL_CHANGE_NOTIFICATION_MESSAGE_CONTENT_S_16_BIT m_packet_cell_change_notification_message_content_s_16_bit;
+ PACKET_CELL_CHANGE_NOTIFICATION_MESSAGE_CONTENT_S_17 m_packet_cell_change_notification_message_content_s_17;
+};
+packet_cell_change_notification_message_content packet_cell_change_notification_message_content_s_1_tag packet_cell_change_notification_message_content_s_1_value:
+{
+ PACKET_CELL_CHANGE_NOTIFICATION_MESSAGE_CONTENT_S_2 m_packet_cell_change_notification_message_content_s_2;
+ P_3_G_TARGET_CELL p_3_g_target_cell;
+ PACKET_CELL_CHANGE_NOTIFICATION_MESSAGE_CONTENT_S_3 m_packet_cell_change_notification_message_content_s_3;
+ PACKET_CELL_CHANGE_NOTIFICATION_MESSAGE_CONTENT_S_9 m_packet_cell_change_notification_message_content_s_9;
+};
+packet_cell_change_notification_message_content packet_cell_change_notification_message_content_s_12_tag packet_cell_change_notification_message_content_s_12_value:
+{
+ BA_USED ba_used;
+ PSI3_CHANGE_MARK psi3_change_mark;
+};
+packet_cell_change_notification_message_content packet_cell_change_notification_message_content_s_13_tag packet_cell_change_notification_message_content_s_13_value:
+{
+ PACKET_CELL_CHANGE_NOTIFICATION_MESSAGE_CONTENT_S_13_BIT m_packet_cell_change_notification_message_content_s_13_bit;
+ PACKET_CELL_CHANGE_NOTIFICATION_MESSAGE_CONTENT_S_14 m_packet_cell_change_notification_message_content_s_14;
+};
+packet_downlink_ack_nack_message_content_s_6 packet_downlink_ack_nack_message_content_s_10_tag packet_downlink_ack_nack_message_content_s_10_value:
+{
+ PACKET_DOWNLINK_ACK_NACK_MESSAGE_CONTENT_S_10_BIT m_packet_downlink_ack_nack_message_content_s_10_bit;
+ PACKET_DOWNLINK_ACK_NACK_MESSAGE_CONTENT_S_11 m_packet_downlink_ack_nack_message_content_s_11;
+};
+packet_downlink_ack_nack_message_content_s_3 packet_downlink_ack_nack_message_content_s_5_tag packet_downlink_ack_nack_message_content_s_5_value:
+{
+ PACKET_DOWNLINK_ACK_NACK_MESSAGE_CONTENT_S_5_BIT m_packet_downlink_ack_nack_message_content_s_5_bit;
+ PACKET_DOWNLINK_ACK_NACK_MESSAGE_CONTENT_S_6 m_packet_downlink_ack_nack_message_content_s_6;
+};
+packet_downlink_ack_nack_message_content packet_downlink_ack_nack_message_content_s_2_tag packet_downlink_ack_nack_message_content_s_2_value:
+{
+ PACKET_DOWNLINK_ACK_NACK_MESSAGE_CONTENT_S_2_BIT m_packet_downlink_ack_nack_message_content_s_2_bit;
+ PACKET_DOWNLINK_ACK_NACK_MESSAGE_CONTENT_S_3 m_packet_downlink_ack_nack_message_content_s_3;
+};
+packet_uplink_dummy_control_block_message_content packet_uplink_dummy_control_block_message_content_s_1_tag packet_uplink_dummy_control_block_message_content_s_1_value:
+{
+ PACKET_UPLINK_DUMMY_CONTROL_BLOCK_MESSAGE_CONTENT_S_1_BIT m_packet_uplink_dummy_control_block_message_content_s_1_bit;
+ PACKET_UPLINK_DUMMY_CONTROL_BLOCK_MESSAGE_CONTENT_S_2 m_packet_uplink_dummy_control_block_message_content_s_2;
+};
+packet_measurement_report_message_content_s_6 packet_measurement_report_message_content_s_7_tag packet_measurement_report_message_content_s_7_value:
+{
+ PACKET_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_8 m_packet_measurement_report_message_content_s_8;
+ PACKET_MEASUREMENT_REPORT_MESSAGE_CONTENT_PSI3_CHANGE_MARK psi3_change_mark;
+};
+packet_measurement_report_message_content_s_14 packet_measurement_report_message_content_s_16_tag packet_measurement_report_message_content_s_16_value:
+{
+ PACKET_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_16_BIT m_packet_measurement_report_message_content_s_16_bit;
+ PACKET_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_17 m_packet_measurement_report_message_content_s_17;
+};
+packet_measurement_report_message_content_s_11 packet_measurement_report_message_content_s_13_tag packet_measurement_report_message_content_s_13_value:
+{
+ PACKET_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_13_BIT m_packet_measurement_report_message_content_s_13_bit;
+ PACKET_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_14 m_packet_measurement_report_message_content_s_14;
+};
+packet_measurement_report_message_content_s_4 packet_measurement_report_message_content_s_10_tag packet_measurement_report_message_content_s_10_value:
+{
+ PACKET_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_10_BIT m_packet_measurement_report_message_content_s_10_bit;
+ PACKET_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_11 m_packet_measurement_report_message_content_s_11;
+};
+packet_measurement_report_message_content packet_measurement_report_message_content_s_2_tag packet_measurement_report_message_content_s_2_value:
+{
+ NC_MEASUREMENT_REPORT nc_measurement_report;
+ EXT_MEASUREMENT_REPORT ext_measurement_report;
+};
+packet_measurement_report_message_content packet_measurement_report_message_content_s_3_tag packet_measurement_report_message_content_s_3_value:
+{
+ PACKET_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_3_BIT m_packet_measurement_report_message_content_s_3_bit;
+ PACKET_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_4 m_packet_measurement_report_message_content_s_4;
+};
+packet_psi_status_message_content packet_psi_status_message_content_s_1_tag packet_psi_status_message_content_s_1_value:
+{
+ PACKET_PSI_STATUS_MESSAGE_CONTENT_S_1_BIT m_packet_psi_status_message_content_s_1_bit;
+ PACKET_PSI_STATUS_MESSAGE_CONTENT_S_2 m_packet_psi_status_message_content_s_2;
+};
+packet_si_status_message_content packet_si_status_message_content_s_1_tag packet_si_status_message_content_s_1_value:
+{
+ PACKET_SI_STATUS_MESSAGE_CONTENT_S_1_BIT m_packet_si_status_message_content_s_1_bit;
+ PACKET_SI_STATUS_MESSAGE_CONTENT_S_2 m_packet_si_status_message_content_s_2;
+};
+additional_ms_radio_access_capabilities_message_content additional_ms_radio_access_capabilities_message_content_s_1_tag additional_ms_radio_access_capabilities_message_content_s_1_value:
+{
+ ADDITIONAL_MS_RADIO_ACCESS_CAPABILITIES_MESSAGE_CONTENT_GLOBAL_TFI global_tfi;
+ TLLI tlli;
+};
+nc_measurement_report_struct_en nc_measurement_report_struct_en_s_1_tag nc_measurement_report_struct_en_s_1_value:
+{
+ NC_MEASUREMENT_REPORT_STRUCT_EN_S_2 m_nc_measurement_report_struct_en_s_2;
+ NC_MEASUREMENT_REPORT_STRUCT_EN_PSI3_CHANGE_MARK psi3_change_mark;
+};
+frequency_parameters_ie frequency_parameters_ie_s_1_tag frequency_parameters_ie_s_1_value:
+{
+ ARFCN1 arfcn1;
+ FREQUENCY_PARAMETERS_IE_INDIRECT_ENCODING indirect_encoding;
+ FREQUENCY_PARAMETERS_IE_DIRECT_ENCODING_1 direct_encoding_1;
+ FREQUENCY_PARAMETERS_IE_DIRECT_ENCODING_2 direct_encoding_2;
+};
+fixed_allocation_struct_2 fixed_allocation_struct_2_s_1_tag fixed_allocation_struct_2_s_1_value:
+{
+ UPLINK_TIMESLOT_ALLOCATION uplink_timeslot_allocation;
+ POWER_CONTROL_PARAMETERS power_control_parameters;
+};
+fixed_allocation_struct_2 fixed_allocation_struct_2_s_7_tag fixed_allocation_struct_2_s_7_value:
+{
+ FIXED_ALLOCATION_STRUCT_2_S_8 m_fixed_allocation_struct_2_s_8;
+ ALLOCATION_BITMAP_1 m_allocation_bitmap_1;
+};
+pbcch_description_struct_2 pbcch_description_struct_2_s_1_tag pbcch_description_struct_2_s_1_value:
+{
+ PBCCH_DESCRIPTION_STRUCT_2_S_1_BIT m_pbcch_description_struct_2_s_1_bit;
+ PSI_CHANGED_IND psi_changed_ind;
+};
+pccch_description_struct_1 pccch_description_struct_1_s_1_tag pccch_description_struct_1_s_1_value:
+{
+ NON_HOPPING_PCCCH_CARRIERS non_hopping_pccch_carriers;
+ PCCCH_DESCRIPTION_STRUCT_1_S_2 m_pccch_description_struct_1_s_2;
+};
+em1_struct_s_2 em1_struct_s_2_tag em1_struct_s_2_value:
+{
+ NCC_PERMITTED ncc_permitted;
+ EM1_STRUCT_S_3 m_em1_struct_s_3;
+};
+ps_handover_radio_resources_ie ps_handover_radio_resources_ie_s_11_tag ps_handover_radio_resources_ie_s_11_value:
+{
+ GPRS_MODE gprs_mode;
+ EGPRS_MODE egprs_mode;
+};
+egprs_mode_struct_in_ps_ho_rr_2_s_19 egprs_mode_struct_in_ps_ho_rr_2_s_20_tag egprs_mode_struct_in_ps_ho_rr_2_s_20_value:
+{
+ EGPRS_MODE_STRUCT_IN_PS_HO_RR_2_S_21 m_egprs_mode_struct_in_ps_ho_rr_2_s_21;
+};
+egprs_mode_struct_in_ps_ho_rr_2_s_23 egprs_mode_struct_in_ps_ho_rr_2_s_24_tag egprs_mode_struct_in_ps_ho_rr_2_s_24_value:
+{
+ EGPRS_MODE_STRUCT_IN_PS_HO_RR_2_S_25 m_egprs_mode_struct_in_ps_ho_rr_2_s_25;
+};
+egprs_mode_struct_in_ps_ho_rr_2_s_18 egprs_mode_struct_in_ps_ho_rr_2_s_18_tag egprs_mode_struct_in_ps_ho_rr_2_s_18_value:
+{
+ EGPRS_MODE_STRUCT_IN_PS_HO_RR_2_S_19 m_egprs_mode_struct_in_ps_ho_rr_2_s_19;
+ EGPRS_MODE_STRUCT_IN_PS_HO_RR_2_S_23 m_egprs_mode_struct_in_ps_ho_rr_2_s_23;
+};
+packet_enhanced_measurement_report_message_content_s_6 packet_enhanced_measurement_report_message_content_s_9_tag packet_enhanced_measurement_report_message_content_s_9_value:
+{
+ PACKET_ENHANCED_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_9_BIT m_packet_enhanced_measurement_report_message_content_s_9_bit;
+ PACKET_ENHANCED_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_10 m_packet_enhanced_measurement_report_message_content_s_10;
+};
+packet_enhanced_measurement_report_message_content_s_3 packet_enhanced_measurement_report_message_content_s_5_tag packet_enhanced_measurement_report_message_content_s_5_value:
+{
+ PACKET_ENHANCED_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_5_BIT m_packet_enhanced_measurement_report_message_content_s_5_bit;
+ PACKET_ENHANCED_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_6 m_packet_enhanced_measurement_report_message_content_s_6;
+};
+packet_enhanced_measurement_report_message_content packet_enhanced_measurement_report_message_content_s_2_tag packet_enhanced_measurement_report_message_content_s_2_value:
+{
+ PACKET_ENHANCED_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_2_BIT m_packet_enhanced_measurement_report_message_content_s_2_bit;
+ PACKET_ENHANCED_MEASUREMENT_REPORT_MESSAGE_CONTENT_S_3 m_packet_enhanced_measurement_report_message_content_s_3;
+};
+packet_resource_request_message_content_s_20 packet_resource_request_message_content_s_25_tag packet_resource_request_message_content_s_25_value:
+{
+ PACKET_RESOURCE_REQUEST_MESSAGE_CONTENT_S_25_BIT m_packet_resource_request_message_content_s_25_bit;
+ PACKET_RESOURCE_REQUEST_MESSAGE_CONTENT_S_26 m_packet_resource_request_message_content_s_26;
+};
+packet_resource_request_message_content_s_15 packet_resource_request_message_content_s_19_tag packet_resource_request_message_content_s_19_value:
+{
+ PACKET_RESOURCE_REQUEST_MESSAGE_CONTENT_S_19_BIT m_packet_resource_request_message_content_s_19_bit;
+ PACKET_RESOURCE_REQUEST_MESSAGE_CONTENT_S_20 m_packet_resource_request_message_content_s_20;
+};
+packet_resource_request_message_content packet_resource_request_message_content_s_2_tag packet_resource_request_message_content_s_2_value:
+{
+ PACKET_RESOURCE_REQUEST_MESSAGE_CONTENT_GLOBAL_TFI global_tfi;
+ PACKET_RESOURCE_REQUEST_MESSAGE_CONTENT_TLLI___G_RNTI tlli___g_rnti;
+};
+packet_resource_request_message_content packet_resource_request_message_content_s_14_tag packet_resource_request_message_content_s_14_value:
+{
+ PACKET_RESOURCE_REQUEST_MESSAGE_CONTENT_S_14_BIT m_packet_resource_request_message_content_s_14_bit;
+ PACKET_RESOURCE_REQUEST_MESSAGE_CONTENT_S_15 m_packet_resource_request_message_content_s_15;
+};
+header_struct1 pay_load_tag pay_load_value:
+{
+ DATA_BLK_HDR data_blk_hdr;
+ CTRL_BLK_HDR1 ctrl_blk_hdr1;
+ CTRL_BLK_HDR2 ctrl_blk_hdr2;
+};
+packet_timeslot_reconfigure_message_content_s_14 packet_timeslot_reconfigure_message_content_s_18_tag packet_timeslot_reconfigure_message_content_s_18_value:
+{
+ PACKET_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_S_18_BIT m_packet_timeslot_reconfigure_message_content_s_18_bit;
+ PACKET_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_S_19 m_packet_timeslot_reconfigure_message_content_s_19;
+};
+packet_timeslot_reconfigure_message_content_s_11 packet_timeslot_reconfigure_message_content_s_13_tag packet_timeslot_reconfigure_message_content_s_13_value:
+{
+ PACKET_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_S_13_BIT m_packet_timeslot_reconfigure_message_content_s_13_bit;
+ PACKET_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_S_14 m_packet_timeslot_reconfigure_message_content_s_14;
+};
+packet_timeslot_reconfigure_message_content_s_5 packet_timeslot_reconfigure_message_content_s_9_tag packet_timeslot_reconfigure_message_content_s_9_value:
+{
+ DYNAMIC_ALLOCATION dynamic_allocation;
+ FIXED_ALLOCATION fixed_allocation;
+};
+packet_timeslot_reconfigure_message_content_s_5 packet_timeslot_reconfigure_message_content_s_10_tag packet_timeslot_reconfigure_message_content_s_10_value:
+{
+ PACKET_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_S_10_BIT m_packet_timeslot_reconfigure_message_content_s_10_bit;
+ PACKET_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_S_11 m_packet_timeslot_reconfigure_message_content_s_11;
+};
+s_40 s_44_tag s_44_value:
+{
+ S_44_BIT m_s_44_bit;
+ S_45 m_s_45;
+};
+s_35 s_39_tag s_39_value:
+{
+ S_39_BIT m_s_39_bit;
+ S_40 m_s_40;
+};
+s_25 s_33_tag s_33_value:
+{
+ PACKET_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_DYNAMIC_ALLOCATION dynamic_allocation;
+ PACKET_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_FIXED_ALLOCATION fixed_allocation;
+};
+s_25 s_34_tag s_34_value:
+{
+ S_34_BIT m_s_34_bit;
+ S_35 m_s_35;
+};
+s_23 s_23_tag s_23_value:
+{
+ S_24 m_s_25;
+};
+packet_timeslot_reconfigure_message_content packet_timeslot_reconfigure_message_content_s_3_tag packet_timeslot_reconfigure_message_content_s_3_value:
+{
+ PACKET_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_S_4 m_packet_timeslot_reconfigure_message_content_s_5;
+ S_23 m_s_23;
+};
+packet_uplink_ack_nack_message_content_s_12 packet_uplink_ack_nack_message_content_s_14_tag packet_uplink_ack_nack_message_content_s_14_value:
+{
+ PACKET_UPLINK_ACK_NACK_MESSAGE_CONTENT_S_14_BIT m_packet_uplink_ack_nack_message_content_s_14_bit;
+ PACKET_UPLINK_ACK_NACK_MESSAGE_CONTENT_S_15 m_packet_uplink_ack_nack_message_content_s_15;
+};
+packet_uplink_ack_nack_message_content_s_5 packet_uplink_ack_nack_message_content_s_11_tag packet_uplink_ack_nack_message_content_s_11_value:
+{
+ PACKET_UPLINK_ACK_NACK_MESSAGE_CONTENT_S_11_BIT m_packet_uplink_ack_nack_message_content_s_11_bit;
+ PACKET_UPLINK_ACK_NACK_MESSAGE_CONTENT_S_12 m_packet_uplink_ack_nack_message_content_s_12;
+};
+packet_uplink_ack_nack_message_content_s_21 packet_uplink_ack_nack_message_content_s_29_tag packet_uplink_ack_nack_message_content_s_29_value:
+{
+ PACKET_UPLINK_ACK_NACK_MESSAGE_CONTENT_S_29_BIT m_packet_uplink_ack_nack_message_content_s_29_bit;
+ PACKET_UPLINK_ACK_NACK_MESSAGE_CONTENT_S_30 m_packet_uplink_ack_nack_message_content_s_30;
+};
+packet_uplink_ack_nack_message_content packet_uplink_ack_nack_message_content_s_3_tag packet_uplink_ack_nack_message_content_s_3_value:
+{
+ PACKET_UPLINK_ACK_NACK_MESSAGE_CONTENT_S_4 m_packet_uplink_ack_nack_message_content_s_5;
+ PACKET_UPLINK_ACK_NACK_MESSAGE_CONTENT_S_18 m_packet_uplink_ack_nack_message_content_s_21;
+};
+psi14_message_content psi14_message_content_s_1_tag psi14_message_content_s_1_value:
+{
+ CCCH_ACCESS_INFORMATION ccch_access_information;
+ PSI14_MESSAGE_CONTENT_S_2 m_psi14_message_content_s_2;
+};
+psi13_message_content_s_9 psi13_message_content_s_10_tag psi13_message_content_s_10_value:
+{
+ PSI13_MESSAGE_CONTENT_S_10_BIT m_psi13_message_content_s_10_bit;
+ PSI13_MESSAGE_CONTENT_S_11 m_psi13_message_content_s_11;
+};
+psi13_message_content_s_7 psi13_message_content_s_8_tag psi13_message_content_s_8_value:
+{
+ PSI13_MESSAGE_CONTENT_S_8_BIT m_psi13_message_content_s_8_bit;
+ PSI13_MESSAGE_CONTENT_S_9 m_psi13_message_content_s_9;
+};
+psi13_message_content psi13_message_content_s_3_tag psi13_message_content_s_3_value:
+{
+ PSI13_MESSAGE_CONTENT_S_4 m_psi13_message_content_s_4;
+ PSI13_MESSAGE_CONTENT_S_5 m_psi13_message_content_s_5;
+};
+psi13_message_content psi13_message_content_s_6_tag psi13_message_content_s_6_value:
+{
+ PSI13_MESSAGE_CONTENT_S_6_BIT m_psi13_message_content_s_6_bit;
+ PSI13_MESSAGE_CONTENT_S_7 m_psi13_message_content_s_7;
+};
+psi8_message_content psi8_message_content_s_2_tag psi8_message_content_s_2_value:
+{
+ PSI8_MESSAGE_CONTENT_S_2_BIT m_psi8_message_content_s_2_bit;
+ PSI8_MESSAGE_CONTENT_S_3 m_psi8_message_content_s_3;
+};
+psi3_quater_message_content_s_8 psi3_quater_message_content_s_11_tag psi3_quater_message_content_s_11_value:
+{
+ PSI3_QUATER_MESSAGE_CONTENT_S_11_BIT m_psi3_quater_message_content_s_11_bit;
+ PSI3_QUATER_MESSAGE_CONTENT_S_12 m_psi3_quater_message_content_s_12;
+};
+psi3_quater_message_content_s_1 psi3_quater_message_content_s_6_tag psi3_quater_message_content_s_6_value:
+{
+ PSI3_QUATER_MESSAGE_CONTENT_S_7 m_psi3_quater_message_content_s_7;
+ PSI3_QUATER_MESSAGE_CONTENT_S_8 m_psi3_quater_message_content_s_8;
+};
+psi3_bis_message_content_s_11 psi3_bis_message_content_s_13_tag psi3_bis_message_content_s_13_value:
+{
+ PSI3_BIS_MESSAGE_CONTENT_S_13_BIT m_psi3_bis_message_content_s_13_bit;
+ PSI3_BIS_MESSAGE_CONTENT_S_14 m_psi3_bis_message_content_s_14;
+};
+psi3_bis_message_content_s_8 psi3_bis_message_content_s_10_tag psi3_bis_message_content_s_10_value:
+{
+ PSI3_BIS_MESSAGE_CONTENT_S_10_BIT m_psi3_bis_message_content_s_10_bit;
+ PSI3_BIS_MESSAGE_CONTENT_S_11 m_psi3_bis_message_content_s_11;
+};
+psi3_bis_message_content_s_5 psi3_bis_message_content_s_7_tag psi3_bis_message_content_s_7_value:
+{
+ PSI3_BIS_MESSAGE_CONTENT_S_7_BIT m_psi3_bis_message_content_s_7_bit;
+ PSI3_BIS_MESSAGE_CONTENT_S_8 m_psi3_bis_message_content_s_8;
+};
+psi3_bis_message_content_s_1 psi3_bis_message_content_s_4_tag psi3_bis_message_content_s_4_value:
+{
+ PSI3_BIS_MESSAGE_CONTENT_S_4_BIT m_psi3_bis_message_content_s_4_bit;
+ PSI3_BIS_MESSAGE_CONTENT_S_5 m_psi3_bis_message_content_s_5;
+};
+psi3_message_content_s_9 psi3_message_content_s_11_tag psi3_message_content_s_11_value:
+{
+ PSI3_MESSAGE_CONTENT_S_11_BIT m_psi3_message_content_s_11_bit;
+ PSI3_MESSAGE_CONTENT_S_12 m_psi3_message_content_s_12;
+};
+psi3_message_content_s_6 psi3_message_content_s_8_tag psi3_message_content_s_8_value:
+{
+ PSI3_MESSAGE_CONTENT_S_8_BIT m_psi3_message_content_s_8_bit;
+ PSI3_MESSAGE_CONTENT_S_9 m_psi3_message_content_s_9;
+};
+psi3_message_content_s_3 psi3_message_content_s_5_tag psi3_message_content_s_5_value:
+{
+ PSI3_MESSAGE_CONTENT_S_5_BIT m_psi3_message_content_s_5_bit;
+ PSI3_MESSAGE_CONTENT_S_6 m_psi3_message_content_s_6;
+};
+psi3_message_content psi3_message_content_s_2_tag psi3_message_content_s_2_value:
+{
+ PSI3_MESSAGE_CONTENT_S_2_BIT m_psi3_message_content_s_2_bit;
+ PSI3_MESSAGE_CONTENT_S_3 m_psi3_message_content_s_3;
+};
+psi1_message_content_s_3 psi1_message_content_s_4_tag psi1_message_content_s_4_value:
+{
+ PSI1_MESSAGE_CONTENT_S_5 m_psi1_message_content_s_5;
+};
+psi1_message_content psi1_message_content_s_2_tag psi1_message_content_s_2_value:
+{
+ PSI1_MESSAGE_CONTENT_S_3 m_psi1_message_content_s_3;
+};
+packet_power_control_timing_advance_message_content_s_11 packet_power_control_timing_advance_message_content_s_11_tag packet_power_control_timing_advance_message_content_s_11_value:
+{
+ GLOBAL_PACKET_TIMING_ADVANCE global_packet_timing_advance;
+ PACKET_POWER_CONTROL_TIMING_ADVANCE_MESSAGE_CONTENT_POWER_CONTROL_PARAMETERS power_control_parameters;
+};
+packet_power_control_timing_advance_message_content_s_13 packet_power_control_timing_advance_message_content_s_15_tag packet_power_control_timing_advance_message_content_s_15_value:
+{
+ PACKET_POWER_CONTROL_TIMING_ADVANCE_MESSAGE_CONTENT_S_15_BIT m_packet_power_control_timing_advance_message_content_s_15_bit;
+ PACKET_POWER_CONTROL_TIMING_ADVANCE_MESSAGE_CONTENT_S_16 m_packet_power_control_timing_advance_message_content_s_16;
+};
+packet_power_control_timing_advance_message_content packet_power_control_timing_advance_message_content_s_3_tag packet_power_control_timing_advance_message_content_s_3_value:
+{
+ PACKET_POWER_CONTROL_TIMING_ADVANCE_MESSAGE_CONTENT_GLOBAL_TFI global_tfi;
+ TQI tqi;
+ PACKET_POWER_CONTROL_TIMING_ADVANCE_MESSAGE_CONTENT_PACKET_REQUEST_REFERENCE packet_request_reference;
+};
+packet_power_control_timing_advance_message_content packet_power_control_timing_advance_message_content_s_9_tag packet_power_control_timing_advance_message_content_s_9_value:
+{
+ PACKET_POWER_CONTROL_TIMING_ADVANCE_MESSAGE_CONTENT_S_10 m_packet_power_control_timing_advance_message_content_s_10;
+ PACKET_POWER_CONTROL_TIMING_ADVANCE_MESSAGE_CONTENT_S_11 m_packet_power_control_timing_advance_message_content_s_11;
+};
+packet_power_control_timing_advance_message_content packet_power_control_timing_advance_message_content_s_12_tag packet_power_control_timing_advance_message_content_s_12_value:
+{
+ PACKET_POWER_CONTROL_TIMING_ADVANCE_MESSAGE_CONTENT_S_12_BIT m_packet_power_control_timing_advance_message_content_s_12_bit;
+ PACKET_POWER_CONTROL_TIMING_ADVANCE_MESSAGE_CONTENT_S_13 m_packet_power_control_timing_advance_message_content_s_13;
+};
+packet_polling_request_message_content packet_polling_request_message_content_s_3_tag packet_polling_request_message_content_s_3_value:
+{
+ PACKET_POLLING_REQUEST_MESSAGE_CONTENT_GLOBAL_TFI global_tfi;
+ PACKET_POLLING_REQUEST_MESSAGE_CONTENT_TLLI___G_RNTI tlli___g_rnti;
+ PACKET_POLLING_REQUEST_MESSAGE_CONTENT_TQI tqi;
+};
+packet_polling_request_message_content packet_polling_request_message_content_s_6_tag packet_polling_request_message_content_s_6_value:
+{
+ PACKET_POLLING_REQUEST_MESSAGE_CONTENT_S_6_BIT m_packet_polling_request_message_content_s_6_bit;
+ PACKET_POLLING_REQUEST_MESSAGE_CONTENT_S_7 m_packet_polling_request_message_content_s_7;
+};
+packet_paging_request_message_content_s_3 packet_paging_request_message_content_s_5_tag packet_paging_request_message_content_s_5_value:
+{
+ PACKET_PAGING_REQUEST_MESSAGE_CONTENT_S_5_BIT m_packet_paging_request_message_content_s_5_bit;
+ PACKET_PAGING_REQUEST_MESSAGE_CONTENT_S_6 m_packet_paging_request_message_content_s_6;
+};
+packet_downlink_assignment_message_content_s_31 packet_downlink_assignment_message_content_s_33_tag packet_downlink_assignment_message_content_s_33_value:
+{
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_33_BIT m_packet_downlink_assignment_message_content_s_33_bit;
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_34 m_packet_downlink_assignment_message_content_s_34;
+};
+packet_downlink_assignment_message_content_s_24 packet_downlink_assignment_message_content_s_30_tag packet_downlink_assignment_message_content_s_30_value:
+{
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_30_BIT m_packet_downlink_assignment_message_content_s_30_bit;
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_31 m_packet_downlink_assignment_message_content_s_31;
+};
+packet_downlink_assignment_message_content_s_17 packet_downlink_assignment_message_content_s_23_tag packet_downlink_assignment_message_content_s_23_value:
+{
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_23_BIT m_packet_downlink_assignment_message_content_s_23_bit;
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_24 m_packet_downlink_assignment_message_content_s_24;
+};
+packet_downlink_assignment_message_content_s_10 packet_downlink_assignment_message_content_s_16_tag packet_downlink_assignment_message_content_s_16_value:
+{
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_16_BIT m_packet_downlink_assignment_message_content_s_16_bit;
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_17 m_packet_downlink_assignment_message_content_s_17;
+};
+packet_downlink_assignment_message_content packet_downlink_assignment_message_content_s_4_tag packet_downlink_assignment_message_content_s_4_value:
+{
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_GLOBAL_TFI global_tfi;
+ TLLI__G_RNTI tlli__g_rnti;
+};
+packet_downlink_assignment_message_content packet_downlink_assignment_message_content_s_5_tag packet_downlink_assignment_message_content_s_5_value:
+{
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_6 m_packet_downlink_assignment_message_content_s_7;
+ PACKET_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_36 m_packet_downlink_assignment_message_content_s_38;
+};
+packet_access_reject_message_content_s_4 packet_access_reject_message_content_s_6_tag packet_access_reject_message_content_s_6_value:
+{
+ PACKET_ACCESS_REJECT_MESSAGE_CONTENT_S_6_BIT m_packet_access_reject_message_content_s_6_bit;
+ PACKET_ACCESS_REJECT_MESSAGE_CONTENT_S_7 m_packet_access_reject_message_content_s_8;
+};
+packet_access_reject_message_content_s_1 packet_access_reject_message_content_s_3_tag packet_access_reject_message_content_s_3_value:
+{
+ PACKET_ACCESS_REJECT_MESSAGE_CONTENT_S_3_BIT m_packet_access_reject_message_content_s_3_bit;
+ PACKET_ACCESS_REJECT_MESSAGE_CONTENT_S_4 m_packet_access_reject_message_content_s_4;
+};
+packet_uplink_assignment_message_content_s_14 packet_uplink_assignment_message_content_s_17_tag packet_uplink_assignment_message_content_s_17_value:
+{
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_17_BIT m_packet_uplink_assignment_message_content_s_17_bit;
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_18 m_packet_uplink_assignment_message_content_s_18;
+};
+packet_uplink_assignment_message_content_s_11 packet_uplink_assignment_message_content_s_13_tag packet_uplink_assignment_message_content_s_13_value:
+{
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_13_BIT m_packet_uplink_assignment_message_content_s_13_bit;
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_14 m_packet_uplink_assignment_message_content_s_14;
+};
+packet_uplink_assignment_message_content_s_7 packet_uplink_assignment_message_content_s_9_tag packet_uplink_assignment_message_content_s_9_value:
+{
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_DYNAMIC_ALLOCATION dynamic_allocation;
+ SINGLE_BLOCK_ALLOCATION single_block_allocation;
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_FIXED_ALLOCATION fixed_allocation;
+};
+packet_uplink_assignment_message_content_s_7 packet_uplink_assignment_message_content_s_10_tag packet_uplink_assignment_message_content_s_10_value:
+{
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_10_BIT m_packet_uplink_assignment_message_content_s_10_bit;
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_11 m_packet_uplink_assignment_message_content_s_11;
+};
+packet_uplink_assignment_message_content_s_36 packet_uplink_assignment_message_content_s_39_tag packet_uplink_assignment_message_content_s_39_value:
+{
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_39_BIT m_packet_uplink_assignment_message_content_s_39_bit;
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_40 m_packet_uplink_assignment_message_content_s_40;
+};
+packet_uplink_assignment_message_content_s_32 packet_uplink_assignment_message_content_s_35_tag packet_uplink_assignment_message_content_s_35_value:
+{
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_35_BIT m_packet_uplink_assignment_message_content_s_35_bit;
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_36 m_packet_uplink_assignment_message_content_s_36;
+};
+packet_uplink_assignment_message_content_s_23 packet_uplink_assignment_message_content_s_30_tag packet_uplink_assignment_message_content_s_30_value:
+{
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_DYNAMIC_ALLOCATION1 dynamic_allocation;
+ MULTI_BLOCK_ALLOCATION multi_block_allocation;
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_FIXED_ALLOCATION1 fixed_allocation;
+};
+packet_uplink_assignment_message_content_s_23 packet_uplink_assignment_message_content_s_31_tag packet_uplink_assignment_message_content_s_31_value:
+{
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_31_BIT m_packet_uplink_assignment_message_content_s_31_bit;
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_32 m_packet_uplink_assignment_message_content_s_32;
+};
+packet_uplink_assignment_message_content_s_21 packet_uplink_assignment_message_content_s_21_tag packet_uplink_assignment_message_content_s_21_value:
+{
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_22 m_packet_uplink_assignment_message_content_s_23;
+};
+packet_uplink_assignment_message_content packet_uplink_assignment_message_content_s_4_tag packet_uplink_assignment_message_content_s_4_value:
+{
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_GLOBAL_TFI global_tfi;
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_TLLI___G_RNTI tlli___g_rnti;
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_TQI tqi;
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_PACKET_REQUEST_REFERENCE packet_request_reference;
+};
+packet_uplink_assignment_message_content packet_uplink_assignment_message_content_s_5_tag packet_uplink_assignment_message_content_s_5_value:
+{
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_6 m_packet_uplink_assignment_message_content_s_7;
+ PACKET_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_21 m_packet_uplink_assignment_message_content_s_21;
+};
+multiple_tbf_downlink_assignment_message_content_s_8 multiple_tbf_downlink_assignment_message_content_s_22_tag multiple_tbf_downlink_assignment_message_content_s_22_value:
+{
+ MULTIPLE_TBF_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_22_BIT m_multiple_tbf_downlink_assignment_message_content_s_22_bit;
+ MULTIPLE_TBF_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_23 m_multiple_tbf_downlink_assignment_message_content_s_23;
+};
+multiple_tbf_downlink_assignment_message_content multiple_tbf_downlink_assignment_message_content_s_4_tag multiple_tbf_downlink_assignment_message_content_s_4_value:
+{
+ MULTIPLE_TBF_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_GLOBAL_TFI global_tfi;
+ MULTIPLE_TBF_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_5 m_multiple_tbf_downlink_assignment_message_content_s_5;
+};
+multiple_tbf_downlink_assignment_message_content multiple_tbf_downlink_assignment_message_content_s_6_tag multiple_tbf_downlink_assignment_message_content_s_6_value:
+{
+ MULTIPLE_TBF_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_7 m_multiple_tbf_downlink_assignment_message_content_s_8;
+ MULTIPLE_TBF_DOWNLINK_ASSIGNMENT_MESSAGE_CONTENT_S_25 m_multiple_tbf_downlink_assignment_message_content_s_28;
+};
+multiple_tbf_uplink_assignment_message_content_s_15 multiple_tbf_uplink_assignment_message_content_s_22_tag multiple_tbf_uplink_assignment_message_content_s_22_value:
+{
+ MULTIPLE_TBF_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_22_BIT m_multiple_tbf_uplink_assignment_message_content_s_22_bit;
+ MULTIPLE_TBF_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_23 m_multiple_tbf_uplink_assignment_message_content_s_23;
+};
+multiple_tbf_uplink_assignment_message_content_s_13 multiple_tbf_uplink_assignment_message_content_s_13_tag multiple_tbf_uplink_assignment_message_content_s_13_value:
+{
+ MULTIPLE_TBF_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_14 m_multiple_tbf_uplink_assignment_message_content_s_15;
+};
+multiple_tbf_uplink_assignment_message_content multiple_tbf_uplink_assignment_message_content_s_4_tag multiple_tbf_uplink_assignment_message_content_s_4_value:
+{
+ MULTIPLE_TBF_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_GLOBAL_TFI global_tfi;
+ MULTIPLE_TBF_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_5 m_multiple_tbf_uplink_assignment_message_content_s_5;
+};
+multiple_tbf_uplink_assignment_message_content multiple_tbf_uplink_assignment_message_content_s_6_tag multiple_tbf_uplink_assignment_message_content_s_6_value:
+{
+ MULTIPLE_TBF_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_7 m_multiple_tbf_uplink_assignment_message_content_s_8;
+ MULTIPLE_TBF_UPLINK_ASSIGNMENT_MESSAGE_CONTENT_S_13 m_multiple_tbf_uplink_assignment_message_content_s_13;
+};
+ps_handover_to_a_gb_mode_payload ps_handover_command_message_content_s_4_tag ps_handover_command_message_content_s_4_value:
+{
+ PS_HANDOVER_RR_INFO ps_handover_rr_info;
+};
+ps_handover_command_message_content ps_handover_command_message_content_s_3_tag ps_handover_command_message_content_s_3_value:
+{
+ PS_HANDOVER_TO_A_GB_MODE_PAYLOAD m_ps_handover_to_a_gb_mode_payload;
+ PS_HANDOVER_TO_UTRAN_PAYLOAD ps_handover_to_utran_payload;
+};
+multiple_tbf_timeslot_reconfigure_message_content_s_12 multiple_tbf_timeslot_reconfigure_message_content_s_22_tag multiple_tbf_timeslot_reconfigure_message_content_s_22_value:
+{
+ MULTIPLE_TBF_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_S_22_BIT m_multiple_tbf_timeslot_reconfigure_message_content_s_22_bit;
+ MULTIPLE_TBF_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_S_23 m_multiple_tbf_timeslot_reconfigure_message_content_s_23;
+};
+multiple_tbf_timeslot_reconfigure_message_content_s_10 multiple_tbf_timeslot_reconfigure_message_content_s_10_tag multiple_tbf_timeslot_reconfigure_message_content_s_10_value:
+{
+ MULTIPLE_TBF_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_S_11 m_multiple_tbf_timeslot_reconfigure_message_content_s_12;
+};
+multiple_tbf_timeslot_reconfigure_message_content multiple_tbf_timeslot_reconfigure_message_content_s_3_tag multiple_tbf_timeslot_reconfigure_message_content_s_3_value:
+{
+ MULTIPLE_TBF_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_S_4 m_multiple_tbf_timeslot_reconfigure_message_content_s_5;
+ MULTIPLE_TBF_TIMESLOT_RECONFIGURE_MESSAGE_CONTENT_S_10 m_multiple_tbf_timeslot_reconfigure_message_content_s_10;
+};
+enh_measurement_parameters_struct enh_measurement_parameters_struct_s_1_tag enh_measurement_parameters_struct_s_1_value:
+{
+ ENH_MEASUREMENT_PARAMETERS_STRUCT_S_2 m_enh_measurement_parameters_struct_s_2;
+ ENH_MEASUREMENT_PARAMETERS_STRUCT_PSI3_CHANGE_MARK psi3_change_mark;
+};
+ext_measurement_parameters_struct ext_measurement_parameters_struct_s_0_tag ext_measurement_parameters_struct_s_0_value:
+{
+ M_EM1_STRUCT m_em1_struct;
+};
+gsm_target_cell_struct_s_18 gsm_target_cell_struct_s_19_tag gsm_target_cell_struct_s_19_value:
+{
+ GSM_TARGET_CELL_STRUCT_S_19_BIT m_gsm_target_cell_struct_s_19_bit;
+ GSM_TARGET_CELL_STRUCT_S_20 m_gsm_target_cell_struct_s_20;
+};
+gsm_target_cell_struct_s_11 gsm_target_cell_struct_s_17_tag gsm_target_cell_struct_s_17_value:
+{
+ GSM_TARGET_CELL_STRUCT_S_17_BIT m_gsm_target_cell_struct_s_17_bit;
+ GSM_TARGET_CELL_STRUCT_S_18 m_gsm_target_cell_struct_s_18;
+};
+gsm_target_cell_struct_s_7 gsm_target_cell_struct_s_10_tag gsm_target_cell_struct_s_10_value:
+{
+ GSM_TARGET_CELL_STRUCT_S_10_BIT m_gsm_target_cell_struct_s_10_bit;
+ GSM_TARGET_CELL_STRUCT_S_11 m_gsm_target_cell_struct_s_11;
+};
+gsm_target_cell_struct_s_5 gsm_target_cell_struct_s_6_tag gsm_target_cell_struct_s_6_value:
+{
+ GSM_TARGET_CELL_STRUCT_S_6_BIT m_gsm_target_cell_struct_s_6_bit;
+ GSM_TARGET_CELL_STRUCT_S_7 m_gsm_target_cell_struct_s_7;
+};
+gsm_target_cell_struct_s_2 gsm_target_cell_struct_s_4_tag gsm_target_cell_struct_s_4_value:
+{
+ GSM_TARGET_CELL_STRUCT_S_4_BIT m_gsm_target_cell_struct_s_4_bit;
+ GSM_TARGET_CELL_STRUCT_S_5 m_gsm_target_cell_struct_s_5;
+};
+gsm_target_cell_struct gsm_target_cell_struct_s_1_tag gsm_target_cell_struct_s_1_value:
+{
+ GSM_TARGET_CELL_STRUCT_S_1_BIT m_gsm_target_cell_struct_s_1_bit;
+ GSM_TARGET_CELL_STRUCT_S_2 m_gsm_target_cell_struct_s_2;
+};
+ps_handover_radio_resources_2_ie ps_handover_radio_resources_2_ie_s_5_tag ps_handover_radio_resources_2_ie_s_5_value:
+{
+ PS_HANDOVER_RADIO_RESOURCES_2_IE_S_6 m_ps_handover_radio_resources_2_ie_s_6;
+ DUAL_CARRIER_FREQUENCY_PARAMETERS dual_carrier_frequency_parameters;
+};
+ms_ra_capability_value_part_struct ms_ra_capability_value_part_struct_s_1_tag ms_ra_capability_value_part_struct_s_1_value:
+{
+ ACCESS_CAPABILITIES access_capabilities;
+ MS_RA_CAPABILITY_VALUE_PART_STRUCT_S_2 m_ms_ra_capability_value_part_struct_s_2;
+};
+psi5_message_content_s_7 psi5_message_content_s_9_tag psi5_message_content_s_9_value:
+{
+ PSI5_MESSAGE_CONTENT_S_9_BIT m_psi5_message_content_s_9_bit;
+ PSI5_MESSAGE_CONTENT_S_10 m_psi5_message_content_s_10;
+};
+psi5_message_content_s_4 psi5_message_content_s_6_tag psi5_message_content_s_6_value:
+{
+ PSI5_MESSAGE_CONTENT_S_6_BIT m_psi5_message_content_s_6_bit;
+ PSI5_MESSAGE_CONTENT_S_7 m_psi5_message_content_s_7;
+};
+psi5_message_content psi5_message_content_s_3_tag psi5_message_content_s_3_value:
+{
+ PSI5_MESSAGE_CONTENT_S_3_BIT m_psi5_message_content_s_3_bit;
+ PSI5_MESSAGE_CONTENT_S_4 m_psi5_message_content_s_4;
+};
+psi2_message_content_s_1 psi2_message_content_s_4_tag psi2_message_content_s_4_value:
+{
+ PSI2_MESSAGE_CONTENT_S_4_BIT m_psi2_message_content_s_4_bit;
+ PSI2_MESSAGE_CONTENT_S_5 m_psi2_message_content_s_5;
+};
+packet_measurement_order_message_content_s_25 packet_measurement_order_message_content_s_26_tag packet_measurement_order_message_content_s_26_value:
+{
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_S_26_BIT m_packet_measurement_order_message_content_s_26_bit;
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_S_27 m_packet_measurement_order_message_content_s_27;
+};
+packet_measurement_order_message_content_s_18 packet_measurement_order_message_content_s_24_tag packet_measurement_order_message_content_s_24_value:
+{
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_S_24_BIT m_packet_measurement_order_message_content_s_24_bit;
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_S_25 m_packet_measurement_order_message_content_s_25;
+};
+packet_measurement_order_message_content_s_15 packet_measurement_order_message_content_s_17_tag packet_measurement_order_message_content_s_17_value:
+{
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_S_17_BIT m_packet_measurement_order_message_content_s_17_bit;
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_S_18 m_packet_measurement_order_message_content_s_18;
+};
+packet_measurement_order_message_content_s_12 packet_measurement_order_message_content_s_14_tag packet_measurement_order_message_content_s_14_value:
+{
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_S_14_BIT m_packet_measurement_order_message_content_s_14_bit;
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_S_15 m_packet_measurement_order_message_content_s_15;
+};
+packet_measurement_order_message_content_s_9 packet_measurement_order_message_content_s_11_tag packet_measurement_order_message_content_s_11_value:
+{
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_S_11_BIT m_packet_measurement_order_message_content_s_11_bit;
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_S_12 m_packet_measurement_order_message_content_s_12;
+};
+packet_measurement_order_message_content packet_measurement_order_message_content_s_3_tag packet_measurement_order_message_content_s_3_value:
+{
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_GLOBAL_TFI global_tfi;
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_TLLI___G_RNTI tlli___g_rnti;
+};
+packet_measurement_order_message_content packet_measurement_order_message_content_s_8_tag packet_measurement_order_message_content_s_8_value:
+{
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_S_8_BIT m_packet_measurement_order_message_content_s_8_bit;
+ PACKET_MEASUREMENT_ORDER_MESSAGE_CONTENT_S_9 m_packet_measurement_order_message_content_s_9;
+};
+packet_cell_change_order_message_content_s_10 packet_cell_change_order_message_content_s_13_tag packet_cell_change_order_message_content_s_13_value:
+{
+ PACKET_CELL_CHANGE_ORDER_MESSAGE_CONTENT_S_13_BIT m_packet_cell_change_order_message_content_s_13_bit;
+ PACKET_CELL_CHANGE_ORDER_MESSAGE_CONTENT_S_14 m_packet_cell_change_order_message_content_s_14;
+};
+packet_cell_change_order_message_content packet_cell_change_order_message_content_s_3_tag packet_cell_change_order_message_content_s_3_value:
+{
+ PACKET_CELL_CHANGE_ORDER_MESSAGE_CONTENT_GLOBAL_TFI global_tfi;
+ PACKET_CELL_CHANGE_ORDER_MESSAGE_CONTENT_TLLI___G_RNTI tlli___g_rnti;
+};
+packet_cell_change_order_message_content packet_cell_change_order_message_content_s_4_tag packet_cell_change_order_message_content_s_4_value:
+{
+ PACKET_CELL_CHANGE_ORDER_MESSAGE_CONTENT_S_5 m_packet_cell_change_order_message_content_s_6;
+ PACKET_CELL_CHANGE_ORDER_MESSAGE_CONTENT_S_7 m_packet_cell_change_order_message_content_s_10;
+};
diff --git a/mcu/service/dhl/database/unionTag/GAS_EDGE_PS_unionTag.txt b/mcu/service/dhl/database/unionTag/GAS_EDGE_PS_unionTag.txt
new file mode 100755
index 0000000..a7c2a3f
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/GAS_EDGE_PS_unionTag.txt
@@ -0,0 +1,62 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+This file is used by cgen for union Tag information.
+Usage:
+
+structure_name tag_field_name union_name:
+{
+ tag_fileld_value field_of_union_name;
+ tag_fileld_value field_of_union_name;
+};
+
+For Example:
+
+InvokeChoice ChoiceId a:
+{
+ 1 localValue;
+ 2 globalValue;
+};
+
+*/
+
+/****************************** GAS EDGE PS UnionTag ********************************/
+
+mac_rlc_ack_ind_struct tbf_type_tag ack_nack_struct:
+{
+ GPRS_TBF gprs_ie;
+ EGPRS_TBF egprs_ie;
+};
+
diff --git a/mcu/service/dhl/database/unionTag/GAS_EDGE_PS_unionTag_tdd.txt b/mcu/service/dhl/database/unionTag/GAS_EDGE_PS_unionTag_tdd.txt
new file mode 100755
index 0000000..a7c2a3f
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/GAS_EDGE_PS_unionTag_tdd.txt
@@ -0,0 +1,62 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+This file is used by cgen for union Tag information.
+Usage:
+
+structure_name tag_field_name union_name:
+{
+ tag_fileld_value field_of_union_name;
+ tag_fileld_value field_of_union_name;
+};
+
+For Example:
+
+InvokeChoice ChoiceId a:
+{
+ 1 localValue;
+ 2 globalValue;
+};
+
+*/
+
+/****************************** GAS EDGE PS UnionTag ********************************/
+
+mac_rlc_ack_ind_struct tbf_type_tag ack_nack_struct:
+{
+ GPRS_TBF gprs_ie;
+ EGPRS_TBF egprs_ie;
+};
+
diff --git a/mcu/service/dhl/database/unionTag/GAS_PS_unionTag.txt b/mcu/service/dhl/database/unionTag/GAS_PS_unionTag.txt
new file mode 100755
index 0000000..a1723ea
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/GAS_PS_unionTag.txt
@@ -0,0 +1,69 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+This file is used by cgen for union Tag information.
+Usage:
+
+structure_name tag_field_name union_name:
+{
+ tag_fileld_value field_of_union_name;
+ tag_fileld_value field_of_union_name;
+};
+
+For Example:
+
+InvokeChoice ChoiceId a:
+{
+ 1 localValue;
+ 2 globalValue;
+};
+
+*/
+
+/****************************** GAS PS UnionTag ********************************/
+
+rmpc_mac_dl_assign_ind_struct pkt_assign_type_tag pkt_assign_type_value:
+{
+ PKT_ASSIGN pkt_dl_assign;
+ IMM_PKT_ASSIGN imm_dl_assign;
+ PDCH_ASSIGN pdch_dl_assign;
+};
+
+rmpc_mac_ul_assign_ind_struct pkt_assign_type_tag pkt_assign_type_value:
+{
+ PKT_ASSIGN pkt_ul_assign;
+ IMM_PKT_ASSIGN imm_ul_assign;
+ PDCH_ASSIGN pdch_ul_assign;
+};
diff --git a/mcu/service/dhl/database/unionTag/GAS_PS_unionTag_tdd.txt b/mcu/service/dhl/database/unionTag/GAS_PS_unionTag_tdd.txt
new file mode 100755
index 0000000..a1723ea
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/GAS_PS_unionTag_tdd.txt
@@ -0,0 +1,69 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+This file is used by cgen for union Tag information.
+Usage:
+
+structure_name tag_field_name union_name:
+{
+ tag_fileld_value field_of_union_name;
+ tag_fileld_value field_of_union_name;
+};
+
+For Example:
+
+InvokeChoice ChoiceId a:
+{
+ 1 localValue;
+ 2 globalValue;
+};
+
+*/
+
+/****************************** GAS PS UnionTag ********************************/
+
+rmpc_mac_dl_assign_ind_struct pkt_assign_type_tag pkt_assign_type_value:
+{
+ PKT_ASSIGN pkt_dl_assign;
+ IMM_PKT_ASSIGN imm_dl_assign;
+ PDCH_ASSIGN pdch_dl_assign;
+};
+
+rmpc_mac_ul_assign_ind_struct pkt_assign_type_tag pkt_assign_type_value:
+{
+ PKT_ASSIGN pkt_ul_assign;
+ IMM_PKT_ASSIGN imm_ul_assign;
+ PDCH_ASSIGN pdch_ul_assign;
+};
diff --git a/mcu/service/dhl/database/unionTag/GAS_unionTag.txt b/mcu/service/dhl/database/unionTag/GAS_unionTag.txt
new file mode 100755
index 0000000..45926c5
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/GAS_unionTag.txt
@@ -0,0 +1,78 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+This file is used by cgen for union Tag information.
+Usage:
+
+structure_name tag_field_name union_name:
+{
+ tag_fileld_value field_of_union_name;
+ tag_fileld_value field_of_union_name;
+};
+
+For Example:
+
+InvokeChoice ChoiceId a:
+{
+ 1 localValue;
+ 2 globalValue;
+};
+
+*/
+
+/****************************** GAS PS UnionTag ********************************/
+
+pkt_chan_desc_struct ch_config_tag ch_config_value:
+{
+ non_hop_or_indirect_enc_type non_hop_or_indirect_enc;
+ direct_enc_type direct_enc;
+};
+
+/****************************** GAS CS IR UnionTag ********************************/
+#ifdef __LTE_RAT__
+eas_gas_activate_gcell_req_struct ir_cell_change_trigger target_gcell_info:
+{
+ IR_CELL_RESELECTION target_gcell_reselect_info;
+ IR_CELL_CHANGE_ORDER target_gcell_reselect_info;
+ IR_REDIRECTION target_gcell_redirect_list;
+};
+
+eas_gas_activate_gcell_req_struct ir_cell_change_trigger target_gcell_si_info:
+{
+ IR_CELL_RESELECTION target_gcell_reselect_SI_info;
+ IR_CELL_CHANGE_ORDER target_gcell_reselect_SI_info;
+ IR_REDIRECTION target_gcell_redirect_SI_list;
+};
+#endif /* __LTE_RAT__ */
diff --git a/mcu/service/dhl/database/unionTag/GAS_unionTag_tdd.txt b/mcu/service/dhl/database/unionTag/GAS_unionTag_tdd.txt
new file mode 100755
index 0000000..821d580
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/GAS_unionTag_tdd.txt
@@ -0,0 +1,62 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+This file is used by cgen for union Tag information.
+Usage:
+
+structure_name tag_field_name union_name:
+{
+ tag_fileld_value field_of_union_name;
+ tag_fileld_value field_of_union_name;
+};
+
+For Example:
+
+InvokeChoice ChoiceId a:
+{
+ 1 localValue;
+ 2 globalValue;
+};
+
+*/
+
+/****************************** GAS PS UnionTag ********************************/
+
+pkt_chan_desc_struct ch_config_tag ch_config_value:
+{
+ non_hop_or_indirect_enc_type non_hop_or_indirect_enc;
+ direct_enc_type direct_enc;
+};
+
diff --git a/mcu/service/dhl/database/unionTag/el1_unionTag.txt b/mcu/service/dhl/database/unionTag/el1_unionTag.txt
new file mode 100644
index 0000000..c598079
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/el1_unionTag.txt
@@ -0,0 +1,55 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+This file is used by cgen for union Tag information.
+Usage:
+
+structure_name tag_field_name union_name:
+{
+ tag_fileld_value field_of_union_name;
+ tag_fileld_value field_of_union_name;
+};
+
+For Example:
+
+InvokeChoice ChoiceId a:
+{
+ 1 localValue;
+ 2 globalValue;
+};
+
+*/
+
+/****************************** EL1 PHS MEAS UnionTag ********************************/
diff --git a/mcu/service/dhl/database/unionTag/ext/unionTag_db_ext.c b/mcu/service/dhl/database/unionTag/ext/unionTag_db_ext.c
new file mode 100644
index 0000000..4f2dcb6
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/ext/unionTag_db_ext.c
@@ -0,0 +1,119 @@
+/********************************************************************************************
+ * LEGAL DISCLAIMER
+ *
+ * (Header of MediaTek Software/Firmware Release or Documentation)
+ *
+ * BY OPENING OR USING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE") RECEIVED
+ * FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON AN "AS-IS" BASIS
+ * ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES, EXPRESS OR IMPLIED,
+ * INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR
+ * A PARTICULAR PURPOSE OR NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY
+ * WHATSOEVER WITH RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK
+ * ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+ * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S SPECIFICATION
+ * OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+ *
+ * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE LIABILITY WITH
+ * RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION,
+ *
+ * TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE
+ * FEES OR SERVICE CHARGE PAID BY BUYER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE WITH THE LAWS
+ * OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF LAWS PRINCIPLES.
+ ************************************************************************************************/
+
+
+/*******************************************************************************
+ *
+ * Filename:
+ * ---------
+ * unionTag_db_ext.c
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * This file used for pre-processing to build unionTag DB
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * $Log$
+ *
+ * 07 30 2018 chi-chun.lu
+ * [MOLY00342741] [MakeFile] [UMOLYE] [Modify Makefile Rules] enhance build flow for cgen tdd/fdd preprocessing files
+ *
+ * .
+ *
+ *==============================================================================
+ * How to add a new unionTag script
+ * 1. Put the unionTag script into the proper folder e.g: \dhl\database\unionTag\ext
+ * \dhl\database_modis\unionTag\ext
+ * 2. #include <xxx.txt>.
+ * Notably, you should use #include <xxx.txt> rather than "xxx.txt"
+ * If you have two different scripts with the same name in database\unionTag\ext
+ * and database_modis\unionTag\ext, please make sure you use #include <xxx.txt>.
+ * If you use #include "xxx.txt", Codegen will process \dhl\database\unionTag\ext\xxx.txt
+ * instead of \dhl\database_modis\unionTag\ext\xxx.txt. So you are suggested to use
+ * #include <xxx.txt> all the way.
+ *******************************************************************************/
+/********************************************* Warning **********************************************
+* Please make sure header file is included correctly!
+* If the common header file is added to unionTag_db_tdd_fdd_ext.c, the context of header file will be preprocessed twice.
+* The change as mentioned previously can lead to build time inefficiency.
+*
+* common header file => unionTag_db_ext.c
+* Tdd/Fdd(2g/3g) header file => unionTag_db_tdd_fdd_ext.c
+*
+* If the header file relate to Tdd/Fdd (2g/3g), please include the header file in unionTag_db_tdd_fdd_ext.c
+* If the header file is common header file or is not related to Tdd/Fdd(2g/3g), please add the header file to unionTag_db_ext.c
+********************************************** Warning **********************************************/
+
+#ifdef _MODIS_ON_VC9_
+#define __w64
+#endif
+
+#ifdef STDC_HEADERS
+#undef STDC_HEADERS //it will include stdio.h
+#endif
+
+#ifdef __UMTS_FDD_MODE__
+#endif /* FDD */
+
+
+#ifdef __UMTS_TDD128_MODE__
+#if !defined(__MAUI_BASIC__)
+
+/* for MCDDLL */
+#ifdef __PS_SERVICE__
+#else
+#endif
+
+#endif
+#endif /* TDD 128*/
+
+
+#ifdef UNIT_TEST
+//For MODIS Project, please include your header here, e.g: #include <modis.txt>
+//Please put your unionTag files to \dhl\database_modis\unionTag\ext\
+
+#endif //#ifdef UNIT_TEST
+
+/********************************************* Warning **********************************************
+* Please make sure header file is included correctly!
+* If the common header file is added to unionTag_db_tdd_fdd_ext.c, the context of header file will be preprocessed twice.
+* The change as mentioned previously can lead to build time inefficiency.
+*
+* common header file => unionTag_db_ext.c
+* Tdd/Fdd(2g/3g) header file => unionTag_db_tdd_fdd_ext.c
+*
+* If the header file relate to Tdd/Fdd (2g/3g), please include the header file in unionTag_db_tdd_fdd_ext.c
+* If the header file is common header file or is not related to Tdd/Fdd(2g/3g), please add the header file to unionTag_db_ext.c
+********************************************** Warning **********************************************/
diff --git a/mcu/service/dhl/database/unionTag/ext/unionTag_db_tdd_fdd_ext.c b/mcu/service/dhl/database/unionTag/ext/unionTag_db_tdd_fdd_ext.c
new file mode 100644
index 0000000..782010e
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/ext/unionTag_db_tdd_fdd_ext.c
@@ -0,0 +1,113 @@
+/********************************************************************************************
+ * LEGAL DISCLAIMER
+ *
+ * (Header of MediaTek Software/Firmware Release or Documentation)
+ *
+ * BY OPENING OR USING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE") RECEIVED
+ * FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON AN "AS-IS" BASIS
+ * ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES, EXPRESS OR IMPLIED,
+ * INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR
+ * A PARTICULAR PURPOSE OR NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY
+ * WHATSOEVER WITH RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK
+ * ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+ * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S SPECIFICATION
+ * OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+ *
+ * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE LIABILITY WITH
+ * RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION,
+ *
+ * TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE
+ * FEES OR SERVICE CHARGE PAID BY BUYER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE WITH THE LAWS
+ * OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF LAWS PRINCIPLES.
+ ************************************************************************************************/
+
+
+/*******************************************************************************
+ *
+ * Filename:
+ * ---------
+ * unionTag_db_ext.c
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * This file used for pre-processing to build unionTag DB
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * $Log$
+ *
+ *==============================================================================
+ * How to add a new unionTag script
+ * 1. Put the unionTag script into the proper folder e.g: \dhl\database\unionTag\ext
+ * \dhl\database_modis\unionTag\ext
+ * 2. #include <xxx.txt>.
+ * Notably, you should use #include <xxx.txt> rather than "xxx.txt"
+ * If you have two different scripts with the same name in database\unionTag\ext
+ * and database_modis\unionTag\ext, please make sure you use #include <xxx.txt>.
+ * If you use #include "xxx.txt", Codegen will process \dhl\database\unionTag\ext\xxx.txt
+ * instead of \dhl\database_modis\unionTag\ext\xxx.txt. So you are suggested to use
+ * #include <xxx.txt> all the way.
+ *******************************************************************************/
+/********************************************* Warning **********************************************
+* Please make sure header file is included correctly!
+* If the common header file is added to unionTag_db_tdd_fdd_ext.c, the context of header file will be preprocessed twice.
+* The change as mentioned previously can lead to build time inefficiency.
+*
+* common header file => unionTag_db_ext.c
+* Tdd/Fdd(2g/3g) header file => unionTag_db_tdd_fdd_ext.c
+*
+* If the header file relate to Tdd/Fdd (2g/3g), please include the header file in unionTag_db_tdd_fdd_ext.c
+* If the header file is common header file or is not related to Tdd/Fdd(2g/3g), please add the header file to unionTag_db_ext.c
+********************************************** Warning **********************************************/
+#ifdef _MODIS_ON_VC9_
+#define __w64
+#endif
+
+#ifdef STDC_HEADERS
+#undef STDC_HEADERS //it will include stdio.h
+#endif
+
+#ifdef __UMTS_FDD_MODE__
+#endif /* FDD */
+
+
+#ifdef __UMTS_TDD128_MODE__
+#if !defined(__MAUI_BASIC__)
+
+/* for MCDDLL */
+#ifdef __PS_SERVICE__
+#else
+#endif
+
+#endif
+#endif /* TDD 128*/
+
+
+#ifdef UNIT_TEST
+//For MODIS Project, please include your header here, e.g: #include <modis.txt>
+//Please put your unionTag files to \dhl\database_modis\unionTag\ext\
+
+#endif //#ifdef UNIT_TEST
+
+/********************************************* Warning **********************************************
+* Please make sure header file is included correctly!
+* If the common header file is added to unionTag_db_tdd_fdd_ext.c, the context of header file will be preprocessed twice.
+* The change as mentioned previously can lead to build time inefficiency.
+*
+* common header file => unionTag_db_ext.c
+* Tdd/Fdd(2g/3g) header file => unionTag_db_tdd_fdd_ext.c
+*
+* If the header file relate to Tdd/Fdd (2g/3g), please include the header file in unionTag_db_tdd_fdd_ext.c
+* If the header file is common header file or is not related to Tdd/Fdd(2g/3g), please add the header file to unionTag_db_ext.c
+********************************************** Warning **********************************************/
\ No newline at end of file
diff --git a/mcu/service/dhl/database/unionTag/ext/unionTag_sample.txt b/mcu/service/dhl/database/unionTag/ext/unionTag_sample.txt
new file mode 100644
index 0000000..770e79f
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/ext/unionTag_sample.txt
@@ -0,0 +1,55 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+This file is used by cgen for union Tag information.
+Usage:
+
+structure_name tag_field_name union_name:
+{
+ tag_fileld_value field_of_union_name;
+ tag_fileld_value field_of_union_name;
+};
+
+For Example:
+
+InvokeChoice ChoiceId a:
+{
+ 1 localValue;
+ 2 globalValue;
+};
+
+*/
+
+
diff --git a/mcu/service/dhl/database/unionTag/gnss_unionTag.txt b/mcu/service/dhl/database/unionTag/gnss_unionTag.txt
new file mode 100755
index 0000000..97ecda6
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/gnss_unionTag.txt
@@ -0,0 +1,166 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2013
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+This file is used by cgen for union Tag information.
+Usage:
+
+structure_name tag_field_name union_name:
+{
+ tag_fileld_value field_of_union_name;
+ tag_fileld_value field_of_union_name;
+};
+
+For Example:
+
+InvokeChoice ChoiceId a:
+{
+ 1 localValue;
+ 2 globalValue;
+};
+
+*/
+
+
+gnss_network_cell_id_struct type data:
+{
+ GNSS_NETWORK_CELL_TYPE_EUTRA eutra;
+ GNSS_NETWORK_CELL_TYPE_UTRA utra;
+ GNSS_NETWORK_CELL_TYPE_GSM gsm;
+};
+
+
+gnss_clock_model_struct type data:
+{
+ GNSS_CLOCK_MODEL_TYPE_STANDARD standardClockModelList;
+ GNSS_CLOCK_MODEL_TYPE_NAV navClockModel;
+ GNSS_CLOCK_MODEL_TYPE_CNAV cnavClockModel;
+ GNSS_CLOCK_MODEL_TYPE_GLONASS glonassClockModel;
+ GNSS_CLOCK_MODEL_TYPE_SBAS sbasClockModel;
+ GNSS_CLOCK_MODEL_TYPE_BDS bdsClockModel;
+};
+
+
+gnss_orbit_model_struct type data:
+{
+ GNSS_ORBIT_MODEL_TYPE_KEPLERIAN_SET keplerianSet;
+ GNSS_ORBIT_MODEL_TYPE_NAV_KEPLERIAN_SET navKeplerianSet;
+ GNSS_ORBIT_MODEL_TYPE_CNAV_KEPLERIAN_SET cnavKeplerianSet;
+ GNSS_ORBIT_MODEL_TYPE_GLONASS_ECEF glonassECEF;
+ GNSS_ORBIT_MODEL_TYPE_SBAS_ECEF sbasECEF;
+ GNSS_ORBIT_MODEL_TYPE_BDS_KEPLERIAN_SET bdsKeplerianSet;
+};
+
+
+gnss_almanac_element_struct type data:
+{
+ GNSS_ALMANAC_TYPE_KEPLERIAN_SET keplerianSet;
+ GNSS_ALMANAC_TYPE_NAV_KEPLERIAN_SET navKeplerianSet;
+ GNSS_ALMANAC_TYPE_REDUCED_KEPLERIAN_SET reducedKeplerianSet;
+ GNSS_ALMANAC_TYPE_MIDI_KEPLERIAN_SET midiKeplerianSet;
+ GNSS_ALMANAC_TYPE_GLONASS_SET glonassSet;
+ GNSS_ALMANAC_TYPE_ECEF_SBAS_SET ecefSbasSet;
+ GNSS_ALMANAC_TYPE_BDS_ALMANAC_SET bdsAlmanacSet;
+};
+
+
+gnss_utc_model_struct type data:
+{
+ GNSS_UTC_MODEL_TYPE_MODEL1 utcModel1;
+ GNSS_UTC_MODEL_TYPE_MODEL2 utcModel2;
+ GNSS_UTC_MODEL_TYPE_MODEL3 utcModel3;
+ GNSS_UTC_MODEL_TYPE_MODEL4 utcModel4;
+ GNSS_UTC_MODEL_TYPE_MODEL5 utcModel5;
+};
+
+
+gnss_aux_info_struct type data:
+{
+ GNSS_AUX_INFO_GNSS_TYPE_GPS gps;
+ GNSS_AUX_INFO_GNSS_TYPE_GLONASS glonass;
+};
+
+
+lcsp_gnss_common_assist_data_req_struct type data:
+{
+ GNSS_COMMON_ASSIST_DATA_TYPE_REF_TIME refTime;
+ GNSS_COMMON_ASSIST_DATA_TYPE_REF_LOCACTION refLoc;
+ GNSS_COMMON_ASSIST_DATA_TYPE_ION_MODEL ionModel;
+ GNSS_COMMON_ASSIST_DATA_TYPE_EARTH_ORIENT_PARAMS eop;
+};
+
+
+lcsp_gnss_generic_assist_data_req_struct type data:
+{
+ GNSS_GENERIC_ASSIST_DATA_TYPE_TIME_MODEL timeModel;
+ GNSS_GENERIC_ASSIST_DATA_TYPE_DGNSS_CORRECTION dgnss;
+ GNSS_GENERIC_ASSIST_DATA_TYPE_NAVIGATION_MODEL navModel;
+ GNSS_GENERIC_ASSIST_DATA_TYPE_RTI rti;
+ GNSS_GENERIC_ASSIST_DATA_TYPE_DATA_BIT_ASSIST dataBitAssist;
+ GNSS_GENERIC_ASSIST_DATA_TYPE_ACQUISITION acqAssist;
+ GNSS_GENERIC_ASSIST_DATA_TYPE_ALMANAC almanac;
+ GNSS_GENERIC_ASSIST_DATA_TYPE_UTC_MODEL utcModel;
+ GNSS_GENERIC_ASSIST_DATA_TYPE_AUX_INFO auxInfo;
+ GNSS_GENERIC_ASSIST_DATA_TYPE_DBDS_CORRECTION dbds;
+ GNSS_GENERIC_ASSIST_DATA_TYPE_BDS_GRID_MODEL bdsGridModel;
+};
+
+
+gnss_request_nav_model_struct type data:
+{
+ GNSS_NAV_MODEL_REQ_TYPE_STORED_NAV_LIST storedNavList;
+ GNSS_NAV_MODEL_REQ_TYPE_REQ_NAV_LIST reqNavList;
+};
+
+
+gnss_measured_ref_network_time_struct type data:
+{
+ GNSS_NETWORK_CELL_TYPE_EUTRA eutra;
+ GNSS_NETWORK_CELL_TYPE_UTRA utra;
+ GNSS_NETWORK_CELL_TYPE_GSM gsm;
+};
+
+
+lcsp_gnss_pos_cnf_struct type data:
+{
+ GNSS_POS_RESULT_TYPE_POS_CNF posResult;
+ GNSS_POS_RESULT_TYPE_ASSIST_DATA_REQ assistDataReq;
+};
+
+
+lcsp_gnss_meas_cnf_struct type data:
+{
+ GNSS_MEAS_RESULT_TYPE_MEAS_CNF measuredResult;
+ GNSS_MEAS_RESULT_TYPE_ASSIST_DATA_REQ assistDataReq;
+};
diff --git a/mcu/service/dhl/database/unionTag/l4_unionTag.txt b/mcu/service/dhl/database/unionTag/l4_unionTag.txt
new file mode 100755
index 0000000..252810b
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/l4_unionTag.txt
@@ -0,0 +1,97 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+This file is used by cgen for union Tag information.
+Usage:
+
+structure_name tag_field_name union_name:
+{
+ tag_fileld_value field_of_union_name;
+ tag_fileld_value field_of_union_name;
+};
+
+For Example:
+
+InvokeChoice ChoiceId a:
+{
+ 1 localValue;
+ 2 globalValue;
+};
+
+*/
+
+#ifdef __SGLTE__
+
+l4cpsdm_mmdc_config_req_ind_struct type params:
+{
+ PSDM_CONFIG_SWITCH_PREF switch_pref_config;
+ PSDM_CONFIG_THRESHOLD threshold_config;
+ PSDM_CONFIG_TIMER timer_config;
+ PSDM_CONFIG_BGS_PREF event_triggerred_bgs;
+};
+
+l4cpsdm_mmdc_status_event_ind_struct type params:
+{
+ PSDM_STATUS_EVENT_AS_EVENT as_ind;
+ PSDM_STATUS_EVENT_SIGNAL_STRENGTH signal;
+ PSDM_STATUS_EVENT_REG_STATUS reg_ps_status;
+ PSDM_STATUS_EVENT_SIM_STATUS sim_state;
+};
+
+
+psdm_as_status_events_struct ind_type params:
+{
+ AS_IND_CELL_CHANGE_IND srv_cell_info;
+ AS_IND_HO_CHANGE_IND srv_cell_info;
+ AS_IND_3G_SYS_IR_CRITERIA_IND uas_threholds;
+ AS_IND_4G_SYS_IR_CRITERIA_IND eas_threholds;
+ AS_IND_SRV_CELL_INFO_IND srv_cell_info;
+ AS_IND_NBR_INFO_IND nbr_infos;
+ AS_IND_2G_SYS_IR_CRITERIA_IND gas_threholds;
+ AS_IND_OOS_TRIGER_IND as_oos;
+};
+
+l4cas_to_peer_info_ind_struct ind_type params:
+{
+ AS_IND_CELL_CHANGE_IND srv_cell_info;
+ AS_IND_HO_CHANGE_IND srv_cell_info;
+ AS_IND_3G_SYS_IR_CRITERIA_IND uas_threholds;
+ AS_IND_4G_SYS_IR_CRITERIA_IND eas_threholds;
+ AS_IND_SRV_CELL_INFO_IND srv_cell_info;
+ AS_IND_NBR_INFO_IND nbr_infos;
+};
+
+
+#endif
diff --git a/mcu/service/dhl/database/unionTag/mm_emm_context_unionTag.txt b/mcu/service/dhl/database/unionTag/mm_emm_context_unionTag.txt
new file mode 100755
index 0000000..10764ec
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/mm_emm_context_unionTag.txt
@@ -0,0 +1,63 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+This file is used by cgen for union Tag information.
+Usage:
+
+structure_name tag_field_name union_name:
+{
+ tag_fileld_value field_of_union_name;
+ tag_fileld_value field_of_union_name;
+};
+
+For Example:
+
+InvokeChoice ChoiceId a:
+{
+ 1 localValue;
+ 2 globalValue;
+};
+
+*/
+
+/**************************mm_emm_context_unionTag**************/
+#ifdef __SGLTE__
+emm_mm_context_info_struct which_context context:
+{
+ MM_TO_EMM_CONTEXT mm2emm_context;
+ EMM_TO_MM_CONTEXT emm2mm_context;
+ MM_TO_MM_CONTEXT mm2mm_context;
+};
+#endif /*__SGLTE__*/
diff --git a/mcu/service/dhl/database/unionTag/rrlp_unionTag.txt b/mcu/service/dhl/database/unionTag/rrlp_unionTag.txt
new file mode 100755
index 0000000..35de557
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/rrlp_unionTag.txt
@@ -0,0 +1,68 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+This file is used by cgen for union Tag information.
+Usage:
+
+structure_name tag_field_name union_name:
+{
+ tag_fileld_value field_of_union_name;
+ tag_fileld_value field_of_union_name;
+};
+
+For Example:
+
+InvokeChoice ChoiceId a:
+{
+ 1 localValue;
+ 2 globalValue;
+};
+
+*/
+
+/****************************** RRLP UnionTag ********************************/
+
+gps_lcsp_assist_data_req_struct type assist_data:
+{
+ GPS_ASSIST_NAVIGATION_MODEL navigation_model;
+ GPS_ASSIST_ALMANAC almanac;
+ GPS_ASSIST_REF_TIME ref_time;
+ GPS_ASSIST_REF_LOCATION ref_location;
+ GPS_ASSIST_IONOSPHERE ionosphere;
+ GPS_ASSIST_UTC utc;
+ GPS_ASSIST_DGPS_CORRECTION dgps;
+ GPS_ASSIST_ACQUISITION acquisition;
+ GPS_ASSIST_RTI rti;
+};
diff --git a/mcu/service/dhl/database/unionTag/supl_unionTag.txt b/mcu/service/dhl/database/unionTag/supl_unionTag.txt
new file mode 100755
index 0000000..98fc87c
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/supl_unionTag.txt
@@ -0,0 +1,97 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+This file is used by cgen for union Tag information.
+Usage:
+
+structure_name tag_field_name union_name:
+{
+ tag_fileld_value field_of_union_name;
+ tag_fileld_value field_of_union_name;
+};
+
+For Example:
+
+InvokeChoice ChoiceId a:
+{
+ 1 localValue;
+ 2 globalValue;
+};
+
+*/
+
+/****************************** SUPL UnionTag ********************************/
+
+/* For L4C cell info */
+
+l4c_nbr_cell_info_ind_struct rat_mode ps_nbr_cell_info_union:
+{
+#ifdef __GSM_RAT__
+ 1 gas_nbr_cell_info;
+#endif
+#ifdef __UMTS_RAT__
+ 2 uas_nbr_cell_info;
+#endif
+#ifdef __LTE_RAT__
+ 4 eas_nbr_cell_info;
+#endif
+};
+
+l4c_nbr_cell_info_reg_cnf_struct rat_mode ps_nbr_cell_info_union:
+{
+#ifdef __GSM_RAT__
+ 1 gas_nbr_cell_info;
+#endif
+#ifdef __UMTS_RAT__
+ 2 uas_nbr_cell_info;
+#endif
+#ifdef __LTE_RAT__
+ 4 eas_nbr_cell_info;
+#endif
+};
+
+#ifdef __UMTS_RAT__
+uas_freq_info_mode_specific_info_struct mode choice:
+{
+ 1 fdd;
+ 2 tdd;
+};
+
+uas_cell_measured_results_mode_specific_info_struct mode choice:
+{
+ UAS_CELL_MEASURED_RESULTS_MODE_FDD fdd;
+ UAS_CELL_MEASURED_RESULTS_MODE_TDD tdd;
+};
+#endif
diff --git a/mcu/service/dhl/database/unionTag/unionTag_db.c b/mcu/service/dhl/database/unionTag/unionTag_db.c
new file mode 100644
index 0000000..9ccca75
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/unionTag_db.c
@@ -0,0 +1,147 @@
+/********************************************************************************************
+ * LEGAL DISCLAIMER
+ *
+ * (Header of MediaTek Software/Firmware Release or Documentation)
+ *
+ * BY OPENING OR USING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE") RECEIVED
+ * FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON AN "AS-IS" BASIS
+ * ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES, EXPRESS OR IMPLIED,
+ * INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR
+ * A PARTICULAR PURPOSE OR NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY
+ * WHATSOEVER WITH RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK
+ * ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+ * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S SPECIFICATION
+ * OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+ *
+ * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE LIABILITY WITH
+ * RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION,
+ *
+ * TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE
+ * FEES OR SERVICE CHARGE PAID BY BUYER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE WITH THE LAWS
+ * OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF LAWS PRINCIPLES.
+ ************************************************************************************************/
+
+
+/*******************************************************************************
+ *
+ * Filename:
+ * ---------
+ * unionTag_db.c
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * This file used for pre-processing to build unionTag DB
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * $Log$
+ *
+ * 07 04 2019 kc.lin
+ * [MOLY00417164] [VGMM] NW-initiated Procedure collision handling, TST inject, local release
+ * .
+ *
+ * 08 24 2018 mars.chang
+ * [MOLY00331434] [MT6297] NL1TST Common modify
+ * merge patch from 97 dev to VMOLY
+ *
+ * 07 30 2018 chi-chun.lu
+ * [MOLY00342741] [MakeFile] [UMOLYE] [Modify Makefile Rules] enhance build flow for cgen tdd/fdd preprocessing files
+ *
+ * .
+ *
+ *==============================================================================
+ * How to add a new unionTag script
+ * 1. Put the unionTag script into the proper folder e.g: \dhl\database\unionTag
+ * \dhl\database_classb\unionTag
+ * \dhl\database_classb_umts\unionTag
+ * \dhl\database_modis\unionTag
+ * 2. #include <xxx.txt>.
+ * Notably, you should use #include <xxx.txt> rather than "xxx.txt"
+ * If you have two different scripts with the same name in database\unionTag
+ * and database_modis\unionTag, please make sure you use #include <xxx.txt>.
+ * If you use #include "xxx.txt", Codegen will process \dhl\database\unionTag\xxx.txt
+ * instead of \dhl\database_modis\unionTag\xxx.txt. So you are suggested to use
+ * #include <xxx.txt> all the way.
+ *******************************************************************************/
+/********************************************* Warning **********************************************
+* Please make sure header file is included correctly!
+* If the common header file is added to unionTag_db_tdd_fdd.c, the context of header file will be preprocessed twice.
+* The change as mentioned previously can lead to build time inefficiency.
+*
+* common header file => unionTag_db.c
+* Tdd/Fdd(2g/3g) header file => unionTag_db_tdd_fdd.c
+*
+* If the header file relate to Tdd/Fdd (2g/3g), please include the header file in unionTag_db_tdd_fdd.c
+* If the header file is common header file or is not related to Tdd/Fdd(2g/3g), please add the header file to unionTag_db.c
+********************************************** Warning **********************************************/
+#ifdef _MODIS_ON_VC9_
+#define __w64
+#endif
+
+#ifdef STDC_HEADERS
+#undef STDC_HEADERS //it will include stdio.h
+#endif
+
+#ifdef __UMTS_RAT__
+#include <unionTag.txt>
+#endif
+
+#if defined __RRLP_SUPPORT__
+#include <rrlp_unionTag.txt>
+#endif
+
+#ifdef UNIT_TEST
+//For MODIS Project, please include your header here, e.g: #include <modis.txt>
+//Please put your unionTag files to \dhl\database_modis\unionTag\
+#include <vgmm_unionTag.txt>
+#endif //#ifdef UNIT_TEST
+
+
+#ifdef __AGNSS_SUPPORT__
+#include <gnss_unionTag.txt>
+#endif
+
+#ifdef __MD93__
+#include <FT_GL1TST_Gen93_UnionTag.txt>
+#include <FT_UL1TST_Gen93_UnionTag.txt>
+#include <FT_EL1TST_Gen93_UnionTag.txt>
+#include <FT_MML1TST_Gen93_UnionTag.txt>
+#endif
+
+#ifdef __MD95__
+#include <FT_GL1TST_Gen95_UnionTag.txt>
+#include <FT_UL1TST_Gen95_UnionTag.txt>
+#include <FT_EL1TST_Gen95_UnionTag.txt>
+#include <FT_MML1TST_Gen95_UnionTag.txt>
+#endif
+#ifdef __MD97__
+#include <FT_GL1TST_Gen97_UnionTag.txt>
+#include <FT_UL1TST_Gen97_UnionTag.txt>
+#include <FT_EL1TST_Gen97_UnionTag.txt>
+#include <FT_MML1TST_Gen97_UnionTag.txt>
+#include <FT_NL1TST_Gen97_UnionTag.txt>
+#include <vgmm_unionTag.txt>
+#endif
+
+/********************************************* Warning **********************************************
+* Please make sure header file is included correctly!
+* If the common header file is added to unionTag_db_tdd_fdd.c, the context of header file will be preprocessed twice.
+* The change as mentioned previously can lead to build time inefficiency.
+*
+* common header file => unionTag_db.c
+* Tdd/Fdd(2g/3g) header file => unionTag_db_tdd_fdd.c
+*
+* If the header file relate to Tdd/Fdd (2g/3g), please include the header file in unionTag_db_tdd_fdd.c
+* If the header file is common header file or is not related to Tdd/Fdd(2g/3g), please add the header file to unionTag_db.c
+********************************************** Warning **********************************************/
diff --git a/mcu/service/dhl/database/unionTag/unionTag_db_tdd_fdd.c b/mcu/service/dhl/database/unionTag/unionTag_db_tdd_fdd.c
new file mode 100644
index 0000000..13ece93
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/unionTag_db_tdd_fdd.c
@@ -0,0 +1,162 @@
+/********************************************************************************************
+ * LEGAL DISCLAIMER
+ *
+ * (Header of MediaTek Software/Firmware Release or Documentation)
+ *
+ * BY OPENING OR USING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE") RECEIVED
+ * FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON AN "AS-IS" BASIS
+ * ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES, EXPRESS OR IMPLIED,
+ * INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR
+ * A PARTICULAR PURPOSE OR NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY
+ * WHATSOEVER WITH RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK
+ * ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+ * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S SPECIFICATION
+ * OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+ *
+ * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE LIABILITY WITH
+ * RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION,
+ *
+ * TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE
+ * FEES OR SERVICE CHARGE PAID BY BUYER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE WITH THE LAWS
+ * OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF LAWS PRINCIPLES.
+ ************************************************************************************************/
+
+
+/*******************************************************************************
+ *
+ * Filename:
+ * ---------
+ * unionTag_db.c
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * This file used for pre-processing to build unionTag DB
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * $Log$
+ *
+ *==============================================================================
+ * How to add a new unionTag script
+ * 1. Put the unionTag script into the proper folder e.g: \dhl\database\unionTag
+ * \dhl\database_classb\unionTag
+ * \dhl\database_classb_umts\unionTag
+ * \dhl\database_modis\unionTag
+ * 2. #include <xxx.txt>.
+ * Notably, you should use #include <xxx.txt> rather than "xxx.txt"
+ * If you have two different scripts with the same name in database\unionTag
+ * and database_modis\unionTag, please make sure you use #include <xxx.txt>.
+ * If you use #include "xxx.txt", Codegen will process \dhl\database\unionTag\xxx.txt
+ * instead of \dhl\database_modis\unionTag\xxx.txt. So you are suggested to use
+ * #include <xxx.txt> all the way.
+ *******************************************************************************/
+/********************************************* Warning **********************************************
+* Please make sure header file is included correctly!
+* If the common header file is added to unionTag_db_tdd_fdd.c, the context of header file will be preprocessed twice.
+* The change as mentioned previously can lead to build time inefficiency.
+*
+* common header file => unionTag_db.c
+* Tdd/Fdd(2g/3g) header file => unionTag_db_tdd_fdd.c
+*
+* If the header file relate to Tdd/Fdd (2g/3g), please include the header file in unionTag_db_tdd_fdd.c
+* If the header file is common header file or is not related to Tdd/Fdd(2g/3g), please add the header file to unionTag_db.c
+********************************************** Warning **********************************************/
+
+#ifdef _MODIS_ON_VC9_
+#define __w64
+#endif
+
+#ifdef STDC_HEADERS
+#undef STDC_HEADERS //it will include stdio.h
+#endif
+
+#ifdef __UMTS_RAT__
+#include <unionTag.txt>
+#endif
+
+#ifdef __UMTS_FDD_MODE__
+
+#if !defined(__MAUI_BASIC__)
+
+#include <GAS_unionTag.txt>
+
+#ifdef __PS_SERVICE__
+#include <GAS_PS_unionTag.txt>
+#endif
+
+/* for MCDDLL */
+#ifdef __PS_SERVICE__
+#include <GAS_CS_PS_MCDDLL_unionTag.txt>
+#else
+#include <GAS_CS_MCDDLL_unionTag.txt>
+#endif
+
+#ifdef __EGPRS_MODE__
+#include <GAS_EDGE_PS_unionTag.txt>
+#endif
+
+#endif
+
+#endif /* FDD */
+
+#ifdef __UMTS_TDD128_MODE__
+
+#if !defined(__MAUI_BASIC__)
+
+#include <GAS_unionTag_tdd.txt>
+
+#ifdef __PS_SERVICE__
+#include <GAS_PS_unionTag_tdd.txt>
+#endif
+
+/* for MCDDLL */
+#ifdef __PS_SERVICE__
+#include <GAS_CS_PS_MCDDLL_unionTag_tdd.txt>
+#else
+#include <GAS_CS_MCDDLL_unionTag_tdd.txt>
+#endif
+
+#ifdef __EGPRS_MODE__
+#include <GAS_EDGE_PS_unionTag_tdd.txt>
+#endif
+
+#endif
+
+#endif /* TDD 128*/
+
+
+#ifdef UNIT_TEST
+//For MODIS Project, please include your header here, e.g: #include <modis.txt>
+//Please put your unionTag files to \dhl\database_modis\unionTag\
+
+#endif //#ifdef UNIT_TEST
+
+
+#ifndef __MTK_TARGET__
+#ifdef __EM_MODE__
+#include <em_unionTag.txt>
+#endif
+#endif
+
+/********************************************* Warning **********************************************
+* Please make sure header file is included correctly!
+* If the common header file is added to unionTag_db_tdd_fdd.c, the context of header file will be preprocessed twice.
+* The change as mentioned previously can lead to build time inefficiency.
+*
+* common header file => unionTag_db.c
+* Tdd/Fdd(2g/3g) header file => unionTag_db_tdd_fdd.c
+*
+* If the header file relate to Tdd/Fdd (2g/3g), please include the header file in unionTag_db_tdd_fdd.c
+* If the header file is common header file or is not related to Tdd/Fdd(2g/3g), please add the header file to unionTag_db.c
+********************************************** Warning **********************************************/
\ No newline at end of file
diff --git a/mcu/service/dhl/database/unionTag/unionTag_sample.txt b/mcu/service/dhl/database/unionTag/unionTag_sample.txt
new file mode 100755
index 0000000..770e79f
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/unionTag_sample.txt
@@ -0,0 +1,55 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+This file is used by cgen for union Tag information.
+Usage:
+
+structure_name tag_field_name union_name:
+{
+ tag_fileld_value field_of_union_name;
+ tag_fileld_value field_of_union_name;
+};
+
+For Example:
+
+InvokeChoice ChoiceId a:
+{
+ 1 localValue;
+ 2 globalValue;
+};
+
+*/
+
+
diff --git a/mcu/service/dhl/database/unionTag/vgmm_unionTag.txt b/mcu/service/dhl/database/unionTag/vgmm_unionTag.txt
new file mode 100644
index 0000000..2d9b5e0
--- /dev/null
+++ b/mcu/service/dhl/database/unionTag/vgmm_unionTag.txt
@@ -0,0 +1,42 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+#ifdef __VGMM_ENABLE__
+vgmm_tst_msg_struct msg_type u:
+{
+ 0x41 index_2_reg_req;
+ 0x45 index_3_mo_dereg_req;
+ 0x4C index_4_service_req;
+};
+#endif
diff --git a/mcu/service/dhl/database/uniontag_userdefined.txt b/mcu/service/dhl/database/uniontag_userdefined.txt
new file mode 100755
index 0000000..44d11c9
--- /dev/null
+++ b/mcu/service/dhl/database/uniontag_userdefined.txt
@@ -0,0 +1,1368 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2007
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*
+This file is used by cgen for union Tag information.
+Usage:
+
+structure_name tag_field_name union_name:
+{
+ tag_fileld_value field_of_union_name;
+ tag_fileld_value field_of_union_name;
+};
+
+For Example:
+
+InvokeChoice ChoiceId a:
+{
+ 1 localValue;
+ 2 globalValue;
+};
+
+*/
+/*
+unpack_msg msg_type rr_peer_msg:
+{
+
+ STRUCT_ID_RR_PEER_ADDITIONAL_ASSIGNMENT_STRUCT additional_assignment;
+ STRUCT_ID_IMMEDIATE_ASSIGN_MESSAGE immediate_assign_msg;
+ STRUCT_ID_IMMEDIATE_ASSIGN_EXT_MESSAGE immediate_assign_ext_msg;
+ STRUCT_ID_IMM_ASGN_REJ_MSG_STRUCT imm_asgn_rej_msg;
+ STRUCT_ID_CIPHER_MODE_COMMAND_STRUCT cipher_mode_command;
+ STRUCT_ID_CIPHER_MODE_COMPLETE_STRUCT cipher_mode_complete;
+ STRUCT_ID_ASSIGNMENT_COMMAND_STRUCT assignment_command;
+ STRUCT_ID_PDCH_ASSIGNMENT_COMMAND_STRUCT pdch_assignment_command;
+ STRUCT_ID_HANDOVER_COMMAND_STRUCT handover_command;
+ STRUCT_ID_HANDOVER_COMPLETE_STRUCT handover_complete;
+ STRUCT_ID_RR_CELL_CHANGE_ORDER_STRUCT rr_cell_change_order;
+ STRUCT_ID_PHYSICAL_INFORMATION_STRUCT physical_information;
+ STRUCT_ID_CHANNEL_RELEASE_STRUCT channel_release;
+ STRUCT_ID_RR_PEER_PARTIAL_RELEASE_STRUCT partial_release;
+ STRUCT_ID_RR_PEER_PARTIAL_RELEASE_COMPLETE_STRUCT rr_peer_partial_release_complete;
+ STRUCT_ID_PAGING_REQUEST_TYPE1_STRUCT paging_request_1;
+ STRUCT_ID_PAGING_REQUEST_TYPE2_STRUCT paging_request_2;
+ STRUCT_ID_PAGING_REQUEST_TYPE3_STRUCT paging_request_3;
+ STRUCT_ID_SI_1_STRUCT si_1;
+ STRUCT_ID_SI_2_STRUCT si_2;
+ STRUCT_ID_SI_2BIS_STRUCT si_2bis;
+ STRUCT_ID_SI_2TER_STRUCT si_2ter;
+ STRUCT_ID_SI_2QUATER_STRUCT si_2quater;
+ STRUCT_ID_SI_3_STRUCT si_3;
+ STRUCT_ID_SI_4_STRUCT si_4;
+ STRUCT_ID_SI_5_STRUCT si_5;
+ STRUCT_ID_SI_5BIS_STRUCT si_5bis;
+ STRUCT_ID_SI_5TER_STRUCT si_5ter;
+ STRUCT_ID_SI_6_STRUCT si_6;
+ STRUCT_ID_SI_7_STRUCT si_7;
+ STRUCT_ID_SI_8_STRUCT si_8;
+ STRUCT_ID_SI_9_STRUCT si_9;
+ STRUCT_ID_SI_13_STRUCT si_13;
+ STRUCT_ID_SI_16_STRUCT si_16;
+ STRUCT_ID_SI_17_STRUCT si_17;
+ STRUCT_ID_SI_18_STRUCT si_18;
+ STRUCT_ID_SI_19_STRUCT si_19;
+ STRUCT_ID_SI_20_STRUCT si_20;
+ STRUCT_ID_EXTENDED_MEASUREMENT_ORDER_STRUCT extended_measurement_order;
+ STRUCT_ID_CHANNEL_MODE_MODIFY_STRUCT channel_mode_modify;
+ STRUCT_ID_CHANNEL_MODE_MODIFY_ACK_STRUCT channel_mode_modify_ack_struct;
+ STRUCT_ID_RR_PEER_CLASSMARK_CHANGE_STRUCT classmark_change;
+ STRUCT_ID_RR_PEER_CLASSMARK_ENQUIRY_STRUCT classmark_enquiry;
+ STRUCT_ID_FREQUENCY_REDEFINITION_STRUCT frequency_redefinition;
+ STRUCT_ID_RR_STATUS_STRUCT rr_status;
+ STRUCT_ID_CONFIGURATION_CHANGE_COMMAND_STRUCT configuration_change_command;
+ STRUCT_ID_PACKET_ACCESS_REJECT paj;
+ STRUCT_ID_PACKET_QUEING_NOTIFICATION pqn;
+ STRUCT_ID_PKT_RESOURCE_REQUEST_STRUCT prr;
+ STRUCT_ID_PKT_UPLINK_ASSIGNMENT_MSG puas;
+ STRUCT_ID_PKT_DOWNLINK_ASSIGN pdas;
+ STRUCT_ID_PKT_TBFRELEASE_STRUCT pkt_tbf_releasel;
+ STRUCT_ID_PACKET_PAGING_REQUEST pkt_paging;
+ STRUCT_ID_PKT_DN_LINK_ACK_NACK pdan;
+ STRUCT_ID_PKT_UPLINK_ACK_NACK puan;
+ STRUCT_ID_PSI1MSG psi1;
+ STRUCT_ID_PSI2MSG psi2;
+ STRUCT_ID_PSI3MSG psi3;
+ STRUCT_ID_PSI3BISMSG psi3bis;
+ STRUCT_ID_PSI4MSG psi4;
+ STRUCT_ID_PSI5MSG psi5;
+ STRUCT_ID_PSI13MSG psi13;
+ STRUCT_ID_PKT_CTRL_ACK_STRUCT pca;
+ STRUCT_ID_PKT_CELL_CHANGE_FAILURE pkt_cell_change_failure;
+ STRUCT_ID_PKT_CELL_CHANGE_ORDER pcco;
+ STRUCT_ID_PKT_DOWNLINK_DUMMY_CTRL_BLK pkt_dl_dummy;
+ STRUCT_ID_PKT_UPLINK_DUMMY pkt_ul_dummy;
+ STRUCT_ID_PKT_MEAS_REPORT_STRUCT pkt_meas_report;
+ STRUCT_ID_PKT_MEASUREMENT_ORDER_STRUCT pmo;
+ STRUCT_ID_PKT_MOBILE_TBFSTATUS ptk_tbfstatus;
+ STRUCT_ID_PACKET_PDCHRELEASE pdch_release;
+ STRUCT_ID_PACKET_POLLING_REQUEST packet_polling;
+ STRUCT_ID_PKT_PWR_CTRL_TIM_ADV_STRUCT pkt_pc_n_ta;
+ STRUCT_ID_PKT_PRACH_PARAMS_STRUCT pkt_prach_params;
+ STRUCT_ID_PKTPSISTATUS psistatus;
+ STRUCT_ID_PKT_TIMESLOT_RECONFIGURE pkt_timeslot_reconfig;
+};
+*/
+
+#ifdef __CGEN_UMTS_FDD_MODE__
+FDD_urlc_sufi_struct selection choice:
+{
+ FDD_Sufi_NO_MORE_selected Sufi_NO_MORE;
+ FDD_Sufi_ACK_selected Sufi_ACK;
+ FDD_Sufi_WINDOW_selected Sufi_WINDOW;
+ FDD_Sufi_LIST_selected Sufi_LIST;
+ FDD_Sufi_BITMAP_selected Sufi_BITMAP;
+ FDD_Sufi_RLIST_selected Sufi_RLIST;
+ FDD_Sufi_MRW_selected Sufi_MRW;
+ FDD_Sufi_MRWACK_selected Sufi_MRWACK;
+};
+#endif /* __CGEN_UMTS_FDD_MODE__ */
+
+#ifdef __SGLTE__
+emm_mm_context_info_struct which_context context:
+{
+ MM_TO_EMM_CONTEXT mm2emm_context;
+ EMM_TO_MM_CONTEXT emm2mm_context;
+ MM_TO_MM_CONTEXT mm2mm_context;
+};
+#endif /*__SGLTE__*/
+
+#ifdef __CGEN_UMTS_TDD128_MODE__
+TDD_urlc_am_pdu_decode_struct PduType pdu:
+{
+ TDD_AM_DATA_PDU AM_Data_PDU;
+ TDD_AM_STATUS_PDU AM_Status_PDU;
+ TDD_AM_RESERT_PDU AM_Reset_PDU;
+ TDD_AM_RESETACK_PDU AM_ResetAck_PDU;
+};
+
+TDD_urlc_pdu_decode_struct EntityMode mode:
+{
+ RLC_AM AM_Mode;
+ RLC_UM UM_Mode;
+ RLC_TM TM_Mode;
+};
+
+tdd_rrce_meme_move_to_state_req_struct selection choice:
+{
+ TDD_MEME_CELL_DCH cellDCH;
+ TDD_MEME_CELL_FACH cellFACH;
+ TDD_MEME_IDLE idle;
+ TDD_MEME_INACTIVE inactive;
+ TDD_MEME_PCH pch;
+};
+
+TDD_msg_buf_unpack_T msg_id buffer:
+{
+ MSG_ID_TDD_CPHY_PCH_SETUP_REQ cphy_pch_setup_req;
+ MSG_ID_TDD_CPHY_PCH_MODIFY_REQ cphy_pch_modify_req;
+ MSG_ID_TDD_CPHY_PCH_RELEASE_REQ cphy_pch_release_req;
+ MSG_ID_TDD_CPHY_FACH_SETUP_REQ cphy_fach_setup_req;
+ MSG_ID_TDD_CPHY_FACH_RELEASE_REQ cphy_fach_release_req;
+ MSG_ID_TDD_CPHY_DCH_SETUP_REQ cphy_dch_setup_req;
+ MSG_ID_TDD_CPHY_DCH_MODIFY_REQ cphy_dch_modify_req;
+ MSG_ID_TDD_CPHY_DCH_RELEASE_REQ cphy_dch_release_req;
+ MSG_ID_TDD_CPHY_RACH_SETUP_REQ cphy_rach_setup_req;
+ MSG_ID_TDD_CPHY_RACH_RELEASE_REQ cphy_rach_release_req;
+#ifdef __HSDPA_SUPPORT__
+ MSG_ID_TDD_CPHY_HSDSCH_SETUP_REQ cphy_hsdsch_setup_req;
+ MSG_ID_TDD_CPHY_HSDSCH_MODIFY_REQ cphy_hsdsch_modify_req;
+ MSG_ID_TDD_CPHY_HSDSCH_RELEASE_REQ cphy_hsdsch_release_req;
+#endif
+#ifdef __HSUPA_SUPPORT__
+ MSG_ID_TDD_CPHY_EDCH_SETUP_REQ cphy_edch_setup_req;
+ MSG_ID_TDD_CPHY_EDCH_MODIFY_REQ cphy_edch_modify_req;
+ MSG_ID_TDD_CPHY_EDCH_RELEASE_REQ cphy_edch_release_req;
+#endif
+ MSG_ID_TDD_CPHY_MEASUREMENT_CONFIG_DMO_REQ cphy_measurement_config_dmo_req;
+};
+#endif
+/* FDD part */
+FDD_msg_buf_unpack_T msg_id buffer:
+{
+ MSG_ID_FDD_CPHY_PCH_SETUP_REQ cphy_pch_setup_req;
+ MSG_ID_FDD_CPHY_PCH_MODIFY_REQ cphy_pch_modify_req;
+ MSG_ID_FDD_CPHY_PCH_RELEASE_REQ cphy_pch_release_req;
+ MSG_ID_FDD_CPHY_FACH_SETUP_REQ cphy_fach_setup_req;
+
+ MSG_ID_FDD_CPHY_FACH_MODIFY_REQ cphy_fach_modify_req;
+
+ MSG_ID_FDD_CPHY_FACH_RELEASE_REQ cphy_fach_release_req;
+ MSG_ID_FDD_CPHY_DCH_SETUP_REQ cphy_dch_setup_req;
+ MSG_ID_FDD_CPHY_DCH_MODIFY_REQ cphy_dch_modify_req;
+ MSG_ID_FDD_CPHY_DCH_RELEASE_REQ cphy_dch_release_req;
+ MSG_ID_FDD_CPHY_RACH_SETUP_REQ cphy_rach_setup_req;
+ MSG_ID_FDD_CPHY_RACH_RELEASE_REQ cphy_rach_release_req;
+#ifdef __HSDPA_SUPPORT__
+ MSG_ID_FDD_CPHY_HSDSCH_SETUP_REQ cphy_hsdsch_setup_req;
+ MSG_ID_FDD_CPHY_HSDSCH_MODIFY_REQ cphy_hsdsch_modify_req;
+ MSG_ID_FDD_CPHY_HSDSCH_RELEASE_REQ cphy_hsdsch_release_req;
+#endif
+#ifdef __HSUPA_SUPPORT__
+ MSG_ID_FDD_CPHY_EDCH_SETUP_REQ cphy_edch_setup_req;
+ MSG_ID_FDD_CPHY_EDCH_MODIFY_REQ cphy_edch_modify_req;
+ MSG_ID_FDD_CPHY_EDCH_RELEASE_REQ cphy_edch_release_req;
+#endif
+};
+#ifdef __CGEN_UMTS_TDD128_MODE__
+tdd_cmac_config_tfc_subset_req_struct selection choice:
+{
+ 1 fullList;
+ 2 explicitList;
+};
+
+TDD_ul_dpch_tfc_T gain_factor_ind gain_factor:
+{
+ TDD_GAIN_FACTOR_SIGNAL sig_gain;
+ TDD_GAIN_FACTOR_COMPUTE computed_gain_id;
+};
+#endif
+
+/* FDD part */
+FDD_ul_dpch_tfc_T sig_gain_ind gain_factor:
+{
+ KAL_FALSE sig_gain;
+ KAL_TRUE computed_gain_id;
+};
+
+#if 0
+#ifdef __UMTS_TDD128_MODE__
+CsceCseSelectedCellTechnology selection choice:
+{
+ RRC_DB_Cell_cellTechnology_umts_selected umts;
+ RRC_DB_Cell_cellTechnology_gsm_selected gsm;
+};
+#endif
+#endif
+
+#ifdef __UMTS_FDD_MODE__
+RRC_FDD_DB_SelectedCellTechnology selection choice:
+{
+ RRC_FDD_DB_SelectedCellTechnology_umts_selected umts;
+ RRC_FDD_DB_SelectedCellTechnology_gsm_selected gsm;
+ RRC_FDD_DB_SelectedCellTechnology_eutra_selected eutra;
+};
+
+#ifdef __UMTS_R8__
+FDD_CsceMemeAPBLayer selection choice:
+{
+ FDD_CSCE_MEME_APB_UTRAN_INTER_FREQ uarfcn;
+ FDD_CSCE_MEME_APB_GERAN gsmCellGroup;
+ FDD_CSCE_MEME_APB_EUTRAN earfcn;
+};
+#endif
+#endif
+
+#ifdef __CGEN_UMTS_TDD128_MODE__
+RRC_TDD_DB_SelectedCellTechnology selection choice:
+{
+ RRC_TDD_DB_SelectedCellTechnology_umts_selected umts;
+ RRC_TDD_DB_SelectedCellTechnology_gsm_selected gsm;
+ RRC_TDD_DB_SelectedCellTechnology_eutra_selected eutra;
+};
+
+#ifdef __UMTS_R8__
+TDD_CsceMemeAPBLayer selection choice:
+{
+ TDD_CSCE_MEME_APB_UTRAN_INTER_FREQ uarfcn;
+ TDD_CSCE_MEME_APB_GERAN gsmCellGroup;
+ TDD_CSCE_MEME_APB_EUTRAN earfcn;
+};
+#endif
+#endif
+
+#if defined(__UMTS_FDD_MODE__) || defined(__UMTS_TDD128_MODE__)
+uas_gas_activate_gcell_req_struct ir_cell_change_trigger target_gcell_info:
+{
+ IR_CELL_RESELECTION target_gcell_reselect_info;
+ IR_REDIRECTION target_gcell_redirect_list;
+};
+
+GSM_Redirect_Info redirection_type redirection_info:
+{
+ UAS_GAS_REDIRECTION_INFO uas_redirectInfo;
+ EAS_GAS_REDIRECTION_INFO eas_redirectInfo;
+};
+#endif
+
+l4c_nbr_cell_info_ind_struct rat_mode ps_nbr_cell_info_union:
+{
+ 1 gas_nbr_cell_info;
+ 2 uas_nbr_cell_info;
+ 4 eas_nbr_cell_info;
+ 128 nr_as_nbr_cell_info;
+};
+
+l4c_nbr_cell_info_reg_cnf_struct rat_mode ps_nbr_cell_info_union:
+{
+ 1 gas_nbr_cell_info;
+ 2 uas_nbr_cell_info;
+ 4 eas_nbr_cell_info;
+ 128 nr_as_nbr_cell_info;
+};
+
+#ifdef __UMTS_RAT__
+uas_freq_info_mode_specific_info_struct mode choice:
+{
+ 1 fdd;
+ 2 tdd;
+};
+
+uas_cell_measured_results_mode_specific_info_struct mode choice:
+{
+ UAS_CELL_MEASURED_RESULTS_MODE_FDD fdd;
+ UAS_CELL_MEASURED_RESULTS_MODE_TDD tdd;
+};
+#endif
+
+FDD_RRC_InterSystem_TargetInfo selection choice:
+{
+ FDD_RRC_InterSystem_TargetInfo_gsm_TargetCellInfoList_selected gsm_TargetCellInfoList;
+#ifdef __UMTS_R8__
+ FDD_RRC_InterSystem_TargetInfo_eutra_TargetFreqInfoList_selected eutra_TargetFreqInfoList;
+#endif
+};
+
+#ifdef __CGEN_UMTS_TDD128_MODE__
+TDD_RRC_InterSystem_TargetInfo selection choice:
+{
+ TDD_RRC_InterSystem_TargetInfo_gsm_TargetCellInfoList_selected gsm_TargetCellInfoList;
+#ifdef __UMTS_R8__
+ TDD_RRC_InterSystem_TargetInfo_eutra_TargetFreqInfoList_selected eutra_TargetFreqInfoList;
+#endif
+};
+#endif
+
+#ifdef __MMDS_DC__
+
+ sim_intsim_access_req_struct op req_field :
+ {
+ SIM_INTSIM_ACCESS_FLIE_INFO file_info_req;
+ SIM_INTSIM_ACCESS_READ_BINARY read_req;
+ SIM_INTSIM_ACCESS_READ_RECORD read_req;
+ SIM_INTSIM_ACCESS_UPDATE_BINARY update_req;
+ SIM_INTSIM_ACCESS_UPDATE_RECORD update_req;
+ SIM_INTSIM_ACCESS_AUTHENTICATION auth_req;
+ SIM_INTSIM_ACCESS_INCREASE increase_req;
+ SIM_INTSIM_ACCESS_INVALIDATE invalidate_req;
+ SIM_INTSIM_ACCESS_REHABILITATE rehabilitate_req;
+};
+
+#endif
+
+at_cgev_ind_struct event info :
+{
+ CGEV_EVENT_NW_PDN_ACT nw_pdn_act;
+ CGEV_EVENT_ME_PDN_ACT me_pdn_act;
+ CGEV_EVENT_NW_ACT nw_act;
+ CGEV_EVENT_ME_ACT me_act;
+ CGEV_EVENT_NW_PDN_DEACT nw_pdn_deact;
+ CGEV_EVENT_ME_PDN_DEACT me_pdn_deact;
+ CGEV_EVENT_NW_DEACT nw_deact;
+ CGEV_EVENT_ME_DEACT me_deact;
+ CGEV_EVENT_NW_MODIFY nw_modify;
+ CGEV_EVENT_ME_MODIFY me_modify;
+ CGEV_EVENT_REJECT reject;
+ CGEV_EVENT_NW_REACT nw_react;
+};
+
+
+at_egev_ind_struct event info :
+{
+ EGEV_EVENT_REVIVE_START revive_start;
+ EGEV_EVENT_REVIVE_SUCCESS revive_success;
+ EGEV_EVENT_REVIVE_FINISH revive_finish;
+};
+
+nwsel_nas_sv_sys_info_update_ind_struct rat sys_info :
+{
+ RAT_GSM mm_sys_info;
+ RAT_UMTS mm_sys_info;
+ RAT_LTE emm_sys_info;
+ RAT_NR nrrc_sys_info;
+};
+
+nas_sv_any_regn_result_ind_struct rat nas_specific_container :
+{
+ RAT_GSM mm;
+ RAT_UMTS mm;
+ RAT_LTE emm;
+ RAT_NR vgmm;
+};
+
+nwsel_nas_sv_regn_result_ind_struct rat nas_specific_container :
+{
+ RAT_GSM mm;
+ RAT_UMTS mm;
+ RAT_LTE emm;
+ RAT_NR vgmm;
+};
+
+nwsel_nas_sv_plmn_search_req_struct rat as_specific_container :
+{
+ RAT_GSM gsm;
+ RAT_UMTS umts;
+ RAT_LTE lte;
+ RAT_NR nr;
+};
+
+rac_nas_sv_attach_detach_result_ind_struct cs_result_type cs_reg_result :
+{
+ ATTACH_CNF attach_cnf;
+ DETACH_IND detach_ind;
+};
+
+rac_nas_sv_attach_detach_result_ind_struct ps_result_type ps_reg_result :
+{
+ ATTACH_CNF attach_cnf;
+ DETACH_IND detach_ind;
+};
+
+cell_info_and_rat_struct rat cell_info :
+{
+ RAT_GSM gsm_cell;
+ RAT_UMTS umts_cell;
+ RAT_LTE lte_cell;
+ RAT_NR nr_cell;
+};
+
+l4c_nrrc_scg_event_config_req_struct scg_event scg_event_config :
+{
+ SCG_EVENT_FAILURE scg_event_failure_config;
+ SCG_EVENT_RELEASE scg_event_release_config;
+};
+
+
+#ifdef __LPP_SUPPORT__
+
+LPP_CellGlobalIdEUTRA_AndUTRA_cellIdentity selection choice :
+{
+ LPP_CellGlobalIdEUTRA_AndUTRA_cellIdentity_eutra_selected eutra;
+ LPP_CellGlobalIdEUTRA_AndUTRA_cellIdentity_utra_selected utra;
+};
+
+LPP_Velocity selection choice :
+{
+ LPP_Velocity_horizontalVelocity_selected horizontalVelocity;
+ LPP_Velocity_horizontalWithVerticalVelocity_selected horizontalWithVerticalVelocity;
+ LPP_Velocity_horizontalVelocityWithUncertainty_selected horizontalVelocityWithUncertainty;
+ LPP_Velocity_horizontalWithVerticalVelocityAndUncertainty_selected horizontalWithVerticalVelocityAndUncertainty;
+ LPP_Velocity_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_PRS_Info_prs_MutingInfo_r9 selection choice :
+{
+ LPP_PRS_Info_prs_MutingInfo_r9_po2_r9_selected po2_r9;
+ LPP_PRS_Info_prs_MutingInfo_r9_po4_r9_selected po4_r9;
+ LPP_PRS_Info_prs_MutingInfo_r9_po8_r9_selected po8_r9;
+ LPP_PRS_Info_prs_MutingInfo_r9_po16_r9_selected po16_r9;
+ LPP_PRS_Info_prs_MutingInfo_r9_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_NetworkTime_cellID_uTRA_mode selection choice :
+{
+ LPP_NetworkTime_cellID_uTRA_mode_fdd_selected fdd;
+ LPP_NetworkTime_cellID_uTRA_mode_tdd_selected tdd;
+};
+
+LPP_NetworkTime_cellID selection choice :
+{
+ LPP_NetworkTime_cellID_eUTRA_selected eUTRA;
+ LPP_NetworkTime_cellID_uTRA_selected uTRA;
+ LPP_NetworkTime_cellID_gSM_selected gSM;
+ LPP_NetworkTime_cellID_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_LocationCoordinates selection choice :
+{
+ LPP_LocationCoordinates_ellipsoidPoint_selected ellipsoidPoint;
+ LPP_LocationCoordinates_ellipsoidPointWithUncertaintyCircle_selected ellipsoidPointWithUncertaintyCircle;
+ LPP_LocationCoordinates_ellipsoidPointWithUncertaintyEllipse_selected ellipsoidPointWithUncertaintyEllipse;
+ LPP_LocationCoordinates_polygon_selected polygon;
+ LPP_LocationCoordinates_ellipsoidPointWithAltitude_selected ellipsoidPointWithAltitude;
+ LPP_LocationCoordinates_ellipsoidPointWithAltitudeAndUncertaintyEllipsoid_selected ellipsoidPointWithAltitudeAndUncertaintyEllipsoid;
+ LPP_LocationCoordinates_ellipsoidArc_selected ellipsoidArc;
+ LPP_LocationCoordinates_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_OTDOA_Error selection choice :
+{
+ LPP_OTDOA_Error_locationServerErrorCauses_selected locationServerErrorCauses;
+ LPP_OTDOA_Error_targetDeviceErrorCauses_selected targetDeviceErrorCauses;
+ LPP_OTDOA_Error_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_GNSS_OrbitModel selection choice :
+{
+ LPP_GNSS_OrbitModel_keplerianSet_selected keplerianSet;
+ LPP_GNSS_OrbitModel_nav_KeplerianSet_selected nav_KeplerianSet;
+ LPP_GNSS_OrbitModel_cnav_KeplerianSet_selected cnav_KeplerianSet;
+ LPP_GNSS_OrbitModel_glonass_ECEF_selected glonass_ECEF;
+ LPP_GNSS_OrbitModel_sbas_ECEF_selected sbas_ECEF;
+ LPP_GNSS_OrbitModel_UnKnowItem_selected UnKnowItem;
+ LPP_GNSS_OrbitModel_bds_KeplerianSet_r12_selected bds_KeplerianSet_r12;
+};
+
+LPP_GNSS_UTC_Model selection choice :
+{
+ LPP_GNSS_UTC_Model_utcModel1_selected utcModel1;
+ LPP_GNSS_UTC_Model_utcModel2_selected utcModel2;
+ LPP_GNSS_UTC_Model_utcModel3_selected utcModel3;
+ LPP_GNSS_UTC_Model_utcModel4_selected utcModel4;
+ LPP_GNSS_UTC_Model_UnKnowItem_selected UnKnowItem;
+ LPP_GNSS_UTC_Model_utcModel5_r12_selected utcModel5_r12;
+};
+
+LPP_MeasurementReferenceTime_networkTime_uTRA_mode selection choice :
+{
+ LPP_MeasurementReferenceTime_networkTime_uTRA_mode_fdd_selected fdd;
+ LPP_MeasurementReferenceTime_networkTime_uTRA_mode_tdd_selected tdd;
+};
+
+LPP_MeasurementReferenceTime_networkTime selection choice :
+{
+ LPP_MeasurementReferenceTime_networkTime_eUTRA_selected eUTRA;
+ LPP_MeasurementReferenceTime_networkTime_uTRA_selected uTRA;
+ LPP_MeasurementReferenceTime_networkTime_gSM_selected gSM;
+ LPP_MeasurementReferenceTime_networkTime_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_A_GNSS_Error selection choice :
+{
+ LPP_A_GNSS_Error_locationServerErrorCauses_selected locationServerErrorCauses;
+ LPP_A_GNSS_Error_targetDeviceErrorCauses_selected targetDeviceErrorCauses;
+ LPP_A_GNSS_Error_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_ECID_Error selection choice :
+{
+ LPP_ECID_Error_locationServerErrorCauses_selected locationServerErrorCauses;
+ LPP_ECID_Error_targetDeviceErrorCauses_selected targetDeviceErrorCauses;
+ LPP_ECID_Error_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_GNSS_ClockModel selection choice :
+{
+ LPP_GNSS_ClockModel_standardClockModelList_selected standardClockModelList;
+ LPP_GNSS_ClockModel_nav_ClockModel_selected nav_ClockModel;
+ LPP_GNSS_ClockModel_cnav_ClockModel_selected cnav_ClockModel;
+ LPP_GNSS_ClockModel_glonass_ClockModel_selected glonass_ClockModel;
+ LPP_GNSS_ClockModel_sbas_ClockModel_selected sbas_ClockModel;
+ LPP_GNSS_ClockModel_UnKnowItem_selected UnKnowItem;
+ LPP_GNSS_ClockModel_bds_ClockModel_r12_selected bds_ClockModel_r12;
+};
+
+LPP_GNSS_AlmanacElement selection choice :
+{
+ LPP_GNSS_AlmanacElement_keplerianAlmanacSet_selected keplerianAlmanacSet;
+ LPP_GNSS_AlmanacElement_keplerianNAV_Almanac_selected keplerianNAV_Almanac;
+ LPP_GNSS_AlmanacElement_keplerianReducedAlmanac_selected keplerianReducedAlmanac;
+ LPP_GNSS_AlmanacElement_keplerianMidiAlmanac_selected keplerianMidiAlmanac;
+ LPP_GNSS_AlmanacElement_keplerianGLONASS_selected keplerianGLONASS;
+ LPP_GNSS_AlmanacElement_ecef_SBAS_Almanac_selected ecef_SBAS_Almanac;
+ LPP_GNSS_AlmanacElement_UnKnowItem_selected UnKnowItem;
+ LPP_GNSS_AlmanacElement_keplerianBDS_Almanac_r12_selected keplerianBDS_Almanac_r12;
+};
+
+LPP_GNSS_AuxiliaryInformation selection choice :
+{
+ LPP_GNSS_AuxiliaryInformation_gnss_ID_GPS_selected gnss_ID_GPS;
+ LPP_GNSS_AuxiliaryInformation_gnss_ID_GLONASS_selected gnss_ID_GLONASS;
+ LPP_GNSS_AuxiliaryInformation_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_GNSS_NavigationModelReq selection choice :
+{
+ LPP_GNSS_NavigationModelReq_storedNavList_selected storedNavList;
+ LPP_GNSS_NavigationModelReq_reqNavList_selected reqNavList;
+ LPP_GNSS_NavigationModelReq_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_RequestCapabilities_criticalExtensions_c1 selection choice :
+{
+ LPP_RequestCapabilities_criticalExtensions_c1_requestCapabilities_r9_selected requestCapabilities_r9;
+ LPP_RequestCapabilities_criticalExtensions_c1_spare3_selected spare3;
+ LPP_RequestCapabilities_criticalExtensions_c1_spare2_selected spare2;
+ LPP_RequestCapabilities_criticalExtensions_c1_spare1_selected spare1;
+};
+
+LPP_RequestCapabilities_criticalExtensions selection choice :
+{
+ LPP_RequestCapabilities_criticalExtensions_c1_selected c1;
+ LPP_RequestCapabilities_criticalExtensions_criticalExtensionsFuture_selected criticalExtensionsFuture;
+};
+
+LPP_RequestLocationInformation_criticalExtensions_c1 selection choice :
+{
+ LPP_RequestLocationInformation_criticalExtensions_c1_requestLocationInformation_r9_selected requestLocationInformation_r9;
+ LPP_RequestLocationInformation_criticalExtensions_c1_spare3_selected spare3;
+ LPP_RequestLocationInformation_criticalExtensions_c1_spare2_selected spare2;
+ LPP_RequestLocationInformation_criticalExtensions_c1_spare1_selected spare1;
+};
+
+LPP_RequestLocationInformation_criticalExtensions selection choice :
+{
+ LPP_RequestLocationInformation_criticalExtensions_c1_selected c1;
+ LPP_RequestLocationInformation_criticalExtensions_criticalExtensionsFuture_selected criticalExtensionsFuture;
+};
+
+LPP_Abort_criticalExtensions_c1 selection choice :
+{
+ LPP_Abort_criticalExtensions_c1_abort_r9_selected abort_r9;
+ LPP_Abort_criticalExtensions_c1_spare3_selected spare3;
+ LPP_Abort_criticalExtensions_c1_spare2_selected spare2;
+ LPP_Abort_criticalExtensions_c1_spare1_selected spare1;
+};
+
+LPP_Abort_criticalExtensions selection choice :
+{
+ LPP_Abort_criticalExtensions_c1_selected c1;
+ LPP_Abort_criticalExtensions_criticalExtensionsFuture_selected criticalExtensionsFuture;
+};
+
+LPP_Error selection choice :
+{
+ LPP_Error_error_r9_selected error_r9;
+ LPP_Error_criticalExtensionsFuture_selected criticalExtensionsFuture;
+};
+
+LPP_ProvideCapabilities_criticalExtensions_c1 selection choice :
+{
+ LPP_ProvideCapabilities_criticalExtensions_c1_provideCapabilities_r9_selected provideCapabilities_r9;
+ LPP_ProvideCapabilities_criticalExtensions_c1_spare3_selected spare3;
+ LPP_ProvideCapabilities_criticalExtensions_c1_spare2_selected spare2;
+ LPP_ProvideCapabilities_criticalExtensions_c1_spare1_selected spare1;
+};
+
+LPP_ProvideCapabilities_criticalExtensions selection choice :
+{
+ LPP_ProvideCapabilities_criticalExtensions_c1_selected c1;
+ LPP_ProvideCapabilities_criticalExtensions_criticalExtensionsFuture_selected criticalExtensionsFuture;
+};
+
+LPP_RequestAssistanceData_criticalExtensions_c1 selection choice :
+{
+ LPP_RequestAssistanceData_criticalExtensions_c1_requestAssistanceData_r9_selected requestAssistanceData_r9;
+ LPP_RequestAssistanceData_criticalExtensions_c1_spare3_selected spare3;
+ LPP_RequestAssistanceData_criticalExtensions_c1_spare2_selected spare2;
+ LPP_RequestAssistanceData_criticalExtensions_c1_spare1_selected spare1;
+};
+
+LPP_RequestAssistanceData_criticalExtensions selection choice :
+{
+ LPP_RequestAssistanceData_criticalExtensions_c1_selected c1;
+ LPP_RequestAssistanceData_criticalExtensions_criticalExtensionsFuture_selected criticalExtensionsFuture;
+};
+
+LPP_ProvideAssistanceData_criticalExtensions_c1 selection choice :
+{
+ LPP_ProvideAssistanceData_criticalExtensions_c1_provideAssistanceData_r9_selected provideAssistanceData_r9;
+ LPP_ProvideAssistanceData_criticalExtensions_c1_spare3_selected spare3;
+ LPP_ProvideAssistanceData_criticalExtensions_c1_spare2_selected spare2;
+ LPP_ProvideAssistanceData_criticalExtensions_c1_spare1_selected spare1;
+};
+
+LPP_ProvideAssistanceData_criticalExtensions selection choice :
+{
+ LPP_ProvideAssistanceData_criticalExtensions_c1_selected c1;
+ LPP_ProvideAssistanceData_criticalExtensions_criticalExtensionsFuture_selected criticalExtensionsFuture;
+};
+
+LPP_ProvideLocationInformation_criticalExtensions_c1 selection choice :
+{
+ LPP_ProvideLocationInformation_criticalExtensions_c1_provideLocationInformation_r9_selected provideLocationInformation_r9;
+ LPP_ProvideLocationInformation_criticalExtensions_c1_spare3_selected spare3;
+ LPP_ProvideLocationInformation_criticalExtensions_c1_spare2_selected spare2;
+ LPP_ProvideLocationInformation_criticalExtensions_c1_spare1_selected spare1;
+};
+
+LPP_ProvideLocationInformation_criticalExtensions selection choice :
+{
+ LPP_ProvideLocationInformation_criticalExtensions_c1_selected c1;
+ LPP_ProvideLocationInformation_criticalExtensions_criticalExtensionsFuture_selected criticalExtensionsFuture;
+};
+
+LPP_LPP_MessageBody_c1 selection choice :
+{
+ LPP_LPP_MessageBody_c1_requestCapabilities_selected requestCapabilities;
+ LPP_LPP_MessageBody_c1_provideCapabilities_selected provideCapabilities;
+ LPP_LPP_MessageBody_c1_requestAssistanceData_selected requestAssistanceData;
+ LPP_LPP_MessageBody_c1_provideAssistanceData_selected provideAssistanceData;
+ LPP_LPP_MessageBody_c1_requestLocationInformation_selected requestLocationInformation;
+ LPP_LPP_MessageBody_c1_provideLocationInformation_selected provideLocationInformation;
+ LPP_LPP_MessageBody_c1_abort_selected abort;
+ LPP_LPP_MessageBody_c1_error_selected error;
+ LPP_LPP_MessageBody_c1_spare7_selected spare7;
+ LPP_LPP_MessageBody_c1_spare6_selected spare6;
+ LPP_LPP_MessageBody_c1_spare5_selected spare5;
+ LPP_LPP_MessageBody_c1_spare4_selected spare4;
+ LPP_LPP_MessageBody_c1_spare3_selected spare3;
+ LPP_LPP_MessageBody_c1_spare2_selected spare2;
+ LPP_LPP_MessageBody_c1_spare1_selected spare1;
+ LPP_LPP_MessageBody_c1_spare0_selected spare0;
+};
+
+LPP_LPP_MessageBody selection choice :
+{
+ LPP_LPP_MessageBody_c1_selected c1;
+ LPP_LPP_MessageBody_messageClassExtension_selected messageClassExtension;
+};
+
+#endif /* __LPP_SUPPORT__ */
+
+#ifdef __LPP_EXT_SUPPORT__
+
+LPP_EXT_OMA_LPPe_Orientation selection choice :
+{
+ LPP_EXT_OMA_LPPe_Orientation_eulerAngles_selected eulerAngles;
+ LPP_EXT_OMA_LPPe_Orientation_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_HorizontalUncertaintyAndConfidence_uncShape selection choice :
+{
+ LPP_EXT_OMA_LPPe_HorizontalUncertaintyAndConfidence_uncShape_circle_selected circle;
+ LPP_EXT_OMA_LPPe_HorizontalUncertaintyAndConfidence_uncShape_ellipse_selected ellipse;
+ LPP_EXT_OMA_LPPe_HorizontalUncertaintyAndConfidence_uncShape_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_AGNSS_CodePhaseError selection choice :
+{
+ LPP_EXT_OMA_LPPe_AGNSS_CodePhaseError_codePhaseRMSError_selected codePhaseRMSError;
+ LPP_EXT_OMA_LPPe_AGNSS_CodePhaseError_cnr_selected cnr;
+ LPP_EXT_OMA_LPPe_AGNSS_CodePhaseError_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_AGNSS_AntennaDescription_antennaDescription selection choice :
+{
+ LPP_EXT_OMA_LPPe_AGNSS_AntennaDescription_antennaDescription_igsAntennaName_selected igsAntennaName;
+ LPP_EXT_OMA_LPPe_AGNSS_AntennaDescription_antennaDescription_proprietaryName_selected proprietaryName;
+ LPP_EXT_OMA_LPPe_AGNSS_AntennaDescription_antennaDescription_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_SRN_SRNid_srn_id selection choice :
+{
+ LPP_EXT_OMA_LPPe_SRN_SRNid_srn_id_mac_selected mac;
+ LPP_EXT_OMA_LPPe_SRN_SRNid_srn_id_nfc_selected nfc;
+ LPP_EXT_OMA_LPPe_SRN_SRNid_srn_id_mobileCode_selected mobileCode;
+ LPP_EXT_OMA_LPPe_SRN_SRNid_srn_id_other_selected other;
+ LPP_EXT_OMA_LPPe_SRN_SRNid_srn_id_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_CellGlobalIdEUTRA_AndUTRA_cellIdentity selection choice :
+{
+ LPP_EXT_CellGlobalIdEUTRA_AndUTRA_cellIdentity_eutra_selected eutra;
+ LPP_EXT_CellGlobalIdEUTRA_AndUTRA_cellIdentity_utra_selected utra;
+};
+
+LPP_EXT_PRS_Info_prs_MutingInfo_r9 selection choice :
+{
+ LPP_EXT_PRS_Info_prs_MutingInfo_r9_po2_r9_selected po2_r9;
+ LPP_EXT_PRS_Info_prs_MutingInfo_r9_po4_r9_selected po4_r9;
+ LPP_EXT_PRS_Info_prs_MutingInfo_r9_po8_r9_selected po8_r9;
+ LPP_EXT_PRS_Info_prs_MutingInfo_r9_po16_r9_selected po16_r9;
+ LPP_EXT_PRS_Info_prs_MutingInfo_r9_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_VendorOrOperatorID selection choice :
+{
+ LPP_EXT_OMA_LPPe_VendorOrOperatorID_standard_VendorOrOperatorID_selected standard_VendorOrOperatorID;
+ LPP_EXT_OMA_LPPe_VendorOrOperatorID_nonStandard_VendorOrOperatorID_selected nonStandard_VendorOrOperatorID;
+ LPP_EXT_OMA_LPPe_VendorOrOperatorID_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_IP_Address_local_IP_Address selection choice :
+{
+ LPP_EXT_OMA_LPPe_IP_Address_local_IP_Address_iPv4_selected iPv4;
+ LPP_EXT_OMA_LPPe_IP_Address_local_IP_Address_iPv6_selected iPv6;
+ LPP_EXT_OMA_LPPe_IP_Address_local_IP_Address_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_AGNSS_RleIonoElement_ionoIndex selection choice :
+{
+ LPP_EXT_OMA_LPPe_AGNSS_RleIonoElement_ionoIndex_noaaScales_selected noaaScales;
+ LPP_EXT_OMA_LPPe_AGNSS_RleIonoElement_ionoIndex_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_AGNSS_Error selection choice :
+{
+ LPP_EXT_OMA_LPPe_AGNSS_Error_agnss_locationServerErrorCauses_selected agnss_locationServerErrorCauses;
+ LPP_EXT_OMA_LPPe_AGNSS_Error_agnss_targetDeviceErrorCauses_selected agnss_targetDeviceErrorCauses;
+ LPP_EXT_OMA_LPPe_AGNSS_Error_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_OTDOA_Error selection choice :
+{
+ LPP_EXT_OMA_LPPe_OTDOA_Error_locationServerErrorCauses_selected locationServerErrorCauses;
+ LPP_EXT_OMA_LPPe_OTDOA_Error_targetDeviceErrorCauses_selected targetDeviceErrorCauses;
+ LPP_EXT_OMA_LPPe_OTDOA_Error_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_EOTD_ReferenceBTSForAssistance_btsPosition selection choice :
+{
+ LPP_EXT_OMA_LPPe_EOTD_ReferenceBTSForAssistance_btsPosition_ellipsoidPoint_selected ellipsoidPoint;
+ LPP_EXT_OMA_LPPe_EOTD_ReferenceBTSForAssistance_btsPosition_ellipsoidPointWithAltitudeAndUncertaintyEllipsoid_selected ellipsoidPointWithAltitudeAndUncertaintyEllipsoid;
+ LPP_EXT_OMA_LPPe_EOTD_ReferenceBTSForAssistance_btsPosition_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_EOTD_Error selection choice :
+{
+ LPP_EXT_OMA_LPPe_EOTD_Error_locationServerErrorCauses_selected locationServerErrorCauses;
+ LPP_EXT_OMA_LPPe_EOTD_Error_targetDeviceErrorCauses_selected targetDeviceErrorCauses;
+ LPP_EXT_OMA_LPPe_EOTD_Error_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_OTDOA_UTRA_RefPosAssist_cellPosition selection choice :
+{
+ LPP_EXT_OMA_LPPe_OTDOA_UTRA_RefPosAssist_cellPosition_ellipsoidPoint_selected ellipsoidPoint;
+ LPP_EXT_OMA_LPPe_OTDOA_UTRA_RefPosAssist_cellPosition_ellipsoidPointWithAltitude_selected ellipsoidPointWithAltitude;
+ LPP_EXT_OMA_LPPe_OTDOA_UTRA_RefPosAssist_cellPosition_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_OTDOA_UTRA_IPDL_Parameters_modeSpecificInfo selection choice :
+{
+ LPP_EXT_OMA_LPPe_OTDOA_UTRA_IPDL_Parameters_modeSpecificInfo_fdd_selected fdd;
+ LPP_EXT_OMA_LPPe_OTDOA_UTRA_IPDL_Parameters_modeSpecificInfo_tdd_selected tdd;
+};
+
+LPP_EXT_OMA_LPPe_OTDOA_UTRA_Error selection choice :
+{
+ LPP_EXT_OMA_LPPe_OTDOA_UTRA_Error_locationServerErrorCauses_selected locationServerErrorCauses;
+ LPP_EXT_OMA_LPPe_OTDOA_UTRA_Error_targetDeviceErrorCauses_selected targetDeviceErrorCauses;
+ LPP_EXT_OMA_LPPe_OTDOA_UTRA_Error_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_ECID_LTE_Error selection choice :
+{
+ LPP_EXT_OMA_LPPe_ECID_LTE_Error_locationServerErrorCauses_selected locationServerErrorCauses;
+ LPP_EXT_OMA_LPPe_ECID_LTE_Error_targetDeviceErrorCauses_selected targetDeviceErrorCauses;
+ LPP_EXT_OMA_LPPe_ECID_LTE_Error_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_ECID_GSM_Error selection choice :
+{
+ LPP_EXT_OMA_LPPe_ECID_GSM_Error_locationServerErrorCauses_selected locationServerErrorCauses;
+ LPP_EXT_OMA_LPPe_ECID_GSM_Error_targetDeviceErrorCauses_selected targetDeviceErrorCauses;
+ LPP_EXT_OMA_LPPe_ECID_GSM_Error_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_ECID_UTRA_CellData_modeSpecificInfo selection choice :
+{
+ LPP_EXT_OMA_LPPe_ECID_UTRA_CellData_modeSpecificInfo_fdd_selected fdd;
+ LPP_EXT_OMA_LPPe_ECID_UTRA_CellData_modeSpecificInfo_tdd_selected tdd;
+};
+
+LPP_EXT_OMA_LPPe_ECID_UTRA_CellMeasuredResults_modeSpecificInfo selection choice :
+{
+ LPP_EXT_OMA_LPPe_ECID_UTRA_CellMeasuredResults_modeSpecificInfo_fdd_selected fdd;
+ LPP_EXT_OMA_LPPe_ECID_UTRA_CellMeasuredResults_modeSpecificInfo_tdd_selected tdd;
+};
+
+LPP_EXT_OMA_LPPe_ECID_UTRA_Error selection choice :
+{
+ LPP_EXT_OMA_LPPe_ECID_UTRA_Error_locationServerErrorCauses_selected locationServerErrorCauses;
+ LPP_EXT_OMA_LPPe_ECID_UTRA_Error_targetDeviceErrorCauses_selected targetDeviceErrorCauses;
+ LPP_EXT_OMA_LPPe_ECID_UTRA_Error_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_WLAN_AP_Error selection choice :
+{
+ LPP_EXT_OMA_LPPe_WLAN_AP_Error_locationServerErrorCauses_selected locationServerErrorCauses;
+ LPP_EXT_OMA_LPPe_WLAN_AP_Error_targetDeviceErrorCauses_selected targetDeviceErrorCauses;
+ LPP_EXT_OMA_LPPe_WLAN_AP_Error_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_ECID_WiMax_Error selection choice :
+{
+ LPP_EXT_OMA_LPPe_ECID_WiMax_Error_locationServerErrorCauses_selected locationServerErrorCauses;
+ LPP_EXT_OMA_LPPe_ECID_WiMax_Error_targetDeviceErrorCauses_selected targetDeviceErrorCauses;
+ LPP_EXT_OMA_LPPe_ECID_WiMax_Error_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_Sensor_Error selection choice :
+{
+ LPP_EXT_OMA_LPPe_Sensor_Error_targetError_selected targetError;
+ LPP_EXT_OMA_LPPe_Sensor_Error_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_NetworkTime_cellID_uTRA_mode selection choice :
+{
+ LPP_EXT_NetworkTime_cellID_uTRA_mode_fdd_selected fdd;
+ LPP_EXT_NetworkTime_cellID_uTRA_mode_tdd_selected tdd;
+};
+
+LPP_EXT_NetworkTime_cellID selection choice :
+{
+ LPP_EXT_NetworkTime_cellID_eUTRA_selected eUTRA;
+ LPP_EXT_NetworkTime_cellID_uTRA_selected uTRA;
+ LPP_EXT_NetworkTime_cellID_gSM_selected gSM;
+ LPP_EXT_NetworkTime_cellID_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_Velocity selection choice :
+{
+ LPP_EXT_Velocity_horizontalVelocity_selected horizontalVelocity;
+ LPP_EXT_Velocity_horizontalWithVerticalVelocity_selected horizontalWithVerticalVelocity;
+ LPP_EXT_Velocity_horizontalVelocityWithUncertainty_selected horizontalVelocityWithUncertainty;
+ LPP_EXT_Velocity_horizontalWithVerticalVelocityAndUncertainty_selected horizontalWithVerticalVelocityAndUncertainty;
+ LPP_EXT_Velocity_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_AGNSS_CCPrequestControlParameters_ccpCommonRequest_refStation selection choice :
+{
+ LPP_EXT_OMA_LPPe_AGNSS_CCPrequestControlParameters_ccpCommonRequest_refStation_posBasedReferenceStationRequest_selected posBasedReferenceStationRequest;
+ LPP_EXT_OMA_LPPe_AGNSS_CCPrequestControlParameters_ccpCommonRequest_refStation_idBasedReferenceStationRequest_selected idBasedReferenceStationRequest;
+ LPP_EXT_OMA_LPPe_AGNSS_CCPrequestControlParameters_ccpCommonRequest_refStation_referenceStationKillList_selected referenceStationKillList;
+ LPP_EXT_OMA_LPPe_AGNSS_CCPrequestControlParameters_ccpCommonRequest_refStation_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_EOTD_NeighborIdentity selection choice :
+{
+ LPP_EXT_OMA_LPPe_EOTD_NeighborIdentity_bsicAndCarrier_selected bsicAndCarrier;
+ LPP_EXT_OMA_LPPe_EOTD_NeighborIdentity_ci_selected ci;
+ LPP_EXT_OMA_LPPe_EOTD_NeighborIdentity_multiFrameCarrier_selected multiFrameCarrier;
+ LPP_EXT_OMA_LPPe_EOTD_NeighborIdentity_requestIndex_selected requestIndex;
+ LPP_EXT_OMA_LPPe_EOTD_NeighborIdentity_systemInfoIndex_selected systemInfoIndex;
+ LPP_EXT_OMA_LPPe_EOTD_NeighborIdentity_ciAndLac_selected ciAndLac;
+ LPP_EXT_OMA_LPPe_EOTD_NeighborIdentity_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_OTDOA_UTRA_Neighbor_modeSpecificInfo selection choice :
+{
+ LPP_EXT_OMA_LPPe_OTDOA_UTRA_Neighbor_modeSpecificInfo_fdd_selected fdd;
+ LPP_EXT_OMA_LPPe_OTDOA_UTRA_Neighbor_modeSpecificInfo_tdd_selected tdd;
+};
+
+LPP_EXT_OMA_LPPe_UTRA_ModeSpecificInfo selection choice :
+{
+ LPP_EXT_OMA_LPPe_UTRA_ModeSpecificInfo_fdd_selected fdd;
+ LPP_EXT_OMA_LPPe_UTRA_ModeSpecificInfo_tdd_selected tdd;
+ LPP_EXT_OMA_LPPe_UTRA_ModeSpecificInfo_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_TimeStamp selection choice :
+{
+ LPP_EXT_OMA_LPPe_TimeStamp_gnssTime_selected gnssTime;
+ LPP_EXT_OMA_LPPe_TimeStamp_networkTime_selected networkTime;
+ LPP_EXT_OMA_LPPe_TimeStamp_relativeTime_selected relativeTime;
+ LPP_EXT_OMA_LPPe_TimeStamp_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_AGNSS_IonosphericModelReq selection choice :
+{
+ LPP_EXT_OMA_LPPe_AGNSS_IonosphericModelReq_staticModels_selected staticModels;
+ LPP_EXT_OMA_LPPe_AGNSS_IonosphericModelReq_periodicModels_selected periodicModels;
+ LPP_EXT_OMA_LPPe_AGNSS_IonosphericModelReq_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_MapDataReferenceElement_mapDataUrl selection choice :
+{
+ LPP_EXT_OMA_LPPe_MapDataReferenceElement_mapDataUrl_mapDataUrl_selected mapDataUrl;
+ LPP_EXT_OMA_LPPe_MapDataReferenceElement_mapDataUrl_mapDataRef_selected mapDataRef;
+};
+
+LPP_EXT_OMA_LPPe_MapDataReferenceElement_mapProvider selection choice :
+{
+ LPP_EXT_OMA_LPPe_MapDataReferenceElement_mapProvider_sameAsRefPointProvider_selected sameAsRefPointProvider;
+ LPP_EXT_OMA_LPPe_MapDataReferenceElement_mapProvider_notSameAsRefPointProvider_selected notSameAsRefPointProvider;
+ LPP_EXT_OMA_LPPe_MapDataReferenceElement_mapProvider_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_MapDataReferenceElement_mapAssociation selection choice :
+{
+ LPP_EXT_OMA_LPPe_MapDataReferenceElement_mapAssociation_referencePointUniqueID_selected referencePointUniqueID;
+ LPP_EXT_OMA_LPPe_MapDataReferenceElement_mapAssociation_otherID_selected otherID;
+ LPP_EXT_OMA_LPPe_MapDataReferenceElement_mapAssociation_mapOffset_selected mapOffset;
+ LPP_EXT_OMA_LPPe_MapDataReferenceElement_mapAssociation_origin_selected origin;
+ LPP_EXT_OMA_LPPe_MapDataReferenceElement_mapAssociation_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_AGNSS_CCPassistCommonProvide selection choice :
+{
+ LPP_EXT_OMA_LPPe_AGNSS_CCPassistCommonProvide_ccpProvideCommonParameters_selected ccpProvideCommonParameters;
+ LPP_EXT_OMA_LPPe_AGNSS_CCPassistCommonProvide_ccpProvideControlParameters_selected ccpProvideControlParameters;
+ LPP_EXT_OMA_LPPe_AGNSS_CCPassistCommonProvide_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_AGNSS_HAgnssProvide selection choice :
+{
+ LPP_EXT_OMA_LPPe_AGNSS_HAgnssProvide_controlParameters_selected controlParameters;
+ LPP_EXT_OMA_LPPe_AGNSS_HAgnssProvide_measurements_selected measurements;
+ LPP_EXT_OMA_LPPe_AGNSS_HAgnssProvide_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_EOTD_SystemInfoAssistBTS selection choice :
+{
+ LPP_EXT_OMA_LPPe_EOTD_SystemInfoAssistBTS_notPresent_selected notPresent;
+ LPP_EXT_OMA_LPPe_EOTD_SystemInfoAssistBTS_present_selected present;
+};
+
+LPP_EXT_OMA_LPPe_OTDOA_UTRA_ReferenceCellInfo_modeSpecificInfo selection choice :
+{
+ LPP_EXT_OMA_LPPe_OTDOA_UTRA_ReferenceCellInfo_modeSpecificInfo_fdd_selected fdd;
+ LPP_EXT_OMA_LPPe_OTDOA_UTRA_ReferenceCellInfo_modeSpecificInfo_tdd_selected tdd;
+};
+
+LPP_EXT_OMA_LPPe_OTDOA_UTRA_NeighborCellInfo_modeSpecificInfo selection choice :
+{
+ LPP_EXT_OMA_LPPe_OTDOA_UTRA_NeighborCellInfo_modeSpecificInfo_fdd_selected fdd;
+ LPP_EXT_OMA_LPPe_OTDOA_UTRA_NeighborCellInfo_modeSpecificInfo_tdd_selected tdd;
+};
+
+LPP_EXT_OMA_LPPe_OTDOA_UTRA_Measurement_modeSpecificInfoMeas selection choice :
+{
+ LPP_EXT_OMA_LPPe_OTDOA_UTRA_Measurement_modeSpecificInfoMeas_fdd_selected fdd;
+ LPP_EXT_OMA_LPPe_OTDOA_UTRA_Measurement_modeSpecificInfoMeas_tdd_selected tdd;
+};
+
+LPP_EXT_OMA_LPPe_OTDOA_UTRA_TimeStampData_nonUniqueCellID selection choice :
+{
+ LPP_EXT_OMA_LPPe_OTDOA_UTRA_TimeStampData_nonUniqueCellID_primaryScramblingCode_selected primaryScramblingCode;
+ LPP_EXT_OMA_LPPe_OTDOA_UTRA_TimeStampData_nonUniqueCellID_cellParametersId_selected cellParametersId;
+ LPP_EXT_OMA_LPPe_OTDOA_UTRA_TimeStampData_nonUniqueCellID_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_SRN_RequestAssistanceData_srnGroup selection choice :
+{
+ LPP_EXT_OMA_LPPe_SRN_RequestAssistanceData_srnGroup_srnGroupRequest_selected srnGroupRequest;
+ LPP_EXT_OMA_LPPe_SRN_RequestAssistanceData_srnGroup_srnGroupUpdateRequest_selected srnGroupUpdateRequest;
+ LPP_EXT_OMA_LPPe_SRN_RequestAssistanceData_srnGroup_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_SRN_Error selection choice :
+{
+ LPP_EXT_OMA_LPPe_SRN_Error_srnLocationServerErrorCauses_selected srnLocationServerErrorCauses;
+ LPP_EXT_OMA_LPPe_SRN_Error_srnTargetDeviceErrorCauses_selected srnTargetDeviceErrorCauses;
+ LPP_EXT_OMA_LPPe_SRN_Error_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_AssistanceContainerProvide_dataResult selection choice :
+{
+ LPP_EXT_OMA_LPPe_AssistanceContainerProvide_dataResult_simulationResult_selected simulationResult;
+ LPP_EXT_OMA_LPPe_AssistanceContainerProvide_dataResult_data_selected data;
+ LPP_EXT_OMA_LPPe_AssistanceContainerProvide_dataResult_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_SRN_AntennaPatternElement_antennaData selection choice :
+{
+ LPP_EXT_OMA_LPPe_SRN_AntennaPatternElement_antennaData_antennaPattern_selected antennaPattern;
+ LPP_EXT_OMA_LPPe_SRN_AntennaPatternElement_antennaData_antennaContainer_selected antennaContainer;
+ LPP_EXT_OMA_LPPe_SRN_AntennaPatternElement_antennaData_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_ReferencePoint_referencePointGeographicLocation selection choice :
+{
+ LPP_EXT_OMA_LPPe_ReferencePoint_referencePointGeographicLocation_location3D_selected location3D;
+ LPP_EXT_OMA_LPPe_ReferencePoint_referencePointGeographicLocation_location3DwithUncertainty_selected location3DwithUncertainty;
+ LPP_EXT_OMA_LPPe_ReferencePoint_referencePointGeographicLocation_locationwithhighaccuracy_selected locationwithhighaccuracy;
+ LPP_EXT_OMA_LPPe_ReferencePoint_referencePointGeographicLocation_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_AGNSS_IonosphericModel_waIono selection choice :
+{
+ LPP_EXT_OMA_LPPe_AGNSS_IonosphericModel_waIono_controlParameters_selected controlParameters;
+ LPP_EXT_OMA_LPPe_AGNSS_IonosphericModel_waIono_commonProvide_selected commonProvide;
+ LPP_EXT_OMA_LPPe_AGNSS_IonosphericModel_waIono_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_AGNSS_IonosphericModel selection choice :
+{
+ LPP_EXT_OMA_LPPe_AGNSS_IonosphericModel_staticModels_selected staticModels;
+ LPP_EXT_OMA_LPPe_AGNSS_IonosphericModel_waIono_selected waIono;
+ LPP_EXT_OMA_LPPe_AGNSS_IonosphericModel_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_SRN_ProvideAssistanceData_srnGroup selection choice :
+{
+ LPP_EXT_OMA_LPPe_SRN_ProvideAssistanceData_srnGroup_srnGroupList_selected srnGroupList;
+ LPP_EXT_OMA_LPPe_SRN_ProvideAssistanceData_srnGroup_srnGroupUpdateResponse_selected srnGroupUpdateResponse;
+ LPP_EXT_OMA_LPPe_SRN_ProvideAssistanceData_srnGroup_UnKnowItem_selected UnKnowItem;
+};
+
+LPP_EXT_OMA_LPPe_MessageExtensionBody selection choice :
+{
+ LPP_EXT_OMA_LPPe_MessageExtensionBody_requestCapabilities_selected requestCapabilities;
+ LPP_EXT_OMA_LPPe_MessageExtensionBody_provideCapabilities_selected provideCapabilities;
+ LPP_EXT_OMA_LPPe_MessageExtensionBody_requestAssistanceData_selected requestAssistanceData;
+ LPP_EXT_OMA_LPPe_MessageExtensionBody_provideAssistanceData_selected provideAssistanceData;
+ LPP_EXT_OMA_LPPe_MessageExtensionBody_requestLocationInformation_selected requestLocationInformation;
+ LPP_EXT_OMA_LPPe_MessageExtensionBody_provideLocationInformation_selected provideLocationInformation;
+ LPP_EXT_OMA_LPPe_MessageExtensionBody_error_selected error;
+ LPP_EXT_OMA_LPPe_MessageExtensionBody_abort_selected abort;
+ LPP_EXT_OMA_LPPe_MessageExtensionBody_UnKnowItem_selected UnKnowItem;
+};
+
+#endif /* __LPP_EXT_SUPPORT__ */
+
+#ifdef __FIVEG_NAS__
+vgmm_nasmsg_struct msg_type u:
+{
+ 65 reg_req;
+ 66 reg_acc;
+ 68 reg_rej;
+ 69 mo_dereg_req;
+ 71 mt_dereg_req;
+ 76 service_req;
+ 77 service_rej;
+ 78 service_acc;
+ 84 config_update_cmd;
+ 86 auth_req;
+ 87 auth_rsp;
+ 89 auth_fail;
+ 90 auth_result;
+ 91 identity_req;
+ 92 identity_rsp;
+ 93 sec_mode_cmd;
+ 94 sec_mode_com;
+ 95 sec_mode_rej;
+ 100 status;
+ 101 notif;
+ 102 notif_rsp;
+ 103 ul_nas_transport;
+ 104 dl_nas_transport;
+};
+
+nas_sv_xmm_broadcast_regn_result_struct source_rat info:
+{
+ 03 emm_info;
+ 06 vgmm_info;
+};
+
+#endif /* __FIVEG_NAS__ */
+
+smic_debug_function_call_struct func func_args:
+{
+ SMIC_FUNC_smic_set_iwk_capability smic_set_iwk_capability;
+ SMIC_FUNC_smic_23g_process_pdp_released smic_23g_process_pdp_released;
+ SMIC_FUNC_smic_compose_epco_if_needed smic_compose_epco_if_needed;
+ SMIC_FUNC_smic_decode_epco smic_decode_epco;
+ SMIC_FUNC_smic_5g_get_4g5_pdus_context smic_5g_get_4g5_pdus_context;
+ SMIC_FUNC_smic_5g_set_associated_and_mapped_epsb_ctx smic_5g_set_associated_and_mapped_epsb_ctx;
+ SMIC_FUNC_smic_5g_do_context_transfer_5g4 smic_5g_do_context_transfer_5g4;
+ SMIC_FUNC_smic_5g_process_pdu_released smic_5g_process_pdu_released;
+ SMIC_FUNC_smic_5g_if_flow_mapped_success smic_5g_if_flow_mapped_success;
+ SMIC_FUNC_smic_5g_get_psi_mapped_ebi_bitmap smic_5g_get_psi_mapped_ebi_bitmap;
+ SMIC_FUNC_smic_4g_if_ebi_mapped_success smic_4g_if_ebi_mapped_success;
+ SMIC_FUNC_smic_get_ebi_mapped_psi_and_qfi smic_get_ebi_mapped_psi_and_qfi;
+ SMIC_FUNC_smic_4g_set_associated_ctx_and_pco smic_4g_set_associated_ctx_and_pco;
+ SMIC_FUNC_smic_4g_process_pdn_released smic_4g_process_pdn_released;
+ SMIC_FUNC_smic_4g_get_5g4_ebi_context smic_4g_get_5g4_ebi_context;
+ SMIC_FUNC_smic_4g_do_context_transfer_4g5 smic_4g_do_context_transfer_4g5;
+ SMIC_FUNC_smic_4g_get_psi_by_ebi_after_23G4 smic_4g_get_psi_by_ebi_after_23G4;
+ SMIC_FUNC_smic_4g_peer_msg_precheck smic_4g_peer_msg_precheck;
+ SMIC_FUNC_smic_is_notified_camped_on_23g_suitable_cell smic_is_notified_camped_on_23g_suitable_cell;
+ SMIC_FUNC_smic_5g_sync_epsb_status smic_5g_sync_epsb_status;
+ SMIC_FUNC_smic_tftlib_get_psi_by_ebi smic_tftlib_get_psi_by_ebi;
+};
+
+smu_dump_sml_context_ind_struct nv data :
+{
+ NVRAM_EF_SML_LID sml_context;
+ NVRAM_EF_SML_S_LID sml_s_context;
+ NVRAM_EF_MS_SECURITY_LID ms_sec_context;
+ NVRAM_EF_SIM_LOCK_LID tmo_sml_context;
+ NVRAM_EF_SML_GBLOB_LID gblob_s_context;
+ NVRAM_EF_SML_GBLOB_KEY_LID gblob_key_s_context;
+ NVRAM_EF_SUBSIDY_LOCK_LID sl_gblob_context;
+ NVRAM_EF_SUBSIDY_LOCK_ODM_DATA_LID sl_odm_data_context;
+ NVRAM_EF_SML_NONCE_LID uulk_nonce_context;
+ NVRAM_EF_SML_UNLOCK_CODE_LID uulk_unlock_code_context;
+ NVRAM_EF_SML_SIGNATURE_LID uulk_signature_context;
+ NVRAM_EF_L4_ATT_SIM_LOCK_LID att_sml_context;
+ NVRAM_EF_L4_SML_VZW_SIM_LOCK_LID vzw_sim_lock_context;
+ NVRAM_EF_L4_SML_VZW_RSU_DELAY_TIMER_LID vzw_rsu_delay_timer;
+ NVRAM_EF_L4_SML_OP129_LID op129_lock_data_context;
+ NVRAM_EF_L4_SML_TMO_MOVIAL_SIM_LOCK_LID tmo_movial_sim_lock_context;
+ NVRAM_EF_L4_SML_TMO_MOVIAL_CORR_ID_LID tmo_movial_corr_id_context;
+};
+
+l4csmu_set_custom_personalization_req_struct op data :
+{
+ SML_CUST_OP_UPDATE_MAX_RETRY_COUNT max_retry_count;
+ SML_CUST_OP_UPDATE_CAT_ALGO_AND_SECURE_KEY_DATA key_data;
+#ifdef __SML_PUK__
+ SML_CUST_OP_UPDATE_PUK_MAX_RETRY_COUNT max_retry_count;
+ SML_CUST_OP_UPDATE_PUK_KEY_DATA key_data;
+ SML_CUST_OP_UPDATE_PUK_KEY_STATE key_state;
+#endif
+};
+
+#ifdef __FIVEG_NAS__
+vgmm_mcddll_identity_rsp_struct type_of_id vgs_mobile_id:
+{
+ NO_IDENTITY no_id;
+ SUCI suci;
+ VG_GUTI vg_guti;
+ IMEI imei;
+ VG_STMSI vg_stmsi;
+ IMEI_SV imeisv;
+};
+
+vgmm_mcddll_mo_dereg_req_struct type_of_id vgs_mobile_id:
+{
+ NO_IDENTITY no_id;
+ SUCI suci;
+ VG_GUTI vg_guti;
+ IMEI imei;
+ VG_STMSI vg_stmsi;
+ IMEI_SV imeisv;
+};
+
+vgmm_mcddll_reg_req_struct type_of_id vgs_mobile_id:
+{
+ NO_IDENTITY no_id;
+ SUCI suci;
+ VG_GUTI vg_guti;
+ IMEI imei;
+ VG_STMSI vg_stmsi;
+ IMEI_SV imeisv;
+};
+#endif /* __FIVEG_NAS__ */
+
+#ifdef __IPC_ADAPTER__
+
+ ipca_gprs_command_info_struct command_type command:
+ {
+ IPCA_GPRS_ROUTINE_CMD_AT_CGDCONT_SET cgdcont_set;
+// IPCA_GPRS_ROUTINE_CMD_AT_CGDCONT_READ cgdcont_read;
+ IPCA_GPRS_ROUTINE_CMD_AT_CGPRCO_SET cgprco_set;
+ IPCA_GPRS_ROUTINE_CMD_AT_CGPRCO_READ cgprco_read;
+ IPCA_GPRS_ROUTINE_CMD_AT_CGACT_SET cgact_set;
+ IPCA_GPRS_ROUTINE_CMD_AT_CGACT_READ cgact_read;
+ IPCA_GPRS_ROUTINE_CMD_AT_EGDCONT_SET egdcont_set;
+ IPCA_GPRS_ROUTINE_CMD_AT_CGCONTRDP_SET cgcontrdp_set;
+ IPCA_GPRS_ROUTINE_CMD_AT_CGDATA_SET cgdata_set;
+ IPCA_GPRS_ROUTINE_CMD_AT_CGQREQ_SET cgqreq_set;
+ IPCA_GPRS_ROUTINE_CMD_AT_CGQMIN_SET cgqmin_set;
+ IPCA_GPRS_ROUTINE_CMD_AT_CGEQREQ_SET cgeqreq_set;
+ IPCA_GPRS_ROUTINE_CMD_AT_CGEQMIN_SET cgeqmin_set;
+ IPCA_GPRS_ROUTINE_CMD_AT_CGEQNEG_SET cgeqneg_set;
+ IPCA_GPRS_ROUTINE_CMD_AT_CGEQOS_SET cgeqos_set;
+ IPCA_GPRS_ROUTINE_CMD_AT_CGEQOSRDP_SET cgeqosrdp_set;
+ IPCA_GPRS_ROUTINE_CMD_AT_CGPADDR_SET cgpaddr_set;
+ IPCA_GPRS_ROUTINE_CMD_AT_EFD_SET efd_set;
+ IPCA_GPRS_ROUTINE_CMD_AT_ESCRI_SET escri_set;
+// IPCA_GPRS_ROUTINE_CMD_AT_EGDFBCONT_SET egdfbcont_set;
+ IPCA_GPRS_ROUTINE_CMD_AT_ESCONTIND_SET escontind_set;
+ IPCA_GPRS_ROUTINE_CMD_AT_EGLD_SET egld_set;
+ IPCA_GPRS_ROUTINE_CMD_AT_EGTYPE_SET egtype_set;
+ IPCA_GPRS_ROUTINE_CMD_AT_CGATT_SET cgatt_set;
+
+ IPCA_GPRS_ROUTINE_CMD_AT_EGREA_SET egrea_set;
+
+ IPCA_GPRS_ROUTINE_CMD_AT_EAPNLOCK_SET eapnlock_set;
+ IPCA_GPRS_ROUTINE_CMD_AT_EAPNSET_SET eapnset_set;
+ IPCA_GPRS_ROUTINE_CMD_AT_EPDN_SET epdn_set;
+ IPCA_GPRS_ROUTINE_CMD_AT_EIAAPN_SET eiaapn_set;
+ IPCA_GPRS_ROUTINE_CMD_AT_EAPNACT_SET eapnact_set;
+
+ IPCA_GPRS_ROUTINE_CMD_AT_LGDCONT_SET lgdcont_set;
+
+ IPCA_GPRS_ROUTINE_CMD_AT_DSDORMANT_SET dsdormant_set;
+
+ IPCA_GPRS_ROUTINE_CMD_AT_ELCE_SET elce_set;
+ IPCA_GPRS_ROUTINE_CMD_AT_ELCE_READ elce_read;
+
+ IPCA_GPRS_ROUTINE_CMD_AT_EDALLOW_SET edallow_set;
+
+ IPCA_GPRS_ROUTINE_CMD_AT_CGTFT_SET cgtft_set;
+ IPCA_GPRS_ROUTINE_CMD_AT_EDRETRY_SET edretry_set;
+ IPCA_GPRS_ROUTINE_CMD_AT_ECNCFG_SET ecncfg_set;
+ IPCA_GPRS_ROUTINE_CMD_AT_BGPCORDP_SET bgpcordp_set;
+};
+
+at_cgev_ind_struct event info:
+{
+ CGEV_EVENT_NW_PDN_ACT nw_pdn_act;
+ CGEV_EVENT_ME_PDN_ACT me_pdn_act;
+ CGEV_EVENT_NW_ACT nw_act;
+ CGEV_EVENT_ME_ACT me_act;
+ CGEV_EVENT_NW_PDN_DEACT nw_pdn_deact;
+ CGEV_EVENT_ME_PDN_DEACT me_pdn_deact;
+ CGEV_EVENT_NW_DEACT nw_deact;
+ CGEV_EVENT_ME_DEACT me_deact;
+ CGEV_EVENT_NW_MODIFY nw_modify;
+ CGEV_EVENT_ME_MODIFY me_modify;
+ CGEV_EVENT_REJECT reject;
+ CGEV_EVENT_NW_REACT nw_react;
+};
+
+ipca_gprs_ut_parameter_struct type params :
+ {
+ IPCA_GPRS_UT_PARA_STRING string;
+ IPCA_GPRS_UT_PARA_INTEGER integer;
+};
+
+ipca_gprs_dump_to_ap_info_ind_struct info_type info :
+ {
+ IPCA_GPRS_DUMP_ACT_OR_DEACT_GET_RESPONSE act_or_deact_response;
+ IPCA_GPRS_DUMP_SHOW_PDP_ADDRESS_RESPONSE show_pdp_address_response;
+ IPCA_GPRS_DUMP_DEFINE_PDP_CONTEXT_RESPONSE define_pdp_context_response;
+ IPCA_GPRS_DUMP_MULTIPLE_PDP_IP_CONFIGURATION_NOTIFICATION
+ip_net_info_notify;
+
+ IPCA_GPRS_DUMP_CALL_STATUS_NOTIFICATION call_status_notify;
+ IPCA_GPRS_DUMP_CALL_STATUS_RESPONSE call_status_response;
+ IPCA_GPRS_DUMP_HSDPA_STATUS_NOTIFICATION hsdpa_state_notification;
+ IPCA_GPRS_DUMP_PS_ATTACH_OR_DETACH_NOTIFICATION
+ps_attach_or_detach_notification;
+
+ IPCA_GPRS_DUMP_DEDICATED_BEARER_INFO_NOTIFICATION
+dedicated_bearer_info_notification;
+
+ IPCA_GPRS_DUMP_LTE_CA_STATUS_NOTIFICATION lte_ca_status_notification;
+ IPCA_GPRS_DUMP_ELCE_NOTIFICATION lce_info_notification;
+ IPCA_GPRS_DUMP_BACK_OFF_TIMER_T3396_NOTIFICATION
+back_off_t3396_notification;
+
+};
+
+#endif
+
+#ifdef __DMF_TC03__
+atp_mt_dmf_cmd_cnf_struct cnf_type p:
+{
+ DMF_APP1_STATISTICS_MODEM_STATUS_BASEBAND_CNF app1_statistics_modem_status_baseband_cnf;
+ DMF_APP1_STATISTICS_MODEM_STATUS_RLC_CNF app1_statistics_modem_status_rlc_cnf;
+ DMF_APP1_STATISTICS_MODEM_STATUS_PDCP_CNF app1_statistics_modem_status_pdcp_cnf;
+ DMF_APP1_STATISTICS_MODEM_STATUS_RRC_CNF app1_statistics_modem_status_rrc_cnf;
+};
+#endif
+#ifdef __NR_RAT__
+nrrc_ue_cap_band_params_struct rat params:
+{
+ NL1_RAT_LTE eutra;
+ NL1_RAT_NR nr;
+};
+#endif
+
+