| /***************************************************************************** |
| * Copyright Statement: |
| * -------------------- |
| * This software is protected by Copyright and the information contained |
| * herein is confidential. The software may not be copied and the information |
| * contained herein may not be used or disclosed except with the written |
| * permission of MediaTek Inc. (C) 2006 |
| * |
| * BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES |
| * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE") |
| * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON |
| * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES, |
| * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF |
| * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT. |
| * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE |
| * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR |
| * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH |
| * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO |
| * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S |
| * SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM. |
| * |
| * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE |
| * LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, |
| * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, |
| * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO |
| * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE. |
| * |
| * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE |
| * WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF |
| * LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND |
| * RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER |
| * THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC). |
| * |
| *****************************************************************************/ |
| |
| /***************************************************************************** |
| * |
| * Filename: |
| * --------- |
| * custom_scatstruct.h |
| * |
| * Project: |
| * -------- |
| * Maui_Software |
| * |
| * Description: |
| * ------------ |
| * This file declares the scatter file dependent APIs |
| * |
| * Author: |
| * ------- |
| * Claudia Lo (mtk01876) [AUTOGEN_GenVersion] |
| * |
| *============================================================================ |
| * HISTORY |
| * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!! |
| *------------------------------------------------------------------------------ |
| * $Revision$ |
| * $Modtime$ |
| * $Log$ |
| * |
| * 09 03 2020 yao.liu |
| * [MOLY00566717] [Gen97] Add a function to query if the region is on EMI. |
| * [NR15.R3.MP] Add an API to query if the region is on EMI. |
| * |
| * 12 03 2019 yao.liu |
| * [MOLY00463184] [System Service][MOLY Kernel Internal Request] Enhance exception flow security |
| * [VMOLY] Add custom_query_MCURO_HWRW_region API for exception. |
| * |
| * 09 03 2019 yao.liu |
| * [MOLY00434510] Memory Dump 2.0 |
| * [VMOLY] Memory dump 2.0 - SYS_MEM part. |
| * |
| * 04 29 2019 yao.liu |
| * [MOLY00383168] [System Service][MOLY Kernel Internal Request] Merge minidump code from UMOLYE to VMOLY |
| * [VMOLY] Porting mini dump. |
| * |
| * 10 22 2018 tero.jarkko |
| * [MOLY00356148] [Gen97][SystemService][AutoGen]Provided SIB area query API |
| * |
| * . |
| * |
| * 10 18 2018 tero.jarkko |
| * [MOLY00359671] [Gen97][SystemService][AutoGen]SS_EXT_CSIF and NL1_EXT_CSIF API implementation |
| * |
| * . |
| * |
| * 09 28 2018 tero.jarkko |
| * [MOLY00356148] [Gen97][SystemService][AutoGen]Provided SIB area query API |
| * |
| * . |
| * |
| * 05 04 2017 carl.kao |
| * [MOLY00246779] [BIANCO] Enable ASM addon,SWTR and stream mode |
| * Remove unused API : custom_get_MaxAvailableMemorySegment |
| * |
| * 04 07 2017 carl.kao |
| * [MOLY00240094] [Gen93] [SystemService] [Auto-Gen] Refine setting of EMI RMPU for Gen93 |
| * . |
| * |
| * 02 24 2016 tero.jarkko |
| * [MOLY00164073] [LR12][SystemService][Auto-Gen] [Internal Refinement][MT6292] [sysGen2] Generate custom_scatstruct.c using sysGen2 |
| * |
| * Added L2SRAM_L2NC and L2SRAM_L2C functions |
| * |
| * 02 18 2016 tero.jarkko |
| * [MOLY00165076] [LR12][SystemService][Auto-Gen] [Internal Refinement][MT6292] [sysGen2] Support custom_query_dynamic_code_region |
| * |
| * . |
| * |
| * 02 16 2016 tero.jarkko |
| * [MOLY00165076] [LR12][SystemService][Auto-Gen] [Internal Refinement][MT6292] [sysGen2] Support custom_query_dynamic_code_region |
| * |
| * . |
| * |
| * 02 04 2016 tero.jarkko |
| * [MOLY00164073] [LR12][SystemService][Auto-Gen] [Internal Refinement][MT6292] [sysGen2] Generate custom_scatstruct.c using sysGen2 |
| * |
| * custom_ram_mk_info |
| * |
| * 02 03 2016 tero.jarkko |
| * [MOLY00164073] [LR12][SystemService][Auto-Gen] [Internal Refinement][MT6292] [sysGen2] Generate custom_scatstruct.c using sysGen2 |
| * |
| * L2SRAM_L2NC base and length functions added |
| * |
| * 02 02 2016 tero.jarkko |
| * [MOLY00164073] [LR12][SystemService][Auto-Gen] [Internal Refinement][MT6292] [sysGen2] Generate custom_scatstruct.c using sysGen2 |
| * |
| * . |
| * |
| * 01 18 2016 carl.kao |
| * [MOLY00159955] [LR12][SystemService][Auto-Gen] remove core 3 SPRAM and make SPRAM APIs more robust |
| * . |
| * |
| * 01 12 2016 qmei.yang |
| * [MOLY00151351] [SystemService][DebuggingSuite][Internal Refinement][92] Support full exception flow framework |
| * |
| * . |
| * |
| * 01 11 2016 qmei.yang |
| * [MOLY00151351] [SystemService][DebuggingSuite][Internal Refinement][92] Support full exception flow framework |
| * . |
| * |
| * 11 12 2015 carl.kao |
| * [MOLY00148842] [LR12][SystemService][Auto-Gen] 92 lds, for Full region ready, Code in Right Location |
| * Support VoLTE core section |
| * |
| * 11 11 2015 carl.kao |
| * [MOLY00148842] [LR12][SystemService][Auto-Gen] 92 lds, for Full region ready, Code in Right Location |
| * New image layout for "Full region ready, Code in Right Location" |
| * |
| * 07 03 2015 carl.kao |
| * [MOLY00125736] [MT6755][BRINGUP_FIRSTCALL] [SystemService][Auto-Gen] add custom_get_L1CORE_INTSRAM_Base and custom_get_L1CORE_INTSRAM_End |
| * get l1core tcm base and length |
| * |
| * 06 15 2015 carl.kao |
| * [MOLY00121235] [TK6291] [SystemService][Auto-Gen][Request For Design Change] Query TCM base and end address |
| * . |
| * |
| * 04 16 2015 carl.kao |
| * [MOLY00106652] [TK6291] [SystemService][Auto-Gen] add a dynamic switchable default cached MCU-RW, HW-RW section |
| * add 4 sections for EMI RMPU |
| * 1) (MCU RO, MDHW RW) DNC |
| * 2) (MCU RO, MDHW RW) NC |
| * 3) (MCU RW, MDHW RW) DNC |
| * 4) (MCU RW, MDHW RW) NC |
| * |
| * 02 24 2015 qmei.yang |
| * [MOLY00096717] [SystemService][DebuggingSuite][Internal Refinement] Support to dump l1core l2sram |
| * . |
| * |
| * 12 23 2014 carl.kao |
| * [MOLY00088578] [TK6291] [SystemService] [Auto-Gen] Support L2SRAM section (in L1CORE) |
| * aa. |
| * |
| * 12 22 2014 carl.kao |
| * [MOLY00087532] [Denali-1] [SystemService][Auto-Gen] Refactor AutoGen Code and Remove Legacy Code |
| * . |
| * |
| * 12 22 2014 carl.kao |
| * [MOLY00087532] [Denali-1] [SystemService][Auto-Gen] Refactor AutoGen Code and Remove Legacy Code |
| * . |
| * 11 06 2014 carl.kao |
| * [MOLY00083492] [TK6291] [SystemService][Auto-Gen][Request For Design Change] Add custom_get_MD_RAMEnd() for MPU |
| * Add custom_get_MD_RAMEnd() for PCORE MPU |
| * |
| * 11 06 2014 carl.kao |
| * [MOLY00083492] [TK6291] [SystemService][Auto-Gen][Request For Design Change] Add custom_get_MD_RAMEnd() for MPU |
| * . |
| * |
| * 09 11 2014 qmei.yang |
| * [MOLY00078623] [SystemService][DebuggingSuite][Internal Refinement][MT6291] Support memory dump |
| * . |
| * |
| * 08 27 2014 carl.kao |
| * [MOLY00077388] [MT6291] [SystemService][Auto-Gen][Request For Design Change] Support multi-core exception |
| * fix build fail |
| * |
| * 07 31 2014 carl.kao |
| * [MOLY00074124] [SystemService][DebuggingSuite][MT6291] Support multi-core exception |
| * dump L1CORE region by PCORE |
| * |
| * 04 07 2014 carl.kao |
| * [MOLY00061797] [SYSTEM SERVICE] porting features from U3G_TK6280_DEV and MOLY.U3G.90IT.DEV branches |
| * fix build error in config lib |
| * |
| * 04 07 2014 carl.kao |
| * [MOLY00061797] [SYSTEM SERVICE] porting features from U3G_TK6280_DEV and MOLY.U3G.90IT.DEV branches |
| * 9) Rename "l1dsp" to "l1core", "L1DSP" to "L1CORE" |
| * |
| * 04 02 2014 carl.kao |
| * [MOLY00061134] [SYSTEM SERVICE][AutoGen] AutoGen for MT6291 |
| * 1) pcore sysGen2. |
| * 2) Remove useless secure region query API |
| * |
| * 02 25 2014 qmei.yang |
| * [MOLY00057421] [SystemService][Auto-Gen][Internal Refinement] Remove useless secure region query api |
| * . |
| * |
| * 06 25 2013 qmei.yang |
| * [MOLY00025806] [SystemService][Auto-Gen][Request For Design Change] Support COPRO |
| * support COPRO_arm7's L1Cache |
| * |
| * 04 26 2013 qmei.yang |
| * [MOLY00020542] [SystemService][MOLY] To remove useless input sections by the request |
| * support SWLA space as well |
| * |
| * 10 31 2012 qmei.yang |
| * [MOLY00005605] [SystemService][Auto-Gen][Request For Design Change][sysgen2] Create new API: custom_get_DSPTXRX_MaxSize() |
| * . |
| * |
| * 08 27 2012 qmei.yang |
| * [MOLY00001774] [SystemService][Region_Init][Internal Refinement] Support MT6577 region init and remove useless regions and compile option |
| * . |
| * |
| * 05 10 2012 qmei.yang |
| * [MAUI_03182425] [Reason]sync codes between modem_dev and 11B |
| * . |
| * |
| * 03 08 2012 qmei.yang |
| * [MAUI_03145378] [SystemService][Auto-Gen][Sys Gen][scatGen][Internal Refinement] Phase in AutoGen new flow to support GCC |
| * . |
| * |
| * 02 15 2012 qmei.yang |
| * [MAUI_03130553] [SystemService][Auto-Gen][Sys Gen][scatGen][Internal Refinement] Support cmmgen sync with sysgen2 |
| * Modify custom_query_dump_region() API |
| * |
| * 01 30 2012 qmei.yang |
| * [MAUI_03120516] [SystemService][Auto-Gen][Sys Gen][scatGen][Internal Refinement] Refactory sysgen2.pl |
| * |
| *------------------------------------------------------------------------------ |
| * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!! |
| *============================================================================ |
| ****************************************************************************/ |
| |
| #ifndef _CUSTOM_SCATSTRUCT_H |
| #define _CUSTOM_SCATSTRUCT_H |
| |
| #include "kal_general_types.h" |
| #include "init.h" |
| |
| typedef enum |
| { |
| DUMP_OP_NONE = 0, |
| DUMP_OP_CORE0_CACHE = 1, |
| DUMP_OP_CORE1_CACHE = 2, |
| DUMP_OP_CORE2_CACHE = 3, |
| DUMP_OP_CORE3_CACHE = 4, |
| } DUMP_OP_T; |
| |
| typedef enum |
| { |
| DC_ISPRAM0 = 0, |
| DC_ISPRAM1, |
| DC_ISPRAM2, |
| DC_L2SRAM, |
| DC_MEM_MAX, |
| } DYNAMIC_CODE_MEM_T; |
| |
| |
| typedef enum |
| { |
| EMI_MPU_INVALIDE = 0, |
| EMI_MPU_MDMCU_NO_ACCESS = 10, |
| EMI_MPU_MDMCU_RO, |
| EMI_MPU_MDMCU_RW, |
| EMI_MPU_MDMCU_MAX, |
| EMI_MPU_MDHW_NO_ACCESS = 20, |
| EMI_MPU_MDHW_RO, |
| EMI_MPU_MDHW_RW, |
| EMI_MPU_MDHW_MAX, |
| } EMI_MPU_REGION_ATTRIBUTE; |
| |
| |
| typedef struct DYNAMIC_CODE_REGION_INFO_STRUCT |
| { |
| kal_uint32 addr; |
| kal_uint32 load_addr; |
| kal_uint32 len; |
| } DYNAMIC_CODE_REGION_INFO_T; |
| |
| |
| typedef struct EMI_MPU_REGION_INFO_STRUCT |
| { |
| kal_uint32 addr; |
| kal_uint32 len; |
| EMI_MPU_REGION_ATTRIBUTE mdmcu_attr; |
| EMI_MPU_REGION_ATTRIBUTE mchw_attr; |
| } EMI_MPU_REGION_INFO_T; |
| |
| |
| #if defined (__MTK_TARGET__) |
| #define __TCMROCODE __attribute__ ((section ("INTSRAM_ROCODE"))) |
| #define __TCMRODATA __attribute__ ((section ("INTSRAM_RODATA"))) |
| #define __TCMRW __attribute__ ((section ("INTSRAM_RW"))) |
| #define __TCMZI __attribute__ ((zero_init, section ("INTSRAM_ZI"))) |
| #define __PT_Aligned(x) __attribute__ ((section("PAGETABLE"), aligned(x))) |
| #define __NONCACHEDZI __attribute__ ((zero_init, section ("NONCACHEDZI"))) |
| #define __NONCACHEDZI_MCURW_HWRW __attribute__ ((section ("MCURW_HWRW_NC_ZI"))) |
| #else |
| #define __TCMROCODE |
| #define __TCMRODATA |
| #define __TCMRW |
| #define __TCMZI |
| #define __PT_Aligned(x) |
| #define __NONCACHEDZI |
| #define __NONCACHEDZI |
| #endif |
| |
| #ifdef __MTK_TARGET__ |
| #define DUMP_REGION_COUNT [AUTOGEN_SCAT_H_Gen_DUMP_REGION_COUNT] |
| extern kal_uint32 custom_query_dump_region(EXTSRAM_REGION_INFO_T* region); |
| extern kal_uint32 custom_query_dump_region_without_UC_ROM(EXTSRAM_REGION_INFO_T* region); |
| extern kal_uint32 custom_query_dump_region_ROM(EXTSRAM_REGION_INFO_T* region); |
| extern kal_uint32 custom_query_dump_region_PA(EXTSRAM_REGION_INFO_T* region); |
| extern kal_uint32 custom_query_dump_region_VA(EXTSRAM_REGION_INFO_T* region); |
| extern kal_uint8 custom_get_dump_info(kal_uint32 *address); |
| |
| #if defined(__ARM9_MMU__) || defined(__ARM11_MMU__) |
| #if defined(__ARM9_MMU__) |
| extern kal_int32 custom_query_fpt_pool(kal_uint32 **pool, kal_uint32 *pool_size); |
| #endif /* __ARM9_MMU__ */ |
| extern kal_int32 custom_query_cpt_pool(kal_uint32 **pool, kal_uint32 *pool_size); |
| #endif /* __ARM9_MMU__ || __ARM11_MMU__ */ |
| |
| #if defined(__DYNAMIC_SWITCH_CACHEABILITY__) |
| extern kal_int32 custom_query_dynamic_cached_extsram_default_nc_region(EXTSRAM_REGION_INFO_T **region); |
| extern kal_int32 custom_query_dynamic_cached_extsram_default_c_region(EXTSRAM_REGION_INFO_T **region); |
| extern kal_int32 custom_query_cached_extsram_region(EXTSRAM_REGION_INFO_T **region); |
| extern kal_int32 custom_query_cached_extsram_code_region(EXTSRAM_REGION_INFO_T **region); |
| extern kal_int32 custom_query_noncached_extsram_region(EXTSRAM_REGION_INFO_T **region); |
| extern kal_int32 custom_query_noncached_extsram_ro_region(EXTSRAM_REGION_INFO_T **region); |
| #endif /* __DYNAMIC_SWITCH_CACHEABILITY__ */ |
| |
| |
| #if defined(__DSP_FCORE4__) |
| extern kal_int32 custom_query_mcu_cacheable_dsp_cacheable_region(EXTSRAM_REGION_INFO_T **region); |
| extern kal_int32 custom_query_mcu_cacheable_dsp_noncacheable_region(EXTSRAM_REGION_INFO_T **region); |
| extern kal_int32 custom_query_mcu_noncacheable_dsp_cacheable_region(EXTSRAM_REGION_INFO_T **region); |
| extern kal_int32 custom_query_mcu_noncacheable_dsp_noncacheable_region(EXTSRAM_REGION_INFO_T **region); |
| #endif /* __DSP_FCORE4__ */ |
| |
| extern kal_uint32 custom_get_1st_ROM_ROMBase(void); |
| extern kal_uint32 custom_get_1st_ROM_ROMLength(void); |
| extern kal_uint32 custom_get_1st_ROM_RAMBase(void); |
| extern kal_uint32 custom_get_1st_ROM_RAMLength(void); |
| extern kal_uint32 custom_get_1st_ROM_RAMEnd(void); |
| extern kal_uint32 custom_get_1st_ROM_LoadEnd(void); |
| |
| |
| extern kal_status custom_get_ISPRAM_Load_Base(kal_uint8 core_id, kal_uint32 *ret_addr); |
| extern kal_status custom_get_ISPRAM_CODE_Base(kal_uint8 core_id, kal_uint32 *ret_addr); |
| extern kal_status custom_get_ISPRAM_CODE_End(kal_uint8 core_id, kal_uint32 *ret_addr); |
| extern kal_status custom_get_ISPRAM_Base(kal_uint8 core_id, kal_uint32 *ret_addr); |
| extern kal_status custom_get_ISPRAM_End(kal_uint8 core_id, kal_uint32 *ret_addr); |
| |
| extern kal_status custom_get_DSPRAM_Load_Base(kal_uint8 core_id, kal_uint32 *ret_addr); |
| extern kal_status custom_get_DSPRAM_DATA_Base(kal_uint8 core_id, kal_uint32 *ret_addr); |
| extern kal_status custom_get_DSPRAM_DATA_End(kal_uint8 core_id, kal_uint32 *ret_addr); |
| extern kal_status custom_get_DSPRAM_DATA_ZI_Base(kal_uint8 core_id, kal_uint32 *ret_addr); |
| extern kal_status custom_get_DSPRAM_DATA_ZI_End(kal_uint8 core_id, kal_uint32 *ret_addr); |
| extern kal_status custom_get_DSPRAM_Base(kal_uint8 core_id, kal_uint32 *ret_addr); |
| extern kal_status custom_get_DSPRAM_End(kal_uint8 core_id, kal_uint32 *ret_addr); |
| |
| extern kal_bool custom_query_code_region(kal_uint32 code_addr, kal_uint32 core_id); |
| extern kal_bool custom_query_MCURO_HWRW_region(kal_uint32 symbol_addr); |
| extern kal_int32 custom_query_dynamic_code_region(DYNAMIC_CODE_MEM_T core_id,DYNAMIC_CODE_REGION_INFO_T **region); |
| |
| extern kal_int32 custom_get_DSPTXRX_Base(void); |
| extern kal_int32 custom_get_DSPTXRX_MaxSize(void); |
| extern kal_uint32 custom_get_NVRAM_LTABLE_Base(void); |
| extern kal_uint32 custom_get_NVRAM_LTABLE_Length(void); |
| |
| extern kal_uint32 custom_get_VOLTE_CORE_ZI_base(void); |
| extern kal_uint32 custom_get_VOLTE_CORE_ZI_End(void); |
| |
| extern kal_uint32 custom_get_L2SRAM_L2NC_CODE_base(void); |
| extern kal_uint32 custom_get_L2SRAM_L2NC_CODE_load_base(void); |
| extern kal_uint32 custom_get_L2SRAM_L2NC_CODE_Length(void); |
| extern kal_uint32 custom_get_L2SRAM_L2NC_DATA_base(void); |
| extern kal_uint32 custom_get_L2SRAM_L2NC_DATA_load_base(void); |
| extern kal_uint32 custom_get_L2SRAM_L2NC_DATA_Length(void); |
| extern kal_uint32 custom_get_L2SRAM_L2NC_DATA_ZI_base(void); |
| extern kal_uint32 custom_get_L2SRAM_L2NC_DATA_ZI_Length(void); |
| extern kal_uint32 custom_get_L2SRAM_L2C_CODE_base(void); |
| extern kal_uint32 custom_get_L2SRAM_L2C_CODE_load_base(void); |
| extern kal_uint32 custom_get_L2SRAM_L2C_CODE_Length(void); |
| extern kal_uint32 custom_get_L2SRAM_L2C_DATA_base(void); |
| extern kal_uint32 custom_get_L2SRAM_L2C_DATA_load_base(void); |
| extern kal_uint32 custom_get_L2SRAM_L2C_DATA_Length(void); |
| extern kal_uint32 custom_get_L2SRAM_L2C_DATA_ZI_base(void); |
| extern kal_uint32 custom_get_L2SRAM_L2C_DATA_ZI_Length(void); |
| extern kal_uint32 custom_query_EMI_RMPU_region_info(EMI_MPU_REGION_INFO_T **region); |
| extern kal_int32 custom_get_SIB_AREA_region(EXTSRAM_REGION_INFO_T **region); |
| extern kal_uint32 custom_get_SS_EXT_CSIF_Base(void); |
| extern kal_uint32 custom_get_SS_EXT_CSIF_End(void); |
| extern kal_uint32 custom_get_NL1_EXT_CSIF_Base(void); |
| extern kal_uint32 custom_get_NL1_EXT_CSIF_End(void); |
| extern kal_bool custom_query_EMI_region(kal_uint32 region_addr); |
| extern kal_uint32 custom_get_MD_RAMEnd(void); |
| |
| |
| #if defined(__ARM9_MMU__) || defined(__ARM11_MMU__) || defined(__MTK_MMU__) || defined(__CR4__) || defined(__MTK_MMU_V2__) || defined(__MIPS_IA__) |
| extern kal_int32 custom_mk_ram_info(void); |
| #endif /* __ARM9_MMU__ || __ARM11_MMU__ || __MTK_MMU__ || __CR4__ || __MTK_MMU_V2__ || __MIPS_IA__ */ |
| |
| |
| #endif /* __MTK_TARGET__ */ |
| |
| #endif /* _CUSTOM_SCATSTRUCT_H */ |