blob: 2ea55f4bbaf5ce139cdc926d43a455803d0e94cd [file] [log] [blame]
/******************************************************************************
* Modification Notice:
* --------------------------
* This software is modified by MediaTek Inc. and the information contained
* herein is confidential. The software may not be copied and the information
* contained herein may not be used or disclosed except with the written
* permission of MediaTek Inc. (C) 2005
*
* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
*
* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
*
* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
*
*******************************************************************************/
/*==============================================================================
* HISTORY
* Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
*------------------------------------------------------------------------------
*------------------------------------------------------------------------------
* Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
*============================================================================*/
/* Doxygene header ********************************************************//**
*
* @file cl1tstdlysrch.h
* @{
*//***************************************************************************/
#ifndef __CL1TSTDLYSRCH_H__
#define __CL1TSTDLYSRCH_H__
/*******************************************************************************
* Includes
*******************************************************************************/
/*******************************************************************************
* Defines
*******************************************************************************/
/*******************************************************************************
* Enums
*******************************************************************************/
/*******************************************************************************
* Structures
*******************************************************************************/
/*******************************************************************************
* Interface Prototypes
*******************************************************************************/
extern kal_uint16 Cl1TstDpdPathDlyMain(void);
#define CL1TST_DLY_SRCH_HSLOT_CNT 32
#define CL1TST_REF_DFE_DLY_TR_MIN 0 /* HW limitation. */
#define CL1TST_REF_DFE_DLY_TR_MAX 94 /* HW limitation. */
#define CL1TST_CORR_LEFT_SHIFT_BIT_FOR_SIGN_BIT 4
#define CL1TST_CORR_ABS_RIGHT_SHIFT_BIT 8
#define CL1TST_NUM_TR_VALUE_DECIMAL_POINT 8
#define CL1TST_PROTECTION_SF_CNT_NUM 1200
#define CL1TST_DPD_DLY_SRCH_RANGE 5
#define CL1TST_GD_MEAS_SAMPLE 1700
#define CL1TST_GD_WAIT_SAMPLE 64
#define CL1TST_GD_SHIFT 3
/** define Delay search status */
typedef enum
{
CL1TST_DLY_SRCH_FSM_BB_ENABLE,
CL1TST_DLY_SRCH_FSM_TXON_TPC,
CL1TST_DLY_SRCH_FSM_WAIT_INIT,
CL1TST_DLY_SRCH_FSM_FIRST_TRIG,
CL1TST_DLY_SRCH_FSM_SWEEP_DLY,
CL1TST_DLY_SRCH_FSM_TXOFF,
CL1TST_DLY_SRCH_FSM_BB_DISABLE,
CL1TST_DLY_SRCH_FSM_DO_TXH_INIT,
CL1TST_DLY_SRCH_FSM_INVALID,
CL1TST_DLY_SRCH_FSM_NUM
} Cl1TstDlyStateE;
typedef struct
{
kal_uint8 BandClass;
kal_uint16 ChanNum;
} Cl1TstDlyFreqInfoT;
typedef struct
{
/* DPD delay search start request */
CRfTestCmd_StartDpdPathDelaySearch_ReqInfo StartInfo;
kal_bool DlySrchFlag;
kal_bool TimeOutFlag;
kal_bool SrchFailFlag;
Cl1TstDlyStateE DlyState;
Cl1TstDlyStatusE DlyStatus;
kal_int16 BbEnCnt;
kal_int16 TxOnCnt;
kal_int16 TxOffCnt;
kal_int16 TxSthCnt;
Cl1TstDlyFreqInfoT FreqInfo;
kal_int16 TrValue;
kal_int16 TrIniValue;
kal_int16 TrEndValue;
kal_int16 TrOptValue;
kal_uint32 AccumTr;
kal_uint32 CorrOpt;
kal_uint32 CorrMin;
kal_uint16 HSlotCnt;
} Cl1DlyDataT;
#endif /* #ifndef __LDPDCALDLYMAIN_H__ */