| /***************************************************************************** |
| * Copyright Statement: |
| * -------------------- |
| * This software is protected by Copyright and the information contained |
| * herein is confidential. The software may not be copied and the information |
| * contained herein may not be used or disclosed except with the written |
| * permission of MediaTek Inc. (C) 2005 |
| * |
| * BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES |
| * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE") |
| * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON |
| * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES, |
| * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF |
| * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT. |
| * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE |
| * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR |
| * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH |
| * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO |
| * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S |
| * SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM. |
| * |
| * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE |
| * LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, |
| * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, |
| * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO |
| * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE. |
| * |
| * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE |
| * WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF |
| * LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND |
| * RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER |
| * THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC). |
| * |
| *****************************************************************************/ |
| |
| /******************************************************************************* |
| * Filename: |
| * --------- |
| * nvram_enums.h |
| * |
| * Project: |
| * -------- |
| * MT6208 |
| * |
| * Description: |
| * ------------ |
| * This file is intends for NVRAM. |
| * |
| * Author: |
| * ------- |
| * ------- |
| * |
| *============================================================================== |
| * HISTORY |
| * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!! |
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| *------------------------------------------------------------------------------ |
| * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!! |
| *============================================================================== |
| *******************************************************************************/ |
| |
| #ifndef NVRAM_ENUMS_H |
| #define NVRAM_ENUMS_H |
| |
| |
| |
| #include "kal_general_types.h" |
| #include "kal_public_defs.h" /* END_OF_MOD_ID */ |
| #include "stack_buff_pool.h" |
| #include "ctrl_buff_pool.h" |
| #include "sysconf_statistics.h" |
| #include "sysservice_msgid.h" |
| #include "tst.h" |
| #include "global_def.h" |
| |
| |
| #if(defined(ISP_SUPPORT)) |
| #include "drv_sw_features_isp.h" |
| #include "isp_nvram.h" |
| #endif |
| |
| #if defined(__MA_L1__) |
| #include "stack_common_ma.h" |
| #endif /* __MA_L1__ */ |
| |
| #ifdef __GAIN_TABLE_SUPPORT__ |
| #include "gain_table.h" |
| #endif /* __GAIN_TABLE_SUPPORT__ */ |
| |
| //#include "drv_features.h" |
| //#include "drv_features_adc.h" |
| //#include "drv_features_rtc.h" |
| //#include "drv_features_sim.h" |
| |
| #include "dcl.h" /* port_setting_struct */ |
| |
| #ifdef __MULTI_LEVEL_BACKLIGHT_SUPPORT__ |
| #include "custom_hw_default.h" |
| #endif |
| |
| #if defined(__UMTS_RAT__) && defined(__MTK_UL1_FDD__) |
| #include "ul1cal.h" |
| #endif |
| |
| #ifdef __MULTI_LEVEL_BACKLIGHT_SUPPORT__ |
| #include "custom_hw_default.h" |
| #endif |
| |
| |
| |
| #include "mml1_rf_global.h" |
| #include "mml1_mipi_public.h" |
| #include "mml1_drdi_public.h" |
| |
| #include "cust_chl_interface.h" |
| |
| |
| #define NVRAM_DUAL_RECORD MAX_SIM_NUM |
| #define NVRAM_MULTI_RECORD_LTE MAX_LTE_NUM |
| |
| //================================================== |
| //little group (size 64) |
| #define NVRAM_LID_GRP_UMTS(x) (0x0000 | (0x003F & x)) //UM |
| #define NVRAM_LID_GRP_CAMERA(x) (0x0040 | (0x003F & x)) //CA |
| #define NVRAM_LID_GRP_AUDIO(x) (0x0080 | (0x003F & x)) //AU |
| #define NVRAM_LID_GRP_USERPROFILE(x) (0x00C0 | (0x003F & x)) //UP |
| #define NVRAM_LID_GRP_OPERATORHS(x) (0x0100 | (0x003F & x)) //OP |
| #define NVRAM_LID_GRP_ECOMPASS(x) (0x0140 | (0x003F & x)) //EP |
| #define NVRAM_LID_GRP_MINILOG(x) (0x0180 | (0x003F & x)) //MM |
| #define NVRAM_LID_GRP_DRM(x) (0x01C0 | (0x003F & x)) //DR |
| #define NVRAM_LID_GRP_RTC(x) (0x0200 | (0x003F & x)) //RT |
| #define NVRAM_LID_GRP_BWCS(x) (0x0240 | (0x003F & x)) //BW |
| #define NVRAM_LID_GRP_GPS(x) (0x0280 | (0x003F & x)) //GP |
| #define NVRAM_LID_GRP_EMPTY(x) (0x02C0 | (0x003F & x)) |
| #define NVRAM_LID_GRP_VSIM(x) (0x0300 | (0x003F & x)) //VS |
| #define NVRAM_LID_GRP_SIM(x) (0x0340 | (0x003F & x)) //SM |
| #define NVRAM_LID_GRP_SCSI(x) (0x0380 | (0x003F & x)) //SS |
| #define NVRAM_LID_GRP_SBP(x) (0x03C0 | (0x003F & x)) //SP |
| #define NVRAM_LID_GRP_RR(x) (0x0400 | (0x003F & x)) //RR |
| #define NVRAM_LID_GRP_NMU(x) (0x0440 | (0x003F & x)) //NM |
| #define NVRAM_LID_GRP_NAS(x) (0x0480 | (0x003F & x)) //NA |
| #define NVRAM_LID_GRP_MML1(x) (0x04C0 | (0x003F & x)) //ML |
| #define NVRAM_LID_GRP_TCM(x) (0x0500 | (0x003F & x)) //TC |
| #define NVRAM_LID_GRP_IMS(x) (0x0540 | (0x003F & x)) //IM |
| #define NVRAM_LID_GRP_HMU(x) (0x0580 | (0x003F & x)) //HM |
| #define NVRAM_LID_GRP_FT(x) (0x05C0 | (0x003F & x)) //FT |
| #define NVRAM_LID_GRP_ERAC(x) (0x0600 | (0x003F & x)) //EC |
| #define NVRAM_LID_GRP_EMM(x) (0x0640 | (0x003F & x)) //EM |
| #define NVRAM_LID_GRP_DHL(x) (0x0680 | (0x003F & x)) //DH |
| #define NVRAM_LID_GRP_CSG(x) (0x06C0 | (0x003F & x)) //CS |
| #define NVRAM_LID_GRP_ASBAND(x) (0x0700 | (0x003F & x)) //AA |
| #define NVRAM_LID_GRP_ADC(x) (0x0740 | (0x003F & x)) //AD |
| #define NVRAM_LID_GRP_BT(x) (0x0780 | (0x003F & x)) //BT |
| #define NVRAM_LID_GRP_WNDRV(x) (0x07C0 | (0x003F & x)) //WN |
| #define NVRAM_LID_GRP_EX(x) (0x0800 | (0x003F & x)) //EX |
| #define NVRAM_LID_GRP_IWLAN(x) (0x0840 | (0x003F & x)) //IW |
| #define NVRAM_LID_GRP_D2(x) (0x0880 | (0x003F & x)) //D2 |
| #define NVRAM_LID_GRP_CUSTOMER(x) (0x08C0 | (0x003F & x)) //CU |
| #define NVRAM_LID_GRP_SSDS(x) (0x0900 | (0x003F & x)) //SD |
| #define NVRAM_LID_GRP_MRS(x) (0x0940 | (0x003F & x)) //MR |
| #define NVRAM_LID_GRP_NRRC(x) (0x0980 | (0x003F & x)) //NR |
| #define NVRAM_LID_GRP_XCAP(x) (0x09C0 | (0x003F & x)) //XP |
| #define NVRAM_LID_GRP_IPC(x) (0x0A00 | (0x003F & x)) //IP |
| #define NVRAM_LID_GRP_FCS(x) (0x0A40 | (0x003F & x)) //FC |
| #define NVRAM_LID_GRP_ICD(x) (0x0A80 | (0x003F & x)) //IC |
| #define NVRAM_LID_GRP_ESM(x) (0x0AC0 | (0x003F & x)) //ES |
| #define NVRAM_LID_GRP_BIP(x) (0x0B00 | (0x003F & x)) //BI |
| #define NVRAM_LID_GRP_L5(x) (0x0B40 | (0x003F & x)) //LF |
| #define NVRAM_LID_GRP_USB(x) (0x0B80 | (0x003F & x)) //US |
| #define NVRAM_LID_GRP_TMC(x) (0x0BC0 | (0x003F & x)) //TM |
| #define NVRAM_LID_GRP_SASE(x) (0x0C00 | (0x003F & x)) //SE |
| #define NVRAM_LID_GRP_THERMAL(x) (0x0C40 | (0x003F & x)) //TH |
| #define NVRAM_LID_GRP_IDC(x) (0x0C80 | (0x003F & x)) //DC |
| #define NVRAM_LID_GRP_RSRA(x) (0x0CC0 | (0x003F & x)) //RS |
| #define NVRAM_LID_GRP_MCF(x) (0x1000 | (0x003F & x)) //MC |
| #define NVRAM_LID_GRP_MTF(x) (0x1040 | (0x003F & x)) //MF |
| #define NVRAM_LID_GRP_VGNAS(x) (0x1080 | (0x003F & x)) //VG |
| #define NVRAM_LID_GRP_AS(x) (0x10C0 | (0x003F & x)) //AS |
| |
| #define NVRAM_LID_1ST_GRP_END 0x1200 |
| #define NVRAM_LID_2ND_GRP_START 0xD800 |
| //================================================== |
| //big group end (size 256) |
| #define NVRAM_LID_GRP_MMRFC(x) (0xDE00 | (0x00FF & x)) //RC |
| #define NVRAM_LID_GRP_MML1_CDF(x) (0xDF00 | (0x00FF & x)) //DF |
| #define NVRAM_LID_GRP_NL1(x) (0xE000 | (0x00FF & x)) //NL |
| #define NVRAM_LID_GRP_CUEX(x) (0xE100 | (0x00FF & x)) //CU |
| #define NVRAM_LID_GRP_CL1CAL(x) (0xE200 | (0x00FF & x)) //CC |
| #define NVRAM_LID_GRP_CL1(x) (0xE300 | (0x00FF & x)) //CL |
| #define NVRAM_LID_GRP_C2K(x) (0xE400 | (0x00FF & x)) //CK |
| #define NVRAM_LID_GRP_UL1(x) (0xE500 | (0x00FF & x)) //UL |
| #define NVRAM_LID_GRP_UL1_CALIBRATION1(x) (0xE600 | (0x00FF & x)) //UL |
| #define NVRAM_LID_GRP_UL1_CALIBRATION2(x) (0xE700 | (0x00FF & x)) //UL |
| #define NVRAM_LID_GRP_UL1_CALIBRATION3(x) (0xE800 | (0x00FF & x)) //UL |
| #define NVRAM_LID_GRP_L1(x) (0xE900 | (0x00FF & x)) //LA |
| #define NVRAM_LID_GRP_L1_RF(x) (0xEA00 | (0x00FF & x)) //LA |
| #define NVRAM_LID_GRP_TD(x) (0xEB00 | (0x00FF & x)) //TD //TL |
| #define NVRAM_LID_GRP_EL1(x) (0xEC00 | (0x00FF & x)) //EL |
| #define NVRAM_LID_GRP_EL1_CUST(x) (0xED00 | (0x00FF & x)) //EA |
| #define NVRAM_LID_GRP_ERRC(x) (0xEE00 | (0x00FF & x)) //ER //LT |
| #define NVRAM_LID_GRP_L4(x) (0xEF00 | (0x00FF & x)) //LD |
| //big group start (size 256) |
| |
| //================================================== |
| //system group start (size 256) |
| #define NVRAM_LID_GRP_INTERNAL(x) (0xF000 | (0x00FF & x)) //MT //ST |
| #define NVRAM_LID_GRP_FACTORY(x) (0xF100 | (0x00FF & x)) //MT |
| #define NVRAM_LID_GRP_CORE(x) (0xF200 | (0x00FF & x)) //MT |
| #define NVRAM_LID_GRP_COMM_APP(x) (0xF300 | (0x00FF & x)) //MT |
| #define NVRAM_LID_GRP_CUST(x) (0xFF00 | (0x00FF & x)) //MT |
| //system group end (size 256) |
| #define NVRAM_LID_GRP_MAX (1<<16) |
| |
| |
| typedef enum |
| { |
| NVRAM_POWERON_NORMAL, |
| NVRAM_POWERON_CHARGER, |
| NVRAM_POWERON_ALARM, |
| NVRAM_POWERON_INVALID |
| } nvram_poweron_mode_enum; |
| |
| typedef enum |
| { |
| NVRAM_LOCK_DISABLE, |
| NVRAM_LOCK_ENABLE, |
| NVRAM_LOCK_TEMP_DISABLE, |
| NVRAM_LOCK_OTP, |
| NVRAM_LOCK_INVALID |
| } nvram_lock_state_enum; |
| |
| typedef enum |
| { |
| NVRAM_DEFAULT_VALUE_SUCCESS, |
| NVRAM_DEFAULT_VALUE_FAIL, |
| NVRAM_DEFAULT_VALUE_FF, |
| NVRAM_DEFAULT_VALUE_ZERO, |
| NVRAM_DEFAULT_VALUE_POINT, |
| NVRAM_DEFAULT_VALUE_APPLICATION, |
| |
| NVRAM_DEFAULT_VALUE_MAX |
| } nvram_default_value_enum; |
| |
| typedef enum |
| { |
| NVRAM_RESET_ALL, |
| NVRAM_RESET_USER, |
| NVRAM_RESET_SYSTEM, |
| NVRAM_RESET_CERTAIN, |
| NVRAM_RESET_FACTORY, |
| NVRAM_RESET_CUSTPACK, |
| NVRAM_RESET_SECUPACK, |
| NVRAM_RESET_BRANCH, |
| NVRAM_RESET_PACKAGE, |
| NVRAM_RESET_FAT, |
| NVRAM_RESET_SDS, |
| NVRAM_RESET_INVALID |
| } nvram_reset_category_enum; |
| |
| |
| typedef enum |
| { |
| /* NVRAM generic error code */ |
| NVRAM_ERRNO_SUCCESS, |
| NVRAM_IO_ERRNO_OK = NVRAM_ERRNO_SUCCESS, |
| |
| NVRAM_ERRNO_FAIL, |
| NVRAM_ERRNO_INVALID, |
| NVRAM_ERRNO_NOT_READY, |
| |
| /* NVRAM driver error code */ |
| NVRAM_IO_ERRNO_INVALID_LID, |
| NVRAM_IO_ERRNO_INVALID_SIZE, |
| NVRAM_IO_ERRNO_INVALID_RECORD, |
| NVRAM_IO_ERRNO_EMPTY_RECORD, |
| NVRAM_IO_ERRNO_STORAGE, |
| NVRAM_IO_ERRNO_INIT, |
| NVRAM_IO_ERRNO_CHK, |
| NVRAM_IO_ERRNO_LOCKED, |
| NVRAM_IO_ERRNO_WRONG_RINGLID, |
| NVRAM_IO_ERRNO_ACCESS_DENIED, |
| NVRAM_IO_ERRNO_DRV_BROKEN, |
| NVRAM_IO_ERRNO_CONTENT_BROKEN, |
| NVRAM_IO_ERRNO_SDS_FAIL, |
| NVRAM_IO_ERRNO_SDS_MODE, |
| |
| /* OTP */ |
| NVRAM_ERRNO_OTP_UNKNOW, /* FS_FLASH_OTP_UNKNOWERR -123 */ |
| NVRAM_ERRNO_OTP_OVERSCOPE, /* FS_FLASH_OTP_OVERSCOPE -124 */ |
| NVRAM_ERRNO_OTP_WRITEFAIL, /* FS_FLASH_OTP_WRITEFAIL -125 */ |
| NVRAM_ERRNO_OTP_LOCKED, /* FS_FLASH_OTP_LOCK_ALREADY -125 */ |
| NVRAM_ERRNO_OTP_INVALID_INPUT, |
| NVRAM_ERRNO_OTP_INVALID_RANGE, |
| NVRAM_ERRNO_OTP_WRITETWICE, |
| |
| NVRAM_ERRNO_IMAGE_BROKEN, |
| NVRAM_ERRNO_IMAGE_EMPTY, |
| NVRAM_ERRNO_IMAGE_DATA_NOT_SYNC, |
| NVRAM_ERRNO_IMAGE_DATA_NOT_EXIST, |
| |
| NVRAM_ERRNO_FOLDER_EXIST, |
| |
| NVRAM_ERRNO_SDS_READY, |
| NVRAM_ERRNO_SDS_EMPTY, |
| |
| NVRAM_ERRNO_MSP_CHECK_ERROR, |
| NVRAM_ERRNO_CONF_CHECK_ERROR, |
| |
| NVRAM_ERRNO_WRONG_API_USE, //use normal API to access RAW data LID |
| NVRAM_ERRNO_SIG_CHK_FAIL, |
| |
| /* CHKSUM */ |
| NVRAM_ERRNO_INVAL_PARM, |
| NVRAM_ERRNO_GET_CHKSUM_ALGO_INGO, |
| NVRAM_ERRNO_CHKSUM_TYPE_PARM, |
| |
| NVRAM_ERRNO_MAX |
| } nvram_errno_enum; |
| |
| |
| |
| |
| typedef kal_uint16 nvram_lid_enum; |
| typedef kal_uint16 nvram_app_id_enum; |
| typedef kal_uint16 nvram_lid_core_enum; |
| typedef kal_uint16 nvram_appendix_type_enum; |
| |
| typedef enum |
| { |
| NVRAM_IMAGE_TYPE_EMPTY = 0x0000, |
| NVRAM_IMAGE_TYPE_CALIBRAT = 0x0001, |
| NVRAM_IMAGE_TYPE_IMEI = 0x0002 |
| } nvram_image_type_enum; |
| |
| #define NVRAM_IMAGE_TYPE_DEFAULT NVRAM_IMAGE_TYPE_CALIBRAT |
| |
| typedef enum |
| { |
| NVRAM_BIN_REGION_BACKUP, |
| NVRAM_BIN_REGION_RESTORE, |
| } nvram_bin_region_access_enum; |
| |
| typedef enum |
| { |
| NVRAM_SDS_ACCESS_BACKUP, |
| NVRAM_SDS_ACCESS_RESTORE, |
| } nvram_sds_access_enum; |
| |
| typedef enum |
| { |
| NVRAM_RESTORE_FALSE, |
| NVRAM_RESTORE_TRUE |
| }nvram_restore_flag_enum; |
| |
| typedef enum |
| { |
| NVRAM_ACCESS_BY_MSG, |
| NVRAM_ACCESS_BY_SECURE_API, |
| NVRAM_ACCESS_BY_NORMAL_API, |
| }nvram_access_way_enum; |
| |
| typedef enum |
| { |
| NVRAM_FACTORY_CMD_BACKUP, |
| NVRAM_FACTORY_CMD_RESTORE, |
| NVRAM_FACTORY_CMD_ERASE_BACKUP, |
| NVRAM_FACTORY_CMD_RESET_USER_DATA, /* NV Rebuild, make NV values to default (except backup NVs) */ |
| NVRAM_FACTORY_CMD_RESET_ALL, /* NV Rebuild, make NV values to default (including backup NVs like imei, rf calibration data and etc) */ |
| NVRAM_FACTORY_CMD_CHECK_BACKUP, /* To check if nvram have backuped or not */ |
| } nvram_factory_cmd_type_enum; |
| |
| typedef enum |
| { |
| NVRAM_REBUILD_NONE, |
| NVRAM_REBUILD_USER_DATA = 0x8AE1, |
| NVRAM_REBUILD_ALL_DATA = 0xF71D, |
| } nvram_rebuild_type_enum; |
| |
| typedef enum |
| { |
| FS_OP_OPEN = 0x1001, |
| FS_OP_SEEK, //0x1002 |
| FS_OP_READ, //0x1003 |
| FS_OP_WRITE, //0x1004 |
| FS_OP_CLOSE, //0x1005 |
| FS_OP_CLOSEALL, //0x1006 |
| FS_OP_CREATEDIR, //0x1007 |
| FS_OP_REMOVEDIR, //0x1008 |
| FS_OP_GETFILESIZE, //0x1009 |
| FS_OP_GETFOLDERSIZE, //0x100a |
| FS_OP_RENAME, //0x100b |
| FS_OP_MOVE, //0x100c |
| FS_OP_COUNT, //0x100d |
| FS_OP_GETDISKINFO, //0x100e |
| FS_OP_DELETE, //0x100f |
| FS_OP_GETATTRIBUTES, //0x1010 |
| FS_OP_OPENHINT, //0x1011 |
| FS_OP_FINDFIRST, //0x1012 |
| FS_OP_FINDNEXT, //0x1013 |
| FS_OP_FINDCLOSE, //0x1014 |
| FS_OP_LOCKFAT, //0x1015 |
| FS_OP_UNLOCKALL, //0x1016 |
| FS_OP_SHUTDOWN,//0x1017 |
| FS_OP_XDELETE, //0x1018 |
| FS_OP_CLEARDISKFLAG, //0x1019 |
| FS_OP_GETDRIVE, //0x101a |
| FS_OP_GETCLUSTERSIZE, //0x101b |
| FS_OP_SETDISKFLAG, //0x101c |
| FS_OP_OTPWRITE, //0x101d |
| FS_OP_OTPREAD, //0x101e |
| FS_OP_OTPQUERYLENGTH, //0x101f |
| FS_OP_OTPLOCK, //0x1020 |
| FS_OP_RESTORE = 0x1021, |
| FS_OP_CMPTREAD = 0x1022, |
| FS_OP_DUMMY1023 = 0x1023, |
| FS_OP_CMPTWRITE = 0x1024, |
| FS_OP_GETFILEDETAIL = 0x1025, |
| FS_OP_CUSTOMER_READIMEI = 0x1026, |
| } nvram_access_type_enum; |
| |
| typedef enum |
| { |
| NVRAM_OPEN_TRACE_SETTING_FILE_FAIL = 0x1, |
| NVRAM_READ_TRACE_SETTING_FILE_FAIL = 0x2, |
| NVRAM_READ_TRACE_SETTING_FILE_SUCCESS = 0x3, |
| }nvram_access_trace_setting_file_result_enum; |
| |
| typedef enum |
| { |
| NVRAM_INIT_START = 0x0, |
| NVRAM_PRE_INIT_GET_TRACE_SETTING_DONE, |
| NVRAM_PRE_INIT_DONE = 0xFF, |
| NVRAM_CORE_INIT_FIRST_BOOT_START = 0x101, |
| NVRAM_CORE_INIT_FIRST_BOOT_CHECK_DONE = 0x102, |
| NVRAM_CORE_INIT_FIRST_BOOT_CREATE_FAT_FILE_DONE = 0x103, |
| NVRAM_CORE_INIT_FIRST_BOOT_CREATE_MAIN_FOLDER_DONE = 0x104, |
| NVRAM_CORE_INIT_FIRST_BOOT_CREATE_ALL_FOLDER_DONE = 0x105, |
| NVRAM_CORE_INIT_FIRST_BOOT_RESET_ALL_FILE_DONE = 0x106, |
| NVRAM_CORE_INIT_FIRST_BOOT_RESET_SYS_LID_FILE_DONE = 0x107, |
| NVRAM_CORE_INIT_FIRST_BOOT_DELETE_FAT_FILE_DONE = 0x108, |
| NVRAM_CORE_INIT_FIRST_BOOT_END = 0x1FF, |
| NVRAM_CORE_INIT_FACTORY_BOOT_START = 0x200, |
| NVRAM_CORE_INIT_FACTORY_BOOT_CHECK_DONE = 0x201, |
| NVRAM_CORE_INIT_FACTORY_BOOT_CREATE_ALL_FOLDER_DONE =0x202, |
| NVRAM_CORE_INIT_FACTORY_BOOT_CONSTRUCT_BITMAP_DONE = 0x203, |
| NVRAM_CORE_INIT_FACTOR_BOOT_DELETE_NVDATA_DONE = 0x204, |
| NVRAM_CORE_INIT_FACTOR_BOOT_RESET_NON_CRITICAL_FILE_DONE =0x205, |
| NVRAM_CORE_INIT_FACTOR_BOOT_RESET_SYS_LID_FILE_DONE = 0x206, |
| NVRAM_CORE_INIT_FACTORY_BOOT_END = 0x2FF, |
| NVRAM_CORE_INIT_OTA_BOOT_START = 0x400, |
| NVRAM_CORE_INIT_OTA_BOOT_CHECK_DONE = 0x401, |
| NVRAM_CORE_INIT_OTA_BOOT_VERSION_CONFLICT_RESOLVE_STAGE1 = 0x402, |
| NVRAM_CORE_INIT_OTA_BOOT_VERSION_CONFLICT_RESOLVE_STAGE2 = 0x403, |
| NVRAM_CORE_INIT_OTA_BOOT_VERSION_CONFLICT_RESOLVE_STAGE3 =0x404, |
| NVRAM_CORE_INIT_OTA_BOOT_RESET_SYS_LID_FILE_DONE = 0x405, |
| NVRAM_CORE_INIT_OTA_BOOT_UPDATE_BUILD_TIME_FILE_DONE = 0x406, |
| NVRAM_CORE_INIT_OTA_BOOT_UPDATE_CHKSUM_INFO_FILE_DONE = 0x407, |
| NVRAM_CORE_INIT_OTA_BOOT_END = 0x4FF, |
| NVRAM_POST_INIT_START = 0x800, |
| NVRAM_POST_INIT_WRITE_BITMAP_DONE= 0x801, |
| NVRAM_POST_INIT_MCF_OTA_DONE = 0x802, |
| NVRAM_POST_INIT_CACHE_PREREAD_DONE = 0x803, |
| NVRAM_POST_INIT_CUSTOM_EM_NVRAM_CONFIG_DONE = 0x804, |
| NVRAM_POST_INIT_CUSTOM_NVRAM_CONFIG_DONE=0x805, |
| NVRAM_POST_INIT_CUSTOM_DEFAULT_MODE_CONFIG= 0x806, |
| NVRAM_POST_INIT_END = 0x8FF, |
| }nvram_init_step_enum; |
| |
| |
| #endif /* NVRAM_ENUMS_H */ |