blob: a51b0ae195199f82e38ed1a28418c2c515342a1f [file] [log] [blame]
#ifndef DSP_CIPHER_H
#define DSP_CIPHER_H
#include "kal_public_api.h"
#include "sync_data.h"
#include "reg_base.h"
#define DSP_CIPHER_REG(ptr) (*(volatile kal_uint32*)(ptr))
#define CIPHER_MAGIC 0xABCDABCD
#if defined(MT6763)|| defined(MT6739) || defined(MT6771) || defined(MT6295M) || defined(MT6765) || defined(MT6761) || defined(MT3967) || defined(MT6779) || defined(MT6297) || defined(MT6885) || defined(MT6873) ||defined(MT6853) || defined(CHIP10992) || defined(MT6833) || defined(MT6877) || defined(__MD97P__)
//rake - DE: Ethan Qian (Petrus_rakesys_global_con), shijie wu
#define MD32_RAKE_GLOBAL_CON BASE_MADDR_RAKESYS_GLOBAL_CON
#define MD32_RAKE_PM_CRC (0x50)
#define MD32_RAKE_DM_CRC (0x54)
#if defined(MT6763)|| defined(MT6739) || defined(MT6771) || defined(MT6295M) || defined(MT6765) || defined(MT6761) || defined(MT3967) || defined(MT6779)
#define MD32_MDRXAO_MEM_CONFIG BASE_MADDR_MODEML1_AO_MDRX_P2P_TX
#define SCQ_GLOBAL_CON_base BASE_MADDR_BRAM_SCQ_GLOBAL_CON
#elif defined(MT6297) || defined(MT6885) || defined(MT6873) || defined(MT6853) || defined(CHIP10992) || defined(MT6833) || defined(MT6877) || defined(__MD97P__)
// AOCR - DE: Vincent Hu (MT6297_mdrxao_config), mercury: matthew yin
#define MD32_MDRXAO_MEM_CONFIG BASE_MADDR_MODEML1_AO_U_MDRXAO_CONFIG
// scq16 - DE: Playpony (MT6297_md32scq_global_con), mercury: PJ HSU
#define SCQ_GLOBAL_CON_base BASE_MADDR_INR0_SCQ_GLOBAL_CON
// sonic-mCore - Alex Tang
#if defined(MT6297)
#define MCORE_AO_CR_base BASE_MADDR_MCOREPERI_INFRA_TO_MCORE_PAR_AO_CR
#elif defined(MT6885) || defined(MT6873) || defined(MT6853) || defined(CHIP10992) || defined(MT6833) || defined(MT6877)
#define MCORE_AO_CR_base BASE_MADDR_MODEML1_AO_U_MCORE_PAR_AO_CR
#endif
// sonic-vCore
#define VCORE_AO_CR_base BASE_MADDR_VCOREAO_VCOREHRAM_PAR_AO_CR
// sonic
#define MCORE_CIPHER_CFG 0x0
#define MCORE_CIPHER_LOCK_CFG 0x4
#define VCORE_CIPHER_CFG 0x58
#define VCORE_CIPHER_LOCK_CFG 0x5C
#define CIPHER_KEY_SEL_OFFSET 0x4
#define CIPHER_EN_MASK 0x1
#else
#error "need to define address for new chip"
#endif
// scq16 - DE: Playpony (MT6297_md32scq_global_con), mercury: PJ HSU
#define SCQ_PM_CRC32_OFFSET 0x20
#define SCQ_DM_CRC32_OFFSET 0x24
// AOCR - DE: Vincent Hu (MT6297_mdrxao_config), mercury: matthew yin
#define MD32_RAKE_PM_CIPHER_EN 0xB0
#define MD32_RAKE_PM_CIPHER_LOCK 0xB4
#define MD32_SCQ_PM_CIPHER_EN 0xC0
#define MD32_SCQ_PM_CIPHER_LOCK 0xC4
#else
#error "need to define address for new chip"
#endif
// rake
extern void set_rake_pm_checksum(kal_uint32 pm_chksum);
extern void set_rake_dm_checksum(kal_uint32 dm_chksum);
extern kal_uint32 get_rake_pm_checksum();
extern kal_uint32 get_rake_dm_checksum();
extern void set_rake_cipher_en();
extern void set_rake_cipher_lock();
extern kal_uint32 get_rake_cipher_en();
extern kal_uint32 get_rake_cipher_lock();
extern void rake_cipher_en_check();
// scq16
extern void set_scq16_pm_checksum(kal_uint32 pm_chksum);
extern void set_scq16_dm_checksum(kal_uint32 dm_chksum);
extern kal_uint32 get_scq16_pm_checksum();
extern kal_uint32 get_scq16_dm_checksum();
extern void set_scq16_cipher_en();
extern void set_scq16_cipher_lock();
extern kal_uint32 get_scq16_cipher_en();
extern kal_uint32 get_scq16_cipher_lock();
extern void scq16_cipher_en_check();
// sonic
extern void set_mcore_cipher_en(kal_uint32 en_val, kal_uint32 key_sel);
extern void set_mcore_cipher_lock();
extern kal_uint32 get_mcore_cipher_en();
extern kal_uint32 get_mcore_cipher_key();
extern void set_vcore_cipher_en(kal_uint32 en_val, kal_uint32 key_sel);
extern void set_vcore_cipher_lock();
extern kal_uint32 get_vcore_cipher_en();
extern kal_uint32 get_vcore_cipher_key();
#endif /* DSP_CIPHER_H */