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192.168.1.100 / T800_MD_V1.6 / 6ca76463d25bc0a2bf67fa24eab683bf46b38656 / . / mcu / interface / driver / devdrv / busmpu / busmpu.h
blob: d2cb878b617e33596a2d095b76976ce07ad6528e [file] [log] [blame]
yu.dongc33b3072024-08-21 23:14:49 -0700[diff] [blame]1#ifndef __BUSMPU_H__
2#define __BUSMPU_H__
3
4/*****************************************************************************
5
6 * Symbol/Type Definition *
7
8 *****************************************************************************/
9#if defined(__MD97__) || defined(__MD97P__)
10
11#include "gen97_busmpu.h"
12
13#else
14
15typedef enum BUSMPU_REGION_ATTRIBUTE_T
16{
17 BUSMPU_RO = 0x0,
18 BUSMPU_RW = 0x1,
19 BUSMON_PERMISSION_MAX
20}BUSMPU_PERMISSION_TYPE;
21
22typedef kal_uint32 FIELD;
23
24/**
25 * 0x00 : MPU_IOCU_CTRL
26 */
27typedef union {
28 struct {
29 FIELD iocu_err_trig_mode : 1;
30 FIELD iocu_vio_clr : 1;
31 FIELD iocu_vio_info_clr : 1;
32 FIELD iocu_domain_int_en : 1;
33 FIELD iocu_align_int_en : 1;
34 FIELD rsv_5 : 27;
35 } Bits;
36 FIELD Raw;
37} busmpu_iocu_int_ctrl, *pbusmpu_iocu_int_ctrl;
38
39/**
40 * 0x04 : MPU_EMI_CTRL
41 */
42typedef union {
43 struct {
44 FIELD emi_err_trig_mode : 1;
45 FIELD emi_vio_clr : 1;
46 FIELD emi_vio_info_clr : 1;
47 FIELD emi_domain_int_en : 1;
48 FIELD rsv_4 : 28;
49 } Bits;
50 FIELD Raw;
51} busmpu_emi_int_ctrl, *pbusmpu_emi_int_ctrl;
52
53/**
54 * 0x10 : MPU_IRQ_STATUS
55 */
56typedef union {
57 struct {
58 FIELD iocu_wt_domain : 1;
59 FIELD iocu_rd_domain : 1;
60 FIELD iocu_wt_align : 1;
61 FIELD iocu_rd_align : 1;
62 FIELD iocu_int_status : 1;
63 FIELD emi_wt_domain : 1;
64 FIELD emi_rd_domain : 1;
65 FIELD emi_int_status : 1;
66 FIELD rsv_8 : 24;
67 } Bits;
68 FIELD Raw;
69} busmpu_irq_status, *pbusmpu_irq_status;
70
71/**
72 * 0x20 : MPU_IOCU_VIO_DATA0
73 */
74typedef union {
75 struct {
76 FIELD iocu_addr : 32;
77 } Bits;
78 FIELD Raw;
79} busmpu_iocu_vio_addr, *pbusmpu_iocu_vio_addr;
80
81/**
82 * 0x24 : MPU_IOCU_VIO_DATA1
83 */
84typedef union {
85 struct {
86 FIELD iocu_id : 12;
87 FIELD iocu_domain : 3;
88 FIELD iocu_ro : 1;
89 FIELD iocu_region : 5;
90 FIELD iocu_burst : 2;
91 FIELD iocu_size : 3;
92 FIELD iocu_len : 4;
93 FIELD rsv_30 : 2;
94 } Bits;
95 FIELD Raw;
96} busmpu_iocu_vio_info, *pbusmpu_iocu_vio_info;
97
98/**
99 * 0x28 : MPU_EMI_VIO_DATA0
100 */
101typedef union {
102 struct {
103 FIELD emi_addr : 32;
104 } Bits;
105 FIELD Raw;
106} busmpu_emi_vio_addr, *pbusmpu_emi_vio_addr;
107
108/**
109 * 0x2C : MPU_EMI_VIO_DATA1
110 */
111typedef union {
112 struct {
113 FIELD emi_id : 12;
114 FIELD emi_domain : 3;
115 FIELD emi_ro : 1;
116 FIELD emi_region : 8;
117 FIELD rsv_24 : 8;
118 } Bits;
119 FIELD Raw;
120} busmpu_emi_vio_info, *pbusmpu_emi_vio_info;
121
122/**
123 * 0x30 : MPU_EMI_VIO_DATA2
124 */
125typedef union {
126 struct {
127 FIELD emi_user : 12;
128 FIELD rsv_12 : 20;
129 } Bits;
130 FIELD Raw;
131} busmpu_emi_vio_user, *pbusmpu_emi_vio_user;
132
133typedef volatile struct {
134 busmpu_iocu_int_ctrl iocu_ctrl; // 0000
135 busmpu_emi_int_ctrl emi_ctrl; // 0004
136 FIELD rsv_0008[2]; // 0008..000C
137 busmpu_irq_status irq_status; // 0010
138 FIELD rsv_0014[3]; // 0014..001C
139 busmpu_iocu_vio_addr iocu_vio_addr; // 0020
140 busmpu_iocu_vio_info iocu_vio_info; // 0024
141 busmpu_emi_vio_addr emi_vio_addr; // 0028
142 busmpu_emi_vio_info emi_vio_info; // 002C
143 busmpu_emi_vio_user emi_vio_user; // 0030
144} busmpu_reg, *pbusmpu_reg;
145
146typedef struct {
147 busmpu_iocu_vio_addr addr;
148 busmpu_iocu_vio_info info;
149} busmpu_iocu_vio_data, busmpu_mdinfra_error_info_st;
150
151typedef struct {
152 busmpu_emi_vio_addr addr;
153 busmpu_emi_vio_info info;
154 busmpu_emi_vio_user user;
155} busmpu_emi_vio_data, busmpu_mdmcu_error_info_st;
156
157extern kal_bool busmpu_mdinfra_dump_err(void);
158extern kal_bool busmpu_mdmcu_dump_err(void);
159extern kal_bool busmpu_dump_irq_sts(void);
160extern void busmpu_init(void);
161extern volatile busmpu_emi_vio_data busmpu_emi_err;
162extern volatile busmpu_iocu_vio_data busmpu_iocu_err;
163extern volatile busmpu_irq_status busmpu_irq_sts;
164void drv_iocu_lisr(kal_uint32 v);
165void iocu_align_init(void);
166void drv_rmpu_lisr(kal_uint32 v);
167void rmpu_md_init(void);
168
169#endif /*#if defined(__MD97__)*/
170#endif /*__BUSMPU_H__*/
171