yu.dong | c33b307 | 2024-08-21 23:14:49 -0700 | [diff] [blame^] | 1 | /***************************************************************************** |
| 2 | * Copyright Statement: |
| 3 | * -------------------- |
| 4 | * This software is protected by Copyright and the information contained |
| 5 | * herein is confidential. The software may not be copied and the information |
| 6 | * contained herein may not be used or disclosed except with the written |
| 7 | * permission of MediaTek Inc. (C) 2006 |
| 8 | * |
| 9 | * BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES |
| 10 | * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE") |
| 11 | * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON |
| 12 | * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES, |
| 13 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF |
| 14 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT. |
| 15 | * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE |
| 16 | * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR |
| 17 | * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH |
| 18 | * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO |
| 19 | * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S |
| 20 | * SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM. |
| 21 | * |
| 22 | * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE |
| 23 | * LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, |
| 24 | * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, |
| 25 | * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO |
| 26 | * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE. |
| 27 | * |
| 28 | * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE |
| 29 | * WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF |
| 30 | * LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND |
| 31 | * RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER |
| 32 | * THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC). |
| 33 | * |
| 34 | *****************************************************************************/ |
| 35 | |
| 36 | /***************************************************************************** |
| 37 | * |
| 38 | * Filename: |
| 39 | * --------- |
| 40 | * custom_scatstruct.c |
| 41 | * |
| 42 | * Project: |
| 43 | * -------- |
| 44 | * Maui_Software |
| 45 | * |
| 46 | * Description: |
| 47 | * ------------ |
| 48 | * This file provides the scatter file dependent APIs |
| 49 | * |
| 50 | * Author: |
| 51 | * ------- |
| 52 | * Claudia Lo (mtk01876) [AUTOGEN_GenVersion] |
| 53 | * |
| 54 | *============================================================================ |
| 55 | * HISTORY |
| 56 | * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!! |
| 57 | *------------------------------------------------------------------------------ |
| 58 | * $Revision$ |
| 59 | * $Modtime$ |
| 60 | * $Log$ |
| 61 | * |
| 62 | * 09 03 2020 yao.liu |
| 63 | * [MOLY00566717] [Gen97] Add a function to query if the region is on EMI. |
| 64 | * [NR15.R3.MP] Add an API to query if the region is on EMI. |
| 65 | * |
| 66 | * 12 03 2019 yao.liu |
| 67 | * [MOLY00463184] [System Service][MOLY Kernel Internal Request] Enhance exception flow security |
| 68 | * [VMOLY] Add custom_query_MCURO_HWRW_region API for exception. |
| 69 | * |
| 70 | * 09 03 2019 yao.liu |
| 71 | * [MOLY00434510] Memory Dump 2.0 |
| 72 | * [VMOLY] Memory dump 2.0 - SYS_MEM part. |
| 73 | * |
| 74 | * 08 09 2019 yao.liu |
| 75 | * [MOLY00430396] [Build error] Solve Mercury build error of custom_scatstruct.c. |
| 76 | * [Vmoly]Solve build error of custom_scatstruct.c. |
| 77 | * |
| 78 | * 05 23 2019 yao.liu |
| 79 | * [MOLY00408580] [VMOLY] Linker script changes for LTO. |
| 80 | * [VMOLY] Adjust lds for LTO feature. |
| 81 | * |
| 82 | * 04 29 2019 yao.liu |
| 83 | * [MOLY00383168] [System Service][MOLY Kernel Internal Request] Merge minidump code from UMOLYE to VMOLY |
| 84 | * [VMOLY] Porting mini dump. |
| 85 | * |
| 86 | * 01 14 2019 frank.hu |
| 87 | * [MOLY00363660] [Auto-Gen] Merge 2 links to 1 link to save more build time. |
| 88 | * |
| 89 | * VMOLY.DEV.SEPT - Merge 2Links -> 1Link. |
| 90 | * |
| 91 | * 10 23 2018 frank.hu |
| 92 | * [MOLY00360260] VMOLY GEN97 Eiger Build error. |
| 93 | * resolve Gen97 build error. |
| 94 | * |
| 95 | * 10 22 2018 tero.jarkko |
| 96 | * [MOLY00356148] [Gen97][SystemService][AutoGen]Provided SIB area query API |
| 97 | * |
| 98 | * . |
| 99 | * |
| 100 | * 10 18 2018 tero.jarkko |
| 101 | * [MOLY00359671] [Gen97][SystemService][AutoGen]SS_EXT_CSIF and NL1_EXT_CSIF API implementation |
| 102 | * |
| 103 | * . |
| 104 | * |
| 105 | * 09 28 2018 tero.jarkko |
| 106 | * [MOLY00356148] [Gen97][SystemService][AutoGen]Provided SIB area query API |
| 107 | * |
| 108 | * . |
| 109 | * |
| 110 | * 09 21 2018 tero.jarkko |
| 111 | * [MOLY00330320] [Gen97][SystemService][AutoGen] Adjusted MT6297 memory map |
| 112 | * |
| 113 | * . |
| 114 | * |
| 115 | * 08 14 2018 tero.jarkko |
| 116 | * [MOLY00345457] [Gen97][SystemService][AutoGen]MT6297 merge |
| 117 | * |
| 118 | * . |
| 119 | * |
| 120 | * 03 12 2018 tero.jarkko |
| 121 | * [MOLY00313013] [Gen97][SystemService][Auto-Gen]Fixed MT6297 build error |
| 122 | * |
| 123 | * . |
| 124 | * |
| 125 | * 02 27 2018 tero.jarkko |
| 126 | * [MOLY00310353] [Gen95][System Service][Auto-Gen]Static L2C locked input sections are placed into EMI |
| 127 | * |
| 128 | * . |
| 129 | * |
| 130 | * 12 17 2017 tero.jarkko |
| 131 | * [MOLY00296714] [SystemService][Auto-Gen][MT3967] Autogen support for MT3967 |
| 132 | * |
| 133 | * . |
| 134 | * |
| 135 | * 12 17 2017 tero.jarkko |
| 136 | * [MOLY00296714] [SystemService][Auto-Gen][MT3967] Autogen support for MT3967 |
| 137 | * |
| 138 | * . |
| 139 | * |
| 140 | * 12 17 2017 tero.jarkko |
| 141 | * [MOLY00296714] [SystemService][Auto-Gen][MT3967] Autogen support for MT3967 |
| 142 | * |
| 143 | * . |
| 144 | * |
| 145 | * 12 17 2017 tero.jarkko |
| 146 | * [MOLY00296714] [SystemService][Auto-Gen][MT3967] Autogen support for MT3967 |
| 147 | * |
| 148 | * . |
| 149 | * |
| 150 | * 11 08 2017 tero.jarkko |
| 151 | * [MOLY00288451] [MT6295M][SystemService][Autogen] Fixed MT6295M build error |
| 152 | * |
| 153 | * . |
| 154 | * |
| 155 | * 09 08 2017 tero.jarkko |
| 156 | * [MOLY00268904] [System Service][MOLY Kernel Internal Request]for fatal 0x9, modify custom_query_code_region to work similarly as custom_query_dump_region. |
| 157 | * |
| 158 | * . |
| 159 | * |
| 160 | * 08 16 2017 carl.kao |
| 161 | * [MOLY00247878] [Gen93] [SystemService] [Auto-Gen] [DSMGR] Fix SYS_SVC/DSMGR build warning |
| 162 | * . |
| 163 | * |
| 164 | * 07 25 2017 carl.kao |
| 165 | * [MOLY00265930] [Gen93] [SystemService] [Auto-Gen] AMMS DRDI stage 3 (integrate AMMS with MD DRDI) |
| 166 | * [AMMS STAGE 3/DRDI] main code |
| 167 | * |
| 168 | * 07 05 2017 tero.jarkko |
| 169 | * [MOLY00258516] [Gen93][SystemService][Auto-Gen]custom query code region generated by autogen |
| 170 | * |
| 171 | * . |
| 172 | * |
| 173 | * 06 28 2017 tero.jarkko |
| 174 | * [MOLY00260386] [Gen93][AutoGen]Remove custom_scatstruct.c build warning |
| 175 | * |
| 176 | * . |
| 177 | * |
| 178 | * 05 10 2017 tero.jarkko |
| 179 | * [MOLY00248620] [Gen93][SystemService][Auto-Gen] Assert in Dynamic L2C loack area seen as breakpoint |
| 180 | * |
| 181 | * . |
| 182 | * |
| 183 | * 05 04 2017 carl.kao |
| 184 | * [MOLY00246779] [BIANCO] Enable ASM addon,SWTR and stream mode |
| 185 | * Remove unused API : custom_get_MaxAvailableMemorySegment |
| 186 | * |
| 187 | * 04 07 2017 carl.kao |
| 188 | * [MOLY00240094] [Gen93] [SystemService] [Auto-Gen] Refine setting of EMI RMPU for Gen93 |
| 189 | * . |
| 190 | * |
| 191 | * 03 28 2017 tero.jarkko |
| 192 | * [MOLY00238285] [Gen93/LR13][SystemService][Auto-Gen][MT6763]Custom query code region for ADT |
| 193 | * |
| 194 | * . |
| 195 | * |
| 196 | * 02 13 2017 tero.jarkko |
| 197 | * [MOLY00229329] [Gen93/LR13][SystemService][Auto-Gen]L2C code query fixed |
| 198 | * |
| 199 | * . |
| 200 | * |
| 201 | * 01 25 2017 hw.jheng |
| 202 | * [MOLY00226817] [System Service] Shrink SWLA Size for Gen93 2 Cores, total 4 MB. |
| 203 | * |
| 204 | * 01 23 2017 tero.jarkko |
| 205 | * [MOLY00226093] [Gen93/LR13][SystemService][Auto-Gen][Bianco Bring-up]Modify SPRAM size and address |
| 206 | * |
| 207 | * . |
| 208 | * |
| 209 | * 01 18 2017 tero.jarkko |
| 210 | * [MOLY00225631] [Gen93/LR13][SystemService][Auto-Gen]Added L2C code check |
| 211 | * |
| 212 | * . |
| 213 | * |
| 214 | * 01 04 2017 kari.suvanto |
| 215 | * [MOLY00196319] [System Service][MOLY Kernel Internal Request]Umoly merge |
| 216 | * sst: fix nested exception at cache invalidation |
| 217 | * |
| 218 | * 10 27 2016 tero.jarkko |
| 219 | * [MOLY00187425] [LR12][SystemService][Auto-Gen] custom_query_code_region refined |
| 220 | * |
| 221 | * . |
| 222 | * |
| 223 | * 09 30 2016 carl.kao |
| 224 | * [MOLY00205905] [LR12][SystemService][Auto-Gen] Whitney TCM only load |
| 225 | * . |
| 226 | * |
| 227 | * 09 06 2016 tero.jarkko |
| 228 | * [MOLY00201797] [Gen93/LR13][SystemService][Auto-Gen] Hardcode lds for Gen93 layout |
| 229 | * |
| 230 | * . |
| 231 | * |
| 232 | * 06 28 2016 carl.kao |
| 233 | * [MOLY00179472] [SYSTEM SERVICE][KAL] Fix KAL build warning |
| 234 | * Fix CUSTOM lib build warning |
| 235 | * |
| 236 | * 06 20 2016 carl.kao |
| 237 | * [MOLY00174068] [LR13][SystemService][Auto-Gen] 93 lds |
| 238 | * New 93 image layout for MPU setting |
| 239 | * |
| 240 | * 05 23 2016 carl.kao |
| 241 | * [MOLY00180706] [LR12] [SystemService] [Auto-Gen] SWLA space requirement |
| 242 | * SWLA 3MB -> 6MB (still using NC) |
| 243 | * |
| 244 | * 04 13 2016 carl.kao |
| 245 | * [MOLY00174068] [LR13][SystemService][Auto-Gen] 93 lds |
| 246 | * Do not use ISPRAM2, DSPRAM2 and L2SRAM in 93 |
| 247 | * |
| 248 | * 03 11 2016 carl.kao |
| 249 | * [MOLY00160518] [LR12] [SYSTEM SERVICE] [KAL] [IPC] Fix converity warning in UMOLY TRUNK |
| 250 | * . |
| 251 | * |
| 252 | * 03 04 2016 carl.kao |
| 253 | * [MOLY00146830] [System Service][MOLY Kernel Internal Request][LR12] SMP SWLA/SWTR modification |
| 254 | * . |
| 255 | * |
| 256 | * 03 03 2016 carl.kao |
| 257 | * [MOLY00167331] [LR12] [SystemService] [Auto-Gen] [DSMGR] Set DSPRAM and ISPRAM to DSM_UNINIT_STAMP during boot |
| 258 | * . |
| 259 | * |
| 260 | * 02 25 2016 tero.jarkko |
| 261 | * [MOLY00166535] [LR12][SystemService][Auto-Gen] [Internal Refinement][MT6292] custom_query_dump_region |
| 262 | * |
| 263 | * . |
| 264 | * |
| 265 | * 02 24 2016 tero.jarkko |
| 266 | * [MOLY00164073] [LR12][SystemService][Auto-Gen] [Internal Refinement][MT6292] [sysGen2] Generate custom_scatstruct.c using sysGen2 |
| 267 | * |
| 268 | * Added L2SRAM_L2NC and L2SRAM_L2C functions |
| 269 | * |
| 270 | * 02 16 2016 tero.jarkko |
| 271 | * [MOLY00165076] [LR12][SystemService][Auto-Gen] [Internal Refinement][MT6292] [sysGen2] Support custom_query_dynamic_code_region |
| 272 | * |
| 273 | * . |
| 274 | * |
| 275 | * 02 04 2016 tero.jarkko |
| 276 | * [MOLY00164073] [LR12][SystemService][Auto-Gen] [Internal Refinement][MT6292] [sysGen2] Generate custom_scatstruct.c using sysGen2 |
| 277 | * |
| 278 | * custom_ram_mk_info |
| 279 | * |
| 280 | * 02 03 2016 tero.jarkko |
| 281 | * [MOLY00164073] [LR12][SystemService][Auto-Gen] [Internal Refinement][MT6292] [sysGen2] Generate custom_scatstruct.c using sysGen2 |
| 282 | * |
| 283 | * L2SRAM_L2NC base and length functions added |
| 284 | * |
| 285 | * 02 02 2016 tero.jarkko |
| 286 | * [MOLY00164073] [LR12][SystemService][Auto-Gen] [Internal Refinement][MT6292] [sysGen2] Generate custom_scatstruct.c using sysGen2 |
| 287 | * |
| 288 | * . |
| 289 | * |
| 290 | * 01 18 2016 carl.kao |
| 291 | * [MOLY00159955] [LR12][SystemService][Auto-Gen] remove core 3 SPRAM and make SPRAM APIs more robust |
| 292 | * . |
| 293 | * |
| 294 | * 01 14 2016 tero.jarkko |
| 295 | * [MOLY00160038] [LR12][SystemService][Auto-Gen] [Internal Refinement][MT6292] Support for custom_get_dump_info |
| 296 | * |
| 297 | * Fixed custom_get_dump_info dynamically cached default uncached region comparation |
| 298 | * |
| 299 | * 01 13 2016 tero.jarkko |
| 300 | * [MOLY00160038] [LR12][SystemService][Auto-Gen] [Internal Refinement][MT6292] Support for custom_get_dump_info |
| 301 | * |
| 302 | * Added support for core specific cached address info in custom_get_dump_info |
| 303 | * |
| 304 | * 01 12 2016 qmei.yang |
| 305 | * [MOLY00151351] [SystemService][DebuggingSuite][Internal Refinement][92] Support full exception flow framework |
| 306 | * |
| 307 | * . |
| 308 | * |
| 309 | * 01 11 2016 qmei.yang |
| 310 | * [MOLY00151351] [SystemService][DebuggingSuite][Internal Refinement][92] Support full exception flow framework |
| 311 | * . |
| 312 | * |
| 313 | * 12 29 2015 carl.kao |
| 314 | * [MOLY00154292] [LR12][SystemService][Auto-Gen] Enable the feature: embed VoLTE core bin address and size information to MD header |
| 315 | * . |
| 316 | * |
| 317 | * 12 23 2015 carl.kao |
| 318 | * [MOLY00154292] [LR12][SystemService][Auto-Gen] Enable the feature: embed VoLTE core bin address and size information to MD header |
| 319 | * Rename CACHED_EXTSRAM_VOLTE_CORE_ZI to CACHED_EXTSRAM_ZI_VOLTE_CORE3 |
| 320 | * |
| 321 | * 11 12 2015 carl.kao |
| 322 | * [MOLY00148842] [LR12][SystemService][Auto-Gen] 92 lds, for Full region ready, Code in Right Location |
| 323 | * Support VoLTE core section |
| 324 | * |
| 325 | * 11 11 2015 carl.kao |
| 326 | * [MOLY00148842] [LR12][SystemService][Auto-Gen] 92 lds, for Full region ready, Code in Right Location |
| 327 | * New image layout for "Full region ready, Code in Right Location" |
| 328 | * |
| 329 | * 09 21 2015 carl.kao |
| 330 | * [MOLY00136979] [92][SYSTEM SERVICE][KAL][IPC] Fix KAL build fail |
| 331 | * custom_scat |
| 332 | * |
| 333 | * 08 28 2015 carl.kao |
| 334 | * [MOLY00136979] [92][SYSTEM SERVICE][KAL][IPC] Fix KAL build fail |
| 335 | * . |
| 336 | * |
| 337 | * 08 26 2015 carl.kao |
| 338 | * [MOLY00138715] [92] [SystemService][Auto-Gen] Remove legacy linker symbol |
| 339 | * . |
| 340 | * |
| 341 | * 07 07 2015 carl.kao |
| 342 | * [MOLY00126388] [UMOLY] [SYSTEM SERVICE][KAL][DSMGR] Add dsmgr to pcore |
| 343 | * . |
| 344 | * |
| 345 | * 07 03 2015 carl.kao |
| 346 | * [MOLY00125736] [MT6755][BRINGUP_FIRSTCALL] [SystemService][Auto-Gen] add custom_get_L1CORE_INTSRAM_Base and custom_get_L1CORE_INTSRAM_End |
| 347 | * get l1core tcm base and length |
| 348 | * |
| 349 | * 06 15 2015 carl.kao |
| 350 | * [MOLY00121235] [TK6291] [SystemService][Auto-Gen][Request For Design Change] Query TCM base and end address |
| 351 | * . |
| 352 | * |
| 353 | * 04 16 2015 carl.kao |
| 354 | * [MOLY00106652] [TK6291] [SystemService][Auto-Gen] add a dynamic switchable default cached MCU-RW, HW-RW section |
| 355 | * add 4 sections for EMI RMPU |
| 356 | * 1) (MCU RO, MDHW RW) DNC |
| 357 | * 2) (MCU RO, MDHW RW) NC |
| 358 | * 3) (MCU RW, MDHW RW) DNC |
| 359 | * 4) (MCU RW, MDHW RW) NC |
| 360 | * |
| 361 | * 02 24 2015 qmei.yang |
| 362 | * [MOLY00096717] [SystemService][DebuggingSuite][Internal Refinement] Support to dump l1core l2sram |
| 363 | * . |
| 364 | * |
| 365 | * 02 24 2015 qmei.yang |
| 366 | * [MOLY00096717] [SystemService][DebuggingSuite][Internal Refinement] Support to dump l1core l2sram |
| 367 | * . |
| 368 | * |
| 369 | * 12 23 2014 carl.kao |
| 370 | * [MOLY00088578] [TK6291] [SystemService] [Auto-Gen] Support L2SRAM section (in L1CORE) |
| 371 | * aa. |
| 372 | * |
| 373 | * 12 22 2014 carl.kao |
| 374 | * [MOLY00087532] [Denali-1] [SystemService][Auto-Gen] Refactor AutoGen Code and Remove Legacy Code |
| 375 | * . |
| 376 | * |
| 377 | * 12 22 2014 carl.kao |
| 378 | * [MOLY00087532] [Denali-1] [SystemService][Auto-Gen] Refactor AutoGen Code and Remove Legacy Code |
| 379 | * . |
| 380 | * |
| 381 | * 12 02 2014 carl.kao |
| 382 | * [MOLY00086328] [TK6291] [SystemService][Auto-Gen] Refine custom_get_l1core_dump_info() |
| 383 | * . |
| 384 | * |
| 385 | * 11 28 2014 carl.kao |
| 386 | * [MOLY00085983] [TK6291] [SystemService][Auto-Gen] Merge ATCM and BTCM as a single TCM |
| 387 | * . |
| 388 | * |
| 389 | * 11 15 2014 carl.kao |
| 390 | * [MOLY00083302] [SYSTEM SERVICE][TASK CONFIG] Merge code from MT6291_DEV |
| 391 | * mcu/pcore |
| 392 | * |
| 393 | * 11 06 2014 carl.kao |
| 394 | * [MOLY00083492] [TK6291] [SystemService][Auto-Gen][Request For Design Change] Add custom_get_MD_RAMEnd() for MPU |
| 395 | * Add custom_get_MD_RAMEnd() for PCORE MPU |
| 396 | * |
| 397 | * 09 11 2014 qmei.yang |
| 398 | * [MOLY00078623] [SystemService][DebuggingSuite][Internal Refinement][MT6291] Support memory dump |
| 399 | * . |
| 400 | * |
| 401 | * 07 31 2014 carl.kao |
| 402 | * [MOLY00074124] [SystemService][DebuggingSuite][MT6291] Support multi-core exception |
| 403 | * dump L1CORE region by PCORE |
| 404 | * |
| 405 | * 04 07 2014 carl.kao |
| 406 | * [MOLY00061797] [SYSTEM SERVICE] porting features from U3G_TK6280_DEV and MOLY.U3G.90IT.DEV branches |
| 407 | * 9) Rename "l1dsp" to "l1core", "L1DSP" to "L1CORE" |
| 408 | * |
| 409 | * 04 02 2014 carl.kao |
| 410 | * [MOLY00061134] [SYSTEM SERVICE][AutoGen] AutoGen for MT6291 |
| 411 | * 1) pcore sysGen2. |
| 412 | * 2) Remove useless secure region query API |
| 413 | * |
| 414 | * 06 25 2013 qmei.yang |
| 415 | * [MOLY00025806] [SystemService][Auto-Gen][Request For Design Change] Support COPRO |
| 416 | * support COPRO_arm7's L1Cache |
| 417 | * |
| 418 | * 04 26 2013 qmei.yang |
| 419 | * [MOLY00020542] [SystemService][MOLY] To remove useless input sections by the request |
| 420 | * support SWLA space as well |
| 421 | * |
| 422 | * 04 09 2013 qmei.yang |
| 423 | * [MOLY00013707] [SystemService][Auto-Gen][Request For Design Change] Support code integrity for offline SST |
| 424 | * . |
| 425 | * |
| 426 | * 10 31 2012 qmei.yang |
| 427 | * [MOLY00005605] [SystemService][Auto-Gen][Request For Design Change][sysgen2] Create new API: custom_get_DSPTXRX_MaxSize() |
| 428 | * . |
| 429 | * |
| 430 | * 08 27 2012 qmei.yang |
| 431 | * [MOLY00001774] [SystemService][Region_Init][Internal Refinement] Support MT6577 region init and remove useless regions and compile option |
| 432 | * . |
| 433 | * |
| 434 | * 07 26 2012 qmei.yang |
| 435 | * [MOLY00001213] [SystemService][Auto-Gen][Internal Refinement] Fix GCC warnings |
| 436 | * . |
| 437 | * |
| 438 | * 05 28 2012 qmei.yang |
| 439 | * [MAUI_03164047] [SystemService][Auto-Gen][GCC][Internal Refinement] support AutoGen on GCC |
| 440 | * Support GCC to use attribute instead of pragma |
| 441 | * |
| 442 | * 05 10 2012 qmei.yang |
| 443 | * [MAUI_03182425] [Reason]sync codes between modem_dev and 11B |
| 444 | * . |
| 445 | * |
| 446 | * 04 16 2012 qmei.yang |
| 447 | * [MAUI_03169203] [SystemService][Auto-Gen][Request For Design Change] Add 3 objs into TCM and put 3 functions to TCM on MT6280 |
| 448 | * add 3 functions to TCM |
| 449 | * |
| 450 | * 03 08 2012 qmei.yang |
| 451 | * [MAUI_03145378] [SystemService][Auto-Gen][Sys Gen][scatGen][Internal Refinement] Phase in AutoGen new flow to support GCC |
| 452 | * . |
| 453 | * |
| 454 | * 02 15 2012 qmei.yang |
| 455 | * [MAUI_03130553] [SystemService][Auto-Gen][Sys Gen][scatGen][Internal Refinement] Support cmmgen sync with sysgen2 |
| 456 | * Modify custom_query_dump_region() API |
| 457 | * |
| 458 | * 02 15 2012 qmei.yang |
| 459 | * [MAUI_03130553] [SystemService][Auto-Gen][Sys Gen][scatGen][Internal Refinement] Support cmmgen sync with sysgen2 |
| 460 | * Modify custom_query_dump_region() API |
| 461 | * |
| 462 | * 01 31 2012 qmei.yang |
| 463 | * [MAUI_03120516] [SystemService][Auto-Gen][Sys Gen][scatGen][Internal Refinement] Refactory sysgen2.pl |
| 464 | * . |
| 465 | *------------------------------------------------------------------------------ |
| 466 | * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!! |
| 467 | *============================================================================ |
| 468 | ****************************************************************************/ |
| 469 | |
| 470 | |
| 471 | #include "kal_general_types.h" |
| 472 | #include "kal_iram_section_defs.h" |
| 473 | |
| 474 | #include "init.h" |
| 475 | #include "cache_sw_int.h" |
| 476 | #include "cache_sw.h" |
| 477 | #include "custom_scatstruct.h" |
| 478 | |
| 479 | #ifdef __MTK_TARGET__ |
| 480 | extern kal_uint32 custom_get_fat_addr(); |
| 481 | extern kal_uint32 custom_get_fat_len(); |
| 482 | extern kal_uint32 INT_RetrieveFlashBaseAddr(void); |
| 483 | /******************************************************************************* |
| 484 | * Define import global data. |
| 485 | *******************************************************************************/ |
| 486 | |
| 487 | [AUTOGEN_SCAT_C_Gen_REGION_SYMBOL] |
| 488 | |
| 489 | |
| 490 | #define NUM_AVAILABLE_CORE (2) |
| 491 | |
| 492 | /***temp************************************************************************/ |
| 493 | DECLARE_NOINLINE kal_uint32 scat_max(kal_uint32 A1, kal_uint32 A2) |
| 494 | { |
| 495 | return ( ((A1)>=(A2)) ? (A1) : (A2) ); |
| 496 | } |
| 497 | |
| 498 | #if !(defined(__MD95__) || defined(__MD97__) || defined(__MD97P__)) |
| 499 | #define LoadBase(ID, spram_index) Load$$##ID##SPRAM##spram_index##$$Base |
| 500 | #define ImageBase(ID, spram_index) Image$$##ID##SPRAM##spram_index##$$Base |
| 501 | #define ImageLimit(ID, spram_index) Image$$##ID##SPRAM##spram_index##$$Limit |
| 502 | #define ImageLength(ID, spram_index) Image$$##ID##SPRAM##spram_index##$$Length |
| 503 | #define ImagePhyLength(ID, spram_index) Image$$##ID##SPRAM##spram_index##_PHYSICAL_BOUNDARY$$Length |
| 504 | #define ImageZIBase(ID, spram_index) Image$$##ID##SPRAM##spram_index##$$ZI$$Base |
| 505 | #define ImageZILimit(ID, spram_index) Image$$##ID##SPRAM##spram_index##$$ZI$$Limit |
| 506 | #define ImageZILength(ID, spram_index) Image$$##ID##SPRAM##spram_index##$$ZI$$Length |
| 507 | |
| 508 | |
| 509 | #define SPRAM_LINKER_SYMBOL_DEFINE(spram_index) \ |
| 510 | extern kal_uint32 LoadBase(I, spram_index); \ |
| 511 | extern kal_uint32 ImageBase(I, spram_index); \ |
| 512 | extern kal_uint32 ImageLimit(I, spram_index); \ |
| 513 | extern kal_uint32 ImageLength(I, spram_index); \ |
| 514 | extern kal_uint32 LoadBase(D, spram_index); \ |
| 515 | extern kal_uint32 ImageBase(D, spram_index); \ |
| 516 | extern kal_uint32 ImageLimit(D, spram_index); \ |
| 517 | extern kal_uint32 ImageLength(D, spram_index); \ |
| 518 | extern kal_uint32 ImageZIBase(D, spram_index); \ |
| 519 | extern kal_uint32 ImageZILimit(D, spram_index); \ |
| 520 | extern kal_uint32 ImageZILength(D, spram_index); |
| 521 | |
| 522 | |
| 523 | SPRAM_LINKER_SYMBOL_DEFINE(0) |
| 524 | SPRAM_LINKER_SYMBOL_DEFINE(1) |
| 525 | |
| 526 | |
| 527 | static const kal_uint32 _ispram_load_addr[NUM_AVAILABLE_CORE] = {(kal_uint32)&LoadBase(I,0), (kal_uint32)&LoadBase(I,1)}; |
| 528 | static const kal_uint32 _ispram_start_addr[NUM_AVAILABLE_CORE] = {(kal_uint32)&ImageBase(I,0), (kal_uint32)&ImageBase(I,1)}; |
| 529 | static const kal_uint32 _ispram_end_addr[NUM_AVAILABLE_CORE] = {(kal_uint32)&ImageLimit(I,0), (kal_uint32)&ImageLimit(I,1)}; |
| 530 | |
| 531 | static const kal_uint32 _dspram_load_addr[NUM_AVAILABLE_CORE] = {(kal_uint32)&LoadBase(D,0), (kal_uint32)&LoadBase(D,1)}; |
| 532 | static const kal_uint32 _dspram_start_addr[NUM_AVAILABLE_CORE] = {(kal_uint32)&ImageBase(D,0), (kal_uint32)&ImageBase(D,1)}; |
| 533 | static const kal_uint32 _dspram_end_addr[NUM_AVAILABLE_CORE] = {(kal_uint32)&ImageLimit(D,0), (kal_uint32)&ImageLimit(D,1)}; |
| 534 | static const kal_uint32 _dspram_zi_start_addr[NUM_AVAILABLE_CORE]= {(kal_uint32)&ImageZIBase(D,0), (kal_uint32)&ImageZIBase(D,1)}; |
| 535 | static const kal_uint32 _dspram_zi_end_addr[NUM_AVAILABLE_CORE] = {(kal_uint32)&ImageZILimit(D,0), (kal_uint32)&ImageZILimit(D,1)}; |
| 536 | static const kal_uint32 _dspram_phy_length[NUM_AVAILABLE_CORE] = {(kal_uint32)&ImagePhyLength(D,0), (kal_uint32)&ImagePhyLength(D,1)}; |
| 537 | #endif |
| 538 | [AUTOGEN_SCAT_C_Gen_ARRAY_DYNAMIC_CODE_REGION] |
| 539 | |
| 540 | [AUTOGEN_SCAT_C_Gen_ARRAY_CODE_REGIONS] |
| 541 | |
| 542 | [AUTOGEN_SCAT_C_Gen_ARRAY_MCURO_HWRW_REGIONS] |
| 543 | /***temp************************************************************************/ |
| 544 | #if !(defined(__MD97__) || defined(__MD97P__)) |
| 545 | typedef struct dump_info_str { |
| 546 | kal_uint32 start; |
| 547 | kal_uint32 end; |
| 548 | kal_uint8 op; |
| 549 | |
| 550 | }dump_info_str; |
| 551 | |
| 552 | static dump_info_str dump_info[] = { |
| 553 | [AUTOGEN_SCAT_C_Gen_TEMPLATE_CORE0_CACHEABLE_ASSING], |
| 554 | [AUTOGEN_SCAT_C_Gen_TEMPLATE_CORE1_CACHEABLE_ASSING] |
| 555 | }; |
| 556 | #endif |
| 557 | /******************************************************************************* |
| 558 | * Define import global data. |
| 559 | *******************************************************************************/ |
| 560 | |
| 561 | #if defined(__ARM9_MMU__) || defined(__ARM11_MMU__) |
| 562 | |
| 563 | /* define pool size for fine page table and coarse page table */ |
| 564 | /* CPT : 1 (TCM) |
| 565 | * + 4 * (number of continous dynamic CACHEABLE default non-cacheable region) |
| 566 | * + 4 * (number of continous dynamic CACHEABLE default cacheable region) |
| 567 | * + 4 * (number of continous CACHED region) |
| 568 | * + 4 * (number of continous CACHED code region) |
| 569 | * + 2 * (number of non-cacched EXTSRAM RW region) |
| 570 | * + 2 * (number of non-cacched EXTSRAM RO region) |
| 571 | * + 1 (DSP_TX DSP_RX ... ) |
| 572 | * + (number of ROM - 1) |
| 573 | * + 2 (at the beginning and at the end of FAT) |
| 574 | * */ |
| 575 | #if defined(__ARM9_MMU__) |
| 576 | [AUTOGEN_SCAT_C_Gen_ARM9_PT_POOLSIZE] |
| 577 | #elif defined(__ARM11_MMU__) |
| 578 | [AUTOGEN_SCAT_C_Gen_ARM11_PT_POOLSIZE] |
| 579 | #endif /* __ARM11_MMU__ */ |
| 580 | |
| 581 | #if defined(__ARM9_MMU__) |
| 582 | /* memory pool of fine page table */ |
| 583 | #if (MAX_FPT_POOL_SIZE > 0) |
| 584 | __PT_Aligned(4 * 1024) static kal_uint32 FPT_POOL[MAX_FPT_POOL_SIZE / 4]; |
| 585 | #endif /* MAX_FPT_POOL_SIZE > 0 */ |
| 586 | #endif /* __ARM9_MMU__ */ |
| 587 | /* memory pool of coarse page table */ |
| 588 | __PT_Aligned(1024) static kal_uint32 CPT_POOL[MAX_CPT_POOL_SIZE / 4]; |
| 589 | |
| 590 | #endif /* __ARM9_MMU__ || __ARM11_MMU__ */ |
| 591 | |
| 592 | #if defined(__DYNAMIC_SWITCH_CACHEABILITY__) |
| 593 | |
| 594 | [AUTOGEN_SCAT_C_Gen_ARRAY_EXTSRAM_REGION] |
| 595 | |
| 596 | #endif /* __DYNAMIC_SWITCH_CACHEABILITY__ */ |
| 597 | |
| 598 | #if defined(__MD97__) || defined(__MD97P__) |
| 599 | static EXTSRAM_REGION_INFO_T SIB_AREA_REGION[2] = {{ (kal_uint32)&Image$$SIB_AREA$$Base, (kal_uint32)&Image$$SIB_AREA$$Length},{0,0}}; |
| 600 | #endif |
| 601 | |
| 602 | #if defined(__ARM9_MMU__) || defined(__ARM11_MMU__) |
| 603 | #if defined(__ARM9_MMU__) |
| 604 | /************************************************************************* |
| 605 | * FUNCTION |
| 606 | * custom_query_fpt_pool |
| 607 | * |
| 608 | * DESCRIPTION |
| 609 | * This function gets the address and size of fpt pool. |
| 610 | * |
| 611 | * PARAMETERS |
| 612 | * |
| 613 | * RETURNS |
| 614 | * |
| 615 | *************************************************************************/ |
| 616 | kal_int32 custom_query_fpt_pool(kal_uint32 **pool, kal_uint32 *pool_size) |
| 617 | { |
| 618 | #if (MAX_FPT_POOL_SIZE > 0) |
| 619 | *pool = FPT_POOL; |
| 620 | *pool_size = MAX_FPT_POOL_SIZE; |
| 621 | #else /* MAX_FPT_POOL_SIZE > 0 */ |
| 622 | *pool = NULL; |
| 623 | *pool_size = 0; |
| 624 | #endif /* MAX_FPT_POOL_SIZE > 0 */ |
| 625 | |
| 626 | return 0; |
| 627 | } |
| 628 | #endif /* __ARM9_MMU__ */ |
| 629 | |
| 630 | /************************************************************************* |
| 631 | * FUNCTION |
| 632 | * custom_query_cpt_pool |
| 633 | * |
| 634 | * DESCRIPTION |
| 635 | * This function gets the address and size of cpt pool. |
| 636 | * |
| 637 | * PARAMETERS |
| 638 | * |
| 639 | * RETURNS |
| 640 | * |
| 641 | *************************************************************************/ |
| 642 | kal_int32 custom_query_cpt_pool(kal_uint32 **pool, kal_uint32 *pool_size) |
| 643 | { |
| 644 | *pool = CPT_POOL; |
| 645 | *pool_size = MAX_CPT_POOL_SIZE; |
| 646 | |
| 647 | return 0; |
| 648 | } |
| 649 | |
| 650 | #endif /* __ARM9_MMU__ || __ARM11_MMU__ */ |
| 651 | |
| 652 | #if defined(__DYNAMIC_SWITCH_CACHEABILITY__) |
| 653 | |
| 654 | /************************************************************************ |
| 655 | * FUNCTION |
| 656 | * custom_query_dynamic_cached_extsram_default_nc_region |
| 657 | * |
| 658 | * DESCRIPTION |
| 659 | * This function gets info of dynamic cached default non-cached EXT SRAM regions. |
| 660 | * |
| 661 | * PARAMETERS |
| 662 | * |
| 663 | * RETURNS |
| 664 | * |
| 665 | *************************************************************************/ |
| 666 | kal_int32 custom_query_dynamic_cached_extsram_default_nc_region(EXTSRAM_REGION_INFO_T **region) |
| 667 | { |
| 668 | *region = DYNAMIC_CACHED_EXTSRAM_DNC_REGION; |
| 669 | |
| 670 | return 0; |
| 671 | } |
| 672 | |
| 673 | /************************************************************************ |
| 674 | * FUNCTION |
| 675 | * custom_query_dynamic_cached_extsram_default_c_region |
| 676 | * |
| 677 | * DESCRIPTION |
| 678 | * This function gets info of dynamic cached default cached EXT SRAM regions. |
| 679 | * |
| 680 | * PARAMETERS |
| 681 | * |
| 682 | * RETURNS |
| 683 | * |
| 684 | *************************************************************************/ |
| 685 | kal_int32 custom_query_dynamic_cached_extsram_default_c_region(EXTSRAM_REGION_INFO_T **region) |
| 686 | { |
| 687 | *region = DYNAMIC_CACHED_EXTSRAM_DC_REGION; |
| 688 | |
| 689 | return 0; |
| 690 | } |
| 691 | |
| 692 | /************************************************************************* |
| 693 | * FUNCTION |
| 694 | * custom_query_cached_extsram_region |
| 695 | * |
| 696 | * DESCRIPTION |
| 697 | * This function gets info of cached EXT SRAM regions. |
| 698 | * |
| 699 | * PARAMETERS |
| 700 | * |
| 701 | * RETURNS |
| 702 | * |
| 703 | *************************************************************************/ |
| 704 | kal_int32 custom_query_cached_extsram_region(EXTSRAM_REGION_INFO_T **region) |
| 705 | { |
| 706 | *region = CACHED_EXTSRAM_REGION; |
| 707 | |
| 708 | return 0; |
| 709 | } |
| 710 | |
| 711 | /************************************************************************* |
| 712 | * FUNCTION |
| 713 | * custom_query_cached_extsram_code_region |
| 714 | * |
| 715 | * DESCRIPTION |
| 716 | * This function gets info of cached EXT SRAM code regions. |
| 717 | * |
| 718 | * PARAMETERS |
| 719 | * |
| 720 | * RETURNS |
| 721 | * |
| 722 | *************************************************************************/ |
| 723 | __TCMROCODE |
| 724 | kal_int32 custom_query_cached_extsram_code_region(EXTSRAM_REGION_INFO_T **region) |
| 725 | { |
| 726 | *region = CACHED_EXTSRAM_CODE_REGION; |
| 727 | |
| 728 | return 0; |
| 729 | } |
| 730 | |
| 731 | /************************************************************************* |
| 732 | * FUNCTION |
| 733 | * custom_query_noncached_extsram_region |
| 734 | * |
| 735 | * DESCRIPTION |
| 736 | * This function gets info of non-cached RW EXT SRAM regions. |
| 737 | * |
| 738 | * PARAMETERS |
| 739 | * |
| 740 | * RETURNS |
| 741 | * |
| 742 | *************************************************************************/ |
| 743 | __TCMROCODE |
| 744 | kal_int32 custom_query_noncached_extsram_region(EXTSRAM_REGION_INFO_T **region) |
| 745 | { |
| 746 | *region = NONCACHED_EXTSRAM_REGION; |
| 747 | |
| 748 | return 0; |
| 749 | } |
| 750 | |
| 751 | /************************************************************************* |
| 752 | * FUNCTION |
| 753 | * custom_query_noncached_extsram_ro_region |
| 754 | * |
| 755 | * DESCRIPTION |
| 756 | * This function gets info of non-cached RO EXT SRAM regions. |
| 757 | * |
| 758 | * PARAMETERS |
| 759 | * |
| 760 | * RETURNS |
| 761 | * |
| 762 | *************************************************************************/ |
| 763 | __TCMROCODE |
| 764 | kal_int32 custom_query_noncached_extsram_ro_region(EXTSRAM_REGION_INFO_T **region) |
| 765 | { |
| 766 | *region = NONCACHED_EXTSRAM_RO_REGION; |
| 767 | |
| 768 | return 0; |
| 769 | } |
| 770 | #endif /* __DYNAMIC_SWITCH_CACHEABILITY__ */ |
| 771 | |
| 772 | /************************************************************************* |
| 773 | * FUNCTION |
| 774 | * custom_query_dynamic_code_region |
| 775 | * |
| 776 | * DESCRIPTION |
| 777 | * This function gets info of dynamic code regions. |
| 778 | * |
| 779 | * PARAMETERS |
| 780 | * |
| 781 | * RETURNS |
| 782 | * |
| 783 | *************************************************************************/ |
| 784 | kal_int32 custom_query_dynamic_code_region(DYNAMIC_CODE_MEM_T core_id,DYNAMIC_CODE_REGION_INFO_T **region) |
| 785 | { |
| 786 | switch(core_id) |
| 787 | { |
| 788 | case DC_ISPRAM0: |
| 789 | *region = (DYNAMIC_CODE_REGION_INFO_T *)ISPRAM0_CODE_SECTIONS; |
| 790 | break; |
| 791 | case DC_ISPRAM1: |
| 792 | *region = (DYNAMIC_CODE_REGION_INFO_T *)ISPRAM1_CODE_SECTIONS; |
| 793 | break; |
| 794 | default: |
| 795 | *region = (DYNAMIC_CODE_REGION_INFO_T *)0; |
| 796 | return -1; |
| 797 | } |
| 798 | return 0; |
| 799 | } |
| 800 | |
| 801 | |
| 802 | /************************************************************************* |
| 803 | * FUNCTION |
| 804 | * custom_get_1st_ROM_ROMBase |
| 805 | * |
| 806 | * DESCRIPTION |
| 807 | * Retrieve the base address of the 1st ROM (Load View) |
| 808 | * This function must sync with scatter file structure |
| 809 | * |
| 810 | * PARAMETERS |
| 811 | * |
| 812 | * RETURNS |
| 813 | * |
| 814 | *************************************************************************/ |
| 815 | kal_uint32 custom_get_1st_ROM_ROMBase(void) |
| 816 | { |
| 817 | kal_uint32 address = (kal_uint32)&Image$$[AUTOGEN_SCAT_C_Gen_RegionName_EV_1stROM_BEGIN]$$Base; |
| 818 | address = MAP2CREGPA(address); |
| 819 | return address; |
| 820 | } |
| 821 | |
| 822 | /************************************************************************* |
| 823 | * FUNCTION |
| 824 | * custom_get_1st_ROM_ROMLength |
| 825 | * |
| 826 | * DESCRIPTION |
| 827 | * Retrieve the actual ROM length of 1st ROM (Load View) |
| 828 | * This function must sync with scatter file structure |
| 829 | * |
| 830 | * PARAMETERS |
| 831 | * |
| 832 | * RETURNS |
| 833 | * |
| 834 | *************************************************************************/ |
| 835 | kal_uint32 custom_get_1st_ROM_ROMLength(void) |
| 836 | { |
| 837 | kal_uint32 ROMLength = 0; |
| 838 | kal_uint32 ROM_Regions[] = { |
| 839 | [AUTOGEN_SCAT_C_Gen_TEMPLATE_1stROM_LENGTH]}; |
| 840 | kal_uint32 index; |
| 841 | kal_uint32 address = 0 ; |
| 842 | kal_uint32 length = 0; |
| 843 | for(index = 0; index < (sizeof(ROM_Regions)/sizeof(kal_uint32));index=index+2){ |
| 844 | if (!index) { |
| 845 | if ( (MAP2CREGPA(ROM_Regions[index])+MAP2CREGPA(ROM_Regions[index+1])) > (address+length) ) { |
| 846 | address = MAP2CREGPA(ROM_Regions[index]); |
| 847 | length = MAP2CREGPA(ROM_Regions[index+1]); |
| 848 | } |
| 849 | } else { |
| 850 | address = MAP2CREGPA(ROM_Regions[index]); |
| 851 | length = MAP2CREGPA(ROM_Regions[index+1]); |
| 852 | } |
| 853 | } |
| 854 | |
| 855 | ROMLength = address + length; |
| 856 | return ROMLength; |
| 857 | } |
| 858 | |
| 859 | /************************************************************************* |
| 860 | * FUNCTION |
| 861 | * custom_get_1st_ROM_RAMBase |
| 862 | * |
| 863 | * DESCRIPTION |
| 864 | * Retrieve the RAM base address of the 1st ROM (Load View) |
| 865 | * This function must sync with scatter file structure |
| 866 | * |
| 867 | * PARAMETERS |
| 868 | * |
| 869 | * RETURNS |
| 870 | * |
| 871 | *************************************************************************/ |
| 872 | kal_uint32 custom_get_1st_ROM_RAMBase(void) |
| 873 | { |
| 874 | return [AUTOGEN_SCAT_C_Gen_TEMPLATE_1stRAM_BEGIN]; |
| 875 | } |
| 876 | |
| 877 | /************************************************************************* |
| 878 | * FUNCTION |
| 879 | * custom_get_1st_ROM_RAMLength |
| 880 | * |
| 881 | * DESCRIPTION |
| 882 | * Retrieve the actual RAM length of 1st ROM (Load View) |
| 883 | * This function must sync with scatter file structure |
| 884 | * |
| 885 | * PARAMETERS |
| 886 | * |
| 887 | * RETURNS |
| 888 | * |
| 889 | *************************************************************************/ |
| 890 | kal_uint32 custom_get_1st_ROM_RAMLength(void) |
| 891 | { |
| 892 | kal_uint32 RAMLength = 0; |
| 893 | |
| 894 | return RAMLength; |
| 895 | } |
| 896 | |
| 897 | /************************************************************************* |
| 898 | * FUNCTION |
| 899 | * custom_get_1st_ROM_RAMEnd |
| 900 | * |
| 901 | * DESCRIPTION |
| 902 | * Retrieve the actual end address of 1st ROM (Exec View) |
| 903 | * This function must sync with scatter file structure |
| 904 | * |
| 905 | * PARAMETERS |
| 906 | * |
| 907 | * RETURNS |
| 908 | * |
| 909 | *************************************************************************/ |
| 910 | kal_uint32 custom_get_1st_ROM_RAMEnd(void) |
| 911 | { |
| 912 | kal_uint32 EndAddr = 0; |
| 913 | |
| 914 | EndAddr = (kal_uint32)&Image$$[AUTOGEN_SCAT_C_Gen_RegionName_EV_1stRAM_END]$$ZI$$Limit; |
| 915 | |
| 916 | return EndAddr; |
| 917 | } |
| 918 | |
| 919 | /************************************************************************* |
| 920 | * FUNCTION |
| 921 | * custom_get_1st_ROM_LoadEnd |
| 922 | * |
| 923 | * DESCRIPTION |
| 924 | * Retrieve the actual end address of 1st ROM (Load View) |
| 925 | * This function must sync with scatter file structure |
| 926 | * |
| 927 | * PARAMETERS |
| 928 | * |
| 929 | * RETURNS |
| 930 | * |
| 931 | *************************************************************************/ |
| 932 | kal_uint32 custom_get_1st_ROM_LoadEnd(void) |
| 933 | { |
| 934 | kal_uint32 EndAddr = 0; |
| 935 | |
| 936 | EndAddr = (kal_uint32)&Load$$[AUTOGEN_SCAT_C_Gen_RegionName_EV_1stROM_END]$$Base; |
| 937 | EndAddr += (kal_uint32)&Image$$[AUTOGEN_SCAT_C_Gen_RegionName_EV_1stROM_END]$$Length; |
| 938 | |
| 939 | return EndAddr; |
| 940 | } |
| 941 | |
| 942 | /************************************************************************* |
| 943 | * FUNCTION |
| 944 | * custom_get_1st_ROM_MCURWBase |
| 945 | * |
| 946 | * DESCRIPTION |
| 947 | * Retrieve the base address for MDMCU_RW MDHR_RO base, keyword, EXTSRAM and non-MCURO |
| 948 | * |
| 949 | * PARAMETERS |
| 950 | * |
| 951 | * RETURNS |
| 952 | * |
| 953 | *************************************************************************/ |
| 954 | kal_uint32 custom_get_1st_ROM_MCURWBase(void) |
| 955 | { |
| 956 | kal_uint32 BaseAddr = 0; |
| 957 | |
| 958 | BaseAddr = (kal_uint32)&Image$$[AUTOGEN_SCAT_C_Gen_TEMPLATE_1st_MCURW_SECTION]$$Base; |
| 959 | |
| 960 | return BaseAddr; |
| 961 | } |
| 962 | |
| 963 | |
| 964 | /************************************************************************* |
| 965 | * FUNCTION |
| 966 | * custom_get_ISPRAM_Load_Base |
| 967 | * |
| 968 | * DESCRIPTION |
| 969 | * Retrieve the base view address of ISPRAM by core id |
| 970 | * |
| 971 | * PARAMETERS |
| 972 | * core id |
| 973 | * |
| 974 | * RETURNS |
| 975 | * |
| 976 | *************************************************************************/ |
| 977 | kal_status custom_get_ISPRAM_Load_Base(kal_uint8 core_id, kal_uint32 *ret_addr) |
| 978 | { |
| 979 | #if !(defined(__MD95__) || defined(__MD97__) || defined(__MD97P__)) |
| 980 | if (core_id<NUM_AVAILABLE_CORE) |
| 981 | { |
| 982 | *ret_addr = _ispram_load_addr[core_id]; |
| 983 | return KAL_SUCCESS; |
| 984 | } |
| 985 | #endif |
| 986 | *ret_addr = 0; |
| 987 | return KAL_ERROR; |
| 988 | } |
| 989 | |
| 990 | /************************************************************************* |
| 991 | * FUNCTION |
| 992 | * custom_get_ISPRAM_CODE_Base |
| 993 | * |
| 994 | * DESCRIPTION |
| 995 | * Retrieve the execution view base address of ISPRAM code by core id |
| 996 | * |
| 997 | * PARAMETERS |
| 998 | * core id |
| 999 | * |
| 1000 | * RETURNS |
| 1001 | * |
| 1002 | *************************************************************************/ |
| 1003 | kal_status custom_get_ISPRAM_CODE_Base(kal_uint8 core_id, kal_uint32 *ret_addr) |
| 1004 | { |
| 1005 | #if !(defined(__MD95__) || defined(__MD97__) || defined(__MD97P__)) |
| 1006 | if (core_id<NUM_AVAILABLE_CORE) |
| 1007 | { |
| 1008 | *ret_addr = _ispram_start_addr[core_id]; |
| 1009 | return KAL_SUCCESS; |
| 1010 | } |
| 1011 | #endif |
| 1012 | *ret_addr = 0; |
| 1013 | return KAL_ERROR; |
| 1014 | } |
| 1015 | |
| 1016 | /************************************************************************* |
| 1017 | * FUNCTION |
| 1018 | * custom_get_ISPRAM_End |
| 1019 | * |
| 1020 | * DESCRIPTION |
| 1021 | * Retrieve the execution view end address of ISPRAM code by core id |
| 1022 | * |
| 1023 | * PARAMETERS |
| 1024 | * core id |
| 1025 | * |
| 1026 | * RETURNS |
| 1027 | * |
| 1028 | *************************************************************************/ |
| 1029 | kal_status custom_get_ISPRAM_CODE_End(kal_uint8 core_id, kal_uint32 *ret_addr) |
| 1030 | { |
| 1031 | #if !(defined(__MD95__) || defined(__MD97__) || defined(__MD97P__)) |
| 1032 | if (core_id<NUM_AVAILABLE_CORE) |
| 1033 | { |
| 1034 | *ret_addr = _ispram_end_addr[core_id]; |
| 1035 | return KAL_SUCCESS; |
| 1036 | } |
| 1037 | #endif |
| 1038 | *ret_addr = 0; |
| 1039 | return KAL_ERROR; |
| 1040 | } |
| 1041 | |
| 1042 | /************************************************************************* |
| 1043 | * FUNCTION |
| 1044 | * custom_get_ISPRAM_Base |
| 1045 | * |
| 1046 | * DESCRIPTION |
| 1047 | * Retrieve the execution view base address of ISPRAM by core id |
| 1048 | * |
| 1049 | * PARAMETERS |
| 1050 | * core id |
| 1051 | * |
| 1052 | * RETURNS |
| 1053 | * |
| 1054 | *************************************************************************/ |
| 1055 | kal_status custom_get_ISPRAM_Base(kal_uint8 core_id, kal_uint32 *ret_addr) |
| 1056 | { |
| 1057 | return custom_get_ISPRAM_CODE_Base(core_id, ret_addr); |
| 1058 | } |
| 1059 | |
| 1060 | /************************************************************************* |
| 1061 | * FUNCTION |
| 1062 | * custom_get_ISPRAM_End |
| 1063 | * |
| 1064 | * DESCRIPTION |
| 1065 | * Retrieve the execution view end address of ISPRAM by core id |
| 1066 | * |
| 1067 | * PARAMETERS |
| 1068 | * core id |
| 1069 | * |
| 1070 | * RETURNS |
| 1071 | * |
| 1072 | *************************************************************************/ |
| 1073 | kal_status custom_get_ISPRAM_End(kal_uint8 core_id, kal_uint32 *ret_addr) |
| 1074 | { |
| 1075 | #if !(defined(__MD95__) || defined(__MD97__) || defined(__MD97P__)) |
| 1076 | extern kal_uint32 Image$$ISPRAM$$Length ; |
| 1077 | |
| 1078 | kal_status ret; |
| 1079 | kal_uint32 base; |
| 1080 | |
| 1081 | ret = custom_get_ISPRAM_Base(core_id, &base); |
| 1082 | if (KAL_SUCCESS!=ret) |
| 1083 | { |
| 1084 | *ret_addr = 0; |
| 1085 | return ret; |
| 1086 | } |
| 1087 | |
| 1088 | if (core_id<NUM_AVAILABLE_CORE) |
| 1089 | { |
| 1090 | *ret_addr = base + (kal_uint32) &Image$$ISPRAM$$Length ; /*we assume the length of all ISPRAMs are the same */ |
| 1091 | return KAL_SUCCESS; |
| 1092 | } |
| 1093 | #endif |
| 1094 | *ret_addr = 0; |
| 1095 | return KAL_ERROR; |
| 1096 | } |
| 1097 | |
| 1098 | |
| 1099 | |
| 1100 | /************************************************************************* |
| 1101 | * FUNCTION |
| 1102 | * custom_get_DSPRAM_Load_Base |
| 1103 | * |
| 1104 | * DESCRIPTION |
| 1105 | * Retrieve the base view address of DSPRAM by core id |
| 1106 | * |
| 1107 | * PARAMETERS |
| 1108 | * core id |
| 1109 | * |
| 1110 | * RETURNS |
| 1111 | * |
| 1112 | *************************************************************************/ |
| 1113 | kal_status custom_get_DSPRAM_Load_Base(kal_uint8 core_id, kal_uint32 *ret_addr) |
| 1114 | { |
| 1115 | #if !(defined(__MD95__) || defined(__MD97__) || defined(__MD97P__)) |
| 1116 | if (core_id<NUM_AVAILABLE_CORE) |
| 1117 | { |
| 1118 | *ret_addr = _dspram_load_addr[core_id]; |
| 1119 | return KAL_SUCCESS; |
| 1120 | } |
| 1121 | #endif |
| 1122 | *ret_addr = 0; |
| 1123 | return KAL_ERROR; |
| 1124 | } |
| 1125 | |
| 1126 | /************************************************************************* |
| 1127 | * FUNCTION |
| 1128 | * custom_get_DSPRAM_DATA_Base |
| 1129 | * |
| 1130 | * DESCRIPTION |
| 1131 | * Retrieve the execution view base address of DSPRAM RW by core id |
| 1132 | * |
| 1133 | * PARAMETERS |
| 1134 | * core id |
| 1135 | * |
| 1136 | * RETURNS |
| 1137 | * |
| 1138 | *************************************************************************/ |
| 1139 | kal_status custom_get_DSPRAM_DATA_Base(kal_uint8 core_id, kal_uint32 *ret_addr) |
| 1140 | { |
| 1141 | #if !(defined(__MD95__) || defined(__MD97__) || defined(__MD97P__)) |
| 1142 | if (core_id<NUM_AVAILABLE_CORE) |
| 1143 | { |
| 1144 | *ret_addr = _dspram_start_addr[core_id]; |
| 1145 | return KAL_SUCCESS; |
| 1146 | } |
| 1147 | #endif |
| 1148 | *ret_addr = 0; |
| 1149 | return KAL_ERROR; |
| 1150 | } |
| 1151 | |
| 1152 | /************************************************************************* |
| 1153 | * FUNCTION |
| 1154 | * custom_get_DSPRAM_DATA_End |
| 1155 | * |
| 1156 | * DESCRIPTION |
| 1157 | * Retrieve the execution view end address of DSPRAM RW by core id |
| 1158 | * |
| 1159 | * PARAMETERS |
| 1160 | * core id |
| 1161 | * |
| 1162 | * RETURNS |
| 1163 | * |
| 1164 | *************************************************************************/ |
| 1165 | kal_status custom_get_DSPRAM_DATA_End(kal_uint8 core_id, kal_uint32 *ret_addr) |
| 1166 | { |
| 1167 | #if !(defined(__MD95__) || defined(__MD97__) || defined(__MD97P__)) |
| 1168 | if (core_id<NUM_AVAILABLE_CORE) |
| 1169 | { |
| 1170 | *ret_addr = _dspram_end_addr[core_id]; |
| 1171 | return KAL_SUCCESS; |
| 1172 | } |
| 1173 | #endif |
| 1174 | *ret_addr = 0; |
| 1175 | return KAL_ERROR; |
| 1176 | } |
| 1177 | |
| 1178 | |
| 1179 | /************************************************************************* |
| 1180 | * FUNCTION |
| 1181 | * custom_get_DSPRAM_DATA_ZI_Base |
| 1182 | * |
| 1183 | * DESCRIPTION |
| 1184 | * Retrieve the execution view base address of DSPRAM ZI by core id |
| 1185 | * |
| 1186 | * PARAMETERS |
| 1187 | * core id |
| 1188 | * |
| 1189 | * RETURNS |
| 1190 | * |
| 1191 | *************************************************************************/ |
| 1192 | kal_status custom_get_DSPRAM_DATA_ZI_Base(kal_uint8 core_id, kal_uint32 *ret_addr) |
| 1193 | { |
| 1194 | #if !(defined(__MD95__) || defined(__MD97__) || defined(__MD97P__)) |
| 1195 | if (core_id<NUM_AVAILABLE_CORE) |
| 1196 | { |
| 1197 | *ret_addr = _dspram_zi_start_addr[core_id]; |
| 1198 | return KAL_SUCCESS; |
| 1199 | } |
| 1200 | #endif |
| 1201 | *ret_addr = 0; |
| 1202 | return KAL_ERROR; |
| 1203 | } |
| 1204 | |
| 1205 | /************************************************************************* |
| 1206 | * FUNCTION |
| 1207 | * custom_get_DSPRAM_DATA_ZI_End |
| 1208 | * |
| 1209 | * DESCRIPTION |
| 1210 | * Retrieve the execution view end address of DSPRAM ZI by core id |
| 1211 | * |
| 1212 | * PARAMETERS |
| 1213 | * core id |
| 1214 | * |
| 1215 | * RETURNS |
| 1216 | * |
| 1217 | *************************************************************************/ |
| 1218 | kal_status custom_get_DSPRAM_DATA_ZI_End(kal_uint8 core_id, kal_uint32 *ret_addr) |
| 1219 | { |
| 1220 | #if !(defined(__MD95__) || defined(__MD97__) || defined(__MD97P__)) |
| 1221 | if (core_id<NUM_AVAILABLE_CORE) |
| 1222 | { |
| 1223 | *ret_addr = _dspram_zi_end_addr[core_id]; |
| 1224 | return KAL_SUCCESS; |
| 1225 | } |
| 1226 | #endif |
| 1227 | *ret_addr = 0; |
| 1228 | return KAL_ERROR; |
| 1229 | } |
| 1230 | |
| 1231 | |
| 1232 | |
| 1233 | /************************************************************************* |
| 1234 | * FUNCTION |
| 1235 | * custom_get_DSPRAM_Base |
| 1236 | * |
| 1237 | * DESCRIPTION |
| 1238 | * Retrieve the execution view base address of DSPRAM by core id |
| 1239 | * |
| 1240 | * PARAMETERS |
| 1241 | * core id |
| 1242 | * |
| 1243 | * RETURNS |
| 1244 | * |
| 1245 | *************************************************************************/ |
| 1246 | kal_status custom_get_DSPRAM_Base(kal_uint8 core_id, kal_uint32 *ret_addr) |
| 1247 | { |
| 1248 | return custom_get_DSPRAM_DATA_Base(core_id, ret_addr); |
| 1249 | } |
| 1250 | |
| 1251 | /************************************************************************* |
| 1252 | * FUNCTION |
| 1253 | * custom_get_ISPRAM_End |
| 1254 | * |
| 1255 | * DESCRIPTION |
| 1256 | * Retrieve the execution view end address of DSPRAM by core id |
| 1257 | * |
| 1258 | * PARAMETERS |
| 1259 | * core id |
| 1260 | * |
| 1261 | * RETURNS |
| 1262 | * |
| 1263 | *************************************************************************/ |
| 1264 | kal_status custom_get_DSPRAM_End(kal_uint8 core_id, kal_uint32 *ret_addr) |
| 1265 | { |
| 1266 | #if !(defined(__MD95__) || defined(__MD97__) || defined(__MD97P__)) |
| 1267 | kal_status ret; |
| 1268 | kal_uint32 base; |
| 1269 | |
| 1270 | ret = custom_get_DSPRAM_Base(core_id, &base); |
| 1271 | if (KAL_SUCCESS!=ret) |
| 1272 | { |
| 1273 | *ret_addr = 0; |
| 1274 | return ret; |
| 1275 | } |
| 1276 | |
| 1277 | if (core_id<NUM_AVAILABLE_CORE) |
| 1278 | { |
| 1279 | *ret_addr = base + (kal_uint32) _dspram_phy_length[core_id]; |
| 1280 | return KAL_SUCCESS; |
| 1281 | } |
| 1282 | #endif |
| 1283 | *ret_addr = 0; |
| 1284 | return KAL_ERROR; |
| 1285 | } |
| 1286 | |
| 1287 | /************************************************************************* |
| 1288 | * FUNCTION |
| 1289 | * custom_get_DYNAMIC_SECTION_L2CACHE_LOCK_Base |
| 1290 | * |
| 1291 | * DESCRIPTION |
| 1292 | * Retrieve the base of DYNAMIC L2CACHE LOCK |
| 1293 | * |
| 1294 | * PARAMETERS |
| 1295 | * |
| 1296 | * RETURNS |
| 1297 | * |
| 1298 | *************************************************************************/ |
| 1299 | kal_int32 custom_get_DYNAMIC_SECTION_L2CACHE_LOCK_Base(void) |
| 1300 | { |
| 1301 | #if defined(__MD95__) || defined(__MD97__) || defined(__MD97P__) |
| 1302 | return 0; |
| 1303 | #else |
| 1304 | extern kal_uint32 DYNAMIC_SECTION_L2CACHE_LOCK_0$$Base; |
| 1305 | |
| 1306 | return (kal_uint32) &DYNAMIC_SECTION_L2CACHE_LOCK_0$$Base; |
| 1307 | #endif |
| 1308 | } |
| 1309 | |
| 1310 | /************************************************************************* |
| 1311 | * FUNCTION |
| 1312 | * custom_get_DYNAMIC_SECTION_L2CACHE_LOCK_Length |
| 1313 | * |
| 1314 | * DESCRIPTION |
| 1315 | * Retrieve the end of DYNAMIC L2CACHE LOCK |
| 1316 | * |
| 1317 | * PARAMETERS |
| 1318 | * |
| 1319 | * RETURNS |
| 1320 | * |
| 1321 | *************************************************************************/ |
| 1322 | kal_int32 custom_get_DYNAMIC_SECTION_L2CACHE_LOCK_RW_Base(void) |
| 1323 | { |
| 1324 | extern kal_uint32 DYNAMIC_SECTION_L2CACHE_LOCK_0_DATA$$Base; |
| 1325 | |
| 1326 | return (kal_uint32) &DYNAMIC_SECTION_L2CACHE_LOCK_0_DATA$$Base; |
| 1327 | } |
| 1328 | |
| 1329 | /************************************************************************* |
| 1330 | * FUNCTION |
| 1331 | * custom_get_L2CACHE_LOCK_Base |
| 1332 | * |
| 1333 | * DESCRIPTION |
| 1334 | * Retrieve the base of L2CACHE LOCK |
| 1335 | * |
| 1336 | * PARAMETERS |
| 1337 | * |
| 1338 | * RETURNS |
| 1339 | * |
| 1340 | *************************************************************************/ |
| 1341 | kal_int32 custom_get_L2CACHE_LOCK_Base(void) |
| 1342 | { |
| 1343 | #if defined(__MD95__) || defined(__MD97__) || defined(__MD97P__) |
| 1344 | return 0; |
| 1345 | #else |
| 1346 | extern kal_uint32 L2CACHE_LOCK$$Base; |
| 1347 | |
| 1348 | return (kal_uint32) &L2CACHE_LOCK$$Base; |
| 1349 | #endif |
| 1350 | } |
| 1351 | |
| 1352 | /************************************************************************* |
| 1353 | * FUNCTION |
| 1354 | * custom_get_L2CACHE_LOCK_End |
| 1355 | * |
| 1356 | * DESCRIPTION |
| 1357 | * Retrieve the end of L2CACHE LOCK |
| 1358 | * |
| 1359 | * PARAMETERS |
| 1360 | * |
| 1361 | * RETURNS |
| 1362 | * |
| 1363 | *************************************************************************/ |
| 1364 | kal_int32 custom_get_L2CACHE_LOCK_End(void) |
| 1365 | { |
| 1366 | extern kal_uint32 L2CACHE_LOCK$$Limit; |
| 1367 | |
| 1368 | return (kal_uint32) &L2CACHE_LOCK$$Limit; |
| 1369 | } |
| 1370 | |
| 1371 | /************************************************************************* |
| 1372 | * FUNCTION |
| 1373 | * custom_get_L2CACHE_LOCK_Length |
| 1374 | * |
| 1375 | * DESCRIPTION |
| 1376 | * Retrieve the end of L2CACHE LOCK |
| 1377 | * |
| 1378 | * PARAMETERS |
| 1379 | * |
| 1380 | * RETURNS |
| 1381 | * |
| 1382 | *************************************************************************/ |
| 1383 | kal_int32 custom_get_L2CACHE_LOCK_Length(void) |
| 1384 | { |
| 1385 | #if defined(__MD95__) || defined(__MD97__) || defined(__MD97P__) |
| 1386 | return 0; |
| 1387 | #else |
| 1388 | extern kal_uint32 L2CACHE_LOCK$$Length; |
| 1389 | |
| 1390 | return (kal_uint32) &L2CACHE_LOCK$$Length; |
| 1391 | #endif |
| 1392 | } |
| 1393 | |
| 1394 | /************************************************************************* |
| 1395 | * FUNCTION |
| 1396 | * custom_get_L2CACHE_LOCK_Length |
| 1397 | * |
| 1398 | * DESCRIPTION |
| 1399 | * Retrieve the end of L2CACHE LOCK |
| 1400 | * |
| 1401 | * PARAMETERS |
| 1402 | * |
| 1403 | * RETURNS |
| 1404 | * |
| 1405 | *************************************************************************/ |
| 1406 | kal_int32 custom_get_L2CACHE_LOCK_RW_Base(void) |
| 1407 | { |
| 1408 | extern kal_uint32 L2CACHE_LOCK_DATA$$Base; |
| 1409 | |
| 1410 | return (kal_uint32) &L2CACHE_LOCK_DATA$$Base; |
| 1411 | } |
| 1412 | |
| 1413 | /************************************************************************* |
| 1414 | * FUNCTION |
| 1415 | * custom_get_DSPTXRX_Base |
| 1416 | * |
| 1417 | * DESCRIPTION |
| 1418 | * Retrieve the lowest base address of DSP_TX or DSP_RX |
| 1419 | * |
| 1420 | * PARAMETERS |
| 1421 | * |
| 1422 | * RETURNS |
| 1423 | * |
| 1424 | *************************************************************************/ |
| 1425 | kal_int32 custom_get_DSPTXRX_Base(void) |
| 1426 | { |
| 1427 | return [AUTOGEN_SCAT_C_Gen_TEMPLATE_DSPTXRX_BEGIN]; |
| 1428 | } |
| 1429 | /************************************************************************* |
| 1430 | * FUNCTION |
| 1431 | * custom_get_DSPTXRX_MaxSize |
| 1432 | * |
| 1433 | * DESCRIPTION |
| 1434 | * Retrieve the reserved size of DSP_TX plus DSP_RX |
| 1435 | * |
| 1436 | * PARAMETERS |
| 1437 | * |
| 1438 | * RETURNS |
| 1439 | * |
| 1440 | *************************************************************************/ |
| 1441 | kal_int32 custom_get_DSPTXRX_MaxSize(void) |
| 1442 | { |
| 1443 | return [AUTOGEN_SCAT_C_Gen_TEMPLATE_DSPTXRX_MAXSIZE]; |
| 1444 | } |
| 1445 | |
| 1446 | /************************************************************************* |
| 1447 | * FUNCTION |
| 1448 | * custom_get_FAT_StartAddr |
| 1449 | * |
| 1450 | * DESCRIPTION |
| 1451 | * Retrieve FAT base address |
| 1452 | * |
| 1453 | * PARAMETERS |
| 1454 | * |
| 1455 | * RETURNS |
| 1456 | * |
| 1457 | *************************************************************************/ |
| 1458 | kal_uint32 custom_get_FAT_StartAddr(void) |
| 1459 | { |
| 1460 | return (custom_get_fat_addr() | INT_RetrieveFlashBaseAddr()); |
| 1461 | } |
| 1462 | |
| 1463 | /************************************************************************* |
| 1464 | * FUNCTION |
| 1465 | * custom_get_FAT_Length |
| 1466 | * |
| 1467 | * DESCRIPTION |
| 1468 | * Retrieve FAT length |
| 1469 | * |
| 1470 | * PARAMETERS |
| 1471 | * |
| 1472 | * RETURNS |
| 1473 | * |
| 1474 | *************************************************************************/ |
| 1475 | kal_uint32 custom_get_FAT_Length(void) |
| 1476 | { |
| 1477 | return custom_get_fat_len(); |
| 1478 | } |
| 1479 | |
| 1480 | kal_uint32 custom_get_MD_RAMEnd(void) |
| 1481 | { |
| 1482 | kal_uint32 EndAddr = 0; |
| 1483 | |
| 1484 | extern kal_uint32 Image$$DUMMY_END$$Base; |
| 1485 | EndAddr = (kal_uint32)&Image$$DUMMY_END$$Base; |
| 1486 | |
| 1487 | return EndAddr; |
| 1488 | } |
| 1489 | |
| 1490 | |
| 1491 | |
| 1492 | /************************************************************************* |
| 1493 | * FUNCTION |
| 1494 | * custom_mk_ram_info |
| 1495 | * |
| 1496 | * DESCRIPTION |
| 1497 | * This function builds up EXTSRAM info tables. |
| 1498 | * |
| 1499 | * PARAMETERS |
| 1500 | * |
| 1501 | * RETURNS |
| 1502 | * |
| 1503 | *************************************************************************/ |
| 1504 | #if defined(__ARM9_MMU__) || defined(__ARM11_MMU__) || defined(__MTK_MMU__) || defined(__CR4__) || defined(__MTK_MMU_V2__) || defined(__MIPS_IA__) || defined(__MIPS_I7200__) |
| 1505 | kal_int32 custom_mk_ram_info() |
| 1506 | { |
| 1507 | /* This table contains all dynamic cacheable default non-cacheable regions. */ |
| 1508 | [AUTOGEN_SCAT_C_Gen_TEMPLATE_EXTSRAM_REGION_DYNAMIC_DNC_ASSIGN] |
| 1509 | |
| 1510 | /* This table contains all dynamic cacheable default cacheable regions. */ |
| 1511 | [AUTOGEN_SCAT_C_Gen_TEMPLATE_EXTSRAM_REGION_DYNAMIC_DC_ASSIGN] |
| 1512 | |
| 1513 | /* This table contains all cached regions. */ |
| 1514 | [AUTOGEN_SCAT_C_Gen_TEMPLATE_EXTSRAM_REGION_CACHED_RW_ASSIGN] |
| 1515 | |
| 1516 | /* This table contains all cached code regions. */ |
| 1517 | [AUTOGEN_SCAT_C_Gen_TEMPLATE_EXTSRAM_REGION_CACHED_RO_ASSIGN] |
| 1518 | |
| 1519 | /* This table contains all non-cached rw regions. */ |
| 1520 | [AUTOGEN_SCAT_C_Gen_TEMPLATE_EXTSRAM_REGION_NONCACHED_RW_ASSIGN] |
| 1521 | |
| 1522 | /* This table contains all non-cached ro regions. */ |
| 1523 | [AUTOGEN_SCAT_C_Gen_TEMPLATE_EXTSRAM_REGION_NONCACHED_RO_ASSIGN] |
| 1524 | |
| 1525 | |
| 1526 | return 0; |
| 1527 | } |
| 1528 | #endif /* __ARM9_MMU__ || __ARM11_MMU__ || __MTK_MMU__ || __CR4__ || __MTK_MMU_V2__ || __MIPS_IA__*/ |
| 1529 | |
| 1530 | |
| 1531 | /************************************************************************* |
| 1532 | * FUNCTION |
| 1533 | * custom_get_NVRAM_LTABLE_Base |
| 1534 | * |
| 1535 | * DESCRIPTION |
| 1536 | * Retrieve the base address of NVRAM_LTABLE |
| 1537 | * |
| 1538 | * PARAMETERS |
| 1539 | * |
| 1540 | * RETURNS |
| 1541 | * |
| 1542 | *************************************************************************/ |
| 1543 | kal_uint32 custom_get_NVRAM_LTABLE_Base(void) |
| 1544 | { |
| 1545 | return [AUTOGEN_SCAT_C_Gen_TEMPLATE_NVRAM_BASE]; |
| 1546 | } |
| 1547 | |
| 1548 | /************************************************************************* |
| 1549 | * FUNCTION |
| 1550 | * custom_get_NVRAM_LTABLE_Length |
| 1551 | * |
| 1552 | * DESCRIPTION |
| 1553 | * Retrieve the length of NVRAM_LTABLE |
| 1554 | * |
| 1555 | * PARAMETERS |
| 1556 | * |
| 1557 | * RETURNS |
| 1558 | * |
| 1559 | *************************************************************************/ |
| 1560 | kal_uint32 custom_get_NVRAM_LTABLE_Length(void) |
| 1561 | { |
| 1562 | return [AUTOGEN_SCAT_C_Gen_TEMPLATE_NVRAM_LENGTH]; |
| 1563 | } |
| 1564 | |
| 1565 | |
| 1566 | /************************************************************************* |
| 1567 | * FUNCTION |
| 1568 | * custom_get_VOLTE_CORE_ZI_base |
| 1569 | * |
| 1570 | * DESCRIPTION |
| 1571 | * Retrieve the base of CACHED_EXTSRAM_ZI_VOLTE_CORE3 section |
| 1572 | * |
| 1573 | * PARAMETERS |
| 1574 | * |
| 1575 | * RETURNS |
| 1576 | * |
| 1577 | *************************************************************************/ |
| 1578 | kal_uint32 custom_get_VOLTE_CORE_ZI_base(void) |
| 1579 | { |
| 1580 | extern kal_uint32 Image$$CACHED_EXTSRAM_ZI_VOLTE_CORE3$$Base; |
| 1581 | |
| 1582 | return (kal_uint32) &Image$$CACHED_EXTSRAM_ZI_VOLTE_CORE3$$Base; |
| 1583 | } |
| 1584 | |
| 1585 | |
| 1586 | /************************************************************************* |
| 1587 | * FUNCTION |
| 1588 | * custom_get_VOLTE_CORE_ZI_End |
| 1589 | * |
| 1590 | * DESCRIPTION |
| 1591 | * Retrieve the end of CACHED_EXTSRAM_ZI_VOLTE_CORE3 section |
| 1592 | * |
| 1593 | * PARAMETERS |
| 1594 | * |
| 1595 | * RETURNS |
| 1596 | * |
| 1597 | *************************************************************************/ |
| 1598 | kal_uint32 custom_get_VOLTE_CORE_ZI_End(void) |
| 1599 | { |
| 1600 | extern kal_uint32 Image$$CACHED_EXTSRAM_ZI_VOLTE_CORE3$$ZI$$Limit; |
| 1601 | |
| 1602 | return (kal_uint32) &Image$$CACHED_EXTSRAM_ZI_VOLTE_CORE3$$ZI$$Limit; |
| 1603 | } |
| 1604 | |
| 1605 | |
| 1606 | /************************************************************************* |
| 1607 | * FUNCTION |
| 1608 | * custom_query_dump_region |
| 1609 | * |
| 1610 | * DESCRIPTION |
| 1611 | * This function builds up the table of DUMP REGIONs. |
| 1612 | * |
| 1613 | * PARAMETERS |
| 1614 | * |
| 1615 | * RETURNS |
| 1616 | * |
| 1617 | *************************************************************************/ |
| 1618 | kal_uint32 custom_query_dump_region(EXTSRAM_REGION_INFO_T* region) |
| 1619 | { |
| 1620 | [AUTOGEN_SCAT_C_Gen_TEMPLATE_DUMP_REGION_ASSIGN] |
| 1621 | } |
| 1622 | |
| 1623 | /************************************************************************* |
| 1624 | * FUNCTION |
| 1625 | * custom_query_dump_region_without_UC_ROM |
| 1626 | * |
| 1627 | * DESCRIPTION |
| 1628 | * This function builds up the table of DUMP REGIONs without UC_ROM. |
| 1629 | * |
| 1630 | * PARAMETERS |
| 1631 | * |
| 1632 | * RETURNS |
| 1633 | * |
| 1634 | *************************************************************************/ |
| 1635 | kal_uint32 custom_query_dump_region_without_UC_ROM(EXTSRAM_REGION_INFO_T* region) |
| 1636 | { |
| 1637 | [AUTOGEN_SCAT_C_Gen_TEMPLATE_DUMP_REGION_NO_UC_ROM_ASSIGN] |
| 1638 | } |
| 1639 | |
| 1640 | /************************************************************************* |
| 1641 | * FUNCTION |
| 1642 | * custom_query_dump_region_ROM |
| 1643 | * |
| 1644 | * DESCRIPTION |
| 1645 | * This function builds up the table of DUMP ROM REGIONs. |
| 1646 | * |
| 1647 | * PARAMETERS |
| 1648 | * |
| 1649 | * RETURNS |
| 1650 | * |
| 1651 | *************************************************************************/ |
| 1652 | kal_uint32 custom_query_dump_region_ROM(EXTSRAM_REGION_INFO_T* region) |
| 1653 | { |
| 1654 | [AUTOGEN_SCAT_C_Gen_TEMPLATE_DUMP_REGION_ROM_ASSIGN] |
| 1655 | } |
| 1656 | |
| 1657 | /************************************************************************* |
| 1658 | * FUNCTION |
| 1659 | * custom_query_dump_region_PA |
| 1660 | * |
| 1661 | * DESCRIPTION |
| 1662 | * This function builds up the table of DUMP PA REGIONs. |
| 1663 | * |
| 1664 | * PARAMETERS |
| 1665 | * |
| 1666 | * RETURNS |
| 1667 | * |
| 1668 | *************************************************************************/ |
| 1669 | kal_uint32 custom_query_dump_region_PA(EXTSRAM_REGION_INFO_T* region) |
| 1670 | { |
| 1671 | [AUTOGEN_SCAT_C_Gen_TEMPLATE_DUMP_REGION_PA_ASSIGN] |
| 1672 | } |
| 1673 | |
| 1674 | /************************************************************************* |
| 1675 | * FUNCTION |
| 1676 | * custom_query_dump_region_VA |
| 1677 | * |
| 1678 | * DESCRIPTION |
| 1679 | * This function builds up the table of DUMP VA REGIONs. |
| 1680 | * |
| 1681 | * PARAMETERS |
| 1682 | * |
| 1683 | * RETURNS |
| 1684 | * |
| 1685 | *************************************************************************/ |
| 1686 | kal_uint32 custom_query_dump_region_VA(EXTSRAM_REGION_INFO_T* region) |
| 1687 | { |
| 1688 | [AUTOGEN_SCAT_C_Gen_TEMPLATE_DUMP_REGION_VA_ASSIGN] |
| 1689 | } |
| 1690 | |
| 1691 | kal_uint8 custom_get_dump_info(kal_uint32 *address) |
| 1692 | { |
| 1693 | #if defined(__MD97__) || defined(__MD97P__) |
| 1694 | return DUMP_OP_NONE; |
| 1695 | #else |
| 1696 | extern kal_uint32 sst_get_main_exception_core(void); |
| 1697 | |
| 1698 | kal_uint32 nCachedPrefix; |
| 1699 | kal_uint32 nonCacheAddr; |
| 1700 | kal_uint32 CachedAddr = (*address); |
| 1701 | kal_uint8 op = DUMP_OP_NONE; |
| 1702 | kal_uint32 index = 0; |
| 1703 | nCachedPrefix = [AUTOGEN_SCAT_C_Gen_TEMPLATE_CACHEABLE_PREFIX]; |
| 1704 | |
| 1705 | if ( ((CachedAddr & 0xF0000000) ^ nCachedPrefix) == 0) /*if it's cached address*/ |
| 1706 | { |
| 1707 | nonCacheAddr = CachedAddr & (~nCachedPrefix); |
| 1708 | for (index = 0; index < (sizeof(dump_info)/sizeof(dump_info_str));index++) |
| 1709 | { |
| 1710 | //size check, if start==end then empty section |
| 1711 | if ((dump_info[index].start&0x0FFFFFFF) == (dump_info[index].end&0x0FFFFFFF)) |
| 1712 | continue; |
| 1713 | |
| 1714 | if ( (((dump_info[index].start&0x0FFFFFFF)|nCachedPrefix)<= CachedAddr) && |
| 1715 | (CachedAddr <= ((dump_info[index].end&0x0FFFFFFF)|nCachedPrefix)) ) |
| 1716 | { |
| 1717 | op = dump_info[index].op; |
| 1718 | (*address) = nonCacheAddr; |
| 1719 | break; |
| 1720 | } |
| 1721 | } |
| 1722 | } |
| 1723 | if ((op == (sst_get_main_exception_core()+1)) && (op != DUMP_OP_NONE)) |
| 1724 | { |
| 1725 | op = DUMP_OP_NONE; |
| 1726 | } |
| 1727 | return op; |
| 1728 | #endif |
| 1729 | } |
| 1730 | |
| 1731 | |
| 1732 | /************************************************************************* |
| 1733 | * FUNCTION |
| 1734 | * custom_query_code_region |
| 1735 | * |
| 1736 | * DESCRIPTION |
| 1737 | * This function is t judge if the symbol address is in code region. |
| 1738 | * |
| 1739 | * PARAMETERS |
| 1740 | * core_id |
| 1741 | * RETURNS |
| 1742 | * |
| 1743 | *************************************************************************/ |
| 1744 | kal_bool custom_query_code_region(kal_uint32 code_addr, kal_uint32 core_id) |
| 1745 | { |
| 1746 | kal_uint32 index = 0; |
| 1747 | while((CODE_SECTIONS[index][0] !=0) || (CODE_SECTIONS[index][1] !=0)) |
| 1748 | { |
| 1749 | if( (CODE_SECTIONS[index][0] <= code_addr) && (code_addr < (CODE_SECTIONS[index][0]+CODE_SECTIONS[index][1]))) |
| 1750 | { |
| 1751 | return KAL_TRUE; |
| 1752 | } |
| 1753 | index++; |
| 1754 | } |
| 1755 | return KAL_FALSE; |
| 1756 | } |
| 1757 | |
| 1758 | /************************************************************************* |
| 1759 | * FUNCTION |
| 1760 | * custom_query_MCURO_HWRW_region |
| 1761 | * |
| 1762 | * DESCRIPTION |
| 1763 | * This function is t judge if the given address is in MCURO_HWRW region. |
| 1764 | * |
| 1765 | * PARAMETERS |
| 1766 | * symbol_addr |
| 1767 | * RETURNS |
| 1768 | * |
| 1769 | *************************************************************************/ |
| 1770 | kal_bool custom_query_MCURO_HWRW_region(kal_uint32 symbol_addr) |
| 1771 | { |
| 1772 | kal_uint32 index = 0; |
| 1773 | while((MCURO_HWRW_SECTIONS[index][0] !=0) || ((MCURO_HWRW_SECTIONS[index][1] - MCURO_HWRW_SECTIONS[index][0]) !=0)) |
| 1774 | { |
| 1775 | if( (MCURO_HWRW_SECTIONS[index][0] <= symbol_addr) && (symbol_addr < MCURO_HWRW_SECTIONS[index][1])) |
| 1776 | { |
| 1777 | return KAL_TRUE; |
| 1778 | } |
| 1779 | index++; |
| 1780 | } |
| 1781 | return KAL_FALSE; |
| 1782 | } |
| 1783 | |
| 1784 | |
| 1785 | /************************************************************************* |
| 1786 | * FUNCTION |
| 1787 | * custom_query_EMI_RMPU_region_info |
| 1788 | * |
| 1789 | * DESCRIPTION |
| 1790 | * This function gets info of EMI RMPU for setting to BUS MPU |
| 1791 | * |
| 1792 | * PARAMETERS |
| 1793 | * |
| 1794 | * RETURNS |
| 1795 | * |
| 1796 | *************************************************************************/ |
| 1797 | kal_uint32 custom_query_EMI_RMPU_region_info(EMI_MPU_REGION_INFO_T **region) |
| 1798 | { |
| 1799 | /* |
| 1800 | * Please align below setting to @aEMI_MPU_config in EMI_MPIinfo.pm |
| 1801 | */ |
| 1802 | extern kal_uint32 Image$$MCURO_HWRW$$Base; |
| 1803 | extern kal_uint32 Image$$DUMMY_END$$Base; |
| 1804 | static EMI_MPU_REGION_INFO_T EMI_MPU_REGION[5] = |
| 1805 | { |
| 1806 | {(kal_uint32)&Image$$ROM_GFH$$Base, 0, EMI_MPU_MDMCU_RO, EMI_MPU_MDHW_RO}, |
| 1807 | {(kal_uint32)&Image$$MCURO_HWRW$$Base, 0, EMI_MPU_MDMCU_RO, EMI_MPU_MDHW_RW}, |
| 1808 | {(kal_uint32)&Image$$EXTSRAM$$Base, 0, EMI_MPU_MDMCU_RW, EMI_MPU_MDHW_RO}, |
| 1809 | {(kal_uint32)&Image$$EXTSRAM_MCURW_HWRW$$Base, 0, EMI_MPU_MDMCU_RW, EMI_MPU_MDHW_RW}, |
| 1810 | {(kal_uint32)&Image$$DUMMY_END$$Base, 0, EMI_MPU_INVALIDE, EMI_MPU_INVALIDE} |
| 1811 | }; |
| 1812 | |
| 1813 | kal_uint32 i=1, num_of_region; |
| 1814 | |
| 1815 | num_of_region = sizeof(EMI_MPU_REGION)/sizeof(EMI_MPU_REGION_INFO_T); |
| 1816 | |
| 1817 | EMI_MPU_REGION[0].addr = EMI_MPU_REGION[0].addr & 0x0FFFFFFF; |
| 1818 | |
| 1819 | for(i=1; i<num_of_region; ++i) |
| 1820 | { |
| 1821 | EMI_MPU_REGION[i].addr = EMI_MPU_REGION[i].addr & 0x0FFFFFFF; |
| 1822 | EMI_MPU_REGION[i-1].len = EMI_MPU_REGION[i].addr - EMI_MPU_REGION[i-1].addr; |
| 1823 | } |
| 1824 | |
| 1825 | *region = EMI_MPU_REGION; |
| 1826 | |
| 1827 | return (num_of_region-1); |
| 1828 | } |
| 1829 | |
| 1830 | /************************************************************************* |
| 1831 | * FUNCTION |
| 1832 | * custom_get_SIB_AREA_region |
| 1833 | * |
| 1834 | * DESCRIPTION |
| 1835 | * Retrieve the SIB area regions info |
| 1836 | * |
| 1837 | * PARAMETERS |
| 1838 | * |
| 1839 | * RETURNS |
| 1840 | * |
| 1841 | *************************************************************************/ |
| 1842 | kal_int32 custom_get_SIB_AREA_region(EXTSRAM_REGION_INFO_T **region) |
| 1843 | { |
| 1844 | #if defined(__MD97__) || defined(__MD97P__) |
| 1845 | *region = SIB_AREA_REGION; |
| 1846 | #else |
| 1847 | (void)region; //avoid warnings; |
| 1848 | #endif |
| 1849 | |
| 1850 | return 0; |
| 1851 | } |
| 1852 | |
| 1853 | /************************************************************************* |
| 1854 | * FUNCTION |
| 1855 | * custom_get_SS_EXT_CSIF_Base |
| 1856 | * |
| 1857 | * DESCRIPTION |
| 1858 | * Retrieve the base of SS_EXT_CSIF section |
| 1859 | * |
| 1860 | * PARAMETERS |
| 1861 | * |
| 1862 | * RETURNS |
| 1863 | * |
| 1864 | *************************************************************************/ |
| 1865 | kal_uint32 custom_get_SS_EXT_CSIF_Base(void) |
| 1866 | { |
| 1867 | #if defined(__MD97__) || defined(__MD97P__) |
| 1868 | extern kal_uint32 Image$$MCURW_HWRW_DNC_SS_EXT_CSIF$$Base; |
| 1869 | return (kal_uint32) &Image$$MCURW_HWRW_DNC_SS_EXT_CSIF$$Base; |
| 1870 | #else |
| 1871 | return 0; |
| 1872 | #endif |
| 1873 | } |
| 1874 | |
| 1875 | /************************************************************************* |
| 1876 | * FUNCTION |
| 1877 | * custom_get_SS_EXT_CSIF_End |
| 1878 | * |
| 1879 | * DESCRIPTION |
| 1880 | * Retrieve the end of SS_EXT_CSIF section |
| 1881 | * |
| 1882 | * PARAMETERS |
| 1883 | * |
| 1884 | * RETURNS |
| 1885 | * |
| 1886 | *************************************************************************/ |
| 1887 | kal_uint32 custom_get_SS_EXT_CSIF_End(void) |
| 1888 | { |
| 1889 | #if defined(__MD97__) || defined(__MD97P__) |
| 1890 | extern kal_uint32 Image$$MCURW_HWRW_DNC_SS_EXT_CSIF$$Limit; |
| 1891 | return (kal_uint32) &Image$$MCURW_HWRW_DNC_SS_EXT_CSIF$$Limit; |
| 1892 | #else |
| 1893 | return 0; |
| 1894 | #endif |
| 1895 | } |
| 1896 | |
| 1897 | /************************************************************************* |
| 1898 | * FUNCTION |
| 1899 | * custom_get_NL1_EXT_CSIF_Base |
| 1900 | * |
| 1901 | * DESCRIPTION |
| 1902 | * Retrieve the base of NL1_EXT_CSIF section |
| 1903 | * |
| 1904 | * PARAMETERS |
| 1905 | * |
| 1906 | * RETURNS |
| 1907 | * |
| 1908 | *************************************************************************/ |
| 1909 | kal_uint32 custom_get_NL1_EXT_CSIF_Base(void) |
| 1910 | { |
| 1911 | #if defined(__MD97__) || defined(__MD97P__) |
| 1912 | extern kal_uint32 Image$$MCURW_HWRW_DNC_NL1_EXT_CSIF$$Base; |
| 1913 | return (kal_uint32) &Image$$MCURW_HWRW_DNC_NL1_EXT_CSIF$$Base; |
| 1914 | #else |
| 1915 | return 0; |
| 1916 | #endif |
| 1917 | } |
| 1918 | |
| 1919 | /************************************************************************* |
| 1920 | * FUNCTION |
| 1921 | * custom_get_NL1_EXT_CSIF_End |
| 1922 | * |
| 1923 | * DESCRIPTION |
| 1924 | * Retrieve the end of NL1_EXT_CSIF section |
| 1925 | * |
| 1926 | * PARAMETERS |
| 1927 | * |
| 1928 | * RETURNS |
| 1929 | * |
| 1930 | *************************************************************************/ |
| 1931 | kal_uint32 custom_get_NL1_EXT_CSIF_End(void) |
| 1932 | { |
| 1933 | #if defined(__MD97__) || defined(__MD97P__) |
| 1934 | extern kal_uint32 Image$$MCURW_HWRW_DNC_NL1_EXT_CSIF$$Limit; |
| 1935 | return (kal_uint32) &Image$$MCURW_HWRW_DNC_NL1_EXT_CSIF$$Limit; |
| 1936 | #else |
| 1937 | return 0; |
| 1938 | #endif |
| 1939 | } |
| 1940 | |
| 1941 | /************************************************************************* |
| 1942 | * FUNCTION |
| 1943 | * dummy_referene_func |
| 1944 | * |
| 1945 | * DESCRIPTION |
| 1946 | * Avoid removing the following linker symbols by garbage collection. |
| 1947 | * If some new symbols only used for post-gen are added, please add them to the funtion. |
| 1948 | * |
| 1949 | * PARAMETERS |
| 1950 | * |
| 1951 | * RETURNS |
| 1952 | * |
| 1953 | *************************************************************************/ |
| 1954 | __attribute__((noinline, used)) void dummy_referene_func(void) |
| 1955 | { |
| 1956 | volatile kal_uint32 dummy; |
| 1957 | |
| 1958 | extern kal_uint32 Image$$MCURO_HWRW$$Base; |
| 1959 | dummy = (kal_uint32)&Image$$MCURO_HWRW$$Base; |
| 1960 | extern kal_uint32 Image$$DUMMY_END$$Base; |
| 1961 | dummy = (kal_uint32)&Image$$DUMMY_END$$Base; |
| 1962 | extern kal_uint32 Image$$ROM_SIGNATURE_SECTION$$Length; |
| 1963 | dummy = (kal_uint32)&Image$$ROM_SIGNATURE_SECTION$$Length; |
| 1964 | extern kal_uint32 Image$$ROM_SIGNATURE_SECTION$$ZI$$Length; |
| 1965 | dummy = (kal_uint32)&Image$$ROM_SIGNATURE_SECTION$$ZI$$Length; |
| 1966 | extern kal_uint32 Load$$ROM_SIGNATURE_SECTION$$Base; |
| 1967 | dummy = (kal_uint32)&Load$$ROM_SIGNATURE_SECTION$$Base; |
| 1968 | |
| 1969 | (void)dummy; |
| 1970 | } |
| 1971 | |
| 1972 | /************************************************************************* |
| 1973 | * FUNCTION |
| 1974 | * custom_query_EMI_region |
| 1975 | * |
| 1976 | * DESCRIPTION |
| 1977 | * This function is to judge if the region is allocated on EMI. |
| 1978 | * |
| 1979 | * PARAMETERS |
| 1980 | * region_addr |
| 1981 | * RETURNS |
| 1982 | * |
| 1983 | *************************************************************************/ |
| 1984 | kal_bool custom_query_EMI_region(kal_uint32 region_addr) |
| 1985 | { |
| 1986 | kal_uint32 bank_prefix = region_addr >> 28; |
| 1987 | if( bank_prefix==0 || bank_prefix==2 || bank_prefix==4 || bank_prefix==6 ){ |
| 1988 | return KAL_TRUE; |
| 1989 | }else if( (bank_prefix==1 || bank_prefix==3 || bank_prefix==7 || bank_prefix==9) && (( region_addr & 0x0FFFFFFF) < 0x0F000000) ){ |
| 1990 | return KAL_TRUE; |
| 1991 | } |
| 1992 | return KAL_FALSE; |
| 1993 | } |
| 1994 | |
| 1995 | |
| 1996 | /* to be removed */ |
| 1997 | kal_uint32 custom_get_L2SRAM_L2NC_CODE_base(void) |
| 1998 | { |
| 1999 | return 0; |
| 2000 | } |
| 2001 | |
| 2002 | /* to be removed */ |
| 2003 | kal_uint32 custom_get_L2SRAM_L2NC_CODE_load_base(void) |
| 2004 | { |
| 2005 | return 0; |
| 2006 | } |
| 2007 | |
| 2008 | /* to be removed */ |
| 2009 | kal_uint32 custom_get_L2SRAM_L2NC_CODE_Length(void) |
| 2010 | { |
| 2011 | return 0; |
| 2012 | } |
| 2013 | |
| 2014 | /* to be removed */ |
| 2015 | kal_uint32 custom_get_L2SRAM_L2C_CODE_base(void) |
| 2016 | { |
| 2017 | #if !(defined(__MD97__) || defined(__MD97P__)) |
| 2018 | return 0; |
| 2019 | #else |
| 2020 | return (kal_uint32) &Image$$L2SRAM_L2C_CODE$$Base; |
| 2021 | #endif |
| 2022 | } |
| 2023 | |
| 2024 | /* to be removed */ |
| 2025 | kal_uint32 custom_get_L2SRAM_L2C_CODE_load_base(void) |
| 2026 | { |
| 2027 | #if !(defined(__MD97__) || defined(__MD97P__)) |
| 2028 | return 0; |
| 2029 | #else |
| 2030 | return (kal_uint32) &Load$$L2SRAM_L2C_CODE$$Base; |
| 2031 | #endif |
| 2032 | } |
| 2033 | |
| 2034 | /* to be removed */ |
| 2035 | kal_uint32 custom_get_L2SRAM_L2C_CODE_Length(void) |
| 2036 | { |
| 2037 | #if !(defined(__MD97__) || defined(__MD97P__)) |
| 2038 | return 0; |
| 2039 | #else |
| 2040 | return (kal_uint32)&Image$$L2SRAM_L2C_CODE$$Length; |
| 2041 | #endif |
| 2042 | } |
| 2043 | |
| 2044 | /* to be removed */ |
| 2045 | kal_uint32 custom_get_INTSRAMCODE_Base(void) |
| 2046 | { |
| 2047 | return 0; |
| 2048 | } |
| 2049 | |
| 2050 | #endif /* __MTK_TARGET__ */ |