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192.168.1.100 / T800_MD_V1.6 / c33b3079c38f91561c2f84f1ebed20ad8c60532a / . / mcu / interface / driver / peripheral / alerter_sw.h
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yu.dongc33b3072024-08-21 23:14:49 -0700[diff] [blame^]1/*****************************************************************************
2* Copyright Statement:
3* --------------------
4* This software is protected by Copyright and the information contained
5* herein is confidential. The software may not be copied and the information
6* contained herein may not be used or disclosed except with the written
7* permission of MediaTek Inc. (C) 2005
8*
9* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
10* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
11* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
12* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
13* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
14* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
15* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
16* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
17* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
18* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
19* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
20* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
21*
22* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
23* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
24* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
25* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
26* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
27*
28* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
29* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
30* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
31* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
32* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
33*
34*****************************************************************************/
35
36/*****************************************************************************
37 *
38 * Filename:
39 * ---------
40 * alerter_sw.h
41 *
42 * Project:
43 * --------
44 * Maui_Software
45 *
46 * Description:
47 * ------------
48 * This file is intended for alerter driver and melody adaption.
49 *
50 * Author:
51 * -------
52 * -------
53 *
54 *============================================================================
55 * HISTORY
56 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
57 *------------------------------------------------------------------------------
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122 *------------------------------------------------------------------------------
123 * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
124 *============================================================================
125 ****************************************************************************/
126#ifndef ALERTER_SW_H
127#define ALERTER_SW_H
128#include "dcl.h"
129/*
130* The output of Alerter has to sources:
131* one is the enhanced pwm output signal,which is implemented embedded in Alerter module;
132* the other is PDM signal from DSP domain directly.
133*/
134#define pwm 0
135#define pdm 1
136
137/*Select PWM Waveform clock*/
138typedef enum
139{
140 c13_1MHZ, /*13M Hz*/
141 c13_2MHZ, /*13/2M Hz*/
142 c13_4MHZ, /*13/4M Hz*/
143 c13_8MHZ /*13/8M Hz*/
144}ALClock;
145/*
146* select Alerter mode
147* In mode 1, the polarity of alerter output signal according to the relationship between internal counter1 and the programmed threshold will be inverted each time internal
148* counter2 reaches zero.
149*
150* In mode2, each time the internal counter2 count backwards to zero the alerter output signal is normal
151* pwm signal (i.e. signal is low as long as the internal counter1 value is greater than or equals to ALERTER_THRES, and it
152* is high when the internal counter1 is less than ALERTER_THRES) or low state by turns.
153
154* In mode3, the value of internal counter2 has no effect on output signal, i.e. the alerter output signal is low as long as the internal counter1 value is above
155* the programmed threshold and is high the internal counter1 is less than ALERTER_THRES when no matter what value the
156* internal counter2 is.
157*/
158typedef enum
159{
160 m1, /*Mode 1 select*/
161 m2, /*Mode 2 select*/
162 m3 /*Mode 3 select*/
163}ALMode;
164
165typedef void (*DCL_ALERTER_CONFIGURE)(kal_uint32 freq, kal_uint8 duty);
166typedef void (*DCL_ALERTER_START)(void);
167typedef void (*DCL_ALERTER_STOP)(void);
168typedef void (*DCL_ALERTER_PWROPEN)(kal_bool ENABLE);
169typedef void (*DCL_ALERTER_OUTPUT)(kal_uint8 outtype);
170typedef void (*DCL_ALERTER_PLAYALTERNOTES)(kal_bool (*GetNotecallbac)(BuzNoteStruct *Buz), void (*endofAlter)(void));
171typedef void (*DCL_ALERTER_STOPALERTERNOTES)(void);
172typedef void (*DCL_ALERTER_SETBUZVOLUME)(kal_uint8 volumn);
173typedef void (*DCL_ALERTER_CONFIG)(ALMode mode, ALClock Clock);
174typedef void (*DCL_ALERTER_GETCURRENT_LEVEL)(void);
175
176typedef struct
177{
178 DCL_ALERTER_CONFIGURE configure;
179 DCL_ALERTER_START start;
180 DCL_ALERTER_STOP stop;
181 DCL_ALERTER_PWROPEN pwropen;
182 DCL_ALERTER_OUTPUT output;
183 DCL_ALERTER_PLAYALTERNOTES playnotes;
184 DCL_ALERTER_STOPALERTERNOTES stopnotes;
185 DCL_ALERTER_SETBUZVOLUME setbuzvolume;
186 DCL_ALERTER_GETCURRENT_LEVEL getlevel;
187}AlerterDriver_t;
188
189extern void ALERTER_Output(kal_uint8 outtype);
190extern void PlayAlterNotes(kal_bool (*GetNotecallbac)(BuzNoteStruct *Buz), void (*endofAlter)(void));
191extern void StopAlterNotes(void);
192extern void SetBuzVolume(kal_uint8 volumn);
193extern void ALERTER_Config(ALMode mode, ALClock Clock);
194
195
196// MoDIS parser skip start
197// The following APIs are implemented in other dummy API files
198extern void Alter_Configure(kal_uint32 freq, kal_uint8 duty);
199extern void Alter_Start(void);
200extern void Alter_Stop(void);
201extern void ALERTER_PWROPEN(kal_bool ENABLE);
202// MoDIS parser skip end
203
204#if defined(__DRV_COMM_REG_DBG__) && defined(__DRV_ALERTER_REG_DBG__)
205#define DRV_ALERTER_WriteReg(addr,data) DRV_DBG_WriteReg(addr,data)
206#define DRV_ALERTER_Reg(addr) DRV_DBG_Reg(addr)
207#define DRV_ALERTER_WriteReg32(addr,data) DRV_DBG_WriteReg32(addr,data)
208#define DRV_ALERTER_Reg32(addr) DRV_DBG_Reg32(addr)
209#define DRV_ALERTER_WriteReg8(addr,data) DRV_DBG_WriteReg8(addr,data)
210#define DRV_ALERTER_Reg8(addr) DRV_DBG_Reg8(addr)
211#define DRV_ALERTER_ClearBits(addr,data) DRV_DBG_ClearBits(addr,data)
212#define DRV_ALERTER_SetBits(addr,data) DRV_DBG_SetBits(addr,data)
213#define DRV_ALERTER_SetData(addr, bitmask, value) DRV_DBG_SetData(addr, bitmask, value)
214#define DRV_ALERTER_ClearBits32(addr,data) DRV_DBG_ClearBits32(addr,data)
215#define DRV_ALERTER_SetBits32(addr,data) DRV_DBG_SetBits32(addr,data)
216#define DRV_ALERTER_SetData32(addr, bitmask, value) DRV_DBG_SetData32(addr, bitmask, value)
217#define DRV_ALERTER_ClearBits8(addr,data) DRV_DBG_ClearBits8(addr,data)
218#define DRV_ALERTER_SetBits8(addr,data) DRV_DBG_SetBits8(addr,data)
219#define DRV_ALERTER_SetData8(addr, bitmask, value) DRV_DBG_SetData8(addr, bitmask, value)
220#else
221#define DRV_ALERTER_WriteReg(addr,data) DRV_WriteReg(addr,data)
222#define DRV_ALERTER_Reg(addr) DRV_Reg(addr)
223#define DRV_ALERTER_WriteReg32(addr,data) DRV_WriteReg32(addr,data)
224#define DRV_ALERTER_Reg32(addr) DRV_Reg32(addr)
225#define DRV_ALERTER_WriteReg8(addr,data) DRV_WriteReg8(addr,data)
226#define DRV_ALERTER_Reg8(addr) DRV_Reg8(addr)
227#define DRV_ALERTER_ClearBits(addr,data) DRV_ClearBits(addr,data)
228#define DRV_ALERTER_SetBits(addr,data) DRV_SetBits(addr,data)
229#define DRV_ALERTER_SetData(addr, bitmask, value) DRV_SetData(addr, bitmask, value)
230#define DRV_ALERTER_ClearBits32(addr,data) DRV_ClearBits32(addr,data)
231#define DRV_ALERTER_SetBits32(addr,data) DRV_SetBits32(addr,data)
232#define DRV_ALERTER_SetData32(addr, bitmask, value) DRV_SetData32(addr, bitmask, value)
233#define DRV_ALERTER_ClearBits8(addr,data) DRV_ClearBits8(addr,data)
234#define DRV_ALERTER_SetBits8(addr,data) DRV_SetBits8(addr,data)
235#define DRV_ALERTER_SetData8(addr, bitmask, value) DRV_SetData8(addr, bitmask, value)
236#endif //#if defined(__DRV_COMM_REG_DBG__) && defined(__DRV_ALERTER_REG_DBG__)
237#endif
238