yu.dong | c33b307 | 2024-08-21 23:14:49 -0700 | [diff] [blame^] | 1 | /***************************************************************************** |
| 2 | * Copyright Statement: |
| 3 | * -------------------- |
| 4 | * This software is protected by Copyright and the information contained |
| 5 | * herein is confidential. The software may not be copied and the information |
| 6 | * contained herein may not be used or disclosed except with the written |
| 7 | * permission of MediaTek Inc. (C) 2001 |
| 8 | * |
| 9 | *****************************************************************************/ |
| 10 | |
| 11 | /***************************************************************************** |
| 12 | * |
| 13 | * Filename: |
| 14 | * --------- |
| 15 | * dcl_gpio.h |
| 16 | * |
| 17 | * Project: |
| 18 | * -------- |
| 19 | * Maui |
| 20 | * |
| 21 | * Description: |
| 22 | * ------------ |
| 23 | * Header file of DCL (Driver Common Layer) for GPIO. |
| 24 | * |
| 25 | * Author: |
| 26 | * ------- |
| 27 | * ------- |
| 28 | * |
| 29 | *============================================================================ |
| 30 | * HISTORY |
| 31 | * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!! |
| 32 | *------------------------------------------------------------------------------ |
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| 119 | * |
| 120 | *------------------------------------------------------------------------------ |
| 121 | * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!! |
| 122 | *============================================================================ |
| 123 | ****************************************************************************/ |
| 124 | |
| 125 | #ifdef DCL_DEFINITION_STRUCT |
| 126 | #ifndef __DCL_GPIO_H_STRUCT__ |
| 127 | #define __DCL_GPIO_H_STRUCT__ |
| 128 | //#include "gpio_sw_.h" |
| 129 | #include "drv_features_gpio.h" |
| 130 | |
| 131 | #define GPIO_DIR_INPUT 0 |
| 132 | #define GPIO_DIR_OUTPUT 1 |
| 133 | #define GPIO_DIR_BOTH 2 |
| 134 | |
| 135 | #define GPIO_MAGIC_NUM 0x80 |
| 136 | #define GPO_MAGIC_NUM 0x70 |
| 137 | |
| 138 | |
| 139 | #define GPIO_INPUT 0 /* IO in input */ |
| 140 | #define GPIO_ALL_INPUT 0x0000 |
| 141 | #define GPIO_OUTPUT 1 /* IO in output */ |
| 142 | #define GPIO_ALL_OUTPUT 0xffff |
| 143 | |
| 144 | #define GPIO_MAGIC_NUM_INTERNAL 0x80 |
| 145 | #define GPO_MAGIC_NUM_INTERNAL 0x70 |
| 146 | |
| 147 | |
| 148 | #if 0 |
| 149 | /* under construction !*/ |
| 150 | /* under construction !*/ |
| 151 | /* under construction !*/ |
| 152 | #if defined(DRV_GPIO_REG_AS_6223) || defined(DRV_GPIO_REG_AS_6253T) || defined(DRV_GPIO_REG_AS_6253E) || defined(DRV_GPIO_REG_AS_6253E_1) |
| 153 | /* under construction !*/ |
| 154 | /* under construction !*/ |
| 155 | /* under construction !*/ |
| 156 | /* under construction !*/ |
| 157 | /* under construction !*/ |
| 158 | /* under construction !*/ |
| 159 | /* under construction !*/ |
| 160 | /* under construction !*/ |
| 161 | /* under construction !*/ |
| 162 | /* under construction !*/ |
| 163 | /* under construction !*/ |
| 164 | #if defined(DRV_GPIO_REG_AS_6253T) || defined(DRV_GPIO_REG_AS_6253E) || defined(DRV_GPIO_REG_AS_6253E_1) |
| 165 | /* under construction !*/ |
| 166 | /* under construction !*/ |
| 167 | #if defined(DRV_GPIO_REG_AS_6253E_1) |
| 168 | /* under construction !*/ |
| 169 | /* under construction !*/ |
| 170 | #endif /*DRV_GPIO_REG_AS_6253E*/ |
| 171 | #endif /*DRV_GPIO_REG_AS_6253T*/ |
| 172 | #elif defined(DRV_GPIO_REG_AS_6238) || defined(DRV_GPIO_REG_AS_6235) |
| 173 | /* under construction !*/ |
| 174 | /* under construction !*/ |
| 175 | /* under construction !*/ |
| 176 | /* under construction !*/ |
| 177 | /* under construction !*/ |
| 178 | /* under construction !*/ |
| 179 | /* under construction !*/ |
| 180 | /* under construction !*/ |
| 181 | /* under construction !*/ |
| 182 | /* under construction !*/ |
| 183 | /* under construction !*/ |
| 184 | /* under construction !*/ |
| 185 | /* under construction !*/ |
| 186 | /* under construction !*/ |
| 187 | /* under construction !*/ |
| 188 | #if defined(DRV_GPIO_REG_AS_6235) |
| 189 | /* under construction !*/ |
| 190 | /* under construction !*/ |
| 191 | #endif |
| 192 | #elif defined(DRV_GPIO_REG_AS_6268A) || defined(DRV_GPIO_REG_AS_6268) || defined(DRV_GPIO_REG_AS_6270A) |
| 193 | /* under construction !*/ |
| 194 | /* under construction !*/ |
| 195 | /* under construction !*/ |
| 196 | /* under construction !*/ |
| 197 | /* under construction !*/ |
| 198 | /* under construction !*/ |
| 199 | /* under construction !*/ |
| 200 | /* under construction !*/ |
| 201 | /* under construction !*/ |
| 202 | /* under construction !*/ |
| 203 | /* under construction !*/ |
| 204 | /* under construction !*/ |
| 205 | /* under construction !*/ |
| 206 | /* under construction !*/ |
| 207 | /* under construction !*/ |
| 208 | /* under construction !*/ |
| 209 | #if !defined(DRV_GPIO_REG_AS_6270A) |
| 210 | /* under construction !*/ |
| 211 | /* under construction !*/ |
| 212 | #endif//!defined(DRV_GPIO_REG_AS_6270A) |
| 213 | /* under construction !*/ |
| 214 | /* under construction !*/ |
| 215 | /* under construction !*/ |
| 216 | /* under construction !*/ |
| 217 | /* under construction !*/ |
| 218 | /* under construction !*/ |
| 219 | #elif defined(DRV_GPIO_REG_AS_6236) |
| 220 | /* under construction !*/ |
| 221 | /* under construction !*/ |
| 222 | /* under construction !*/ |
| 223 | /* under construction !*/ |
| 224 | /* under construction !*/ |
| 225 | /* under construction !*/ |
| 226 | /* under construction !*/ |
| 227 | /* under construction !*/ |
| 228 | /* under construction !*/ |
| 229 | #elif defined(DRV_GPIO_REG_AS_6255) |
| 230 | /* under construction !*/ |
| 231 | /* under construction !*/ |
| 232 | /* under construction !*/ |
| 233 | /* under construction !*/ |
| 234 | /* under construction !*/ |
| 235 | /* under construction !*/ |
| 236 | /* under construction !*/ |
| 237 | /* under construction !*/ |
| 238 | /* under construction !*/ |
| 239 | /* under construction !*/ |
| 240 | /* under construction !*/ |
| 241 | /* under construction !*/ |
| 242 | /* under construction !*/ |
| 243 | #elif defined(DRV_GPIO_REG_AS_6276) |
| 244 | /* under construction !*/ |
| 245 | /* under construction !*/ |
| 246 | /* under construction !*/ |
| 247 | /* under construction !*/ |
| 248 | /* under construction !*/ |
| 249 | /* under construction !*/ |
| 250 | /* under construction !*/ |
| 251 | /* under construction !*/ |
| 252 | /* under construction !*/ |
| 253 | /* under construction !*/ |
| 254 | #elif defined(DRV_GPIO_REG_AS_6251) |
| 255 | /* under construction !*/ |
| 256 | /* under construction !*/ |
| 257 | /* under construction !*/ |
| 258 | /* under construction !*/ |
| 259 | /* under construction !*/ |
| 260 | /* under construction !*/ |
| 261 | /* under construction !*/ |
| 262 | /* under construction !*/ |
| 263 | /* under construction !*/ |
| 264 | /* under construction !*/ |
| 265 | /* under construction !*/ |
| 266 | /* under construction !*/ |
| 267 | /* under construction !*/ |
| 268 | /* under construction !*/ |
| 269 | /* under construction !*/ |
| 270 | /* under construction !*/ |
| 271 | #endif |
| 272 | /* under construction !*/ |
| 273 | /* under construction !*/ |
| 274 | /* under construction !*/ |
| 275 | #endif |
| 276 | |
| 277 | typedef enum { |
| 278 | mode_default = 0, |
| 279 | mode_f32k_ck = 0x82, |
| 280 | mode_max_num |
| 281 | } gpio_clk_mode; |
| 282 | //remove this to see if there are build error .this should be delete. 12-22. |
| 283 | #if 0 |
| 284 | /* under construction !*/ |
| 285 | /* under construction !*/ |
| 286 | #if defined(DRV_GPIO_REG_AS_6255) |
| 287 | /* under construction !*/ |
| 288 | /* under construction !*/ |
| 289 | /* under construction !*/ |
| 290 | /* under construction !*/ |
| 291 | /* under construction !*/ |
| 292 | /* under construction !*/ |
| 293 | #elif defined(DRV_GPIO_REG_AS_6276) |
| 294 | /* under construction !*/ |
| 295 | /* under construction !*/ |
| 296 | /* under construction !*/ |
| 297 | /* under construction !*/ |
| 298 | /* under construction !*/ |
| 299 | /* under construction !*/ |
| 300 | /* under construction !*/ |
| 301 | /* under construction !*/ |
| 302 | /* under construction !*/ |
| 303 | /* under construction !*/ |
| 304 | /* under construction !*/ |
| 305 | /* under construction !*/ |
| 306 | /* under construction !*/ |
| 307 | /* under construction !*/ |
| 308 | /* under construction !*/ |
| 309 | #endif //defined(DRV_GPIO_REG_AS_6255) |
| 310 | /* under construction !*/ |
| 311 | /* under construction !*/ |
| 312 | #endif |
| 313 | |
| 314 | |
| 315 | |
| 316 | typedef enum { |
| 317 | div_max_num=16 |
| 318 | } gpio_clk_div; |
| 319 | typedef struct |
| 320 | { |
| 321 | kal_uint8 pin_num; /*1,activated ,0:de-activated*/ |
| 322 | kal_uint8 dir; // GPIO_DIR_OUTPUT or GPIO_DIR_INPUT or GPIO_DIR_BOTH |
| 323 | } GPIOCheckStruct; |
| 324 | |
| 325 | /******************************************************************************* |
| 326 | * DCL_OPTIONS for GPIO |
| 327 | *******************************************************************************/ |
| 328 | #define GPIO_OPTIONS |
| 329 | |
| 330 | /******************************************************************************* |
| 331 | * DCL_CONFIGURE_T |
| 332 | *******************************************************************************/ |
| 333 | |
| 334 | /******************************************************************************* |
| 335 | * DCL_EVENT for GPIO |
| 336 | *******************************************************************************/ |
| 337 | #define GPIO_EVENTS |
| 338 | |
| 339 | /******************************************************************************* |
| 340 | * DCL_CTRL_CMD for GPIO |
| 341 | *******************************************************************************/ |
| 342 | #ifdef __BUILD_DOM__ |
| 343 | /*The GPIO Command values in DCL_CTRL_CMD_T Enum of dcl.h*/ |
| 344 | /*DCL_CTRL_DATA_T Define the Control data structure for each module's command*/ |
| 345 | typedef enum |
| 346 | { |
| 347 | GPIO_CMD_READ, /*read data from GPIO Pin*/ |
| 348 | GPIO_CMD_WRITE_LOW, /*write low to GPIO pin*/ |
| 349 | GPIO_CMD_WRITE_HIGH, /*write high to GPIO Pin*/ |
| 350 | GPIO_CMD_SET_MODE_0, /*set GPIO mode as mode 0*/ |
| 351 | GPIO_CMD_SET_MODE_1, /*set GPIO mode as mode 1*/ |
| 352 | GPIO_CMD_SET_MODE_2, /*set GPIO mode as mode 2*/ |
| 353 | GPIO_CMD_SET_MODE_3, /*set GPIO mode as mode 3*/ |
| 354 | GPIO_CMD_SET_MODE_4, /*set GPIO mode as mode 4 ,only for chip support 4-bit mode*/ |
| 355 | GPIO_CMD_SET_MODE_5, /*set GPIO mode as mode 5*,only for chip support 4-bit mode*/ |
| 356 | GPIO_CMD_SET_MODE_6, /*set GPIO mode as mode 6*,only for chip support 4-bit mode*/ |
| 357 | GPIO_CMD_SET_MODE_7, /*set GPIO mode as mode 7*,only for chip support 4-bit mode*/ |
| 358 | GPIO_CMD_SET_MODE_8, /*set GPIO mode as mode 8*,only for chip support 4-bit mode*/ |
| 359 | GPIO_CMD_SET_DIR_OUT, /*set GPIO direction as output*/ |
| 360 | GPIO_CMD_SET_DIR_IN, /*set GPIO direction as input*/ |
| 361 | GPIO_CMD_RETURN_MODE, /*get current GPIO mode*/ |
| 362 | GPIO_CMD_RETURN_DIR, /*get current GPIO direction*/ |
| 363 | GPIO_CMD_RETURN_OUT, /*get current GPIO output level*/ |
| 364 | GPIO_CMD_ENABLE_PULL, /*enable GPIO pull-up/pull-down seting */ |
| 365 | GPIO_CMD_DISABLE_PULL, /*disable GPIO pull-up/pull-down seting*/ |
| 366 | GPIO_CMD_SET_PULL_HIGH, /*set GPIO as pull-up*/ |
| 367 | GPIO_CMD_SET_PULL_LOW, /*set GPIO as pull-down*/ |
| 368 | GPIO_CMD_SET_DINV, /*enable or disable GPIO data inversion*/ |
| 369 | GPIO_CMD_SET_DEBUG, /*configure the GPIO sets to auxiliary function mode or to debug mode*/ |
| 370 | GPIO_CMD_SET_CLK_OUT, /*select the clock output source of GPIO*/ |
| 371 | GPIO_CMD_SET_CLK_DIV, |
| 372 | GPIO_CMD_SET_OWNERSHIP_TO_MD, /* to set ownership of a GPIO port to Modem side.*/ |
| 373 | GPIO_CMD_SET_OWNERSHIP_TO_AP, /* to set ownership of a GPIO port to AP side.*/ |
| 374 | GPIO_CMD_SET_DRIVE, /* to set the drive of a GPIO port.*/ |
| 375 | GPIO_CMD_RETURN_DRIVE, /* to return the drive of the GPIO port.*/ |
| 376 | GPIO_CMD_RETURN_OWNERSHIP, /* to return the ownership of the GPIO port. */ |
| 377 | GPO_CMD_RETURN_MODE, /*get current GPO mode*/ |
| 378 | GPO_CMD_RETURN_OUT, /*get current GPO output level*/ |
| 379 | GPO_CMD_WRITE_HIGH, /*write high to GPO Pin*/ |
| 380 | GPO_CMD_WRITE_LOW, /*write low to GPO Pin*/ |
| 381 | GPO_CMD_MODE_SET_0, /*set GPIO mode as mode 0*/ |
| 382 | GPO_CMD_MODE_SET_1, /*set GPIO mode as mode 1*/ |
| 383 | GPO_CMD_MODE_SET_2, /*set GPIO mode as mode 2*/ |
| 384 | GPO_CMD_MODE_SET_3, /*set GPIO mode as mode 3*/ |
| 385 | GPIO_CMD_SET_DIR_OUT_NO_IRQ_MASK, /*set GPIO direction as output without mask IRQ portect*/ |
| 386 | GPIO_CMD_SET_DIR_IN_NO_IRQ_MASK, /*set GPIO direction as input without mask IRQ portect*/ |
| 387 | GPIO_CMD_WRITE_HIGH_NO_IRQ_MASK, /*write high to GPIO Pin without mask IRQ protect*/ |
| 388 | GPIO_CMD_WRITE_LOW_NO_IRQ_MASK, /*write low to GPIO Pin without mask IRQ protect*/ |
| 389 | GPIO_CMD_READ_NO_IRQ_MASK, /*read data from GPIO Pin without IRQ mask*/ |
| 390 | GPIO_CMD_WRITE_FOR_SPI, /*this function is to write data to one GPIO port, that for faster access without debug checking.*/ |
| 391 | GPIO_CMD_GET_AP_PIN, |
| 392 | }DCL_CTRL_CMD_T; |
| 393 | #else |
| 394 | #define GPIO_CMDS \ |
| 395 | GPIO_CMD_READ, \ |
| 396 | GPIO_CMD_WRITE_LOW, \ |
| 397 | GPIO_CMD_WRITE_HIGH, \ |
| 398 | GPIO_CMD_SET_MODE_0, \ |
| 399 | GPIO_CMD_SET_MODE_1, \ |
| 400 | GPIO_CMD_SET_MODE_2, \ |
| 401 | GPIO_CMD_SET_MODE_3, \ |
| 402 | GPIO_CMD_SET_MODE_4, \ |
| 403 | GPIO_CMD_SET_MODE_5, \ |
| 404 | GPIO_CMD_SET_MODE_6, \ |
| 405 | GPIO_CMD_SET_MODE_7, \ |
| 406 | GPIO_CMD_SET_MODE_8, \ |
| 407 | GPIO_CMD_SET_DIR_OUT,\ |
| 408 | GPIO_CMD_SET_DIR_IN, \ |
| 409 | GPIO_CMD_RETURN_MODE, \ |
| 410 | GPIO_CMD_RETURN_DIR, \ |
| 411 | GPIO_CMD_RETURN_OUT, \ |
| 412 | GPIO_CMD_ENABLE_PULL, \ |
| 413 | GPIO_CMD_DISABLE_PULL,\ |
| 414 | GPIO_CMD_SET_PULL_HIGH, \ |
| 415 | GPIO_CMD_SET_PULL_LOW, \ |
| 416 | GPIO_CMD_SET_DINV, \ |
| 417 | GPIO_CMD_SET_DEBUG, \ |
| 418 | GPIO_CMD_SET_CLK_OUT, \ |
| 419 | GPIO_CMD_SET_CLK_DIV, \ |
| 420 | GPIO_CMD_SET_OWNERSHIP_TO_MD, \ |
| 421 | GPIO_CMD_SET_OWNERSHIP_TO_AP, \ |
| 422 | GPIO_CMD_SET_DRIVE, \ |
| 423 | GPIO_CMD_RETURN_DRIVE, \ |
| 424 | GPIO_CMD_RETURN_OWNERSHIP, \ |
| 425 | GPO_CMD_RETURN_MODE, \ |
| 426 | GPO_CMD_RETURN_OUT, \ |
| 427 | GPO_CMD_WRITE_HIGH, \ |
| 428 | GPO_CMD_WRITE_LOW, \ |
| 429 | GPO_CMD_MODE_SET_0, \ |
| 430 | GPO_CMD_MODE_SET_1, \ |
| 431 | GPO_CMD_MODE_SET_2, \ |
| 432 | GPO_CMD_MODE_SET_3,\ |
| 433 | GPIO_CMD_SET_DIR_OUT_NO_IRQ_MASK, \ |
| 434 | GPIO_CMD_SET_DIR_IN_NO_IRQ_MASK, \ |
| 435 | GPIO_CMD_WRITE_HIGH_NO_IRQ_MASK, \ |
| 436 | GPIO_CMD_WRITE_LOW_NO_IRQ_MASK, \ |
| 437 | GPIO_CMD_READ_NO_IRQ_MASK, \ |
| 438 | GPIO_CMD_WRITE_FOR_SPI,\ |
| 439 | GPIO_CMD_GET_AP_PIN, |
| 440 | #endif /*__BUILD_DOM__*/ |
| 441 | #define GPIO_PULL_ENABLE 1 |
| 442 | #define GPIO_PULL_DISABLE 0 |
| 443 | #define GPIO_PULL_HIGH 1 |
| 444 | #define GPIO_PULL_LOW 0 |
| 445 | |
| 446 | /* FOR GPIO_CMD_READ control command. */ |
| 447 | typedef struct |
| 448 | { |
| 449 | #define GPIO_IO_HIGH 1 |
| 450 | #define GPIO_IO_LOW 0 |
| 451 | DCL_UINT8 u1IOData; // GPIO_IO_HIGH or GPIO_IO_LOW |
| 452 | } GPIO_CTRL_READ_T; |
| 453 | |
| 454 | /* FOR GPIO_CMD_RETURN_MODE control command. */ |
| 455 | typedef struct |
| 456 | { |
| 457 | #define GPIO_MODE_0 0 |
| 458 | #define GPIO_MODE_1 1 |
| 459 | #define GPIO_MODE_2 2 |
| 460 | #define GPIO_MODE_3 3 |
| 461 | #define GPIO_MODE_4 4 |
| 462 | #define GPIO_MODE_5 5 |
| 463 | #define GPIO_MODE_6 6 |
| 464 | #define GPIO_MODE_7 7 |
| 465 | #define GPIO_MODE_8 8 |
| 466 | DCL_UINT8 u1RetMode;//Output: to return GPIO_MODE0, GPIO_MODE1, GPIO_MODE2, or GPIO_MODE3 |
| 467 | } GPIO_CTRL_RETURN_MODE_T; |
| 468 | |
| 469 | /* FOR GPO_CMD_RETURN_MODE control command. */ |
| 470 | typedef struct |
| 471 | { |
| 472 | #define GPO_MODE_0 0 |
| 473 | #define GPO_MODE_1 1 |
| 474 | #define GPO_MODE_2 2 |
| 475 | #define GPO_MODE_3 3 |
| 476 | DCL_UINT8 u1RetMode;//Output: to return GPO_MODE0, GPO_MODE1, GPO_MODE2, or GPO_MODE3 |
| 477 | } GPO_CTRL_RETURN_MODE_T; |
| 478 | |
| 479 | /* FOR GPIO_CMD_RETURN_DIR control command. */ |
| 480 | typedef struct |
| 481 | { |
| 482 | #define GPIO_DIR_IN 0 |
| 483 | #define GPIO_DIR_OUT 1 |
| 484 | DCL_UINT8 u1RetDirData;//Output: to return GPIO_DIR_INPUT, or GPIO_DIR_OUTPUT |
| 485 | } GPIO_CTRL_RETURN_DIR_T; |
| 486 | |
| 487 | /* FOR GPIO_CMD_RETURN_OUT control command. */ |
| 488 | typedef struct |
| 489 | { |
| 490 | DCL_UINT8 u1RetOutData;//Output: to return GPIO_IO_HIGH or GPIO_IO_LOW |
| 491 | } GPIO_CTRL_RETURN_OUT_T; |
| 492 | |
| 493 | /* FOR GPIO_CMD_RETURN_AP control command. */ |
| 494 | typedef struct |
| 495 | { |
| 496 | DCL_UINT8 u1RetApData;// |
| 497 | } GPIO_CTRL_RETURN_AP_T; |
| 498 | |
| 499 | /* FOR GPO_CMD_RETURN_OUT control command. */ |
| 500 | typedef struct |
| 501 | { |
| 502 | #define GPO_IO_HIGH 1 |
| 503 | #define GPO_IO_LOW 0 |
| 504 | DCL_UINT8 u1RetOutData;//Output: to return GPO_IO_HIGH or GPO_IO_LOW |
| 505 | } GPO_CTRL_RETURN_OUT_T; |
| 506 | |
| 507 | /* FOR GPIO_CMD_SET_DINV control command. */ |
| 508 | typedef struct |
| 509 | { |
| 510 | DCL_BOOL fgSetDinv; //get more detail in spec. |
| 511 | } GPIO_CTRL_SET_DINV_T; |
| 512 | |
| 513 | /* FOR GPIO_CMD_SET_DEBUG control command. */ |
| 514 | typedef struct |
| 515 | { |
| 516 | DCL_BOOL fgSetDebug; |
| 517 | } GPIO_CTRL_SET_DEBUG_T; |
| 518 | |
| 519 | /* FOR GPIO_CMD_SET_CLK_OUT control command. */ |
| 520 | typedef struct |
| 521 | { |
| 522 | DCL_UINT16 u2ClkNum; //clock number in spec. |
| 523 | gpio_clk_mode u2Mode; |
| 524 | // DCL_UINT16 u2Mode; //the CLKOUT value in spec.(by chip) |
| 525 | } GPIO_CTRL_SET_CLK_OUT_T; |
| 526 | |
| 527 | |
| 528 | /* FOR GPIO_CMD_SET_CLK_DIV control command. */ |
| 529 | typedef struct |
| 530 | { |
| 531 | DCL_UINT16 u2ClkNum; //clock number in spec. |
| 532 | gpio_clk_div u2Div; |
| 533 | //DCL_UINT16 u2Div; //the CLKOUT value in spec.(by chip) |
| 534 | }GPIO_CTRL_SET_CLK_DIV_T; |
| 535 | |
| 536 | /* FOR GPIO_CTRL_WRITE_FOR_SPI_T control command. */ |
| 537 | typedef struct |
| 538 | { |
| 539 | DCL_UINT8 data; |
| 540 | DCL_UINT16 no; |
| 541 | DCL_UINT16 remainder_shift; |
| 542 | } GPIO_CTRL_WRITE_FOR_SPI_T; |
| 543 | |
| 544 | /* FOR GPIO_CMD_SET_DRIVE and GPIO_CMD_RETURN_DRIVE control command. */ |
| 545 | typedef struct |
| 546 | { |
| 547 | #define GPIO_DRIVE_MODE_0 0 // 4mA |
| 548 | #define GPIO_DRIVE_MODE_1 1 // 8mA |
| 549 | #define GPIO_DRIVE_MODE_2 2 // 12mA |
| 550 | #define GPIO_DRIVE_MODE_3 3 // 16mA |
| 551 | DCL_UINT8 u1DriveMode; //GPIO drive mode value in spec |
| 552 | }GPIO_CTRL_RETURN_DRIVE_T,GPIO_CTRL_SET_DRIVE_T; |
| 553 | |
| 554 | |
| 555 | /* FOR GPIO_CMD_RETURN_OWNERSHIP control command. */ |
| 556 | typedef struct |
| 557 | { |
| 558 | #define GPIO_MD_OWNERSHIP 0 |
| 559 | #define GPIO_AP_OWNERSHIP 1 |
| 560 | DCL_UINT8 u1OwnerShip; //GPIO ownership value in spec |
| 561 | }GPIO_CTRL_RETURN_OWNERSHIP_T; |
| 562 | |
| 563 | |
| 564 | #ifdef __BUILD_DOM__ |
| 565 | /*The GPIO command prarmeter data structure for each command. that's enum in in DCL_CTRL_DATA_T*/ |
| 566 | typedef struct |
| 567 | { |
| 568 | GPIO_CTRL_READ_T rRead; /*data structure for GPIO_CMD_READ control command */ |
| 569 | GPIO_CTRL_RETURN_MODE_T rReturnMode; /*data structure for GPIO_CMD_RETURN_MODE control command*/ |
| 570 | GPIO_CTRL_RETURN_DIR_T rReturnDir; /*data structure for GPIO_CMD_RETURN_DIR control command */ |
| 571 | GPIO_CTRL_RETURN_OUT_T rReturnOut; /*data structure for GPIO_CMD_RETURN_OUT control command */ |
| 572 | GPIO_CTRL_RETURN_AP_T rReturnAp; |
| 573 | GPIO_CTRL_SET_DINV_T rSetDinv; /*data structure for GPIO_CMD_SET_DINV control command */ |
| 574 | GPIO_CTRL_SET_DEBUG_T rSetDebug; /*data structure for GPIO_CMD_SET_DEBUG control command */ |
| 575 | GPIO_CTRL_SET_CLK_OUT_T rSetClkOut; /*data structure for GPIO_CMD_SET_CLK_OUT control command */ |
| 576 | GPIO_CTRL_SET_CLK_DIV_T rSetClkDiv; |
| 577 | GPIO_CTRL_WRITE_FOR_SPI_T rWriteSpi; /*data structure for GPIO_CTRL_WRITE_FOR_SPI control command */ |
| 578 | GPIO_CTRL_SET_DRIVE_T rSetDrive; /*data structure for GPIO_CMD_SET_DRIVE control command */ |
| 579 | GPIO_CTRL_RETURN_DRIVE_T rReturnDrive; /*data structure for GPIO_CMD_RETURN_DRIVE control command */ |
| 580 | GPIO_CTRL_RETURN_OWNERSHIP_T rReturnOwnership; /*data structure for GPIO_CMD_RETURN_OWNERSHIP control command */ |
| 581 | GPO_CTRL_RETURN_MODE_T oReturnMode; /*data structure for GPO_CMD_RETURN_OUT control command */ |
| 582 | GPO_CTRL_RETURN_OUT_T oReturnOut; /*data structure for GPO_CMD_RETURN_MODE control command */ |
| 583 | }DCL_CTRL_DATA_T; |
| 584 | #else |
| 585 | #define GPIO_CTRLS \ |
| 586 | GPIO_CTRL_READ_T rRead; \ |
| 587 | GPIO_CTRL_RETURN_MODE_T rReturnMode; \ |
| 588 | GPIO_CTRL_RETURN_DIR_T rReturnDir; \ |
| 589 | GPIO_CTRL_RETURN_OUT_T rReturnOut; \ |
| 590 | GPIO_CTRL_RETURN_AP_T rReturnAp; \ |
| 591 | GPIO_CTRL_SET_DINV_T rSetDinv; \ |
| 592 | GPIO_CTRL_SET_DEBUG_T rSetDebug; \ |
| 593 | GPIO_CTRL_SET_CLK_OUT_T rSetClkOut; \ |
| 594 | GPIO_CTRL_SET_CLK_DIV_T rSetClkDiv; \ |
| 595 | GPIO_CTRL_WRITE_FOR_SPI_T rWriteSpi; \ |
| 596 | GPIO_CTRL_SET_DRIVE_T rSetDrive; \ |
| 597 | GPIO_CTRL_RETURN_DRIVE_T rReturnDrive; \ |
| 598 | GPIO_CTRL_RETURN_OWNERSHIP_T rReturnOwnership; \ |
| 599 | GPO_CTRL_RETURN_MODE_T oReturnMode; \ |
| 600 | GPO_CTRL_RETURN_OUT_T oReturnOut; |
| 601 | #endif //__BUILD_DOM__ |
| 602 | #endif // #ifndef __DCL_GPIO_H_STRUCT__ |
| 603 | #endif // #ifdef DCL_DEFINITION_STRUCT |
| 604 | |
| 605 | #if defined(DCL_DEFINITION_PROTOTYPE) |
| 606 | #ifndef __DCL_GPIO_H_PROTOTYPE__ |
| 607 | #define __DCL_GPIO_H_PROTOTYPE__ |
| 608 | |
| 609 | // MoDIS parser skip start |
| 610 | |
| 611 | /************************************************************************* |
| 612 | * FUNCTION |
| 613 | * DclGPIO_Initialize |
| 614 | * |
| 615 | * DESCRIPTION |
| 616 | * This function is to initialize GPIO module. Note that all the GPIO pin |
| 617 | * will be set to a predefined state. |
| 618 | * |
| 619 | * PARAMETERS |
| 620 | * none |
| 621 | * |
| 622 | * RETURN VALUES |
| 623 | * none |
| 624 | * |
| 625 | *************************************************************************/ |
| 626 | extern DCL_STATUS DclGPIO_Initialize(void); |
| 627 | |
| 628 | /************************************************************************* |
| 629 | * FUNCTION |
| 630 | * DclGPIO_Open |
| 631 | * DESCRIPTION |
| 632 | * This function is to open the GPIO module and get a handle. Note that multiple opens are allowed. |
| 633 | * |
| 634 | * PARAMETERS |
| 635 | * eDev: - only valid for DCL_GPIO,DCL_GPO,DCL_GPIO_CLK. |
| 636 | * flags: - no sepcial flags is needed. Please use FLAGS_NONE |
| 637 | * |
| 638 | * RETURN VALUES |
| 639 | * DCL_HANDLE_INVALID: - Open failed. |
| 640 | * other value: - a valid handle |
| 641 | * |
| 642 | *************************************************************************/ |
| 643 | extern DCL_HANDLE DclGPIO_Open(DCL_DEV dev, DCL_FLAGS flags); |
| 644 | |
| 645 | /************************************************************************* |
| 646 | * FUNCTION |
| 647 | * DclGPIO_ReadData |
| 648 | * |
| 649 | * DESCRIPTION |
| 650 | * This function is not supported for the GPIO module now. |
| 651 | * |
| 652 | * PARAMETERS |
| 653 | * N/A |
| 654 | * |
| 655 | * RETURN VALUES |
| 656 | * STATUS_UNSUPPORTED: |
| 657 | * |
| 658 | *************************************************************************/ |
| 659 | extern DCL_STATUS DclGPIO_ReadData(DCL_HANDLE handle, DCL_BUFF *buff, DCL_BUFF_LEN *buf_len, DCL_OPTIONS options); |
| 660 | |
| 661 | /************************************************************************* |
| 662 | * FUNCTION |
| 663 | * DclGPIO_WriteData |
| 664 | * |
| 665 | * DESCRIPTION |
| 666 | * This function is not supported for the GPIO module now. |
| 667 | * |
| 668 | * PARAMETERS |
| 669 | * N/A |
| 670 | * |
| 671 | * RETURN VALUES |
| 672 | * STATUS_UNSUPPORTED: |
| 673 | * |
| 674 | *************************************************************************/ |
| 675 | extern DCL_STATUS DclGPIO_WriteData(DCL_HANDLE handle, DCL_BUFF *buff, DCL_BUFF_LEN *buf_len, DCL_OPTIONS options); |
| 676 | |
| 677 | /************************************************************************* |
| 678 | * FUNCTION |
| 679 | * DclGPIO_Configure |
| 680 | * |
| 681 | * DESCRIPTION |
| 682 | * This function is not supported for the GPIO module now. |
| 683 | * |
| 684 | * PARAMETERS |
| 685 | * N/A |
| 686 | * |
| 687 | * RETURN VALUES |
| 688 | * STATUS_UNSUPPORTED: |
| 689 | * |
| 690 | *************************************************************************/ |
| 691 | extern DCL_STATUS DclGPIO_Configure(DCL_HANDLE handle, DCL_CONFIGURE_T *configure); |
| 692 | |
| 693 | /************************************************************************* |
| 694 | * FUNCTION |
| 695 | * DclGPIO_RegisterCallback |
| 696 | * |
| 697 | * DESCRIPTION |
| 698 | * This function is not supported for the GPIO module now. |
| 699 | * |
| 700 | * PARAMETERS |
| 701 | * N/A |
| 702 | * |
| 703 | * RETURN VALUES |
| 704 | * STATUS_UNSUPPORTED: |
| 705 | * |
| 706 | *************************************************************************/ |
| 707 | extern DCL_STATUS DclGPIO_RegisterCallback(DCL_HANDLE handle, DCL_EVENT event, PFN_DCL_CALLBACK callback); |
| 708 | |
| 709 | /************************************************************************* |
| 710 | * FUNCTION |
| 711 | * DclGPIO_Control |
| 712 | * |
| 713 | * DESCRIPTION |
| 714 | * This function is to send command to control the GPIO module. |
| 715 | * |
| 716 | * PARAMETERS |
| 717 | * handle: - a valid handle return by DclGPIO_Open() |
| 718 | * cmd: - a control command for GPIO module |
| 719 | * 1. GPIO_CMD_READ: to read the input value from the GPIO port contain in handle. |
| 720 | * 2. GPIO_CMD_WRITE_LOW: to write low to the output of GPIO port contain in handle. |
| 721 | * 3. GPIO_CMD_WRITE_HIGH: to write high to the output of GPIO port contain in handle. |
| 722 | * 4. GPIO_CMD_SET_MODE_0: to set the mode of the GPIO port contain in handle as mode 0. |
| 723 | * 5. GPIO_CMD_SET_MODE_1: to set the mode of the GPIO port contain in handle as mode 1. |
| 724 | * 6. GPIO_CMD_SET_MODE_2: to set the mode of the GPIO port contain in handle as mode 2. |
| 725 | * 7. GPIO_CMD_SET_MODE_3: to set the mode of the GPIO port contain in handle as mode 3. |
| 726 | * 8. GPIO_CMD_SET_DIR_OUT: to set the direction of the GPIO port as output. |
| 727 | * 9. GPIO_CMD_SET_DIR_IN: to set the direction of the GPIO port as input. |
| 728 | * 10. GPIO_CMD_RETURN_MODE: to get the mode of the GPIO port |
| 729 | * 11. GPIO_CMD_RETURN_DIR: to get the direction of the GPIO port |
| 730 | * 12. GPIO_CMD_RETURN_OUT: to return the output value of the GPIO port |
| 731 | * 13. GPIO_CMD_ENABLE_PULL: to enable the pull resister for a GPIO port |
| 732 | * 14. GPIO_CMD_DISABLE_PULL: to disenable the pull resister for a GPIO port |
| 733 | * 15. GPIO_CMD_SET_PULL_HIGH: to select the pull up for a GPIO port |
| 734 | * 16. GPIO_CMD_SET_PULL_LOW: to select the pull down for a GPIO port |
| 735 | * 17. GPIO_CMD_SET_DINV: to set the inversion of a GPIO port |
| 736 | * 18. GPIO_CMD_SET_DEBUG: to enable or disable debug mode |
| 737 | * 19. GPIO_CMD_SET_CLK_OUT: to set the clock frequency for a clock output |
| 738 | * 20. GPIO_CMD_SET_OWNERSHIP_TO_MD: to set ownership of a GPIO port to Modem side. |
| 739 | * 21. GPIO_CMD_SET_OWNERSHIP_TO_AP: to set ownership of a GPIO port to AP side. |
| 740 | * 22. GPIO_CMD_SET_DRIVE: to set the drive of a GPIO port. |
| 741 | * 23. GPIO_CMD_RETURN_DRIVE: to return the drive of the GPIO port. |
| 742 | * 24. GPIO_CMD_RETURN_OWNERSHIP: to return the ownership of the GPIO port. |
| 743 | * 25. GPO_CMD_RETURN_MODE: to get the mode of the GPO port |
| 744 | * 26. GPO_CMD_RETURN_OUT: to return the output value of the GPO port |
| 745 | * 27. GPO_CMD_WRITE_HIGH: to write high to the output of GPO port contain in handle. |
| 746 | * 28. GPO_CMD_WRITE_LOW: to write low to the output of GPO port contain in handle. |
| 747 | * 29. GPO_CMD_MODE_SET_0: to set the mode of the GPIO port contain in handle as mode 0. |
| 748 | * 30. GPO_CMD_MODE_SET_1: to set the mode of the GPI1 port contain in handle as mode 1. |
| 749 | * 31. GPO_CMD_MODE_SET_2: to set the mode of the GPI2 port contain in handle as mode 2. |
| 750 | * 32. GPO_CMD_MODE_SET_3: to set the mode of the GPI3 port contain in handle as mode 3. |
| 751 | |
| 752 | * 33. GPIO_CMD_SET_DIR_OUT_NO_IRQ_MASK: to set the direction of the GPIO port as output without IRQ protect. |
| 753 | * 34. GPIO_CMD_SET_DIR_IN_NO_IRQ_MASK: to set the direction of the GPIO port as input without IRQ protect |
| 754 | * 35. GPIO_CMD_WRITE_HIGH_NO_IRQ_MASK: to write high to the output of GPIO port contain in handle without IRQ protect. |
| 755 | * 36. GPIO_CMD_WRITE_LOW_NO_IRQ_MASK: to write low to the output of GPIO port contain in handle without IRQ protect. |
| 756 | * 37. GPIO_CMD_READ_NO_IRQ_MASK: to read the input value from the GPIO port contain in handle without IRQ protect.. |
| 757 | |
| 758 | * 38. GPIO_CMD_WRITE_FOR_SPI_T: |
| 759 | * data: - data for GPIO control command. |
| 760 | * 1. GPIO_CMD_READ: pointer to a GPIO_CTRLS structure |
| 761 | * 2. GPIO_CMD_WRITE_LOW: NULL. |
| 762 | * 3. GPIO_CMD_WRITE_HIGH: NULL. |
| 763 | * 4. GPIO_CMD_SET_MODE_0: NULL. |
| 764 | * 5. GPIO_CMD_SET_MODE_1: NULL. |
| 765 | * 6. GPIO_CMD_SET_MODE_2: NULL. |
| 766 | * 7. GPIO_CMD_SET_MODE_3: NULL. |
| 767 | * 8. GPIO_CMD_SET_DIR_OUT: NULL. |
| 768 | * 9. GPIO_CMD_SET_DIR_IN: NULL. |
| 769 | * 10. GPIO_CMD_RETURN_MODE: pointer to a GPIO_CTRL_RETURN_MODE_T structure |
| 770 | * 11. GPIO_CMD_RETURN_DIR: pointer to a GPIO_CTRL_SET_DIR_T structure |
| 771 | * 12. GPIO_CMD_RETURN_OUT: pointer to a GPIO_CTRL_RETURN_OUT_T structure |
| 772 | * 13. GPIO_CMD_ENABLE_PULL: NULL. |
| 773 | * 14. GPIO_CMD_DISABLE_PULL: NULL. |
| 774 | * 15. GPIO_CMD_SET_PULL_HIGH: NULL. |
| 775 | * 16. GPIO_CMD_SET_PULL_LOW: NULL. |
| 776 | * 17. GPIO_CMD_SET_DINV: pointer to a GPIO_CTRL_SET_DINV_T structure |
| 777 | * 18. GPIO_CMD_SET_DEBUG: pointer to a GPIO_CTRL_SET_DEBUG_T structure |
| 778 | * 19. GPIO_CMD_SET_CLK_OUT: pointer to a GPIO_CTRL_SET_CLK_OUT_T structure |
| 779 | * 20. GPIO_CMD_SET_OWNERSHIP_TO_MD: NULL. |
| 780 | * 21. GPIO_CMD_SET_OWNERSHIP_TO_AP: NULL. |
| 781 | * 22. GPIO_CMD_SET_DRIVE: pointer to a GPIO_CTRL_SET_DRIVE_T structure |
| 782 | * 23. GPIO_CMD_RETURN_DRIVE: pointer to a GPIO_CTRL_RETURN_DRIVE_T structure |
| 783 | * 24. GPIO_CMD_RETURN_OWNERSHIP: pointer to a GPIO_CTRL_RETURN_OWNERSHIP_T structure |
| 784 | * |
| 785 | * 25. GPO_CMD_RETURN_MODE: pointer to a GPO_CTRL_RETURN_MODE_T structure |
| 786 | * 26. GPO_CMD_RETURN_OUT: pointer to a GPO_CTRL_RETURN_OUT_T structure |
| 787 | * 27. GPO_CMD_WRITE_HIGH: NULL. |
| 788 | * 28. GPO_CMD_WRITE_LOW: NULL. |
| 789 | * 29. GPO_CMD_MODE_SET_0: NULL.. |
| 790 | * 30. GPO_CMD_MODE_SET_1: NULL.. |
| 791 | * 31. GPO_CMD_MODE_SET_2: NULL. |
| 792 | * 32. GPO_CMD_MODE_SET_3: NULL. |
| 793 | |
| 794 | * 33. GPIO_CMD_SET_DIR_OUT_NO_IRQ_MASK: NULL. |
| 795 | * 34. GPIO_CMD_SET_DIR_IN_NO_IRQ_MASK: NULL. |
| 796 | * 35. GPIO_CMD_WRITE_HIGH_NO_IRQ_MASK: NULL. |
| 797 | * 36. GPIO_CMD_WRITE_LOW_NO_IRQ_MASK: NULL. |
| 798 | * 37. GPIO_CMD_READ_NO_IRQ_MASK: pointer to a GPIO_CTRLS structure |
| 799 | |
| 800 | * 38. GPIO_CMD_WRITE_FOR_SPI_T: pointer to GPIO_CTRL_WRITE_FOR_SPI_T |
| 801 | * RETURN VALUES |
| 802 | * STATUS_OK: - command is executed successfully. |
| 803 | * STATUS_FAIL: - command is failed. |
| 804 | * STATUS_INVALID_CMD: - The command is invalid. |
| 805 | * STATUS_INVALID_DCL_HANDLE: - The handle is invalid. |
| 806 | * STATUS_INVALID_CTRL_DATA: - The ctrl data is not valid. |
| 807 | *************************************************************************/ |
| 808 | extern DCL_STATUS DclGPIO_Control(DCL_HANDLE handle, DCL_CTRL_CMD cmd, DCL_CTRL_DATA_T *data); |
| 809 | |
| 810 | /************************************************************************* |
| 811 | * FUNCTION |
| 812 | * DclGPIO_Close |
| 813 | * |
| 814 | * DESCRIPTION |
| 815 | * This function is not supported for the GPIO module now. |
| 816 | * |
| 817 | * PARAMETERS |
| 818 | * handle: the handle that return by DclGPIO_Open. |
| 819 | * |
| 820 | * RETURN VALUES: |
| 821 | * STATUS_UNSUPPORTED: |
| 822 | * |
| 823 | *************************************************************************/ |
| 824 | extern DCL_STATUS DclGPIO_Close(DCL_HANDLE handle); |
| 825 | |
| 826 | // MoDIS parser skip end |
| 827 | |
| 828 | #endif // #ifndef __DCL_GPIO_H_PROTOTYPE__ |
| 829 | #endif // #ifdef DCL_DEFINITION_PROTOTYPE |
| 830 | |
| 831 | |