| yu.dong | c33b307 | 2024-08-21 23:14:49 -0700 | [diff] [blame^] | 1 | /***************************************************************************** |
| 2 | * Copyright Statement: |
| 3 | * -------------------- |
| 4 | * This software is protected by Copyright and the information contained |
| 5 | * herein is confidential. The software may not be copied and the information |
| 6 | * contained herein may not be used or disclosed except with the written |
| 7 | * permission of MediaTek Inc. (C) 2001 |
| 8 | * |
| 9 | *****************************************************************************/ |
| 10 | |
| 11 | /***************************************************************************** |
| 12 | * |
| 13 | * Filename: |
| 14 | * --------- |
| 15 | * dcl_pmu.h |
| 16 | * |
| 17 | * Project: |
| 18 | * -------- |
| 19 | * Maui |
| 20 | * |
| 21 | * Description: |
| 22 | * ------------ |
| 23 | * Header file of DCL (Driver Common Layer) for PMU. |
| 24 | * |
| 25 | * Author: |
| 26 | * ------- |
| 27 | * ------- |
| 28 | * |
| 29 | *============================================================================ |
| 30 | * HISTORY |
| 31 | * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!! |
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| 413 | *------------------------------------------------------------------------------ |
| 414 | * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!! |
| 415 | *============================================================================ |
| 416 | ****************************************************************************/ |
| 417 | |
| 418 | #ifdef DCL_DEFINITION_STRUCT |
| 419 | #ifndef __DCL_PMU_H_STRUCT__ |
| 420 | #define __DCL_PMU_H_STRUCT__ |
| 421 | |
| 422 | |
| 423 | /******************************************************************************* |
| 424 | * DCL_OPTIONS for PMU |
| 425 | *******************************************************************************/ |
| 426 | #define PMU_OPTIONS |
| 427 | |
| 428 | /******************************************************************************* |
| 429 | * DCL_CONFIGURE_T for PMU |
| 430 | *******************************************************************************/ |
| 431 | |
| 432 | #define PMU_CONFIGS |
| 433 | |
| 434 | /******************************************************************************* |
| 435 | * DCL_EVENT for PMU |
| 436 | *******************************************************************************/ |
| 437 | #define PMU_EVENTS |
| 438 | |
| 439 | /* Enum of LDO/BUCK List */ |
| 440 | typedef enum |
| 441 | { |
| 442 | VA12, |
| 443 | VRTC, |
| 444 | VMIC, |
| 445 | VAUDN, |
| 446 | VAUDP, |
| 447 | VRF28, |
| 448 | VRF=VRF28, |
| 449 | VRF28_1=VRF28, |
| 450 | VRF28_2, |
| 451 | VTCXO, |
| 452 | VTCXO_1=VTCXO, |
| 453 | VTCXO_2, |
| 454 | VA25, |
| 455 | VCAMA, |
| 456 | VCAMD, |
| 457 | VCAM_IO, |
| 458 | VCAM_AF, |
| 459 | VIO28, |
| 460 | VUSB, |
| 461 | VBT, |
| 462 | VSIM, |
| 463 | VSIM1 = VSIM, |
| 464 | VSIM2, |
| 465 | VIBR, |
| 466 | VMC, |
| 467 | VMC1, |
| 468 | VMCH, |
| 469 | VCAMA2, |
| 470 | VCAMD2, |
| 471 | VFM, |
| 472 | VM12, |
| 473 | VM12_1, |
| 474 | VM12_2, |
| 475 | VM12_INT, |
| 476 | VCORE, |
| 477 | VCORE2, |
| 478 | VIO18, |
| 479 | VPA_SW, |
| 480 | VPROC, |
| 481 | VRF18, |
| 482 | VRF12, |
| 483 | VRF18_1, |
| 484 | VRF18_2, |
| 485 | VRF1, |
| 486 | VRF2, |
| 487 | VA28, |
| 488 | VM, |
| 489 | VSF, |
| 490 | VWIFI2V8, |
| 491 | VWIFI3V3, |
| 492 | V3GTX, |
| 493 | V3GRX, |
| 494 | VGP, |
| 495 | VGP2, |
| 496 | VSDIO, |
| 497 | VDIG, |
| 498 | VBUS, |
| 499 | VA1, |
| 500 | VA2, |
| 501 | VMIPI, |
| 502 | VBACKUP, |
| 503 | VMODEM, |
| 504 | VSRAM_MD, |
| 505 | VMD1, |
| 506 | VTCXO24, |
| 507 | VTCXO28, |
| 508 | VXO22, |
| 509 | VFE28, |
| 510 | VS1, |
| 511 | VS2, |
| 512 | VPA2, |
| 513 | VSRAM_OTHERS, |
| 514 | VRF18_VOCAL, |
| 515 | VRF12_VOCAL, |
| 516 | VRF18_VOTRIM, |
| 517 | VRF12_VOTRIM, |
| 518 | VPA_OC_SDN_STATUS, |
| 519 | VPA_OC_SDN_EN, |
| 520 | VSRAM_GPU, |
| 521 | VGPU, |
| 522 | VGPU11, |
| 523 | VGPU12, |
| 524 | VPROC1, |
| 525 | VPROC2, |
| 526 | VPU, |
| 527 | VSRAM_PROC1, |
| 528 | VSRAM_PROC2, |
| 529 | PMU_LDO_BUCK_MAX, |
| 530 | VIO18_VOCAL, |
| 531 | VIO18_VOTRIM, |
| 532 | }PMU_LDO_BUCK_LIST_ENUM; |
| 533 | |
| 534 | /* Enum of VPA List */ |
| 535 | typedef enum |
| 536 | { |
| 537 | VPA, |
| 538 | VPA1=VPA, |
| 539 | PMU_VPA_MAX |
| 540 | }PMU_VPA_LIST_ENUM; |
| 541 | |
| 542 | /* Enum of VRF18 List */ |
| 543 | typedef enum |
| 544 | { |
| 545 | PMIC_VRF18, |
| 546 | PMIC_VRF18_1 = PMIC_VRF18, |
| 547 | PMIC_VRF18_2, |
| 548 | PMIC_VRF18_MAX |
| 549 | }PMIC_VRF18_LIST_ENUM; |
| 550 | |
| 551 | /* Enum of VSIM List */ |
| 552 | typedef enum |
| 553 | { |
| 554 | PMIC_VSIM, |
| 555 | PMIC_VSIM1 = PMIC_VSIM, |
| 556 | PMIC_VSIM2, |
| 557 | PMIC_VSIM_MAX |
| 558 | }PMIC_VSIM_LIST_ENUM; |
| 559 | |
| 560 | /* Enum of KPLED List */ |
| 561 | typedef enum |
| 562 | { |
| 563 | KPLED, |
| 564 | PMU_KPLED_MAX |
| 565 | }PMU_KPLED_LIST_ENUM; |
| 566 | |
| 567 | /* Enum of CHR List */ |
| 568 | typedef enum |
| 569 | { |
| 570 | CHR, |
| 571 | PMU_CHR_MAX |
| 572 | }PMU_CHR_LIST_ENUM; |
| 573 | |
| 574 | /* Enum of STARTUP List */ |
| 575 | typedef enum |
| 576 | { |
| 577 | STRUP, |
| 578 | PMU_STRUP_MAX |
| 579 | }PMU_STRUP_LIST_ENUM; |
| 580 | |
| 581 | /* Enum of ISINK List */ |
| 582 | typedef enum |
| 583 | { |
| 584 | ISINK0, |
| 585 | ISINK1, |
| 586 | ISINK2, |
| 587 | ISINK3, |
| 588 | ISINK4, |
| 589 | ISINK5, |
| 590 | PMU_ISINK_MAX |
| 591 | }PMU_ISINK_LIST_ENUM; |
| 592 | |
| 593 | /* Enum of BOOST List */ |
| 594 | typedef enum |
| 595 | { |
| 596 | BOOST, |
| 597 | BOOST1=BOOST, |
| 598 | BOOST2, |
| 599 | PMU_BOOST_MAX |
| 600 | }PMU_BOOST_LIST_ENUM; |
| 601 | |
| 602 | /* Enum of SPK List */ |
| 603 | typedef enum |
| 604 | { |
| 605 | SPK, |
| 606 | PMU_SPK_MAX |
| 607 | }PMU_SPK_LIST_ENUM; |
| 608 | |
| 609 | /* Enum of LPOSC List */ |
| 610 | typedef enum |
| 611 | { |
| 612 | LPOSC, |
| 613 | PMU_LPOSC_MAX |
| 614 | }PMU_LPOSC_LIST_ENUM; |
| 615 | |
| 616 | /* Enum of Voltage List */ |
| 617 | typedef enum |
| 618 | { |
| 619 | PMU_VOLT_00_000000_V = 0, |
| 620 | PMU_VOLT_00_100000_V = 100000, |
| 621 | PMU_VOLT_00_200000_V = 200000, |
| 622 | PMU_VOLT_00_300000_V = 300000, |
| 623 | PMU_VOLT_00_400000_V = 400000, |
| 624 | PMU_VOLT_00_450000_V = 450000, |
| 625 | PMU_VOLT_00_500000_V = 500000, |
| 626 | PMU_VOLT_00_525000_V = 525000, |
| 627 | PMU_VOLT_00_550000_V = 550000, |
| 628 | PMU_VOLT_00_568000_V = 568000, |
| 629 | PMU_VOLT_00_600000_V = 600000, |
| 630 | PMU_VOLT_00_650000_V = 650000, |
| 631 | PMU_VOLT_00_700000_V = 700000, |
| 632 | PMU_VOLT_00_725000_V = 725000, |
| 633 | PMU_VOLT_00_750000_V = 750000, |
| 634 | PMU_VOLT_00_775000_V = 775000, |
| 635 | PMU_VOLT_00_800000_V = 800000, |
| 636 | PMU_VOLT_00_825000_V = 825000, |
| 637 | PMU_VOLT_00_850000_V = 850000, |
| 638 | PMU_VOLT_00_875000_V = 875000, |
| 639 | PMU_VOLT_00_900000_V = 900000, |
| 640 | PMU_VOLT_00_925000_V = 925000, |
| 641 | PMU_VOLT_00_950000_V = 950000, |
| 642 | PMU_VOLT_00_975000_V = 975000, |
| 643 | PMU_VOLT_01_000000_V = 1000000, |
| 644 | PMU_VOLT_01_025000_V = 1025000, |
| 645 | PMU_VOLT_01_050000_V = 1050000, |
| 646 | PMU_VOLT_01_060000_V = 1060000, |
| 647 | PMU_VOLT_01_075000_V = 1075000, |
| 648 | PMU_VOLT_01_100000_V = 1100000, |
| 649 | PMU_VOLT_01_125000_V = 1125000, |
| 650 | PMU_VOLT_01_150000_V = 1150000, |
| 651 | PMU_VOLT_01_175000_V = 1175000, |
| 652 | PMU_VOLT_01_200000_V = 1200000, |
| 653 | PMU_VOLT_01_225000_V = 1225000, |
| 654 | PMU_VOLT_01_250000_V = 1250000, |
| 655 | PMU_VOLT_01_275000_V = 1275000, |
| 656 | PMU_VOLT_01_300000_V = 1300000, |
| 657 | PMU_VOLT_01_325000_V = 1325000, |
| 658 | PMU_VOLT_01_350000_V = 1350000, |
| 659 | PMU_VOLT_01_375000_V = 1375000, |
| 660 | PMU_VOLT_01_400000_V = 1400000, |
| 661 | PMU_VOLT_01_425000_V = 1425000, |
| 662 | PMU_VOLT_01_450000_V = 1450000, |
| 663 | PMU_VOLT_01_475000_V = 1475000, |
| 664 | PMU_VOLT_01_500000_V = 1500000, |
| 665 | PMU_VOLT_01_520000_V = 1520000, |
| 666 | PMU_VOLT_01_525000_V = 1525000, |
| 667 | PMU_VOLT_01_540000_V = 1540000, |
| 668 | PMU_VOLT_01_550000_V = 1550000, |
| 669 | PMU_VOLT_01_560000_V = 1560000, |
| 670 | PMU_VOLT_01_575000_V = 1575000, |
| 671 | PMU_VOLT_01_580000_V = 1580000, |
| 672 | PMU_VOLT_01_600000_V = 1600000, |
| 673 | PMU_VOLT_01_620000_V = 1620000, |
| 674 | PMU_VOLT_01_625000_V = 1625000, |
| 675 | PMU_VOLT_01_640000_V = 1640000, |
| 676 | PMU_VOLT_01_650000_V = 1650000, |
| 677 | PMU_VOLT_01_660000_V = 1660000, |
| 678 | PMU_VOLT_01_675000_V = 1675000, |
| 679 | PMU_VOLT_01_680000_V = 1680000, |
| 680 | PMU_VOLT_01_700000_V = 1700000, |
| 681 | PMU_VOLT_01_720000_V = 1720000, |
| 682 | PMU_VOLT_01_725000_V = 1725000, |
| 683 | PMU_VOLT_01_740000_V = 1740000, |
| 684 | PMU_VOLT_01_750000_V = 1750000, |
| 685 | PMU_VOLT_01_760000_V = 1760000, |
| 686 | PMU_VOLT_01_775000_V = 1775000, |
| 687 | PMU_VOLT_01_780000_V = 1780000, |
| 688 | PMU_VOLT_01_800000_V = 1800000, |
| 689 | PMU_VOLT_01_820000_V = 1820000, |
| 690 | PMU_VOLT_01_825000_V = 1825000, |
| 691 | PMU_VOLT_01_840000_V = 1840000, |
| 692 | PMU_VOLT_01_850000_V = 1850000, |
| 693 | PMU_VOLT_01_860000_V = 1860000, |
| 694 | PMU_VOLT_01_875000_V = 1875000, |
| 695 | PMU_VOLT_01_880000_V = 1880000, |
| 696 | PMU_VOLT_01_900000_V = 1900000, |
| 697 | PMU_VOLT_01_920000_V = 1920000, |
| 698 | PMU_VOLT_01_925000_V = 1925000, |
| 699 | PMU_VOLT_01_940000_V = 1940000, |
| 700 | PMU_VOLT_01_950000_V = 1950000, |
| 701 | PMU_VOLT_01_960000_V = 1960000, |
| 702 | PMU_VOLT_01_975000_V = 1975000, |
| 703 | PMU_VOLT_01_980000_V = 1980000, |
| 704 | PMU_VOLT_02_000000_V = 2000000, |
| 705 | PMU_VOLT_02_020000_V = 2020000, |
| 706 | PMU_VOLT_02_025000_V = 2025000, |
| 707 | PMU_VOLT_02_040000_V = 2040000, |
| 708 | PMU_VOLT_02_050000_V = 2050000, |
| 709 | PMU_VOLT_02_060000_V = 2060000, |
| 710 | PMU_VOLT_02_075000_V = 2075000, |
| 711 | PMU_VOLT_02_080000_V = 2080000, |
| 712 | PMU_VOLT_02_100000_V = 2100000, |
| 713 | PMU_VOLT_02_120000_V = 2120000, |
| 714 | PMU_VOLT_02_125000_V = 2125000, |
| 715 | PMU_VOLT_02_140000_V = 2140000, |
| 716 | PMU_VOLT_02_150000_V = 2150000, |
| 717 | PMU_VOLT_02_175000_V = 2175000, |
| 718 | PMU_VOLT_02_200000_V = 2200000, |
| 719 | PMU_VOLT_02_225000_V = 2225000, |
| 720 | PMU_VOLT_02_250000_V = 2250000, |
| 721 | PMU_VOLT_02_275000_V = 2275000, |
| 722 | PMU_VOLT_02_300000_V = 2300000, |
| 723 | PMU_VOLT_02_375000_V = 2375000, |
| 724 | PMU_VOLT_02_350000_V = 2350000, |
| 725 | PMU_VOLT_02_425000_V = 2425000, |
| 726 | PMU_VOLT_02_400000_V = 2400000, |
| 727 | PMU_VOLT_02_450000_V = 2450000, |
| 728 | PMU_VOLT_02_500000_V = 2500000, |
| 729 | PMU_VOLT_02_550000_V = 2550000, |
| 730 | PMU_VOLT_02_575000_V = 2575000, |
| 731 | PMU_VOLT_02_600000_V = 2600000, |
| 732 | PMU_VOLT_02_650000_V = 2650000, |
| 733 | PMU_VOLT_02_700000_V = 2700000, |
| 734 | PMU_VOLT_02_725000_V = 2725000, |
| 735 | PMU_VOLT_02_750000_V = 2750000, |
| 736 | PMU_VOLT_02_760000_V = 2760000, |
| 737 | PMU_VOLT_02_800000_V = 2800000, |
| 738 | PMU_VOLT_02_850000_V = 2850000, |
| 739 | PMU_VOLT_02_875000_V = 2875000, |
| 740 | PMU_VOLT_02_900000_V = 2900000, |
| 741 | PMU_VOLT_02_950000_V = 2950000, |
| 742 | PMU_VOLT_03_000000_V = 3000000, |
| 743 | PMU_VOLT_03_025000_V = 3025000, |
| 744 | PMU_VOLT_03_050000_V = 3050000, |
| 745 | PMU_VOLT_03_100000_V = 3100000, |
| 746 | PMU_VOLT_03_150000_V = 3150000, |
| 747 | PMU_VOLT_03_175000_V = 3175000, |
| 748 | PMU_VOLT_03_200000_V = 3200000, |
| 749 | PMU_VOLT_03_250000_V = 3250000, |
| 750 | PMU_VOLT_03_275000_V = 3275000, |
| 751 | PMU_VOLT_03_300000_V = 3300000, |
| 752 | PMU_VOLT_03_325000_V = 3325000, |
| 753 | PMU_VOLT_03_350000_V = 3350000, |
| 754 | PMU_VOLT_03_400000_V = 3400000, |
| 755 | PMU_VOLT_03_450000_V = 3450000, |
| 756 | PMU_VOLT_03_500000_V = 3500000, |
| 757 | PMU_VOLT_03_550000_V = 3550000, |
| 758 | PMU_VOLT_03_600000_V = 3600000, |
| 759 | PMU_VOLT_03_650000_V = 3650000, |
| 760 | PMU_VOLT_03_800000_V = 3800000, |
| 761 | PMU_VOLT_03_950000_V = 3950000, |
| 762 | PMU_VOLT_04_000000_V = 4000000, |
| 763 | PMU_VOLT_04_012500_V = 4012500, |
| 764 | PMU_VOLT_04_025000_V = 4025000, |
| 765 | PMU_VOLT_04_037500_V = 4037500, |
| 766 | PMU_VOLT_04_050000_V = 4050000, |
| 767 | PMU_VOLT_04_062500_V = 4062500, |
| 768 | PMU_VOLT_04_067500_V = 4067500, |
| 769 | PMU_VOLT_04_075000_V = 4075000, |
| 770 | PMU_VOLT_04_087500_V = 4087500, |
| 771 | PMU_VOLT_04_100000_V = 4100000, |
| 772 | PMU_VOLT_04_112500_V = 4112500, |
| 773 | PMU_VOLT_04_115000_V = 4115000, |
| 774 | PMU_VOLT_04_116000_V = 4116000, |
| 775 | PMU_VOLT_04_125000_V = 4125000, |
| 776 | PMU_VOLT_04_137500_V = 4137500, |
| 777 | PMU_VOLT_04_150000_V = 4150000, |
| 778 | PMU_VOLT_04_162500_V = 4162500, |
| 779 | PMU_VOLT_04_175000_V = 4175000, |
| 780 | PMU_VOLT_04_187500_V = 4187500, |
| 781 | PMU_VOLT_04_200000_V = 4200000, |
| 782 | PMU_VOLT_04_212500_V = 4212500, |
| 783 | PMU_VOLT_04_225000_V = 4225000, |
| 784 | PMU_VOLT_04_237500_V = 4237500, |
| 785 | PMU_VOLT_04_250000_V = 4250000, |
| 786 | PMU_VOLT_04_262500_V = 4262500, |
| 787 | PMU_VOLT_04_275000_V = 4275000, |
| 788 | PMU_VOLT_04_287500_V = 4287500, |
| 789 | PMU_VOLT_04_300000_V = 4300000, |
| 790 | PMU_VOLT_04_325000_V = 4325000, |
| 791 | PMU_VOLT_04_350000_V = 4350000, |
| 792 | PMU_VOLT_04_375000_V = 4375000, |
| 793 | PMU_VOLT_04_400000_V = 4400000, |
| 794 | PMU_VOLT_04_411500_V = 4411500, |
| 795 | PMU_VOLT_04_450000_V = 4450000, |
| 796 | PMU_VOLT_04_500000_V = 4500000, |
| 797 | PMU_VOLT_04_550000_V = 4550000, |
| 798 | PMU_VOLT_04_600000_V = 4600000, |
| 799 | PMU_VOLT_04_700000_V = 4700000, |
| 800 | PMU_VOLT_04_800000_V = 4800000, |
| 801 | PMU_VOLT_04_850000_V = 4850000, |
| 802 | PMU_VOLT_04_950000_V = 4950000, |
| 803 | PMU_VOLT_05_000000_V = 5000000, |
| 804 | PMU_VOLT_05_150000_V = 5150000, |
| 805 | PMU_VOLT_05_250000_V = 5250000, |
| 806 | PMU_VOLT_05_300000_V = 5300000, |
| 807 | PMU_VOLT_05_450000_V = 5450000, |
| 808 | PMU_VOLT_06_000000_V = 6000000, |
| 809 | PMU_VOLT_06_500000_V = 6500000, |
| 810 | PMU_VOLT_06_750000_V = 6750000, |
| 811 | PMU_VOLT_07_000000_V = 7000000, |
| 812 | PMU_VOLT_07_250000_V = 7250000, |
| 813 | PMU_VOLT_07_500000_V = 7500000, |
| 814 | PMU_VOLT_08_000000_V = 8000000, |
| 815 | PMU_VOLT_08_500000_V = 8500000, |
| 816 | PMU_VOLT_09_500000_V = 9500000, |
| 817 | PMU_VOLT_10_000000_V = 10000000, |
| 818 | PMU_VOLT_10_500000_V = 10500000, |
| 819 | PMU_VOLT_MAX, |
| 820 | PMU_VOLT_INVALID |
| 821 | |
| 822 | }PMU_VOLTAGE_ENUM; |
| 823 | |
| 824 | typedef enum |
| 825 | { |
| 826 | PMU_VOLT_CAL_MINUS_00_140000_V = -140000, |
| 827 | PMU_VOLT_CAL_MINUS_00_120000_V = -120000, |
| 828 | PMU_VOLT_CAL_MINUS_00_100000_V = -100000, |
| 829 | PMU_VOLT_CAL_MINUS_00_080000_V = -80000, |
| 830 | PMU_VOLT_CAL_MINUS_00_060000_V = -60000, |
| 831 | PMU_VOLT_CAL_MINUS_00_040000_V = -40000, |
| 832 | PMU_VOLT_CAL_MINUS_00_020000_V = -20000, |
| 833 | PMU_VOLT_CAL_00_000000_V = 0, |
| 834 | PMU_VOLT_CAL_00_020000_V = 20000, |
| 835 | PMU_VOLT_CAL_00_040000_V = 40000, |
| 836 | PMU_VOLT_CAL_00_060000_V = 60000, |
| 837 | PMU_VOLT_CAL_00_080000_V = 80000, |
| 838 | PMU_VOLT_CAL_00_100000_V = 100000, |
| 839 | PMU_VOLT_CAL_00_120000_V = 120000, |
| 840 | PMU_VOLT_CAL_00_140000_V = 140000, |
| 841 | PMU_VOLT_CAL_00_160000_V = 160000, |
| 842 | PMU_VOLT_CAL_MAX, |
| 843 | PMU_VOLT_CAL_INVALID |
| 844 | } PMU_VOLTAGE_CALIBRATION_ENUM; |
| 845 | |
| 846 | /* Enum of SPK db List */ |
| 847 | typedef enum |
| 848 | { |
| 849 | PMIC_SPK_VOL_00_00_dB = 0, |
| 850 | PMIC_SPK_VOL_00_50_dB = 50, |
| 851 | PMIC_SPK_VOL_01_00_dB = 100, |
| 852 | PMIC_SPK_VOL_01_50_dB = 150, |
| 853 | PMIC_SPK_VOL_02_00_dB = 200, |
| 854 | PMIC_SPK_VOL_02_50_dB = 250, |
| 855 | PMIC_SPK_VOL_03_00_dB = 300, |
| 856 | PMIC_SPK_VOL_03_50_dB = 350, |
| 857 | PMIC_SPK_VOL_04_00_dB = 400, |
| 858 | PMIC_SPK_VOL_04_50_dB = 450, |
| 859 | PMIC_SPK_VOL_05_00_dB = 500, |
| 860 | PMIC_SPK_VOL_05_50_dB = 550, |
| 861 | PMIC_SPK_VOL_06_00_dB = 600, |
| 862 | PMIC_SPK_VOL_06_50_dB = 650, |
| 863 | PMIC_SPK_VOL_07_00_dB = 700, |
| 864 | PMIC_SPK_VOL_07_50_dB = 750, |
| 865 | PMIC_SPK_VOL_08_00_dB = 800, |
| 866 | PMIC_SPK_VOL_08_50_dB = 850, |
| 867 | PMIC_SPK_VOL_09_00_dB = 900, |
| 868 | PMIC_SPK_VOL_09_50_dB = 950, |
| 869 | PMIC_SPK_VOL_10_00_dB = 1000, |
| 870 | PMIC_SPK_VOL_10_50_dB = 1050, |
| 871 | PMIC_SPK_VOL_11_00_dB = 1100, |
| 872 | PMIC_SPK_VOL_11_50_dB = 1150, |
| 873 | PMIC_SPK_VOL_12_00_dB = 1200, |
| 874 | PMIC_SPK_VOL_12_50_dB = 1250, |
| 875 | PMIC_SPK_VOL_13_00_dB = 1300, |
| 876 | PMIC_SPK_VOL_13_50_dB = 1350, |
| 877 | PMIC_SPK_VOL_14_00_dB = 1400, |
| 878 | PMIC_SPK_VOL_14_50_dB = 1450, |
| 879 | PMIC_SPK_VOL_15_00_dB = 1500, |
| 880 | PMIC_SPK_VOL_15_50_dB = 1550, |
| 881 | PMIC_SPK_VOL_16_00_dB = 1600, |
| 882 | PMIC_SPK_VOL_16_50_dB = 1650, |
| 883 | PMIC_SPK_VOL_17_00_dB = 1700, |
| 884 | PMIC_SPK_VOL_17_50_dB = 1750, |
| 885 | PMIC_SPK_VOL_18_00_dB = 1800, |
| 886 | PMIC_SPK_VOL_18_50_dB = 1850, |
| 887 | PMIC_SPK_VOL_19_00_dB = 1900, |
| 888 | PMIC_SPK_VOL_19_50_dB = 1950, |
| 889 | PMIC_SPK_VOL_20_00_dB = 2000, |
| 890 | PMIC_SPK_VOL_20_50_dB = 2050, |
| 891 | PMIC_SPK_VOL_21_00_dB = 2100, |
| 892 | PMIC_SPK_VOL_21_50_dB = 2150, |
| 893 | PMIC_SPK_VOL_22_00_dB = 2200, |
| 894 | PMIC_SPK_VOL_22_50_dB = 2250, |
| 895 | PMIC_SPK_VOL_23_00_dB = 2300, |
| 896 | PMIC_SPK_VOL_23_50_dB = 2350, |
| 897 | PMIC_SPK_VOL_24_00_dB = 2400, |
| 898 | PMIC_SPK_VOL_24_50_dB = 2450, |
| 899 | PMIC_SPK_VOL_MAX = 9900, |
| 900 | |
| 901 | PMU_SPK_VOL_00_00_dB = 0, |
| 902 | PMU_SPK_VOL_00_50_dB = 50, |
| 903 | PMU_SPK_VOL_01_00_dB = 100, |
| 904 | PMU_SPK_VOL_01_50_dB = 150, |
| 905 | PMU_SPK_VOL_02_00_dB = 200, |
| 906 | PMU_SPK_VOL_02_50_dB = 250, |
| 907 | PMU_SPK_VOL_03_00_dB = 300, |
| 908 | PMU_SPK_VOL_03_50_dB = 350, |
| 909 | PMU_SPK_VOL_04_00_dB = 400, |
| 910 | PMU_SPK_VOL_04_50_dB = 450, |
| 911 | PMU_SPK_VOL_05_00_dB = 500, |
| 912 | PMU_SPK_VOL_05_50_dB = 550, |
| 913 | PMU_SPK_VOL_06_00_dB = 600, |
| 914 | PMU_SPK_VOL_06_50_dB = 650, |
| 915 | PMU_SPK_VOL_07_00_dB = 700, |
| 916 | PMU_SPK_VOL_07_50_dB = 750, |
| 917 | PMU_SPK_VOL_08_00_dB = 800, |
| 918 | PMU_SPK_VOL_08_50_dB = 850, |
| 919 | PMU_SPK_VOL_09_00_dB = 900, |
| 920 | PMU_SPK_VOL_09_50_dB = 950, |
| 921 | PMU_SPK_VOL_10_00_dB = 1000, |
| 922 | PMU_SPK_VOL_10_50_dB = 1050, |
| 923 | PMU_SPK_VOL_11_00_dB = 1100, |
| 924 | PMU_SPK_VOL_11_50_dB = 1150, |
| 925 | PMU_SPK_VOL_12_00_dB = 1200, |
| 926 | PMU_SPK_VOL_12_50_dB = 1250, |
| 927 | PMU_SPK_VOL_13_00_dB = 1300, |
| 928 | PMU_SPK_VOL_13_50_dB = 1350, |
| 929 | PMU_SPK_VOL_14_00_dB = 1400, |
| 930 | PMU_SPK_VOL_14_50_dB = 1450, |
| 931 | PMU_SPK_VOL_15_00_dB = 1500, |
| 932 | PMU_SPK_VOL_15_50_dB = 1550, |
| 933 | PMU_SPK_VOL_16_00_dB = 1600, |
| 934 | PMU_SPK_VOL_16_50_dB = 1650, |
| 935 | PMU_SPK_VOL_17_00_dB = 1700, |
| 936 | PMU_SPK_VOL_17_50_dB = 1750, |
| 937 | PMU_SPK_VOL_18_00_dB = 1800, |
| 938 | PMU_SPK_VOL_18_50_dB = 1850, |
| 939 | PMU_SPK_VOL_19_00_dB = 1900, |
| 940 | PMU_SPK_VOL_19_50_dB = 1950, |
| 941 | PMU_SPK_VOL_20_00_dB = 2000, |
| 942 | PMU_SPK_VOL_20_50_dB = 2050, |
| 943 | PMU_SPK_VOL_21_00_dB = 2100, |
| 944 | PMU_SPK_VOL_21_50_dB = 2150, |
| 945 | PMU_SPK_VOL_22_00_dB = 2200, |
| 946 | PMU_SPK_VOL_22_50_dB = 2250, |
| 947 | PMU_SPK_VOL_23_00_dB = 2300, |
| 948 | PMU_SPK_VOL_23_50_dB = 2350, |
| 949 | PMU_SPK_VOL_24_00_dB = 2400, |
| 950 | PMU_SPK_VOL_24_50_dB = 2450, |
| 951 | PMU_SPK_VOL_MAX = 9900 |
| 952 | }PMU_SPK_VOL_ENUM; |
| 953 | |
| 954 | /* Enum of charger current List */ |
| 955 | typedef enum |
| 956 | { |
| 957 | PMU_CHARGE_CURRENT_0_00_MA = 0, |
| 958 | PMU_CHARGE_CURRENT_50_00_MA = 5000, |
| 959 | PMU_CHARGE_CURRENT_62_50_MA = 6250, |
| 960 | PMU_CHARGE_CURRENT_70_00_MA = 7000, |
| 961 | PMU_CHARGE_CURRENT_75_00_MA = 7500, |
| 962 | PMU_CHARGE_CURRENT_87_50_MA = 8750, |
| 963 | PMU_CHARGE_CURRENT_100_00_MA = 10000, |
| 964 | PMU_CHARGE_CURRENT_150_00_MA = 15000, |
| 965 | PMU_CHARGE_CURRENT_200_00_MA = 20000, |
| 966 | PMU_CHARGE_CURRENT_225_00_MA = 22500, |
| 967 | PMU_CHARGE_CURRENT_250_00_MA = 25000, |
| 968 | PMU_CHARGE_CURRENT_300_00_MA = 30000, |
| 969 | PMU_CHARGE_CURRENT_350_00_MA = 35000, |
| 970 | PMU_CHARGE_CURRENT_400_00_MA = 40000, |
| 971 | PMU_CHARGE_CURRENT_425_00_MA = 42500, |
| 972 | PMU_CHARGE_CURRENT_450_00_MA = 45000, |
| 973 | PMU_CHARGE_CURRENT_500_00_MA = 50000, |
| 974 | PMU_CHARGE_CURRENT_550_00_MA = 55000, |
| 975 | PMU_CHARGE_CURRENT_600_00_MA = 60000, |
| 976 | PMU_CHARGE_CURRENT_650_00_MA = 65000, |
| 977 | PMU_CHARGE_CURRENT_700_00_MA = 70000, |
| 978 | PMU_CHARGE_CURRENT_750_00_MA = 75000, |
| 979 | PMU_CHARGE_CURRENT_800_00_MA = 80000, |
| 980 | PMU_CHARGE_CURRENT_850_00_MA = 85000, |
| 981 | PMU_CHARGE_CURRENT_900_00_MA = 90000, |
| 982 | PMU_CHARGE_CURRENT_950_00_MA = 95000, |
| 983 | PMU_CHARGE_CURRENT_1000_00_MA = 100000, |
| 984 | PMU_CHARGE_CURRENT_1200_00_MA = 120000, |
| 985 | PMU_CHARGE_CURRENT_1500_00_MA = 150000, |
| 986 | PMU_CHARGE_CURRENT_1800_00_MA = 180000, |
| 987 | PMU_CHARGE_CURRENT_2000_00_MA = 200000, |
| 988 | PMU_CHARGE_CURRENT_MAX |
| 989 | }PMU_CHR_CURRENT_ENUM; |
| 990 | |
| 991 | |
| 992 | /* Enum of VPA output select List */ |
| 993 | typedef enum |
| 994 | { |
| 995 | PMU_VPA0, |
| 996 | PMU_VPA1, |
| 997 | PMU_VPA2, |
| 998 | PMU_VPA3, |
| 999 | PMU_VPA4, |
| 1000 | PMU_VPA5, |
| 1001 | PMU_VPA6, |
| 1002 | PMU_VPA7 |
| 1003 | }PMU_VPA_ENUM; |
| 1004 | |
| 1005 | /* Enum of on select List */ |
| 1006 | typedef enum |
| 1007 | { |
| 1008 | ENABLE_WITH_SRCLKEN = 0, |
| 1009 | ENABLE_LDO_BUCK_EN_REGISTER = 1 |
| 1010 | }PMU_ON_SEL_ENUM; |
| 1011 | |
| 1012 | /* Enum of on select(PMIC) List */ |
| 1013 | typedef enum |
| 1014 | { |
| 1015 | SW_CONTROL = 0, |
| 1016 | SRCLKEN_CONTROL = 1 |
| 1017 | }PMIC_ON_SEL_ENUM; |
| 1018 | |
| 1019 | /* Enum of on control(PMIC) List */ |
| 1020 | typedef enum |
| 1021 | { |
| 1022 | SW_CONTROL_BY_REG = 0, |
| 1023 | HW_CONTROL = 1 |
| 1024 | }PMIC_ON_CTRL_ENUM; |
| 1025 | |
| 1026 | #if defined(MT6320) |
| 1027 | /* Enum of srclken select List */ |
| 1028 | typedef enum |
| 1029 | { |
| 1030 | SRCVOLTEN = 0, |
| 1031 | SRCLKEN_PERI, |
| 1032 | SRCLKEN_MD2, |
| 1033 | SRCVOLTEN_OR_SRCLKEN_PERI, |
| 1034 | SRCVOLTEN_OR_SRCLKEN_MD2, |
| 1035 | SRCLKEN_PERI_OR_SRCLKEN_MD2, |
| 1036 | SRCVOLTEN_OR_SRCLKEN_PERI_OR_SRCLKEN_MD2 |
| 1037 | }PMU_SRCLKEN_SEL_ENUM; |
| 1038 | |
| 1039 | #elif defined(MT6325) || defined(MT6328) |
| 1040 | /* Enum of srclken select List */ |
| 1041 | typedef enum |
| 1042 | { |
| 1043 | SRCLKEN_IN0 = 0, |
| 1044 | SRCLKEN_IN1, |
| 1045 | SRCLKEN_IN0_OR_SRCLKEN_IN1, |
| 1046 | SRCLKEN_IN0_AND_SRCLKEN_IN1 |
| 1047 | }PMU_SRCLKEN_SEL_ENUM; |
| 1048 | |
| 1049 | #elif defined(MT6351) |
| 1050 | typedef enum |
| 1051 | { |
| 1052 | SRCLKEN_IN0 = 0, |
| 1053 | SRCLKEN_IN1, |
| 1054 | SRCLKEN_IN0_OR_SRCLKEN_IN1, |
| 1055 | SRCLKEN_IN0_AND_SRCLKEN_IN1, |
| 1056 | SRCLKEN_IN2, |
| 1057 | SRCLKEN_IN0_OR_SRCLKEN_IN2, |
| 1058 | SRCLKEN_IN1_OR_SRCLKEN_IN2, |
| 1059 | SRCLKEN_IN0_OR_SRCLKEN_IN1_OR_SRCLKEN_IN2 |
| 1060 | }PMU_SRCLKEN_SEL_ENUM; |
| 1061 | #else |
| 1062 | /* Enum of srclken select List */ |
| 1063 | typedef enum |
| 1064 | { |
| 1065 | SRCLKEN_IN1_AND_SRCLKEN_IN2 = 0, |
| 1066 | SRCLKEN_IN1, |
| 1067 | SRCLKEN_IN2, |
| 1068 | SRCLKEN_IN1_OR_SRCLKEN_IN2 |
| 1069 | }PMU_SRCLKEN_SEL_ENUM; |
| 1070 | #endif |
| 1071 | |
| 1072 | #if defined(MT6328) |
| 1073 | /* Enum of srclken select List */ |
| 1074 | typedef enum |
| 1075 | { |
| 1076 | SRCLKEN_IN0_SEL = 0, |
| 1077 | SRCLKEN_IN1_SEL, |
| 1078 | SRCLKEN_IN0_OR_SRCLKEN_IN1_SEL, |
| 1079 | SRCLKEN_IN0_AND_SRCLKEN_IN1_SEL |
| 1080 | }PMIC_SIGNAL_SEL_ENUM; |
| 1081 | #elif defined(MT6351) |
| 1082 | /* Enum of srclken select List */ |
| 1083 | typedef enum |
| 1084 | { |
| 1085 | SRCLKEN_IN0_SEL = 0, |
| 1086 | SRCLKEN_IN1_SEL, |
| 1087 | SRCLKEN_IN0_OR_SRCLKEN_IN1_SEL, |
| 1088 | SRCLKEN_IN0_AND_SRCLKEN_IN1_SEL, |
| 1089 | SRCLKEN_IN2_SEL, |
| 1090 | SRCLKEN_IN0_OR_SRCLKEN_IN2_SEL, |
| 1091 | SRCLKEN_IN1_OR_SRCLKEN_IN2_SEL, |
| 1092 | SRCLKEN_IN0_OR_SRCLKEN_IN1_OR_SRCLKEN_IN2_SEL |
| 1093 | }PMIC_SIGNAL_SEL_ENUM; |
| 1094 | #else |
| 1095 | /* Enum of srclken select List */ |
| 1096 | typedef enum |
| 1097 | { |
| 1098 | SRCLKEN_IN1_SEL = 0, |
| 1099 | SRCLKEN_IN2_SEL, |
| 1100 | SRCLKEN_IN1_OR_SRCLKEN_IN2_SEL, |
| 1101 | SRCLKEN_IN1_AND_SRCLKEN_IN2_SEL |
| 1102 | }PMIC_SIGNAL_SEL_ENUM; |
| 1103 | #endif |
| 1104 | |
| 1105 | /* Enum of remote sense List */ |
| 1106 | typedef enum |
| 1107 | { |
| 1108 | DEFAULT_LOCAL_SENSE= 0, |
| 1109 | REMOTE_SENSE = 1 |
| 1110 | }PMU_RS_ENUM; |
| 1111 | |
| 1112 | /* Enum of control mode List */ |
| 1113 | typedef enum |
| 1114 | { |
| 1115 | KPLED_PWM_MODE = 0, |
| 1116 | KPLED_REGISTER_CTRL_MODE = 1 |
| 1117 | }PMU_CTRL_KPLED_MODE_ENUM; |
| 1118 | |
| 1119 | /* Enum of control mode List */ |
| 1120 | typedef enum |
| 1121 | { |
| 1122 | LDO_EN_SEL_BY_CONTROLLER = 0, // The LDO is connected to specific controller and can be controlled directly by the controller |
| 1123 | LDO_EN_SEL_BY_LDO_CON, |
| 1124 | LDO_EN_SEL_MAX = 0xFF |
| 1125 | }PMU_CTRL_LDO_CTRL_MODE_ENUM; |
| 1126 | |
| 1127 | /* Enum of control LDO/Buck mode List */ |
| 1128 | typedef enum |
| 1129 | { |
| 1130 | BUCK_MODE = 0, |
| 1131 | LDO_MODE |
| 1132 | }PMU_CTRL_BUCK_LDO_CTRL_MODE_ENUM; |
| 1133 | |
| 1134 | /* Enum of control LDO/Buck MODESET list */ |
| 1135 | typedef enum |
| 1136 | { |
| 1137 | AUTO_MODE = 0, |
| 1138 | FORCE_PWM_MODE |
| 1139 | }PMU_CTRL_BUCK_LDO_CTRL_MODESET_ENUM; |
| 1140 | |
| 1141 | typedef enum |
| 1142 | { |
| 1143 | COT_AUTO_MODE = 0, |
| 1144 | FORCE_COT_MODE |
| 1145 | }PMU_CTRL_BUCK_LDO_CTRL_COT_ENUM; |
| 1146 | |
| 1147 | /* Enum of STB SIO mode List */ |
| 1148 | typedef enum |
| 1149 | { |
| 1150 | HW_ENABLE = 0, |
| 1151 | SW_ENABLE |
| 1152 | }PMU_CTRL_STB_SIO_CTRL_MODE_ENUM; |
| 1153 | |
| 1154 | /* Enum of kpled sel List */ |
| 1155 | typedef enum |
| 1156 | { |
| 1157 | KPLED_SEL_1_SWITCH = 0, |
| 1158 | KPLED_SEL_2_SWITCH = 1, |
| 1159 | KPLED_SEL_3_SWITCH = 2, |
| 1160 | KPLED_SEL_4_SWITCH = 3, |
| 1161 | KPLED_SEL_5_SWITCH = 4, |
| 1162 | KPLED_SEL_6_SWITCH = 5, |
| 1163 | KPLED_SEL_7_SWITCH = 6, |
| 1164 | KPLED_SEL_8_SWITCH = 7 |
| 1165 | }PMU_CTRL_KPLED_SEL_ENUM; |
| 1166 | |
| 1167 | /* Enum of control mode List */ |
| 1168 | typedef enum |
| 1169 | { |
| 1170 | FLASHLED_PWM_MODE = 0, |
| 1171 | FLASHLED_REGISTER_CTRL_MODE = 1 |
| 1172 | }PMU_CTRL_FLASHLED_MODE_ENUM; |
| 1173 | |
| 1174 | /* Enum of kpled sel List */ |
| 1175 | typedef enum |
| 1176 | { |
| 1177 | FLASHLED_SEL_1_SWITCH = 0, |
| 1178 | FLASHLED_SEL_2_SWITCH = 1, |
| 1179 | FLASHLED_SEL_3_SWITCH = 2, |
| 1180 | FLASHLED_SEL_4_SWITCH = 3, |
| 1181 | FLASHLED_SEL_5_SWITCH = 4, |
| 1182 | FLASHLED_SEL_6_SWITCH = 5, |
| 1183 | FLASHLED_SEL_7_SWITCH = 6, |
| 1184 | FLASHLED_SEL_8_SWITCH = 7 |
| 1185 | }PMU_CTRL_FLASHLED_SEL_ENUM; |
| 1186 | |
| 1187 | /* Enum of wdt interval List */ |
| 1188 | typedef enum |
| 1189 | { |
| 1190 | PMU_CHR_WDT_TD_4SEC = 40, |
| 1191 | PMU_CHR_WDT_TD_8SEC = 80, |
| 1192 | PMU_CHR_WDT_TD_16SEC = 160, |
| 1193 | PMU_CHR_WDT_TD_32SEC = 320, |
| 1194 | PMU_CHR_WDT_TD_128SEC = 1280, |
| 1195 | PMU_CHR_WDT_TD_256SEC = 2560, |
| 1196 | PMU_CHR_WDT_TD_512SEC = 5120, |
| 1197 | PMU_CHR_WDT_TD_1024SEC = 10240, |
| 1198 | PMU_CHR_WDT_TD_3000SEC = 30000 |
| 1199 | }PMU_CHR_WDT_TD_ENUM; |
| 1200 | |
| 1201 | /* Enum of control mode List */ |
| 1202 | typedef enum |
| 1203 | { |
| 1204 | ISINK_PWM_MODE = 0, |
| 1205 | ISINK_REGISTER_CTRL_MODE = 1 |
| 1206 | }PMU_CTRL_ISINK_MODE_ENUM; |
| 1207 | |
| 1208 | /* Enum of ISINK current List */ |
| 1209 | typedef enum |
| 1210 | { |
| 1211 | ISINK_STEP_04_MA = 4, |
| 1212 | ISINK_STEP_05_MA = 5, |
| 1213 | ISINK_STEP_08_MA = 8, |
| 1214 | ISINK_STEP_10_MA = 10, |
| 1215 | ISINK_STEP_12_MA = 12, |
| 1216 | ISINK_STEP_15_MA = 15, |
| 1217 | ISINK_STEP_16_MA = 16, |
| 1218 | ISINK_STEP_20_MA = 20, |
| 1219 | ISINK_STEP_24_MA = 24 |
| 1220 | }PMU_CTRL_ISINK_STEP_ENUM; |
| 1221 | |
| 1222 | /* Enum of spk mode List */ |
| 1223 | typedef enum{ |
| 1224 | SPK_CLASS_D_MODE = 0, |
| 1225 | SPK_CLASS_AB_MODE |
| 1226 | }PMU_CTRL_SPK_MODE_ENUM; |
| 1227 | |
| 1228 | /* Enum of spk slew List */ |
| 1229 | typedef enum{ |
| 1230 | SPK_SLEW_RATE_2_OVER_4 = 0, |
| 1231 | SPK_SLEW_RATE_1_OVER_4, |
| 1232 | SPK_SLEW_RATE_4_OVER_4, |
| 1233 | SPK_SLEW_RATE_3_OVER_4 |
| 1234 | }PMU_CTRL_SPK_SLEW_RATE_ENUM; |
| 1235 | |
| 1236 | /* Enum of spk class D offset calibration pathList */ |
| 1237 | typedef enum{ |
| 1238 | SPK_N = 0, |
| 1239 | SPK_P, |
| 1240 | }PMU_CTRL_SPK_CALI_PATH_ENUM; |
| 1241 | |
| 1242 | /* Enum of control steps List */ |
| 1243 | typedef enum{ |
| 1244 | PMU_CTRL_STEP1, |
| 1245 | PMU_CTRL_STEP2, |
| 1246 | PMU_CTRL_STEP3, |
| 1247 | PMU_CTRL_STEP4 |
| 1248 | }PMU_CTRL_STEP_ENUM; |
| 1249 | |
| 1250 | /* Enum of PMIC List */ |
| 1251 | typedef enum |
| 1252 | { |
| 1253 | PMIC_MT_6320 = 0x6320, |
| 1254 | PMIC_MT_6323 = 0x6323, |
| 1255 | PMIC_MT_6325 = 0x6325, |
| 1256 | PMIC_MT_6328 = 0x6328, |
| 1257 | PMIC_MT_6329 = 0x6329, |
| 1258 | PMIC_MT_6331 = 0x6331, |
| 1259 | PMIC_MT_6332 = 0x6332, |
| 1260 | PMIC_MT_6339 = 0x6339, |
| 1261 | PMIC_CHIP_MAX |
| 1262 | }PMIC_CHIP_LIST_ENUM; |
| 1263 | |
| 1264 | typedef enum |
| 1265 | { |
| 1266 | PMIC_ECO_E1 = 0, |
| 1267 | PMIC_ECO_E2, |
| 1268 | PMIC_ECO_E3, |
| 1269 | PMIC_ECO_E4, |
| 1270 | PMIC_ECO_E5, |
| 1271 | PMIC_ECO_E6, |
| 1272 | PMIC_ECO_E7, |
| 1273 | PMIC_ECO_E8, |
| 1274 | PMIC_ECO_E9, |
| 1275 | PMIC_ECO_E10, |
| 1276 | }PMU_CTRL_PMIC_ECO_VERSION_ENUM; |
| 1277 | |
| 1278 | typedef enum |
| 1279 | { |
| 1280 | SW_OP_EN_SHIFT = 0, |
| 1281 | HW0_OP_EN_SHIFT, |
| 1282 | HW1_OP_EN_SHIFT, |
| 1283 | HW2_OP_EN_SHIFT, |
| 1284 | }PMU_LDO_BUCK_OP_EN_SHIFT_ENUM; |
| 1285 | |
| 1286 | typedef enum |
| 1287 | { |
| 1288 | HW0_OP_CFG_SHIFT = 1, |
| 1289 | HW1_OP_CFG_SHIFT = 2, |
| 1290 | HW2_OP_CFG_SHIFT = 3, |
| 1291 | GO_ON_OP_SHIFT = 8, |
| 1292 | GO_LP_OP_SHIFT = 9, |
| 1293 | |
| 1294 | }PMU_LDO_BUCK_OP_CFG_SHIFT_ENUM; |
| 1295 | |
| 1296 | typedef enum |
| 1297 | { |
| 1298 | ON_OFF_MODE = 0, |
| 1299 | LP_NOLP_MODE, |
| 1300 | }PMU_LDO_BUCK_HW_OP_CFG_MODE_ENUM; |
| 1301 | |
| 1302 | typedef enum |
| 1303 | { |
| 1304 | MULTI_USER_MODE = 0, |
| 1305 | LOW_POWER_MODE, |
| 1306 | }PMU_LDO_BUCK_OP_MODE_ENUM; |
| 1307 | |
| 1308 | typedef enum |
| 1309 | { |
| 1310 | Prefer_ON = 0, |
| 1311 | Prefer_OFF, |
| 1312 | }PMU_LDO_BUCK_GO_ON_OP_MODE_ENUM; |
| 1313 | |
| 1314 | typedef enum |
| 1315 | { |
| 1316 | Prefer_LP = 0, |
| 1317 | Prefer_NO_LP, |
| 1318 | }PMU_LDO_BUCK_GO_LP_OP_MODE_ENUM; |
| 1319 | |
| 1320 | typedef enum |
| 1321 | { |
| 1322 | PMIC_SRCLKEN_IN0 = 0, |
| 1323 | PMIC_SRCLKEN_IN1 = 1, |
| 1324 | PMIC_SRCLKEN_IN2 = 2, |
| 1325 | PMIC_SRCLKEN_IN3 = 3, |
| 1326 | }PMIC_TOP_SRCLKEN_IN_LIST_ENUM; |
| 1327 | |
| 1328 | typedef enum |
| 1329 | { |
| 1330 | PMIC_SLEEP_MODE = 0, |
| 1331 | PMIC_NORMAL_MODE, |
| 1332 | }PMIC_SRCLKEN_IN_EN_ENUM; |
| 1333 | |
| 1334 | typedef enum |
| 1335 | { |
| 1336 | SW_MODE = 0, |
| 1337 | HW_MODE, |
| 1338 | }PMIC_SRCLKEN_IN_MODE_ENUM; |
| 1339 | |
| 1340 | |
| 1341 | /* For LDO_BUCK_SET_EN command. */ |
| 1342 | typedef struct |
| 1343 | { |
| 1344 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1345 | DCL_BOOL enable; |
| 1346 | }PMU_CTRL_LDO_BUCK_SET_EN; |
| 1347 | |
| 1348 | /* For LDO_BUCK_GET_EN_STATUS command. */ |
| 1349 | typedef struct |
| 1350 | { |
| 1351 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1352 | DCL_BOOL enable; |
| 1353 | }PMU_CTRL_LDO_BUCK_GET_EN_STATUS; |
| 1354 | |
| 1355 | /* For LDO_BUCK_GET_QI_MODE command. */ |
| 1356 | typedef struct |
| 1357 | { |
| 1358 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1359 | DCL_BOOL mode; |
| 1360 | }PMU_CTRL_LDO_BUCK_GET_QI_MODE; |
| 1361 | |
| 1362 | /* For LDO_BUCK_SET_EN_FORCE command. */ |
| 1363 | typedef struct |
| 1364 | { |
| 1365 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1366 | DCL_BOOL enable; |
| 1367 | }PMU_CTRL_LDO_BUCK_SET_EN_FORCE; |
| 1368 | |
| 1369 | /* For LDO_BUCK_SET_THER_SHDN_EN command. */ |
| 1370 | typedef struct |
| 1371 | { |
| 1372 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1373 | DCL_BOOL enable; |
| 1374 | }PMU_CTRL_LDO_BUCK_SET_THER_SHDN_EN; |
| 1375 | |
| 1376 | /* For LDO_BUCK_SET_VOLTAGE command. */ |
| 1377 | typedef struct |
| 1378 | { |
| 1379 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1380 | PMU_VOLTAGE_ENUM voltage; |
| 1381 | }PMU_CTRL_LDO_BUCK_SET_VOLTAGE; |
| 1382 | |
| 1383 | typedef struct |
| 1384 | { |
| 1385 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1386 | DCL_UINT16 code; |
| 1387 | }PMU_CTRL_LDO_BUCK_GET_VOLTAGE; |
| 1388 | |
| 1389 | /* For LDO_BUCK_GET_VOSEL_CTRL command. */ |
| 1390 | typedef struct |
| 1391 | { |
| 1392 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1393 | PMIC_ON_CTRL_ENUM mode; |
| 1394 | }PMU_CTRL_LDO_BUCK_GET_VOSEL_CTRL; |
| 1395 | |
| 1396 | /* For LDO_BUCK_GET_VOSEL command. */ |
| 1397 | typedef struct |
| 1398 | { |
| 1399 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1400 | DCL_UINT16 code; |
| 1401 | }PMU_CTRL_LDO_BUCK_GET_VOSEL; |
| 1402 | |
| 1403 | /* For LDO_BUCK_GET_VOSEL_ON command. */ |
| 1404 | typedef struct |
| 1405 | { |
| 1406 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1407 | DCL_UINT16 code; |
| 1408 | }PMU_CTRL_LDO_BUCK_GET_VOSEL_ON; |
| 1409 | |
| 1410 | /* For LDO_BUCK_GET_VOSEL_SLEEP command. */ |
| 1411 | typedef struct |
| 1412 | { |
| 1413 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1414 | DCL_UINT16 code; |
| 1415 | }PMU_CTRL_LDO_BUCK_GET_VOSEL_SLEEP; |
| 1416 | |
| 1417 | /* For LDO_BUCK_SET_VOSEL_CTRL command. */ |
| 1418 | typedef struct |
| 1419 | { |
| 1420 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1421 | PMIC_ON_CTRL_ENUM mode; |
| 1422 | }PMU_CTRL_LDO_BUCK_SET_VOSEL_CTRL; |
| 1423 | |
| 1424 | /* For LDO_BUCK_SET_VOSEL command. */ |
| 1425 | typedef struct |
| 1426 | { |
| 1427 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1428 | DCL_UINT16 code; |
| 1429 | }PMU_CTRL_LDO_BUCK_SET_VOSEL; |
| 1430 | |
| 1431 | /* For LDO_BUCK_SET_VOSEL_ON command. */ |
| 1432 | typedef struct |
| 1433 | { |
| 1434 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1435 | DCL_UINT16 code; |
| 1436 | }PMU_CTRL_LDO_BUCK_SET_VOSEL_ON; |
| 1437 | |
| 1438 | /* For LDO_BUCK_SET_VOSEL_SLEEP command. */ |
| 1439 | typedef struct |
| 1440 | { |
| 1441 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1442 | DCL_UINT16 code; |
| 1443 | }PMU_CTRL_LDO_BUCK_SET_VOSEL_SLEEP; |
| 1444 | |
| 1445 | /* For LDO_VTCXO24_SWITCH_SET_EN command. */ |
| 1446 | typedef struct |
| 1447 | { |
| 1448 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1449 | DCL_BOOL enable; |
| 1450 | }PMU_CTRL_LDO_SET_VTCXO24_SWITCH_EN; |
| 1451 | |
| 1452 | /* For BUCK_SET_FPWM command. */ |
| 1453 | typedef struct |
| 1454 | { |
| 1455 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1456 | DCL_BOOL enable; |
| 1457 | }PMU_CTRL_LDO_BUCK_SET_FPWM; |
| 1458 | |
| 1459 | typedef struct |
| 1460 | { |
| 1461 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1462 | DCL_BOOL enable; |
| 1463 | }PMU_CTRL_LDO_BUCK_GET_FPWM; |
| 1464 | |
| 1465 | /* For LDO_BUCK_SET_SLEEP_VOLTAGE command. */ |
| 1466 | typedef struct |
| 1467 | { |
| 1468 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1469 | PMU_VOLTAGE_ENUM sleepVoltage; |
| 1470 | }PMU_CTRL_LDO_BUCK_SET_SLEEP_VOLTAGE; |
| 1471 | |
| 1472 | /* For LDO_BUCK_SET_VOLTAGE_EN command. */ |
| 1473 | typedef struct |
| 1474 | { |
| 1475 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1476 | PMU_VOLTAGE_ENUM voltage; |
| 1477 | }PMU_CTRL_LDO_BUCK_SET_VOLTAGE_EN; |
| 1478 | |
| 1479 | /* For LDO_BUCK_SET_RS command. */ |
| 1480 | typedef struct |
| 1481 | { |
| 1482 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1483 | PMU_RS_ENUM rs; |
| 1484 | }PMU_CTRL_LDO_BUCK_SET_RS; |
| 1485 | |
| 1486 | /* For LDO_BUCK_SET_BURST_THRESHOLD command. */ |
| 1487 | typedef struct |
| 1488 | { |
| 1489 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1490 | DCL_UINT16 thresholdIdx; |
| 1491 | }PMU_CTRL_LDO_BUCK_SET_BURST_THRESHOLD; |
| 1492 | |
| 1493 | /* For LDO_BUCK_SET_CURRENT_LIMIT command. */ |
| 1494 | typedef struct |
| 1495 | { |
| 1496 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1497 | DCL_UINT16 currentLimitIdx; |
| 1498 | }PMU_CTRL_LDO_BUCK_SET_CURRENT_LIMIT; |
| 1499 | |
| 1500 | /* For LDO_BUCK_SET_BIAS_CURRENT_CALIBRATION_CODE command. */ |
| 1501 | typedef struct |
| 1502 | { |
| 1503 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1504 | DCL_UINT16 biasCurrentCalibrationCode; |
| 1505 | }PMU_CTRL_LDO_BUCK_SET_BIAS_CURRENT_CALIBRATION_CODE; |
| 1506 | |
| 1507 | /* For LDO_BUCK_SET_VOLTAGE_CALIBRATION_CODE command. */ |
| 1508 | typedef struct |
| 1509 | { |
| 1510 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1511 | DCL_UINT16 voltageCalibrationCode; |
| 1512 | }PMU_CTRL_LDO_BUCK_SET_VOLTAGE_CALIBRATION_CODE; |
| 1513 | |
| 1514 | /* For LDO_BUCK_SET_STB_TD command. */ |
| 1515 | typedef struct |
| 1516 | { |
| 1517 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1518 | DCL_UINT16 delayTimeIdx; |
| 1519 | }PMU_CTRL_LDO_BUCK_SET_STB_TD; |
| 1520 | |
| 1521 | /* For LDO_BUCK_SET_OC_TD command. */ |
| 1522 | typedef struct |
| 1523 | { |
| 1524 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1525 | DCL_UINT16 deglitchTimeIdx; |
| 1526 | }PMU_CTRL_LDO_BUCK_SET_OC_TD; |
| 1527 | |
| 1528 | /* For LDO_BUCK_SET_OCFB_EN command. */ |
| 1529 | typedef struct |
| 1530 | { |
| 1531 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1532 | DCL_BOOL enable; |
| 1533 | }PMU_CTRL_LDO_BUCK_SET_OCFB_EN; |
| 1534 | |
| 1535 | /* For LDO_BUCK_SET_OC_AUTO_OFF command. */ |
| 1536 | typedef struct |
| 1537 | { |
| 1538 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1539 | DCL_BOOL enable; |
| 1540 | }PMU_CTRL_LDO_BUCK_SET_OC_AUTO_OFF; |
| 1541 | |
| 1542 | /* For LDO_BUCK_SET_ON_SEL command. */ |
| 1543 | typedef struct |
| 1544 | { |
| 1545 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1546 | PMU_ON_SEL_ENUM onSel; |
| 1547 | }PMU_CTRL_LDO_BUCK_SET_ON_SEL; |
| 1548 | |
| 1549 | /* For LDO_BUCK_SET_SRCLKEN_SEL command. */ |
| 1550 | typedef struct |
| 1551 | { |
| 1552 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1553 | PMU_SRCLKEN_SEL_ENUM SrclkenSel; |
| 1554 | }PMU_CTRL_LDO_BUCK_SET_SRCLKEN_SEL; |
| 1555 | |
| 1556 | /* For LDO_BUCK_SET_SRCLK_EN_SEL command. */ |
| 1557 | typedef struct |
| 1558 | { |
| 1559 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1560 | PMIC_SIGNAL_SEL_ENUM sel; |
| 1561 | }PMU_CTRL_LDO_BUCK_SET_SRCLK_EN_SEL; |
| 1562 | |
| 1563 | /* For LDO_BUCK_SET_STB_EN command. */ |
| 1564 | typedef struct |
| 1565 | { |
| 1566 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1567 | DCL_BOOL enable; |
| 1568 | }PMU_CTRL_LDO_BUCK_SET_STB_EN; |
| 1569 | |
| 1570 | /* For LDO_BUCK_SET_NDIS_EN command. */ |
| 1571 | typedef struct |
| 1572 | { |
| 1573 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1574 | DCL_BOOL enable; |
| 1575 | }PMU_CTRL_LDO_BUCK_SET_NDIS_EN; |
| 1576 | |
| 1577 | /* For LDO_BUCK_SET_VSIM_GPLDO_EN command. */ |
| 1578 | typedef struct |
| 1579 | { |
| 1580 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1581 | DCL_BOOL enable; |
| 1582 | }PMU_CTRL_LDO_BUCK_SET_VSIM_GPLDO_EN; |
| 1583 | |
| 1584 | /* For _LDO_BUCK_SET_VSIM2_GPLDO_EN command. */ |
| 1585 | typedef struct |
| 1586 | { |
| 1587 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1588 | DCL_BOOL enable; |
| 1589 | }PMU_CTRL_LDO_BUCK_SET_VSIM2_GPLDO_EN; |
| 1590 | |
| 1591 | /* For LDO_BUCK_SET_SIM2_GPIO_EN command. */ |
| 1592 | typedef struct |
| 1593 | { |
| 1594 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1595 | DCL_BOOL enable; |
| 1596 | }PMU_CTRL_LDO_BUCK_SET_SIM2_GPIO_EN; |
| 1597 | |
| 1598 | /* For LDO_BUCK_SET_CCI_SRCLKEN command. */ |
| 1599 | typedef struct |
| 1600 | { |
| 1601 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1602 | DCL_BOOL enable; |
| 1603 | }PMU_CTRL_LDO_BUCK_SET_CCI_SRCLKEN; |
| 1604 | |
| 1605 | /* For LDO_BUCK_GET_OC_STATUS command. */ |
| 1606 | typedef struct |
| 1607 | { |
| 1608 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1609 | DCL_BOOL status; |
| 1610 | }PMU_CTRL_LDO_BUCK_GET_OC_STATUS; |
| 1611 | |
| 1612 | /* For LDO_BUCK_GET_QI_OC_STATUS command. */ |
| 1613 | typedef struct |
| 1614 | { |
| 1615 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1616 | DCL_BOOL status; |
| 1617 | }PMU_CTRL_LDO_BUCK_GET_QI_OC_STATUS; |
| 1618 | |
| 1619 | /* For LDO_BUCK_SET_OC_INT_EN. */ |
| 1620 | typedef struct |
| 1621 | { |
| 1622 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1623 | DCL_BOOL oc_int_en; |
| 1624 | }PMU_CTRL_LDO_BUCK_SET_OC_INT_EN; |
| 1625 | |
| 1626 | /* For LDO_BUCK_CLEAR_OC_FLAG. */ |
| 1627 | typedef struct |
| 1628 | { |
| 1629 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1630 | }PMU_CTRL_LDO_BUCK_CLEAR_OC_FLAG; |
| 1631 | |
| 1632 | /* For LDO_BUCK_GET_OC_FLAG. */ |
| 1633 | typedef struct |
| 1634 | { |
| 1635 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1636 | DCL_BOOL oc_flag; |
| 1637 | }PMU_CTRL_LDO_BUCK_GET_OC_FLAG; |
| 1638 | |
| 1639 | /* For LDO_BUCK_GET_VOLTAGE_LIST. */ |
| 1640 | typedef struct |
| 1641 | { |
| 1642 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1643 | const DCL_UINT32 *pVals; |
| 1644 | DCL_UINT8 size; |
| 1645 | }PMU_CTRL_LDO_BUCK_GET_VOLTAGE_LIST; |
| 1646 | |
| 1647 | /* For LDO_BUCK_SET_LP_MODE_SET command. */ |
| 1648 | typedef struct |
| 1649 | { |
| 1650 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1651 | DCL_BOOL enable; |
| 1652 | }PMU_CTRL_LDO_BUCK_SET_LP_MODE_SET; |
| 1653 | |
| 1654 | /* For LDO_BUCK_SET_LP_SEL command. */ |
| 1655 | typedef struct |
| 1656 | { |
| 1657 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1658 | PMIC_ON_SEL_ENUM onSel; |
| 1659 | }PMU_CTRL_LDO_BUCK_SET_LP_SEL; |
| 1660 | |
| 1661 | /* For LDO_BUCK_GET_LP_MODE. */ |
| 1662 | typedef struct |
| 1663 | { |
| 1664 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1665 | DCL_BOOL enable; |
| 1666 | }PMU_CTRL_LDO_BUCK_GET_LP_MODE; |
| 1667 | |
| 1668 | /* For LDO_BUCK_SET_ON_CTRL command. */ |
| 1669 | typedef struct |
| 1670 | { |
| 1671 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1672 | PMIC_ON_CTRL_ENUM mode; |
| 1673 | }PMU_CTRL_LDO_BUCK_SET_ON_CTRL; |
| 1674 | |
| 1675 | /* For LDO_BUCK_SET_MODESET command. */ |
| 1676 | typedef struct |
| 1677 | { |
| 1678 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1679 | PMU_CTRL_BUCK_LDO_CTRL_MODESET_ENUM mode; |
| 1680 | }PMU_CTRL_LDO_BUCK_SET_MODESET; |
| 1681 | |
| 1682 | typedef struct |
| 1683 | { |
| 1684 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1685 | PMU_CTRL_BUCK_LDO_CTRL_COT_ENUM mode; |
| 1686 | }PMU_CTRL_LDO_BUCK_SET_COT; |
| 1687 | |
| 1688 | typedef struct |
| 1689 | { |
| 1690 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1691 | PMU_CTRL_BUCK_LDO_CTRL_COT_ENUM mode; |
| 1692 | }PMU_CTRL_LDO_BUCK_GET_COT; |
| 1693 | |
| 1694 | /* For LDO_BUCK_SET_EN_CTRL command. */ |
| 1695 | typedef struct |
| 1696 | { |
| 1697 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1698 | PMIC_ON_CTRL_ENUM mode; |
| 1699 | }PMU_CTRL_LDO_BUCK_SET_EN_CTRL; |
| 1700 | |
| 1701 | /* For LDO_BUCK_SET_EN_SEL command. */ |
| 1702 | typedef struct |
| 1703 | { |
| 1704 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1705 | PMIC_SIGNAL_SEL_ENUM sel; |
| 1706 | }PMU_CTRL_LDO_BUCK_SET_EN_SEL; |
| 1707 | |
| 1708 | /* For LDO_BUCK_SET_SRCLK_MODE_SEL command. */ |
| 1709 | typedef struct |
| 1710 | { |
| 1711 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1712 | PMIC_SIGNAL_SEL_ENUM sel; |
| 1713 | }PMU_CTRL_LDO_BUCK_SET_SRCLK_MODE_SEL; |
| 1714 | |
| 1715 | /* For LDO_BUCK_SET_OP_EN command. */ |
| 1716 | typedef struct |
| 1717 | { |
| 1718 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1719 | DCL_BOOL sw_op_en; |
| 1720 | DCL_BOOL hw0_op_en; |
| 1721 | DCL_BOOL hw1_op_en; |
| 1722 | DCL_BOOL hw2_op_en; |
| 1723 | }PMU_CTRL_LDO_BUCK_SET_OP_EN; |
| 1724 | |
| 1725 | /* For LDO_BUCK_CLR_OP_EN command. */ |
| 1726 | typedef struct |
| 1727 | { |
| 1728 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1729 | DCL_BOOL sw_op_en; |
| 1730 | DCL_BOOL hw0_op_en; |
| 1731 | DCL_BOOL hw1_op_en; |
| 1732 | DCL_BOOL hw2_op_en; |
| 1733 | }PMU_CTRL_LDO_BUCK_CLR_OP_EN; |
| 1734 | |
| 1735 | /* For LDO_BUCK_SET_HW_OP_CFG command. */ |
| 1736 | typedef struct |
| 1737 | { |
| 1738 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1739 | PMU_LDO_BUCK_HW_OP_CFG_MODE_ENUM hw0_op_cfg; |
| 1740 | PMU_LDO_BUCK_HW_OP_CFG_MODE_ENUM hw1_op_cfg; |
| 1741 | PMU_LDO_BUCK_HW_OP_CFG_MODE_ENUM hw2_op_cfg; |
| 1742 | }PMU_CTRL_LDO_BUCK_SET_HW_OP_CFG; |
| 1743 | |
| 1744 | /* For LDO_BUCK_CLR_HW_OP_CFG command. */ |
| 1745 | typedef struct |
| 1746 | { |
| 1747 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1748 | PMU_LDO_BUCK_HW_OP_CFG_MODE_ENUM hw0_op_cfg; |
| 1749 | PMU_LDO_BUCK_HW_OP_CFG_MODE_ENUM hw1_op_cfg; |
| 1750 | PMU_LDO_BUCK_HW_OP_CFG_MODE_ENUM hw2_op_cfg; |
| 1751 | }PMU_CTRL_LDO_BUCK_CLR_HW_OP_CFG; |
| 1752 | |
| 1753 | /* For LDO_BUCK_SET_HW_OP_MODE command. */ |
| 1754 | typedef struct |
| 1755 | { |
| 1756 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1757 | PMU_LDO_BUCK_OP_MODE_ENUM hw0_op_mode; |
| 1758 | PMU_LDO_BUCK_OP_MODE_ENUM hw1_op_mode; |
| 1759 | PMU_LDO_BUCK_OP_MODE_ENUM hw2_op_mode; |
| 1760 | }PMU_CTRL_LDO_BUCK_SET_BUCK_HW_OP_MODE; |
| 1761 | |
| 1762 | /* For LDO_BUCK_CLR_HW_OP_MODE command. */ |
| 1763 | typedef struct |
| 1764 | { |
| 1765 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1766 | PMU_LDO_BUCK_OP_MODE_ENUM hw0_op_mode; |
| 1767 | PMU_LDO_BUCK_OP_MODE_ENUM hw1_op_mode; |
| 1768 | PMU_LDO_BUCK_OP_MODE_ENUM hw2_op_mode; |
| 1769 | }PMU_CTRL_LDO_BUCK_CLR_BUCK_HW_OP_MODE; |
| 1770 | |
| 1771 | /* For LDO_BUCK_SET_HW_OP_MODE command. */ |
| 1772 | typedef struct |
| 1773 | { |
| 1774 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1775 | PMU_LDO_BUCK_OP_MODE_ENUM hw0_op_mode; |
| 1776 | PMU_LDO_BUCK_OP_MODE_ENUM hw1_op_mode; |
| 1777 | PMU_LDO_BUCK_OP_MODE_ENUM hw2_op_mode; |
| 1778 | }PMU_CTRL_LDO_BUCK_SET_HW_OP_MODE; |
| 1779 | |
| 1780 | /* For LDO_BUCK_CLR_HW_OP_MODE command. */ |
| 1781 | typedef struct |
| 1782 | { |
| 1783 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1784 | PMU_LDO_BUCK_OP_MODE_ENUM hw0_op_mode; |
| 1785 | PMU_LDO_BUCK_OP_MODE_ENUM hw1_op_mode; |
| 1786 | PMU_LDO_BUCK_OP_MODE_ENUM hw2_op_mode; |
| 1787 | }PMU_CTRL_LDO_BUCK_CLR_HW_OP_MODE; |
| 1788 | |
| 1789 | /* For LDO_BUCK_SET_GO_ON_OP command. */ |
| 1790 | typedef struct |
| 1791 | { |
| 1792 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1793 | PMU_LDO_BUCK_GO_ON_OP_MODE_ENUM mode; |
| 1794 | }PMU_CTRL_LDO_BUCK_SET_GO_ON_OP; |
| 1795 | |
| 1796 | /* For LDO_BUCK_SET_GO_LP_OP command. */ |
| 1797 | typedef struct |
| 1798 | { |
| 1799 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1800 | PMU_LDO_BUCK_GO_LP_OP_MODE_ENUM mode; |
| 1801 | }PMU_CTRL_LDO_BUCK_SET_GO_LP_OP; |
| 1802 | |
| 1803 | /* For LDO_SET_CAL command. */ |
| 1804 | typedef struct |
| 1805 | { |
| 1806 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 1807 | PMU_VOLTAGE_CALIBRATION_ENUM voltage; |
| 1808 | }PMU_CTRL_LDO_SET_CAL; |
| 1809 | |
| 1810 | |
| 1811 | /* For VPA_SET_VOSEL_MAP_EN command. */ |
| 1812 | typedef struct |
| 1813 | { |
| 1814 | PMU_VPA_LIST_ENUM vpa; |
| 1815 | DCL_BOOL enable; |
| 1816 | }PMU_CTRL_VPA_SET_VOSEL_MAP_EN; |
| 1817 | |
| 1818 | /* For VPA_SET_EN command. */ |
| 1819 | typedef struct |
| 1820 | { |
| 1821 | PMU_VPA_LIST_ENUM vpa; |
| 1822 | DCL_BOOL enable; |
| 1823 | }PMU_CTRL_VPA_SET_EN; |
| 1824 | |
| 1825 | /* For VPA_SET_VOLTAGE command. */ |
| 1826 | typedef struct |
| 1827 | { |
| 1828 | PMU_VOLTAGE_ENUM voltage; |
| 1829 | PMU_VPA_ENUM vpaIdx; |
| 1830 | PMU_VPA_LIST_ENUM vpa; |
| 1831 | }PMU_CTRL_VPA_SET_VOLTAGE; |
| 1832 | |
| 1833 | /* For VPA_CTRL_SEL command. */ |
| 1834 | typedef struct |
| 1835 | { |
| 1836 | DCL_BOOL byPASEL; |
| 1837 | }PMU_CTRL_VPA_CTRL_SEL; |
| 1838 | |
| 1839 | /* For VPA_GET_VOLTAGE_LIST command. */ |
| 1840 | typedef struct |
| 1841 | { |
| 1842 | const DCL_UINT32 *pVoltageList; |
| 1843 | DCL_UINT32 number; |
| 1844 | }PMU_CTRL_VPA_GET_VOLTAGE_LIST; |
| 1845 | |
| 1846 | /* For VPA_SET_BAT_LOW command. */ |
| 1847 | typedef struct |
| 1848 | { |
| 1849 | DCL_BOOL enable; |
| 1850 | }PMU_CTRL_VPA_SET_BAT_LOW; |
| 1851 | |
| 1852 | /* For VPA_SET_FPWM command. */ |
| 1853 | typedef struct |
| 1854 | { |
| 1855 | PMU_VPA_LIST_ENUM vpa; |
| 1856 | DCL_BOOL enable; |
| 1857 | }PMU_CTRL_VPA_SET_FPWM; |
| 1858 | |
| 1859 | /* For VPA_SET_VOLTAGE_SELECTION_TABLE command. */ |
| 1860 | typedef struct |
| 1861 | { |
| 1862 | PMU_VPA_ENUM table_entry; |
| 1863 | PMU_VOLTAGE_ENUM voltage; |
| 1864 | }PMU_CTRL_VPA_SET_VOLTAGE_SELECTION_TABLE; |
| 1865 | |
| 1866 | |
| 1867 | /* For VPA_SET_MAP_SEL command. */ |
| 1868 | typedef struct |
| 1869 | { |
| 1870 | PMU_VPA_ENUM table_entry; |
| 1871 | }PMU_CTRL_VPA_SET_MAP_SEL; |
| 1872 | |
| 1873 | /* For VIBR_SET_DIMMING_ON_DUTY command. */ |
| 1874 | typedef struct |
| 1875 | { |
| 1876 | DCL_UINT16 duty; |
| 1877 | }PMU_CTRL_VIBR_SET_DIMMING_ON_DUTY; |
| 1878 | |
| 1879 | /* For VRF18_SET_FPWM command. */ |
| 1880 | typedef struct |
| 1881 | { |
| 1882 | DCL_BOOL enable; |
| 1883 | }PMU_CTRL_VRF18_SET_FPWM; |
| 1884 | |
| 1885 | /* For VRF18_SET_MODESET command. */ |
| 1886 | typedef struct |
| 1887 | { |
| 1888 | PMIC_VRF18_LIST_ENUM vrf18Idx; |
| 1889 | DCL_BOOL enable; |
| 1890 | }PMU_CTRL_VRF18_SET_MODESET; |
| 1891 | |
| 1892 | /* For VRF18_SET_BUCK_LDO_MODE command. */ |
| 1893 | typedef struct |
| 1894 | { |
| 1895 | PMIC_VRF18_LIST_ENUM vrf18Idx; |
| 1896 | PMU_CTRL_BUCK_LDO_CTRL_MODE_ENUM mode; |
| 1897 | }PMU_CTRL_VRF18_SET_BUCK_LDO_MODE; |
| 1898 | |
| 1899 | /* For VRF1_SET_MODESET_CKPDN_SET command. */ |
| 1900 | typedef struct |
| 1901 | { |
| 1902 | DCL_UINT16 regval; |
| 1903 | }PMU_CTRL_VRF1_SET_MODESET_CKPDN_SET; |
| 1904 | |
| 1905 | /* For VRF1_SET_MODESET_CKPDN_CLR command. */ |
| 1906 | typedef struct |
| 1907 | { |
| 1908 | DCL_UINT16 regval; |
| 1909 | }PMU_CTRL_VRF1_SET_MODESET_CKPDN_CLR; |
| 1910 | |
| 1911 | /* For VRF1_GET_MODESET_CKPDN command. */ |
| 1912 | typedef struct |
| 1913 | { |
| 1914 | DCL_UINT16 regval; |
| 1915 | }PMU_CTRL_VRF1_GET_MODESET_CKPDN; |
| 1916 | |
| 1917 | /* For SIMLS_SET_SRST_CONF command. */ |
| 1918 | typedef struct |
| 1919 | { |
| 1920 | PMIC_VSIM_LIST_ENUM vsimIdx; |
| 1921 | DCL_UINT32 regval; |
| 1922 | }PMU_CTRL_SIMLS_SET_SRST_CONF; |
| 1923 | |
| 1924 | /* For SIMLS_SET_SCLK_CONF command. */ |
| 1925 | typedef struct |
| 1926 | { |
| 1927 | PMIC_VSIM_LIST_ENUM vsimIdx; |
| 1928 | DCL_UINT32 regval; |
| 1929 | }PMU_CTRL_SIMLS_SET_SCLK_CONF; |
| 1930 | |
| 1931 | /* For SIMLS_SET_TDSEL command. */ |
| 1932 | typedef struct |
| 1933 | { |
| 1934 | DCL_UINT32 regval; |
| 1935 | }PMU_CTRL_SIMLS_SET_TDSEL; |
| 1936 | |
| 1937 | /* For SIMAP_SET_TDSEL command. */ |
| 1938 | typedef struct |
| 1939 | { |
| 1940 | DCL_UINT32 regval; |
| 1941 | }PMU_CTRL_SIMAP_SET_TDSEL; |
| 1942 | |
| 1943 | /* For SIMLS_SET_RDSEL command. */ |
| 1944 | typedef struct |
| 1945 | { |
| 1946 | DCL_UINT32 regval; |
| 1947 | }PMU_CTRL_SIMLS_SET_RDSEL; |
| 1948 | |
| 1949 | /* For SIMAP_SET_RDSEL command. */ |
| 1950 | typedef struct |
| 1951 | { |
| 1952 | DCL_UINT32 regval; |
| 1953 | }PMU_CTRL_SIMAP_SET_RDSEL; |
| 1954 | |
| 1955 | /* For OCTL_SET_SIM_AP_SRST command. */ |
| 1956 | typedef struct |
| 1957 | { |
| 1958 | PMIC_VSIM_LIST_ENUM vsimIdx; |
| 1959 | DCL_UINT32 regval; |
| 1960 | }PMU_CTRL_OCTL_SET_SIM_AP_SRST; |
| 1961 | |
| 1962 | /* For OCTL_SET_SIM_AP_SCLK command. */ |
| 1963 | typedef struct |
| 1964 | { |
| 1965 | PMIC_VSIM_LIST_ENUM vsimIdx; |
| 1966 | DCL_UINT32 regval; |
| 1967 | }PMU_CTRL_OCTL_SET_SIM_AP_SCLK; |
| 1968 | |
| 1969 | /* For OCTL_SET_SIMLS_SRST command. */ |
| 1970 | typedef struct |
| 1971 | { |
| 1972 | PMIC_VSIM_LIST_ENUM vsimIdx; |
| 1973 | DCL_UINT32 regval; |
| 1974 | }PMU_CTRL_OCTL_SET_SIMLS_SRST; |
| 1975 | |
| 1976 | /* For OCTL_SET_SIMLS_SCLK command. */ |
| 1977 | typedef struct |
| 1978 | { |
| 1979 | PMIC_VSIM_LIST_ENUM vsimIdx; |
| 1980 | DCL_UINT32 regval; |
| 1981 | }PMU_CTRL_OCTL_SET_SIMLS_SCLK; |
| 1982 | |
| 1983 | /* For SIM_SET_STB_SIO_MODE command. */ |
| 1984 | typedef struct |
| 1985 | { |
| 1986 | PMIC_VSIM_LIST_ENUM vsimIdx; |
| 1987 | PMU_CTRL_STB_SIO_CTRL_MODE_ENUM mode; |
| 1988 | }PMU_CTRL_SIM_SET_STB_SIO_MODE; |
| 1989 | |
| 1990 | /* For SIMRST_SET_GPIO_SET command. */ |
| 1991 | typedef struct |
| 1992 | { |
| 1993 | PMIC_VSIM_LIST_ENUM vsimIdx; |
| 1994 | }PMU_CTRL_SIMRST_SET_GPIO_SET; |
| 1995 | |
| 1996 | /* For SIMRST_SET_GPIO_CLR command. */ |
| 1997 | typedef struct |
| 1998 | { |
| 1999 | PMIC_VSIM_LIST_ENUM vsimIdx; |
| 2000 | }PMU_CTRL_SIMRST_SET_GPIO_CLR; |
| 2001 | |
| 2002 | /* For SPK_SET_EN command. */ |
| 2003 | typedef struct |
| 2004 | { |
| 2005 | PMU_SPK_LIST_ENUM spk; |
| 2006 | DCL_BOOL enable; |
| 2007 | PMU_CTRL_STEP_ENUM step; |
| 2008 | }PMU_CTRL_SPK_SET_EN; |
| 2009 | |
| 2010 | /* For SPK_SET_MODE command. */ |
| 2011 | typedef struct |
| 2012 | { |
| 2013 | PMU_SPK_LIST_ENUM spk; |
| 2014 | PMU_CTRL_SPK_MODE_ENUM mode; |
| 2015 | }PMU_CTRL_SPK_SET_MODE; |
| 2016 | |
| 2017 | /* For SPK_GET_MODE command. */ |
| 2018 | typedef struct |
| 2019 | { |
| 2020 | PMU_SPK_LIST_ENUM spk; |
| 2021 | DCL_UINT16 mode; |
| 2022 | }PMU_CTRL_SPK_GET_MODE; |
| 2023 | |
| 2024 | /* For SPK_SET_SLEW_RATE command. */ |
| 2025 | typedef struct |
| 2026 | { |
| 2027 | PMU_SPK_LIST_ENUM spk; |
| 2028 | PMU_CTRL_SPK_MODE_ENUM mode; |
| 2029 | }PMU_CTRL_SPK_SET_SLEW_RATE; |
| 2030 | |
| 2031 | /* For SPK_SET_OC_AUTO_OFF command. */ |
| 2032 | typedef struct |
| 2033 | { |
| 2034 | PMU_SPK_LIST_ENUM spk; |
| 2035 | DCL_BOOL enable; |
| 2036 | }PMU_CTRL_SPK_SET_OC_AUTO_OFF; |
| 2037 | |
| 2038 | /* For SPK_SET_VOL_VALUE command. */ |
| 2039 | typedef struct |
| 2040 | { |
| 2041 | PMU_SPK_LIST_ENUM spk; |
| 2042 | DCL_UINT16 volValue; |
| 2043 | }PMU_CTRL_SPK_SET_VOL_VALUE; |
| 2044 | |
| 2045 | /* For SPK_GET_VOL_VALUE command. */ |
| 2046 | typedef struct |
| 2047 | { |
| 2048 | PMU_SPK_LIST_ENUM spk; |
| 2049 | DCL_UINT16 volValue; |
| 2050 | }PMU_CTRL_SPK_GET_VOL_VALUE; |
| 2051 | |
| 2052 | /* For SPK_GET_VOL command. */ |
| 2053 | typedef struct |
| 2054 | { |
| 2055 | PMU_SPK_LIST_ENUM spk; |
| 2056 | PMU_SPK_VOL_ENUM dbm; |
| 2057 | }PMU_CTRL_SPK_GET_VOL; |
| 2058 | |
| 2059 | /* For SPK_SET_VOL command. */ |
| 2060 | typedef struct |
| 2061 | { |
| 2062 | PMU_SPK_LIST_ENUM spk; |
| 2063 | PMU_SPK_VOL_ENUM dbm; |
| 2064 | }PMU_CTRL_SPK_SET_VOL; |
| 2065 | |
| 2066 | /* For SPK_SET_CALIBR_EN command. */ |
| 2067 | typedef struct |
| 2068 | { |
| 2069 | PMU_SPK_LIST_ENUM spk; |
| 2070 | DCL_BOOL enable; |
| 2071 | }PMU_CTRL_SPK_SET_CALIBR_EN; |
| 2072 | |
| 2073 | /* For SPK_SET_CALIBR_SEL command. */ |
| 2074 | typedef struct |
| 2075 | { |
| 2076 | PMU_SPK_LIST_ENUM spk; |
| 2077 | PMU_CTRL_SPK_CALI_PATH_ENUM path; |
| 2078 | }PMU_CTRL_SPK_SET_CALIBR_SEL; |
| 2079 | |
| 2080 | /* For BL_SET_INIT command. */ |
| 2081 | typedef enum |
| 2082 | { |
| 2083 | BL_VBOOST_VOLTAGE_CONTROLLER_MODE=0, |
| 2084 | BL_VBOOST_CURRENT_CONVERTER_MODE=1, |
| 2085 | BL_ISINK_MODE=2, |
| 2086 | BL_MODE_1=0, |
| 2087 | BL_MODE_2=1, |
| 2088 | BL_MODE_3=2, |
| 2089 | BL_MODE0=0, |
| 2090 | BL_MODE1=1, |
| 2091 | BL_MODE2=2, |
| 2092 | BL_MODE3=3, |
| 2093 | BL_MODE_NUM |
| 2094 | }PMU_CTRL_BL_MODE_ENUM; |
| 2095 | |
| 2096 | /* For BL_SET_INIT command. */ |
| 2097 | typedef struct |
| 2098 | { |
| 2099 | PMU_CTRL_BL_MODE_ENUM blMode; |
| 2100 | }PMU_CTRL_BL_SET_INIT; |
| 2101 | |
| 2102 | /* For BL_SET_EN command. */ |
| 2103 | typedef struct |
| 2104 | { |
| 2105 | DCL_BOOL enable; |
| 2106 | }PMU_CTRL_BL_SET_EN; |
| 2107 | |
| 2108 | /* For BL_GET_SUPPORT_LEVEL command */ |
| 2109 | typedef struct |
| 2110 | { |
| 2111 | DCL_UINT32 blSupportLevel; |
| 2112 | }PMU_CTRL_BL_GET_SUPPORT_LEVEL; |
| 2113 | |
| 2114 | /* For BL_GET_USE_PWM_MODE command */ |
| 2115 | typedef struct |
| 2116 | { |
| 2117 | DCL_UINT32 blUsePwmQuery; |
| 2118 | }PMU_CTRL_BL_GET_USE_PWM_QUERY; |
| 2119 | |
| 2120 | /* For FLASHLED_SET_EN command. */ |
| 2121 | typedef struct |
| 2122 | { |
| 2123 | DCL_BOOL enable; |
| 2124 | }PMU_CTRL_FLASHLED_SET_EN; |
| 2125 | |
| 2126 | /* For FLASHLED_SET_MODE command. */ |
| 2127 | typedef struct |
| 2128 | { |
| 2129 | PMU_CTRL_FLASHLED_MODE_ENUM mode; |
| 2130 | }PMU_CTRL_FLASHLED_SET_MODE; |
| 2131 | |
| 2132 | /* For FLASHLED_SET_SEL command. */ |
| 2133 | typedef struct |
| 2134 | { |
| 2135 | PMU_CTRL_FLASHLED_SEL_ENUM sel; |
| 2136 | }PMU_CTRL_FLASHLED_SET_SEL; |
| 2137 | |
| 2138 | /* For KPLED_SET_EN command. */ |
| 2139 | typedef struct |
| 2140 | { |
| 2141 | DCL_BOOL enable; |
| 2142 | }PMU_CTRL_KPLED_SET_EN; |
| 2143 | |
| 2144 | /* For KPLED_SET_MODE command. */ |
| 2145 | typedef struct |
| 2146 | { |
| 2147 | PMU_CTRL_KPLED_MODE_ENUM mode; |
| 2148 | }PMU_CTRL_KPLED_SET_MODE; |
| 2149 | |
| 2150 | /* For KPLED_SET_SEL command. */ |
| 2151 | typedef struct |
| 2152 | { |
| 2153 | PMU_CTRL_KPLED_SEL_ENUM sel; |
| 2154 | }PMU_CTRL_KPLED_SET_SEL; |
| 2155 | |
| 2156 | /* For KPLED_SET_FREQUENCY_DIVISION command. */ |
| 2157 | typedef struct |
| 2158 | { |
| 2159 | DCL_UINT16 div; |
| 2160 | }PMU_CTRL_KPLED_SET_FREQUENCY_DIVISION; |
| 2161 | |
| 2162 | /* For KPLED_SET_DIMMING_ON_DUTY command. */ |
| 2163 | typedef struct |
| 2164 | { |
| 2165 | DCL_UINT16 duty; |
| 2166 | }PMU_CTRL_KPLED_SET_DIMMING_ON_DUTY; |
| 2167 | |
| 2168 | /* For CHR_SET_ADC_MEASURE_EN command. */ |
| 2169 | typedef struct |
| 2170 | { |
| 2171 | DCL_BOOL enable; |
| 2172 | }PMU_CTRL_CHR_SET_ADC_MEASURE_EN; |
| 2173 | |
| 2174 | /* For CHR_SET_CSDAC_EN command. */ |
| 2175 | typedef struct |
| 2176 | { |
| 2177 | DCL_BOOL enable; |
| 2178 | }PMU_CTRL_CHR_SET_CSDAC_EN; |
| 2179 | |
| 2180 | /* For CHR_SET_CHR_EN command. */ |
| 2181 | typedef struct |
| 2182 | { |
| 2183 | DCL_BOOL enable; |
| 2184 | }PMU_CTRL_CHR_SET_CHR_EN; |
| 2185 | |
| 2186 | /* For CHR_SET_CHR_FORCE_EN command. */ |
| 2187 | typedef struct |
| 2188 | { |
| 2189 | DCL_BOOL enable; |
| 2190 | }PMU_CTRL_CHR_SET_CHR_FORCE_EN; |
| 2191 | |
| 2192 | /* For CHR_GET_CHR_CURRENT command. */ |
| 2193 | typedef struct |
| 2194 | { |
| 2195 | PMU_CHR_CURRENT_ENUM current; |
| 2196 | }PMU_CTRL_CHR_GET_CHR_CURRENT; |
| 2197 | |
| 2198 | /* For CHR_GET_CHR_CURRENT_LIST command. */ |
| 2199 | typedef struct |
| 2200 | { |
| 2201 | const DCL_UINT32 *pCurrentList; |
| 2202 | DCL_UINT32 number; |
| 2203 | }PMU_CTRL_CHR_GET_CHR_CURRENT_LIST; |
| 2204 | |
| 2205 | /* For CHR_SET_CHR_CURRENT command. */ |
| 2206 | typedef struct |
| 2207 | { |
| 2208 | PMU_CHR_CURRENT_ENUM current; |
| 2209 | }PMU_CTRL_CHR_SET_CHR_CURRENT; |
| 2210 | |
| 2211 | /* For CHR_GET_CHR_DET_STATUS command. */ |
| 2212 | typedef struct |
| 2213 | { |
| 2214 | DCL_BOOL enable; |
| 2215 | }PMU_CTRL_CHR_GET_CHR_DET_STATUS; |
| 2216 | |
| 2217 | /* For CHR_GET_CV_DETECTION_STATUS command. */ |
| 2218 | typedef struct |
| 2219 | { |
| 2220 | DCL_BOOL enable; |
| 2221 | }PMU_CTRL_CHR_GET_CV_DETECTION_STATUS; |
| 2222 | |
| 2223 | /* For CHR_SET_CV_DETECTION_EN command. */ |
| 2224 | typedef struct |
| 2225 | { |
| 2226 | DCL_BOOL enable; |
| 2227 | }PMU_CTRL_CHR_SET_CV_DETECTION_EN; |
| 2228 | |
| 2229 | /* For CHR_SET_CV_DETECTION_VOLTAGE command. */ |
| 2230 | typedef struct |
| 2231 | { |
| 2232 | PMU_VOLTAGE_ENUM voltage; |
| 2233 | }PMU_CTRL_CHR_SET_CV_DETECTION_VOLTAGE; |
| 2234 | |
| 2235 | /* For CHR_GET_IS_BATTERY_ON command. */ |
| 2236 | typedef struct |
| 2237 | { |
| 2238 | DCL_BOOL enable; |
| 2239 | }PMU_CTRL_CHR_GET_IS_BATTERY_ON; |
| 2240 | |
| 2241 | /* For CHR_GET_IS_CHR_VALID command. */ |
| 2242 | typedef struct |
| 2243 | { |
| 2244 | DCL_BOOL enable; |
| 2245 | }PMU_CTRL_CHR_GET_IS_CHR_VALID; |
| 2246 | |
| 2247 | /* For CHR_SET_WDT_INT_EN command. */ |
| 2248 | typedef struct |
| 2249 | { |
| 2250 | DCL_BOOL enable; |
| 2251 | }PMU_CTRL_CHR_SET_WDT_INT_EN; |
| 2252 | |
| 2253 | /* For CHR_SET_WDT_EN command. */ |
| 2254 | typedef struct |
| 2255 | { |
| 2256 | DCL_BOOL enable; |
| 2257 | }PMU_CTRL_CHR_SET_WDT_EN; |
| 2258 | |
| 2259 | /* For CHR_SET_WDT_TIMER command. */ |
| 2260 | typedef struct |
| 2261 | { |
| 2262 | PMU_CHR_WDT_TD_ENUM secs; |
| 2263 | }PMU_CTRL_CHR_SET_WDT_TIMER; |
| 2264 | |
| 2265 | /* For CHR_SET_HV_DETECTION_VOLTAGE command. */ |
| 2266 | typedef struct |
| 2267 | { |
| 2268 | PMU_VOLTAGE_ENUM voltage; |
| 2269 | }PMU_CTRL_CHR_SET_HV_DETECTION_VOLTAGE; |
| 2270 | |
| 2271 | /* For CHR_GET_HV_DETECTION_VOLTAGE_LIST command. */ |
| 2272 | typedef struct |
| 2273 | { |
| 2274 | const DCL_UINT32 *pVoltageList; |
| 2275 | DCL_UINT32 number; |
| 2276 | }PMU_CTRL_CHR_GET_HV_DETECTION_VOLTAGE_LIST; |
| 2277 | |
| 2278 | /* For CHR_SET_VBAT_OV_DETECTION_VOLTAGE command. */ |
| 2279 | typedef struct |
| 2280 | { |
| 2281 | PMU_VOLTAGE_ENUM voltage; |
| 2282 | }PMU_CTRL_CHR_SET_VBAT_OV_DETECTION_VOLTAGE; |
| 2283 | |
| 2284 | /* For CHR_SET_BAT_HT_EN command. */ |
| 2285 | typedef struct |
| 2286 | { |
| 2287 | DCL_BOOL enable; |
| 2288 | }PMU_CTRL_CHR_SET_BAT_HT_EN; |
| 2289 | |
| 2290 | /* For CHR_SET_OTG_BVALID_EN command. */ |
| 2291 | typedef struct |
| 2292 | { |
| 2293 | DCL_BOOL enable; |
| 2294 | }PMU_CTRL_CHR_SET_OTG_BVALID_EN; |
| 2295 | |
| 2296 | /* For CHR_SET_BC11_PULLUP_EN command. */ |
| 2297 | typedef struct |
| 2298 | { |
| 2299 | DCL_BOOL enable; |
| 2300 | }PMU_CTRL_CHR_SET_BC11_PULLUP_EN; |
| 2301 | |
| 2302 | /* For CHR_SET_CV_MODE command. */ |
| 2303 | typedef struct |
| 2304 | { |
| 2305 | DCL_BOOL enable; |
| 2306 | }PMU_CTRL_CHR_SET_CV_MODE; |
| 2307 | |
| 2308 | /* For CHR_SET_CSDAC_MODE command. */ |
| 2309 | typedef struct |
| 2310 | { |
| 2311 | DCL_BOOL enable; |
| 2312 | }PMU_CTRL_CHR_SET_CSDAC_MODE; |
| 2313 | |
| 2314 | /* For CHR_SET_TRACKING_EN command. */ |
| 2315 | typedef struct |
| 2316 | { |
| 2317 | DCL_BOOL enable; |
| 2318 | }PMU_CTRL_CHR_SET_TRACKING_EN; |
| 2319 | |
| 2320 | /* For CHR_SET_HWCV_EN command. */ |
| 2321 | typedef struct |
| 2322 | { |
| 2323 | DCL_BOOL enable; |
| 2324 | }PMU_CTRL_CHR_SET_HWCV_EN; |
| 2325 | |
| 2326 | /* For CHR_SET_ULC_DET_EN command. */ |
| 2327 | typedef struct |
| 2328 | { |
| 2329 | DCL_BOOL enable; |
| 2330 | }PMU_CTRL_CHR_SET_ULC_DET_EN; |
| 2331 | |
| 2332 | /* For CHR_SET_LOW_ICH_DB command. */ |
| 2333 | typedef struct |
| 2334 | { |
| 2335 | DCL_UINT16 debounceTime; |
| 2336 | }PMU_CTRL_CHR_SET_LOW_ICH_DB; |
| 2337 | |
| 2338 | /* For CHR_SET_VBAT_CV_CALIBRATION command. */ |
| 2339 | typedef struct |
| 2340 | { |
| 2341 | DCL_INT32 vbat; |
| 2342 | }PMU_CTRL_CHR_SET_VBAT_CV_CALIBRATION; |
| 2343 | |
| 2344 | /* For CHR_GET_CC_DET command. */ |
| 2345 | typedef struct |
| 2346 | { |
| 2347 | DCL_BOOL vbat_cc_det; |
| 2348 | }PMU_CTRL_CHR_GET_CC_DET; |
| 2349 | |
| 2350 | /* For BOOST_SET_EN command. */ |
| 2351 | typedef struct |
| 2352 | { |
| 2353 | PMU_BOOST_LIST_ENUM boost; |
| 2354 | DCL_BOOL enable; |
| 2355 | }PMU_CTRL_BOOST_SET_EN; |
| 2356 | |
| 2357 | /* For BOOST_SET_CURRENT_LIMIT command. */ |
| 2358 | typedef struct |
| 2359 | { |
| 2360 | PMU_BOOST_LIST_ENUM boost; |
| 2361 | DCL_BOOL currentLimit; |
| 2362 | }PMU_CTRL_BOOST_SET_CURRENT_LIMIT; |
| 2363 | |
| 2364 | /* For BOOST_SET_CLK_CAL command. */ |
| 2365 | typedef struct |
| 2366 | { |
| 2367 | PMU_BOOST_LIST_ENUM boost; |
| 2368 | DCL_BOOL clkCal; |
| 2369 | }PMU_CTRL_BOOST_SET_CLK_CAL; |
| 2370 | |
| 2371 | /* For BOOST_SET_SYNC_EN command. */ |
| 2372 | typedef struct |
| 2373 | { |
| 2374 | PMU_BOOST_LIST_ENUM boost; |
| 2375 | DCL_BOOL enable; |
| 2376 | }PMU_CTRL_BOOST_SET_SYNC_EN; |
| 2377 | |
| 2378 | /* For BOOST_SET_VOLTAGE command. */ |
| 2379 | typedef struct |
| 2380 | { |
| 2381 | PMU_BOOST_LIST_ENUM boost; |
| 2382 | PMU_VOLTAGE_ENUM voltage; |
| 2383 | }PMU_CTRL_BOOST_SET_VOLTAGE; |
| 2384 | |
| 2385 | /* For BOOST_SET_LEVEL command. */ |
| 2386 | typedef struct |
| 2387 | { |
| 2388 | PMU_BOOST_LIST_ENUM boost; |
| 2389 | DCL_UINT16 level; |
| 2390 | }PMU_CTRL_BOOST_SET_LEVEL; |
| 2391 | |
| 2392 | /* For ISINK_SET_EN command. */ |
| 2393 | typedef struct |
| 2394 | { |
| 2395 | PMU_ISINK_LIST_ENUM isink; |
| 2396 | DCL_BOOL enable; |
| 2397 | }PMU_CTRL_ISINK_SET_EN; |
| 2398 | |
| 2399 | /* For ISINK_SET_MODE command. */ |
| 2400 | typedef struct |
| 2401 | { |
| 2402 | PMU_ISINK_LIST_ENUM isink; |
| 2403 | PMU_CTRL_ISINK_MODE_ENUM mode; |
| 2404 | }PMU_CTRL_ISINK_SET_MODE; |
| 2405 | |
| 2406 | /* For ISINK_SET_STEP command. */ |
| 2407 | typedef struct |
| 2408 | { |
| 2409 | PMU_ISINK_LIST_ENUM isink; |
| 2410 | PMU_CTRL_ISINK_STEP_ENUM step; |
| 2411 | }PMU_CTRL_ISINK_SET_STEP; |
| 2412 | |
| 2413 | /* For ISINK_SET_STEP command. */ |
| 2414 | typedef struct |
| 2415 | { |
| 2416 | PMU_ISINK_LIST_ENUM isink; |
| 2417 | DCL_BOOL forceOff; |
| 2418 | }PMU_CTRL_ISINK_SET_FORCE_OFF; |
| 2419 | |
| 2420 | /* For ISINK_SET_DIMMING_ON_DUTY command. */ |
| 2421 | typedef struct |
| 2422 | { |
| 2423 | PMU_ISINK_LIST_ENUM isink; |
| 2424 | DCL_UINT16 duty; |
| 2425 | }PMU_CTRL_ISINK_SET_DIMMING_ON_DUTY; |
| 2426 | |
| 2427 | /* For ISINK_SET_FREQUENCY_DIVISION command. */ |
| 2428 | typedef struct |
| 2429 | { |
| 2430 | PMU_ISINK_LIST_ENUM isink; |
| 2431 | DCL_UINT16 div; |
| 2432 | }PMU_CTRL_ISINK_SET_FREQUENCY_DIVISION; |
| 2433 | |
| 2434 | /* For ADC_SET_RQST command. */ |
| 2435 | typedef struct |
| 2436 | { |
| 2437 | DCL_BOOL enable; |
| 2438 | |
| 2439 | }PMU_CTRL_ADC_SET_RQST; |
| 2440 | |
| 2441 | /* For ADC_CLR_RQST command. */ |
| 2442 | typedef struct |
| 2443 | { |
| 2444 | DCL_BOOL enable; |
| 2445 | |
| 2446 | }PMU_CTRL_ADC_CLR_RQST; |
| 2447 | |
| 2448 | /* For ADC_GET_RDY_MD command. */ |
| 2449 | typedef struct |
| 2450 | { |
| 2451 | DCL_BOOL status; |
| 2452 | }PMU_CTRL_ADC_GET_RDY_MD; |
| 2453 | |
| 2454 | /* For ADC_GET_OUT_MD command. */ |
| 2455 | typedef struct |
| 2456 | { |
| 2457 | DCL_UINT32 data; |
| 2458 | }PMU_CTRL_ADC_GET_OUT_MD; |
| 2459 | |
| 2460 | /* For TOP_SET_SRCLKEN_IN_EN command. */ |
| 2461 | typedef struct |
| 2462 | { |
| 2463 | PMIC_TOP_SRCLKEN_IN_LIST_ENUM mod; |
| 2464 | PMIC_SRCLKEN_IN_EN_ENUM mode; |
| 2465 | }PMU_CTRL_TOP_SET_SRCLKEN_IN_EN; |
| 2466 | |
| 2467 | /* For TOP_SET_SRCLKEN_IN_MODE command. */ |
| 2468 | typedef struct |
| 2469 | { |
| 2470 | PMIC_TOP_SRCLKEN_IN_LIST_ENUM mod; |
| 2471 | PMIC_SRCLKEN_IN_MODE_ENUM mode; |
| 2472 | }PMU_CTRL_TOP_SET_SRCLKEN_IN_MODE; |
| 2473 | |
| 2474 | /* For DCXO_SET_REGISTER_VALUE command. */ |
| 2475 | typedef struct |
| 2476 | { |
| 2477 | DCL_UINT32 offset; |
| 2478 | DCL_UINT16 value; |
| 2479 | }PMU_CTRL_DCXO_SET_REGISTER_VALUE; |
| 2480 | |
| 2481 | /* For DCXO_GET_REGISTER_VALUE command. */ |
| 2482 | typedef struct |
| 2483 | { |
| 2484 | DCL_UINT32 offset; |
| 2485 | DCL_UINT16 value; |
| 2486 | }PMU_CTRL_DCXO_GET_REGISTER_VALUE; |
| 2487 | |
| 2488 | /* For MISC_BLED_EN command. */ |
| 2489 | typedef struct |
| 2490 | { |
| 2491 | DCL_BOOL enable; |
| 2492 | }PMU_CTRL_MISC_SET_BLED_EN; |
| 2493 | |
| 2494 | /* For MISC_RLED_EN command. */ |
| 2495 | typedef struct |
| 2496 | { |
| 2497 | DCL_BOOL enable; |
| 2498 | }PMU_CTRL_MISC_SET_RLED_EN; |
| 2499 | |
| 2500 | /* For MISC_GLED_EN command. */ |
| 2501 | typedef struct |
| 2502 | { |
| 2503 | DCL_BOOL enable; |
| 2504 | }PMU_CTRL_MISC_SET_GLED_EN; |
| 2505 | |
| 2506 | /* For MISC_GET_CID command. */ |
| 2507 | typedef struct |
| 2508 | { |
| 2509 | DCL_UINT32 cid_value; |
| 2510 | }PMU_CTRL_MISC_GET_CID; |
| 2511 | |
| 2512 | /* For MISC_GET_ECO_VERSION command. */ |
| 2513 | typedef struct |
| 2514 | { |
| 2515 | DCL_UINT32 eco_version; |
| 2516 | }PMU_CTRL_MISC_GET_ECO_VERSION; |
| 2517 | |
| 2518 | /* For MISC_GET_HW_VERSION command. */ |
| 2519 | typedef struct |
| 2520 | { |
| 2521 | PMIC_CHIP_LIST_ENUM chip_name; |
| 2522 | DCL_UINT32 version; |
| 2523 | }PMU_CTRL_MISC_GET_HW_VERSION; |
| 2524 | |
| 2525 | /* For MISC_SET_REGISTER_VALUE command. */ |
| 2526 | typedef struct |
| 2527 | { |
| 2528 | DCL_UINT32 offset; |
| 2529 | DCL_UINT16 value; |
| 2530 | }PMU_CTRL_MISC_SET_REGISTER_VALUE; |
| 2531 | |
| 2532 | /* For MISC_GET_REGISTER_VALUE command. */ |
| 2533 | typedef struct |
| 2534 | { |
| 2535 | DCL_UINT32 offset; |
| 2536 | DCL_UINT16 value; |
| 2537 | }PMU_CTRL_MISC_GET_REGISTER_VALUE; |
| 2538 | |
| 2539 | /* internal use for buck and ldo. */ |
| 2540 | typedef struct |
| 2541 | { |
| 2542 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 2543 | }PMU_CTRL_LDO_BUCK_CTRL; |
| 2544 | |
| 2545 | /* For LDO_BUCK_SET_VOCAL command. */ |
| 2546 | typedef struct |
| 2547 | { |
| 2548 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 2549 | DCL_UINT16 value; |
| 2550 | }PMU_CTRL_LDO_BUCK_SET_VOCAL; |
| 2551 | |
| 2552 | /* For LDO_BUCK_GET_VOCAL command. */ |
| 2553 | typedef struct |
| 2554 | { |
| 2555 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 2556 | DCL_UINT16 value; |
| 2557 | }PMU_CTRL_LDO_BUCK_GET_VOCAL; |
| 2558 | |
| 2559 | /* For LDO_BUCK_SET_VOTRIM command. */ |
| 2560 | typedef struct |
| 2561 | { |
| 2562 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 2563 | DCL_UINT16 value; |
| 2564 | }PMU_CTRL_LDO_BUCK_SET_VOTRIM; |
| 2565 | |
| 2566 | /* For LDO_BUCK_GET_VOTRIM command. */ |
| 2567 | typedef struct |
| 2568 | { |
| 2569 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 2570 | DCL_UINT16 value; |
| 2571 | }PMU_CTRL_LDO_BUCK_GET_VOTRIM; |
| 2572 | |
| 2573 | /* For LDO_BUCK_SET_VPA_OC_SDN_STATUS command. */ |
| 2574 | typedef struct |
| 2575 | { |
| 2576 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 2577 | DCL_UINT16 value; |
| 2578 | }PMU_CTRL_LDO_BUCK_SET_VPA_OC_SDN_STATUS; |
| 2579 | |
| 2580 | /* For LDO_BUCK_GET_VPA_OC_SDN_STATUS command. */ |
| 2581 | typedef struct |
| 2582 | { |
| 2583 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 2584 | DCL_UINT16 value; |
| 2585 | }PMU_CTRL_LDO_BUCK_GET_VPA_OC_SDN_STATUS; |
| 2586 | |
| 2587 | /* For LDO_BUCK_SET_VPA_OC_SDN_EN command. */ |
| 2588 | typedef struct |
| 2589 | { |
| 2590 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 2591 | DCL_UINT16 value; |
| 2592 | }PMU_CTRL_LDO_BUCK_SET_VPA_OC_SDN_EN; |
| 2593 | |
| 2594 | /* For LDO_BUCK_GET_VPA_OC_SDN_EN command. */ |
| 2595 | typedef struct |
| 2596 | { |
| 2597 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 2598 | DCL_UINT16 value; |
| 2599 | }PMU_CTRL_LDO_BUCK_GET_VPA_OC_SDN_EN; |
| 2600 | |
| 2601 | /* For LDO_BUCK_SET_OP_MODE command. */ |
| 2602 | typedef struct |
| 2603 | { |
| 2604 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 2605 | DCL_UINT16 value; |
| 2606 | }PMU_CTRL_LDO_BUCK_SET_OP_MODE; |
| 2607 | |
| 2608 | /* For LDO_BUCK_SET_VOTER_VOLTAGE command. */ |
| 2609 | typedef struct |
| 2610 | { |
| 2611 | PMU_LDO_BUCK_LIST_ENUM mod; |
| 2612 | DCL_UINT16 value; |
| 2613 | }PMU_CTRL_LDO_BUCK_SET_VOTER_VOLTAGE; |
| 2614 | |
| 2615 | /******************************************************************************* |
| 2616 | * DCL_CTRL_DATA_T: Define the Control data structure for each module's command |
| 2617 | *******************************************************************************/ |
| 2618 | #ifdef __BUILD_DOM__ |
| 2619 | /* The PMU Command Parameter Data Structure for Each Command in DCL_CTRL_DATA_T Enum of dcl.h */ |
| 2620 | typedef struct |
| 2621 | { |
| 2622 | PMU_CTRL_LDO_BUCK_CTRL rPMULdoBuckCtrl; /* Data Structure for Internal Use*/ |
| 2623 | PMU_CTRL_LDO_BUCK_SET_EN rPMULdoBuckSetEn; /* Data Structure for LDO_BUCK_SET_EN */ |
| 2624 | PMU_CTRL_LDO_BUCK_GET_EN_STATUS rPMULdoBuckGetEnStatus; /* Data Structure for LDO_BUCK_GET_EN_STATUS */ |
| 2625 | PMU_CTRL_LDO_BUCK_GET_QI_MODE rPMULdoBuckGetQiMode; /* Data Structure for LDO_BUCK_GET_QI_MODE */ |
| 2626 | PMU_CTRL_LDO_BUCK_SET_EN_FORCE rPMULdoBuckSetEnForce; /* Data Structure for LDO_BUCK_SET_EN_FORCE */ |
| 2627 | PMU_CTRL_LDO_BUCK_SET_VOLTAGE rPMULdoBuckSetVoltage; /* Data Structure for LDO_BUCK_SET_VOLTAGE */ |
| 2628 | PMU_CTRL_LDO_BUCK_SET_VOLTAGE_EN rPMULdoBuckSetVoltageEn; /* Data Structure for LDO_BUCK_SET_VOLTAGE_EN */ |
| 2629 | PMU_CTRL_LDO_BUCK_SET_SLEEP_VOLTAGE rPMULdoBuckSetSleepVoltage; /* Data Structure for LDO_BUCK_SET_SLEEP_VOLTAGE */ |
| 2630 | PMU_CTRL_LDO_BUCK_SET_BURST_THRESHOLD rPMULdoBuckSetBurstThreshold; /* Data Structure for LDO_BUCK_SET_BURST_THRESHOLD */ |
| 2631 | PMU_CTRL_LDO_BUCK_SET_CURRENT_LIMIT rPMULdoBuckSetCurrentLimit; /* Data Structure for LDO_BUCK_SET_CURRENT_LIMIT */ |
| 2632 | PMU_CTRL_LDO_BUCK_SET_VOLTAGE_CALIBRATION_CODE rPMULdoBuckSetVoltageCalibrationCode; /* Data Structure for LDO_BUCK_SET_VOLTAGE_CALIBRATION_CODE */ |
| 2633 | PMU_CTRL_LDO_BUCK_SET_BIAS_CURRENT_CALIBRATION_CODE rPMULdoBuckSetBiasCurrentCalibrationCode; /* Data Structure for LDO_BUCK_SET_BIAS_CURRENT_CALIBRATION_CODE */ |
| 2634 | PMU_CTRL_LDO_BUCK_SET_STB_EN rPMULdoBuckSetStbEn; /* Data Structure for LDO_BUCK_SET_STB_EN */ |
| 2635 | PMU_CTRL_LDO_BUCK_SET_OC_AUTO_OFF rPMULdoBuckSetOcAutoOff; /* Data Structure for LDO_BUCK_SET_OC_AUTO_OFF */ |
| 2636 | PMU_CTRL_LDO_BUCK_SET_RS rPMULdoBuckSetRs; /* Data Structure for LDO_BUCK_SET_RS */ |
| 2637 | PMU_CTRL_LDO_BUCK_SET_ON_SEL rPMULdoBuckSetOnSel; /* Data Structure for LDO_BUCK_SET_ON_SEL */ |
| 2638 | PMU_CTRL_LDO_BUCK_SET_SRCLKEN_SEL rPMULdoBuckSetSrclkenSel; /* Data Structure for LDO_BUCK_SET_SRCLKEN_SEL */ |
| 2639 | PMU_CTRL_LDO_BUCK_SET_STB_TD rPMULdoBuckSetStbTd; /* Data Structure for LDO_BUCK_SET_STB_TD */ |
| 2640 | PMU_CTRL_LDO_BUCK_SET_NDIS_EN rPMULdoBuckSetNdisEn; /* Data Structure for LDO_BUCK_SET_NDIS_EN */ |
| 2641 | PMU_CTRL_LDO_BUCK_SET_OC_TD rPMULdoBuckSetOcTd; /* Data Structure for LDO_BUCK_SET_OC_TD */ |
| 2642 | PMU_CTRL_LDO_BUCK_SET_OCFB_EN rPMULdoBuckSetOcfbEn; /* Data Structure for LDO_BUCK_SET_OCFB_EN */ |
| 2643 | PMU_CTRL_LDO_BUCK_SET_VSIM_GPLDO_EN rPMULdoBuckSetVsimGpldoEn; /* Data Structure for LDO_BUCK_SET_VSIM_GPLDO_EN */ |
| 2644 | PMU_CTRL_LDO_BUCK_SET_VSIM2_GPLDO_EN rPMULdoBuckSetVsim2GpldoEn; /* Data Structure for LDO_BUCK_SET_VSIM2_GPLDO_EN */ |
| 2645 | PMU_CTRL_LDO_BUCK_SET_SIM2_GPIO_EN rPMULdoBuckSetSim2GpioEn; /* Data Structure for LDO_BUCK_SET_SIM2_GPIO_EN */ |
| 2646 | PMU_CTRL_LDO_BUCK_SET_CCI_SRCLKEN rPMULdoBuckSetCciSrclken; /* Data Structure for LDO_BUCK_SET_CCI_SRCLKEN */ |
| 2647 | PMU_CTRL_LDO_BUCK_GET_OC_STATUS rPMULdoBuckGetOcStatus; /* Data Structure for LDO_BUCK_GET_OC_STATUS */ |
| 2648 | PMU_CTRL_LDO_BUCK_GET_QI_OC_STATUS rPMULdoBuckGetQiOcStatus; /* Data Structure for LDO_BUCK_GET_QI_OC_STATUS */ |
| 2649 | PMU_CTRL_LDO_BUCK_SET_OC_INT_EN rPMULdoBuckSetOcIntEn; /* Data Structure for LDO_BUCK_SET_OC_INT_EN */ |
| 2650 | PMU_CTRL_LDO_BUCK_CLEAR_OC_FLAG rPMULdoBuckClearOcFlag; /* Data Structure for LDO_BUCK_CLEAR_OC_FLAG */ |
| 2651 | PMU_CTRL_LDO_BUCK_GET_OC_FLAG rPMULdoBuckGetOcFlag; /* Data Structure for LDO_BUCK_GET_OC_FLAG */ |
| 2652 | PMU_CTRL_LDO_BUCK_GET_VOLTAGE_LIST rPMULdoBuckGetVoltageList; /* Data Structure for LDO_BUCK_GET_VOLTAGE_LIST */ |
| 2653 | PMU_CTRL_LDO_BUCK_SET_THER_SHDN_EN rPMULdoBuckSetTherShdnEn; /* Data Structure for LDO_BUCK_SET_THER_SHDN_EN */ |
| 2654 | PMU_CTRL_LDO_BUCK_SET_LP_MODE_SET rPMULdoBuckSetLpModeSet; /* Data Structure for LDO_BUCK_SET_LP_MODE_SET */ |
| 2655 | PMU_CTRL_LDO_BUCK_SET_LP_SEL rPMULdoBuckSetLpSel; /* Data Structure for LDO_BUCK_SET_LP_SEL */ |
| 2656 | PMU_CTRL_LDO_BUCK_GET_LP_MODE rPMULdoBuckGetLpMode; /* Data Structure for LDO_BUCK_GET_LP_MODE */ |
| 2657 | PMU_CTRL_LDO_BUCK_SET_ON_CTRL rPMULdoBuckSetOnCtrl; /* Data Structure for LDO_BUCK_SET_ON_CTRL */ |
| 2658 | PMU_CTRL_LDO_BUCK_SET_MODESET rPMULdoBuckSetModeset; /* Data Structure for LDO_BUCK_SET_MODESET */ |
| 2659 | PMU_CTRL_LDO_BUCK_SET_COT rPMULdoBuckSetCotset; /* Data Structure for LDO_BUCK_SET_COT */ |
| 2660 | PMU_CTRL_LDO_BUCK_GET_COT rPMULdoBuckGetCot; /* Data Structure for LDO_BUCK_SET_COT */ |
| 2661 | PMU_CTRL_LDO_BUCK_SET_EN_CTRL rPMULdoBuckSetEnCtrl; /* Data Structure for LDO_BUCK_SET_EN_CTRL */ |
| 2662 | PMU_CTRL_LDO_BUCK_SET_EN_SEL rPMULdoBuckSetEnSel; /* Data Structure for LDO_BUCK_SET_EN_SEL */ |
| 2663 | PMU_CTRL_LDO_BUCK_SET_SRCLK_MODE_SEL rPMULdoBuckSetSrclkModeSel; /* Data Structure for LDO_BUCK_SET_SRCLK_MODE_SEL */ |
| 2664 | PMU_CTRL_LDO_BUCK_SET_SRCLK_EN_SEL rPMULdoBuckSetSrclkEnSel; /* Data Structure for LDO_BUCK_SET_SRCLK_EN_SEL */ |
| 2665 | PMU_CTRL_LDO_SET_CAL rPMULdoSetCal; /* Data Structure for LDO_SET_CAL */ |
| 2666 | PMU_CTRL_LDO_BUCK_GET_VOLTAGE rPMULdoBuckGetVolt; /* Data structure for PMU_CTRL_LDO_BUCK_GET_VOLTAGE */ |
| 2667 | PMU_CTRL_LDO_BUCK_GET_VOSEL_CTRL rPMULdoBuckGetVoselCtrl; /* Data structure for PMU_CTRL_LDO_BUCK_GET_VOSEL_CTRL */ |
| 2668 | PMU_CTRL_LDO_BUCK_GET_VOSEL rPMULdoBuckGetVosel; /* Data structure for PMU_CTRL_LDO_BUCK_GET_VOSEL */ |
| 2669 | PMU_CTRL_LDO_BUCK_GET_VOSEL_ON rPMULdoBuckGetVoselOn; /* Data structure for PMU_CTRL_LDO_BUCK_GET_VOSEL_ON */ |
| 2670 | PMU_CTRL_LDO_BUCK_GET_VOSEL_SLEEP rPMULdoBuckGetVoselSleep; /* Data structure for PMU_CTRL_LDO_BUCK_GET_VOSEL_SLEEP */ |
| 2671 | PMU_CTRL_LDO_BUCK_SET_VOSEL_CTRL rPMULdoBuckSetVoselCtrl; /* Data structure for PMU_CTRL_LDO_BUCK_SET_VOSEL_CTRL */ |
| 2672 | PMU_CTRL_LDO_BUCK_SET_VOSEL rPMULdoBuckSetVosel; /* Data structure for PMU_CTRL_LDO_BUCK_SET_VOSEL */ |
| 2673 | PMU_CTRL_LDO_BUCK_SET_VOSEL_ON rPMULdoBuckSetVoselOn; /* Data structure for PMU_CTRL_LDO_BUCK_SET_VOSEL_ON */ |
| 2674 | PMU_CTRL_LDO_BUCK_SET_VOSEL_SLEEP rPMULdoBuckSetVoselSleep; /* Data structure for PMU_CTRL_LDO_BUCK_SET_VOSEL_SLEEP */ |
| 2675 | PMU_CTRL_LDO_SET_VTCXO24_SWITCH_EN rPMULdoBuckSetVtcxoSwith; /* Data structure for PMU_CTRL_LDO_VTCXO24_SWITCH_SET_EN */ |
| 2676 | PMU_CTRL_LDO_BUCK_SET_FPWM rPMULdoBuckSetFpwm; /* Data structure for BUCK SET FPWM */ |
| 2677 | PMU_CTRL_LDO_BUCK_GET_FPWM rPMULdoBuckGetFpwm; /* Data structure for BUCK GET FPWM */ |
| 2678 | PMU_CTRL_VPA_SET_VOSEL_MAP_EN rPMUVpaSetVoselMapEn; /* Data Structure for VPA_SET_VOSEL_MAP_EN */ |
| 2679 | PMU_CTRL_VPA_SET_EN rPMUVpaSetEn; /* Data Structure for VPA_SET_EN */ |
| 2680 | PMU_CTRL_VPA_SET_VOLTAGE rPMUVpaSetVoltage; /* Data Structure for VPA_SET_VOLTAGE */ |
| 2681 | PMU_CTRL_VPA_CTRL_SEL rPMUVpaCtrlSel; /* Data Structure for VPA_CTRL_SEL */ |
| 2682 | PMU_CTRL_VPA_GET_VOLTAGE_LIST rPMUVpaGetVoltageList; /* Data Structure for VPA_GET_VOLTAGE_LIST */ |
| 2683 | PMU_CTRL_VPA_SET_BAT_LOW rPMUVpaSetBatLow; /* Data Structure for VPA_SET_BAT_LOW */ |
| 2684 | PMU_CTRL_VPA_SET_FPWM rPMUVpaSetFpwm; /* Data Structure for VPA_SET_FPWM */ |
| 2685 | PMU_CTRL_VPA_SET_VOLTAGE_SELECTION_TABLE rPMUVpaSetVoltageSelectionTable; /* Data Structure for VPA_SET_VOLTAGE_SELECTION_TABLE */ |
| 2686 | PMU_CTRL_VPA_SET_MAP_SEL rPMUVpaSetMapSel; /* Data Structure for VPA_SET_MAP_SEL */ |
| 2687 | PMU_CTRL_VIBR_SET_DIMMING_ON_DUTY rPMUVibrSetDimmingOnDuty; /* Data Structure for VIBR_SET_DIMMING_ON_DUTY */ |
| 2688 | PMU_CTRL_VRF18_SET_FPWM rPMUVrf18SetFpwm; /* Data Structure for VRF18_SET_FPWM */ |
| 2689 | PMU_CTRL_VRF18_SET_MODESET rPMUVrf18SetModeset; /* Data Structure for VRF18_SET_FPWM */ |
| 2690 | PMU_CTRL_VRF18_SET_BUCK_LDO_MODE rPMUVrf18SetBuckLdoMode; /* Data Structure for VRF18_SET_BUCK_LDO_MODE */ |
| 2691 | PMU_CTRL_VRF1_SET_MODESET_CKPDN_SET rPMUVrf1SetModesetCkpdnSet; /* Data Structure for VRF1_SET_MODESET_CKPDN_SET */ |
| 2692 | PMU_CTRL_VRF1_SET_MODESET_CKPDN_CLR rPMUVrf1SetModesetCkpdnClr; /* Data Structure for VRF1_SET_MODESET_CKPDN_CLR */ |
| 2693 | PMU_CTRL_VRF1_GET_MODESET_CKPDN rPMUVrf1GetModesetCkpdn; /* Data Structure for VRF1_GET_MODESET_CKPDN */ |
| 2694 | PMU_CTRL_SIMLS_SET_SRST_CONF rPMUSimlsSetSrstConf; /* Data Structure for SIMLS_SET_SRST_CONF */ |
| 2695 | PMU_CTRL_SIMLS_SET_SCLK_CONF rPMUSimlsSetSclkConf; /* Data Structure for SIMLS_SET_SCLK_CONF */ |
| 2696 | PMU_CTRL_SIMLS_SET_TDSEL rPMUSimlsSetTdsel; /* Data Structure for SIMLS_SET_TDSEL */ |
| 2697 | PMU_CTRL_SIMAP_SET_TDSEL rPMUSimapSetTdsel; /* Data Structure for SIMAP_SET_TDSEL */ |
| 2698 | PMU_CTRL_SIMLS_SET_RDSEL rPMUSimlsSetRdsel; /* Data Structure for SIMLS_SET_RDSEL */ |
| 2699 | PMU_CTRL_SIMAP_SET_RDSEL rPMUSimapSetRdsel; /* Data Structure for SIMAP_SET_RDSEL */ |
| 2700 | PMU_CTRL_SIM_SET_STB_SIO_MODE rPMUSimSetStbSioMode; /* Data Structure for SIM_SET_STB_SIO_MODE */ |
| 2701 | PMU_CTRL_SIMRST_SET_GPIO_SET rPMUSimrstSetGpioSet; /* Data Structure for SIMRST_SET_GPIO_SET */ |
| 2702 | PMU_CTRL_SIMRST_SET_GPIO_CLR rPMUSimrstSetGpioClr; /* Data Structure for SIMRST_SET_GPIO_CLR */ |
| 2703 | PMU_CTRL_OCTL_SET_SIM_AP_SRST rPMUOctlSetSimApSrst; /* Data Structure for OCTL_SET_SIM_AP_SRST */ |
| 2704 | PMU_CTRL_OCTL_SET_SIM_AP_SCLK rPMUOctlSetSimApSclk; /* Data Structure for OCTL_SET_SIM_AP_SCLK */ |
| 2705 | PMU_CTRL_OCTL_SET_SIMLS_SRST rPMUOctlSetSimlsSrst; /* Data Structure for OCTL_SET_SIMLS_SRST */ |
| 2706 | PMU_CTRL_OCTL_SET_SIMLS_SCLK rPMUOctlSetSimlsSclk; /* Data Structure for OCTL_SET_SIMLS_SCLK */ |
| 2707 | PMU_CTRL_SPK_SET_EN rPMUSpkSetEn; /* Data Structure for SPK_SET_EN */ |
| 2708 | PMU_CTRL_SPK_SET_MODE rPMUSpkSetMode; /* Data Structure for SPK_SET_MODE */ |
| 2709 | PMU_CTRL_SPK_GET_MODE rPMUSpkGetMode; /* Data Structure for SPK_GET_MODE */ |
| 2710 | PMU_CTRL_SPK_SET_OC_AUTO_OFF rPMUSpkSetOcAutoOff; /* Data Structure for SPK_SET_OC_AUTO_OFF */ |
| 2711 | PMU_CTRL_SPK_SET_VOL_VALUE rPMUSpkSetVolValue; /* Data Structure for SPK_SET_VOL_VALUE */ |
| 2712 | PMU_CTRL_SPK_GET_VOL_VALUE rPMUSpkGetVolValue; /* Data Structure for SPK_GET_VOL_VALUE */ |
| 2713 | PMU_CTRL_SPK_SET_VOL rPMUSpkSetVol; /* Data Structure for SPK_SET_VOL */ |
| 2714 | PMU_CTRL_SPK_GET_VOL rPMUSpkGetVol; /* Data Structure for SPK_GET_VOL */ |
| 2715 | PMU_CTRL_SPK_SET_SLEW_RATE rPMUSpkSetSlewRate; /* Data Structure for SPK_SET_SLEW_RATE */ |
| 2716 | PMU_CTRL_SPK_SET_CALIBR_EN rPMUSpkSetCalibrEn; /* Data Structure for SPK_SET_CALIBR_EN */ |
| 2717 | PMU_CTRL_SPK_SET_CALIBR_SEL rPMUSpkSetCalibrSel; /* Data Structure for SPK_SET_CALIBR_SEL */ |
| 2718 | PMU_CTRL_FLASHLED_SET_EN rPMUFlashledSetEn; /* Data Structure for FLASHLED_SET_EN */ |
| 2719 | PMU_CTRL_FLASHLED_SET_MODE rPMUFlashledSetMode; /* Data Structure for FLASHLED_SET_MODE */ |
| 2720 | PMU_CTRL_FLASHLED_SET_SEL rPMUFlashledSetSel; /* Data Structure for FLASHLED_SET_SEL */ |
| 2721 | PMU_CTRL_KPLED_SET_EN rPMUKpledSetEn; /* Data Structure for KPLED_SET_EN */ |
| 2722 | PMU_CTRL_KPLED_SET_MODE rPMUKpledSetMode; /* Data Structure for KPLED_SET_MODE */ |
| 2723 | PMU_CTRL_KPLED_SET_SEL rPMUKpledSetSel; /* Data Structure for KPLED_SET_SEL */ |
| 2724 | PMU_CTRL_KPLED_SET_FREQUENCY_DIVISION rPMUKpledSetFrequencyDivision; /* Data Structure for KPLED_SET_FREQUENCY_DIVISION */ |
| 2725 | PMU_CTRL_KPLED_SET_DIMMING_ON_DUTY rPMUKpledSetDimmingOnDuty; /* Data Structure for KPLED_SET_DIMMING_ON_DUTY */ |
| 2726 | PMU_CTRL_CHR_SET_ADC_MEASURE_EN rPMUChrSetAdcMeasureEn; /* Data Structure for CHR_SET_ADC_MEASURE_EN */ |
| 2727 | PMU_CTRL_CHR_SET_WDT_TIMER rPMUChrSetWdtTimer; /* Data Structure for CHR_SET_WDT_TIMER */ |
| 2728 | PMU_CTRL_CHR_SET_WDT_INT_EN rPMUChrSetWdtIntEn; /* Data Structure for CHR_SET_WDT_INT_EN */ |
| 2729 | PMU_CTRL_CHR_SET_WDT_EN rPMUChrSetWdtEn; /* Data Structure for CHR_SET_WDT_EN */ |
| 2730 | PMU_CTRL_CHR_SET_CHR_EN rPMUChrSetChrEn; /* Data Structure for CHR_SET_CHR_EN */ |
| 2731 | PMU_CTRL_CHR_SET_CHR_FORCE_EN rPMUChrSetChrForceEn; /* Data Structure for CHR_SET_CHR_FORCE_EN */ |
| 2732 | PMU_CTRL_CHR_GET_CHR_DET_STATUS rPMUChrGetChrDetStatus; /* Data Structure for CHR_GET_CHR_DET_STATUS */ |
| 2733 | PMU_CTRL_CHR_GET_CHR_CURRENT rPMUChrGetChrCurrent; /* Data Structure for CHR_GET_CHR_CURRENT */ |
| 2734 | PMU_CTRL_CHR_GET_CHR_CURRENT_LIST rPMUChrGetChrCurrentList; /* Data Structure for CHR_GET_CHR_CURRENT_LIST */ |
| 2735 | PMU_CTRL_CHR_SET_CHR_CURRENT rPMUChrSetChrCurrent; /* Data Structure for CHR_SET_CHR_CURRENT */ |
| 2736 | PMU_CTRL_CHR_GET_CV_DETECTION_STATUS rPMUChrGetCvDetectionStatus; /* Data Structure for CHR_GET_CV_DETECTION_STATUS */ |
| 2737 | PMU_CTRL_CHR_SET_CV_DETECTION_EN rPMUChrSetCvDetectionEn; /* Data Structure for CHR_SET_CV_DETECTION_EN */ |
| 2738 | PMU_CTRL_CHR_SET_CV_DETECTION_VOLTAGE rPMUChrSetCvDetectionVoltage; /* Data Structure for CHR_SET_CV_DETECTION_VOLTAGE */ |
| 2739 | PMU_CTRL_CHR_SET_CSDAC_EN rPMUChrSetCsdacEn; /* Data Structure for CHR_SET_CSDAC_EN */ |
| 2740 | PMU_CTRL_CHR_GET_IS_BATTERY_ON rPMUChrGetIsBatteryOn; /* Data Structure for CHR_GET_IS_BATTERY_ON */ |
| 2741 | PMU_CTRL_CHR_GET_IS_CHR_VALID rPMUChrGetIsChrValid; /* Data Structure for CHR_GET_IS_CHR_VALID */ |
| 2742 | PMU_CTRL_CHR_SET_HV_DETECTION_VOLTAGE rPMUChrSetHvDetectionVoltage; /* Data Structure for CHR_SET_HV_DETECTION_VOLTAGE */ |
| 2743 | PMU_CTRL_CHR_GET_HV_DETECTION_VOLTAGE_LIST rPMUChrGetHvDetectionVoltageList; /* Data Structure for CHR_GET_HV_DETECTION_VOLTAGE_LIST */ |
| 2744 | PMU_CTRL_CHR_SET_VBAT_OV_DETECTION_VOLTAGE rPMUChrSetVbatOvDetectionVoltage; /* Data Structure for CHR_SET_VBAT_OV_DETECTION_VOLTAGE */ |
| 2745 | PMU_CTRL_CHR_SET_BAT_HT_EN rPMUChrSetBatHtEn; /* Data Structure for CHR_SET_BAT_HT_EN */ |
| 2746 | PMU_CTRL_CHR_SET_OTG_BVALID_EN rPMUChrSetOtgBvalidEn; /* Data Structure for CHR_SET_OTG_BVALID_EN */ |
| 2747 | PMU_CTRL_CHR_SET_CV_MODE rPMUChrSetCvMode; /* Data Structure for CHR_SET_CV_MODE */ |
| 2748 | PMU_CTRL_CHR_SET_CSDAC_MODE rPMUChrSetCsdacMode; /* Data Structure for CHR_SET_CSDAC_MODE */ |
| 2749 | PMU_CTRL_CHR_SET_TRACKING_EN rPMUChrSetTrackingEn; /* Data Structure for CHR_SET_TRACKING_EN */ |
| 2750 | PMU_CTRL_CHR_SET_HWCV_EN rPMUChrSetHwcvEn; /* Data Structure for CHR_SET_HWCV_EN */ |
| 2751 | PMU_CTRL_CHR_SET_ULC_DET_EN rPMUChrSetUlcDetEn; /* Data Structure for CHR_SET_ULC_DET_EN */ |
| 2752 | PMU_CTRL_CHR_SET_BC11_PULLUP_EN rPMUChrSetBc11PullupEn; /* Data Structure for CHR_SET_BC11_PULLUP_EN */ |
| 2753 | PMU_CTRL_CHR_SET_LOW_ICH_DB rPMUChrSetLowIchDb; /* Data Structure for CHR_SET_LOW_ICH_DB */ |
| 2754 | PMU_CTRL_CHR_SET_VBAT_CV_CALIBRATION rPMUChrSetVbatCvCalibration; /* Data Structure for CHR_SET_VBAT_CV_CALIBRATION */ |
| 2755 | PMU_CTRL_CHR_GET_CC_DET rPMUChrGetCcDet; /* Data Structure for CHR_GET_CC_DET */ |
| 2756 | PMU_CTRL_BL_SET_EN rPMUBlSetEn; /* Data Structure for BL_SET_EN */ |
| 2757 | PMU_CTRL_BL_SET_INIT rPMUBlSetInit; /* Data Structure for BL_SET_INIT */ |
| 2758 | PMU_CTRL_BL_GET_SUPPORT_LEVEL rPMUBlGetSupportLevel; /* Data Structure for BL_GET_SUPPPORT_LEVEL */ |
| 2759 | PMU_CTRL_BL_GET_USE_PWM_QUERY rPMUBlGetUsePwmQuery; /* Data Structure for BL_GET_USE_PWM_QUERY */ |
| 2760 | PMU_CTRL_BOOST_SET_EN rPMUBoostSetEn; /* Data Structure for BOOST_SET_EN */ |
| 2761 | PMU_CTRL_BOOST_SET_CURRENT_LIMIT rPMUBoostSetCurrentLimit; /* Data Structure for BOOST_SET_CURRENT_LIMIT */ |
| 2762 | PMU_CTRL_BOOST_SET_CLK_CAL rPMUBoostSetClkCal; /* Data Structure for BOOST_SET_CLK_CAL */ |
| 2763 | PMU_CTRL_BOOST_SET_SYNC_EN rPMUBoostSetSyncEn; /* Data Structure for BOOST_SET_SYNC_EN */ |
| 2764 | PMU_CTRL_BOOST_SET_VOLTAGE rPMUBoostSetVoltage; /* Data Structure for BOOST_SET_VOLTAGE */ |
| 2765 | PMU_CTRL_BOOST_SET_LEVEL rPMUBoostSetLevel; /* Data Structure for BOOST_SET_LEVEL */ |
| 2766 | PMU_CTRL_ISINK_SET_EN rPMUIsinkSetEn; /* Data Structure for ISINK_SET_EN */ |
| 2767 | PMU_CTRL_ISINK_SET_MODE rPMUIsinkSetMode; /* Data Structure for ISINK_SET_MODE */ |
| 2768 | PMU_CTRL_ISINK_SET_STEP rPMUIsinkSetStep; /* Data Structure for ISINK_SET_STEP */ |
| 2769 | PMU_CTRL_ISINK_SET_FORCE_OFF rPMUIsinkSetForceOff; /* Data Structure for ISINK_SET_FORCE_OFF */ |
| 2770 | PMU_CTRL_ISINK_SET_DIMMING_ON_DUTY rPMUIsinkSetDimmingOnDuty; /* Data Structure for ISINK_SET_DIMMING_ON_DUTY */ |
| 2771 | PMU_CTRL_ISINK_SET_FREQUENCY_DIVISION rPMUIsinkSetFrequencyDivision; /* Data Structure for ISINK_SET_FREQUENCY_DIVISION */ |
| 2772 | PMU_CTRL_ADC_SET_RQST rPMUAdcSetRqst; /* Data Structure for ADC_SET_RQST */ |
| 2773 | PMU_CTRL_ADC_CLR_RQST rPMUAdcClrRqst; /* Data Structure for ADC_CLR_RQST */ |
| 2774 | PMU_CTRL_ADC_GET_RDY_MD rPMUAdcGetRdyMd; /* Data Structure for ADC_GET_RDY_MD */ |
| 2775 | PMU_CTRL_ADC_GET_OUT_MD rPMUAdcGetOutMd; /* Data Structure for ADC_GET_OUT_MD */ |
| 2776 | PMU_CTRL_MISC_SET_RLED_EN rPMUMiscSetRledEn; /* Data Structure for MISC_SET_RLED_EN */ |
| 2777 | PMU_CTRL_MISC_SET_GLED_EN rPMUMiscSetGledEn; /* Data Structure for MISC_SET_GLED_EN */ |
| 2778 | PMU_CTRL_MISC_SET_BLED_EN rPMUMiscSetBledEn; /* Data Structure for MISC_SET_BLED_EN */ |
| 2779 | PMU_CTRL_MISC_GET_CID rPMUMiscGetCid; /* Data Structure for MISC_GET_CID */ |
| 2780 | PMU_CTRL_MISC_GET_ECO_VERSION rPMUMiscGetEcoVersion; /* Data Structure for MISC_GET_ECO_VERSION */ |
| 2781 | PMU_CTRL_MISC_GET_HW_VERSION rPMUMiscGetHwVersion; /* Data Structure for MISC_GET_HW_VERISON */ |
| 2782 | PMU_CTRL_MISC_SET_REGISTER_VALUE rPMUMiscSetRegisterValue; /* Data Structure for MISC_SET_REGISTER_VALUE */ |
| 2783 | PMU_CTRL_MISC_GET_REGISTER_VALUE rPMUMiscGetRegisterValue; /* Data Structure for MISC_GET_REGISTER_VALUE */ |
| 2784 | PMU_CTRL_LDO_BUCK_SET_OP_EN rPMULdoBuckSetOpEn; |
| 2785 | PMU_CTRL_LDO_BUCK_CLR_OP_EN rPMULdoBuckClrOpEn; |
| 2786 | PMU_CTRL_LDO_BUCK_SET_HW_OP_CFG rPMULdoBuckSetHwOp; |
| 2787 | PMU_CTRL_LDO_BUCK_CLR_HW_OP_CFG rPMULdoBuckClrHwOp; |
| 2788 | PMU_CTRL_LDO_BUCK_SET_GO_ON_OP rPMULdoBuckSetGoOnOp; |
| 2789 | PMU_CTRL_LDO_BUCK_SET_GO_LP_OP rPMULdoBuckSetGoLpOp; |
| 2790 | PMU_CTRL_TOP_SET_SRCLKEN_IN_EN rPMUTopSetSrclkenInEn; |
| 2791 | PMU_CTRL_TOP_SET_SRCLKEN_IN_MODE rPMUTopSetSrclkenInMode; |
| 2792 | PMU_CTRL_DCXO_SET_REGISTER_VALUE rPMUDcxoSetRegisterValue; |
| 2793 | PMU_CTRL_DCXO_GET_REGISTER_VALUE rPMUDcxoGetRegisterValue; |
| 2794 | PMU_CTRL_LDO_BUCK_SET_VOCAL rPMULdoBuckSetVocal; |
| 2795 | PMU_CTRL_LDO_BUCK_GET_VOCAL rPMULdoBuckGetVocal; |
| 2796 | PMU_CTRL_LDO_BUCK_SET_VOTRIM rPMULdoBuckSetVotrim; |
| 2797 | PMU_CTRL_LDO_BUCK_GET_VOTRIM rPMULdoBuckGetVotrim; |
| 2798 | PMU_CTRL_LDO_BUCK_SET_VPA_OC_SDN_STATUS rPMULdoBuckSetVpaOcSdnStatus; |
| 2799 | PMU_CTRL_LDO_BUCK_GET_VPA_OC_SDN_STATUS rPMULdoBuckGetVpaOcSdnStatus; |
| 2800 | PMU_CTRL_LDO_BUCK_SET_VPA_OC_SDN_EN rPMULdoBuckSetVpaOcSdnEn; |
| 2801 | PMU_CTRL_LDO_BUCK_GET_VPA_OC_SDN_EN rPMULdoBuckGetVpaOcSdnEn; |
| 2802 | PMU_CTRL_LDO_BUCK_SET_OP_MODE rPMULdoBuckSetOpMode; |
| 2803 | PMU_CTRL_LDO_BUCK_SET_VOTER_VOLTAGE rPMULdoBuckSetVoterVoltage; |
| 2804 | PMU_CTRL_LDO_BUCK_SET_BUCK_HW_OP_MODE rPMULdoBuckSetBuckHwOpMode; |
| 2805 | PMU_CTRL_LDO_BUCK_CLR_BUCK_HW_OP_MODE rPMULdoBuckClrBuckHwOpMode; |
| 2806 | PMU_CTRL_LDO_BUCK_SET_HW_OP_MODE rPMULdoBuckSetHwOpMode; |
| 2807 | PMU_CTRL_LDO_BUCK_CLR_HW_OP_MODE rPMULdoBuckClrHwOpMode; |
| 2808 | |
| 2809 | }PMU_CTRL_DATA; |
| 2810 | #else /* __BUILD_DOM__ */ |
| 2811 | #define PMU_CTRLS \ |
| 2812 | PMU_CTRL_LDO_BUCK_CTRL rPMULdoBuckCtrl; \ |
| 2813 | PMU_CTRL_LDO_BUCK_SET_EN rPMULdoBuckSetEn; \ |
| 2814 | PMU_CTRL_LDO_BUCK_GET_EN_STATUS rPMULdoBuckGetEnStatus; \ |
| 2815 | PMU_CTRL_LDO_BUCK_GET_QI_MODE rPMULdoBuckGetQiMode; \ |
| 2816 | PMU_CTRL_LDO_BUCK_SET_EN_FORCE rPMULdoBuckSetEnForce; \ |
| 2817 | PMU_CTRL_LDO_BUCK_SET_VOLTAGE rPMULdoBuckSetVoltage; \ |
| 2818 | PMU_CTRL_LDO_BUCK_SET_VOLTAGE_EN rPMULdoBuckSetVoltageEn; \ |
| 2819 | PMU_CTRL_LDO_BUCK_SET_SLEEP_VOLTAGE rPMULdoBuckSetSleepVoltage; \ |
| 2820 | PMU_CTRL_LDO_BUCK_SET_BURST_THRESHOLD rPMULdoBuckSetBurstThreshold; \ |
| 2821 | PMU_CTRL_LDO_BUCK_SET_CURRENT_LIMIT rPMULdoBuckSetCurrentLimit; \ |
| 2822 | PMU_CTRL_LDO_BUCK_SET_VOLTAGE_CALIBRATION_CODE rPMULdoBuckSetVoltageCalibrationCode; \ |
| 2823 | PMU_CTRL_LDO_BUCK_SET_BIAS_CURRENT_CALIBRATION_CODE rPMULdoBuckSetBiasCurrentCalibrationCode; \ |
| 2824 | PMU_CTRL_LDO_BUCK_SET_STB_EN rPMULdoBuckSetStbEn; \ |
| 2825 | PMU_CTRL_LDO_BUCK_SET_OC_AUTO_OFF rPMULdoBuckSetOcAutoOff; \ |
| 2826 | PMU_CTRL_LDO_BUCK_SET_RS rPMULdoBuckSetRs; \ |
| 2827 | PMU_CTRL_LDO_BUCK_SET_ON_SEL rPMULdoBuckSetOnSel; \ |
| 2828 | PMU_CTRL_LDO_BUCK_SET_SRCLKEN_SEL rPMULdoBuckSetSrclkenSel; \ |
| 2829 | PMU_CTRL_LDO_BUCK_SET_STB_TD rPMULdoBuckSetStbTd; \ |
| 2830 | PMU_CTRL_LDO_BUCK_SET_NDIS_EN rPMULdoBuckSetNdisEn; \ |
| 2831 | PMU_CTRL_LDO_BUCK_SET_OC_TD rPMULdoBuckSetOcTd; \ |
| 2832 | PMU_CTRL_LDO_BUCK_SET_OCFB_EN rPMULdoBuckSetOcfbEn; \ |
| 2833 | PMU_CTRL_LDO_BUCK_SET_VSIM_GPLDO_EN rPMULdoBuckSetVsimGpldoEn; \ |
| 2834 | PMU_CTRL_LDO_BUCK_SET_VSIM2_GPLDO_EN rPMULdoBuckSetVsim2GpldoEn; \ |
| 2835 | PMU_CTRL_LDO_BUCK_SET_SIM2_GPIO_EN rPMULdoBuckSetSim2GpioEn; \ |
| 2836 | PMU_CTRL_LDO_BUCK_SET_CCI_SRCLKEN rPMULdoBuckSetCciSrclken; \ |
| 2837 | PMU_CTRL_LDO_BUCK_GET_OC_STATUS rPMULdoBuckGetOcStatus; \ |
| 2838 | PMU_CTRL_LDO_BUCK_GET_QI_OC_STATUS rPMULdoBuckGetQiOcStatus; \ |
| 2839 | PMU_CTRL_LDO_BUCK_SET_OC_INT_EN rPMULdoBuckSetOcIntEn; \ |
| 2840 | PMU_CTRL_LDO_BUCK_CLEAR_OC_FLAG rPMULdoBuckClearOcFlag; \ |
| 2841 | PMU_CTRL_LDO_BUCK_GET_OC_FLAG rPMULdoBuckGetOcFlag; \ |
| 2842 | PMU_CTRL_LDO_BUCK_GET_VOLTAGE_LIST rPMULdoBuckGetVoltageList; \ |
| 2843 | PMU_CTRL_LDO_BUCK_SET_THER_SHDN_EN rPMULdoBuckSetTherShdnEn; \ |
| 2844 | PMU_CTRL_LDO_BUCK_SET_LP_MODE_SET rPMULdoBuckSetLpModeSet; \ |
| 2845 | PMU_CTRL_LDO_BUCK_GET_LP_MODE rPMULdoBuckGetLpMode; \ |
| 2846 | PMU_CTRL_LDO_BUCK_SET_LP_SEL rPMULdoBuckSetLpSel; \ |
| 2847 | PMU_CTRL_LDO_BUCK_SET_ON_CTRL rPMULdoBuckSetOnCtrl; \ |
| 2848 | PMU_CTRL_LDO_BUCK_SET_MODESET rPMULdoBuckSetModeset; \ |
| 2849 | PMU_CTRL_LDO_BUCK_SET_COT rPMULdoBuckSetCotset; \ |
| 2850 | PMU_CTRL_LDO_BUCK_GET_COT rPMULdoBuckGetCot; \ |
| 2851 | PMU_CTRL_LDO_BUCK_SET_EN_CTRL rPMULdoBuckSetEnCtrl; \ |
| 2852 | PMU_CTRL_LDO_BUCK_SET_EN_SEL rPMULdoBuckSetEnSel; \ |
| 2853 | PMU_CTRL_LDO_BUCK_SET_SRCLK_MODE_SEL rPMULdoBuckSetSrclkModeSel; \ |
| 2854 | PMU_CTRL_LDO_BUCK_SET_SRCLK_EN_SEL rPMULdoBuckSetSrclkEnSel; \ |
| 2855 | PMU_CTRL_LDO_SET_CAL rPMULdoSetCal; \ |
| 2856 | PMU_CTRL_LDO_BUCK_GET_VOLTAGE rPMULdoBuckGetVolt; \ |
| 2857 | PMU_CTRL_LDO_BUCK_GET_VOSEL_CTRL rPMULdoBuckGetVoselCtrl; \ |
| 2858 | PMU_CTRL_LDO_BUCK_GET_VOSEL rPMULdoBuckGetVosel; \ |
| 2859 | PMU_CTRL_LDO_BUCK_GET_VOSEL_ON rPMULdoBuckGetVoselOn; \ |
| 2860 | PMU_CTRL_LDO_BUCK_GET_VOSEL_SLEEP rPMULdoBuckGetVoselSleep; \ |
| 2861 | PMU_CTRL_LDO_BUCK_SET_VOSEL_CTRL rPMULdoBuckSetVoselCtrl; \ |
| 2862 | PMU_CTRL_LDO_BUCK_SET_VOSEL rPMULdoBuckSetVosel; \ |
| 2863 | PMU_CTRL_LDO_BUCK_SET_VOSEL_ON rPMULdoBuckSetVoselOn; \ |
| 2864 | PMU_CTRL_LDO_BUCK_SET_VOSEL_SLEEP rPMULdoBuckSetVoselSleep; \ |
| 2865 | PMU_CTRL_LDO_SET_VTCXO24_SWITCH_EN rPMULdoBuckSetVtcxoSwith; \ |
| 2866 | PMU_CTRL_LDO_BUCK_SET_FPWM rPMULdoBuckSetFpwm; \ |
| 2867 | PMU_CTRL_LDO_BUCK_GET_FPWM rPMULdoBuckGetFpwm; \ |
| 2868 | PMU_CTRL_VPA_SET_VOSEL_MAP_EN rPMUVpaSetVoselMapEn; \ |
| 2869 | PMU_CTRL_VPA_SET_EN rPMUVpaSetEn; \ |
| 2870 | PMU_CTRL_VPA_SET_VOLTAGE rPMUVpaSetVoltage; \ |
| 2871 | PMU_CTRL_VPA_CTRL_SEL rPMUVpaCtrlSel; \ |
| 2872 | PMU_CTRL_VPA_GET_VOLTAGE_LIST rPMUVpaGetVoltageList; \ |
| 2873 | PMU_CTRL_VPA_SET_BAT_LOW rPMUVpaSetBatLow; \ |
| 2874 | PMU_CTRL_VPA_SET_FPWM rPMUVpaSetFpwm; \ |
| 2875 | PMU_CTRL_VPA_SET_VOLTAGE_SELECTION_TABLE rPMUVpaSetVoltageSelectionTable; \ |
| 2876 | PMU_CTRL_VPA_SET_MAP_SEL rPMUVpaSetMapSel; \ |
| 2877 | PMU_CTRL_VIBR_SET_DIMMING_ON_DUTY rPMUVibrSetDimmingOnDuty; \ |
| 2878 | PMU_CTRL_VRF18_SET_FPWM rPMUVrf18SetFpwm; \ |
| 2879 | PMU_CTRL_VRF18_SET_MODESET rPMUVrf18SetModeset; \ |
| 2880 | PMU_CTRL_VRF18_SET_BUCK_LDO_MODE rPMUVrf18SetBuckLdoMode; \ |
| 2881 | PMU_CTRL_VRF1_SET_MODESET_CKPDN_SET rPMUVrf1SetModesetCkpdnSet; \ |
| 2882 | PMU_CTRL_VRF1_SET_MODESET_CKPDN_CLR rPMUVrf1SetModesetCkpdnClr; \ |
| 2883 | PMU_CTRL_VRF1_GET_MODESET_CKPDN rPMUVrf1GetModesetCkpdn; \ |
| 2884 | PMU_CTRL_SIMLS_SET_SRST_CONF rPMUSimlsSetSrstConf; \ |
| 2885 | PMU_CTRL_SIMLS_SET_SCLK_CONF rPMUSimlsSetSclkConf; \ |
| 2886 | PMU_CTRL_SIMLS_SET_TDSEL rPMUSimlsSetTdsel; \ |
| 2887 | PMU_CTRL_SIMAP_SET_TDSEL rPMUSimapSetTdsel; \ |
| 2888 | PMU_CTRL_SIMLS_SET_RDSEL rPMUSimlsSetRdsel; \ |
| 2889 | PMU_CTRL_SIMAP_SET_RDSEL rPMUSimapSetRdsel; \ |
| 2890 | PMU_CTRL_SIM_SET_STB_SIO_MODE rPMUSimSetStbSioMode; \ |
| 2891 | PMU_CTRL_SIMRST_SET_GPIO_SET rPMUSimrstSetGpioSet; \ |
| 2892 | PMU_CTRL_SIMRST_SET_GPIO_CLR rPMUSimrstSetGpioClr; \ |
| 2893 | PMU_CTRL_OCTL_SET_SIM_AP_SRST rPMUOctlSetSimApSrst; \ |
| 2894 | PMU_CTRL_OCTL_SET_SIM_AP_SCLK rPMUOctlSetSimApSclk; \ |
| 2895 | PMU_CTRL_OCTL_SET_SIMLS_SRST rPMUOctlSetSimlsSrst; \ |
| 2896 | PMU_CTRL_OCTL_SET_SIMLS_SCLK rPMUOctlSetSimlsSclk; \ |
| 2897 | PMU_CTRL_SPK_SET_EN rPMUSpkSetEn; \ |
| 2898 | PMU_CTRL_SPK_SET_MODE rPMUSpkSetMode; \ |
| 2899 | PMU_CTRL_SPK_GET_MODE rPMUSpkGetMode; \ |
| 2900 | PMU_CTRL_SPK_SET_OC_AUTO_OFF rPMUSpkSetOcAutoOff; \ |
| 2901 | PMU_CTRL_SPK_SET_VOL_VALUE rPMUSpkSetVolValue; \ |
| 2902 | PMU_CTRL_SPK_GET_VOL_VALUE rPMUSpkGetVolValue; \ |
| 2903 | PMU_CTRL_SPK_SET_VOL rPMUSpkSetVol; \ |
| 2904 | PMU_CTRL_SPK_GET_VOL rPMUSpkGetVol; \ |
| 2905 | PMU_CTRL_SPK_SET_SLEW_RATE rPMUSpkSetSlewRate; \ |
| 2906 | PMU_CTRL_SPK_SET_CALIBR_EN rPMUSpkSetCalibrEn; \ |
| 2907 | PMU_CTRL_SPK_SET_CALIBR_SEL rPMUSpkSetCalibrSel; \ |
| 2908 | PMU_CTRL_FLASHLED_SET_EN rPMUFlashledSetEn; \ |
| 2909 | PMU_CTRL_FLASHLED_SET_MODE rPMUFlashledSetMode; \ |
| 2910 | PMU_CTRL_FLASHLED_SET_SEL rPMUFlashledSetSel; \ |
| 2911 | PMU_CTRL_KPLED_SET_EN rPMUKpledSetEn; \ |
| 2912 | PMU_CTRL_KPLED_SET_MODE rPMUKpledSetMode; \ |
| 2913 | PMU_CTRL_KPLED_SET_SEL rPMUKpledSetSel; \ |
| 2914 | PMU_CTRL_KPLED_SET_FREQUENCY_DIVISION rPMUKpledSetFrequencyDivision; \ |
| 2915 | PMU_CTRL_KPLED_SET_DIMMING_ON_DUTY rPMUKpledSetDimmingOnDuty; \ |
| 2916 | PMU_CTRL_CHR_SET_ADC_MEASURE_EN rPMUChrSetAdcMeasureEn; \ |
| 2917 | PMU_CTRL_CHR_SET_WDT_TIMER rPMUChrSetWdtTimer; \ |
| 2918 | PMU_CTRL_CHR_SET_WDT_INT_EN rPMUChrSetWdtIntEn; \ |
| 2919 | PMU_CTRL_CHR_SET_WDT_EN rPMUChrSetWdtEn; \ |
| 2920 | PMU_CTRL_CHR_SET_CHR_EN rPMUChrSetChrEn; \ |
| 2921 | PMU_CTRL_CHR_SET_CHR_FORCE_EN rPMUChrSetChrForceEn; \ |
| 2922 | PMU_CTRL_CHR_GET_CHR_DET_STATUS rPMUChrGetChrDetStatus; \ |
| 2923 | PMU_CTRL_CHR_GET_CHR_CURRENT rPMUChrGetChrCurrent; \ |
| 2924 | PMU_CTRL_CHR_GET_CHR_CURRENT_LIST rPMUChrGetChrCurrentList; \ |
| 2925 | PMU_CTRL_CHR_SET_CHR_CURRENT rPMUChrSetChrCurrent; \ |
| 2926 | PMU_CTRL_CHR_GET_CV_DETECTION_STATUS rPMUChrGetCvDetectionStatus; \ |
| 2927 | PMU_CTRL_CHR_SET_CV_DETECTION_EN rPMUChrSetCvDetectionEn; \ |
| 2928 | PMU_CTRL_CHR_SET_CV_DETECTION_VOLTAGE rPMUChrSetCvDetectionVoltage; \ |
| 2929 | PMU_CTRL_CHR_SET_CSDAC_EN rPMUChrSetCsdacEn; \ |
| 2930 | PMU_CTRL_CHR_GET_IS_BATTERY_ON rPMUChrGetIsBatteryOn; \ |
| 2931 | PMU_CTRL_CHR_GET_IS_CHR_VALID rPMUChrGetIsChrValid; \ |
| 2932 | PMU_CTRL_CHR_SET_HV_DETECTION_VOLTAGE rPMUChrSetHvDetectionVoltage; \ |
| 2933 | PMU_CTRL_CHR_GET_HV_DETECTION_VOLTAGE_LIST rPMUChrGetHvDetectionVoltageList; \ |
| 2934 | PMU_CTRL_CHR_SET_VBAT_OV_DETECTION_VOLTAGE rPMUChrSetVbatOvDetectionVoltage; \ |
| 2935 | PMU_CTRL_CHR_SET_BAT_HT_EN rPMUChrSetBatHtEn; \ |
| 2936 | PMU_CTRL_CHR_SET_OTG_BVALID_EN rPMUChrSetOtgBvalidEn; \ |
| 2937 | PMU_CTRL_CHR_SET_CV_MODE rPMUChrSetCvMode; \ |
| 2938 | PMU_CTRL_CHR_SET_CSDAC_MODE rPMUChrSetCsdacMode; \ |
| 2939 | PMU_CTRL_CHR_SET_TRACKING_EN rPMUChrSetTrackingEn; \ |
| 2940 | PMU_CTRL_CHR_SET_HWCV_EN rPMUChrSetHwcvEn; \ |
| 2941 | PMU_CTRL_CHR_SET_ULC_DET_EN rPMUChrSetUlcDetEn; \ |
| 2942 | PMU_CTRL_CHR_SET_BC11_PULLUP_EN rPMUChrSetBc11PullupEn; \ |
| 2943 | PMU_CTRL_CHR_SET_LOW_ICH_DB rPMUChrSetLowIchDb; \ |
| 2944 | PMU_CTRL_CHR_SET_VBAT_CV_CALIBRATION rPMUChrSetVbatCvCalibration; \ |
| 2945 | PMU_CTRL_CHR_GET_CC_DET rPMUChrGetCcDet; \ |
| 2946 | PMU_CTRL_BL_SET_EN rPMUBlSetEn; \ |
| 2947 | PMU_CTRL_BL_SET_INIT rPMUBlSetInit; \ |
| 2948 | PMU_CTRL_BL_GET_SUPPORT_LEVEL rPMUBlGetSupportLevel; \ |
| 2949 | PMU_CTRL_BL_GET_USE_PWM_QUERY rPMUBlGetUsePwmQuery; \ |
| 2950 | PMU_CTRL_BOOST_SET_EN rPMUBoostSetEn; \ |
| 2951 | PMU_CTRL_BOOST_SET_CURRENT_LIMIT rPMUBoostSetCurrentLimit; \ |
| 2952 | PMU_CTRL_BOOST_SET_CLK_CAL rPMUBoostSetClkCal; \ |
| 2953 | PMU_CTRL_BOOST_SET_SYNC_EN rPMUBoostSetSyncEn; \ |
| 2954 | PMU_CTRL_BOOST_SET_VOLTAGE rPMUBoostSetVoltage; \ |
| 2955 | PMU_CTRL_BOOST_SET_LEVEL rPMUBoostSetLevel; \ |
| 2956 | PMU_CTRL_ISINK_SET_EN rPMUIsinkSetEn; \ |
| 2957 | PMU_CTRL_ISINK_SET_MODE rPMUIsinkSetMode; \ |
| 2958 | PMU_CTRL_ISINK_SET_STEP rPMUIsinkSetStep; \ |
| 2959 | PMU_CTRL_ISINK_SET_FORCE_OFF rPMUIsinkSetForceOff; \ |
| 2960 | PMU_CTRL_ISINK_SET_DIMMING_ON_DUTY rPMUIsinkSetDimmingOnDuty; \ |
| 2961 | PMU_CTRL_ISINK_SET_FREQUENCY_DIVISION rPMUIsinkSetFrequencyDivision; \ |
| 2962 | PMU_CTRL_ADC_SET_RQST rPMUAdcSetRqst; \ |
| 2963 | PMU_CTRL_ADC_CLR_RQST rPMUAdcClrRqst; \ |
| 2964 | PMU_CTRL_ADC_GET_RDY_MD rPMUAdcGetRdyMd; \ |
| 2965 | PMU_CTRL_ADC_GET_OUT_MD rPMUAdcGetOutMd; \ |
| 2966 | PMU_CTRL_MISC_SET_RLED_EN rPMUMiscSetRledEn; \ |
| 2967 | PMU_CTRL_MISC_SET_GLED_EN rPMUMiscSetGledEn; \ |
| 2968 | PMU_CTRL_MISC_SET_BLED_EN rPMUMiscSetBledEn; \ |
| 2969 | PMU_CTRL_MISC_GET_CID rPMUMiscGetCid; \ |
| 2970 | PMU_CTRL_MISC_GET_ECO_VERSION rPMUMiscGetEcoVersion; \ |
| 2971 | PMU_CTRL_MISC_GET_HW_VERSION rPMUMiscGetHwVersion; \ |
| 2972 | PMU_CTRL_MISC_SET_REGISTER_VALUE rPMUMiscSetRegisterValue; \ |
| 2973 | PMU_CTRL_MISC_GET_REGISTER_VALUE rPMUMiscGetRegisterValue; \ |
| 2974 | PMU_CTRL_LDO_BUCK_SET_OP_EN rPMULdoBuckSetOpEn; \ |
| 2975 | PMU_CTRL_LDO_BUCK_CLR_OP_EN rPMULdoBuckClrOpEn; \ |
| 2976 | PMU_CTRL_LDO_BUCK_SET_HW_OP_CFG rPMULdoBuckSetHwOp; \ |
| 2977 | PMU_CTRL_LDO_BUCK_CLR_HW_OP_CFG rPMULdoBuckClrHwOp; \ |
| 2978 | PMU_CTRL_LDO_BUCK_SET_GO_ON_OP rPMULdoBuckSetGoOnOp; \ |
| 2979 | PMU_CTRL_LDO_BUCK_SET_GO_LP_OP rPMULdoBuckSetGoLpOp; \ |
| 2980 | PMU_CTRL_TOP_SET_SRCLKEN_IN_EN rPMUTopSetSrclkenInEn; \ |
| 2981 | PMU_CTRL_TOP_SET_SRCLKEN_IN_MODE rPMUTopSetSrclkenInMode; \ |
| 2982 | PMU_CTRL_DCXO_SET_REGISTER_VALUE rPMUDcxoSetRegisterValue; \ |
| 2983 | PMU_CTRL_DCXO_GET_REGISTER_VALUE rPMUDcxoGetRegisterValue; \ |
| 2984 | PMU_CTRL_LDO_BUCK_SET_VOCAL rPMULdoBuckSetVocal; \ |
| 2985 | PMU_CTRL_LDO_BUCK_GET_VOCAL rPMULdoBuckGetVocal; \ |
| 2986 | PMU_CTRL_LDO_BUCK_SET_VOTRIM rPMULdoBuckSetVotrim; \ |
| 2987 | PMU_CTRL_LDO_BUCK_GET_VOTRIM rPMULdoBuckGetVotrim; \ |
| 2988 | PMU_CTRL_LDO_BUCK_SET_VPA_OC_SDN_STATUS rPMULdoBuckSetVpaOcSdnStatus; \ |
| 2989 | PMU_CTRL_LDO_BUCK_GET_VPA_OC_SDN_STATUS rPMULdoBuckGetVpaOcSdnStatus; \ |
| 2990 | PMU_CTRL_LDO_BUCK_SET_VPA_OC_SDN_EN rPMULdoBuckSetVpaOcSdnEn; \ |
| 2991 | PMU_CTRL_LDO_BUCK_GET_VPA_OC_SDN_EN rPMULdoBuckGetVpaOcSdnEn; \ |
| 2992 | PMU_CTRL_LDO_BUCK_SET_OP_MODE rPMULdoBuckSetOpMode; \ |
| 2993 | PMU_CTRL_LDO_BUCK_SET_VOTER_VOLTAGE rPMULdoBuckSetVoterVoltage; \ |
| 2994 | PMU_CTRL_LDO_BUCK_SET_BUCK_HW_OP_MODE rPMULdoBuckSetBuckHwOpMode; \ |
| 2995 | PMU_CTRL_LDO_BUCK_CLR_BUCK_HW_OP_MODE rPMULdoBuckClrBuckHwOpMode; \ |
| 2996 | PMU_CTRL_LDO_BUCK_SET_HW_OP_MODE rPMULdoBuckSetHwOpMode; \ |
| 2997 | PMU_CTRL_LDO_BUCK_CLR_HW_OP_MODE rPMULdoBuckClrHwOpMode; |
| 2998 | |
| 2999 | #endif /* __BUILD_DOM__ */ |
| 3000 | |
| 3001 | /******************************************************************************* |
| 3002 | * DCL_CTRL_CMD for PMU |
| 3003 | *******************************************************************************/ |
| 3004 | #ifdef __BUILD_DOM__ |
| 3005 | /* The PMU Command Values in DCL_CTRL_CMD_T Enum of dcl.h */ |
| 3006 | typedef enum { |
| 3007 | LDO_BUCK_SET_CMDS_START = 0, /* For internal use */ |
| 3008 | LDO_BUCK_CTRL, /* For internal use */ |
| 3009 | LDO_BUCK_SET_EN, /* enable ldo/buck */ |
| 3010 | LDO_BUCK_GET_EN_STATUS, /* Get LDO/BUCK Enable Status */ |
| 3011 | LDO_BUCK_GET_QI_MODE, /* Get LDO/BUCK QI Mode */ |
| 3012 | LDO_BUCK_SET_EN_FORCE, /* set ldo/buck force enable */ |
| 3013 | LDO_BUCK_SET_VOLTAGE, /* set ldo/buck voltage */ |
| 3014 | LDO_BUCK_SET_VOLTAGE_EN, /* set ldo/buck voltage and enable */ |
| 3015 | LDO_BUCK_SET_SLEEP_VOLTAGE, /* set ldo/buck sleep voltage */ |
| 3016 | LDO_BUCK_SET_BURST_THRESHOLD = 500, /* set ldo/buck burst threshold */ |
| 3017 | LDO_BUCK_SET_CURRENT_LIMIT, /* set ldo/buck current limit */ |
| 3018 | LDO_BUCK_SET_VOLTAGE_CALIBRATION_CODE, /* set ldo/buck voltage calibration code */ |
| 3019 | LDO_BUCK_SET_BIAS_CURRENT_CALIBRATION_CODE, /* set ldo/buck bias current calibration code */ |
| 3020 | LDO_BUCK_SET_STB_EN, /* enable ldo/buck soft start */ |
| 3021 | LDO_BUCK_SET_OC_AUTO_OFF, /* enable to power-off automatically if oc_flag been asserted */ |
| 3022 | LDO_BUCK_SET_RS, /* set ldo/buck local/remote sense */ |
| 3023 | LDO_BUCK_SET_ON_SEL, /* enable control selection, hardware/software */ |
| 3024 | LDO_BUCK_SET_SRCLKEN_SEL, /* h/w srclk enable selection */ |
| 3025 | LDO_BUCK_SET_STB_TD, /* set ldo/buck deglitch delay time for soft start */ |
| 3026 | LDO_BUCK_SET_NDIS_EN, /* enable ldo/buck NMOS discharge */ |
| 3027 | LDO_BUCK_SET_OC_TD, /* set ldo/buck deglitch time constant for over-current status from PMU to generate oc_flag */ |
| 3028 | LDO_BUCK_SET_OCFB_EN, /* enable ldo/buck over-current fold-back */ |
| 3029 | LDO_BUCK_SET_VSIM_GPLDO_EN, /* select VSIM LDO enable & voltage controlled by SIM controller or register */ |
| 3030 | LDO_BUCK_SET_VSIM2_GPLDO_EN, /* select VSIM2 LDO enable & voltage controlled by SIM2 controller or register */ |
| 3031 | LDO_BUCK_SET_SIM2_GPIO_EN, /* set SIM2 GPIO enable */ |
| 3032 | LDO_BUCK_SET_CCI_SRCLKEN, /* enable SRCLKENA to PMIC force enable control signal */ |
| 3033 | LDO_BUCK_GET_OC_STATUS, /* Get LDO/BUCK Over Current Status */ |
| 3034 | LDO_BUCK_GET_QI_OC_STATUS, /* Get LDO/BUCK QI Over Current Status */ |
| 3035 | LDO_BUCK_SET_OC_INT_EN, /* enable oc interrupt of a ldo or buck */ |
| 3036 | LDO_BUCK_CLEAR_OC_FLAG, /* clear oc flag of ldo or buck */ |
| 3037 | LDO_BUCK_GET_OC_FLAG, /* get oc flag of ldo or buck */ |
| 3038 | LDO_BUCK_GET_VOLTAGE_LIST, /* get voltage list of ldo or buck */ |
| 3039 | LDO_BUCK_SET_THER_SHDN_EN, /* Set Low Power Mode */ |
| 3040 | LDO_BUCK_SET_LP_MODE_SET, /* Set Low Power Mode */ |
| 3041 | LDO_BUCK_GET_LP_MODE, /* get lp mode of ldo or buck */ |
| 3042 | LDO_BUCK_SET_LP_SEL, /* Set Low Power Mode Selection */ |
| 3043 | LDO_BUCK_SET_ON_CTRL, /* Set On Control Mode */ |
| 3044 | LDO_BUCK_SET_MODESET, /* Switch between force PWM mode and AUTO Mode */ |
| 3045 | LDO_BUCK_SET_COT, /* Switch between force COT mode and AUTO Mode */ |
| 3046 | LDO_BUCK_GET_COT, /* Switch between force COT mode and AUTO Mode */ |
| 3047 | LDO_BUCK_SET_EN_CTRL, /* Enable Control */ |
| 3048 | LDO_BUCK_SET_EN_SEL, /* Enable Selection */ |
| 3049 | LDO_BUCK_SET_SRCLK_MODE_SEL, /* HW low power mode srclk selection */ |
| 3050 | LDO_BUCK_SET_SRCLK_EN_SEL, /* Enable Selection */ |
| 3051 | LDO_SET_CAL, /* ldo output voltage calibration */ |
| 3052 | LDO_BUCK_GET_VOLTAGE, /* get voltage of ldo or buck */ |
| 3053 | LDO_BUCK_GET_VOSEL_CTRL, /* get vosel ctrl by sw or hw */ |
| 3054 | LDO_BUCK_GET_VOSEL, /* get vosel */ |
| 3055 | LDO_BUCK_GET_VOSEL_ON, /* get vosel on */ |
| 3056 | LDO_BUCK_GET_VOSEL_SLEEP, /* get vosel sleep */ |
| 3057 | LDO_BUCK_SET_VOSEL_CTRL, /* set vosel ctrl by sw or hw */ |
| 3058 | LDO_BUCK_SET_VOSEL, /* set vosel */ |
| 3059 | LDO_BUCK_SET_VOSEL_ON, /* set vosel on */ |
| 3060 | LDO_BUCK_SET_VOSEL_SLEEP, /* set vosel sleep */ |
| 3061 | LDO_BUCK_SET_VTCXO24_SWITCH, /* set vtcxo24 switch */ |
| 3062 | LDO_BUCK_SET_FPWM, /* For internal use */ |
| 3063 | LDO_BUCK_GET_FPWM, /* For internal use */ |
| 3064 | LDO_BUCK_SET_CMDS_END, /* For internal use */ |
| 3065 | VIBR_SET_DIMMING_ON_DUTY = 900, /* modify vibrator dimming duty */ |
| 3066 | VPA_SET_VOLTAGE = 1000, /* set VPA0-7 voltage */ |
| 3067 | VPA_SET_VOSEL_MAP_EN, /* enables voltage mapping to select VPA_VOSEL from vpa vosel table depending on vpa_table_sel */ |
| 3068 | VPA_SET_EN, /* enable VPA */ |
| 3069 | VPA_CTRL_SEL, /* Control the VPA Sourse */ |
| 3070 | VPA_GET_VOLTAGE_LIST, /* get VPA supported voltage list */ |
| 3071 | VPA_SET_BAT_LOW, /* BAT_LOW to indicate VPA by-pass mode (6326) */ |
| 3072 | VPA_SET_FPWM, /* set VPA FPWM */ |
| 3073 | VPA_SET_VOLTAGE_SELECTION_TABLE, /* voltage selection when vpa_vosel_map_en=1 */ |
| 3074 | VPA_SET_MAP_SEL, /* Selects one entry in vpa vosel table to use for VPA_VOSEL */ |
| 3075 | VRF18_SET_MODESET, /* set VRF18 Force PWM Mode */ |
| 3076 | VRF18_SET_FPWM, /* set VRF18 FPWM */ |
| 3077 | VRF18_2_SET_FPWM, /* set VRF18_2 FPWM */ |
| 3078 | VRF18_SET_BUCK_LDO_MODE, /* set VRF18 Buck/LDO Mode */ |
| 3079 | VRF1_SET_MODESET_CKPDN_SET, /* VRF1 MODESET Clock SET */ |
| 3080 | VRF1_SET_MODESET_CKPDN_CLR, /* VRF1 MODESET Clock CLR */ |
| 3081 | VRF1_GET_MODESET_CKPDN, /* Enable Selection */ |
| 3082 | SIMLS_SET_SRST_CONF, /* Set SIMLS_SRST */ |
| 3083 | SIMLS_SET_SCLK_CONF, /* Set SIMLS_SCLK */ |
| 3084 | SIMLS_SET_TDSEL, /* Set SIMLS_TDSEL */ |
| 3085 | SIMAP_SET_TDSEL, /* Set SIMAP_RDSEL */ |
| 3086 | SIMLS_SET_RDSEL, /* Set SIMLS_TDSEL */ |
| 3087 | SIMAP_SET_RDSEL, /* Set SIMAP_RDSEL */ |
| 3088 | SIM_SET_STB_SIO_MODE, /* Set SIM STB SIO Mode */ |
| 3089 | SIMRST_SET_GPIO_SET, /* Set SIMRST GPIO */ |
| 3090 | SIMRST_SET_GPIO_CLR, /* Clear SIMRST GPIO */ |
| 3091 | OCTL_SET_SIM_AP_SRST, /* Set OCTL_SIM_AP_SRST */ |
| 3092 | OCTL_SET_SIM_AP_SCLK, /* Set OCTL_SIM_AP_SCLK */ |
| 3093 | OCTL_SET_SIMLS_SRST, /* Set OCTL_SIMLS_SRST */ |
| 3094 | OCTL_SET_SIMLS_SCLK, /* Set OCTL_SIMLS_SCLK */ |
| 3095 | SPK_SET_EN = 2000, /* enable spk */ |
| 3096 | SPK_SET_MODE, /* set spk mode */ |
| 3097 | SPK_GET_MODE, /* get spk mode */ |
| 3098 | SPK_SET_OC_AUTO_OFF, /* enable spk over-current auto off */ |
| 3099 | SPK_SET_VOL_VALUE, /* set spk volume (register value) */ |
| 3100 | SPK_GET_VOL_VALUE, /* get spk volume (register value) */ |
| 3101 | SPK_SET_VOL, /* set spk volume (dbm) */ |
| 3102 | SPK_GET_VOL, /* get spk volume (dbm) */ |
| 3103 | SPK_SET_SLEW_RATE, /* set spk slew rate */ |
| 3104 | SPK_SET_CALIBR_EN, /* set spk Class D offset calibration enable */ |
| 3105 | SPK_SET_CALIBR_SEL, /* set spk Class D offset calibration path */ |
| 3106 | KPLED_SET_EN = 3000, /* enable kpled */ |
| 3107 | KPLED_SET_MODE, /* set kpled mode (pwm/register) */ |
| 3108 | KPLED_SET_SEL, /* kpled Turn On Resistor Select */ |
| 3109 | KPLED_SET_FREQUENCY_DIVISION, /* set kpled frequency division */ |
| 3110 | KPLED_SET_DIMMING_ON_DUTY, /* set kpled dimming duty */ |
| 3111 | FLASHLED_SET_EN = 4000, /* enable flashled */ |
| 3112 | FLASHLED_SET_MODE, /* set flashled mode (pwm/regsiter) */ |
| 3113 | FLASHLED_SET_SEL, /* kpled Turn On Resistor Select */ |
| 3114 | BL_SET_INIT = 5000, /* backlight init mode */ |
| 3115 | BL_SET_EN, /* enable backlight */ |
| 3116 | BL_GET_SUPPORT_LEVEL, /* get backlight support level */ |
| 3117 | BL_GET_USE_PWM_QUERY, /* get backlight use pwm query */ |
| 3118 | BOOST_SET_EN = 6000, /* enable boost */ |
| 3119 | BOOST_SET_CURRENT_LIMIT, /* set boost current limit */ |
| 3120 | BOOST_SET_CLK_CAL, /* set boost clock cal */ |
| 3121 | BOOST_SET_SYNC_EN, /* enable boost sync */ |
| 3122 | BOOST_SET_VOLTAGE, /* set boost voltage */ |
| 3123 | BOOST_SET_LEVEL, /* set boost level */ |
| 3124 | ISINK_SET_EN = 7000, /* enable isink */ |
| 3125 | ISINK_SET_MODE, /* set isink mode */ |
| 3126 | ISINK_SET_STEP, /* set isink step */ |
| 3127 | ISINK_SET_FORCE_OFF, /* set isink force off */ |
| 3128 | ISINK_SET_CHANNEL, /* set isink channel */ |
| 3129 | ISINK_SET_DIMMING_ON_DUTY, /* set kpled dimming duty */ |
| 3130 | ISINK_SET_FREQUENCY_DIVISION, /* set kpled frequency division */ |
| 3131 | CHR_SET_ADC_MEASURE_EN = 8000, /* enable adc measure */ |
| 3132 | CHR_SET_WDT_CLEAR, /* clear charger wdt */ |
| 3133 | CHR_SET_WDT_TIMER, /* set charger wdt timer */ |
| 3134 | CHR_SET_WDT_INT_EN, /* enable charger wdt interrupt */ |
| 3135 | CHR_SET_WDT_EN, /* enable charger wdt */ |
| 3136 | CHR_SET_CHR_EN, /* enable charger */ |
| 3137 | CHR_SET_CHR_FORCE_EN, /* force enable charger */ |
| 3138 | CHR_GET_CHR_DET_STATUS, /* get charger detection status */ |
| 3139 | CHR_GET_CHR_CURRENT, /* get charger current */ |
| 3140 | CHR_GET_CHR_CURRENT_LIST, /* get charger current list */ |
| 3141 | CHR_SET_CHR_CURRENT, /* set charger current */ |
| 3142 | CHR_GET_CV_DETECTION_STATUS, /* get CV detection status */ |
| 3143 | CHR_SET_CV_DETECTION_EN, /* enable CV detection */ |
| 3144 | CHR_SET_CV_DETECTION_VOLTAGE, /* set CV voltage */ |
| 3145 | CHR_SET_CV_DETECTION_VOLTAGE_CALIBRATION, /* set CV voltage calibration */ |
| 3146 | CHR_SET_CSDAC_EN, /* enable csdac */ |
| 3147 | CHR_GET_IS_BATTERY_ON, /* check is battery on */ |
| 3148 | CHR_GET_IS_CHR_VALID, /* check is charger valid */ |
| 3149 | CHR_SET_HV_DETECTION_VOLTAGE, /* set HV detection voltage */ |
| 3150 | CHR_GET_HV_DETECTION_VOLTAGE_LIST, /* get HV detection voltage list */ |
| 3151 | CHR_SET_VBAT_OV_DETECTION_VOLTAGE, /* set battery OV detection voltage */ |
| 3152 | CHR_SET_BAT_HT_EN, /* enable battery high tempture detection */ |
| 3153 | CHR_SET_OTG_BVALID_EN, /* enable OTG BVALID */ |
| 3154 | CHR_SET_CV_MODE, /* enable CV detect@ charging enable */ |
| 3155 | CHR_SET_CSDAC_MODE, /* enable s/w control */ |
| 3156 | CHR_SET_TRACKING_EN, /* enable HTH/LTH for current tracking */ |
| 3157 | CHR_SET_HWCV_EN, /* enable H/W CV */ |
| 3158 | CHR_SET_ULC_DET_EN, /* enable plug out HW detection */ |
| 3159 | CHR_SET_LOW_ICH_DB, /* set plug out HW detection de-bounce time */ |
| 3160 | CHR_SET_CHARGE_WITHOUT_BATTERY, /* enable charger without battery */ |
| 3161 | CHR_SET_BC11_PULLUP_EN, /* turn on/off BC11 pull up*/ |
| 3162 | CHR_SET_VBAT_CV_CALIBRATION, /* do VBAT CV Calibration trimming */ |
| 3163 | CHR_GET_CC_DET, /* get VBAT CC detection result */ |
| 3164 | ADC_SET_RQST, /* AUXADC MD Set request */ |
| 3165 | ADC_CLR_RQST, /* AUXADC MD Clr request */ |
| 3166 | ADC_GET_RDY_MD, /* AUXADC MD Data Ready */ |
| 3167 | ADC_GET_OUT_MD, /* AUXADC channel output data for MD */ |
| 3168 | MISC_SET_RLED_EN = 9000, /* enable Red led */ |
| 3169 | MISC_SET_GLED_EN, /* enable green led */ |
| 3170 | MISC_SET_BLED_EN, /* enable blue led */ |
| 3171 | MISC_GET_CID, /* get pmu/pmic cid */ |
| 3172 | MISC_GET_ECO_VERSION, /* get pmu/pmic eco version */ |
| 3173 | MISC_GET_HW_VERSION, /* get pmu/pmic HW version */ |
| 3174 | MISC_SET_REGISTER_VALUE, /* set pmu/pmic register value */ |
| 3175 | MISC_GET_REGISTER_VALUE, /* get pmu/pmic register value */ |
| 3176 | LDO_BUCK_SET_OP_EN, |
| 3177 | LDO_BUCK_CLR_OP_EN, |
| 3178 | LDO_BUCK_SET_HW_OP_CFG, |
| 3179 | LDO_BUCK_CLR_HW_OP_CFG, |
| 3180 | LDO_BUCK_SET_GO_ON_OP, |
| 3181 | LDO_BUCK_SET_GO_LP_OP, |
| 3182 | TOP_SET_SRCLKEN_IN_EN, |
| 3183 | TOP_SET_SRCLKEN_IN_MODE, |
| 3184 | DCXO_SET_REGISTER_VALUE, |
| 3185 | DCXO_GET_REGISTER_VALUE, |
| 3186 | PMU_MOD_CMD_MAX, |
| 3187 | LDO_BUCK_SET_VOCAL, |
| 3188 | LDO_BUCK_GET_VOCAL, |
| 3189 | LDO_BUCK_SET_VOTRIM, |
| 3190 | LDO_BUCK_GET_VOTRIM, |
| 3191 | LDO_BUCK_SET_VPA_OC_SDN_STATUS, |
| 3192 | LDO_BUCK_GET_VPA_OC_SDN_STATUS, |
| 3193 | LDO_BUCK_SET_VPA_OC_SDN_EN, |
| 3194 | LDO_BUCK_GET_VPA_OC_SDN_EN, |
| 3195 | LDO_BUCK_SET_OP_MODE, |
| 3196 | LDO_BUCK_SET_VOTER_VOLTAGE, |
| 3197 | LDO_BUCK_SET_BUCK_HW_OP_MODE, |
| 3198 | LDO_BUCK_CLR_BUCK_HW_OP_MODE, |
| 3199 | LDO_BUCK_SET_HW_OP_MODE, |
| 3200 | LDO_BUCK_CLR_HW_OP_MODE |
| 3201 | } PMU_CTRL_CMD; |
| 3202 | #else /* __BUILD_DOM__ */ |
| 3203 | #define PMU_CMDS \ |
| 3204 | LDO_BUCK_SET_CMDS_START = 0, \ |
| 3205 | LDO_BUCK_CTRL, \ |
| 3206 | LDO_BUCK_SET_EN, \ |
| 3207 | LDO_BUCK_GET_EN_STATUS, \ |
| 3208 | LDO_BUCK_GET_QI_MODE, \ |
| 3209 | LDO_BUCK_SET_EN_FORCE, \ |
| 3210 | LDO_BUCK_SET_VOLTAGE, \ |
| 3211 | LDO_BUCK_SET_VOLTAGE_EN, \ |
| 3212 | LDO_BUCK_SET_SLEEP_VOLTAGE, \ |
| 3213 | LDO_BUCK_SET_BURST_THRESHOLD = 500, \ |
| 3214 | LDO_BUCK_SET_CURRENT_LIMIT, \ |
| 3215 | LDO_BUCK_SET_VOLTAGE_CALIBRATION_CODE, \ |
| 3216 | LDO_BUCK_SET_BIAS_CURRENT_CALIBRATION_CODE, \ |
| 3217 | LDO_BUCK_SET_STB_EN, \ |
| 3218 | LDO_BUCK_SET_OC_AUTO_OFF, \ |
| 3219 | LDO_BUCK_SET_RS, \ |
| 3220 | LDO_BUCK_SET_ON_SEL, \ |
| 3221 | LDO_BUCK_SET_SRCLKEN_SEL, \ |
| 3222 | LDO_BUCK_SET_STB_TD, \ |
| 3223 | LDO_BUCK_SET_NDIS_EN, \ |
| 3224 | LDO_BUCK_SET_OC_TD, \ |
| 3225 | LDO_BUCK_SET_OCFB_EN, \ |
| 3226 | LDO_BUCK_SET_VSIM_GPLDO_EN, \ |
| 3227 | LDO_BUCK_SET_VSIM2_GPLDO_EN, \ |
| 3228 | LDO_BUCK_SET_SIM2_GPIO_EN, \ |
| 3229 | LDO_BUCK_SET_CCI_SRCLKEN, \ |
| 3230 | LDO_BUCK_GET_OC_STATUS, \ |
| 3231 | LDO_BUCK_GET_QI_OC_STATUS, \ |
| 3232 | LDO_BUCK_SET_OC_INT_EN, \ |
| 3233 | LDO_BUCK_CLEAR_OC_FLAG, \ |
| 3234 | LDO_BUCK_GET_OC_FLAG, \ |
| 3235 | LDO_BUCK_GET_VOLTAGE_LIST, \ |
| 3236 | LDO_BUCK_SET_THER_SHDN_EN, \ |
| 3237 | LDO_BUCK_SET_LP_MODE_SET, \ |
| 3238 | LDO_BUCK_GET_LP_MODE, \ |
| 3239 | LDO_BUCK_SET_LP_SEL, \ |
| 3240 | LDO_BUCK_SET_ON_CTRL, \ |
| 3241 | LDO_BUCK_SET_MODESET, \ |
| 3242 | LDO_BUCK_SET_COT, \ |
| 3243 | LDO_BUCK_GET_COT, \ |
| 3244 | LDO_BUCK_SET_EN_CTRL, \ |
| 3245 | LDO_BUCK_SET_SRCLK_MODE_SEL, \ |
| 3246 | LDO_BUCK_SET_SRCLK_EN_SEL, \ |
| 3247 | LDO_BUCK_SET_EN_SEL, \ |
| 3248 | LDO_SET_CAL, \ |
| 3249 | LDO_BUCK_GET_VOLTAGE, \ |
| 3250 | LDO_BUCK_GET_VOSEL_CTRL, \ |
| 3251 | LDO_BUCK_GET_VOSEL, \ |
| 3252 | LDO_BUCK_GET_VOSEL_ON, \ |
| 3253 | LDO_BUCK_GET_VOSEL_SLEEP, \ |
| 3254 | LDO_BUCK_SET_VOSEL_CTRL, \ |
| 3255 | LDO_BUCK_SET_VOSEL, \ |
| 3256 | LDO_BUCK_SET_VOSEL_ON, \ |
| 3257 | LDO_BUCK_SET_VOSEL_SLEEP, \ |
| 3258 | LDO_BUCK_SET_VTCXO24_SWITCH, \ |
| 3259 | LDO_BUCK_SET_FPWM, \ |
| 3260 | LDO_BUCK_GET_FPWM, \ |
| 3261 | LDO_BUCK_SET_CMDS_END, \ |
| 3262 | VIBR_SET_DIMMING_ON_DUTY = 900, \ |
| 3263 | VPA_SET_VOLTAGE = 1000, \ |
| 3264 | VPA_SET_VOSEL_MAP_EN, \ |
| 3265 | VPA_SET_EN, \ |
| 3266 | VPA_CTRL_SEL, \ |
| 3267 | VPA_GET_VOLTAGE_LIST, \ |
| 3268 | VPA_SET_BAT_LOW, \ |
| 3269 | VPA_SET_FPWM, \ |
| 3270 | VPA_SET_VOLTAGE_SELECTION_TABLE, \ |
| 3271 | VPA_SET_MAP_SEL, \ |
| 3272 | VRF18_SET_FPWM, \ |
| 3273 | VRF18_SET_MODESET, \ |
| 3274 | VRF18_2_SET_FPWM, \ |
| 3275 | VRF18_SET_BUCK_LDO_MODE, \ |
| 3276 | VRF1_SET_MODESET_CKPDN_SET, \ |
| 3277 | VRF1_SET_MODESET_CKPDN_CLR, \ |
| 3278 | VRF1_GET_MODESET_CKPDN, \ |
| 3279 | SIMLS_SET_SRST_CONF, \ |
| 3280 | SIMLS_SET_SCLK_CONF, \ |
| 3281 | SIMLS_SET_TDSEL, \ |
| 3282 | SIMAP_SET_TDSEL, \ |
| 3283 | SIMLS_SET_RDSEL, \ |
| 3284 | SIMAP_SET_RDSEL, \ |
| 3285 | SIM_SET_STB_SIO_MODE, \ |
| 3286 | SIMRST_SET_GPIO_SET, \ |
| 3287 | SIMRST_SET_GPIO_CLR, \ |
| 3288 | OCTL_SET_SIM_AP_SRST, \ |
| 3289 | OCTL_SET_SIM_AP_SCLK, \ |
| 3290 | OCTL_SET_SIMLS_SRST, \ |
| 3291 | OCTL_SET_SIMLS_SCLK, \ |
| 3292 | SPK_SET_EN = 2000, \ |
| 3293 | SPK_SET_MODE, \ |
| 3294 | SPK_GET_MODE, \ |
| 3295 | SPK_SET_OC_AUTO_OFF, \ |
| 3296 | SPK_SET_VOL_VALUE, \ |
| 3297 | SPK_GET_VOL_VALUE, \ |
| 3298 | SPK_SET_VOL, \ |
| 3299 | SPK_GET_VOL, \ |
| 3300 | SPK_SET_SLEW_RATE, \ |
| 3301 | SPK_SET_CALIBR_EN, \ |
| 3302 | SPK_SET_CALIBR_SEL, \ |
| 3303 | KPLED_SET_EN = 3000, \ |
| 3304 | KPLED_SET_MODE, \ |
| 3305 | KPLED_SET_SEL, \ |
| 3306 | KPLED_SET_FREQUENCY_DIVISION, \ |
| 3307 | KPLED_SET_DIMMING_ON_DUTY, \ |
| 3308 | FLASHLED_SET_EN = 4000, \ |
| 3309 | FLASHLED_SET_MODE, \ |
| 3310 | FLASHLED_SET_SEL, \ |
| 3311 | BL_SET_INIT = 5000, \ |
| 3312 | BL_SET_EN, \ |
| 3313 | BL_GET_SUPPORT_LEVEL, \ |
| 3314 | BL_GET_USE_PWM_QUERY, \ |
| 3315 | BOOST_SET_EN = 6000, \ |
| 3316 | BOOST_SET_CURRENT_LIMIT, \ |
| 3317 | BOOST_SET_CLK_CAL, \ |
| 3318 | BOOST_SET_SYNC_EN, \ |
| 3319 | BOOST_SET_VOLTAGE, \ |
| 3320 | BOOST_SET_LEVEL, \ |
| 3321 | ISINK_SET_EN = 7000, \ |
| 3322 | ISINK_SET_MODE, \ |
| 3323 | ISINK_SET_STEP, \ |
| 3324 | ISINK_SET_FORCE_OFF, \ |
| 3325 | ISINK_SET_CHANNEL, \ |
| 3326 | ISINK_SET_DIMMING_ON_DUTY, \ |
| 3327 | ISINK_SET_FREQUENCY_DIVISION, \ |
| 3328 | CHR_SET_ADC_MEASURE_EN = 8000, \ |
| 3329 | CHR_SET_WDT_CLEAR, \ |
| 3330 | CHR_SET_WDT_TIMER, \ |
| 3331 | CHR_SET_WDT_INT_EN, \ |
| 3332 | CHR_SET_WDT_EN, \ |
| 3333 | CHR_SET_CHR_EN, \ |
| 3334 | CHR_SET_CHR_FORCE_EN, \ |
| 3335 | CHR_GET_CHR_DET_STATUS, \ |
| 3336 | CHR_GET_CHR_CURRENT, \ |
| 3337 | CHR_GET_CHR_CURRENT_LIST, \ |
| 3338 | CHR_SET_CHR_CURRENT, \ |
| 3339 | CHR_GET_CV_DETECTION_STATUS, \ |
| 3340 | CHR_SET_CV_DETECTION_EN, \ |
| 3341 | CHR_SET_CV_DETECTION_VOLTAGE, \ |
| 3342 | CHR_SET_CV_DETECTION_VOLTAGE_CALIBRATION, \ |
| 3343 | CHR_SET_CSDAC_EN, \ |
| 3344 | CHR_GET_IS_BATTERY_ON, \ |
| 3345 | CHR_GET_IS_CHR_VALID, \ |
| 3346 | CHR_SET_HV_DETECTION_VOLTAGE, \ |
| 3347 | CHR_GET_HV_DETECTION_VOLTAGE_LIST, \ |
| 3348 | CHR_SET_VBAT_OV_DETECTION_VOLTAGE, \ |
| 3349 | CHR_SET_BAT_HT_EN, \ |
| 3350 | CHR_SET_OTG_BVALID_EN, \ |
| 3351 | CHR_SET_CV_MODE, \ |
| 3352 | CHR_SET_CSDAC_MODE, \ |
| 3353 | CHR_SET_TRACKING_EN, \ |
| 3354 | CHR_SET_HWCV_EN, \ |
| 3355 | CHR_SET_ULC_DET_EN, \ |
| 3356 | CHR_SET_LOW_ICH_DB, \ |
| 3357 | CHR_SET_CHARGE_WITHOUT_BATTERY, \ |
| 3358 | CHR_SET_BC11_PULLUP_EN, \ |
| 3359 | CHR_SET_VBAT_CV_CALIBRATION, \ |
| 3360 | CHR_GET_CC_DET, \ |
| 3361 | ADC_SET_RQST, \ |
| 3362 | ADC_CLR_RQST, \ |
| 3363 | ADC_GET_RDY_MD, \ |
| 3364 | ADC_GET_OUT_MD, \ |
| 3365 | MISC_SET_RLED_EN = 9000, \ |
| 3366 | MISC_SET_GLED_EN, \ |
| 3367 | MISC_SET_BLED_EN, \ |
| 3368 | MISC_GET_CID, \ |
| 3369 | MISC_GET_ECO_VERSION, \ |
| 3370 | MISC_GET_HW_VERSION, \ |
| 3371 | MISC_SET_REGISTER_VALUE, \ |
| 3372 | MISC_GET_REGISTER_VALUE, \ |
| 3373 | LDO_BUCK_SET_OP_EN, \ |
| 3374 | LDO_BUCK_CLR_OP_EN, \ |
| 3375 | LDO_BUCK_SET_HW_OP_CFG,\ |
| 3376 | LDO_BUCK_CLR_HW_OP_CFG,\ |
| 3377 | LDO_BUCK_SET_GO_ON_OP,\ |
| 3378 | LDO_BUCK_SET_GO_LP_OP,\ |
| 3379 | TOP_SET_SRCLKEN_IN_EN, \ |
| 3380 | TOP_SET_SRCLKEN_IN_MODE , \ |
| 3381 | DCXO_SET_REGISTER_VALUE, \ |
| 3382 | DCXO_GET_REGISTER_VALUE, \ |
| 3383 | LDO_BUCK_SET_VOCAL, \ |
| 3384 | LDO_BUCK_GET_VOCAL, \ |
| 3385 | LDO_BUCK_SET_VOTRIM, \ |
| 3386 | LDO_BUCK_GET_VOTRIM, \ |
| 3387 | LDO_BUCK_SET_VPA_OC_SDN_STATUS, \ |
| 3388 | LDO_BUCK_GET_VPA_OC_SDN_STATUS, \ |
| 3389 | LDO_BUCK_SET_VPA_OC_SDN_EN, \ |
| 3390 | LDO_BUCK_GET_VPA_OC_SDN_EN, \ |
| 3391 | LDO_BUCK_SET_OP_MODE, \ |
| 3392 | LDO_BUCK_SET_VOTER_VOLTAGE, \ |
| 3393 | LDO_BUCK_SET_BUCK_HW_OP_MODE,\ |
| 3394 | LDO_BUCK_CLR_BUCK_HW_OP_MODE, \ |
| 3395 | LDO_BUCK_SET_HW_OP_MODE, \ |
| 3396 | LDO_BUCK_CLR_HW_OP_MODE, \ |
| 3397 | PMU_MOD_CMD_MAX, |
| 3398 | #endif /* __BUILD_DOM__ */ |
| 3399 | |
| 3400 | /******************************************************************************* |
| 3401 | * DCL_FLAGS for PMU |
| 3402 | *******************************************************************************/ |
| 3403 | #ifdef __BUILD_DOM__ |
| 3404 | /* The PMU Command Values in DCL_CTRL_CMD_T Enum of dcl.h */ |
| 3405 | typedef enum { |
| 3406 | PWRAP_FLAGS_START = 100, |
| 3407 | PWRAP_FLAGS_ACCESS_WACS0 = PWRAP_FLAGS_START, |
| 3408 | PWRAP_FLAGS_ACCESS_WACS1, |
| 3409 | PMU_MOD_CMD_MAX, |
| 3410 | } PMU_FLAGS; |
| 3411 | #else /* __BUILD_DOM__ */ |
| 3412 | #define PMU_FLAGS \ |
| 3413 | PWRAP_FLAGS_START = 100, \ |
| 3414 | PWRAP_FLAGS_ACCESS_WACS0 = PWRAP_FLAGS_START,\ |
| 3415 | PWRAP_FLAGS_ACCESS_WACS1, \ |
| 3416 | PMU_FLAGS_MAX, |
| 3417 | #endif /* __BUILD_DOM__ */ |
| 3418 | |
| 3419 | #endif // #ifndef __DCL_PMU_H_STRUCT__ |
| 3420 | #endif // #ifdef DCL_DEFINITION_STRUCT |
| 3421 | |
| 3422 | #ifdef DCL_DEFINITION_PROTOTYPE |
| 3423 | #ifndef __DCL_PMU_H_PROTOTYPE__ |
| 3424 | #define __DCL_PMU_H_PROTOTYPE__ |
| 3425 | |
| 3426 | typedef DCL_STATUS (*PMU_CONTROL_HANDLER)(DCL_HANDLE handle, DCL_CTRL_CMD cmd, DCL_CTRL_DATA_T *data); |
| 3427 | |
| 3428 | /************************************************************************* |
| 3429 | * FUNCTION |
| 3430 | * DclPMU_Initialize |
| 3431 | * |
| 3432 | * DESCRIPTION |
| 3433 | * This function is to initialize PMU module |
| 3434 | * |
| 3435 | * PARAMETERS |
| 3436 | * None |
| 3437 | * |
| 3438 | * RETURNS |
| 3439 | * STATUS_OK |
| 3440 | * |
| 3441 | *************************************************************************/ |
| 3442 | extern DCL_STATUS DclPMU_Initialize(void); |
| 3443 | /************************************************************************* |
| 3444 | * FUNCTION |
| 3445 | * DclPMU_Open |
| 3446 | * |
| 3447 | * DESCRIPTION |
| 3448 | * This function is to open the PMU module and return a handle |
| 3449 | * |
| 3450 | * PARAMETERS |
| 3451 | * dev: only valid for DCL_PMU |
| 3452 | * flags: no sepcial flags is needed. Please use FLAGS_NONE |
| 3453 | * |
| 3454 | * RETURNS |
| 3455 | * DCL_HANDLE_INVALID: Open failed. |
| 3456 | * other value: a valid handle |
| 3457 | * |
| 3458 | *************************************************************************/ |
| 3459 | extern DCL_HANDLE DclPMU_Open(DCL_DEV dev, DCL_FLAGS flags); |
| 3460 | /************************************************************************* |
| 3461 | * FUNCTION |
| 3462 | * DclPMU_ReadData |
| 3463 | * |
| 3464 | * DESCRIPTION |
| 3465 | * This function is not supported for the PMU module now. |
| 3466 | * |
| 3467 | * PARAMETERS |
| 3468 | * N/A |
| 3469 | * |
| 3470 | * RETURNS |
| 3471 | * STATUS_UNSUPPORTED |
| 3472 | * |
| 3473 | *************************************************************************/ |
| 3474 | extern DCL_STATUS DclPMU_ReadData(DCL_HANDLE handle, DCL_BUFF *buff, DCL_BUFF_LEN buf_len, DCL_OPTIONS options); |
| 3475 | /************************************************************************* |
| 3476 | * FUNCTION |
| 3477 | * DclPMU_WriteData |
| 3478 | * |
| 3479 | * DESCRIPTION |
| 3480 | * This function is not supported for the PMU module now. |
| 3481 | * |
| 3482 | * PARAMETERS |
| 3483 | * N/A |
| 3484 | * |
| 3485 | * RETURNS |
| 3486 | * STATUS_UNSUPPORTED |
| 3487 | * |
| 3488 | *************************************************************************/ |
| 3489 | extern DCL_STATUS DclPMU_WriteData(DCL_HANDLE handle, DCL_BUFF *buff, DCL_BUFF_LEN buf_len, DCL_OPTIONS options); |
| 3490 | /************************************************************************* |
| 3491 | * FUNCTION |
| 3492 | * DclPMU_Configure |
| 3493 | * |
| 3494 | * DESCRIPTION |
| 3495 | * This function is not supported for the PMU module now. |
| 3496 | * |
| 3497 | * PARAMETERS |
| 3498 | * N/A |
| 3499 | * |
| 3500 | * RETURNS |
| 3501 | * STATUS_UNSUPPORTED |
| 3502 | * |
| 3503 | *************************************************************************/ |
| 3504 | extern DCL_STATUS DclPMU_Configure(DCL_HANDLE handle, DCL_CONFIGURE_T *configure); |
| 3505 | /************************************************************************* |
| 3506 | * FUNCTION |
| 3507 | * DclPMU_RegisterCallback |
| 3508 | * |
| 3509 | * DESCRIPTION |
| 3510 | * This function is not supported for the PMU module now. |
| 3511 | * |
| 3512 | * PARAMETERS |
| 3513 | * N/A |
| 3514 | * |
| 3515 | * RETURNS |
| 3516 | * STATUS_UNSUPPORTED |
| 3517 | * |
| 3518 | *************************************************************************/ |
| 3519 | extern DCL_STATUS DclPMU_RegisterCallback(DCL_HANDLE handle, DCL_EVENT event, PFN_DCL_CALLBACK callback); |
| 3520 | /************************************************************************* |
| 3521 | * FUNCTION |
| 3522 | * DclPMU_Control |
| 3523 | * |
| 3524 | * DESCRIPTION |
| 3525 | * This function is to send command to control the PMU module. |
| 3526 | * |
| 3527 | * PARAMETERS |
| 3528 | * handle: The handle value returned from DclPMU_Open |
| 3529 | * cmd: a control command for PMU module |
| 3530 | * LDO_BUCK_SET_CMDS_START: For internal use |
| 3531 | * LDO_BUCK_CTRL: For internal use |
| 3532 | * LDO_BUCK_SET_EN: enable ldo/buck |
| 3533 | * LDO_BUCK_GET_EN_STATUS: Get LDO/BUCK Enable Status |
| 3534 | * LDO_BUCK_GET_QI_MODE: Get LDO/BUCK QI MODE |
| 3535 | * LDO_BUCK_SET_EN_FORCE: set ldo/buck force enable |
| 3536 | * LDO_BUCK_SET_VOLTAGE: set ldo/buck voltage |
| 3537 | * LDO_BUCK_SET_VOLTAGE_EN: set ldo/buck voltage and enable |
| 3538 | * LDO_BUCK_SET_SLEEP_VOLTAGE: set ldo/buck sleep voltage |
| 3539 | * LDO_BUCK_SET_BURST_THRESHOLD: set ldo/buck burst threshold |
| 3540 | * LDO_BUCK_SET_CURRENT_LIMIT: set ldo/buck current limit |
| 3541 | * LDO_BUCK_SET_VOLTAGE_CALIBRATION_CODE: set ldo/buck voltage calibration code |
| 3542 | * LDO_BUCK_SET_BIAS_CURRENT_CALIBRATION_CODE: set ldo/buck bias current calibration code |
| 3543 | * LDO_BUCK_SET_STB_EN: enable ldo/buck soft start |
| 3544 | * LDO_BUCK_SET_OC_AUTO_OFF: enable to power-off automatically if oc_flag been asserted |
| 3545 | * LDO_BUCK_SET_RS: set ldo/buck local/remote sense |
| 3546 | * LDO_BUCK_SET_ON_SEL: enable control selection, hardware/software |
| 3547 | * LDO_BUCK_SET_STB_TD: set ldo/buck deglitch delay time for soft start |
| 3548 | * LDO_BUCK_SET_NDIS_EN: enable ldo/buck NMOS discharge |
| 3549 | * LDO_BUCK_SET_OC_TD: set ldo/buck deglitch time constant for over-current status from PMU to generate oc_flag |
| 3550 | * LDO_BUCK_SET_OCFB_EN: enable ldo/buck over-current fold-back |
| 3551 | * LDO_BUCK_SET_VSIM_GPLDO_EN: select VSIM LDO enable & voltage controlled by SIM controller or register |
| 3552 | * LDO_BUCK_SET_VSIM2_GPLDO_EN: select VSIM2 LDO enable & voltage controlled by SIM2 controller or register |
| 3553 | * LDO_BUCK_SET_SIM2_GPIO_EN: set SIM2 GPIO enable |
| 3554 | * LDO_BUCK_SET_CCI_SRCLKEN: enable SRCLKENA to PMIC force enable control signal |
| 3555 | * LDO_BUCK_GET_OC_STATUS: Get LDO/BUCK Over Current Status |
| 3556 | * LDO_BUCK_GET_QI_OC_STATUS: Get LDO/BUCK QI Over Current Status |
| 3557 | * LDO_BUCK_SET_THER_SHDN_EN: Set Low Power Mode |
| 3558 | * LDO_BUCK_SET_LP_MODE_SET: Set Low Power Mode |
| 3559 | * LDO_BUCK_SET_LP_SEL: Set Low Power Mode Selection |
| 3560 | * LDO_BUCK_SET_ON_CTRL: On Control Mode |
| 3561 | * LDO_BUCK_SET_MODESET: Switch between force PWM mode and AUTO Mode |
| 3562 | * LDO_BUCK_SET_EN_CTRL: Enable Control |
| 3563 | * LDO_BUCK_SET_EN_SEL: Enable Selection |
| 3564 | * LDO_BUCK_SET_SRCLK_MODE_SEL: HW low power mode srclk selection |
| 3565 | * LDO_BUCK_SET_SRCLK_EN_SEL: SRCLK_EN Selection |
| 3566 | * LDO_BUCK_SET_CMDS_END: For internal use |
| 3567 | * VIBR_SET_DIMMING_ON_DUTY: modify vibrator dimming duty |
| 3568 | * VPA_SET_VOLTAGE: set VPA0-7 voltage |
| 3569 | * VPA_SET_VOSEL_MAP_EN: enables voltage mapping to select VPA_VOSEL from vpa vosel table depending on vpa_table_sel |
| 3570 | * VPA_SET_EN: enable VPA |
| 3571 | * VPA_GET_VOLTAGE_LIST: get VPA supported voltage list |
| 3572 | * VPA_SET_BAT_LOW: BAT_LOW to indicate VPA by-pass mode (6326) |
| 3573 | * VPA_SET_VOLTAGE_SELECTION_TABLE: voltage selection when vpa_vosel_map_en=1 |
| 3574 | * VPA_SET_MAP_SEL: Selects one entry in vpa vosel table to use for VPA_VOSEL |
| 3575 | * VRF1_SET_MODESET_CKPDN_SET: Enable VRF1 MODESET Clock |
| 3576 | * VRF1_SET_MODESET_CKPDN_CLR: Disable VRF1 MODESET Clock |
| 3577 | * VRF1_GET_MODESET_CKPDN: Readback VRF1 MODESET Clock |
| 3578 | * SIMLS_SET_SRST_CONF: Set SIMLS_SRST |
| 3579 | * SIMLS_SET_SCLK_CONF: Set SIMLS_SCLK |
| 3580 | * SIMLS_SET_TDSEL: Set SIMLS_TDSEL |
| 3581 | * SIMAP_SET_TDSEL: Set SIMAP_TDSEL |
| 3582 | * SIMLS_SET_RDSEL: Set SIMLS_RDSEL |
| 3583 | * SIMAP_SET_RDSEL: Set SIMAP_RDSEL |
| 3584 | * SIM_SET_STB_SIO_MODE: Set SIM STB SIO Mode |
| 3585 | * SIMRST_SET_GPIO_SET: Set SIMRST GPIO |
| 3586 | * SIMRST_SET_GPIO_CLR: Clear SIMRST GPIO |
| 3587 | * OCTL_SET_SIM_AP_SCLK: Set SIM_AP_SRST |
| 3588 | * OCTL_SET_SIM_AP_SCLK: Set SIM_AP_SCLK |
| 3589 | * OCTL_SET_SIMLS_SCLK: Set SIMLS_SRST |
| 3590 | * OCTL_SET_SIMLS_SCLK: Set SIMLS_SCLK |
| 3591 | * LDO_SET_CAL: ldo output voltage calibration |
| 3592 | * SPK_SET_EN: enable spk |
| 3593 | * SPK_SET_MODE: set spk mode |
| 3594 | * SPK_GET_MODE: get spk mode |
| 3595 | * SPK_SET_OC_AUTO_OFF: enable spk over-current auto off |
| 3596 | * SPK_SET_VOL_VALUE: set spk volume (register value) |
| 3597 | * SPK_GET_VOL_VALUE: get spk volume (register value) |
| 3598 | * SPK_SET_VOL: set spk volume (dbm) |
| 3599 | * SPK_GET_VOL: get spk volume (dbm) |
| 3600 | * SPK_SET_SLEW_RATE: set spk slew rate |
| 3601 | * SPK_SET_CALIBR_EN: set spk Class D offset calibration enable |
| 3602 | * SPK_SET_CALIBR_SEL: set spk Class D offset calibration path |
| 3603 | * KPLED_SET_EN: enable kpled |
| 3604 | * KPLED_SET_MODE: set kpled mode (pwm/register) |
| 3605 | * KPLED_SET_SEL: kpled Turn On Resistor Select |
| 3606 | * KPLED_SET_FREQUENCY_DIVISION: set kpled frequency division |
| 3607 | * KPLED_SET_DIMMING_ON_DUTY: set kpled dimming duty |
| 3608 | * FLASHLED_SET_EN: enable flashled |
| 3609 | * FLASHLED_SET_MODE: set flashled mode (pwm/regsiter) |
| 3610 | * FLASHLED_SET_SEL: kpled Turn On Resistor Select |
| 3611 | * BL_SET_INIT: backlight init mode |
| 3612 | * BL_SET_EN: enable backlight |
| 3613 | * BOOST_SET_EN: enable boost |
| 3614 | * BOOST_SET_CURRENT_LIMIT: set boost current limit |
| 3615 | * BOOST_SET_CLK_CAL: set boost clock cal |
| 3616 | * BOOST_SET_SYNC_EN: enable boost sync |
| 3617 | * BOOST_SET_VOLTAGE: set boost voltage |
| 3618 | * BOOST_SET_LEVEL: set boost level |
| 3619 | * ISINK_SET_EN: enable isink |
| 3620 | * ISINK_SET_MODE: set isink mode |
| 3621 | * ISINK_SET_STEP: set isink step |
| 3622 | * ISINK_SET_FORCE_OFF: set isink force off |
| 3623 | * ISINK_SET_CHANNEL: set isink channel |
| 3624 | * ISINK_SET_DIMMING_ON_DUTY: set kpled dimming duty |
| 3625 | * ISINK_SET_FREQUENCY_DIVISION: set kpled frequency division |
| 3626 | * CHR_SET_ADC_MEASURE_EN: enable adc measure |
| 3627 | * CHR_SET_WDT_CLEAR: clear charger wdt |
| 3628 | * CHR_SET_WDT_TIMER: set charger wdt timer |
| 3629 | * CHR_SET_WDT_INT_EN: enable charger wdt interrupt |
| 3630 | * CHR_SET_WDT_EN: enable charger wdt |
| 3631 | * CHR_SET_CHR_EN: enable charger |
| 3632 | * CHR_SET_CHR_FORCE_EN: force enable charger |
| 3633 | * CHR_GET_CHR_DET_STATUS: get charger detection status |
| 3634 | * CHR_GET_CHR_CURRENT: get charger current |
| 3635 | * CHR_GET_CHR_CURRENT_LIST: get charger current list |
| 3636 | * CHR_SET_CHR_CURRENT: set charger current |
| 3637 | * CHR_GET_CV_DETECTION_STATUS: get CV detection status |
| 3638 | * CHR_SET_CV_DETECTION_EN: enable CV detection |
| 3639 | * CHR_SET_CV_DETECTION_VOLTAGE: set CV voltage |
| 3640 | * CHR_SET_CV_DETECTION_VOLTAGE_CALIBRATION: set CV voltage calibration |
| 3641 | * CHR_SET_CSDAC_EN: enable csdac |
| 3642 | * CHR_GET_IS_BATTERY_ON: check is battery on |
| 3643 | * CHR_GET_IS_CHR_VALID: check is charger valid |
| 3644 | * CHR_SET_HV_DETECTION_VOLTAGE: set HV detection voltage |
| 3645 | * CHR_SET_VBAT_OV_DETECTION_VOLTAGE: set battery OV detection voltage |
| 3646 | * CHR_SET_BAT_HT_EN: enable battery high tempture detection |
| 3647 | * CHR_SET_OTG_BVALID_EN: enable OTG BVALID |
| 3648 | * CHR_SET_CV_MODE: enable CV detect@ charging enable |
| 3649 | * CHR_SET_CSDAC_MODE: enable s/w control |
| 3650 | * CHR_SET_TRACKING_EN: enable HTH/LTH for current tracking |
| 3651 | * CHR_SET_HWCV_EN: enable H/W CV |
| 3652 | * CHR_SET_ULC_DET_EN: enable plug out HW detection |
| 3653 | * CHR_SET_LOW_ICH_DB: set plug out HW detection de-bounce time |
| 3654 | * CHR_GET_CC_DET: get VBAT CC detection result |
| 3655 | * ADC_SET_RQST: AUXADC MD SET request |
| 3656 | * ADC_CLR_RQST: AUXADC MD CLR request |
| 3657 | * ADC_GET_RDY_MD: AUXADC MD Data Ready |
| 3658 | * ADC_GET_OUT_MD: AUXADC channel output data for MD |
| 3659 | * MISC_SET_RLED_EN: enable Red led |
| 3660 | * MISC_SET_GLED_EN: enable green led |
| 3661 | * MISC_SET_BLED_EN: enable blue led |
| 3662 | * MISC_SET_REGISTER_VALUE: set pmu/pmic register value |
| 3663 | * MISC_GET_REGISTER_VALUE: get pmu/pmic register value |
| 3664 | * data: The data of the control command |
| 3665 | * cmd: xxxx : pointer to a PMU_CTRL_xxxx structure |
| 3666 | * ex: LDO_BUCK_SET_EN: pointer to a PMU_CTRL_LDO_BUCK_SET_EN structure |
| 3667 | * |
| 3668 | * RETURNS |
| 3669 | * STATUS_OK: command is executed successfully. |
| 3670 | * STATUS_FAIL: command is failed. |
| 3671 | * STATUS_INVALID_CMD: It's a invalid command. |
| 3672 | * STATUS_UNSUPPORTED: It's a unsupported command. |
| 3673 | * |
| 3674 | *************************************************************************/ |
| 3675 | extern DCL_STATUS DclPMU_Control(DCL_HANDLE handle, DCL_CTRL_CMD cmd, DCL_CTRL_DATA_T *data); |
| 3676 | /************************************************************************* |
| 3677 | * FUNCTION |
| 3678 | * DclPMU_Close |
| 3679 | * |
| 3680 | * DESCRIPTION |
| 3681 | * This function is to close the PMU module. |
| 3682 | * |
| 3683 | * PARAMETERS |
| 3684 | * handle: the returned handle value of DclPMU_Open |
| 3685 | * |
| 3686 | * RETURNS |
| 3687 | * STATUS_OK |
| 3688 | * |
| 3689 | *************************************************************************/ |
| 3690 | extern DCL_STATUS DclPMU_Close(DCL_HANDLE handle); |
| 3691 | |
| 3692 | #define DCL_PMIC_MODULE_CONTROL |
| 3693 | kal_atomic_uint32 DclPMU_GetHrtFlag(void); |
| 3694 | |
| 3695 | #if defined(DCL_PMIC_MODULE_CONTROL) |
| 3696 | extern DCL_FLAGS DclPMU_GetCurrentHandlerFlag(DCL_HANDLE handle); |
| 3697 | #endif |
| 3698 | |
| 3699 | #endif // #ifndef __DCL_PMU_H_PROTOTYPE__ |
| 3700 | #endif // #ifdef DCL_DEFINITION_PROTOTYPE |