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192.168.1.100 / T800_MD_V1.6 / c33b3079c38f91561c2f84f1ebed20ad8c60532a / . / mcu / interface / driver / peripheral / drv_hisr.h
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yu.dongc33b3072024-08-21 23:14:49 -0700[diff] [blame^]1/*****************************************************************************
2* Copyright Statement:
3* --------------------
4* This software is protected by Copyright and the information contained
5* herein is confidential. The software may not be copied and the information
6* contained herein may not be used or disclosed except with the written
7* permission of MediaTek Inc. (C) 2005
8*
9* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
10* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
11* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
12* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
13* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
14* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
15* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
16* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
17* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
18* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
19* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
20* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
21*
22* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
23* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
24* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
25* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
26* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
27*
28* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
29* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
30* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
31* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
32* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
33*
34*****************************************************************************/
35
36/*******************************************************************************
37 * Filename:
38 * ---------
39 * drv_hisr.h
40 *
41 * Project:
42 * --------
43 * ALL
44 *
45 * Description:
46 * ------------
47 * This file is intends for central driver HISR.
48 *
49 * Author:
50 * -------
51 * -------
52 *
53 *============================================================================
54 * HISTORY
55 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
56 *------------------------------------------------------------------------------
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334 *
335 *------------------------------------------------------------------------------
336 * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
337 *============================================================================
338 ****************************************************************************/
339#ifndef _DRV_HISR_H
340#define _DRV_HISR_H
341
342#include "drv_comm.h"
343#include "kal_general_types.h"
344#include "kal_public_defs.h"
345typedef enum {
346 DRV_CCIF_HISR_ID = 0,
347 DRV_MDIF_HISR_ID,
348 DRV_RT_MDIF_HISR_ID,
349 DRV_BTIF_HISR_ID,
350 DRV_PFC_HISR_ID,
351 DRV_PFC_DECODE_HISR_ID,
352 DRV_PFC_ENCODE_HISR_ID,
353 DRV_USIM_HSIR_ID,
354 DRV_USIM2_HSIR_ID,
355 DRV_FMIF_HISR_ID,
356 DRV_EINT_HISR_ID,
357 DRV_DEINT_HISR_ID,
358 DRV_WDT_HISR_ID,
359 DRV_USB_HISR_ID,
360 DRV_USBDMA_HISR_ID,
361 DRV_GDMA_HISR_ID,
362 DRV_PCMON_HISR_ID,
363 DRV_USB_LOGGING_3G_HISR_ID,
364 DRV_USB_LOGGING_DSP1_HISR_ID,
365 DRV_USB_LOGGING_DSP2_HISR_ID,
366 DRV_NFI_HISR_ID,
367 DRV_MSDC_HISR_ID,
368 DRV_MSDC2_HISR_ID,
369 DRV_SIM_HISR_ID,
370 DRV_SIM2_HISR_ID,
371 DRV_UART1_HISR_ID,
372 DRV_UART2_HISR_ID,
373 DRV_UART3_HISR_ID,
374 DRV_DMA_HISR_ID,
375 DRV_GPT1_HISR_ID,
376 DRV_GPT2_HISR_ID,
377 DRV_GPT3_HISR_ID,
378 DRV_GPT4_HISR_ID,
379 DRV_GPT5_HISR_ID,
380 DRV_GPT6_HISR_ID,
381 DRV_PWM_HISR_ID,
382 DRV_LCD_WFC_HISR_ID,
383 DRV_LCD_HISR_ID,
384 DRV_GOVL_HISR_ID,
385 DRV_HIF0_HISR_ID,
386 DRV_HIF1_HISR_ID,
387 DRV_BTIF_SLEEP_WAKEUP_OUT_HISR_ID,
388 DRV_ACCDET_HISR_ID,
389 DRV_KP_HISR_ID,
390 DRV_AUXADC_HISR_ID,
391 DRV_RTC_HISR_ID,
392 DRV_FPGA_DMA_HISR_ID,
393 DRV_IRDA_HISR_ID,
394 DRV_CHE_HISR_ID,
395 DRV_SPI_HISR_ID,
396 DRV_NIRQ_HISR_ID,
397 DRV_NFIQ_HISR_ID,
398 DRV_DMA2_HISR_ID,
399 DRV_GROT_HISR_ID,
400 DRV_LZMA_HISR_ID,
401 DRV_IDC_HISR_ID,
402 DRV_BUSMON_HISR_ID,
403 DRV_EBC_HISR_ID,
404 DRV_GDMA2_HISR_ID,
405 DRV_DEM_HISR_ID,
406 DRV_MTAD_HISR_ID,
407 MAX_DRV_HISR_DEVICE,
408 DRV_UNKNOWN_HISR_ID = 0xfe
409} DRV_HISR_ID;
410
411#if MAX_DRV_HISR_DEVICE > (32*2)
412#error DRV HISR ID out of range!!
413#endif
414
415
416typedef struct {
417 VOID_FUNC hisr_func;
418 kal_uint16 hisr_count;
419} DRV_HISR_STRUCT;
420
421#if !defined(__FUE__) && !defined(__UBL__)
422extern void drv_active_hisr(DRV_HISR_ID id);
423#else /* __FUE__ */
424#define drv_active_hisr(_id)
425#endif /* __FUE__ */
426
427
428//typedef void (* VOID_FUNCTION)(void);
429extern kal_hisrid drv_hisr;
430extern kal_uint32 drv_hisr_status1;
431extern kal_uint32 drv_hisr_status2;
432extern DRV_HISR_STRUCT DRV_HISR_TABLE[MAX_DRV_HISR_DEVICE];
433
434// MoDIS parser skip start
435extern void DRV_Register_HISR(DRV_HISR_ID hisr_id, VOID_FUNC hisr_func);
436extern void DRV_HISR(void);
437extern void DRV_ERROR_HISR(void);
438extern void drv_hisr_init(void);
439// MoDIS parser skip end
440#endif /*_DRV_HISR_H*/
441