yu.dong | c33b307 | 2024-08-21 23:14:49 -0700 | [diff] [blame^] | 1 | /***************************************************************************** |
| 2 | * Copyright Statement: |
| 3 | * -------------------- |
| 4 | * This software is protected by Copyright and the information contained |
| 5 | * herein is confidential. The software may not be copied and the information |
| 6 | * contained herein may not be used or disclosed except with the written |
| 7 | * permission of MediaTek Inc. (C) 2016 |
| 8 | * |
| 9 | * BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES |
| 10 | * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE") |
| 11 | * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON |
| 12 | * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES, |
| 13 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF |
| 14 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT. |
| 15 | * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE |
| 16 | * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR |
| 17 | * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH |
| 18 | * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO |
| 19 | * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S |
| 20 | * SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM. |
| 21 | * |
| 22 | * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE |
| 23 | * LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, |
| 24 | * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, |
| 25 | * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO |
| 26 | * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE. |
| 27 | * |
| 28 | * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE |
| 29 | * WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF |
| 30 | * LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND |
| 31 | * RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER |
| 32 | * THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC). |
| 33 | * |
| 34 | *****************************************************************************/ |
| 35 | |
| 36 | #ifndef _CL1FHRTBADEFS_H_ |
| 37 | #define _CL1FHRTBADEFS_H_ |
| 38 | |
| 39 | #ifdef MTK_DEV_93M_PREIT |
| 40 | |
| 41 | |
| 42 | #include "kal_public_defs.h" |
| 43 | #include "systyp.h" |
| 44 | |
| 45 | /***************************************************************************** |
| 46 | |
| 47 | FILE NAME: cl1fhrtbadefs.h |
| 48 | |
| 49 | DESCRIPTION: |
| 50 | |
| 51 | This file contains the data type definition of RTBA module in 93m |
| 52 | |
| 53 | *****************************************************************************/ |
| 54 | |
| 55 | /*---------------------------------------------------------------------------- |
| 56 | * Definitions |
| 57 | *----------------------------------------------------------------------------*/ |
| 58 | #if 0 |
| 59 | /* under construction !*/ |
| 60 | #else |
| 61 | #define C2K_SRLTE_RTBA_ON C2K_SRLTE_ON |
| 62 | #endif |
| 63 | |
| 64 | #ifndef MTK_PLT_ON_PC |
| 65 | //#define MTK_DEV_93M_RTBA_BYPASS_ENABLE |
| 66 | #endif |
| 67 | |
| 68 | #define MTK_DEV_93M_RTBA_RBS_ENABLE |
| 69 | #define MTK_DEV_93M_RTBA_HPS_TRIG_ENABLE |
| 70 | #define MTK_DEV_93M_RTBA_RBS_SCENARIO_CONTROL_ENABLE |
| 71 | |
| 72 | #define PNULL (void*)(0) |
| 73 | |
| 74 | #define DUMMY_FRC_INPUT (0xFFFFFFFF) |
| 75 | #define DUMMY_FRAME_NUM_INPUT (0xFFFFFFFF) |
| 76 | #define FRAME_NUM_WRAP (0xFFFFFFFF) |
| 77 | #define MAX_FRAME_NUM (0x100000000L) |
| 78 | #define INVALID_GAP_END_FRC (DUMMY_FRC_INPUT) |
| 79 | #define INVALID_SLT_PCH_CONFIG (0x0) |
| 80 | |
| 81 | |
| 82 | |
| 83 | #define FRC_ADD(a, b) ((a + b)& C2K_FRC_WRAP) |
| 84 | #define FRC_MINUS(late,early) (((late) + MAX_FRC_CNT - (early))& C2K_FRC_WRAP) |
| 85 | #define FRAME_ADD(a, b) ((a + b)& FRAME_NUM_WRAP) |
| 86 | #define FRAME_MINUS(late,early) (((late) + MAX_FRAME_NUM - (early))& FRAME_NUM_WRAP) |
| 87 | |
| 88 | |
| 89 | /** Define for the Starvation timer. */ |
| 90 | #define RTBA_XL1_ICS_SYNC_STARVATION_TIMER (450) /** The XL1 sync channel starvation timer length in ms unit. */ |
| 91 | #define RTBA_XL1_NSLT_PCH_OVHD_STARVATION_TIMER (100) /** The XL1 nslt pch channel starvation timer length in ms unit. */ |
| 92 | #define RTBA_STARVATION_TIMER_FACTOR (10) |
| 93 | #define RTBA_XL1_SLT_PCH_LOST_DET_STARVATION_TIMER (1000) /** The XL1 slt pch lost detect channel starvation timer length in ms unit. */ |
| 94 | #define RTBA_XL1_CONN_PS_RX_STARVATION_TIMER (3000) /** The XL1 connect ps channel starvation timer length in ms unit. */ |
| 95 | |
| 96 | #define RTBA_EVL1_ICS_SYNC_STARVATION_TIMER (180) /** The EvL1 sync channel starvation timer length in ms unit. */ |
| 97 | #define RTBA_EVL1_STDBY_LTE_IDLE_SYNC_STARVATION_TIMER (500) /** The EvStandby sync channel starvation timer length in ms unit. */ |
| 98 | #define RTBA_EVL1_CONN_RX_STARVATION_TIMER (2000) /** The EvL1 connect channel starvation timer length in ms unit. */ |
| 99 | |
| 100 | #define RTBA_CMD_FIFO_NUM (8) |
| 101 | #define RTBA_TOTAL_BLOCK_NUM (2) |
| 102 | #define RTBA_SCHE_BLOCK_INDEX (0) /** This index stores the block which is to be scheduled.*/ |
| 103 | #define RTBA_ACTIVE_BLOCK_INDEX (1) /** This index stores the block which is active/running.*/ |
| 104 | |
| 105 | #define RTBA_SHIFT_NUM1 (1) |
| 106 | #define RTBA_SHIFT_NUM2 (14) |
| 107 | #define RTBA_SECCHAN_SHIFT_NUM1 (31) |
| 108 | |
| 109 | #define Preempt_offset_Time_Min (1) |
| 110 | #define Preempt_offset_Time_Max (3) |
| 111 | #define Resume_offset_Time_Min (2) |
| 112 | #define Resume_offset_Time_Max (4) |
| 113 | |
| 114 | /** set slt_pch_channel execute time, unit:20ms*/ |
| 115 | #define SLT_PCH_EXECUTE_FRAME_NUM (10) |
| 116 | #define NSLT_PCH_LONG_BLOCK_EXECUTE_FRAME_NUM (17) |
| 117 | #define NSLT_PCH_SHORT_BLOCK_EXECUTE_FRAME_NUM (1) |
| 118 | |
| 119 | |
| 120 | /** Set the channel attribute flag.*/ |
| 121 | #define RTBA_PRIMARY_CHAN_BN 0x0001 |
| 122 | #define RTBA_SECONDARY_CHAN_BN 0x0002 |
| 123 | |
| 124 | #define RTBA_RF_ON_MARGIN_INDEX (0) |
| 125 | #define RTBA_RF_OFF_MARGIN_INDEX (1) |
| 126 | |
| 127 | #ifdef MTK_DEV_93M_RTBA_RBS_SCENARIO_CONTROL_ENABLE |
| 128 | #define RBS_SCEN_EVDO_RTB_PREEMPTION (0x00000001) |
| 129 | #define RBS_SCEN_EVDO_RTB_RESUME (0x00000002) |
| 130 | #define RBS_SCEN_1xRTT_RESYNC_RTB_GRANT (0x00000004) |
| 131 | #define RBS_SCEN_1xRTT_RTB_PREEMPTION (0x00000008) |
| 132 | #define RBS_SCEN_1xRTT_RTB_RESUME (0x000000010) |
| 133 | #define RTBA_ABS_VALUE(a) (((a) < 0) ? (-(a)) : (a)) |
| 134 | #endif |
| 135 | /*---------------------------------------------------------------------------- |
| 136 | Macros Definition |
| 137 | ----------------------------------------------------------------------------*/ |
| 138 | #define RTBA_GET_SIM_INDEX(Mode) (gRtbaSimIndexRecord[Mode]) |
| 139 | /** For RTBA to set/get the byPass interaction with RTB. */ |
| 140 | #define RTBA_BYPASS_SET(Mode, ByPass) (gRtbaByPassMode[Mode] = ByPass) |
| 141 | #define RTBA_BYPASS_GET(Mode) (gRtbaByPassMode[Mode]) |
| 142 | /** For RTBA to enable/disable the starvation flag. */ |
| 143 | #define RTBA_STARVATION_TRIGGER(Mode, Enable) (gRtbaScheInfo[Mode].PrimaryChanPara.StarvationTrigger = Enable) |
| 144 | #define RTBA_STARVATION_STATUS(Mode) (gRtbaScheInfo[Mode].PrimaryChanPara.StarvationTrigger) |
| 145 | |
| 146 | /** For RTBA to set/get the starvation timer active/inactive status. */ |
| 147 | #define RTBA_STARVATION_TIMER_STATUS_SET(Mode, Active) (gRtbaStarvationFlag[Mode] = Active) |
| 148 | #define RTBA_STRAVATION_TIMER_STATUS_GET(Mode) (gRtbaStarvationFlag[Mode]) |
| 149 | |
| 150 | /** For RTBA to set/get the gate mode. */ |
| 151 | #define RTBA_GATE_MODE_SET(Mode, ModeType) (gRtbaGateModeStatus[Mode] = ModeType) |
| 152 | #define RTBA_GATE_MODE_GET(Mode) (gRtbaGateModeStatus[Mode]) |
| 153 | |
| 154 | #define RTBA_RC_CONTROL_MARGIN_GET(Channel,MarginType) (gRtbaRcMarginTbl[Channel][MarginType]) |
| 155 | |
| 156 | #define RF_ON_MARGIN() (RtbaCl1GetRFOnMarginInfo()) |
| 157 | #define RF_OFF_MARGIN() (RtbaCl1GetRFOffMarginInfo()) |
| 158 | |
| 159 | /*---------------------------------------------------------------------------- |
| 160 | * Enums |
| 161 | *----------------------------------------------------------------------------*/ |
| 162 | /** The Enum of the RTBA channel based on the schedule type. */ |
| 163 | typedef enum |
| 164 | { |
| 165 | /****************** Schedule Type 0 ********************************************************/ |
| 166 | RTBA_XL1_ICS_PILOT_CHAN = 0, /** ICS Pilot Acq Channel. */ |
| 167 | RTBA_XL1_SINGLE_INTER_MEAS_CHAN, /** Slotted Inter-Meas Channel after QPCH. */ |
| 168 | RTBA_XL1_SLT_CCI_CHAN, /** Slotted CCI Channel. */ |
| 169 | RTBA_XL1_SLT_QPCH1_CHAN, /** Slotted QPCH1 Channle. */ |
| 170 | RTBA_XL1_SLT_QPCH2_CHAN, /** Slotted QPCH2 Channle. */ |
| 171 | RTBA_XL1_ICS_RSSI_SCAN_CHAN, /** ICS RSSI Scan Channel**/ |
| 172 | RTBA_EVL1_ICS_PILOT_CHAN, /** ICS Pilot Acq Channel. */ |
| 173 | RTBA_EVL1_STDBY_LTE_IDLE_MEAS_CHAN, /** Standby Meas Channel in LTE Idle Gap. */ |
| 174 | RTBA_EVL1_STDBY_LTE_CONN_MEAS_CHAN, /** Standby Meas Channel in LTE Connect Gap. */ |
| 175 | RTBA_EVL1_STDBY_CGI_MEAS_CHAN, /** Standby CGI Meas Channel. */ |
| 176 | |
| 177 | /****************** Schedule Type 1 ********************************************************/ |
| 178 | RTBA_XL1_SLT_PCH_CHAN, /** 1xRTT's Slotted PCH Channle. */ |
| 179 | RTBA_EVL1_SLT_PCH_CHAN, /** EVDO's Slotted PCH Channle. */ |
| 180 | |
| 181 | /****************** Schedule Type 2 ********************************************************/ |
| 182 | RTBA_XL1_ICS_SYNC_CHAN, /** 1xRTT ICS Sync Acq Channel. */ |
| 183 | RTBA_XL1_ICS_SYNC_OPTIMIZE_CHAN, /** 1xRTT ICS Sync Acq Channel with optimization schedule manner. */ |
| 184 | RTBA_EVL1_ICS_SYNC_CHAN, /** EVDO ICS Sync Acq Channel. */ |
| 185 | RTBA_EVL1_STDBY_LTE_IDLE_SYNC_CHAN, /** Standby Sync Channel in LTE Idle Gap. */ |
| 186 | RTBA_EVL1_STDBY_LTE_CONN_SYNC_CHAN, /** Standby Sync Channel in LTE Connect Auto Gap. */ |
| 187 | RTBA_EVL1_STDBY_CGI_SYNC_CHAN, /** Standby CGI Sync Channel. */ |
| 188 | |
| 189 | /****************** Schedule Type 3 ********************************************************/ |
| 190 | RTBA_XL1_NSLT_PCH_OVHD_CHAN, /** Non-Slotted PCh Channel. */ |
| 191 | |
| 192 | /****************** Schedule Type 4 ********************************************************/ |
| 193 | RTBA_XL1_NSLT_PCH_EARLY_WAKUP_CHAN, /** Non-Slotted PCh ChannelRegistered in early wakeup. */ |
| 194 | RTBA_XL1_SLT_PCH_LOST_DET_CHAN, /** Slotted PCH Lost Detect Channle. */ |
| 195 | RTBA_XL1_CONN_PS_RX_CHAN, /** Connect PS Rx. */ |
| 196 | RTBA_EVL1_NSLT_CC_OVHD_CHAN, /** Non-Slotted CC Channel. */ |
| 197 | RTBA_EVL1_CONN_RX_CHAN, /** Connect PS Rx. */ |
| 198 | RTBA_EVL1_STDBY_CGI_CHAN, /** Standby CGI Channel. */ |
| 199 | RTBA_PRIMARY_CHAN_END, |
| 200 | |
| 201 | /****************** Secondary Channel ********************************************************/ |
| 202 | RTBA_CL1_CHAN_SECONDARY_START, |
| 203 | RTBA_XL1_NSLT_INTER_MEAS_CHAN, /** Non-Slotted Inter-Meas Channel. */ |
| 204 | RTBA_XL1_AFLT_MEAS_CHAN, /** AFLT Meas Channel. */ |
| 205 | RTBA_XL1_SLT_INTER_MEAS_CHAN, /** Slotted Inter-Meas Channel with PCH_Lost channel. */ |
| 206 | RTBA_XL1_CONN_INTER_MEAS_CHAN, /** Connect Inter Meas. */ |
| 207 | RTBA_XL1_CONN_AFLT_CHAN, /** Connect AFLT Meas. */ |
| 208 | RTBA_EVL1_RAKE_DDL_CHAN, |
| 209 | RTBA_EVL1_INTER_MEAS_CHAN, /** Slotted Inter-Meas Channel. */ |
| 210 | RTBA_EVL1_CONN_INTER_MEAS_CHAN, /** Connect Inter Meas. */ |
| 211 | RTBA_CL1_CHAN_SECONDARY_END, |
| 212 | RTBA_CL1_CHAN_NUM = RTBA_CL1_CHAN_SECONDARY_END |
| 213 | }RtbaCl1ChannelTypeT; |
| 214 | |
| 215 | typedef enum |
| 216 | { |
| 217 | RTBA_SCHEDULE_TYPE_0, /** Schedule Type 0: Single Reservation wo retry; RF stop needed.*/ |
| 218 | RTBA_SCHEDULE_TYPE_1, /** Schedule Type 1: Single Reservation wo retry; Kick by cl1 or HSC; Small block schedule after.*/ |
| 219 | RTBA_SCHEDULE_TYPE_2, /** Schedule Type 2: Continue Reservation with retry; Small block schedule after.*/ |
| 220 | RTBA_SCHEDULE_TYPE_3, /** Schedule Type 3: Continue Reservation with retry; Small + long block switch.*/ |
| 221 | RTBA_SCHEDULE_TYPE_4, /** Schedule Type 4: Continue Reservation with retry; normal block continue reservation*/ |
| 222 | RTBA_SCHEDULE_TYPE_NUM |
| 223 | }RtbaChannelScheTypeT; |
| 224 | |
| 225 | /** The Enum of the protect reason. */ |
| 226 | typedef enum |
| 227 | { |
| 228 | UNPROTECTION, |
| 229 | PROTECT_1XRTT_PS, |
| 230 | PROTECT_EVDO_PS |
| 231 | }RtbaProtecReasonT; |
| 232 | |
| 233 | /** The Scheduled Indication Type Send by RTBA to CL1. */ |
| 234 | typedef enum |
| 235 | { |
| 236 | RTBA_INVALID_IND, |
| 237 | RTBA_GRANT_IND, |
| 238 | RTBA_PREEMPT_IND, |
| 239 | RTBA_RESUME_IND, |
| 240 | RTBA_RF_STOP_IND, |
| 241 | RC_OFF_CMPLT_IND |
| 242 | }RtbaIndTypeT; |
| 243 | |
| 244 | /** The RTBA reserve length calc reference type.*/ |
| 245 | typedef enum |
| 246 | { |
| 247 | FIRST_BLOCK_SCHE, /** Indicate this block is the first block of RTBA register.*/ |
| 248 | RESUME_BLOCK_SCHE, /** Indicate this block is the resume block of RTBA register.*/ |
| 249 | ACTIVE_BLOCK_SCHE /** Indicate this block is the active block of RTBA register.*/ |
| 250 | }RtbaResLenScheTypeT; |
| 251 | |
| 252 | /** The scheduled indication sending time and type. */ |
| 253 | typedef struct |
| 254 | { |
| 255 | RtbaCl1ChannelTypeT Channel; /** The RTBA Channel. */ |
| 256 | RtbaIndTypeT RtbaInd; |
| 257 | SysSFrameTimeT ScheTime; |
| 258 | }RtbaScheIndTypeT; |
| 259 | |
| 260 | /** The RTBA Channel Status Enum. */ |
| 261 | typedef enum |
| 262 | { |
| 263 | INACTIVE_STATUS, |
| 264 | REGISTER_PEND_STATUS, |
| 265 | PREEMPTED_STATUS, |
| 266 | GRANT_PEND_STATUS, |
| 267 | ACTIVE_STATUS, |
| 268 | }RtbaChannelStatusT; |
| 269 | |
| 270 | /** RTBA Priority Index Enum.*/ |
| 271 | typedef enum |
| 272 | { |
| 273 | RTBA_PRIO_INDEX_0, |
| 274 | RTBA_PRIO_INDEX_1, |
| 275 | RTBA_PRIO_INDEX_NUM |
| 276 | }RtbaPriorityTypeT; |
| 277 | |
| 278 | typedef enum |
| 279 | { |
| 280 | RTBA_GATE_MODE_ON, |
| 281 | RTBA_GATE_MODE_OFF |
| 282 | }RtbaGateModeTypeT; |
| 283 | |
| 284 | typedef struct |
| 285 | { |
| 286 | kal_uint32 GapEndTime; |
| 287 | } RtbaGateModeRecordInfoT; |
| 288 | |
| 289 | typedef enum |
| 290 | { |
| 291 | RTBA_GATE_MODE_ENABLE, |
| 292 | RTBA_GATE_MODE_DISABLE, |
| 293 | RTBA_MMO_GAP_OFFER_ENABLE, |
| 294 | RTBA_MMO_GAP_OFFER_DISABLE, |
| 295 | RTBA_MMO_GAP_OFFER_DISABLE_BY_RSVAS_SUSPEND, |
| 296 | RTBA_MMO_GAP_OFFER_DISABLE_BY_RMC_INIT_DONE |
| 297 | } RtbaGateModeReasonT; |
| 298 | |
| 299 | /** RTBA Margin Combination for RC Control.*/ |
| 300 | typedef enum |
| 301 | { |
| 302 | RTBA_FAKE_SCHE_MARGIN, |
| 303 | RTBA_FEC_DDL_MARGIN, |
| 304 | RTBA_CHECK_DSP_IDLE_MARGIN, |
| 305 | RC_CONTROL_MARGIN_NUM |
| 306 | }RtbaRcContrilMarginT; |
| 307 | |
| 308 | #ifdef SYS_OPTION_TX_TAS_ENABLE |
| 309 | typedef enum |
| 310 | { |
| 311 | RTBA_TAS_BACK_OFF_DISABLE, |
| 312 | RTBA_TAS_BACK_OFF_ENABLE, |
| 313 | RTBA_TAS_BACK_OFF_UNKNOWN |
| 314 | }RtbaTasQueryResultT; |
| 315 | #endif |
| 316 | |
| 317 | |
| 318 | /** RTBA RC Timing Structure.*/ |
| 319 | typedef struct |
| 320 | { |
| 321 | SysSFrameTimeT FirstEventTiming; |
| 322 | kal_bool FakeFlag; |
| 323 | RtbaCl1ChannelTypeT Cl1Channel; |
| 324 | }RtbaRcTimingTypeT; |
| 325 | |
| 326 | typedef void (*RtbaCbFunc)(RtbaIndTypeT RtbaInd, RtbaRcTimingTypeT RcTiming); |
| 327 | |
| 328 | typedef void (*RtbaQueryRsltProcFunc)(SysAirInterfaceT Mode, kal_bool ReserveSuccess,kal_uint32 AvailableTime); |
| 329 | |
| 330 | typedef void (*RtbaSeFnEvtFunc) (kal_uint32 Param); |
| 331 | |
| 332 | /** The RTBA RC Control Reference Timing.*/ |
| 333 | typedef struct |
| 334 | { |
| 335 | kal_uint32 RtbaRfStopRefTiming; |
| 336 | kal_uint32 RtbaPreemptRefTiming; |
| 337 | kal_uint32 RtbaResumeGrantRefTiming; |
| 338 | } RtbaScheRefTimeTypeT; |
| 339 | |
| 340 | /** Channel's RTB block information. */ |
| 341 | typedef struct |
| 342 | { |
| 343 | RtbaCl1ChannelTypeT Channel; /** The scheduled channel type in RTBA. */ |
| 344 | kal_uint32 ChannelPrio; /** Indicate the channel priority. */ |
| 345 | kal_uint32 StartTime; /** Indicate the start time of channel in FRC. */ |
| 346 | kal_uint32 EndTime; /** Indicate the end time of the channel in FRC. */ |
| 347 | kal_uint32 ReserveLen; /** Indicate the reserve length of this channel. */ |
| 348 | kal_uint32 PostProcessMargin; /** Indicate the channel post process margin.*/ |
| 349 | kal_uint32 ActualReserveLen; /** The actual reserve length of the channel. */ |
| 350 | }RtbaChannelBlkInfoT; |
| 351 | |
| 352 | |
| 353 | /** The Primary Channel Specific parameters used. */ |
| 354 | typedef struct |
| 355 | { |
| 356 | RtbaChannelStatusT PreStatus; /** Indicate the channel's previous status. */ |
| 357 | RtbaChannelStatusT Status; /** Indicate the channel status. */ |
| 358 | RtbaChannelBlkInfoT PriChannelInfo[RTBA_TOTAL_BLOCK_NUM]; /** Indicate the channel information of schedule block and pending block. */ |
| 359 | RtbaScheRefTimeTypeT ScheRefTime; /** The RTBA schedule reference time.*/ |
| 360 | RtbaChannelScheTypeT ScheType; /** Indicate the channel schedule type.*/ |
| 361 | kal_bool LongBlk; /** Indicate this is the long blk. */ |
| 362 | kal_bool StarvationTrigger; /** Indicate the starvation triggered. */ |
| 363 | kal_bool PriChanRegistered; /** Indicate the channel is registered to RTB.*/ |
| 364 | RtbaCbFunc PriCallBackFunc; /** The Primary channel call back function pointer.*/ |
| 365 | kal_uint32 QueryFrameNum; /** Indicate the query frame number.*/ |
| 366 | kal_bool ScheRangeFlag; /** Indicate the RTBA needs to self-schedule the RTB block in the range of GapEndFRC.*/ |
| 367 | kal_uint32 GapEndFRC; /** Indicate the gap end FRC time for specific channels.*/ |
| 368 | kal_bool KickQueryByHsc; /** Indicate the Kick Query is triggered by HSC, no need to call back execute.*/ |
| 369 | kal_bool ForceRtbReject; /** Indicate whether to force reject the RTB query result.*/ |
| 370 | }RtbaPriChannelParaT; |
| 371 | |
| 372 | |
| 373 | /** The Secondary Channel Specific parameters used. */ |
| 374 | typedef struct |
| 375 | { |
| 376 | RtbaChannelStatusT PreStatus; /** Indicate the channel's previous status. */ |
| 377 | RtbaChannelStatusT Status; /** Indicate the channel status. */ |
| 378 | RtbaChannelBlkInfoT SecChannelInfo; /** Indicate the channel information of scheduled secondary block.*/ |
| 379 | RtbaCbFunc SecCallBackFunc; /** The Secondary channel call back function pointer.*/ |
| 380 | }RtbaSecChannelParaT; |
| 381 | |
| 382 | /** The RTBA internal data structure for schedule including channel information. */ |
| 383 | typedef struct |
| 384 | { |
| 385 | RtbaPriChannelParaT PrimaryChanPara; /** The primary channel parameters. */ |
| 386 | RtbaSecChannelParaT SecondaryChanPara; /** The secondary channel parameters, used for inter-meas block along with PCH continues block. */ |
| 387 | }RtbaScheInfoT; |
| 388 | |
| 389 | /** defines the RTBA API command types. */ |
| 390 | typedef enum |
| 391 | { |
| 392 | RTBA_CMD_NONE, |
| 393 | RTBA_CMD_REG_PRIMARY, |
| 394 | RTBA_CMD_REG_SECONDARY, |
| 395 | RTBA_CMD_CANCEL_CHANEL, |
| 396 | RTBA_CMD_PRIO_BOOST, |
| 397 | RTBA_CMD_SMALL_BLK_REG, |
| 398 | RTBA_CMD_CHANNELCHANGE, |
| 399 | RTBA_CMD_PROTECT_CFG, |
| 400 | RTBA_CMD_KICK_QUERY, |
| 401 | RTBA_CMD_CANCEL_ALL, |
| 402 | RTBA_CMD_CANCEL_QUERY, |
| 403 | RTBA_CMD_GATE_MODE_REQ, |
| 404 | RTBA_CMD_ADJUST_CHAN_POS, |
| 405 | RTBA_CMD_CALC_PAGE_POS |
| 406 | }RtbaCmdTypeT; |
| 407 | |
| 408 | typedef struct |
| 409 | { |
| 410 | RtbaCmdTypeT Fifo[RTBA_CMD_FIFO_NUM]; |
| 411 | kal_uint8 fifo_index; |
| 412 | }RtbaCmdFifoTypeT; |
| 413 | |
| 414 | /** RTBA use this to record the Cl1's Primary Channel regisger information in ADS.*/ |
| 415 | typedef struct |
| 416 | { |
| 417 | RtbaCl1ChannelTypeT Cl1Channel; |
| 418 | kal_bool StartTimeValid; |
| 419 | kal_uint32 StartTime; |
| 420 | kal_uint32 ReserveLen; |
| 421 | kal_uint32 GapEndFRC; |
| 422 | kal_uint32 PostProcessMargin; |
| 423 | RtbaCbFunc RtbaCallBackFunc; |
| 424 | } RtbaPriRegisterReqAdsTypeT; |
| 425 | |
| 426 | /** RTBA use this to record the Cl1's Secondary Channel regisger information in ADS.*/ |
| 427 | typedef struct |
| 428 | { |
| 429 | RtbaCl1ChannelTypeT Cl1Channel; |
| 430 | kal_bool StartTimeValid; |
| 431 | kal_uint32 StartTime; |
| 432 | kal_uint32 ReserveLen; |
| 433 | RtbaCbFunc RtbaCallBackFunc; |
| 434 | } RtbaSecRegisterReqAdsTypeT; |
| 435 | |
| 436 | /** RTBA use this to record the Cl1's cancel information in ADS.*/ |
| 437 | typedef struct |
| 438 | { |
| 439 | RtbaCl1ChannelTypeT Cl1Channel; |
| 440 | kal_bool CancelAll; |
| 441 | } RtbaCancelReqAdsTypeT; |
| 442 | |
| 443 | /** RTBA use this to record the CL1's channel protection cfg.*/ |
| 444 | typedef struct |
| 445 | { |
| 446 | kal_bool ProtectionTrig; |
| 447 | } RtbaChannelProtectAdsTypeT; |
| 448 | |
| 449 | /** RTBA use this to record the to be changed channel protection cfg.*/ |
| 450 | typedef struct |
| 451 | { |
| 452 | kal_bool ChannelChangePending; |
| 453 | RtbaCl1ChannelTypeT DestChannel; |
| 454 | } RtbaChannelChangeAdsTypeT; |
| 455 | |
| 456 | /** RTBA use this to record the to be changed channel priority.*/ |
| 457 | typedef struct |
| 458 | { |
| 459 | RtbaCl1ChannelTypeT PrioChannel; |
| 460 | } RtbaChannelPrioBoostAdsTypeT; |
| 461 | |
| 462 | /** RTBA use this to record the gate mode releated Ads.*/ |
| 463 | typedef struct |
| 464 | { |
| 465 | RtbaGateModeReasonT Reason; |
| 466 | kal_uint32 GapLen; |
| 467 | } RtbaGateModeReqAdsTypeT; |
| 468 | |
| 469 | /** RTBA use this structure to record the channel adjust ads.*/ |
| 470 | typedef struct |
| 471 | { |
| 472 | kal_uint32 NewStartTime; |
| 473 | kal_uint32 ReserveLen; |
| 474 | } RtbaAdjustChanPosAdsTypeT; |
| 475 | |
| 476 | /** RTBA use this structure to record the small block register ads.*/ |
| 477 | typedef struct |
| 478 | { |
| 479 | kal_bool QueryResult; |
| 480 | kal_uint32 NextavailableTime; |
| 481 | } RtbaScheSmallBlkRegTypeT; |
| 482 | typedef struct |
| 483 | { |
| 484 | RtbaPriRegisterReqAdsTypeT PriamaryRegAds; |
| 485 | RtbaSecRegisterReqAdsTypeT SecondaryRegAds; |
| 486 | RtbaCancelReqAdsTypeT CancelAllAds; |
| 487 | RtbaCancelReqAdsTypeT CancelChannelAds; |
| 488 | RtbaChannelProtectAdsTypeT ProtectAds; |
| 489 | RtbaChannelChangeAdsTypeT ChannelChangeAds; |
| 490 | RtbaChannelPrioBoostAdsTypeT BoostChannelAds; |
| 491 | RtbaGateModeReqAdsTypeT GateModeReqAds; |
| 492 | RtbaAdjustChanPosAdsTypeT ChannelAdjPosAds; |
| 493 | RtbaScheSmallBlkRegTypeT SmallBlkRegAds; |
| 494 | } RtbaCmdReqAdsTypeT; |
| 495 | |
| 496 | /** defines for RTBA Higher Timer Query Request ads send to RTB.*/ |
| 497 | typedef struct |
| 498 | { |
| 499 | kal_int16 ChannelType; |
| 500 | kal_int32 StartTime; |
| 501 | kal_int32 CheckLen; |
| 502 | kal_int32 ChannelPrio; |
| 503 | kal_int32 PostProcessMargin; |
| 504 | } RtbaHighTimerQueryInfoTypeT; |
| 505 | |
| 506 | typedef struct |
| 507 | { |
| 508 | kal_int16 ChannelType; |
| 509 | kal_int32 StartTime; |
| 510 | kal_int32 ReserveLen; |
| 511 | kal_int32 ChannelPrio; |
| 512 | } RtbaRegisrerInfoTypeT; |
| 513 | |
| 514 | typedef struct |
| 515 | { |
| 516 | RtbaCl1ChannelTypeT Channel; |
| 517 | kal_bool DeniedByRtb; |
| 518 | kal_bool TimeValid; |
| 519 | kal_uint32 AvailableTime; |
| 520 | } RtbaDeniedIndTypeT; |
| 521 | |
| 522 | typedef enum |
| 523 | { |
| 524 | RTBA_SCHE_SEFN_STARTVATION, |
| 525 | RTBA_SCHE_SEFN_RF_STOP_IND, |
| 526 | RTBA_SCHE_SEFN_SYNC_RESERVE_END_IND, |
| 527 | RTBA_SCHE_SEFN_MMO_GAP_DISABLE, |
| 528 | RTBA_SEFN_SCHE_NUM |
| 529 | }RtbaScheSefnTypeT; |
| 530 | |
| 531 | /* RTBA Gate Mode Req event structure */ |
| 532 | typedef struct |
| 533 | { |
| 534 | SysAirInterfaceT Owner; /* 1xRTT or EVDO */ |
| 535 | RtbaGateModeReasonT Reason; /* Gate Mode Reason */ |
| 536 | kal_uint32 GapLen; /* Gap Length for MMO GAP OFFER ENABLE.*/ |
| 537 | }RtbaGateModeEventTypeT; |
| 538 | |
| 539 | typedef void (*RtbaScheSefnFunction)(kal_uint32 Parm); |
| 540 | |
| 541 | #define MERGE_STR(x,y) x##y /* ex : if x=123 and y=456, then MERGE_STR(x,y)=123456 */ |
| 542 | #define CL1_TIMER_TYPE(x) MERGE_STR(r,x) |
| 543 | |
| 544 | //MD1 and MD3 compiles independently. Therefore, MD1 should copy the MD3's files on MD1 side. |
| 545 | typedef enum |
| 546 | { |
| 547 | CL1_TIMER_TYPE(CTimerInit) = -1, |
| 548 | #include "cl1_timertype.h" |
| 549 | CL1_TIMER_TYPE(CTimerNum) |
| 550 | }RtbTimerTypeT; |
| 551 | |
| 552 | #undef MERGE_STR |
| 553 | #undef CL1_TIMER_TYPE |
| 554 | |
| 555 | typedef struct |
| 556 | { |
| 557 | kal_uint32 ChannelBitMap; /*mapping C2K's channel type*/ |
| 558 | kal_uint16 IsPeriodic; /*indicate the deny pattern is periodic or not*/ |
| 559 | kal_uint16 PatternBitMap; /*mapping deny pattern*/ |
| 560 | }RbsDenyPatternParaT; |
| 561 | |
| 562 | typedef struct |
| 563 | { |
| 564 | kal_uint16 RbsPatternInfo[RTBA_PRIMARY_CHAN_END]; /*Record PatternBitMap bases on channel type*/ |
| 565 | kal_uint32 IsPeriodicMap; /*mapping channel's PatternBitMap is periodic or not*/ |
| 566 | }RbsDenyPatternInfoTypeT; |
| 567 | |
| 568 | /* HSC preempt trigger action type*/ |
| 569 | typedef enum |
| 570 | { |
| 571 | HSC_PREEMPT_HYBRID_TYPE, |
| 572 | HSC_PREEMPT_SHDR_TYPE, |
| 573 | HSC_PREEMPT_EARLY_WAKEUP_TYPE, |
| 574 | HSC_PREEMPT_TYPE_NUM |
| 575 | }HscActionParaE; |
| 576 | |
| 577 | typedef struct |
| 578 | { |
| 579 | kal_uint32 ChannelBitMap; /* mapping C2K's channel type*/ |
| 580 | kal_bool GrantPreemptTrig; /* Indicate RTBA grant or preempt to trigger Hsc preempt flow*/ |
| 581 | kal_uint8 TimingBitMap; /* mapping block num and then judge whether to trigger Hsc preempt flow*/ |
| 582 | kal_uint8 PreemptTimeOffset; /* preempt timing offset after trigger*/ |
| 583 | kal_uint8 ResumeTimeOffset; /* resume timing offset after trigger*/ |
| 584 | HscActionParaE HscActionType; /* indicate active type, hybrid,SHDR or early wakeup*/ |
| 585 | }HscPreemptTrigParaT; |
| 586 | |
| 587 | typedef struct |
| 588 | { |
| 589 | kal_bool GrantPreemptTrig; /* Indicate RTBA grant or preempt to trigger Hsc preempt flow*/ |
| 590 | kal_uint8 TimingBitMap[RTBA_PRIMARY_CHAN_END]; /* Record timing bit map bases on different channel type*/ |
| 591 | kal_uint8 PreemptTimeOffset; /* preempt timing offset after trigger*/ |
| 592 | kal_uint8 ResumeTimeOffset; /* resume timing offset after trigger*/ |
| 593 | HscActionParaE HscActionType; /* indicate active type, hybrid,SHDR or early wakeup*/ |
| 594 | kal_bool SecChanHscTrig; /* indicate whether secondary channel need to trigger HSC preempt*/ |
| 595 | }HscPreemptTrigInfoTypeT; |
| 596 | |
| 597 | typedef struct |
| 598 | { |
| 599 | kal_uint32 LastPagingTime; /* Indicate Last paging receiving time*/ |
| 600 | kal_uint32 Slot_cycle; /* Indicate 1xRTT DRX cycle*/ |
| 601 | kal_bool Calc_Page; /* Indicate RTBA to calculate Paging position*/ |
| 602 | kal_bool Sche_Page; /* Indicate RTBA to query resources without minAcceptLenght*/ |
| 603 | kal_bool Adjust_Len; /* Indicate RTBA to adjust Nslt_pch channel length*/ |
| 604 | }RtbaSltPchScheParaT; |
| 605 | |
| 606 | typedef struct |
| 607 | { |
| 608 | kal_uint32 LastPagingTime; /* Indicate Last paging receiving time*/ |
| 609 | kal_uint32 Slot_cycle; /* Indicate 1xRTT DRX cycle*/ |
| 610 | kal_bool Calc_Page; /* Indicate RTBA to calculate Paging position*/ |
| 611 | }RtbaSltPchParaT; |
| 612 | typedef enum |
| 613 | { |
| 614 | DO_RTB_PREEMPTION_AND_1xRTT_HYBRID_RESYNC_ACCEPT, |
| 615 | DO_RTB_PREEMPTION_AND_1xRTT_SHDR_RESYNC_ACCEPT, |
| 616 | DO_RTB_RESUME_AND_1xRTT_HYBRID_RESYNC_ACCEPT, |
| 617 | DO_RTB_RESUME_AND_1xRTT_SHDR_RESYNC_ACCEPT, |
| 618 | DO_RTB_PREEMPTION_AND_1xRTT_RTB_PREEMPT, |
| 619 | DO_RTB_RESUME_AND_1xRTT_RTB_PREEMPT, |
| 620 | DO_RTB_PREEMPTION_AND_1xRTT_RTB_RESUME, |
| 621 | DO_RTB_RESUME_AND_1xRTT_RTB_RESUME, |
| 622 | RTT_TIMING_CHANGE_SYNCTIME_CALC_TEST, |
| 623 | EVDO_TIMING_CHANGE_SYNCTIME_CALC_TEST, |
| 624 | FIRST_FRAME_TICK_POSITION_TST_1, |
| 625 | FIRST_FRAME_TICK_POSITION_TST_2, |
| 626 | }RbsScenarioConfigTypeT; |
| 627 | typedef struct |
| 628 | { |
| 629 | RbsScenarioConfigTypeT RbsScenCfg; |
| 630 | kal_int32 TimingOffset; |
| 631 | }RbsScenConfigParaT; |
| 632 | typedef enum |
| 633 | { |
| 634 | /** The initial state for RBS scenario control module.*/ |
| 635 | RBS_SCEN_CTRL_NULL, |
| 636 | |
| 637 | /** Indicate the RBS scenario parameter is configured but the pre-condition may not meet.*/ |
| 638 | RBS_SCEN_CTRL_CONFIGED, |
| 639 | |
| 640 | /** Indicate the RBS scenario pre-condition has meet, RTBA will start to re-schedule the RTB block to fulfill the RBS scenario.*/ |
| 641 | RBS_SCEN_CTRL_TRIGGERED, |
| 642 | |
| 643 | /** Indicate the RTB Block has been re-scheduled for scenario control.*/ |
| 644 | RBS_SCEN_CTRL_RTB_RESCHED, |
| 645 | |
| 646 | /** Indicate the channel has receive RTB grant.*/ |
| 647 | RBS_SCEN_CTRL_SCHE_RTB_GRANT, |
| 648 | |
| 649 | /** Indicate the channel has receive RTB preempt.*/ |
| 650 | RBS_SCEN_CTRL_SCHE_RTB_PREEMPT, |
| 651 | |
| 652 | /** Indicate the channel has receive RTB resume.*/ |
| 653 | RBS_SCEN_CTRL_SCHE_RTB_RESUME, |
| 654 | |
| 655 | /** Indicate the RBS scenario has achieved the scenario type configure.*/ |
| 656 | RBS_SCEN_CTRL_FINISHED |
| 657 | }RbsScenCtrlStateTypeT; |
| 658 | |
| 659 | typedef struct |
| 660 | { |
| 661 | RbsScenarioConfigTypeT RbsScenarioConfig; |
| 662 | kal_int32 TimingOffset; |
| 663 | } RbsScenarioControlParaT; |
| 664 | |
| 665 | typedef struct |
| 666 | { |
| 667 | /** The RBS scenario control parameters.*/ |
| 668 | RbsScenarioControlParaT RbsScenCtrlPara; |
| 669 | /** The Do state for RBS scenario control module.*/ |
| 670 | RbsScenCtrlStateTypeT DoRbsState; |
| 671 | /** The 1xRTT state for RBS scenario control module.*/ |
| 672 | RbsScenCtrlStateTypeT RttRbsState; |
| 673 | /** 1xRTT event reference time.*/ |
| 674 | kal_uint32 RttEventRefTime; |
| 675 | /** EVDO event reference time.*/ |
| 676 | kal_uint32 EvdoEventRefTime; |
| 677 | /** 1xRTT System Event Timing.*/ |
| 678 | SysSFrameTimeT RttEventSysTime; |
| 679 | /** EVDO System Event Timing.*/ |
| 680 | SysSFrameTimeT DoEventSysTime; |
| 681 | /** The RBS Scenario control bitmap collection.*/ |
| 682 | kal_uint32 RbsScenCtrlBitmap; |
| 683 | /** The Record Target RBS scenario control bitmap.*/ |
| 684 | kal_uint32 TargetRbsScenCtrlBitmap; |
| 685 | /** Indicate the event timing is adjusted by RTBA schedule.*/ |
| 686 | kal_bool SpecificEvtTimingSet; |
| 687 | } RbsScenarioControlScheInfoT; |
| 688 | |
| 689 | typedef enum |
| 690 | { |
| 691 | CTimer_None, |
| 692 | CTimer_XL1IcsPiolt, |
| 693 | CTimer_XL1IcsSync, |
| 694 | CTimer_XL1NsltPchOvhd, |
| 695 | CTimer_XL1NsltInterMeas, |
| 696 | CTimer_XL1AfltMeas, |
| 697 | CTimer_XL1SltCci, |
| 698 | CTimer_XL1SltQpch_1, |
| 699 | CTimer_XL1SltQpch_2, |
| 700 | CTimer_XL1SltPch, |
| 701 | CTimer_XL1SltPchLostDet, |
| 702 | CTimer_XL1SltnterMeas, |
| 703 | CTimer_XL1ConnectPsRx, |
| 704 | CTimer_XL1ConnectInterMeas, |
| 705 | CTimer_XL1ConnectAfltMeas, |
| 706 | CTimer_EvL1IcsPilot, |
| 707 | CTimer_EvL1IcsSync, |
| 708 | CTimer_EvL1NsltCC, |
| 709 | CTimer_EvL1SltPch, |
| 710 | CTimer_EvL1InterMeas, |
| 711 | CTimer_EvL1ConnectRx, |
| 712 | CTimer_EvL1ConnectInterMeas, |
| 713 | CTimer_EvStdbyMeas, |
| 714 | CTimer_EvStdbySync, |
| 715 | CTimer_EvStdbyCgi, |
| 716 | CTimer_End |
| 717 | }RtbTimerTypeE; |
| 718 | |
| 719 | /***************************************************************************** |
| 720 | * End of File |
| 721 | *****************************************************************************/ |
| 722 | #endif |
| 723 | #endif |
| 724 | |