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yu.dongc33b3072024-08-21 23:14:49 -07001/*****************************************************************************
2* Copyright Statement:
3* --------------------
4* This software is protected by Copyright and the information contained
5* herein is confidential. The software may not be copied and the information
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7* permission of MediaTek Inc. (C) 2016
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24* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
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33*
34*****************************************************************************/
35#ifndef _CL1_SH_RFC_H_
36#define _CL1_SH_RFC_H_
37
38/***********************************************************************************
39*
40* FILE NAME : cl1shrfc.h
41*
42* DESCRIPTION : RF control interface defination
43*
44* HISTORY :
45* See Log at end of file
46*
47************************************************************************************/
48
49
50#include "kal_public_api.h"
51#include "sysapi.h"
52#include "cl1rcapi.h"
53#if (!defined(__MD93__)) && (!defined(__MD95__))
54#include "../rfd/cl1_rf_tas_public.h"
55#include "cl1d_rf_common_defs.h"
56#endif
57
58/*----------------------------------------------------------------------------
59 Global Defines
60----------------------------------------------------------------------------*/
61/* Pll settling time In Echip, TBD, would be replaced by RFD interface*/
62#define RFC_PLL_TIM_ECHIP (246*8)
63
64#if defined( __MD93__)||defined( __MD95__)
65#define RFC_DO_RXPATH_DELAY (128)
66#else
67#if defined(MT6297)
68#define RFC_DO_RXPATH_DELAY (213)
69#elif defined(MT6885) || defined(MT6873)
70#define RFC_DO_RXPATH_DELAY (193)
71#else
72#define RFC_DO_RXPATH_DELAY (193)
73#endif
74#endif
75
76/**For MD93 and MD95, the RFC_RTT_TRXPATH_DELAY need to set different value!*/
77#ifdef __MD93__
78#define RFC_DO_TRXPATH_DELAY (278) //Same as DO_TXRXDELAY
79#elif defined __MD95__
80#define RFC_DO_TRXPATH_DELAY (273) //Same as DO_TXRXDELAY
81#else
82/**Used to Other Setting ,for example MD97*/
83#if defined(MT6297)
84#define RFC_DO_TRXPATH_DELAY (419) //Same as DO_TXRXDELAY /**415 -->419, Tx Transmite Error change from 0.5us to 0.05us for Apollo*/
85#elif defined(MT6885)|| defined(MT6873)
86#define RFC_DO_TRXPATH_DELAY (402) //Same as DO_TXRXDELAY /**419 -->399, Tx Transmite Error change from 1.9us to 0.05us for Petrus*/
87#else
88#define RFC_DO_TRXPATH_DELAY (402) //Same as DO_TXRXDELAY
89#endif
90
91#endif
92
93/**For MD93 and MD95, the RFC_RTT_TRXPATH_DELAY need to set different value!*/
94#ifdef __MD93__
95#define RFC_RTT_TRXPATH_DELAY (278) //Same as RTT_TXRXDELAY_INIT
96#define RFC_RTT_RXPATH_DELAY (128)
97#elif defined __MD95__
98#define RFC_RTT_TRXPATH_DELAY (273) //Same as RTT_TXRXDELAY_INIT
99#define RFC_RTT_RXPATH_DELAY (128)
100#else
101/**Used to Other Setting ,for example MD97*/
102#if defined(MT6297)
103#define RFC_RTT_TRXPATH_DELAY (419) //Same as RTT_TXRXDELAY_INIT /**415 -->419, Tx Transmite Error change from 0.5us to 0.05us for Apollo*/
104#define RFC_RTT_RXPATH_DELAY (213)
105#elif defined(MT6885) || defined(MT6873)
106#define RFC_RTT_TRXPATH_DELAY (402) //Same as RTT_TXRXDELAY_INIT /**419 -->399, Tx Transmite Error change from 1.9us to 0.05us for Petrus*/
107#define RFC_RTT_RXPATH_DELAY (193)
108#else
109#define RFC_RTT_TRXPATH_DELAY (402) //Same as RTT_TXRXDELAY_INIT
110#define RFC_RTT_RXPATH_DELAY (193)
111#endif
112#endif
113
114#define RFC_RTT_TXPATH_DELAY (RFC_RTT_TRXPATH_DELAY - RFC_RTT_RXPATH_DELAY)
115
116#define RFC_RTT_GATE_ON_OFF_DELAY (400/*TBD*/)
117
118
119/* 80ms Period length in Echip*/
120#define RFC_80MS_PERIOD 0xC0000
121
122/* PCG Period Length In Echip*/
123#define RFC_RTT_PCG_PERIOD (1536*8)
124
125/* Slot Period Length In Echip*/
126#define RFC_EVDO_SLOT_PERIOD (2048*8)
127
128
129typedef enum
130{
131 RFC_PATH_RxM = 0,
132 RFC_PATH_RxD,
133 RFC_PATH_RxS,
134 RFC_PATH_Tx,
135 RFC_MAX_PATH
136}RfcPathTypT;
137
138typedef enum
139{
140 RFC_FREEZE_NONE = 0,
141 RFC_TX_FREEZE,
142 RFC_TX_UNFREEZE,
143}RfcFreezeTypT;
144
145
146typedef enum
147{
148 RFC_TASK_REQUEST = 0,
149 RFC_FRAME_REQUEST,
150 RFC_SLOT_PCG_REQUEST
151}RfcRequestTypT;
152
153
154typedef enum
155{
156 RFC_PATH_OFF,
157 RFC_PATH_OFF_ONGOING,
158 RFC_PATH_ON,
159 RFC_PATH_ON_ONGOING
160}RfcPathStatusT;
161
162
163typedef enum
164{
165 RFC_PATH_RC_OFF,
166 RFC_PATH_RC_ONGOING,
167 RFC_PATH_RC_ON
168}RfcPathRcStatusT;
169
170
171typedef enum
172{
173 RFC_IDLE,
174 RFC_1X_MAIN_ONLY,
175 RFC_1X_DIV_ONLY,
176 RFC_1X_DIV_RX,
177 RFC_DO_MAIN_ONLY,
178 RFC_DO_DIV_ONLY,
179 RFC_DO_DIV_RX,
180 RFC_SHDR,
181 RFC_1X_DFS,
182 RFC_DO_DFS
183}RfcScenarioT;
184
185
186typedef enum
187{
188 ACTION_OFF = 0,
189 ACTION_ON = 1,
190 ACTION_NUM = 2
191}RfcActionOnOffT;
192
193typedef struct
194{
195 SysAirInterfaceT Interface;
196 SysCdmaBandT Band;
197 kal_uint16 Chan;
198 RfcPathTypT Path;
199 RfcActionOnOffT ActionTyp;
200 RfcRequestTypT RequestTyp;
201 void* CommonParmPtr;
202}RfcActionT;
203
204
205typedef struct
206{
207 /* 80ms timing, in echip*/
208 kal_int32 Timing;
209
210 /* Super Frame number*/
211 kal_uint64 SuperFrame;
212
213 /* Immaction, if TRUE, "Timing&SuperFrame" would be obmitted*/
214 kal_bool ImmAction;
215}RfcActionTimeT;
216
217
218typedef struct
219{
220 /* Req Timing Info, Filled Rx Modules(RTBA) in FH
221 * if "RcCtrl" is TRUE, filled with RC timing.
222 * Otherwise, filled with RF timing.
223 */
224 RtbaRcTimingTypeT ReqTiming;
225
226 /* Rake Ddl Indication , for Rx Only*/
227 kal_bool RakeDdlInd;
228
229 /* Rc Control Indication*/
230 kal_bool RcCtrl;
231
232 /* Used for Rc RxOff with "RcCtrl"== TRUE Only*/
233 Cl1RcReqEndIndT EndIndication;
234
235 /* Access Tx Indication*/
236 kal_bool AcTxInd;
237
238 /* Action body*/
239 RfcActionT Action;
240
241 /* Action Timing, Filled by Tx Modules in Task(Without RTBA)
242 * "ImmAction" is valid for both Tx and Rx immedaite action.
243 */
244 RfcActionTimeT ActionTiming;
245}RfcActionReqT;
246
247
248/*----------------------------------------------------------------------------
249 Global Data
250----------------------------------------------------------------------------*/
251
252/*----------------------------------------------------------------------------
253 Global Variables
254----------------------------------------------------------------------------*/
255#if (!defined(__MD93__)) && (!defined(__MD95__))
256extern C2K_CUSTOM_TAS_STATE_E AntCurrentState[RF_Band_NUM_MAX];
257extern C2K_CUSTOM_TAS_STATE_E GetAntCurrentState(SysCdmaBandT band);
258#endif
259
260/*----------------------------------------------------------------------------
261 Global Function Prototypes
262----------------------------------------------------------------------------*/
263void Cl1ShRfcInit(void);
264void Cl1ShRfcActionReq(RfcActionReqT *ActionReqPtr);
265void Cl1ShRfcMain(SysAirInterfaceT Interface);
266void Cl1ShRfcStatChange(kal_uint32 Param);
267void Cl1ShRfcRcStatToOff(kal_uint32 Param);
268void Cl1ShRfcRcStatToOn(kal_uint32 Param);
269RfcPathStatusT Cl1ShRfcRfStatGet(SysAirInterfaceT Interface, RfcPathTypT Path);
270RfcScenarioT Cl1ShRfcScenarioGet(void);
271void Cl1ShRfcTxFreezeReq(SysAirInterfaceT Interface);
272void Cl1ShRfcTxUnFreezeReq(SysAirInterfaceT Interface);
273kal_bool Cl1ShRfcTxFreezeReqCheck(SysAirInterfaceT Interface);
274RfcPathRcStatusT Cl1ShRfcRcStatGet(SysAirInterfaceT Interface, RfcPathTypT Path);
275void Cl1RfcGetNextRxBoundary(SysAirInterfaceT Interface, kal_int32 *EchipTime, kal_uint64 *SuperFrame);
276void Cl1ShRfcRcReq(SysAirInterfaceT Interface, RfcPathTypT Path, RfcActionOnOffT ActionTyp, RtbaRcTimingTypeT *RcReqTimingPtr, Cl1RcReqEndIndT EndIndication, kal_bool RakeDdlInd, kal_bool AcTxInd);
277void Cl1ShRfcrRxPathInfoGet(SysAirInterfaceT Interface, kal_uint16 *BandPtr, kal_uint16 *ChanPtr);
278void Cl1ShRfcTxOnTimingLogging(void);
279
280#ifdef SYS_OPTION_TX_TAS_ENABLE
281kal_bool Cl1ShRfcOnlyRfImmediateOn(SysAirInterfaceT CurrInterface, kal_uint16 CurrBand,
282 kal_uint16 CurrChan);
283kal_bool Cl1ShRfcOnlyRfImmediateOff(SysAirInterfaceT CurrInterface, kal_uint16 CurrBand,
284 kal_uint16 CurrChan);
285#endif
286#ifdef MTK_DEV_TEMP_C2K_OTFC
287extern kal_uint8 Cl1ShTxDpdOtfcHistoryRecPush(SysAirInterfaceT Interface, kal_uint32 Channel, SysCdmaBandT BandClass);
288extern kal_uint8 Cl1ShTxDpdOtfcGetHistoryRecIdx(SysAirInterfaceT Interface, kal_uint32 Channel, SysCdmaBandT BandClass);
289#endif
290/*****************************************************************************
291* End of File
292*****************************************************************************/
293#endif
294