blob: 2ea55f4bbaf5ce139cdc926d43a455803d0e94cd [file] [log] [blame]
yu.dongc33b3072024-08-21 23:14:49 -07001/******************************************************************************
2* Modification Notice:
3* --------------------------
4* This software is modified by MediaTek Inc. and the information contained
5* herein is confidential. The software may not be copied and the information
6* contained herein may not be used or disclosed except with the written
7* permission of MediaTek Inc. (C) 2005
8*
9* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
10* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
11* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
12* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
13* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
14* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
15* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
16* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
17* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
18* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
19* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
20* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
21*
22* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
23* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
24* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
25* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
26* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
27*
28* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
29* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
30* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
31* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
32* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
33*
34*******************************************************************************/
35
36/*==============================================================================
37 * HISTORY
38 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
39 *------------------------------------------------------------------------------
40 *------------------------------------------------------------------------------
41 * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
42 *============================================================================*/
43/* Doxygene header ********************************************************//**
44 *
45 * @file cl1tstdlysrch.h
46 * @{
47 *//***************************************************************************/
48
49#ifndef __CL1TSTDLYSRCH_H__
50#define __CL1TSTDLYSRCH_H__
51
52/*******************************************************************************
53* Includes
54*******************************************************************************/
55
56/*******************************************************************************
57* Defines
58*******************************************************************************/
59
60/*******************************************************************************
61* Enums
62*******************************************************************************/
63
64/*******************************************************************************
65* Structures
66*******************************************************************************/
67
68/*******************************************************************************
69* Interface Prototypes
70*******************************************************************************/
71
72extern kal_uint16 Cl1TstDpdPathDlyMain(void);
73
74#define CL1TST_DLY_SRCH_HSLOT_CNT 32
75
76#define CL1TST_REF_DFE_DLY_TR_MIN 0 /* HW limitation. */
77#define CL1TST_REF_DFE_DLY_TR_MAX 94 /* HW limitation. */
78
79#define CL1TST_CORR_LEFT_SHIFT_BIT_FOR_SIGN_BIT 4
80#define CL1TST_CORR_ABS_RIGHT_SHIFT_BIT 8
81#define CL1TST_NUM_TR_VALUE_DECIMAL_POINT 8
82
83#define CL1TST_PROTECTION_SF_CNT_NUM 1200
84
85#define CL1TST_DPD_DLY_SRCH_RANGE 5
86
87#define CL1TST_GD_MEAS_SAMPLE 1700
88#define CL1TST_GD_WAIT_SAMPLE 64
89#define CL1TST_GD_SHIFT 3
90
91/** define Delay search status */
92typedef enum
93{
94
95 CL1TST_DLY_SRCH_FSM_BB_ENABLE,
96 CL1TST_DLY_SRCH_FSM_TXON_TPC,
97
98 CL1TST_DLY_SRCH_FSM_WAIT_INIT,
99
100 CL1TST_DLY_SRCH_FSM_FIRST_TRIG,
101 CL1TST_DLY_SRCH_FSM_SWEEP_DLY,
102
103 CL1TST_DLY_SRCH_FSM_TXOFF,
104 CL1TST_DLY_SRCH_FSM_BB_DISABLE,
105
106 CL1TST_DLY_SRCH_FSM_DO_TXH_INIT,
107
108 CL1TST_DLY_SRCH_FSM_INVALID,
109 CL1TST_DLY_SRCH_FSM_NUM
110} Cl1TstDlyStateE;
111
112typedef struct
113{
114 kal_uint8 BandClass;
115 kal_uint16 ChanNum;
116} Cl1TstDlyFreqInfoT;
117
118typedef struct
119{
120 /* DPD delay search start request */
121 CRfTestCmd_StartDpdPathDelaySearch_ReqInfo StartInfo;
122
123 kal_bool DlySrchFlag;
124 kal_bool TimeOutFlag;
125 kal_bool SrchFailFlag;
126 Cl1TstDlyStateE DlyState;
127
128 Cl1TstDlyStatusE DlyStatus;
129
130 kal_int16 BbEnCnt;
131 kal_int16 TxOnCnt;
132 kal_int16 TxOffCnt;
133 kal_int16 TxSthCnt;
134
135 Cl1TstDlyFreqInfoT FreqInfo;
136
137 kal_int16 TrValue;
138 kal_int16 TrIniValue;
139 kal_int16 TrEndValue;
140 kal_int16 TrOptValue;
141
142 kal_uint32 AccumTr;
143 kal_uint32 CorrOpt;
144 kal_uint32 CorrMin;
145
146 kal_uint16 HSlotCnt;
147} Cl1DlyDataT;
148
149#endif /* #ifndef __LDPDCALDLYMAIN_H__ */
150
151