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yu.dongc33b3072024-08-21 23:14:49 -07001/*******************************************************************************
2* Modification Notice:
3* --------------------------
4* This software is modified by MediaTek Inc. and the information contained
5* herein is confidential. The software may not be copied and the information
6* contained herein may not be used or disclosed except with the written
7* permission of MediaTek Inc. (C) 2016
8*
9* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
10* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
11* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
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13* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
14* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
15* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
16* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
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18* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
19* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
20* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
21*
22* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
23* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
24* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
25* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
26* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
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28* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
29* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
30* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
31* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
32* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
33*
34*******************************************************************************/
35
36/*******************************************************************************
37*
38* Filename:
39* ---------
40* cl1tstdpdif.h
41*
42* Project:
43* --------
44* MTXXXX Project
45*
46* Description:
47* ------------
48* This file contains the log IQ functions.
49*
50* Author:
51* -------
52*
53*
54*==============================================================================
55* HISTORY
56* Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
57*------------------------------------------------------------------------------
58 * removed!
59 * removed!
60 * removed!
61*
62*
63*
64*
65*
66*
67*
68*------------------------------------------------------------------------------
69* Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
70*==============================================================================
71******************************************************************************/
72
73#ifndef _CL1TST_DPD_IF_H_
74#define _CL1TST_DPD_IF_H_
75
76/*----------------------------------------------------------------------------
77 Include Files
78----------------------------------------------------------------------------*/
79#include "kal_general_types.h"
80#include "kal_public_defs.h"
81#include "cl1_rf_public.h"
82
83#define CL1TST_DPD_FREQ_NUM 16
84#define CL1TST_DPD_PA_NUM 8
85#define CL1TST_DPD_BAND_MAX 22
86
87#define CL1TST_DPD_CHAN_INVALID 65535
88
89typedef enum
90{
91 CL1TST_DPD_CMD_STATUS_INVALID = 0,
92 CL1TST_DPD_CMD_STATUS_SUCCESS = 1,
93 CL1TST_DPD_CMD_STATUS_FAILURE = 2,
94 CL1TST_DPD_CMD_STATUS_PDU_SIZE_ERR = 3,
95 CL1TST_DPD_CMD_STATUS_PARAM_ERR = 4
96}Cl1TstDpdFacCmdStatusE;
97
98typedef enum
99{
100 CL1TST_DLY_SRCH_CMD_STATUS_INVALID = 0,
101 CL1TST_DLY_SRCH_CMD_STATUS_SUCCESS = 1,
102 CL1TST_DLY_SRCH_CMD_STATUS_TIMEOUT = 2,
103 CL1TST_DLY_SRCH_CMD_STATUS_SRCH_FAIL = 3
104} Cl1TstDlySrchCmdStatusE;
105
106//======= DPD Fac setting (all)/ getting PDU =========/
107
108/** define Tx DPD calibration data (all) structure */
109typedef struct
110{
111 /* PA context */
112 /* LID:NVRAM_EF_CL1_TX_APT_PA_CONTEXT_XX_BAND_X_LID */
113 CL1D_RF_TX_DPD_PA_CONTEXT_T TxDpdPaCtx;
114
115 /* PA gain temperature and frequency compensation, Q5 dB */
116 /* LID:NVRAM_EF_CL1_TX_APT_PA_GAIN_COMP_XX_BAND_X_LID */
117 CL1D_RF_TX_DPD_PA_GAIN_COMP_T TxDpdPaComp;
118
119 /* Coupler loss temperature and frequency compensation, Q5 dB */
120 /* LID:NVRAM_EF_CL1_DET_COUPLE_LOSS_COMP_XX_BAND_X_LID */
121 CL1D_RF_TX_DPD_AM_PM_LUT_DATA_T TxDpdAmPmLut;
122
123} Cl1TstTxDpdCalAllPduT;
124
125//======= DPD Fac setting (part) PDU===================/
126
127/** define Tx DPD calibration data (partial) structure */
128typedef struct
129{
130 /* PA context */
131 /* LID:NVRAM_EF_CL1_TX_APT_PA_CONTEXT_XX_BAND_X_LID */
132 CL1D_RF_TX_DPD_PA_CONTEXT_T TxDpdPaCtx;
133
134 /* PA gain temperature and frequency compensation, Q5 dB */
135 /* LID:NVRAM_EF_CL1_TX_APT_PA_GAIN_COMP_XX_BAND_X_LID */
136 CL1D_RF_TX_DPD_PA_GAIN_COMP_T TxDpdPaComp;
137
138} Cl1TstTxDpdCalPartPduT;
139
140//======= DPD Fac start==============================/
141typedef struct
142{
143 kal_uint16 AptRefChan;
144 kal_int16 tpc_wanted_p_offset;
145}Cl1TstTxDpdStartPduT;
146
147/* DPD factory start request */
148typedef struct
149{
150 /* Current temperature index */
151 kal_uint8 TempIdx;
152
153 /* 0: 1xRTT, 1: EVDO */
154 kal_uint8 RfMode;
155
156 /* Band number */
157 kal_uint8 BandNum;
158
159 kal_uint8 BandClass[CL1TST_DPD_BAND_MAX];
160}CRfTestCmd_StartDpd_ReqInfo;
161
162/* DPD factory start confirm */
163typedef struct
164{
165 kal_uint8 BandNum;
166 kal_uint8 BandClass[CL1TST_DPD_BAND_MAX];
167 kal_uint8 Status;
168 kal_uint8 CurBandClass;
169 kal_uint16 CurChanNum;
170 kal_uint16 CurPaIdx;
171 kal_uint16 CurPaGain;
172
173}CRfTestCmd_StartDpd_CnfInfo;
174
175//======= DPD Fac setting==============/
176
177/* DPD factory data setting request */
178typedef struct
179{
180 /* update NVRAM flag, 0: do not update, 1: update */
181 kal_uint8 UpdateNv;
182
183 /* 0: 1xRTT, 1: EVDO */
184 kal_uint8 RfMode;
185
186 /* Band number */
187 kal_uint8 BandNum;
188
189 kal_uint8 BandClass[CL1TST_DPD_BAND_MAX];
190
191}CRfTestCmd_SetDpdAll_ReqInfo;
192
193/* DPD factory data setting confirm */
194typedef struct
195{
196 kal_uint8 BandNum;
197 kal_uint8 SetStatus;
198}CRfTestCmd_SetDpdAll_CnfInfo;
199
200//======= DPD Fac getting==============/
201
202/* DPD factory data getting request */
203typedef struct
204{
205 /* 0: 1xRTT, 1: EVDO */
206 kal_uint8 RfMode;
207
208 kal_uint8 BandNum;
209 kal_uint8 BandClass[CL1TST_DPD_BAND_MAX];
210}CRfTestCmd_GetDpdAll_ReqInfo;
211
212/* DPD factory data getting confirm */
213typedef struct
214{
215 kal_uint8 BandNum;
216 kal_uint8 GetStatus;
217}CRfTestCmd_GetDpdAll_CnfInfo;
218
219/***************************** Delay search ***************************/
220/* DPD delay search start request */
221typedef struct
222{
223 /* 0: 1xRTT, 1: EVDO */
224 kal_uint8 RfMode;
225
226 kal_uint8 SrchTimes;
227 kal_uint8 BandNum;
228 kal_uint8 BandClass[CL1TST_DPD_BAND_MAX];
229}CRfTestCmd_StartDpdPathDelaySearch_ReqInfo;
230
231//======= Delay search setting==============/
232
233/* DPD delay search data setting request */
234typedef struct
235{
236 /* 0: 1xRTT, 1: EVDO */
237 kal_uint8 RfMode;
238
239 kal_uint8 BandNum;
240
241 kal_uint8 BandClass[CL1TST_DPD_BAND_MAX];
242}CRfTestCmd_SetDpdPathDelaySearch_ReqInfo;
243
244/* DPD delay search data setting pdu (one band) */
245typedef struct
246{
247 kal_uint8 BandClass;
248 kal_uint16 ChanNum[CL1TST_DPD_FREQ_NUM];
249 kal_int16 DpdTr[CL1TST_DPD_FREQ_NUM];
250}Cl1TstDpdPathDlyPduT;
251
252/* DPD delay search data setting pdu */
253typedef struct
254{
255 Cl1TstDpdPathDlyPduT DlyReq[CL1TST_DPD_BAND_MAX];
256}CRfTestCmd_SetDpdPathDelaySearch_ReqPdu;
257
258/* DPD delay search data setting confirm */
259typedef struct
260{
261 kal_uint8 BandNum;
262 kal_uint8 SetStatus;
263}CRfTestCmd_SetDpdPathDelaySearch_CnfInfo;
264
265//======= Delay search getting==============/
266
267/* DPD delay search data getting request */
268typedef struct
269{
270 /* 0: 1xRTT, 1: EVDO */
271 kal_uint8 RfMode;
272
273 kal_uint8 BandNum;
274 kal_uint8 BandClass[CL1TST_DPD_BAND_MAX];
275}CRfTestCmd_GetDpdPathDelaySearch_ReqInfo;
276
277/* DPD delay search data getting confirm */
278typedef struct
279{
280 kal_uint8 BandNum;
281 kal_uint8 GetStatus;
282}CRfTestCmd_GetDpdPathDelaySearch_CnfInfo;
283
284/* DPD delay search data getting pdu */
285typedef struct
286{
287 Cl1TstDpdPathDlyPduT DlyRsp[CL1TST_DPD_BAND_MAX];
288}CRfTestCmd_GetDpdPathDelaySearch_CnfPdu;
289
290#endif /* _CL1TST_DPD_IF_H_ */
291