| yu.dong | c33b307 | 2024-08-21 23:14:49 -0700 | [diff] [blame^] | 1 | /***************************************************************************** |
| 2 | * Copyright Statement: |
| 3 | * -------------------- |
| 4 | * This software is protected by Copyright and the information contained |
| 5 | * herein is confidential. The software may not be copied and the information |
| 6 | * contained herein may not be used or disclosed except with the written |
| 7 | * permission of MediaTek Inc. (C) 2016 |
| 8 | * |
| 9 | * BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES |
| 10 | * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE") |
| 11 | * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON |
| 12 | * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES, |
| 13 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF |
| 14 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT. |
| 15 | * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE |
| 16 | * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR |
| 17 | * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH |
| 18 | * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO |
| 19 | * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S |
| 20 | * SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM. |
| 21 | * |
| 22 | * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE |
| 23 | * LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, |
| 24 | * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, |
| 25 | * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO |
| 26 | * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE. |
| 27 | * |
| 28 | * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE |
| 29 | * WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF |
| 30 | * LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND |
| 31 | * RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER |
| 32 | * THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC). |
| 33 | * |
| 34 | *****************************************************************************/ |
| 35 | #ifndef _CPH_MDSYS_MDM_H_ |
| 36 | #define _CPH_MDSYS_MDM_H_ |
| 37 | |
| 38 | #include "kal_general_types.h" |
| 39 | |
| 40 | typedef volatile unsigned short* SRAMADDR; /* SRAM addr is 16 bits */ |
| 41 | typedef volatile unsigned short SRAMDATA; /* SRAM data is 16 bits */ |
| 42 | typedef volatile unsigned short* APBADDR; /* APB addr is 16 bits */ |
| 43 | typedef volatile unsigned short APBDATA; /* APB data is 16 bits */ |
| 44 | typedef volatile unsigned long* APBADDR32; /* APB addr is 32 bits */ |
| 45 | typedef volatile unsigned long APBDATA32; /* APB data is 32 bits */ |
| 46 | typedef volatile unsigned short* DPRAMADDR; /* DPRAM addr is 16 bits */ |
| 47 | typedef volatile signed short* DPRAMADDR_S; /* DPRAM addr is 16 bits */ |
| 48 | typedef volatile unsigned short DPRAMDATA; /* DPRAM data is 16 bits */ |
| 49 | |
| 50 | |
| 51 | #define MDSYS_MDM_REG_BASE (0xA0490000) |
| 52 | |
| 53 | #define MDSYS_MDM_end (MDSYS_MDM_REG_BASE + 0xC0 + 8*4) |
| 54 | |
| 55 | |
| 56 | |
| 57 | #define MDM_TM_ENDSIM ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x14)) |
| 58 | #define MDM_TM_ERRCNT ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x18)) |
| 59 | #define MDM_TM_DBGINFO ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x1C)) |
| 60 | #define MDM_TM_ENDFAIL ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x28)) |
| 61 | #define MDM_TM_ENDSUCC ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x2C)) |
| 62 | #define MDM_TM_ALLFMT32B ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x34)) |
| 63 | #define MDM_TM_HEXFMT32B ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x38)) |
| 64 | #define MDM_TM_DECFMT32B ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x3C)) |
| 65 | #define MDM_TM_BINFMT32B ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x40)) |
| 66 | #define MDM_TM_MEMDUMPSTR ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x50)) |
| 67 | #define MDM_TM_MEMDUMPSTOP ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x54)) |
| 68 | #define MDM_TM_MEMGOLDENSTR ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x58)) |
| 69 | #define MDM_TM_MEMGOLDENSTOP ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x5C)) |
| 70 | #define MDM_TM_MEMREVISESTR ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x60)) |
| 71 | #define MDM_TM_MEMREVISESTOP ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x64)) |
| 72 | #define MDM_TM_RUNTIME_USEC ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x6C)) |
| 73 | #define MDM_TM_STR_CLEAR ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x90)) |
| 74 | #define MDM_TM_STR_DISPLAY ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x94)) |
| 75 | #define MDM_TM_STR(n) ((APBADDR32)(MDSYS_MDM_REG_BASE + 0x98 + (n)*4)) //n is from 0 to 7 |
| 76 | #define MDM_TM_DAT(n) ((APBADDR32)(MDSYS_MDM_REG_BASE + 0xC0 + (n)*4)) //n is from 0 to 7 |
| 77 | |
| 78 | |
| 79 | #define MDM_TM_ENDSIM_MDM_TM_ENDSIM_LSB (0) |
| 80 | #define MDM_TM_ENDSIM_MDM_TM_ENDSIM_WIDTH (32) |
| 81 | #define MDM_TM_ENDSIM_MDM_TM_ENDSIM_MASK (0xFFFFFFFF) |
| 82 | |
| 83 | #define MDM_TM_ERRCNT_MDM_TM_ERRCNT_LSB (0) |
| 84 | #define MDM_TM_ERRCNT_MDM_TM_ERRCNT_WIDTH (32) |
| 85 | #define MDM_TM_ERRCNT_MDM_TM_ERRCNT_MASK (0xFFFFFFFF) |
| 86 | |
| 87 | #define MDM_TM_DBGINFO_MDM_TM_DBGINFO_LSB (0) |
| 88 | #define MDM_TM_DBGINFO_MDM_TM_DBGINFO_WIDTH (32) |
| 89 | #define MDM_TM_DBGINFO_MDM_TM_DBGINFO_MASK (0xFFFFFFFF) |
| 90 | |
| 91 | #define MDM_TM_ENDFAIL_MDM_TM_ENDFAIL_LSB (0) |
| 92 | #define MDM_TM_ENDFAIL_MDM_TM_ENDFAIL_WIDTH (32) |
| 93 | #define MDM_TM_ENDFAIL_MDM_TM_ENDFAIL_MASK (0xFFFFFFFF) |
| 94 | |
| 95 | #define MDM_TM_ENDSUCC_MDM_TM_ENDSUCC_LSB (0) |
| 96 | #define MDM_TM_ENDSUCC_MDM_TM_ENDSUCC_WIDTH (32) |
| 97 | #define MDM_TM_ENDSUCC_MDM_TM_ENDSUCC_MASK (0xFFFFFFFF) |
| 98 | |
| 99 | #define MDM_TM_ALLFMT32B_MDM_TM_ALLFMT32B_LSB (0) |
| 100 | #define MDM_TM_ALLFMT32B_MDM_TM_ALLFMT32B_WIDTH (32) |
| 101 | #define MDM_TM_ALLFMT32B_MDM_TM_ALLFMT32B_MASK (0xFFFFFFFF) |
| 102 | |
| 103 | #define MDM_TM_HEXFMT32B_MDM_TM_HEXFMT32B_LSB (0) |
| 104 | #define MDM_TM_HEXFMT32B_MDM_TM_HEXFMT32B_WIDTH (32) |
| 105 | #define MDM_TM_HEXFMT32B_MDM_TM_HEXFMT32B_MASK (0xFFFFFFFF) |
| 106 | |
| 107 | #define MDM_TM_DECFMT32B_MDM_TM_DECFMT32B_LSB (0) |
| 108 | #define MDM_TM_DECFMT32B_MDM_TM_DECFMT32B_WIDTH (32) |
| 109 | #define MDM_TM_DECFMT32B_MDM_TM_DECFMT32B_MASK (0xFFFFFFFF) |
| 110 | |
| 111 | #define MDM_TM_BINFMT32B_MDM_TM_BINFMT32B_LSB (0) |
| 112 | #define MDM_TM_BINFMT32B_MDM_TM_BINFMT32B_WIDTH (32) |
| 113 | #define MDM_TM_BINFMT32B_MDM_TM_BINFMT32B_MASK (0xFFFFFFFF) |
| 114 | |
| 115 | #define MDM_TM_MEMDUMPSTR_MDM_TM_MEMDUMPSTR_LSB (0) |
| 116 | #define MDM_TM_MEMDUMPSTR_MDM_TM_MEMDUMPSTR_WIDTH (32) |
| 117 | #define MDM_TM_MEMDUMPSTR_MDM_TM_MEMDUMPSTR_MASK (0xFFFFFFFF) |
| 118 | |
| 119 | #define MDM_TM_MEMDUMPSTOP_MDM_TM_MEMDUMPSTOP_LSB (0) |
| 120 | #define MDM_TM_MEMDUMPSTOP_MDM_TM_MEMDUMPSTOP_WIDTH (32) |
| 121 | #define MDM_TM_MEMDUMPSTOP_MDM_TM_MEMDUMPSTOP_MASK (0xFFFFFFFF) |
| 122 | |
| 123 | #define MDM_TM_MEMGOLDENSTR_MDM_TM_MEMGOLDENSTR_LSB (0) |
| 124 | #define MDM_TM_MEMGOLDENSTR_MDM_TM_MEMGOLDENSTR_WIDTH (32) |
| 125 | #define MDM_TM_MEMGOLDENSTR_MDM_TM_MEMGOLDENSTR_MASK (0xFFFFFFFF) |
| 126 | |
| 127 | #define MDM_TM_MEMGOLDENSTOP_MDM_TM_MEMGOLDENSTOP_LSB (0) |
| 128 | #define MDM_TM_MEMGOLDENSTOP_MDM_TM_MEMGOLDENSTOP_WIDTH (32) |
| 129 | #define MDM_TM_MEMGOLDENSTOP_MDM_TM_MEMGOLDENSTOP_MASK (0xFFFFFFFF) |
| 130 | |
| 131 | #define MDM_TM_MEMREVISESTR_MDM_TM_MEMREVISESTR_LSB (0) |
| 132 | #define MDM_TM_MEMREVISESTR_MDM_TM_MEMREVISESTR_WIDTH (32) |
| 133 | #define MDM_TM_MEMREVISESTR_MDM_TM_MEMREVISESTR_MASK (0xFFFFFFFF) |
| 134 | |
| 135 | #define MDM_TM_MEMREVISESTOP_MDM_TM_MEMREVISESTOP_LSB (0) |
| 136 | #define MDM_TM_MEMREVISESTOP_MDM_TM_MEMREVISESTOP_WIDTH (32) |
| 137 | #define MDM_TM_MEMREVISESTOP_MDM_TM_MEMREVISESTOP_MASK (0xFFFFFFFF) |
| 138 | |
| 139 | #define MDM_TM_RUNTIME_USEC_MDM_TM_RUNTIME_USEC_LSB (0) |
| 140 | #define MDM_TM_RUNTIME_USEC_MDM_TM_RUNTIME_USEC_WIDTH (32) |
| 141 | #define MDM_TM_RUNTIME_USEC_MDM_TM_RUNTIME_USEC_MASK (0xFFFFFFFF) |
| 142 | |
| 143 | #define MDM_TM_STR_CLEAR_MDM_TM_STR_CLEAR_LSB (0) |
| 144 | #define MDM_TM_STR_CLEAR_MDM_TM_STR_CLEAR_WIDTH (4) |
| 145 | #define MDM_TM_STR_CLEAR_MDM_TM_STR_CLEAR_MASK (0x0000000F) |
| 146 | |
| 147 | #define MDM_TM_STR_DISPLAY_MDM_TM_STR_DISPLAY_LSB (0) |
| 148 | #define MDM_TM_STR_DISPLAY_MDM_TM_STR_DISPLAY_WIDTH (4) |
| 149 | #define MDM_TM_STR_DISPLAY_MDM_TM_STR_DISPLAY_MASK (0x0000000F) |
| 150 | |
| 151 | #define MDM_TM_STR_MDM_TM_STR_LSB (0) |
| 152 | #define MDM_TM_STR_MDM_TM_STR_WIDTH (8) |
| 153 | #define MDM_TM_STR_MDM_TM_STR_MASK (0x000000FF) |
| 154 | |
| 155 | #define MDM_TM_DAT_MDM_TM_DAT_LSB (0) |
| 156 | #define MDM_TM_DAT_MDM_TM_DAT_WIDTH (32) |
| 157 | #define MDM_TM_DAT_MDM_TM_DAT_MASK (0xFFFFFFFF) |
| 158 | |
| 159 | |
| 160 | #endif //#ifndef _CPH_MDSYS_MDM_H_ |