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192.168.1.100 / T800_MD_V1.6 / c33b3079c38f91561c2f84f1ebed20ad8c60532a / . / mcu / interface / l1 / tl1 / tl1_struct.h
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yu.dongc33b3072024-08-21 23:14:49 -0700[diff] [blame^]1/*****************************************************************************
2* Copyright Statement:
3* --------------------
4* This software is protected by Copyright and the information contained
5* herein is confidential. The software may not be copied and the information
6* contained herein may not be used or disclosed except with the written
7* permission of MediaTek Inc. (C) 2009
8*
9* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
10* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
11* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
12* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
13* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
14* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
15* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
16* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
17* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
18* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
19* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
20* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
21*
22* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
23* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
24* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
25* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
26* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
27*
28* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
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31* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
32* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
33*
34*****************************************************************************/
35
36/******************************************************************************
37 * Filename:
38 * --------------------------------------------------------
39 * tl1_struct.h
40 *
41 * Project:
42 * --------------------------------------------------------
43 *
44 *
45 * Description:
46 * --------------------------------------------------------
47 *
48 *
49 * Author:
50 * --------------------------------------------------------
51 * -------
52 *
53 * --------------------------------------------------------
54 * $Log$
55 *
56 * 09 25 2019 xiaochi.zhang
57 * [MOLY00394636] AT+ERFTX error handling enhancement - R3 TDSCDMA Part
58 * .
59 * rf desense tl1
60 *
61 * 02 21 2019 chason.cheng
62 * [MOLY00384995] [VMOLY] GEMINI 3.0, AFR, Unify Frequency scan, BGSEARCH
63 *
64 * .
65 *
66 * 02 18 2019 yanjuan.feng
67 * [MOLY00384995] [VMOLY] GEMINI 3.0, AFR, Unify Frequency scan, BGSEARCH
68 * .tdd-csce part,background search,resume cnf,freq priority unify
69 *
70 * 01 23 2019 vend_mtb_mobiveil012
71 * [MOLY00349793] [L4 HDR] ERFSCAN feature changes to VMOLYE
72 *
73 * 10 31 2018 xiaochi.zhang
74 * [MOLY00361478] [Gen97] Gemini Compile Option Clean Up
75 *
76 * .
77 *
78 * 08 29 2018 chason.cheng
79 * [MOLY00325833] TDSCDMA GEN95 UNIFY TAS.TDS build error debug
80 *
81 * 06 08 2018 chason.cheng
82 * [MOLY00325833] TDSCDMA GEN95 UNIFY TAS
83 *
84 * .TDS TAS UTAS UPDATE
85 *
86 * 05 23 2018 cruze.yu
87 * [MOLY00285698] [93/95 re-arch][TL1] tl1 option clean
88 *
89 * .
90 *
91 * 08 03 2017 fanzhi.meng
92 * [MOLY00268223] ÔÚAP²à´ò¿ª»ò¹Ø±Õij¸öBandµÄTAS¹¦Äܼ°»ñȡij¸öBandÊÇ·ñÖ§³ÖTAS
93 *
94 * .TAS new requirement TDS SW update.
95 *
96 * 06 21 2017 fanzhi.meng
97 * [MOLY00258592] Titan_DAT_SAR_feature patch back and Add DRDI custom paramter "RO" property in MT6293 project
98 *
99 * 1. titan DAT and SAR feature patch back.
100 * 2. custom data change to "RO".
101 *
102 * 04 12 2017 weimin.zeng
103 * [MOLY00240270] [6293][Gemini][T+W] Phase 1: Common Interface Changes Check in
104 *
105 * , 3G TDD UMAC PCH buffer.
106 *
107 * 02 09 2017 xiaochi.zhang
108 * [MOLY00204784] [Android N]TL1 add Tx Rx active time for Android N
109 *
110 * .
111 *
112 * 01 17 2017 fanzhi.meng
113 * [MOLY00214807] MT6292/UMOLY_MT6293/UMOLYA TL1 CODE maintain
114 * .
115 *
116 * 01 17 2017 yanhai.xuan
117 * [MOLY00168027] check in code to MT6293_TL1SIM_DEV
118 *
119 * new caseman over elt
120 *
121 * 11 02 2016 ting.xu
122 * [MOLY00208907] [TAS]remove __TAS_MAX_TXPWR_REDUCTION__&modify customer version
123 *
124 * delete marco TAS_MAX_TXPWR_REDUCTION.
125 *
126 * 10 14 2016 ting.xu
127 * [MOLY00203409] [MT6292&6293][TAS2.0]code check in
128 *
129 * align 3GTDSCDMA mt6292 tas2.0.TO mt6293
130 *
131 * 06 28 2016 zheng.zou
132 * [MOLY00179446] TASÇл»µ½ÉÏÌìÏß½µ¹¦ÂÊ
133 * sync TAS patches from UMOLY.
134 *
135 * 06 18 2016 fanzhi.meng
136 * [MOLY00184438] 6293 TL1 CODE MAINTAIN
137 *
138 * tl1 code sync from 93 SIM DEV.
139 *
140 * 06 18 2016 fanzhi.meng
141 * [MOLY00184438] 6293 TL1 CODE MAINTAIN
142 *
143 * tl1 code sync from 93 SIM DEV.
144 *
145 * 01 14 2016 yanhai.xuan
146 * [MOLY00159734] TX power detector support on Jade
147 * .
148 *
149 * 12 22 2015 xuejing.chen
150 * [MOLY00152614] RSSI edBm support on LR11
151 * +ERSSI report value in 1/8 dBm (exclude 4G).
152 *
153 * 12 09 2015 fanzhi.meng
154 * [MOLY00119767] Jade TL1 code maintain
155 *
156 * .
157 *
158 * 11 04 2015 yunlong.li
159 * [MOLY00139750] [MT6755][TDD]
160 * .remove l1core pcore
161 *
162 * 10 22 2015 yunlong.li
163 * [MOLY00139750] [MT6755][TDD]
164 * .add tl1_l1adt_enter_tdd_mode_ind
165 *
166 * 10 18 2015 chuansheng.zhang
167 * [MOLY00145677] [91+][TL1] Platform patch check in
168 * (1) LR11 until patch CL1745309 merge to UMOLY;
169 * (2) 91+ for MIPS: l1core->__SMP_ARCH__ modify, and build error clr;
170 * (3) TL1 IRQ code part modify
171 *
172 * 08 27 2015 yunlong.li
173 * [MOLY00135310] [TK6291][E1EVB] [ADT]add adt feature
174 * Rollback //UMOLY/TRUNK/UMOLY/mcu/common/interface/modem/l1/tdd/tl1_struct.h to revision 20
175 *
176 * 08 24 2015 yunlong.li
177 * [MOLY00135310] [TK6291][E1EVB] [ADT]add adt feature
178 * .fix 6291+ build error
179 *
180 * 08 04 2015 yunlong.li
181 * [MOLY00135310] [TK6291][E1EVB] [ADT]add adt feature
182 * .add adt feature
183 *
184 * 07 28 2015 chuansheng.zhang
185 * [MOLY00132771] [MT6755][TDD3G][SLT] Dev
186 * Jade: TDSCDMA SLT code check in.
187 *
188 * 05 21 2015 yanhai.xuan
189 * [MOLY00115289] [TK6291E1][RMPU][Pre-Sanity][3G][Blocking][TDD] CMCC network 23G DM ×öÊý¾ÝÒµÎñ»á³öÏÖ²»Ã÷Ô­ÒòËÀ»ú
190 * .
191 *
192 * 05 19 2015 qianli.li
193 * [MOLY00114091] [MT6291][TAS feature] Add TDD_TAS feature
194 * .
195 *
196 * 05 19 2015 qianli.li
197 * [MOLY00114091] [UMOLY][tas feature] TAS for 6291
198 * .
199 *
200 * 04 29 2015 rong.yang
201 * [MOLY00109047] [UMOLY][new feature] Pich false alarm Optimization
202 * .
203 *
204 * 04 27 2015 chengwei.liu
205 * [MOLY00109507] [UMOLY][TDD] [Memory Access Permission] UMAC Share buffer code change check in
206 * .
207 *
208 * 04 19 2015 chuansheng.zhang
209 * [MOLY00097620] [TK6291][UBin] TL1 Platform Patch
210 * fix ubin duplex struct issue.
211 *
212 * 04 17 2015 marco.zhang
213 * [MOLY00096053] [TDD] Rx report for test (need turn on __TDS_RX_TEST_SUPPORT__)
214 * .
215 *
216 * 04 16 2015 chuansheng.zhang
217 * [MOLY00097620] [TK6291][UBin] TL1 Platform Patch
218 * TL1: Ubin Phase2 code merge.
219 *
220 * 02 10 2015 fanzhi.meng
221 * [MOLY00086950] UMOLY TL1 MAINTAIN
222 * .code sync
223 *
224 * 01 07 2015 marco.zhang
225 * [MOLY00086950] UMOLY TL1 MAINTAIN
226 * .
227 *
228 * 01 07 2015 fanzhi.meng
229 * [MOLY00086950] UMOLY TL1 MAINTAIN
230 * .
231 *
232 * 01 05 2015 marco.zhang
233 * [MOLY00086950] UMOLY TL1 MAINTAIN
234 * .
235 *
236 * 01 05 2015 fanzhi.meng
237 * [MOLY00086950] UMOLY TL1 MAINTAIN
238 * .
239 *
240 * 12 29 2014 marco.zhang
241 * [MOLY00086950] UMOLY TL1 MAINTAIN
242 * .
243 *
244 * 12 21 2014 marco.zhang
245 * [MOLY00086950] UMOLY TL1 MAINTAIN
246 * prefix.
247 *
248 * 12 11 2014 rong.yang
249 * [MOLY00086950] UMOLY TL1 MAINTAIN
250 * .revise umac part about shared memory on tl1_ps_shared_mem.h/.c
251 *
252 * 12 10 2014 rong.yang
253 * [MOLY00087194] [3G UMAC] merge 6291 code from MOLY.U3G.90IT.DEV
254 * .
255 *
256 * 08 27 2014 marco.zhang
257 * [MOLY00077352] [MT6291]TAS cross core dev
258 * .
259 *
260 * 05 23 2014 xiaoyun.mao
261 * [MOLY00066499] [3G TDD UMAC & L1] DPA & R4 rx memory revise
262 * .rx data path change
263 *
264 * 05 22 2014 shouzhu.zhang
265 * [MOLY00066398] [Known Issue][MT6592TDD][SGLTE][LTTG][KK][Thermal] The tsPA didn't report temperature information in downloading/call (always -127 degreeC)
266 * report thermal.
267 *
268 * 05 13 2014 jt.tan
269 * [MOLY00064338] [MT6592TDD][CSFB][CMCC Case][FT][GZ][Regression 3][5.4.6] Ping suspend time larger than CMCC criteria (20seconds) [FOCUS ISSUE]
270 * patch for CMCC 5.4.6
271 *
272 * 03 11 2014 xiaoyun.mao
273 * [MOLY00059209] [Blocking][Critical][CMCC MTBF][CMCC Case][EE][MT6582QHD512][SGLTE]µÇ½ÓÊÏä²»³É¹¦
274 * .add mac ut struct with meas_occasion_ind
275 *
276 * 03 06 2014 xiaoyun.mao
277 * [MOLY00058570] [MT6290E2][SGLTE][82LTEv2][LT+G][GCF][ETC7310][MM][Band 38][Band A][case 8.4.2.2] fail,Öն˷¢ËÍÁËcell updateµ¼ÖÂÓÃÀýʧ°Ü
278 * .DMO optimization: ul tick tell mac DMO info
279 *
280 * 03 06 2014 xiaoyun.mao
281 * [MOLY00058505] [check in]B3B39 co-existence code
282 * .TL1 check in
283 *
284 * 12 31 2013 shouzhu.zhang
285 * [MOLY00048478] [MT6290E1][LTG][GCF][CMW500][MM][Pre-Test][case 9.2.3.3.4][Band 38] Fail
286 * 4G OOS Measurement change.
287 *
288 * 12 17 2013 shouzhu.zhang
289 * [MOLY00050653] [TL1][Check in]Remove TL1 MCU needless compile option
290 * .
291 *
292 * 10 18 2013 hongwei.zhang
293 * [MOLY00042501] [TDD][MMDC EM Dev]SINR & SupportBand Info
294 * MMDC EM Dev: Report SINR Info to Uplayer.
295 *
296 * 09 18 2013 ast00029
297 * [MOLY00032095] [3G TDD][RxCFN] Activation time and RRC message RX CFN record
298 * for cr:MOLY00032095,Record this situation: Calculate active_sfn with current_cfn and last rx_cfn, if the result is different, trace it.
299 *
300 * 08 19 2013 shouzhu.zhang
301 * [MOLY00031436] [FDD2TDD][MT6290E1][NAS RTD][MM][FDD] Could not receive SIB-3 so 4G3 evaluation fails
302 * Report bch ind with standby no gap when no gap to rx bch.
303 *
304 * 08 09 2013 fanzhi.meng
305 * [MOLY00033092] MT6592/MT6290 MCU code update
306 * .add dsp changelist trace
307 *
308 * 08 02 2013 ast00029
309 * [MOLY00032095] [3G TDD][RxCFN] Activation time and RRC message RX CFN record
310 * for cr:MOLY00032095,Record this situation: Calculate active_sfn with current_cfn and last rx_cfn, if the result is different, trace the it.
311 *
312 * 08 02 2013 ast00029
313 * [MOLY00032095] [3G TDD][RxCFN] Activation time and RRC message RX CFN record
314 * for cr:MOLY00032095,Record this situation: Calculate active_sfn with current_cfn and last rx_cfn, if the result is different, trace the it.
315 *
316 *
317 * 08 02 2013 ast00029
318 * [MOLY00032095][3G TDD][RxCFN] Activation time and RRC message RX CFN record
319 * Record this situation: Calculate active_sfn with current_cfn and last rx_cfn, if the result is different, trace the it.
320 *
321 * 07 23 2013 shouzhu.zhang
322 * [MOLY00023935] [MT6290E1][W/G][Target IT] Meas result is received so frequently when priority measurement and drx measurement are on-going
323 * MEME control trigger short period measurement immediatly or not.
324 *
325 * 05 30 2013 ast00033
326 * [MOLY00024285] [MT6572][CMCC Case FT][LCA_GEMINI][Beijing][Regression-7th time][C6.3 ¿¨²Û1Ë«PDPºÍ¿¨²Û2ÓïÒô²¢·¢ ]8th_11:38:34_ÔÝʱÎÞ·¨½Óͨ_ÈýÔªÎ÷ÇÅ
327 * .
328 *
329 * 05 15 2013 xiaoyun.mao
330 * [MOLY00007737] [WR8][UMAC]3G speech UL delay improve phase 2
331 * .remove __PREPARE_TX_AHEAD__
332 *
333 * 04 17 2013 shouzhu.zhang
334 * [MOLY00013948] [MT6290 PO admit] Check in AST3002 & protocol code for 6290 MULTI_MODE_TDS project
335 * add auto gap interface.
336 *
337 * 04 01 2013 shouzhu.zhang
338 * [MOLY00013249] MM TL1 Code check in
339 * [TL1] Merge lastes WR8 + R9 + MM code to MOLY..
340 *
341 * 03 01 2013 shun.liu
342 * [MOLY00011182] MT6572/6582: RF TX test feature check in MOLY main
343 * EM tx test tl1 part.
344 *
345 * 12 07 2012 xiaoyun.mao
346 * [MOLY00007252] [MOLY][UMAC]fixing build error
347 * add parameter of ul_inform_MAC
348 *
349 * 11 02 2012 shouzhu.zhang
350 * [MOLY00005657] Thermal function implementation
351 * .
352 *
353 * 10 12 2012 jingjing.ma
354 * [MOLY00004752] add new variable
355 * remove option for islongperiodin3gstandby.
356 *
357 * 10 10 2012 shouzhu.zhang
358 *
359 * [MOLY00004236] [interface][service][kal]remove stack_ltlcom.h
360 * <saved by Perforce>
361 *
362 * 09 26 2012 xiaoyun.mao
363 * [MOLY00004157] [TDD_R9_DEV]change of interface with MEME
364 * .
365 *
366 * 09 24 2012 xiaoyun.mao
367 * [MOLY00004069] [MOLY]TDD_R9_DEV Patch back to MOLY
368 * TDD_R9_DEV patch back to MOLY
369 *
370 * 09 12 2012 xiaoyun.mao
371 * [MOLY00002766] rremove __UMAC_DCH_LISR__
372 *
373 * 09 11 2012 xiaoyun.mao
374 * [MOLY00002766] warning removal
375 * .
376 * remove __UMAC_DCH_LISR__
377 *
378 * 09 11 2012 willie.pan
379 * [MOLY00000302] [TST] MOLY Branch check-in
380 * Rollback //MOLY/TRUNK/MOLY/mcu/interface/modem/tl1interface/tl1_struct.h to revision 2
381 *
382 * 08 06 2012 riley.ou
383 * [MOLY00001452] CTCH L2 schedule improvement
384 * .
385 *
386 * 05 03 2012 wcpuser_integrator
387 * removed!
388 * .
389 *
390 * 05 03 2012 wcpuser_integrator
391 * removed!
392 * .
393 *
394 * 03 21 2012 shuyang.yin
395 * removed!
396 * .
397 *
398 * 03 02 2012 shuyang.yin
399 * removed!
400 * .
401 * (TL1 SAP)
402 *
403 * 02 28 2012 shuyang.yin
404 * removed!
405 * .
406 *
407 * 12 06 2011 shuyang.yin
408 * removed!
409 * .
410 *
411 * 11 14 2011 shi.dong
412 * removed!
413 * TL1 code interface fta merge in MAUI.
414 *
415 * 09 13 2011 shuyang.yin
416 * removed!
417 * .
418 *
419 * 09 07 2011 shuyang.yin
420 *
421 * removed!
422 * <saved by Perforce>
423 *
424 * 07 21 2011 qing.zhang
425 * removed!
426 * Update SAP according to UMAC requirement
427 *
428 * 06 13 2011 popcafa.shih
429 * removed!
430 * Help vendor_ast to merge PS_RESTRUCT_DEV
431 *
432 * 04 20 2011 xinqiu.wang
433 * removed!
434 * Modify some description.
435 *
436 * 04 19 2011 xinqiu.wang
437 * removed!
438 * merge code from daily LOAD to MAUI 10A.
439 *
440 * 04 19 2011 xinqiu.wang
441 * removed!
442 * Remove LOCAL_PARA_HDR define.
443 *
444 * 01 18 2011 xinqiu.wang
445 * removed!
446 * Add RHR feature to tl1 interface files.
447 *
448 * 12 28 2010 bo.lu
449 * removed!
450 * .
451 *
452 * 12 14 2010 xinqiu.wang
453 * removed!
454 * Modify the struct of phy_post_tx_ind.
455 *
456 * 12 01 2010 popcafa.shih
457 * removed!
458 * .
459 *
460 * 11 29 2010 xinqiu.wang
461 * removed!
462 * Modify the description of umts_power_class.
463 *
464 * 11 04 2010 xinqiu.wang
465 * removed!
466 * 1. Add ul_mac_event to cphy_dch_setup/modify/release_req
467 * 2. Add two ticks and structs for mac-tl1 interface.
468 * 3. Add two simulation structs according to MAC's requeset.
469 *
470 * 11 03 2010 xinqiu.wang
471 * removed!
472 * 1.SLCE-TL1 SAP Modify for R7
473 * 2. MAC-TL1 SAP Modify for UPA
474 *
475 * 08 24 2010 popcafa.shih
476 * removed!
477 * .
478 *
479 * removed!
480 * removed!
481 * Add tx_enable in phy_simulate_dch_ul_cctrch_hisr_rsp_struct according to the discussion result with UMAC
482 *
483 * removed!
484 * removed!
485 * 1.Add tx_enable in ul_dpch_cctrch_task(), ul_dpch_cctrch_HISR(), phy_simulate_dch_ul_cctrch_task_struct and phy_simulate_dch_ul_cctrch_hisr_struct
486 * 2.Add access_type in phy_access_ind_struct with HSUPA compile option
487 *
488 * removed!
489 * removed!
490 * Modify dpch_SIR_lta to dpdch_SIR_lta in L1_info_struct
491 *
492 * removed!
493 * removed!
494 * 1.In tl1_info, modify the struct name of tl1_speech_info_T to L1_info_struct to use the same interface to FDD according to l1audio team¡¯s requirement.
495 * 2.In L1_info_struct, modify the parameter name and type to use the same interface to FDD according to l1audio team¡¯s requirement.
496 *
497 * removed!
498 * removed!
499 * 1.Add rssi and rscp in PHY_BCH_DATA_IND, and add comments of the parameters in PHY_BCH_DATA_IND
500 * 2.Add PHY_END_EDCH_TX_IND
501 * 3.Modify comments of sfn in phy_dch_setup_ind_struct, phy_dch_release_ind_struct
502 * 4.Modify the comments of TL1_GetCurrentTime.
503 *
504 * removed!
505 * removed!
506 * 1.Add cphy_hsdsch_setup/modify/release_req and cphy_edch_setup/modify/release_req into local_para_unpack_T
507 * 2.Add midamble_shift_detection_result, max_value_of_midamble_correlation_result and noise_of_midamble_correlation_result in tl1_speech_info_struct_T
508 * 3.seperate rscp to dpch_rscp and pccpch_rscp in tl1_speech_info_struct_T
509 *
510 * removed!
511 * removed!
512 *
513 *
514 * removed!
515 * removed!
516 * 1.Add type definition of cphy_edch_setup/modify/release_req_struct.
517 * 2.Delete meas_control and idx_intra_freq in cphy_msg_container_req_struct and cphy_msg_container_req_unpack_struct
518 * 3.Add access_type in tdd_phy_rach_data_req_struct and tdd_phy_access_req_struct
519 * 4.Add HSDPA and HSUPA related callback function declaration
520 *
521 * removed!
522 * removed!
523 * 1.Delete pre-declare check of __UMTS_TDD128_MODE__
524 *
525 * removed!
526 * removed!
527 * 1.add check of __UMTS_TDD128_MODE__
528 * 2.delete the parameter of act_time in cphy_bch_setup/modify_req
529 * 3.delete strcut of cphy_measurement_config_fmo_req_struct
530 * 4.Use TL1 to replace UL1 and L1 in comments
531 * 5.Modify comments of mac_event in cphy_hsdsch_setup/modify/release_req to sync with TL1 SAP doc
532 * 6.add comments of cfn in phy_end_dch_tx_ind_struct
533 * 7.Modify type of sub_cfn in phy_hsdsch_data_ind_struct from kal_uint8 to kal_uint16, and modify type of mac_hs_reset in phy_hsdsch_data_ind_struct from kal_uint8 to kal_bool
534 *
535 * removed!
536 * removed!
537 *
538 *
539 * removed!
540 * removed!
541 *
542 *
543 * removed!
544 * removed!
545 *
546 *
547 * removed!
548 * removed!
549 * Add meas_id in cphy_measurement_internal_result_ind according to discussion conclusion with MEME module owner
550 *
551 * removed!
552 * removed!
553 * Modify type of event_id in CPHY_MEASUREMENT_INTERNAL_EVENT_IND from kal_uint8 to internal_meas_event_E
554 *
555 * removed!
556 * removed!
557 * 1 rename "dpdch_SIR_lta" in phy_data_ind_struct to "dpch_SIR_lta"
558 *
559 * removed!
560 * removed!
561 * 1. change the type of sib7_factor from "kal_int8" to "kal_uint8" to compiance with SLCE
562 * 2. add h_msg and e_msg for DPA and UPA
563 * 3. change the type of off in cphy_sfn_ind_struct from kal_uint16 to kal_int16
564 *
565 * removed!
566 * removed!
567 * remove typo error "ul1_def"
568 *
569 * removed!
570 * removed!
571 * modify phy_data_ind_struct for UT test
572 *
573 * removed!
574 * removed!
575 * Rename __UMTS_TDD128_RAT__ to __UMTS_TDD128_MODE__
576 *
577 * removed!
578 * removed!
579 * add log section for tl1interface header files
580 *
581*******************************************************************************/
582
583
584#ifndef _TL1_STRUCT_H
585#define _TL1_STRUCT_H
586
587#include "kal_public_api.h"
588#include "kal_general_types.h"
589#include "kal_public_defs.h"
590#include "tl1_def.h"
591#include "global_type.h" /* [UBin] For inclusion of erac_rat_enum */
592#if (!defined(TL1_SIM))
593#include "rsvak_public_enum.h"
594#endif
595#ifdef __ATERFTX_ERROR_HANDLE_ENHANCE__
596#include "ps_public_enum.h"
597#endif
598/*****************************************************************************
599Request from SLCE/MEME to TL1
600*****************************************************************************/
601
602/*bch*/
603typedef struct _TDD_cphy_bch_setup_req_struct
604{
605 LOCAL_PARA_HDR
606 kal_int16 rx_sfn; /*[Range]: (-1~4095). (0-4095) for frame number type, and "-1" for immediate type.
607 [Meaning]: This is the SFN to start to setup BCH channel, and receive SIB */
608 kal_int32 tm; /*[Range]: -1 ~ (6400*8-1). -1 for unknown timing.
609 [Meaning]:Sub Frame boundary offset between target cell and LST
610 For a cell with unknown tm value, it can not be issued to TL1. */
611 kal_int16 off; /*[Range]: -1~8191, (0-8191) for a cell whose Sub SFN offset to LST has been measured by TL1. -1 means off unknown.
612 [Meaning]: Sub frame number offset between target cell and LST.
613 For a cell with unknown off value, it can not be issued to TL1. */
614 kal_bool sfn_only; /*True/False. True: The BCH setup request is only for the SFN reading,
615 and TL1 will only send CPHY_SFN_IND to RRC,
616 False: The BCH setup request is for the BCH data reading.*/
617 kal_uint16 uarfcn; /*uarfcn*/
618 kal_uint16 cell_param_id; /*[Range]: 0-127, TDD_CPID_INVALID
619 [Meaning]:Cell parameter ID*/
620 kal_bool sctd; /*True: sctd is applied on this cell's P-CCPCH.
621 False: sctd is not applied on this cell's P-CCPCH.*/
622 kal_bool tstd; /*True: tstd is applied on this cell's P-CCPCH.
623 False: tstd is not applied on this cell's P-CCPCH.*/
624 kal_int8 sib7_index; /*[Range]: -1 ~ (sibnum-1)
625 [Meaning]: Indicate which SIB Info in sib_list[] is SIB7,-1 means there is no SIB7 in the list*/
626 kal_uint16 sib7_rep_cycle; /* 2~256 .The meaning of sib7_rp_cycle becomes "SIB7 expiration timer/ SIB_REP" */
627
628 TDD_bch_priority_T bch_priority; /*Enum:TDD_BCH_PRIOHIGH,TDD_BCH_PRIOMEDIUM(not used in TDD18), TDD_BCH_PRIOLOW */
629 kal_uint8 sib_num; /*[Range]: 0~ TDD_MAX_SIB_PATTERN.
630 [Meaning]: the number of sib in sib list.
631 0 means all SIBs reception.0 is not used in current implementation.*/
632 TDD_sib_info_T sib_list[TDD_MAX_SIB_PATTERN]; /*SIB information*/
633#if defined( __GEMINI__ ) && defined ( __UMTS_RAT__ )
634 kal_uint16 priority_index; /*Priority_index for same priority channel in 3G Gemini project*/
635#endif
636 kal_bool is_auto_gap_support; /*This BCH req is for report CGI*/
637
638} tdd_cphy_bch_setup_req_struct;
639
640typedef struct _TDD_cphy_bch_modify_req_struct
641{
642 LOCAL_PARA_HDR
643 kal_int16 rx_sfn; /*[Range]: (-1~4095). (0-4095) for frame number type, and "-1" for immediate type.
644 [Meaning]: This is the SFN to start to setup BCH channel, and receive SIB */
645 kal_uint8 modify_flag; /*A flag to indicate the field to be modified.
646 0x01 "bch_priority" is changed
647 0x02: "sib_num", "sib_list", sib7_index, sib7_factor are changed.
648 0x03: both above item are changed*/
649 kal_int8 sib7_index; /*[Range]: -1 ~ (sibnum-1)
650 [Meaning]: Indicate which SIB Info in sib_list[] is SIB7,-1 means there is no SIB7 in the list*/
651 kal_uint16 sib7_rep_cycle; /* 2~256 .The meaning of sib7_rp_cycle becomes "SIB7 expiration timer/ SIB_REP" */
652
653 TDD_bch_priority_T bch_priority; /*Enum:TDD_BCH_PRIOHIGH,TDD_BCH_PRIOMEDIUM(not used in TDD18), TDD_BCH_PRIOLOW */
654 kal_uint8 sib_num; /*[Range]: 0~ TDD_MAX_SIB_PATTERN.
655 [Meaning]: the number of sib in sib list.
656 0 means all SIBs reception.0 is not used in current implementation.*/
657 TDD_sib_info_T sib_list[TDD_MAX_SIB_PATTERN]; /*SIB information*/
658#if defined( __GEMINI__ ) && defined ( __UMTS_RAT__ )
659 TDD_uas_gemini_conflict_cause_enum conflict_cause; /*Channel conflict casue with peer channel*/
660 kal_uint16 priority_index; /*Priority_index for same priority channel in 3G Gemini project*/
661#endif
662} tdd_cphy_bch_modify_req_struct;
663
664
665typedef struct _TDD_cphy_bch_release_req_struct
666{
667 LOCAL_PARA_HDR
668} tdd_cphy_bch_release_req_struct;
669
670
671/*pch*/
672typedef struct _TDD_cphy_pch_setup_req_struct
673{
674 LOCAL_PARA_HDR
675 kal_int16 act_time; /* activation time. -1 ~ 255. -1 means immediate */
676 kal_uint16 uarfcn; /*uarfcn*/
677 kal_int32 tm; /*[Range]: -1 ~ (6400*8-1). -1 for unknown timing.
678 [Meaning]:Sub Frame boundary offset between target cell and LST
679 For a cell with unknown tm value, it can not be issued to TL1. */
680 kal_int16 off; /*[Range]: -1~8191, (0-8191) for a cell whose Sub SFN offset to LST has been measured by TL1. -1 means off unknown.
681 [Meaning]: Sub frame number offset between target cell and LST.
682 For a cell with unknown off value, it can not be issued to TL1. */
683 TDD_fach_pch_info_T fach_pch_info; /*FACH/PCH channel information*/
684} tdd_cphy_pch_setup_req_struct;
685
686typedef struct _TDD_cphy_pch_modify_req_struct
687{
688 LOCAL_PARA_HDR
689 kal_int16 act_time; /* activation time. -1 ~ 255. -1 means immediate */
690 TDD_pich_drx_T pich_drx; /*new drx info of PCH/PICH*/
691
692 TDD_pich_reconfig_type_E reconfig_type;
693 TDD_pich_smartpaging_T smartpaging_info;
694} tdd_cphy_pch_modify_req_struct;
695
696typedef struct _TDD_cphy_pch_release_req_struct
697{
698 LOCAL_PARA_HDR
699 kal_int16 act_time; /* activation time. -1 ~ 255. -1 means immediate */
700} tdd_cphy_pch_release_req_struct;
701
702
703/*fach*/
704typedef struct _TDD_cphy_fach_setup_req_struct
705{
706 LOCAL_PARA_HDR
707 kal_int16 act_time; /* activation time. -1 ~ 255. -1 means immediate */
708 kal_uint16 uarfcn; /*uarfcn*/
709 kal_int32 tm; /*[Range]: -1 ~ (6400*8-1). -1 for unknown timing.
710 [Meaning]:Sub Frame boundary offset between target cell and LST
711 For a cell with unknown tm value, it can not be issued to TL1. */
712 kal_int16 off; /*[Range]: -1~8191, (0-8191) for a cell whose Sub SFN offset to LST has been measured by TL1. -1 means off unknown.
713 [Meaning]: Sub frame number offset between target cell and LST.
714 For a cell with unknown off value, it can not be issued to TL1. */
715 TDD_fach_pch_info_T fach_pch_info; /*FACH/PCH channel information*/
716} tdd_cphy_fach_setup_req_struct;
717
718typedef struct _TDD_cphy_fach_release_req_struct
719{
720 LOCAL_PARA_HDR
721 kal_int16 act_time; /* activation time. -1 ~ 255. -1 means immediate */
722} tdd_cphy_fach_release_req_struct;
723
724
725/*rach*/
726typedef struct _TDD_cphy_rach_setup_req_struct
727{
728 LOCAL_PARA_HDR
729 kal_int16 act_time; /* activation time. -1 ~ 255. -1 means immediate */
730 TDD_random_access_info_T prach_info; /*prach related info for this UE*/
731 TDD_ul_rach_trch_T trch_list[1]; /*SLCE will select one rach trch for TL1*/
732} tdd_cphy_rach_setup_req_struct;
733
734typedef struct _TDD_cphy_rach_release_req_struct
735{
736 LOCAL_PARA_HDR
737 kal_int16 act_time; /* activation time. -1 ~ 255. -1 means immediate */
738} tdd_cphy_rach_release_req_struct;
739
740
741/*dch*/
742typedef struct _TDD_cphy_dch_setup_req_struct
743{
744 LOCAL_PARA_HDR
745 kal_int16 act_time; /*(-1~255). (0~255) for CFN type, "-1" for immediate type.*/
746 TDD_dch_setup_msg_type_E setup_type; /*DCH setup type,setup,HHO,baton HO,revert,etc.*/
747
748 kal_bool is_ul_dch_setup; /*Indicate whether UL dch will be set up. */
749 kal_bool is_dl_dch_setup; /*Indicate whether DL dch will be set up.
750 Before R8£¬ this field should always be set to KAL_TRUE*/
751 kal_int16 rscp; /* -500 ~ -100 means (-125 ~ -25 )dBm in 0.25 dB step,serving cell rscp*/
752 kal_uint8 tid; /*Transaction id*/
753 kal_uint8 dl_crc_ind; /* For those TrCHs whose CRC data should be sent to MAC,
754 their corresponding bit will be set to 1.
755 The MSB represents the lowest numbered TrCH ID.*/
756 kal_uint16 prim_uarfcn; /*Primary uarfcn of the cell*/
757 kal_uint16 work_uarfcn; /*Working uarfcn of the UE */
758 kal_uint16 ul_tfc_num; /*Number of TFC for UL DPCH*/
759 TDD_ul_dpch_tfc_T ul_tfcs[TDD_MAX_UL_TFC]; /*ul TFCS*/
760 kal_uint8 ul_trch_num; /*Number of UL TrCH*/
761 TDD_ul_dch_trch_T ul_trch_list[TDD_MAX_UL_TRCH]; /*UL TrCH Info*/
762 TDD_ul_dpch_info_T ul_dpch_info; /*UL DPCH info*/
763 kal_uint16 dl_tfc_num; /*Number of DL TFCS*/
764 TDD_dl_tfc_T dl_tfcs[TDD_MAX_DL_TFC]; /*DL TFCS*/
765 kal_uint8 dl_trch_num; /*Number of DL TrCH*/
766 TDD_dl_dch_trch_T dl_trch_list[TDD_MAX_DL_TRCH]; /*DL Trch Info*/
767 kal_int8 max_tx_power; /*50 ~ 33 dBm,Max. allowed TX power. */
768 kal_int8 umts_power_class; /*UE capability(in dBm)*/
769 TDD_dl_dpch_rla_T dl_dpch_rla; /*DL Info & DL DPCH Info common for all RLs*/
770 TDD_dl_dpch_rl_T dl_dpch_rl[TDD_MAX_RL]; /*DL Info & DL DPCH Info. for each RL*/
771 TDD_dl_establish_T dl_establish_info; /*DL DPCH establishment criterion*/
772 kal_uint8 sbgp; /*Value represents number of radio frames
773 0 = 2 frames, 1 = 4 frames,
774 2 = 8 frames, 3 = 16 frames,
775 4 = 32 frames, 5 = 64 frames,
776 6 = 128 frames, 7 =256 frames.*/
777 TDD_random_access_info_T ul_sync; /*UL sync parameter for enter DCH to another cell, handover or handover revert.*/
778 kal_uint8 ul_mac_event; /* Indicate if UMAC need setup/modify/release event
779 Bit 0 : Setup; Bit 1 : Release ; Bit 2 : Modify
780 And in this primitive, only Bit 0 can be set to 1*/
781}tdd_cphy_dch_setup_req_struct;
782
783typedef struct _TDD_cphy_dch_modify_req_struct
784{
785 LOCAL_PARA_HDR
786 kal_int16 act_time; /*(-1~255). (0~255) for CFN type, "-1" for immediate type.*/
787 kal_uint16 work_uarfcn; /*Working uarfcn of the cell */
788 TDD_dch_modify_msg_type_E modify_type; /*Enums:TDD_DCH_RECONFIG,TDD_DCH_LOOP_MODE_2*/
789 kal_uint8 tid; /*Transaction id*/
790 TDD_ul_dpch_reconfig_type_E ul_dpch_reconfig_type ;/* 0: Do nothing with ul dpch.
791 1: Setup ul dpch.
792 2: modify ul dpch
793 3.Release ul dpch*/
794
795 TDD_dl_dpch_reconfig_type_E dl_dpch_reconfig_type ;/* 0: Do nothing with dl dpch.
796 1: Setup dl dpch.
797 2: modify dl dpch
798 3.Release dl dpch*/
799
800 kal_bool ul_mod_ind; /*Indicate whether UL modify indication should be sent to MAC*/
801 kal_bool dl_mod_ind; /*Indicate whether DL modify indication should be sent to MAC*/
802 kal_uint8 dl_crc_ind; /*For those TrCHs whose CRC data should be sent to MAC.
803 their corresponding bit will be set to 1.
804 The MSB represents the lowest numbered TrCH ID.*/
805 kal_uint16 modify_field; /*Bit field to represent for the parameters that should be modified
806 Bit0: DL TrCH parameter
807 Bit1: DL TFCS parameter
808 Bit2: UL TrCH parameter
809 Bit3: UL TFCS parameter
810 Bit4: downlink common RL parameters
811 Bit5: downlink each RL parameters.
812 Bit 6 : UL RL parameter
813 Bit 7 : Physical parameters such as working_uarfcn
814 Bit8: dl_establish_info
815 Bit9: SBGP
816 Bit10: uplink power control related parameters, such as max _tx_power, umts_power_class. */
817 kal_uint16 ul_tfc_num; /*Number of TFC for UL DPCH*/
818 TDD_ul_dpch_tfc_T ul_tfcs[TDD_MAX_UL_TFC]; /*ul TFCS*/
819 kal_uint8 ul_trch_num; /*Number of UL TrCH*/
820 TDD_ul_dch_trch_T ul_trch_list[TDD_MAX_UL_TRCH];/*UL TrCH Info*/
821 kal_uint16 dl_tfc_num; /*Number of DL TFCS*/
822 TDD_dl_tfc_T dl_tfcs[TDD_MAX_DL_TFC]; /*DL TFCS*/
823 kal_uint8 dl_trch_num; /*Number of DL TrCH*/
824 TDD_dl_dch_trch_T dl_trch_list[TDD_MAX_DL_TRCH];/*DL Trch Info*/
825 TDD_dl_dpch_rla_T dl_dpch_rla; /*DL Info & DL DPCH Info common for all RLs*/
826 TDD_ul_dpch_info_T ul_dpch_info; /*UL DPCH info*/
827 kal_int8 max_tx_power; /*50 ~ 33 dBm,Max. allowed TX power. */
828 kal_int8 umts_power_class; /*UE capability(in dBm)*/
829 TDD_dl_dpch_rl_T dl_dpch_rl[TDD_MAX_RL]; /*DL Info & DL DPCH Info. for each RL*/
830 TDD_dl_establish_T dl_establish_info; /*DL DPCH establishment criterion*/
831 kal_uint8 sbgp; /*Value represents number of radio frames
832 0 = 2 frames, 1 = 4 frames,
833 2 = 8 frames, 3 = 16 frames,
834 4 = 32 frames, 5 = 64 frames,
835 6 = 128 frames, 7 =256 frames.*/
836 kal_uint8 ul_mac_event; /* Indicate if UMAC need setup/modify/release event
837 Bit 0 : Setup; Bit 1 : Release ; Bit 2 : Modify
838 And in this primitive, only Bit 2 can be set to 1*/
839}tdd_cphy_dch_modify_req_struct;
840
841typedef struct _TDD_cphy_dch_release_req_struct
842{
843 LOCAL_PARA_HDR
844 kal_int16 act_time; /*(-1~255). (0~255) for CFN type, "-1" for immediate type.*/
845 kal_bool isStopLoopTestM2First; /*TRUE: Stop Loop Mode 2 before releasing DCH.*/
846 kal_uint8 ul_mac_event; /* Indicate if UMAC need setup/modify/release event
847 Bit 0 : Setup; Bit 1 : Release ; Bit 2 : Modify
848 And in this primitive, only Bit 1 can be set to 1*/
849} tdd_cphy_dch_release_req_struct;
850
851
852/*fs*/
853typedef struct _TDD_cphy_frequency_scan_req_struct
854{
855 LOCAL_PARA_HDR
856 kal_uint8 max_num_cell; /*Maximum number of cells reported in 1 frequency during scan.
857 MIN(max_num_cell, num_found_cell) cells to MEME
858 it shall halt the frequency scan procedure.*/
859 kal_uint16 timeout; /*Maximum time spent to do cell search on 1 frequency.
860 If TL1 has spent so much time to do cell search on 1 frequency,
861 it will send an indication to MEME and halt the frequency scan procedure.
862 [Unit]: ms.*/
863 kal_uint8 num_freq_range; /*Number of range list*/
864 kal_uint16 uarfcn_begin[TDD_MAX_FREQ_RANGE]; /*Begin of UARFCN for range cell search*/
865 kal_uint16 uarfcn_end[TDD_MAX_FREQ_RANGE]; /*End of UARFCN for range cell search */
866 kal_uint8 num_freq_list; /*Number of freq for preferred freq list */
867 kal_uint16 uarfcn_list[TDD_MAX_FREQ_LIST]; /*List of UARFCN */
868 kal_uint8 num_preferred_cell; /*Number of preferred cells. */
869 TDD_preferred_cell_list_T preferred_cell_list[TDD_MAX_PREFERRED_CELL]; /*Preferred cell list. */
870 kal_bool full_band_search; /*True/False. True: Perform full band scan. */
871 kal_bool freq_correct; /*True/False. True: TL1 need to do frequency correction. */
872 kal_bool resume; /*True/False. True:TL1 should resume previous freq scan,
873 TL1 didn't care the other fields in this msg,
874 False: TL1 should start a new freq scan according to this msg */
875 TDD_full_band_option_E full_band_option; /*- TDD_FULL_BAND_ONLY: Normal full band FS
876 - TDD_FULL_BAND_AND_EXCLUDE: Full band FS but the indicated frequency list/range will be excluded */
877 #if defined( __GEMINI__ ) && defined ( __UMTS_RAT__ )
878#if (!defined(TL1_SIM))
879 freq_scan_type_enum freq_scan_type;
880#else
881 kal_uint16 priority_index;
882#endif
883 #endif
884 #ifdef __GEMINI__
885 kal_uint8 priority_level; /*[Range: 0-2] Indicate which gap pattern shoud be used for this freq scan in Virtual mode*/
886 /*0=highest priority; 1=2nd priority; 2=lowest priority*/
887 #endif
888 kal_bool is_auto_gap_support; /*This FS req is for report CGI*/
889#if defined(__LTE_RAT__) && defined (__UMTS_TDD128_MODE__)
890 kal_bool trigger_by_4g_plmn_loss;
891#endif
892/*Yajiang 20150114 :add for TL1 to differ manual plmn search or autonmous*/
893 kal_bool is_plmn_list;
894} tdd_cphy_frequency_scan_req_struct;
895
896typedef struct _TDD_cphy_frequency_scan_suspend_req_struct
897{
898 LOCAL_PARA_HDR
899} tdd_cphy_frequency_scan_suspend_req_struct;
900
901
902typedef struct _TDD_cphy_frequency_scan_continue_req_struct
903{
904 LOCAL_PARA_HDR
905 kal_bool continue_cell; /*True if MEME want TL1 to do continue cell search on current frequency
906 instead of jumping to next specified frequency. */
907} tdd_cphy_frequency_scan_continue_req_struct;
908
909
910/*meas*/
911typedef struct _TDD_cphy_measurement_config_cell_req_struct
912{
913 LOCAL_PARA_HDR
914 kal_uint8 tid; /*Transaction ID to sync between request and indication*/
915 TDD_meas_act_E action; /*[Range]: TDD_STOP_MEAS,
916 TDD_START_MEAS_NEW_CIL,
917 TDD_START_MEAS_NEW_CIL_NEW_FMO*/
918 kal_bool ds_meas; /*True: Indicate that TL1 shall make detected cell measure.*/
919 kal_uint16 intra_uarfcn; /*Intra-frequency uarfcn, TL1 has knowledge about intra_uarfcn,
920 just double check the value. MEME shall send the primitive after
921 channel enters stable state to guarantee the value is the same
922 with TL1. But it is possible different with TL1 when channel transition.*/
923 kal_uint8 num_cell; /*[Range]:0-64,[Meaning]: Number of cells in the following
924 cell_info_list[]. Must be greater than 0 if bit1 of 'action' is set.*/
925 TDD_cell_info_list_T cell_info_list[TDD_MAX_NUM_MEASURED_CELL]; /*List of all monitor cells to be measured indicated by network. It
926 is ascending sort by cell's uarfcn and cell_param_id. Cells on the
927 same frequency will be collected together. The cells on different
928 frequencies will not be interleaved.*/
929 TDD_fach_mo_info_T fach_mo_info; /*The structure is used to express the FACH measurement occasion
930 parameters. It is valid when bit2 of 'action' is set*/
931 kal_bool intra_rscp_meas_period_valid; /*Configure Intra-freq. RSCP meas. period in DCH/FACH.*/
932 kal_uint8 intra_rscp_period_N; /*Num. of 50/40 ms.*/
933 kal_bool inter_rscp_meas_period_valid; /*Configure Inter-freq. RSCP meas. period in DCH/FACH*/
934 kal_uint8 inter_rscp_period_N; /*Num. of 50/40 ms.*/
935 kal_bool intra_iscp_meas_period_valid; /*Configure Intra-freq. ISCP meas. period in DCH/FACH.*/
936 kal_uint8 intra_iscp_period_N; /*Num. of 50/40 ms.*/
937//#ifdef __UMTS_R9__
938 kal_int16 T_higher_prio_search; /*Higher priority search period (s) when use priority based cell reselection, -1 means use regular period.*/
939 kal_bool is_meas_period_reset_standby;
940 kal_bool prohibit_apply_n_layer_standby; /* [R8][MM] Due to 4G OOS, MEME notifies TL1 not to apply n_layer factor to accelerate meas frequency */
941
942//#endif
943} tdd_cphy_measurement_config_cell_req_struct;
944
945
946#ifdef __TAS_SUPPORT__
947typedef struct _TDD_cphy_tas_custom_config_param_T
948{
949 kal_uint16 tas_ver;
950 kal_uint16 tas_state_number;
951 kal_uint16 is_test_sim;
952 kal_uint16 tas_enable_flag; //1/0: enable/disable TAS
953
954 kal_uint16 tas_ics_init_state; //reserve for future or align 32bit
955 kal_uint16 tas_force_ant_enable;
956 kal_uint16 tas_force_ant_state;
957 kal_uint16 tas_force_tx_band_state;
958 kal_uint16 tas_real_sim_enable; //1/0: enable/disable realSIM
959
960 kal_uint16 tas_test_sim_enable; //1/0: enable/disable testSIM
961 kal_uint16 tds_with_b34_real_sim_tas_status; //1/0: enable/disable realSIM
962 kal_uint16 tds_with_b34_real_sim_init_state; //ant state realSIM
963 kal_uint16 tds_with_b39_real_sim_tas_status; //1/0: enable/disable realSIM
964
965 kal_uint16 tds_with_b39_real_sim_init_state; //ant state realSIM
966 kal_uint16 tds_with_b34_test_sim_tas_status; //1/0: enable/disable testSIM
967 kal_uint16 tds_with_b34_test_sim_init_state; //ant state testSIM
968 kal_uint16 tds_with_b39_test_sim_tas_status; //1/0: enable/disable testSIM
969
970 kal_uint16 tds_with_b39_test_sim_init_state; //ant state testSIM
971 kal_uint16 reserve;
972}tdd_cphy_tas_custom_config_param_T;
973
974typedef struct _TDD_cphy_tas_algorithm_param_T
975{
976 //TAS period
977 kal_int16 period_N;//TAS period in connected mode,DCH n*200ms,default=1;
978 kal_int16 drx_period_N;//TAS period in DRX: drx_period_n * drx;
979
980 //TAS antenna offset
981#if defined(__MD95__) || defined(__MD97__)
982 kal_int16 diff_ant_oft_utas[8];
983#else
984 kal_int16 diff_ant_oft0;
985 kal_int16 diff_ant_oft1;
986 kal_int16 diff_ant_oft2;
987 kal_int16 diff_ant_oft3;
988#endif
989 kal_int16 diff_htp;
990 kal_int16 htp_oft;
991 kal_int16 max_htp_tx_pwr;
992 kal_int16 threshold_htp;
993#if defined(__MD95__) || defined(__MD97__)
994 kal_int16 diff_drx_ant_oft_utas[8];
995#else
996 kal_int16 diff_drx_ant_oft0;
997 kal_int16 diff_drx_ant_oft1;
998 kal_int16 diff_drx_ant_oft2;
999 kal_int16 diff_drx_ant_oft3;
1000#endif
1001
1002 //TAS threshold
1003 kal_int16 threshold_diff_rscp;
1004 kal_int16 threshold_diff_snr;
1005 kal_int16 snr_good;
1006
1007 kal_int16 threshold_drx_diff_rscp;
1008 kal_int16 threshold_drx_diff_snr;
1009 kal_int16 drx_snr_good;
1010
1011 kal_int16 threshold_drx_rscp_low;
1012 kal_int16 threshold_drx_snr_low;
1013
1014 //TAS fall back algorithm
1015 kal_int16 diff_fall_back;
1016 kal_int16 diff_drx_fall_back;
1017
1018 kal_int16 diff_htp_backup_n;
1019 kal_int16 htp_oft_backup_n;
1020 kal_int16 threshold_diff_rscp_backup_n;
1021 kal_int16 tds_tp_oft_backup_n;
1022
1023 //TAS SAR new fall back algorithm param
1024#if defined(__MD95__) || defined(__MD97__)
1025 kal_int16 tds_sar_ant_oft_utas[8];
1026#else
1027 kal_int16 tds_sar_ant_oft0;
1028 kal_int16 tds_sar_ant_oft1;
1029 kal_int16 tds_sar_ant_oft2;
1030 kal_int16 tds_sar_ant_oft3;
1031#endif
1032 kal_int16 tds_sar_diff_htp;
1033 kal_int16 tds_sar_htp_oft;
1034
1035 kal_int16 tds_sar_threshold_diff_rscp;
1036 kal_int16 tds_sar_tp_oft;
1037
1038 kal_int16 tds_sar_reserve1;
1039 kal_int16 tds_sar_reserve2;
1040}tdd_cphy_tas_algorithm_param_T;
1041#endif
1042
1043/*specific cell search*/
1044typedef struct _TDD_cphy_specific_cell_search_req_struct /*RRCE->TL1*/
1045{
1046 LOCAL_PARA_HDR
1047 kal_uint16 uarfcn; /*uarfcn*/
1048 kal_uint16 cell_param_id; /*[Range]: 0-127 [Meaning]:Cell parameter ID*/
1049 kal_bool sctd; /*True/False. True: sctd is applied on this cell's P-CCPCH.
1050 False: sctd is not applied on this cell's P-CCPCH.*/
1051 kal_bool tstd; /*True/False. True: tstd is applied on this cell's P-CCPCH.
1052 False: tstd is not applied on this cell's P-CCPCH.*/
1053} tdd_cphy_specific_cell_search_req_struct;
1054
1055typedef struct _TDD_cphy_specific_cell_search_stop_req_struct
1056{
1057 LOCAL_PARA_HDR
1058} tdd_cphy_specific_cell_search_stop_req_struct;
1059
1060/*reset and set rat*/
1061typedef struct _TDD_cphy_reset_req_struct
1062{
1063 LOCAL_PARA_HDR
1064} tdd_cphy_reset_req_struct;
1065
1066typedef struct _TDD_cphy_rf_on_req_struct
1067{
1068 LOCAL_PARA_HDR
1069 kal_uint8 working_UMTS_band[2];
1070} tdd_cphy_rf_on_req_struct;
1071
1072typedef struct _TDD_cphy_rf_off_req_struct
1073{
1074 LOCAL_PARA_HDR
1075} tdd_cphy_rf_off_req_struct;
1076
1077typedef struct _TDD_cphy_set_active_rat_req_struct
1078{
1079 LOCAL_PARA_HDR
1080 TDD_mode_type_E mode; /* Curernt mode setting (Single, Dual) */
1081 TDD_rat_type_E rat; /* Current active RAT setting (Flight, UMTS, GSM) */
1082 erac_rat_enum full_rat_info; /* Full RAT info */
1083} tdd_cphy_set_active_rat_req_struct;
1084
1085/*internal meas*/
1086typedef struct _TDD_cphy_measurement_internal_config_req_struct /*MEME->TL1*/
1087{
1088 LOCAL_PARA_HDR
1089 kal_uint8 meas_id; /*[Range] 0-16, 0 is INVALID_MEAS_ID and is forbidden use here.
1090 [Meaning] <TS25.331:10.3.7.48>, it is 'Measurement Identity'
1091 in the 'MEASUREMENT CONTROL', follow fields are all derived from the message.*/
1092 TDD_internal_meas_E meas_quantity; /*[Range] TDD_MEAS_TX_PWR, TDD_MEAS_RSSI, TDD_MEAS_TA
1093 [Meaning] Indicates internal measurement type in the primitive.*/
1094 kal_bool periodic_ind; /*[Range]True/False.
1095 [Meaning] Indicates whether TL1 report result of 'meas_type' periodically.
1096 When 'meas_type' is TDD_MEAS_RSSI, always set with 'False'.*/
1097 kal_uint8 report_num; /*[Range]: 0 ~ 64. Number of periodic reports to be reported. TL1 will ignore
1098 this value if periodic_ind=False. If the value is 0, it means infinity.*/
1099 kal_uint16 period; /*[Range]: 250 ~ 6400 frames. The reporting interval of periodic measurement.
1100 TL1 will ignore this value if periodic_ind=False.*/
1101 kal_uint8 event_num; /*Number of events in the below event[] list.*/
1102 TDD_meas_event_T event[TDD_MAX_MEAS_EVENT]; /*The list of event.*/
1103 kal_uint8 filter; /*[Range] 0-14.(fc0,fc1,fc2,fc3,fc4,fc5,fc6,fc7,fc8,fc9,fc11,fc13,fc15,fc17,fc19),
1104 L3 filtering, apply for UTRA carrier RSSI and UE transmitted power.*/
1105}tdd_cphy_measurement_internal_config_req_struct;
1106
1107
1108typedef struct _TDD_cphy_measurement_internal_result_req_struct
1109{
1110 LOCAL_PARA_HDR
1111 kal_uint8 meas_id; /*[Range] 0-16, 0 is INVALID_MEAS_ID
1112 [Meaning] Measurement Identity<TS25.331:10.3.7.48>; Indicate
1113 TL1 return Tx-Pwr results with filter coefficient in 'MEASUREMENT
1114 CONTROL' indicated by meas_id. If meas_id is 0, it means TL1
1115 return Tx-Pwr value without filter.*/
1116}tdd_cphy_measurement_internal_result_req_struct;
1117
1118
1119typedef struct _TDD_cphy_measurement_internal_stop_req_struct
1120{
1121 LOCAL_PARA_HDR
1122 kal_uint8 num_meas_id; /*[Range] 1-TDD_MAX_NUM_MEAS_ID
1123 [Meaning] The number of valid 'meas_id' in 'meas_id[]'.*/
1124 kal_uint8 meas_id[TDD_MAX_NUM_MEAS_ID]; /*[Range] 1-16 [Meaning] <TS25.331:10.3.7.48>, it is 'Measurement
1125 Identity' in the 'MEASUREMENT CONTROL', TL1 shall stop internal
1126 measurement configured by these message.*/
1127}tdd_cphy_measurement_internal_stop_req_struct;
1128
1129
1130
1131/*sniffer */
1132typedef struct _TDD_cphy_rssi_sniffer_start_req_struct
1133{
1134 LOCAL_PARA_HDR
1135 kal_uint8 num_freq_list; /* Num of of freq for scan list of RSSI sniffer */
1136 kal_uint16 uarfcn_list[TDD_MAX_RSSI_SNIFFER_SCAN_LIST]; /* Array of UARFCNs for RSSI sniffer*/
1137} tdd_cphy_rssi_sniffer_start_req_struct;
1138
1139typedef struct _TDD_cphy_rssi_sniffer_stop_req_struct
1140{
1141 LOCAL_PARA_HDR
1142} tdd_cphy_rssi_sniffer_stop_req_struct;
1143
1144
1145/*HSPDA*/
1146typedef struct _TDD_cphy_hsdsch_setup_req_struct
1147{
1148
1149 LOCAL_PARA_HDR
1150 kal_int16 act_time; /*[meaning]: The activation time for this message.
1151 TL1 will schedule the activation time to the TTI boundary.
1152 [Range]: (-1~255). (0-255) for CFN type, "-1" for immediate type.*/
1153
1154 kal_bool h_rnti_valid; /*if H_RNTI valid*/
1155
1156 kal_uint16 h_rnti; /*H-RNTI assigned to UE*/
1157
1158 kal_uint16 prim_uarfcn; /*if H_RNTI valid*/
1159
1160 kal_uint16 work_uarfcn; /*Working uarfcn of the UE */
1161 kal_uint16 cell_param_id; /*0-127,Cell parameter ID*/
1162 TDD_hsscch_info_T hsscch_info; /*HS-SCCH Information*/
1163 TDD_midamble_info_T hspdsch_midamble_info; /*HS-PDSCH Midamble Configuration*/
1164 TDD_hs_harq_info_T harq_info; /*Harq process & IR buffer information*/
1165 kal_bool mac_hs_reset; /*TRUE indicates the MAC-hs entity needs to be reset*/
1166 kal_uint8 mac_event; /*Indicate whether HS-DSCH events indication should be sent to MAC:
1167 Bit 0 : Setup; Bit 1 : Release ; Bit 2 : Modify
1168 And in this primitive, only Bit 0 can be set to 1*/
1169 TDD_hs_queue_info_T queue_info; /*MAC-hs Queue Information*/
1170 kal_uint8 pccpch_tx_power; /*[Range]: 6 ~ 43 by step 1 in dBm
1171 [Meaning]:P-CCPCH transmit power*/
1172 kal_int8 max_tx_power; /*[Range]: -50 ~ 33 dBm
1173 [Meaning]: Max. allowed TX power.*/
1174 kal_int8 umts_power_class; /*UE capability(in dBm)
1175 The value's unit configured by SLCE is dBm.
1176 define MAX_OUTPUT_POWER_CLASS_1 33 :+33dBm
1177 define MAX_OUTPUT_POWER_CLASS_2 24 : +24dBm
1178 define MAX_OUTPUT_POWER_CLASS_3 21 : +21dBm
1179 define MAX_OUTPUT_POWER_CLASS_4 27 : +27dBm */
1180
1181 kal_int16 rscp; /* -500 ~ -100 means (-125 ~ -25 )dBm in 0.25 dB step,serving cell rscp*/
1182 kal_uint8 capability_category; /*[Meaning]: indicate TL1 to usewhich category (1,9,24)*/
1183 kal_uint8 tid; /*Transation ID, used for reporting DL INIT SYNC*/
1184 TDD_rrc_state_E rrc_status; /* Indicate the RRC current status */
1185 TDD_hspdsch_state_info_T hspdsch_state_info;
1186 kal_int32 Tm;
1187 kal_int16 Off;
1188 kal_uint8 doff;
1189 TDD_dl_establish_T dl_sync_info; /*Downlink establishment criterion*/
1190 kal_bool c_h_rnti_valid; /*Indicate if common H-RNTI is valid for UL1. This field shall be set to FALSE when rrc_status is equal to CELL_DCH.*/
1191 kal_uint16 c_h_rnti; /*Common H-RNTI assigned to UE, Never use in CELL_PCH/URA_PCH*/
1192 kal_bool b_h_rnti_valid; /* [R7] Indicate if bcch-specific H-RNTI is valid for UL1 */
1193 kal_uint16 b_h_rnti; /* [R7] bcch-specific H-RNTI assigned to UE. UL1 should not refer to this field if b_h_rnti_valid = KAL_FALSE. */
1194
1195} tdd_cphy_hsdsch_setup_req_struct;
1196
1197typedef struct _TDD_cphy_hsdsch_modify_req_struct
1198{
1199 LOCAL_PARA_HDR
1200 kal_int16 act_time; /*[meaning]: The activation time for this message. TL1 will schedule
1201 the activation time to the TTI boundary. [Range]: (-1~255).
1202 (0-255) for CFN type, "-1" for immediate type.*/
1203
1204 /*kal_uint8 modify_field;*/
1205//#else /*R8*/
1206 kal_uint16 modify_field; /*Bit field to represent for the parameters that should be modified
1207 Bit 0 : H-RNTI, including D/B-HRNTI type;
1208 Bit 1 : HS-SCCH Info;
1209 Bit 2 : HSPDSCH_midamble_info
1210 Bit 3 : HARQ Info;
1211 Bit 4 : Queue Info.
1212 Bit 5 : Uplink power control related parameters,such as
1213 "pccpch_tx_power", "max_tx_power" and "umts_power_class"
1214 Bit 6 : work_uarfcn
1215 Bit 7 : capability_category
1216 Bit 8 : hspdsch_state_info
1217 Bit 9 : hs_cell_fach_drx_info
1218 Bit 10: Tm, NO USE now
1219 Bit 11: Off, NO USE now
1220 Bit 12: doff, NO USE now
1221 Bit 13: dl_sync_info
1222 Bit 14: cHrnti
1223 Note: modify_field can be "0" only when mac_hs_reset = true. */
1224
1225//#endif
1226 kal_uint16 h_rnti; /*H-RNTI assigned to UE*/
1227 kal_uint16 work_uarfcn; /*Working uarfcn of the UE */
1228 TDD_hsscch_info_T hsscch_info; /*HS-SCCH Information*/
1229 TDD_midamble_info_T hspdsch_midamble_info; /*HS-PDSCH Midamble Configuration*/
1230 TDD_hs_harq_info_T harq_info; /*Harq process & IR buffer information*/
1231 kal_bool mac_hs_reset; /*TRUE indicates the MAC-hs entity needs to be reset*/
1232 kal_uint8 mac_event; /*Indicate whether HS-DSCH events indication should be sent to MAC:
1233 Bit 0 : Setup; Bit 1 : Release ; Bit 2 : Modify
1234 And in this primitive, only Bit 2 can be set to 1*/
1235 TDD_hs_queue_info_T queue_info; /*MAC-hs Queue Information*/
1236 kal_uint8 pccpch_tx_power; /*[Range]: 6 ~ 43 by step 1 in dBm
1237 [Meaning]:P-CCPCH transmit power*/
1238 kal_int8 max_tx_power; /*Range]: -50 ~ 33 dBm
1239 [Meaning]: Max. allowed TX power.*/
1240 kal_int8 umts_power_class; /*UE capability(in dBm)
1241 The value's unit configured by SLCE is dBm.
1242 define MAX_OUTPUT_POWER_CLASS_1 33 :+33dBm
1243 define MAX_OUTPUT_POWER_CLASS_2 24 : +24dBm
1244 define MAX_OUTPUT_POWER_CLASS_3 21 : +21dBm
1245 define MAX_OUTPUT_POWER_CLASS_4 27 : +27dBm */
1246
1247 kal_uint8 capability_category; /*[Meaning]: indicate TL1 to usewhich category (1,9,24)*/
1248 kal_uint8 tid; /*Transation ID, used for reporting DL INIT SYNC*/
1249 TDD_rrc_state_E rrc_status; /*[R8] Specify that HS-DCH transmission type*/
1250 TDD_hspdsch_state_info_T hspdsch_state_info;
1251 kal_int32 Tm;
1252 kal_int16 Off;
1253 kal_uint8 doff;
1254 kal_int16 rscp;
1255 TDD_dl_establish_T dl_sync_info; /*Downlink establishment criterion*/
1256 kal_bool h_rnti_valid; /* Indicate if h_rnti field is valid for UL1. H-RNTI shall be always valid for CELL_DCH, CELL_FACH, TDD_IDLE_FACH, and shall be always invalid for URA_PCH. */
1257 kal_bool b_h_rnti_valid; /* [R7] Indicate if bcch-specific H-RNTI is valid for UL1 */
1258 kal_uint16 b_h_rnti; /* [R7] bcch-specific H-RNTI assigned to UE. UL1 should not refer to this field if b_h_rnti_valid = KAL_FALSE. */
1259 kal_bool c_h_rnti_valid; /*Indicate if common H-RNTI is valid for UL1. This field shall be set to FALSE when rrc_status is equal to CELL_DCH.*/
1260 kal_uint16 c_h_rnti; /*Common H-RNTI assigned to UE, Never use in CELL_PCH/URA_PCH*/
1261//#endif
1262} tdd_cphy_hsdsch_modify_req_struct;
1263
1264typedef struct _TDD_cphy_hsdsch_release_req_struct
1265{
1266 LOCAL_PARA_HDR
1267 kal_int16 act_time; /*[meaning]: The activation time for this message. TL1 will schedule the activation time to the
1268 TTI boundary. [Range]: (-1~255). (0-255) for CFN type, "-1" for immediate type.*/
1269 kal_bool mac_hs_reset; /*TRUE indicates the MAC-hs entity needs to be reset*/
1270 kal_uint8 mac_event; /*Indicate whether HS-DSCH events indication should be sent to MAC:
1271 Bit 0 : Setup; Bit 1 : Release ; Bit 2 : Modify
1272 And in this primitive, only Bit 1 can be set to 1*/
1273} tdd_cphy_hsdsch_release_req_struct;
1274
1275#ifdef __HSUPA_SUPPORT__
1276typedef struct _TDD_cphy_edch_setup_req_struct
1277{
1278
1279 LOCAL_PARA_HDR
1280 kal_int16 act_time; /*[meaning]: The activation time for this message. L1 will schedule the activation time
1281 to the TTI boundary. [Range]: (-1~255). (0-255) for CFN type, "-1" for immediate type.*/
1282
1283 kal_bool e_rnti_valid;
1284
1285 kal_uint16 e_rnti; /*E-RNTI assigned to UE.*/
1286
1287 kal_uint8 capability_category; /*indicating which category [1,15] TL1 to use*/
1288
1289 kal_bool is_lowest_capability_category; /*[Meaning]: indicate TL1 to use whether the lowest category or not.*/
1290
1291 kal_uint16 work_uarfcn; /*Working uarfcn of the UE */
1292 kal_uint16 cell_param_id; /*0-127,Cell parameter ID*/
1293 kal_bool edch_sched_info_valid; /*The following edch_sched_info valid or not.*/
1294 TDD_edch_sched_info_T edch_sched_info; /*Scheduled Transmission Information.*/
1295 kal_bool edch_non_sched_info_valid; /*The following edch_sched_info valid or not.*/
1296 TDD_edch_non_sched_info_T edch_non_sched_info; /*Non-Scheduled Transmission Information.*/
1297 TDD_epuch_info_T epuch_info; /*E-PUCH Information, common to both scheduled and non-scheduled E-DCH transmission.*/
1298 TDD_edch_harq_info_T edch_harq_info; /*Harq Configuration Information.*/
1299 kal_bool mac_es_e_reset; /*TRUE indicates the MAC-es/e entity needs to be reset.*/
1300 kal_uint8 mac_event; /*Indicate whether E-DCH events indication should be sent to MAC:
1301 Bit 0 : Setup; Bit 1 : Release ; Bit 2 : Modify
1302 And in this primitive, only Bit 0 can be set to 1*/
1303
1304 TDD_edch_transmission_type_E transmission_type; /*[R8] specify that EDCH is allocated in dedicated state or common state*/
1305 TDD_common_edch_info_T common_edch_info; /*[R8]This field is only valid when transmission_type == TDD_EDCH_IN_COMMON_STATE*/
1306 kal_uint8 pa_plus_valid_flag; /*bitmask bit0: eagch_drx_info_valid
1307 bit1: edch_sps_info_valid*/
1308 TDD_eagch_drx_info_T eagch_drx_param; /*EAGCH DRX related param*/
1309 TDD_edch_sps_info_T edch_sps_info; /*EDCH SPS related param*/
1310 kal_bool ul_sync_flag;
1311 kal_uint16 t321; /*100, 200, 400, 800 ms*/
1312
1313} tdd_cphy_edch_setup_req_struct;
1314
1315typedef struct _TDD_cphy_edch_modify_req_struct
1316{
1317 LOCAL_PARA_HDR
1318 kal_int16 act_time; /*[meaning]: The activation time for this message. L1 will schedule
1319 the activation time to the TTI boundary. [Range]: (-1~255).
1320 (0-255) for CFN type, "-1" for immediate type.*/
1321
1322 kal_uint16 modify_field; /*Bit0 ~ Bit6: refer to the below comments
1323 Bit7 ~ Bit9: new added for PA+
1324 Bit7: common edch info
1325 Bit8: EAGCH DRX info
1326 Bit9: EDCH SPS info*/
1327//#else
1328 //kal_uint8 modify_field;
1329 /*Bit field to represent for the parameters that should be modified
1330 Bit0: E-RNTI;
1331 Bit1: scheduled mode information;
1332 Bit2: non-scheduled mode information;
1333 Bit3: e-puch information;
1334 Bit4: HARQ information;
1335 Bit 5: is_lowest_capablility_category .
1336 Bit6: work_uarfcn
1337 Note: modify_field can be "0" only when mac_e_es_reset = true. */
1338//#endif
1339 kal_uint16 e_rnti; /*E-RNTI assigned to UE.*/
1340
1341 kal_uint8 capability_category; /*indicating which category [1,15] TL1 to use*/
1342
1343 kal_bool is_lowest_capability_category; /*[Meaning]: indicate TL1 to use whether the lowest category or not.*/
1344
1345 kal_uint16 work_uarfcn; /*Working uarfcn of the UE */
1346 kal_bool edch_sched_info_valid; /*Schedule EPUCH is valid or not after this msg.*/
1347 TDD_edch_sched_info_T edch_sched_info; /*Scheduled Transmission Information.*/
1348 kal_bool edch_non_sched_info_valid; /*Non-schedule EPUCH isalid or notafter this msg.*/
1349 TDD_edch_non_sched_info_T edch_non_sched_info; /*Non-Scheduled Transmission Information.*/
1350 TDD_epuch_info_T epuch_info; /*E-PUCH Information, common to both scheduled and non-scheduled E-DCH transmission.*/
1351 TDD_edch_harq_info_T edch_harq_info; /*Harq Configuration Information.*/
1352 kal_bool mac_es_e_reset; /*TRUE indicates the MAC-es/e entity needs to be reset.*/
1353 kal_uint8 mac_event; /*Indicate whether E-DCH events indication should be sent to MAC:
1354 Bit 0 : Setup; Bit 1 : Release ; Bit 2 : Modify
1355 And in this primitive, only Bit 2 can be set to 1*/
1356
1357 TDD_edch_transmission_type_E transmission_type; /*[R8] specify that EDCH is allocated in dedicated state or common state*/
1358 TDD_common_edch_info_T common_edch_info; /*[R8]This field is only valid when transmission_type == TDD_EDCH_IN_COMMON_STATE*/
1359 kal_uint8 pa_plus_valid_flag; /*Bit0: DRX en/disable; Bit1: SPS en/disable*/
1360 TDD_eagch_drx_info_T eagch_drx_param; /*EAGCH DRX related param*/
1361 TDD_edch_sps_info_T edch_sps_info; /*EDCH SPS related param*/
1362 kal_bool e_rnti_valid;
1363
1364
1365} tdd_cphy_edch_modify_req_struct;
1366
1367typedef struct _TDD_cphy_edch_release_req_struct
1368{
1369 LOCAL_PARA_HDR
1370 kal_int16 act_time; /*[meaning]: The activation time for this message. L1 will schedule the activation time to the
1371 TTI boundary. [Range]: (-1~255). (0-255) for CFN type, "-1" for immediate type.*/
1372 kal_bool mac_es_e_reset; /*TRUE indicates the MAC-es/e entity needs to be reset.*/
1373 kal_uint8 mac_event; /*Indicate whether EDCH events indication should be sent to MAC:
1374 Bit 0 : Setup; Bit 1 : Release ; Bit 2 : Modify
1375 And in this primitive, only Bit 1 can be set to 1*/
1376} tdd_cphy_edch_release_req_struct;
1377#endif
1378
1379//#if defined( __UMTS_R9__ ) && defined ( __AST3002__ )
1380typedef struct _TDD_cphy_measurement_config_dmo_req_struct
1381{
1382 LOCAL_PARA_HDR
1383 kal_int16 act_time;
1384
1385 kal_uint8 dmo_bitmap;
1386 TDD_dch_mo_info_T dmo_pattern[TDD_MAX_DMO_PATTERN_NUM];
1387}tdd_cphy_measurement_config_dmo_req_struct;
1388//#endif
1389
1390typedef struct _TDD_cphy_measurement_config_idle_interval_req_struct
1391{
1392 LOCAL_PARA_HDR
1393 kal_uint8 k;
1394 kal_uint8 Offset;
1395}tdd_cphy_measurement_config_idle_interval_req_struct;
1396
1397/*****************************************************************************
1398 container request
1399*****************************************************************************/
1400
1401/*-------- Message(Primitive) related definition ----------------------*/
1402
1403typedef struct _TDD_msg_buf_T /* Buffer of message container */
1404{
1405 kal_uint8 channel_id; /* Channel ID */
1406 msg_type msg_id; /* Message ID */
1407 kal_uint16 buff_size; /* Buffer size */
1408 local_para_struct* buffer; /* Channel configuration message buffer */
1409} TDD_msg_buf_T;
1410
1411
1412typedef struct _TDD_cphy_msg_container_req_struct
1413{
1414 LOCAL_PARA_HDR
1415 kal_uint8 at_ref; /* Reference channge of activation time.
1416 0 : Ref channel is the released channel.
1417 There should be ch to be released
1418 1 : Ref channel is the setup channel.
1419 There should be ch to be setup. */
1420 /*
1421 meas_control_E meas_control; // Indicate whether TL1 need to not to resume meas. after apply corresponding buffer's config.
1422 kal_int8 idx_intra_freq; // [Range]: 0 ~ 2. Indicate which frequency in the array uarfcn[TDD_MAX_UMTS_FREQ] is intra-frequency, -1 means invalid
1423 */
1424 kal_uint8 rab_domain_field; /* BIT0: CS present,
1425 BIT1: PS present */
1426
1427 kal_int16 rx_cfn; /* Indicate peer message receive cfn. Ex: tti = 4, receive frame number : 0,1,2,3. rx_cfn = 3 (set by tl1)
1428 [Range]: -1 ~ 255.
1429 -1 : Means upper layer internal control
1430 */
1431
1432 kal_uint8 msg_num; /* # of included msg. 1 ~ 4 */
1433 TDD_msg_buf_T msg_buffer[4]; /* List of msg buffer for included channel msg */
1434 /* [R5R6] For HS-DSCH and E-DCH */
1435 kal_uint8 h_msg_num; /* # of included H-msg. 0~2 */
1436 TDD_msg_buf_T h_msg_buffer[2]; /* List of msg buffer for included channel msg */
1437 kal_uint8 e_msg_num; /* # of included E-msg. 0~2 */
1438 TDD_msg_buf_T e_msg_buffer[2]; /* List of msg buffer for included channel msg */
1439
1440// #if defined (__UMTS_R9__) && defined (__AST3002__)
1441 kal_uint8 dmo_msg_num; /* # of included dmo-msg. 0~1 */
1442 TDD_msg_buf_T dmo_msg_buffer[1]; /* List of msg buffer for included channel msg */
1443//#endif
1444
1445} tdd_cphy_msg_container_req_struct;
1446
1447typedef struct _TDD_cphy_abort_req_struct
1448{
1449 LOCAL_PARA_HDR
1450} tdd_cphy_abort_req_struct;
1451
1452typedef struct _TDD_cphy_abort_bch_setup_req_struct
1453{
1454 LOCAL_PARA_HDR
1455} tdd_cphy_abort_bch_setup_req_struct;
1456
1457#if defined (__GEMINI__) && defined (__UMTS_RAT__)
1458typedef struct _TDD_rsvas_tl1_suspend_req_struct
1459{
1460 LOCAL_PARA_HDR
1461} tdd_rsvas_tl1_suspend_req_struct;
1462typedef struct _TDD_rsvas_tl1_resume_req_struct
1463{
1464 LOCAL_PARA_HDR
1465} tdd_rsvas_tl1_resume_req_struct;
1466#endif
1467
1468#ifdef __GEMINI__
1469typedef struct _TDD_cphy_channel_priority_adjustment_req_struct
1470{
1471 LOCAL_PARA_HDR
1472 kal_bool channel_priority_high; /*TRUE: TL1 channel priority is set to high;*/
1473 /*FALSE: TL1 channel priority is set to normal */
1474 kal_int16 act_time; /*-1:active immediately,usually is -1 */
1475 /*only dch modify and handover(R+S),the value is the real AT*/
1476} tdd_cphy_channel_priority_adjustment_req_struct;
1477typedef struct _TDD_urr_tl1_switch_gemini_mode_req_struct
1478{
1479 LOCAL_PARA_HDR
1480 kal_bool is_virtual_mode; /*TRUE: TL1 will switch from normal mode to virtual mode;*/
1481 /*FALSE: TL1 will switch from virtual mode to normal mode */
1482} tdd_urr_tl1_switch_gemini_mode_req_struct;
1483typedef struct _TDD_rsvas_tl1_virtual_resume_req_struct
1484{
1485 LOCAL_PARA_HDR
1486} tdd_rsvas_tl1_virtual_resume_req_struct;
1487typedef struct _TDD_phy_channel_priority_adjustment_req_struct
1488{
1489 LOCAL_PARA_HDR
1490 kal_bool channel_priority_high; /*TRUE: TL1 channel priority is set to high;*/
1491 /*FALSE: TL1 channel priority is set to normal */
1492} tdd_phy_channel_priority_adjustment_req_struct;
1493
1494#endif
1495
1496typedef struct _l4ctl1_get_rf_temperature_req_struct
1497{
1498 LOCAL_PARA_HDR
1499} l4ctl1_get_rf_temperature_req_struct;
1500
1501typedef struct _l4ctl1_get_rf_temperature_cnf_struct
1502{
1503 LOCAL_PARA_HDR
1504 kal_int16 modem_temperature;
1505} l4ctl1_get_rf_temperature_cnf_struct;
1506
1507typedef struct _l4ctl1a_txrx_active_time_req_struct
1508{
1509 LOCAL_PARA_HDR
1510 kal_uint8 src_id;
1511
1512} l4ctl1a_txrx_active_time_req_struct;
1513
1514
1515typedef struct _l4ctl1a_txrx_active_time_cnf_struct
1516{
1517 LOCAL_PARA_HDR
1518 kal_uint8 src_id; // just piggyback the src_id sent by l4cel1_txrx_active_time_req_struct from L4C.
1519 kal_uint32 tx_mode_time_ms[5];
1520 kal_uint32 rx_mode_time_ms;
1521 kal_uint32 txrx_mode_union_time_ms;
1522
1523} l4ctl1a_txrx_active_time_cnf_struct;
1524
1525typedef struct _l4ctl1_em_tst_control_req_struct
1526{
1527 LOCAL_PARA_HDR
1528 kal_uint8 src_id;
1529 TDD_tl1_em_tstcmdtype type;
1530 TDD_tl1_em_tstcmdpara param;
1531} l4ctl1_em_tst_control_req_struct;
1532
1533#if defined (__MML1_ADT_ENABLE__)
1534/*****************************************************************************
1535 TL1 req for ADT Task
1536*****************************************************************************/
1537typedef struct _TDD_tl1_l1adt_enter_connected_req_struct
1538{
1539 LOCAL_PARA_HDR
1540} tdd_tl1_l1adt_enter_connected_req_struct;
1541
1542typedef struct _TDD_tl1_l1adt_leave_connected_req_struct
1543{
1544 LOCAL_PARA_HDR
1545} tdd_tl1_l1adt_leave_connected_req_struct;
1546
1547typedef struct _TDD_tl1_l1adt_enter_tdd_mode_req_struct
1548{
1549 LOCAL_PARA_HDR
1550} tdd_tl1_l1adt_enter_tdd_mode_req_struct;
1551
1552
1553
1554/*****************************************************************************
1555 confirm from ADT Task to TL1
1556*****************************************************************************/
1557typedef struct _TDD_tl1_l1adt_enter_connected_cnf_struct
1558{
1559 LOCAL_PARA_HDR
1560 kal_int32 adt_dl_result;
1561/*
1562{//PASS_DL_(UN)COMPLETE_xxx -> xxx means the current RAT mode
1563 FAIL_OTHER_RAT_IS_CONN,
1564 PASS_DL_COMPLETE_CONN,
1565 PASS_DL_NOT_YET_FINISHED_CONN,
1566 PASS_DL_COMPLETE_IDLE,
1567 PASS_DL_NOT_YET_FINISHED_IDLE,
1568 PASS_STOP_N_RESTART_DL_IDLE,
1569 PASS_START_DL_IDLE
1570}
1571*/
1572} tdd_tl1_l1adt_enter_connected_cnf_struct;
1573
1574typedef struct _TDD_tl1_l1adt_leave_connected_cnf_struct
1575{
1576 LOCAL_PARA_HDR
1577 kal_int32 idle_result;
1578/*
1579{
1580 NORMAL,
1581 ABNORMAL_IDLE,
1582 ABNORMAL_OTHER_CONN
1583}
1584*/
1585} tdd_tl1_l1adt_leave_connected_cnf_struct;
1586
1587typedef struct _TDD_tl1_l1adt_enter_tdd_mode_cnf_struct
1588{
1589 LOCAL_PARA_HDR
1590} tdd_tl1_l1adt_enter_tdd_mode_cnf_struct;
1591
1592/*****************************************************************************
1593 TL1 ind for ADT Task
1594*****************************************************************************/
1595typedef struct _TDD_tl1_l1adt_enter_tdd_mode_ind_struct
1596{
1597 LOCAL_PARA_HDR
1598} tdd_tl1_l1adt_enter_tdd_mode_ind_struct;
1599
1600
1601
1602#endif
1603
1604/*****************************************************************************
1605 confirm & indication from TL1 to L4C
1606*****************************************************************************/
1607typedef struct _l4ctl1_em_tst_control_cnf_struct
1608{
1609 LOCAL_PARA_HDR
1610 kal_uint8 src_id;
1611 kal_bool success;
1612#ifdef __ATERFTX_ERROR_HANDLE_ENHANCE__
1613 ps_cause_enum err_cause;
1614#endif
1615}l4ctl1_em_tst_control_cnf_struct;
1616typedef struct _l4ctl1_em_tx_report_ind_struct
1617{
1618 LOCAL_PARA_HDR
1619 kal_int32 tx_power; //1/8db
1620}l4ctl1_em_tx_report_ind_struct;
1621
1622/*****************************************************************************
1623 confirm & indication from TL1 to SLCE
1624*****************************************************************************/
1625typedef struct _TDD_cphy_bch_setup_cnf_struct
1626{
1627 LOCAL_PARA_HDR
1628} tdd_cphy_bch_setup_cnf_struct;
1629
1630typedef struct _TDD_cphy_bch_setup_ind_struct
1631{
1632 LOCAL_PARA_HDR
1633 kal_bool success; /* Indicate if BCH setup success. For current TL1, it always return true. */
1634} tdd_cphy_bch_setup_ind_struct;
1635
1636typedef struct _TDD_cphy_bch_modify_cnf_struct
1637{
1638 LOCAL_PARA_HDR
1639} tdd_cphy_bch_modify_cnf_struct;
1640
1641typedef struct _TDD_cphy_bch_modify_ind_struct
1642{
1643 LOCAL_PARA_HDR
1644} tdd_cphy_bch_modify_ind_struct;
1645
1646typedef struct _TDD_cphy_bch_release_cnf_struct
1647{
1648 LOCAL_PARA_HDR
1649} tdd_cphy_bch_release_cnf_struct;
1650
1651typedef struct _TDD_cphy_bch_release_ind_struct
1652{
1653 LOCAL_PARA_HDR
1654} tdd_cphy_bch_release_ind_struct;
1655
1656
1657typedef struct _TDD_cphy_sfn_ind_struct
1658{
1659 LOCAL_PARA_HDR
1660 kal_bool success; /*True/False. True: The SFN result is success. The SFN is in the following (tm, off).
1661 False: The SFN reading is failed. The SFN in the following (tm, off) will be ignored.*/
1662 kal_int32 tm; /*[Range]: -1 ~ (6400*8-1). -1 for unknown timing.
1663 [Meaning]:Sub Frame boundary offset between target cell and LST
1664 For a cell with unknown tm value, it can not be issued to TL1. */
1665 kal_int16 off; /*[Range]: -1~8191, (0-8191) for a cell whose Sub SFN offset to LST has been measured by TL1. -1 means off unknown.
1666 [Meaning]: Sub frame number offset between target cell and LST.
1667 For a cell with unknown off value, it can not be issued to TL1. */
1668 kal_uint16 uarfcn; /*uarfcn*/
1669 kal_uint16 cell_param_id; /*[Range]: 0-127, TDD_CPID_INVALID
1670 [Meaning]:Cell parameter ID*/
1671#if defined (__GEMINI__) && defined (__UMTS_RAT__)
1672 TDD_uas_gemini_conflict_cause_enum conflict_cause; /*Channel conflict casue with peer channel*/
1673 kal_uint16 peer_priority_index; /* Channel conflict priority index with peer channel*/
1674#endif
1675} tdd_cphy_sfn_ind_struct;
1676
1677
1678typedef struct _TDD_cphy_t312_expiry_ind_struct
1679{
1680 LOCAL_PARA_HDR
1681 kal_uint8 tid; /* Transaction id */
1682
1683} tdd_cphy_t312_expiry_ind_struct;
1684
1685typedef struct _TDD_cphy_dl_init_sync_ind_struct
1686{
1687 LOCAL_PARA_HDR
1688 kal_uint8 tid; /* Transaction id */
1689 kal_int32 dpch_tm; /* For CFN-SFN TD */
1690 kal_int16 dpch_off; /* For CFN-SFN TD */
1691} tdd_cphy_dl_init_sync_ind_struct;
1692
1693typedef struct _TDD_cphy_rl_failure_ind_struct
1694{
1695 LOCAL_PARA_HDR
1696 kal_bool intrafreq_interference_flag; /* TRUE: Indicate Radio Link Failure is caused by Intra-freq interference */
1697} tdd_cphy_rl_failure_ind_struct;
1698
1699typedef struct _TDD_cphy_frequency_scan_cnf_struct
1700{
1701 LOCAL_PARA_HDR
1702} tdd_cphy_frequency_scan_cnf_struct;
1703
1704typedef struct _TDD_cphy_frequency_scan_ind_struct
1705{
1706 LOCAL_PARA_HDR
1707} tdd_cphy_frequency_scan_ind_struct;
1708
1709typedef struct _TDD_cphy_frequency_scan_suspend_cnf_struct
1710{
1711 LOCAL_PARA_HDR
1712} tdd_cphy_frequency_scan_suspend_cnf_struct;
1713
1714typedef struct _TDD_cphy_frequency_scan_suspend_ind_struct
1715{
1716 LOCAL_PARA_HDR
1717 } tdd_cphy_frequency_scan_suspend_ind_struct;
1718
1719typedef struct _TDD_cphy_frequency_scan_continue_cnf_struct
1720{
1721 LOCAL_PARA_HDR
1722} tdd_cphy_frequency_scan_continue_cnf_struct;
1723
1724
1725typedef struct _TDD_cphy_measurement_config_cell_cnf_struct
1726{
1727 LOCAL_PARA_HDR
1728} tdd_cphy_measurement_config_cell_cnf_struct;
1729
1730
1731
1732typedef struct _TDD_cphy_measurement_cell_ind_struct
1733{
1734 LOCAL_PARA_HDR
1735 kal_uint8 tid; /*Transaction ID to synchronize between request and indication.
1736 Its value will be the same as the 'tid' field used in
1737 CPHY_MEASUREMENT_CONFIG_CELL_REQ. This field is unused for
1738 the frequency scan report.*/
1739 TDD_measured_type_T measured_type; /*Measurement report type: TDD_INTRA_FREQUENCY_MEASURED,
1740 TDD_INTER_FREQUENCY_MEASURED,FREQ _SCAN_DETECTED,TDD_SERVING_ONLY
1741 If UE works in the primary freq, the serving cell measurement is included
1742 in intra-freq measurement report. If it works in the second freq, the serving
1743 cell measurement is included in the inter-freq measurement report.*/
1744 kal_bool iscp_included; /*True: Indicate this message contains the iscp measurement result.
1745 This field is only used for INTRA-FREQUENCY report.*/
1746 kal_bool fs_halt; /*True: Frequency scan procedure is temporary halt. TL1 will wait for
1747 CPHY_FREQSCAN_CONTINUE_REQ. False: Frequency scan procedure
1748 is in progress. It can be set with 'TRUE' when report cell scan result.
1749 This field is only used for frequency scan report. This field is un-used
1750 for the cell measurement report.*/
1751 kal_int16 rssi[TDD_MAX_UMTS_FREQ]; /*indicate the TS0's RSSI of each frequency included in 'measured_cell[]'.
1752 Range: -400 ~ -100 means (-100 ~ -25) dBm 0.25 dB step. The sequence
1753 of frequency RSSI is same with 'measured_cell[]'*/
1754 kal_uint8 num_cell; /*[range]: 0- TDD_MAX_NUM_REPORT_CELL Number of cells reported in this message*/
1755 TDD_measured_cell_T measured_cell[TDD_MAX_NUM_REPORT_CELL]; /*List of measured cells' measurement result. TL1 may report multi-frequency's
1756 measurement result in the same list, It is ascending sort by cell's uarfcn and
1757 cell_param_id. Cells on the same frequency will be collected together.
1758 The cells on different frequencies will not be interleaved.*/
1759 kal_uint8 sinr;
1760 kal_bool evaluate_req;
1761 kal_int8 tx_power;
1762 kal_bool isLongPeriodIn3GStandby; /* [Rel8][ABPCR] For RR, Indicate if it is prio search peiorid*/
1763} tdd_cphy_measurement_cell_ind_struct;
1764
1765
1766
1767typedef struct _TDD_cphy_specific_cell_search_ind_struct
1768{
1769 LOCAL_PARA_HDR
1770 kal_bool success; /* Indicate if search success */
1771 TDD_measured_cell_T measured_cell; /* The found(1) cell */
1772} tdd_cphy_specific_cell_search_ind_struct;
1773
1774typedef struct _TDD_cphy_specific_cell_search_stop_ind_struct
1775{
1776 LOCAL_PARA_HDR
1777} tdd_cphy_specific_cell_search_stop_ind_struct;
1778
1779
1780/*reset&set rat*/
1781typedef struct _TDD_cphy_reset_cnf_struct
1782{
1783 LOCAL_PARA_HDR
1784 kal_bool success; /* Indicate whether the TL1 initialization sucess or fail
1785 'True' - L1 successfully initialize itself.
1786 'False' - L1 fail to initialize itself.
1787 */
1788} tdd_cphy_reset_cnf_struct;
1789
1790
1791typedef struct _TDD_cphy_rf_on_cnf_struct
1792{
1793 LOCAL_PARA_HDR
1794 } tdd_cphy_rf_on_cnf_struct;
1795
1796typedef struct _TDD_cphy_rf_off_cnf_struct
1797{
1798 LOCAL_PARA_HDR
1799} tdd_cphy_rf_off_cnf_struct;
1800
1801typedef struct _TDD_cphy_set_active_rat_cnf_struct
1802{
1803 LOCAL_PARA_HDR
1804} tdd_cphy_set_active_rat_cnf_struct;
1805
1806/*tx status*/
1807typedef struct _TDD_cphy_tx_status_ind_struct
1808{
1809 LOCAL_PARA_HDR
1810 kal_bool is_tx_allow; /* the current TX status
1811 TRUE : Currentlly, TX is available in TL1.
1812 FALSE : Currentlly, TX is not available in TL1. */
1813} tdd_cphy_tx_status_ind_struct;
1814
1815/*gap status*/
1816typedef struct _TDD_cphy_gsm_gap_status_ind_struct
1817{
1818 LOCAL_PARA_HDR
1819 kal_bool is_bsic_gap_valid;
1820
1821} tdd_cphy_gsm_gap_status_ind_struct;
1822
1823/*internal measu*/
1824typedef struct _TDD_cphy_measurement_internal_config_cnf_struct
1825{
1826 LOCAL_PARA_HDR
1827}tdd_cphy_measurement_internal_config_cnf_struct;
1828
1829typedef struct _TDD_cphy_measurement_internal_event_ind_struct
1830{
1831 LOCAL_PARA_HDR
1832 kal_uint8 meas_id; /*[Range] 1-16 Measurement Identity<TS25.331:10.3.7.48>*/
1833 TDD_internal_meas_event_E event_id; /*indicate internal measurement event id*/
1834 TDD_tx_power_info_T tx_power_info; /*The averaged TX power measurement result. It is a filter value with filter
1835 coefficient in 'MEASUREMENT CONTROL' indicated by meas_id.*/
1836 TDD_tadv_info_T tadv_info; /*time advance */
1837} tdd_cphy_measurement_internal_event_ind_struct;
1838
1839typedef struct _TDD_cphy_measurement_internal_periodic_ind_struct
1840{
1841 LOCAL_PARA_HDR
1842 kal_uint8 meas_id; /*[Range] 1-16, Measurement Identity<TS25.331:10.3.7.48>*/
1843 kal_bool last_report; /*True/False. True: Indicate that the 'report_num' is reached,
1844 and no more periodic report will be returned to RRC.*/
1845 TDD_tadv_info_T tadv_info; /*time advance*/
1846 TDD_tx_power_info_T tx_power_info; /*The averaged TX power measurement result.It is a filter value with filter
1847 coefficient in 'MEASUREMENT CONTROL' indicated by meas_id.*/
1848
1849} tdd_cphy_measurement_internal_periodic_ind_struct;
1850
1851
1852typedef struct _TDD_cphy_measurement_internal_result_ind_struct
1853{
1854 LOCAL_PARA_HDR
1855
1856 kal_uint8 meas_id; /*[Range] 0-16, 0 is TDD_MEAS_ID_INVALID.
1857 [Meaning] it is the ¡®Measurement Identity¡¯ same as the request
1858 meas_id in related tdd_cphy_measurement_internal_result_req_struct primitive.
1859 If Tl1 doesn¡¯t contain the meas_id as in tdd_cphy_measurement_internal_result_req_struct,
1860 it will treat the meas_id as 0, and return Tx-Pwr value without filter.*/
1861 kal_int16 sir[TDD_MAX_TIMESLOT_PER_SUBFRAME]; /*[Range]: -28 ...40 means(-14dB - 20dB ) in 0.5 dB step*/
1862 TDD_tx_power_info_T tx_power_info; /*The averaged TX power measurement result.*/
1863 TDD_tadv_info_T tadv_info; /*time advance*/
1864
1865} tdd_cphy_measurement_internal_result_ind_struct;
1866
1867
1868typedef struct _TDD_cphy_measurement_internal_stop_cnf_struct
1869{
1870 LOCAL_PARA_HDR
1871} tdd_cphy_measurement_internal_stop_cnf_struct;
1872
1873
1874
1875
1876/*sniffer*/
1877typedef struct _TDD_cphy_rssi_sniffer_start_cnf_struct
1878{
1879 LOCAL_PARA_HDR
1880} tdd_cphy_rssi_sniffer_start_cnf_struct;
1881
1882
1883typedef struct _TDD_cphy_rssi_sniffer_stop_cnf_struct
1884{
1885 LOCAL_PARA_HDR
1886
1887} tdd_cphy_rssi_sniffer_stop_cnf_struct;
1888
1889
1890
1891typedef struct _TDD_cphy_rssi_sniffer_signal_appear_ind_struct
1892{
1893 LOCAL_PARA_HDR
1894 kal_uint8 num_freq_list; /*Number of freq for scan list of RSSI sniffer */
1895 kal_uint16 uarfcn_list[TDD_MAX_RSSI_SNIFFER_SCAN_LIST]; /* Array of UARFCNs on which cells are found */
1896
1897} tdd_cphy_rssi_sniffer_signal_appear_ind_struct;
1898
1899
1900typedef struct _TDD_cphy_msg_container_cnf_struct
1901{
1902 LOCAL_PARA_HDR
1903
1904} tdd_cphy_msg_container_cnf_struct;
1905
1906typedef struct _TDD_cphy_msg_container_ind_struct
1907{
1908 LOCAL_PARA_HDR
1909 kal_bool success_flag;
1910} tdd_cphy_msg_container_ind_struct;
1911
1912
1913typedef struct _TDD_cphy_abort_cnf_struct
1914{
1915 LOCAL_PARA_HDR
1916 kal_bool success; /* Indicate if abort request success
1917 TRUE : TL1 will back to the old channel configure.
1918 FALSE : TL1 will go forward to the new channel configure.*/
1919} tdd_cphy_abort_cnf_struct;
1920
1921#if defined (__GEMINI__) && defined (__UMTS_RAT__)
1922typedef struct _TDD_rsvas_tl1_suspend_cnf_struct
1923{
1924 LOCAL_PARA_HDR
1925} tdd_rsvas_tl1_suspend_cnf_struct;
1926#endif
1927
1928
1929/*****************************************************************************
1930 request from MAC to TL1
1931*****************************************************************************/
1932typedef struct _TDD_phy_rach_data_req_struct
1933{
1934 LOCAL_PARA_HDR
1935 kal_uint16 tfci; /* TFCI. 0 ~ 1023 */
1936 TDD_ulTrchData TrchInfo; /* UL TrCH information */
1937 kal_uint16 size_data; /* This parameter represents the number of bytes of the buffer. This number will be equal to the size of allocated buffer plus 4 bytes. */
1938 kal_uint8 *data[TDD_MAX_UL_TB]; /* data for each TB. PS shoul allocate the buffer */
1939#ifdef __HSUPA_SUPPORT__
1940 TDD_access_type_E access_type; /*Type of random access, RACH or E-RUCCH.
1941 [Notes]:
1942 #1. Fixed parameters for E-RUCCH:
1943 TrchInfo.trchId = 0, TrchInfo.tb_size = 39(23 + 16), TrchInfo.num_tb = 1,
1944 tfci = 0, size_data = 9(5 + 4).
1945 #2. Data layout:
1946 Padding(1bit) + SNPL(5bits) + UPH(5bits) + TEBS(5bits) + HLBS(4bits) + HLID(4bits) + E-RNTI(16bits)
1947 #3. TL1 shall fill the following parameters:
1948 SNPL, bit6/byte0 ~ bit2/byte0;
1949 UPH, bit1/byte0 ~ bit5/byte1.*/
1950#endif
1951} tdd_phy_rach_data_req_struct;
1952
1953typedef struct _TDD_phy_access_req_struct
1954{
1955 LOCAL_PARA_HDR
1956 kal_bool retry; /*True: RACH transmission failed in the last access procedure,
1957 and TL1 will use the same RACH data and ASC as in the last access procedure.
1958 False: It¡¯s a new RACH procedure. TL1 will apply new RACH data and ASC from MAC.*/
1959 kal_uint8 asc; /*The index value of configured asc array.*/
1960#ifdef __HSUPA_SUPPORT__
1961 TDD_access_type_E access_type; /*Type of random access, RACH or E-RUCCH.*/
1962#endif
1963
1964
1965 TDD_erucch_access_type_E erucch_type; /*ERUCCH type: CELL RESELECTION IND, UL SYNC ORDER, or SI REQUEST*/
1966
1967} tdd_phy_access_req_struct;
1968
1969/*****************************************************************************
1970 indication from TL1 to MAC
1971*****************************************************************************/
1972
1973typedef struct _TDD_phy_pch_setup_ind_struct
1974{
1975 LOCAL_PARA_HDR
1976} tdd_phy_pch_setup_ind_struct;
1977
1978typedef struct _TDD_phy_pch_release_ind_struct
1979{
1980 LOCAL_PARA_HDR
1981} tdd_phy_pch_release_ind_struct;
1982
1983typedef struct _TDD_phy_fach_setup_ind_struct
1984{
1985 LOCAL_PARA_HDR
1986} tdd_phy_fach_setup_ind_struct;
1987
1988
1989typedef struct _TDD_phy_fach_release_ind_struct
1990{
1991 LOCAL_PARA_HDR
1992} tdd_phy_fach_release_ind_struct;
1993
1994typedef struct _TDD_phy_rach_setup_ind_struct
1995{
1996 LOCAL_PARA_HDR
1997} tdd_phy_rach_setup_ind_struct;
1998
1999typedef struct _TDD_phy_rach_release_ind_struct
2000{
2001 LOCAL_PARA_HDR
2002} tdd_phy_rach_release_ind_struct;
2003
2004typedef struct _TDD_phy_dch_setup_ind_struct
2005{
2006 LOCAL_PARA_HDR
2007 TDD_direction_E direction; /* Indicate UL or DL is being setup, 0 : DL , 1 : UL*/
2008 kal_uint16 sfn; /* [Range]: 0 ~4095
2009 [Meaning]: when DL DCH is setup. (Only used for downlink).*/
2010} tdd_phy_dch_setup_ind_struct;
2011
2012typedef struct _TDD_phy_dch_modify_ind_struct
2013{
2014 LOCAL_PARA_HDR
2015 TDD_direction_E direction; /* Indicate UL or DL is being setup, 0 : DL , 1 : UL*/
2016} tdd_phy_dch_modify_ind_struct;
2017
2018typedef struct _TDD_phy_dch_release_ind_struct
2019{
2020 LOCAL_PARA_HDR
2021 TDD_direction_E direction; /* Indicate UL or DL is being setup, 0 : DL , 1 : UL*/
2022 kal_uint16 sfn; /* [Range]: 0 ~4095
2023 [Meaning]: when DL DCH is released. (Only used for downlink).*/
2024} tdd_phy_dch_release_ind_struct;
2025
2026typedef struct _TDD_phy_config_abort_ind_struct
2027{
2028 LOCAL_PARA_HDR
2029 kal_bool success; /* Indicate if abort request success
2030 TRUE : TL1 will back to old channel configure
2031 FALSE : TL1 will go forward to new channel configure*/
2032} tdd_phy_config_abort_ind_struct;
2033
2034typedef struct _TDD_phy_dl_init_sync_ind_struct
2035{
2036 LOCAL_PARA_HDR
2037
2038} tdd_phy_dl_init_sync_ind_struct;
2039
2040
2041typedef struct _TDD_phy_bch_data_ind_struct
2042{
2043 LOCAL_PARA_HDR
2044 kal_uint8 *data; /* Used by PS only. TL1 would assign it as ¡°NULL¡±*/
2045 kal_bool no_path; /* True/False. True: it means TL1 could not find the cell
2046 other parameter should be ignored and protocol should release this BCH channel.
2047 False: This cell has been found */
2048 kal_int32 tm; /* [Range ]: -1 ~ 6400*8-1 , -1 means unknown timing
2049 [Meaning]: Sub Frame boundary offset between target cell and LST*/
2050 kal_int16 off; /* [Range]: -1~8191, -1 for off unknown cell.
2051 [Meaning]: Sub frame number offset between target cell and LST.*/
2052 kal_int16 rx_sfn; /* [Range]: 0 ~4095
2053 [Meaning]: The sfn where the SIB/MIB is received.*/
2054 kal_uint16 uarfcn; /* uarfcn*/
2055 kal_uint16 cell_param_id; /* [Range]: 0-127, TDD_CPID_INVALID
2056 [Meaning]:Cell parameter ID*/
2057 kal_uint8 crc_status; /* 0: crc_error, 1: crc_ok, 2: no_crc*/
2058 kal_int16 rssi; /* [Range]: -400 ~ -100 means (-100 ~ -25) dBm 0.25 dB step.
2059 [Meaning]: TS0¡¯s RSSI.*/
2060 kal_int16 rscp; /* [Range]: -500 ~ -100 means (-125 ~ -25 )dBm in 0.25 dB step
2061 [Meaning]: Serving cell RSCP.*/
2062 kal_bool standby_no_gap; /* True: L1 has no enough gap time for SIB reception */
2063
2064
2065#if defined (__GEMINI__) && defined (__UMTS_RAT__)
2066 TDD_uas_gemini_conflict_cause_enum conflict_cause; /*Channel conflict casue with peer channel*/
2067 kal_uint16 peer_priority_index; /* Channel conflict priority index with peer channel*/
2068#endif
2069} tdd_phy_bch_data_ind_struct;
2070
2071
2072typedef struct _TDD_phy_data_ind_struct
2073{
2074 LOCAL_PARA_HDR
2075 TDD_cctrch_type_E dl_cctrch; /*For PCH, FACH or DCH CCTRCH.*/
2076 kal_uint8 rx_fn; /*0-255.This is the FN of the last frame in the TTI that was received.
2077 When DCH channel is activated, the reported FN is the true DCH CFN.
2078 When DCH channel is not activated, FN is the value of (SFN%256).*/
2079 kal_uint16 rx_sfn;
2080 kal_uint16 uarfcn; /*uarfcn*/
2081 kal_uint16 cell_param_id; /*0-127,Cell parameter ID*/
2082 kal_uint8 num_trch; /*Number of Trch*/
2083 TDD_dlTrchData TrchInfo[TDD_MAX_TRCH_NUM]; /*Downlink TRCH information. When TL1 is configured in Loopback mode 2,
2084 the tb_size specifies the total of data bits and crc bits.*/
2085 kal_uint32 crc; /*The crc result (Pass/Fail) for each TB. A bit 1 represents for "Pass', and 0 for"Fail"*/
2086 kal_uint16 num_data; /*The size in byte of the buffer containing the data. It is the exact size of data,
2087 including the byte for TB number.*/
2088
2089 kal_uint16 EMI_buffer_index; /*MAC allocate this buffer and free this EMI buffer,TL1D provide the buffer index where data stored,and MAC read it and free it*/
2090
2091
2092
2093/*mtk80854, here we do not if 0 *data, because in mac internal code, many *data are used*/
2094/*to convinient coding, we keep *data in 6291, but only used by mac.*/
2095/*need to confirm with L1!!!*/
2096 #ifndef __TL1_UT_TEST__
2097 /*for MT6291, we also use *data pointing to share buffer address*/
2098 kal_uint8 *data; /*The buffer contains data for each TB received in this min TTI. This buffer is allocated
2099 by TL1,and freed by PS. The buffer is from ADM. The first byte in the data indicates the number
2100 of TB in this data indication*/
2101 #else
2102 kal_uint8 data[1000];
2103 #endif
2104 kal_uint32 raw_crc; /*Unmodified CRC for speech decoder */
2105 kal_uint32 s_value[TDD_MAX_TRCH_NUM]; /*Viterbi decoder output S value for speech decoder */
2106 kal_int16 tpc_SIR_lta; /*The measured SIR value of DPCH TPC field. It is TL1D debugging information for speech quality.*/
2107 kal_int16 dpch_SIR_lta; /*The measured SIR value of DPCH pilot field. It is TL1D debugging information for speech quality.*/
2108 kal_int16 TFCI_max_corr; /*The measured correlation value of DPCH TFCI field from TFCI decoder.
2109 It is TL1D debugging information for speech quality.*/
2110#if defined (__GEMINI__) && defined (__UMTS_RAT__)
2111 TDD_uas_gemini_conflict_cause_enum conflict_cause; /*Channel conflict casue with peer channel*/
2112#endif
2113#ifdef __GEMINI__
2114 kal_uint8 rx_suspend; /*It is a bitmap to indicate if some TrCH is conflicted with SIM2 gap.*/
2115 /* The bit is set to "1" only when the TrCH TTI ends in this frame and SIM2 gap exists in this TTI.*/
2116 /* LSB bit is mapped to trchInfo[0].*/
2117#endif
2118//#if defined( __UMTS_R9__ ) && defined ( __AST3002__ )
2119 kal_uint8 meas_occasion_ind;
2120//#endif
2121 kal_int8 pi_repeat_cycle;/* -1:invalid, -2:retransmission with CRC pass, 1~20:valid pi_repeat_cyle */
2122
2123 /* serving cell information for speech debug. */
2124 /* These values are valid only when DCH state and RL exists, otherwise, the value will be "0". */
2125 kal_uint8 RSSI;
2126 kal_uint8 RSCP;
2127 kal_uint8 ECIO;
2128 kal_uint8 HHO_SHO;
2129
2130} tdd_phy_data_ind_struct;
2131
2132typedef struct _tdd_phy_pch_data_ind_struct
2133{
2134 LOCAL_PARA_HDR
2135 TDD_cctrch_type_E dl_cctrch; /*For PCH, FACH or DCH CCTRCH.*/
2136 kal_uint8 rx_fn; /*0-255.This is the FN of the last frame in the TTI that was received.
2137 When DCH channel is activated, the reported FN is the true DCH CFN.
2138 When DCH channel is not activated, FN is the value of (SFN%256).*/
2139 kal_uint16 rx_sfn;
2140 kal_uint16 uarfcn; /*uarfcn*/
2141 kal_uint16 cell_param_id; /*0-127,Cell parameter ID*/
2142 kal_uint8 num_trch; /*Number of Trch*/
2143 TDD_dlTrchData TrchInfo[TDD_MAX_TRCH_NUM]; /*Downlink TRCH information. When TL1 is configured in Loopback mode 2,
2144 the tb_size specifies the total of data bits and crc bits.*/
2145 kal_uint32 crc; /*The crc result (Pass/Fail) for each TB. A bit 1 represents for "Pass', and 0 for"Fail"*/
2146 kal_uint16 num_data; /*The size in byte of the buffer containing the data. It is the exact size of data,
2147 including the byte for TB number.*/
2148
2149 kal_uint16 EMI_buffer_index; /*LUMAC allocate this buffer and LURLC free this EMI buffer,TL1D provide the buffer index where data stored,and MAC read it and handle it*/
2150
2151 #ifndef __TL1_UT_TEST__
2152 kal_uint8 *data; /*The buffer contains data for each TB received in this min TTI. This buffer is allocated
2153 by TL1,and freed by PS. The buffer is from ADM. The first byte in the data indicates the number
2154 of TB in this data indication*/
2155 #else
2156 kal_uint8 data[1000];
2157 #endif
2158 kal_uint32 raw_crc; /*Unmodified CRC for speech decoder */
2159 kal_uint32 s_value[TDD_MAX_TRCH_NUM]; /*Viterbi decoder output S value for speech decoder */
2160 kal_int16 tpc_SIR_lta; /*The measured SIR value of DPCH TPC field. It is TL1D debugging information for speech quality.*/
2161 kal_int16 dpch_SIR_lta; /*The measured SIR value of DPCH pilot field. It is TL1D debugging information for speech quality.*/
2162 kal_int16 TFCI_max_corr; /*The measured correlation value of DPCH TFCI field from TFCI decoder.
2163 It is TL1D debugging information for speech quality.*/
2164#if defined (__GEMINI__) && defined (__UMTS_RAT__)
2165 TDD_uas_gemini_conflict_cause_enum conflict_cause; /*Channel conflict casue with peer channel*/
2166#endif
2167#ifdef __GEMINI__
2168 kal_uint8 rx_suspend; /*It is a bitmap to indicate if some TrCH is conflicted with SIM2 gap.*/
2169 /* The bit is set to "1" only when the TrCH TTI ends in this frame and SIM2 gap exists in this TTI.*/
2170 /* LSB bit is mapped to trchInfo[0].*/
2171#endif
2172//#if defined( __UMTS_R9__ ) && defined ( __AST3002__ )
2173 kal_uint8 meas_occasion_ind;
2174//#endif
2175 kal_int8 pi_repeat_cycle;/* -1:invalid, -2:retransmission with CRC pass, 1~20:valid pi_repeat_cyle */
2176
2177 /* serving cell information for speech debug. */
2178 /* These values are valid only when DCH state and RL exists, otherwise, the value will be "0". */
2179 kal_uint8 RSSI;
2180 kal_uint8 RSCP;
2181 kal_uint8 ECIO;
2182 kal_uint8 HHO_SHO;
2183}tdd_phy_pch_data_ind_struct;
2184typedef struct _TDD_phy_access_ind_struct
2185{
2186 LOCAL_PARA_HDR
2187 TDD_access_status_E access_status; /* The result of RACH access */
2188#ifdef __HSUPA_SUPPORT__
2189 TDD_access_type_E access_type; /*Type of random access, RACH or E-RUCCH.*/
2190#endif
2191
2192
2193 TDD_erucch_access_type_E erucch_type; /*ERUCCH type: CELL RESELECTION IND, UL SYNC ORDER, or SI REQUEST*/
2194
2195} tdd_phy_access_ind_struct;
2196
2197
2198typedef struct _TDD_phy_post_tx_ind_struct
2199{
2200 LOCAL_PARA_HDR
2201
2202 TDD_post_tx_type_E post_tx_type;
2203 kal_uint8 cfn;
2204#ifdef __GEMINI__
2205 kal_bool is_tx_suspend; /*It indicates if there is SIM2 gap in the minTTI period of the released ul data. For RACH, this flag is always false*/
2206#endif
2207} tdd_phy_post_tx_ind_struct;
2208
2209
2210typedef struct _TDD_phy_end_dch_tx_ind_struct
2211{
2212 LOCAL_PARA_HDR
2213
2214 kal_uint8 cfn; /*When MAC receives PHY_END_DCH_TX_IND, it's possible that time has
2215 passed more than one TTI. So give this cfn value for MAC to handle
2216 remaining things at the right CFN*/
2217
2218} tdd_phy_end_dch_tx_ind_struct;
2219
2220
2221typedef struct _TDD_cphy_measurement_config_idle_interval_cnf_struct
2222{
2223 LOCAL_PARA_HDR
2224} tdd_cphy_measurement_config_idle_interval_cnf_struct;
2225
2226
2227
2228typedef struct _TDD_phy_erucch_access_ind_struct
2229{
2230 LOCAL_PARA_HDR
2231 TDD_erucch_access_type_E access_type; /*the type of TL1 triggerring ERUCCH Procedure,
2232 TDD_UL_SYNC_ORDER or TDD_CELL_RESELECTION_IND*/
2233}tdd_phy_erucch_access_ind_struct;
2234
2235
2236typedef struct _TDD_phy_hsdsch_data_ind_struct
2237{
2238 LOCAL_PARA_HDR
2239 kal_uint16 sub_cfn; /*[Range]: 0-511.*/
2240 kal_uint8 config_operation; /*Bit 0: HS-DSCH setup; Bit1: HS-DSCH release; Bit 2: HS-DSCH modify*/
2241 kal_bool mac_hs_reset; /*When TL1 does MAC-hs reset , the flag is set to tell MAC (it is also needed in
2242 setup and release cases, not only for modify indication)*/
2243 kal_uint8 size_info_modified; /*Bitmask of maximum 8 MAC-hs queues, with size info list modified
2244 Bit 0: queue_id = 0; Bit 1: queue_id = 1; ¡­;Bit 7: quque_id = 7*/
2245 TDD_hsdsch_data_T hsdsch_data; /*The received MAC-hs data descriptor*/
2246#ifdef __GEMINI__
2247 kal_bool is_rx_suspend; /*It indicates if there is SIM2 gap in the TTI receiving dsch data*/
2248#endif
2249//#if defined( __UMTS_R9__ ) && defined ( __AST3002__ )
2250 kal_uint8 meas_occasion_ind; /*bit0 indicates whether it is in DCH measurement occasion;
2251 bit1 indicates whether it is in idle interval for E-UTRA Measurement.*/
2252//#endif
2253} tdd_phy_hsdsch_data_ind_struct;
2254
2255#ifdef __HSUPA_SUPPORT__
2256
2257typedef struct _TDD_phy_end_edch_tx_ind_struct
2258{
2259 LOCAL_PARA_HDR
2260 kal_uint16 sub_cfn; /*[Range]: 0-511.*/
2261
2262
2263 kal_uint8 harq_id; /*[Range]: 0~7 [Meaning]: Harq process id.*/
2264} tdd_phy_end_edch_tx_ind_struct;
2265#endif
2266
2267#if defined(TL1_SIM)
2268kal_bool tl1_active_time_difference();
2269
2270/*------------------- Function prototype -----------------------------*/
2271/* TL1 provides this function to other entities to get current CFN & SFN
2272 CFN : -1 ~ 255. 0 ~ 255 if UE in DCH/FACH mode otherwise -1
2273 SFN : -1 ~ 4095. 0 ~ 4095 for the base station frame number. -1 for an invalid value.*/
2274void TL1_GetCurrentTime(kal_int16 *cfn, kal_int16 *sfn);
2275#endif
2276
2277//extern kal_bool Tl1_FreeDataBuf(kal_uint8 type, kal_uint8* rel_buffer_ptr);
2278
2279typedef struct _TDD_tl1_data_buf_info_T
2280{
2281 kal_uint8 min_left_data_buffers;
2282 kal_uint8 min_left_hsdsch_buffers;
2283}TDD_tl1_data_buf_info_T;
2284
2285//extern void TL1_GetDataBufInfo(tl1_data_buf_info_T *tl1_data_buf_info_ptr);
2286
2287#if 0 //no used in U3G
2288/* under construction !*/
2289/* under construction !*/
2290/* under construction !*/
2291/* under construction !*/
2292/* under construction !*/
2293/* under construction !*/
2294/* under construction !*/
2295/* under construction !*/
2296/* under construction !*/
2297/* under construction !*/
2298/* under construction !*/
2299/* under construction !*/
2300/* under construction !*/
2301/* under construction !*/
2302/* under construction !*/
2303/* under construction !*/
2304/* under construction !*/
2305/* under construction !*/
2306#endif
2307
2308//#if defined (__UMAC_DCH_LISR__) || defined (__HSUPA_SUPPORT__)
2309typedef void (*TDD_pul_inform_MAC)(void *data);
2310//#endif
2311
2312
2313//#ifndef __UMAC_DCH_LISR__
2314//extern void UMAC_UL_DCH_Tick(TDD_uldch_data_req_T * uldch_data_req);
2315//extern void UMAC_UL_DCH_Tick_End(kal_bool tx_suspend,TDD_tx_enable_type_E tx_enable,TDD_uldch_data_ind_T * uldch_data_ind);
2316//#else
2317//extern void TDD_TL1D_L2PutHISRDCHQueue(TDD_pul_inform_MAC func, void *data);
2318//#endif
2319
2320//extern void TDD_ul_inform_MAC(kal_uint8 cfn);
2321
2322//extern void TDD_ul_dpch_power(kal_uint8 cfn, kal_uint8 tfc_status[TDD_MAX_UL_TFC]);
2323
2324//extern TDD_uldch_data_ind_T* TDD_UMAC_UL_DCH_Tick_Low_Lisr(TDD_uldch_data_req_T * uldch_data_req);
2325//extern void TL1_OTD_Calculation(kal_int16 off_s, kal_int16 off_n,
2326// kal_int32 tm_ec_s, kal_int32 tm_ec_n,
2327// kal_int16 *off_opt, kal_int32 *tm_ec_opt);
2328
2329//extern kal_int8 TL1_SelectSyncUlFpach(kal_uint8 *sync_ul_bitmap, kal_int8 num_fpach); /*Return index of FPACH in FPACH set.*/
2330
2331//extern void TDD_mac_hs_get_pdu_buffer(kal_uint8 **buffer_ptr, kal_uint16 size);
2332
2333//extern void TDD_try_to_trigger_CSR_STATUS_IND_LISR(kal_uint8 cfn);
2334//extern void TDD_TL1D_L2PutHISRCsrQueue(TDD_pul_inform_MAC func, void *data);
2335
2336
2337//extern void mac_hs_get_variable_pdu_buffer(kal_uint8 **buffer_ptr, kal_uint32 num);
2338/*hs pdu buffer free shall only be invoked by UMAC, so no extern here */
2339#if 0
2340/* under construction !*/
2341/* under construction !*/
2342/* under construction !*/
2343#endif
2344
2345//extern void mac_r4_get_variable_pdu_buffer(kal_uint8 **buffer_ptr, kal_uint32 num);
2346extern void lumac_pch_get_variable_pdu_buffer(kal_uint8 **ppBuffer, kal_uint32 num);//interface to L1
2347
2348
2349#ifdef __HSUPA_SUPPORT__
2350/* Data path interface from TL1D, LISR / HISR / Task not decided yet */
2351//extern etfc_eval_info_ind_T* umac_e_dch_tick_1(etfc_eval_info_req_T *etfc_eval_input);
2352
2353//extern edch_data_ind_T* umac_e_dch_tick_2(edch_data_req_T *edch_data_input);
2354
2355//extern void umac_e_dch_tick_3(kal_uint8 harq_id, tdd128_modulation_E modulation);
2356
2357//extern void umac_e_dch_tick_4(void); /*for MTK in-hourse project only*/
2358
2359//extern void ul_inform_Edch_MAC(void *data);
2360
2361//extern void TL1D_L2PutHISRQueue(pul_inform_MAC func, void *data);
2362
2363/*TL1 return the Non-Scheduled Tx TTIs in the specified extended estimation window.*/
2364//extern kal_uint8 tl1_eval_ext_est_wnd(kal_uint8 ext_est_wnd);
2365#endif
2366
2367/*****************************************************************************
2368 UMAC UT SIMULATE MESSAGE
2369*****************************************************************************/
2370
2371#if 0
2372/* under construction !*/
2373/* under construction !*/
2374/* under construction !*/
2375/* under construction !*/
2376/* under construction !*/
2377/* under construction !*/
2378/* under construction !*/
2379/* under construction !*/
2380#endif
2381
2382typedef struct
2383{
2384 kal_uint8 ref_count;
2385 kal_uint16 msg_len;
2386
2387 kal_uint8 cfn;
2388 kal_uint8 ul_mac_event; /* bit 0: UL DCH setup, */
2389 /* bit 1: UL DCH release, */
2390 /* bit 2: UL DCH modify */
2391 TDD_tx_enable_type_E tx_enable; /* set true if TX data could be sent (min TTI) */
2392 kal_bool tx_suspend;
2393 kal_uint8 tfc_status[TDD_MAX_UL_TFC];
2394 kal_uint8 meas_occasion_ind;
2395}tdd_phy_simulate_dch_ul_cctrch_lisr_struct;
2396
2397#if 0
2398/* under construction !*/
2399/* under construction !*/
2400/* under construction !*/
2401/* under construction !*/
2402/* under construction !*/
2403/* under construction !*/
2404/* under construction !*/
2405/* under construction !*/
2406/* under construction !*/
2407/* under construction !*/
2408/* under construction !*/
2409/* under construction !*/
2410/* under construction !*/
2411/* under construction !*/
2412#endif
2413
2414#if 0
2415/* under construction !*/
2416/* under construction !*/
2417/* under construction !*/
2418/* under construction !*/
2419/* under construction !*/
2420/* under construction !*/
2421/* under construction !*/
2422/* under construction !*/
2423/* under construction !*/
2424/* under construction !*/
2425/* under construction !*/
2426/* under construction !*/
2427/* under construction !*/
2428/* under construction !*/
2429#endif
2430
2431typedef struct
2432/*UMAC*/{
2433/*UMAC*/ kal_uint8 ref_count;
2434/*UMAC*/ kal_uint16 msg_len;
2435/*UMAC*/
2436/*UMAC*/ kal_uint8 cfn;
2437/*UMAC*/ kal_uint8 num_trch;
2438/*UMAC*/ TDD_ulTrchData trchInfo[TDD_MAX_TRCH_NUM];
2439/*UMAC*/ kal_uint16 tfci;
2440/*UMAC*/ kal_uint16 num_data[TDD_MAX_TRCH_NUM];
2441/*UMAC*/ kal_uint8 *data[TDD_MAX_TRCH_NUM];
2442}tdd_phy_simulate_dch_ul_cctrch_lisr_rsp_struct;
2443
2444#if 0
2445/* under construction !*/
2446/* under construction !*/
2447/* under construction !*/
2448/* under construction !*/
2449/* under construction !*/
2450/* under construction !*/
2451/* under construction !*/
2452/* under construction !*/
2453/* under construction !*/
2454/* under construction !*/
2455/* under construction !*/
2456/* under construction !*/
2457/* under construction !*/
2458#endif
2459
2460#if 0
2461/* under construction !*/
2462/* under construction !*/
2463/* under construction !*/
2464/* under construction !*/
2465/* under construction !*/
2466/* under construction !*/
2467#endif
2468
2469#if 0
2470/* under construction !*/
2471/* under construction !*/
2472/* under construction !*/
2473/* under construction !*/
2474/* under construction !*/
2475/* under construction !*/
2476/* under construction !*/
2477/* under construction !*/
2478/* under construction !*/
2479/* under construction !*/
2480/* under construction !*/
2481/* under construction !*/
2482/* under construction !*/
2483#endif
2484
2485#if 0
2486/* under construction !*/
2487/* under construction !*/
2488/* under construction !*/
2489/* under construction !*/
2490/* under construction !*/
2491#endif
2492
2493#if 0
2494/* under construction !*/
2495/* under construction !*/
2496/* under construction !*/
2497/* under construction !*/
2498/* under construction !*/
2499/* under construction !*/
2500/* under construction !*/
2501/* under construction !*/
2502/* under construction !*/
2503/* under construction !*/
2504/* under construction !*/
2505#endif
2506
2507#if 0
2508/* under construction !*/
2509/* under construction !*/
2510/* under construction !*/
2511/* under construction !*/
2512/* under construction !*/
2513/* under construction !*/
2514/* under construction !*/
2515/* under construction !*/
2516/* under construction !*/
2517/* under construction !*/
2518/* under construction !*/
2519/* under construction !*/
2520/* under construction !*/
2521/* under construction !*/
2522#endif
2523
2524#ifdef __HSUPA_SUPPORT__
2525typedef struct
2526{
2527 kal_uint8 ref_count;
2528 kal_uint16 msg_len;
2529
2530 TDD_etfc_eval_info_req_T etfc_eval_input;
2531}tdd_phy_simulate_umac_e_dch_tick_1_struct;
2532
2533
2534typedef struct
2535{
2536 kal_uint8 ref_count;
2537 kal_uint16 msg_len;
2538
2539 TDD_etfc_eval_info_ind_T etfc_eval_info_ind;
2540}tdd_phy_simulate_umac_e_dch_tick_1_rsp_struct;
2541
2542
2543typedef struct
2544{
2545 kal_uint8 ref_count;
2546 kal_uint16 msg_len;
2547
2548 TDD_edch_data_req_T edch_data_input;
2549}tdd_phy_simulate_umac_e_dch_tick_2_struct;
2550
2551
2552typedef struct
2553{
2554 kal_uint8 ref_count;
2555 kal_uint16 msg_len;
2556
2557 TDD_edch_data_ind_T edch_data_ind;
2558}tdd_phy_simulate_umac_e_dch_tick_2_rsp_struct;
2559
2560typedef struct
2561{
2562 kal_uint8 ref_count;
2563 kal_uint16 msg_len;
2564
2565 kal_uint8 harq_id;
2566 TDD_tdd128_modulation_E modulation;
2567}tdd_phy_simulate_umac_e_dch_tick_3_struct;
2568#endif
2569
2570/*****************************************************************************
2571 MSC Composer
2572*****************************************************************************/
2573/* The following definition is used only for MSC composer. */
2574typedef union _TDD_local_para_unpack_T
2575{
2576 tdd_cphy_pch_setup_req_struct cphy_pch_setup_req;
2577 tdd_cphy_pch_modify_req_struct cphy_pch_modify_req;
2578 tdd_cphy_pch_release_req_struct cphy_pch_release_req;
2579 tdd_cphy_fach_setup_req_struct cphy_fach_setup_req;
2580 tdd_cphy_fach_release_req_struct cphy_fach_release_req;
2581 tdd_cphy_dch_setup_req_struct cphy_dch_setup_req;
2582 tdd_cphy_dch_modify_req_struct cphy_dch_modify_req;
2583 tdd_cphy_dch_release_req_struct cphy_dch_release_req;
2584 tdd_cphy_rach_setup_req_struct cphy_rach_setup_req;
2585 tdd_cphy_rach_release_req_struct cphy_rach_release_req;
2586 tdd_cphy_hsdsch_setup_req_struct cphy_hsdsch_setup_req;
2587 tdd_cphy_hsdsch_modify_req_struct cphy_hsdsch_modify_req;
2588 tdd_cphy_hsdsch_release_req_struct cphy_hsdsch_release_req;
2589#ifdef __HSUPA_SUPPORT__
2590 tdd_cphy_edch_setup_req_struct cphy_edch_setup_req;
2591 tdd_cphy_edch_modify_req_struct cphy_edch_modify_req;
2592 tdd_cphy_edch_release_req_struct cphy_edch_release_req;
2593#endif
2594 tdd_cphy_measurement_config_dmo_req_struct cphy_measurement_config_dmo_req;
2595} TDD_local_para_unpack_T;
2596
2597typedef struct _TDD_msg_buf_unpack_T /* Buffer of message container */
2598{
2599 kal_uint8 channel_id; /* Channel ID */
2600 msg_type msg_id; /* Message ID */
2601 kal_uint16 buff_size; /* Buffer size */
2602 TDD_local_para_unpack_T buffer; /* Channel configuration message buffer */
2603} TDD_msg_buf_unpack_T;
2604
2605typedef struct _TDD_cphy_msg_container_req_unpack_struct
2606{
2607 LOCAL_PARA_HDR
2608 kal_uint8 at_ref; /* Reference channge of activation time.
2609 0 : Ref channel is the released channel.
2610 There should be ch to be released
2611 1 : Ref channel is the setup channel.
2612 There should be ch to be setup.*/
2613
2614 /*
2615 meas_control_E meas_control; // Indicate whether TL1 need to not to resume meas. after apply corresponding buffer's config.
2616 kal_int8 idx_intra_freq; // [Range]: 0 ~ 2. Indicate which frequency in the array uarfcn[TDD_MAX_UMTS_FREQ] is intra-frequency, -1 means invalid
2617 */
2618 kal_uint8 rab_domain_field; /* BIT0: CS present,
2619 BIT1: PS present */
2620
2621 kal_int16 rx_cfn; /* Indicate peer message receive cfn. Ex: tti = 4, receive frame number : 0,1,2,3. rx_cfn = 3 (set by tl1)
2622 [Range]: -1 ~ 255.
2623 -1 : Means upper layer internal control
2624 */
2625
2626 kal_uint8 msg_num; /* # of included msg. 1 ~ 4 */
2627 TDD_msg_buf_unpack_T msg_buffer[4]; /* List of msg buffer for included channel msg */
2628
2629 /* [R5R6] For HS-DSCH and E-DCH */
2630 kal_uint8 h_msg_num; /* # of included H-msg. 0~2 */
2631 TDD_msg_buf_unpack_T h_msg_buffer[2]; /* List of msg buffer for included channel msg */
2632 kal_uint8 e_msg_num; /* # of included E-msg. 0~2 */
2633 TDD_msg_buf_unpack_T e_msg_buffer[2]; /* List of msg buffer for included channel msg */
2634//#if defined( __UMTS_R9__ ) && defined ( __AST3002__ )
2635 kal_uint8 dmo_msg_num; /* # of included dmo-msg. 0~1 */
2636 TDD_msg_buf_unpack_T dmo_msg_buffer[1]; /* List of msg buffer for included channel msg */
2637 //#endif
2638
2639} tdd_cphy_msg_container_req_unpack_struct;
2640
2641typedef struct _TDD_cphy_channel_quality_status_ind_struct
2642{
2643 LOCAL_PARA_HDR
2644 kal_bool is_triggered;
2645} tdd_cphy_channel_quality_status_ind_struct;
2646
2647//add for TDD SAR
2648#if 1 //__TDD_TX_PWR_REDUCE__
2649typedef struct _tl1_umts_max_tx_pwr_red_req_struct
2650{
2651 LOCAL_PARA_HDR
2652 kal_bool valid;
2653 kal_uint8 umts_power_reduction_in_edb[20][2];
2654 /*SAR_BAND_UMTS_TDSCDMA_A_BAND_2010 = 21; [0][0],[0][1] (first for no upa or dpa, second for upa or dpa)
2655 SAR_BAND_UMTS_TDSCDMA_F_BAND_1880 = 22; [1][0],[1][1]
2656 SAR_BAND_UMTS_TDSCDMA_E_BAND_2300 = 23; [2][0],[2][1]
2657 SAR_BAND_UMTS_TDSCDMA_A_BAND_1900 = 24; [3][0],[3][1]
2658 SAR_BAND_UMTS_TDSCDMA_B_BAND_1850 = 25; [4][0],[4][1]
2659 SAR_BAND_UMTS_TDSCDMA_C_BAND_1910 = 27; [5][0],[5][1]
2660 SAR_BAND_UMTS_TDSCDMA_D_BAND_2570 = 28; [6][0],[6][1]*/
2661
2662/* add power reduction value for ANT1 (op=9/10).
2663* when user only specify one set of values by using op=1/3, L4C help copy parameters from umts_power_reduction_in_edb[] to umts_power_reduction_in_edb_ANT1[]*/
2664 kal_uint8 umts_power_reduction_in_edb_tas[20][2/*Service*/];
2665
2666}tl1_umts_max_tx_pwr_red_req_struct;
2667#endif
2668
2669#ifdef __RF_SCAN_FOR_DESENSE_TEST__
2670typedef struct _l4ctl1_rssi_measurement_ind_struct
2671{
2672 LOCAL_PARA_HDR
2673 kal_int32 rssi1;
2674 kal_int32 rssi0;
2675}l4ctl1_rssi_measurement_ind_struct;
2676#else
2677typedef struct _l4ctl1_rssi_measurement_ind_struct
2678{
2679 LOCAL_PARA_HDR
2680 kal_int32 rssi_edBm;
2681}l4ctl1_rssi_measurement_ind_struct;
2682#endif
2683
2684
2685typedef struct _tdd_cphy_duplex_mode_change_req_struct
2686{
2687 LOCAL_PARA_HDR
2688 TDD_duplex_mode_info_T duplex_mode_info;
2689} tdd_cphy_duplex_mode_change_req_struct;
2690
2691typedef struct _tdd_cphy_duplex_mode_change_cnf_struct
2692{
2693 LOCAL_PARA_HDR
2694 kal_bool result;
2695} tdd_cphy_duplex_mode_change_cnf_struct;
2696
2697//251 = 63360*4 +128+64+2*128 BYTE=32128 *8(MAX HARE)=251K
2698//126 =253440*4+8*2*16*64=1030144bit/8=128768byte/1024=125.8K ALIGN 128 BYTE
2699//#define HARQ_BUFFER_MAX_SIZE_DEFINE (69632) //move to td_dpa.h
2700
2701//TL1 AND MAC SHARE RX data buffer define
2702
2703/*Weimin. Same as TDD_gRxPchBuffQueueSize, TDD_MAX_MAC_PCH_PDU_NUM in tl1_cnst.h*/
2704#define DL_PCH_DATA_BUF_NUM 2
2705#define DL_DCH_DATA_BUF_NUM 8
2706#define HSDSCH_DATA_BUF_NUM 12
2707#define DL_DCH_BUF_SIZE 1472 //10240/8+32*2+32*4=1472
2708#define HSDSCH_DATA_BUF_SIZE 1860 //14043/8+45*2=1846
2709
2710/*//////////////////////////////////////below - interface for MT6291////////////////////////*/
2711typedef struct __MAC_TO_TL1_RX_BUF_T_
2712{
2713 kal_uint32 EmiBufFlag; //when MAC fill one avaliable EMI buf, set to true, and TL1 can configure this buffer to RXBRP
2714 //when TL1 configure this buffer to RXBRP, set to false
2715 //kal_uint32 EmiBufIndex; //MAC use, no need any more
2716 kal_uint32 EmiBufAdress; //TL1 use
2717 kal_uint32 padding; //reserved
2718}MAC_TO_TL1_RX_BUF_T;
2719
2720//TDSCDMA SLT Status
2721#if defined(__IC_SLT__)
2722#define TDSCDMA_SLT_DONE_PATTERN 0x3535
2723#define TDSCDMA_SLT_SUCCESS_PATTERN 0xF7F7
2724typedef struct _TL1_SLT_CC_INFO_T_
2725{
2726 kal_uint16 tl1SltDonePattern;
2727 kal_uint16 tl1SltResult;
2728
2729 kal_uint8 rxFinalStatus;
2730 kal_uint8 txResult;
2731 kal_uint16 duration; //ms
2732
2733}TL1_SLT_CC_INFO_T;
2734#endif
2735
2736/*move to tl1_cnst.h*/
2737#if 0
2738/* under construction !*/
2739/* under construction !*/
2740#endif
2741
2742/*add include file to share a defined varialbe -- dose not work*/
2743//@2014/12/11, set tick2_output->data non-shared memory
2744#if 0
2745/* under construction !*/
2746/* under construction !*/
2747/* under construction !*/
2748#endif
2749typedef struct __MAC_TO_TL1_EDCH_BUF_T__
2750{
2751 kal_uint32 TDD_gMACeiPDU[TDD_MAX_NUM_OF_EDCH_HARQ_PROCESS][TDD_MAC_E_PDU_MEMORY_SIZE / 4];
2752}MAC_TO_TL1_EDCH_BUF_T;
2753
2754
2755/*move to tl1_cnst.h*/
2756#if 0
2757/* under construction !*/
2758/* under construction !*/
2759/* under construction !*/
2760/* under construction !*/
2761/* under construction !*/
2762/* under construction !*/
2763/* under construction !*/
2764/* under construction !*/
2765/* under construction !*/
2766/* under construction !*/
2767/* under construction !*/
2768/* under construction !*/
2769/* under construction !*/
2770#endif
2771
2772typedef struct _MAC_HS_Pdu_Buf_T_
2773{
2774 kal_uint8 tMacHsPduBufferArray[TDD_MAX_MAC_HS_PDU_NUM][TDD_mBYTE_SIZE_TO_32_BYTE_ALIGN_INC(TDD_MAX_HS_PDU_SIZE_IN_BYTES + TDD_DL_ADR_OFFSET)];
2775}MAC_HS_Pdu_Buf_T;
2776
2777/*move to tl1_cnst.h*/
2778#if 0
2779/* under construction !*/
2780/* under construction !*/
2781#endif
2782
2783typedef struct _MAC_R4_Pdu_Buf_T
2784{
2785 kal_uint8 tMacR4PduBufferArray[TDD_MAX_MAC_DCH_PDU_NUM][TDD_MAX_MAC_DCH_PDU_SIZE];
2786}MAC_R4_Pdu_Buf_T;
2787
2788typedef struct _MAC_Pch_Pdu_Buf_T
2789{
2790 kal_uint8 tMacPchPduBufferArray[TDD_MAX_MAC_PCH_PDU_NUM][TDD_MAX_MAC_PCH_PDU_SIZE];
2791}MAC_Pch_Pdu_Buf_T;
2792
2793typedef struct _MAC_Pch_Pdus_Buf_T
2794{
2795 kal_uint8 tMacPchPdusBufferArray[TDD_MAX_MAC_PCH_PDU_NUM*TDD_MAX_MAC_PCH_PDU_SIZE];
2796}MAC_Pch_Pdus_Buf_T;
2797
2798
2799//TL1 and MAC cross core IRQ trigger Type define
2800typedef enum _TL1_and_MAC_IRQ_TYPE_T
2801{
2802 //TL1_TO_MAC_IRQ_TYPE
2803 TL1_EDCH_TICK1_START_TRIGGER = 0x1000,
2804 TL1_EDCH_TICK2_START_TRIGGER,
2805 TL1_UL_DCH_TICK_START_TRIGGER,
2806 TL1_UL_DCH_PREPARE_TX_AHEAD_TRIGGER,
2807 TL1_PHY_HSDSCH_DATA_IND_TRIGGER,
2808 //MAC_TO_TL1_IRQ_TYPE
2809 MAC_EDCH_TICK1_END_TRIGGER = 0x2000,
2810 MAC_EDCH_TICK2_END_TRIGGER,
2811 MAC_UL_DCH_TICK_END_TRIGGER
2812} TL1_and_MAC_IRQ_TYPE_T;
2813//****************interface for 6291 between UMAC & TL1 END**********************//
2814
2815typedef struct _cphy_list_mode_cnf_struct
2816{
2817 LOCAL_PARA_HDR
2818} cphy_list_mode_cnf_struct;
2819
2820
2821typedef struct _T_L1CASE_TX_CHECKSUM_IND
2822{
2823 kal_uint32 CrpChkSum[16];
2824 kal_uint32 BrpRU1ChkSum[16];
2825 kal_uint32 BrpRU2ChkSum[16];
2826}T_L1CASE_TX_CHECKSUM_IND;
2827typedef struct _T_L1CASE_TXTFCI
2828{
2829 kal_uint16 tfci[16];
2830}T_L1CASE_TXTFCI;
2831#ifdef __HSUPA_SUPPORT__
2832typedef struct _fta_edch_tick_1_output_para_T
2833{
2834 kal_bool is_user_data_available;
2835}fta_edch_tick_1_output_para_T;
2836
2837typedef struct _fta_edch_tick_retx_set_T
2838{
2839 kal_uint8 sched_retx_harq_num;
2840 kal_uint8 sched_retx_harq_id[4];
2841 kal_uint8 non_sched_retx_harq_num;
2842 kal_uint8 non_sched_retx_harq_id[4];
2843}fta_edch_tick_retx_set_T;
2844
2845typedef struct _fta_edch_tick_newtx_set_T
2846{
2847 kal_uint8 sched_newtx_harq_num;
2848 kal_uint8 sched_newtx_harq_id[4];
2849 kal_uint8 non_sched_newtx_harq_num;
2850 kal_uint8 non_sched_newtx_harq_id[4];
2851}fta_edch_tick_newtx_set_T;
2852
2853typedef struct _fta_edch_case_ctrl_para_T
2854{
2855 kal_bool stub_use_case_set;
2856 kal_bool use_case_set;
2857 kal_uint8 twait_timeout;
2858 kal_uint8 etfci;
2859 kal_uint16 data_size;
2860 TDD_tdd128_modulation_E modulation;
2861 fta_edch_tick_1_output_para_T tick_1_output;
2862 fta_edch_tick_retx_set_T tick_retx_set;
2863 fta_edch_tick_newtx_set_T tick_newtx_set;
2864}fta_edch_case_ctrl_para_T;
2865#endif
2866
2867typedef struct _tl1test_init_req_struct
2868{
2869 LOCAL_PARA_HDR
2870}tl1test_init_req_struct;
2871
2872typedef enum _tl1test_ul_msgid_T
2873{
2874 TL1TEST_SET_TFCI,
2875 TL1TEST_GET_CHECKSUM,
2876 TL1TEST_EDCH_PARAM,
2877}tl1test_ul_msgid_T;
2878typedef struct _tl1test_ul_param_req_struct
2879{
2880 LOCAL_PARA_HDR
2881 tl1test_ul_msgid_T msgid;
2882 T_L1CASE_TXTFCI tfci;
2883#ifdef __HSUPA_SUPPORT__
2884 fta_edch_case_ctrl_para_T edch_param;
2885#endif
2886}tl1test_ul_param_req_struct;
2887typedef struct _tl1test_ul_info_ind_struct
2888{
2889 LOCAL_PARA_HDR
2890 tl1test_ul_msgid_T msgid;
2891
2892 T_L1CASE_TX_CHECKSUM_IND checksum;
2893}tl1test_ul_info_ind_struct;
2894
2895#endif