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192.168.1.100 / T800_MD_V1.6 / c33b3079c38f91561c2f84f1ebed20ad8c60532a / . / mcu / interface / l1 / ul1 / external / wdata.h
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yu.dongc33b3072024-08-21 23:14:49 -0700[diff] [blame^]1/*****************************************************************************
2* Copyright Statement:
3* --------------------
4* This software is protected by Copyright and the information contained
5* herein is confidential. The software may not be copied and the information
6* contained herein may not be used or disclosed except with the written
7* permission of MediaTek Inc. (C) 2005
8*
9* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
10* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
11* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
12* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
13* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
14* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
15* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
16* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
17* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
18* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
19* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
20* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
21*
22* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
23* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
24* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
25* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
26* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
27*
28* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
29* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
30* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
31* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
32* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
33*
34*****************************************************************************/
35
36/*****************************************************************************
37 *
38 * Filename:
39 * ---------
40 * wdata.h
41 *
42 * Project:
43 * --------
44 * MT6268
45 *
46 * Description:
47 * ------------
48 *
49 *
50 * Author:
51 * -------
52 *
53 *
54 *============================================================================
55 * HISTORY
56 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
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257 *----------------------------------------------------------------------------
258 * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
259 *============================================================================
260 ****************************************************************************/
261
262#ifndef _UL1D_DATA_H_
263#define _UL1D_DATA_H_
264
265/*===============================================================================*/
266#include "kal_general_types.h"
267#include "ul1d_cid.h"
268#include "ul1d_rf_public.h"
269/*===============================================================================*/
270extern kal_int16 max_rx_start_offset;
271extern kal_int16 max_tx_start_offset;
272extern kal_int16 max_txcal_start_offset;
273extern kal_int16 min_rx_end_offset;
274extern kal_int16 min_tx_end_offset;
275
276extern kal_int16 max_rx_end_offset;
277extern kal_int16 max_tx_end_offset;
278
279extern kal_uint8 max_rx_end_reg_idx;
280extern kal_int16 min_rx_off_evt_cancel_margin;
281
282//Add for Support RXD and Dual Cell
283extern kal_int16 max_rx_dc_reconfig_offset;
284extern kal_int16 UMTS_RX_OFF2ON_TQ_TABLE[3];
285
286extern kal_int16 max_rxd_start_offset;
287extern kal_int16 min_rxd_end_offset;
288extern kal_int16 UMTS_RXD_START_TQ_TABLE[7];
289extern kal_int16 UMTS_RXD_END_TQ_TABLE[5];
290extern kal_uint32 rxd_support_mask;
291extern kal_uint32 rx_diversity_always_on;
292extern kal_uint32 pa_dirft_bitmap;
293extern kal_uint16 mpr_backoff_by_service[2];
294extern kal_bool is_rf_setting_by_nvram;
295extern kal_bool is_rfic_bsi_port_swap;
296
297extern kal_uint16 max_offset;
298extern kal_uint16 vm_offset;
299extern kal_uint16 vbias_offset;
300extern kal_uint16 dc2dc_offset;
301extern kal_uint16 vga_offset;
302#if IS_3G_MIPI_SUPPORT
303extern kal_uint16 ul1_mipi_offset;
304extern kal_bool is_3g_mipi_enable;
305#endif
306
307extern kal_bool is_3g_pga_ab_k_enable;
308
309extern kal_bool VPA_mode_setting;
310extern kal_uint8 pa_section;
311extern kal_uint8 DC2DC[3/*pa_mode*/];
312extern kal_uint8 VM_data[3/*pa_mode*/] ;
313
314extern kal_int16 UMTS_RX_START_TQ_TABLE[6];
315extern kal_int16 UMTS_RX_END_TQ_TABLE[3];
316
317extern kal_int16 UMTS_TX_START_TQ_TABLE[7];
318extern kal_int16 UMTS_TX_END_TQ_TABLE[3];
319
320
321extern BPI_data_type UMTS_PDATA_TABLE[UL1D_RF_CUSTOM_BAND][2][5];
322extern BPI_data_type UMTS_PDATA_TABLE_H[UL1D_RF_CUSTOM_BAND][2][5];
323extern BPI_data_type UMTS_PDATA2_RX_TABLE[UL1D_RF_CUSTOM_BAND][5];
324extern BPI_data_type UMTS_PDATA2_RX_TABLE_H[UL1D_RF_CUSTOM_BAND][5];
325
326#if IS_URF_COLUMBUS
327extern kal_int32 UMTS_RX_TQ_UCNT_TABLE[3];
328extern kal_int32 UMTS_TX_TQ_UCNT_TABLE[3];
329extern kal_int32 UMTS_RX_OFF2ON_TQ_UCNT_TABLE[3];
330#endif
331
332/*------------- Single Software Load for Multiple Components Compatible -------------*/
333extern kal_uint8 ul1custom_debug_enable;
334extern kal_uint8 ul1custom_gpio_set_nums;
335extern kal_uint8 ul1custom_adc_set_nums;
336extern kal_uint8 ul1custom_nvram_barcode_set_nums;
337extern kal_uint8 ul1custom_gpio_nums_in_calc;
338extern kal_uint8 ul1custom_ADC_nums_in_calc;
339extern kal_uint8 ul1custom_nvram_barcode_nums_in_calc;
340extern kal_uint8 ul1custom_first_index;
341extern kal_uint8 ul1custom_second_index;
342extern kal_uint8 ul1custom_third_index;
343extern kal_uint8 ul1custom_first_index_base;
344extern kal_uint8 ul1custom_gpio_num_of_detect_pins_in_use;
345extern kal_uint8 ul1custom_adc_level_total;
346extern kal_uint8 ul1custom_barcode_read_digit_num;
347extern kal_uint8 ul1custom_barcode_digit_value_1;
348extern kal_uint8 ul1custom_barcode_digit_value_2;
349extern kal_uint8 ul1custom_barcode_digit_value_3;
350extern kal_uint8 ul1custom_max_rf_support_band_num;
351extern kal_uint8 ul1custom_adc_calibrate_enable;
352extern kal_uint8 ul1custom_adc_bits;
353extern kal_uint16 ul1custom_adc_meas_count_2_order;
354extern kal_uint16 ul1custom_total_set_nums;
355extern kal_uint32 ul1custom_adc_max_input_voltage;
356/*------------- Single Software Load for Multiple Components Compatible -------------*/
357
358extern kal_bool ul1d_afc_vcxo_support;
359extern kal_int32 pd_threshold;
360
361extern kal_int16 ddpc_trigger_offset;
362extern kal_int16 meas_sample_offset_5M;
363extern kal_int16 wait_sample_offset_5M;
364extern kal_int16 meas_sample_offset_10M;
365extern kal_int16 wait_sample_offset_10M;
366extern kal_int16 adc_off_offset_0;
367extern kal_int16 adc_off_offset_1;
368extern kal_int16 adc_off_offset_2;
369
370extern kal_uint32 tri_sw_lm1;
371extern kal_uint32 tri_sw_et1;
372extern kal_uint32 tri_sw_dpd;
373extern kal_uint32 tri_sw_lm2;
374extern kal_uint32 tri_sw_et2;
375
376#endif /* End of #ifndef _UL1D_DATA_H_ */
377