yu.dong | c33b307 | 2024-08-21 23:14:49 -0700 | [diff] [blame^] | 1 | /*****************************************************************************
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| 2 | * Copyright Statement:
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| 3 | * --------------------
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| 4 | * This software is protected by Copyright and the information contained
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| 5 | * herein is confidential. The software may not be copied and the information
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| 6 | * contained herein may not be used or disclosed except with the written
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| 7 | * permission of MediaTek Inc. (C) 2018
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| 8 | *
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| 9 | * BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
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| 10 | * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
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| 11 | * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
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| 12 | * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
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| 13 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
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| 14 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
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| 15 | * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
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| 16 | * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
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| 17 | * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
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| 18 | * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
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| 19 | * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
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| 20 | * SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
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| 21 | *
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| 22 | * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
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| 23 | * LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
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| 24 | * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
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| 25 | * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
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| 26 | * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
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| 27 | *
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| 28 | * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
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| 29 | * WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
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| 30 | * LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
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| 31 | * RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
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| 32 | * THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
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| 33 | *
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| 34 | *****************************************************************************/
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| 35 |
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| 36 | [Symbol] [Obj] [Lib]
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| 37 |
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| 38 | //Group name is unique and must be started with 'GROUP_CFG_'
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| 39 | //Alignment is optional
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| 40 | ******************** < GROUP_CFG_SPU_NL1_SLOT_CODE > ********************
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| 41 | ALIGN:0x40
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| 42 | //D fileD.obj libDLIB.a
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| 43 | //E fileE.obj libELIB.a
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| 44 | #if defined(MT6833)
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| 45 | NL1_RFCC_Api_Get_Tx_Mimo_Cfg nr_rfcc_api.obj libnl1.a
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| 46 | NL1_RFCC_UTAS_Get_Phy_By_Rx nr_rfcc_utas.obj libnl1.a
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| 47 | NL1_RFCC_RFD_Get_Tx_Mimo_Cfg nr_rfcc_rfd.obj libnl1.a
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| 48 | nl1_tpc_reset_runtime_param nr_tpc.obj libnl1.a
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| 49 | NL1_TPC_Tti_Bdy_Utime312M_To_Utime19p5M nr_tpc.obj libnl1.a
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| 50 | NL1_TX_Pathloss_Get_Rsrp_Value nr_tx_pathloss.obj libnl1.a
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| 51 | NL1_TX_Pathloss_RS_Index_Update nr_tx_pathloss.obj libnl1.a
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| 52 | NL1_RFCC_FR1_Api_Ant_Query_Carkit_Info nr_rfcc_api.obj libnl1.a
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| 53 | NL1_RFCC_RXDFE_Get_Rx_Mimo_Cfg nr_rfcc_rxdfe.obj libnl1.a
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| 54 | NL1_TX_PwrCtrl_TxChannelPwr_PostProcessing nr_tx_pwr_ctrl_mcu.obj libnl1.a
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| 55 | nl1_tpc_update_p_channel_bmp nr_tpc.obj libnl1.a
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| 56 | nl1_tpc_atx_param_init nr_tpc.obj libnl1.a
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| 57 | NL1_TX_PwrCtrl_PUCCHTxPwr_PostProcessing nr_tx_pwr_ctrl_mcu.obj libnl1.a
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| 58 | DVFS_get_global DVFS_drv.obj libdvfs_drv.a
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| 59 | NL1_RFD_Api_Ant_Query_Tx_Path nr_rfd_ant.obj libnl1.a
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| 60 | NL1_RFD_CA_Query_SRS_Capability_Info nr_rfd_custom_srs.obj libnl1.a
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| 61 | change_mips_user_acc.constprop.6 DVFS_drv_md.obj libdvfs_drv.a
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| 62 | nl1_tx_pwrctrl_set_pcmax_mcu nr_tx_pwr_ctrl_mcu.obj libnl1.a
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| 63 | NL1_TPC_TX_Request_Path_Time nr_tpc.obj libnl1.a
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| 64 | nl1_rfd_ca_query_search nr_rfd_customcommon.obj libnl1.a
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| 65 | NL1_LPWR_TPS_Api_Collect_TPC_Info nr_lpwr_tps.obj libnl1.a
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| 66 | nl1_tx_mpr_derive_contiguous_rb nr_tx_pwr_ctrl_mpr_mcu.obj libnl1.a
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| 67 | NL1_TX_RFCtrl_TPC_Control nr_tx_rf_ctrl_mcu.obj libnl1.a
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| 68 | nl1_tpc_update_p_sg_info nr_tpc.obj libnl1.a
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| 69 | NL1_TPC_TX_Request_Path_Info nr_tpc.obj libnl1.a
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| 70 | NL1_TX_PHR_NMAC_PUCCH_Tx_Or_Pusch_Retx nr_tx_nmac_phr_c.obj libnl1.a
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| 71 | nl1_tx_pwrctrl_get_pathloss_mcu nr_tx_pwr_ctrl_mcu.obj libnl1.a
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| 72 | memcmp lib_a-memcmp.o libc.a
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| 73 | NL1_TPC_TX_Request_CC_Info nr_tpc.obj libnl1.a
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| 74 | nl1_tpc_inc_idx_setgain nr_tpc.obj libnl1.a
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| 75 | nl1_tpc_khz_to_atx_bw_enum nr_tpc.obj libnl1.a
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| 76 | NL1_TX_PwrCtrl_Api_Read_LTE_Cell_Info nr_tx_pwr_ctrl_mcu.obj libnl1.a
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| 77 | ENL1_TPC_Get_C_Tti_Info enl1_tpc.obj libmml1.a
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| 78 | NL1_TX_UTAS_Ant_State_Query nr_tx_utas_mcu.obj libnl1.a
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| 79 | nl1_tx_pwrctrl_inject_adj nr_tx_pwr_ctrl_mcu.obj libnl1.a
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| 80 | nl1_tpc_start_rb_to_freq_cal nr_tpc.obj libnl1.a
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| 81 | nl1_tpc_trig_p_time_emerg_g00_tick nr_tpc.obj libnl1.a
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| 82 | NL1_TX_MNGR_Api_UL_Post nr_tx_mngr_mcu.obj libnl1.a
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| 83 | ENL1_TPC_Temperature_Interpolation enl1_tpc.obj libmml1.a
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| 84 | NL1_TX_PwrCtrl_Derive_AMPR nr_tx_pwr_ctrl_mpr_mcu.obj libnl1.a
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| 85 | NL1_RFCC_PHYS_Get_Ucnt_By_Scnt nr_rfcc_phys.obj libnl1.a
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| 86 | NL1_DVFS_Tx_Shaolin_REQ_Set_On nr_lpwr_dvfs.obj libnl1.a
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| 87 | NL1_RFD_Map_CA_To_Idx nr_rfd_customcommon.obj libnl1.a
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| 88 | DVFS_md_MIPS_setNRTX DVFS_drv_md.obj libdvfs_drv.a
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| 89 | DVFS_acc_val_set DVFS_drv.obj libdvfs_drv.a
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| 90 | NL1_TX_PwrCtrl_Derive_MPR nr_tx_pwr_ctrl_mpr_mcu.obj libnl1.a
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| 91 | NL1_TX_Api_Get_Sim_Index nr_tx_database_mcu.obj libnl1.a
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| 92 | NL1_TX_RFCtrl_Get_ENDC_Total nr_tx_rf_ctrl_mcu.obj libnl1.a
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| 93 | MMRFD_CMR_Query_Carkit_Usage_Info_By_FeLayoutGroup mml1_rf_ant.obj libmml1_rf.a
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| 94 | NL1_LPWR_TPS_Api_Collect_Tx_Info nr_lpwr_tps.obj libnl1.a
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| 95 | NL1_TX_LPWR_DVFS_TPC_Rpt_G1_Start_Entry nr_tx_lpwr_mcu.obj libnl1.a
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| 96 | nl1_tx_pathloss_get_trx_rsrp nr_tx_pathloss.obj libnl1.a
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| 97 | ENL1_TPC_Get_Temper_Comp_Info_Path enl1_tpc.obj libmml1.a
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| 98 | NL1_TX_Lisr_Post_Tpc_Irq nr_tx_mngr_mcu.obj libnl1.a
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| 99 | MMRF_Query_Adie_Ucnt_InitTxOfs mml1_rf_ucnt.obj libmml1_rf.a
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| 100 | NL1_FWK_LISR_DCI_UL_Post_Group1_G nr_fwk_lisr_entry.obj libnl1.a
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| 101 | NL1_TX_PwrCtrl_HW_Post_Combined_Config_MCU nr_tx_pwr_ctrl_mcu.obj libnl1.a
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| 102 | NL1_TX_PwrCtrl_PUSCHTxPwr_PostProcessing nr_tx_pwr_ctrl_mcu.obj libnl1.a
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| 103 | NL1_TX_PwrCtrl_SRSTxPwr_PostProcessing nr_tx_pwr_ctrl_mcu.obj libnl1.a
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| 104 | NL1_TX_RFCtrl_TPC_Reconfig nr_tx_rf_ctrl_mcu.obj libnl1.a
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| 105 | nl1_tx_pwrctrl_prepare_ulca_info nr_tx_pwr_ctrl_mcu.obj libnl1.a
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| 106 | NL1_TX_RF_Tool_dB_To_Linear nr_tx_rf_ctrl_mcu.obj libnl1.a
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| 107 | NL1_TX_RF_Tool_Linear_To_dB nr_tx_rf_ctrl_mcu.obj libnl1.a
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| 108 | NL1_TX_RFCtrl_ANT_Config nr_tx_rf_ctrl_mcu.obj libnl1.a
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| 109 | NL1_TX_DFE_RF_CCSW_SRS_Config nr_tx_rf_ctrl_mcu.obj libnl1.a
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| 110 | nl1_tx_pwrctrl_qsort_compare_channel_info nr_tx_pwr_ctrl_mcu.obj libnl1.a
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| 111 | NL1_TX_RFCtrl_TPC_Judge_Emergency_Mode nr_tx_rf_ctrl_mcu.obj libnl1.a
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| 112 | NL1_TX_PwrCtrl_Set_Prach_Tx_Power_MCU nr_tx_pwr_ctrl_mcu.obj libnl1.a
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| 113 | NL1_TX_LPWR_DVFS_Post_TPC_G1_End_Entry nr_tx_lpwr_mcu.obj libnl1.a
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| 114 | nl1_tx_lpwr_shaolin_dvfs_on_check_post_comb nr_tx_lpwr_mcu.obj libnl1.a
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| 115 | nl1_tx_lpwr_shaolin_dvfs_off_check nr_tx_lpwr_mcu.obj libnl1.a
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| 116 | NL1_DVFS_Tx_Shaolin_REQ_Set_Off nr_lpwr_dvfs.obj libnl1.a
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| 117 | NL1_TX_PWR_CTRL_Api_Csif_Ul_Post_Combine_Rpt_Handler nr_tx_mngr_mcu.obj libnl1.a
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| 118 | nl1_tx_mngr_ul_post_dep_irq_tpc nr_tx_mngr_mcu.obj libnl1.a
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| 119 | nl1_tx_mngr_post_tpc_entry nr_tx_mngr_mcu.obj libnl1.a
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| 120 | ENL1_TPC_Get_P_Ch enl1_tpc.obj libmml1.a
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| 121 | NL1_TPC_Get_CC_TTI_INFO_Buffer nr_tpc.obj libnl1.a
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| 122 | nl1_tpc_get_en_mrx nr_tpc.obj libnl1.a
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| 123 | #else
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| 124 | drv_spu_EventGen_Fetch_Code drv_spu.obj libsys_drv.a
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| 125 | #endif
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| 126 | ******************** < GROUP_CFG_SPU_NL2_SLOT_CODE > ********************
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| 127 | ALIGN:0x40
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| 128 |
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| 129 | ******************** < GROUP_CFG_SPU_NL1_SLOT_RODATA > ********************
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| 130 | ALIGN:0x40
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| 131 | #if defined(MT6833)
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| 132 | NL1_TX_PwrCtrl_TxChannelPwr_PostProcessing nr_tx_pwr_ctrl_mcu.obj libnl1.a
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| 133 | nl1_tx_log2lin_pow_tab_slope_tab nr_tx_rf_ctrl_mcu.obj libnl1.a
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| 134 | #endif
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| 135 | ******************** < GROUP_CFG_SPU_NL2_SLOT_RODATA > ********************
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| 136 | ALIGN:0x40
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| 137 |
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| 138 | ******************** < GROUP_CFG_SPU_NL1_SLOT_DATA > ********************
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| 139 | ALIGN:0x40
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| 140 | #if defined(MT6833)
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| 141 | temp_degree_Celsius nr_tpc.obj libnl1.a
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| 142 | NL1_TX_1_Trace_Filter nl1_trace_tx_1_utmd.obj libnl1_pub.a
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| 143 | s_dvfs_md_acc_weight_map DVFS_drv_md.obj libdvfs_drv.a
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| 144 | NL1_TC_Trace_Filter nl1_trace_tc_utmd.obj libnl1_pub.a
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| 145 | #endif
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| 146 | ******************** < GROUP_CFG_SPU_NL2_SLOT_DATA > ********************
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| 147 | ALIGN:0x40
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| 148 |
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| 149 | ******************** < GROUP_CFG_SPU_NL1_SLOT_DATA_ZI > ********************
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| 150 | ALIGN:0x40
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| 151 | #if defined(MT6833)
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| 152 | g_nl1_tx_offset_pwr_nr_fr1 nr_tx_nvram_read.obj libnl1.a
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| 153 | read_temper_timestamp nr_tpc.obj libnl1.a
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| 154 | p_lp_db nr_lpwr_tps.obj libnl1.a
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| 155 | nl1_tx_pbch_pathloss_mcu nr_tx_pathloss.obj libnl1.a
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| 156 | p_thiz nr_rfcc_utas.obj libnl1.a
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| 157 | g_nl1_tx_pcmax_offset_cfg nr_tx_pwr_ctrl_mcu.obj libnl1.a
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| 158 | NL1_TPC_CP_TYPE mml1_tpc.obj libmml1.a
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| 159 | s_dvfs_md_acc_t DVFS_drv_md.obj libdvfs_drv.a
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| 160 | nl1_emac_phr_trigger_ind_t nr_tx_nmac_phr_c.obj libnl1.a
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| 161 | nl1_tpc_idx_setgain_cnt nr_tpc.obj libnl1.a
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| 162 | nl1_dvfs_tx_shaolin_scs nr_lpwr_dvfs.obj libnl1.a
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| 163 | slot_p_ctrl enl1_tpc.obj libmml1.a
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| 164 | nr_power_offset nr_tpc.obj libnl1.a
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| 165 | mml1_etdpd_tpc_info mml1_etdpd_common.obj libmml1_rf.a
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| 166 | NL1D_ET_DBG nr_et_database.obj libnl1.a
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| 167 | s_dvfs_md DVFS_drv_md.obj libdvfs_drv.a
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| 168 | nr_p_mode nr_tpc.obj libnl1.a
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| 169 | nl1_hrt_extra_settle_ nr_hrt_check.obj libnl1.a
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| 170 | nl1_tx_mngr_ul_post_tpc_rpt_free_queue_rb nr_tx_mngr_mcu.obj libnl1.a
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| 171 | NL1_TPC_TTI_BDY mml1_tpc.obj libmml1.a
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| 172 | #endif
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| 173 | ******************** < GROUP_CFG_SPU_NL2_SLOT_DATA_ZI > ********************
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| 174 | ALIGN:0x40
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