blob: 6b1d3d757493e60eafdaacd338af3e7de69866d3 [file] [log] [blame]
yu.dongc33b3072024-08-21 23:14:49 -07001/*******************************************************************************
2 * Filename:
3 * ---------
4 * dpcopro_custom.h
5 *
6 * Project:
7 * --------
8 * UMOLYA
9 *
10 * Description:
11 * ------------
12 * Copro & VRB related API released for Customer
13 *
14 * Author:
15 * -------
16 * -------
17 *
18 * ==========================================================================
19 * $Log$
20 *
21 * 09 23 2019 yi-chih.tsai
22 * [MOLY00442844] [Gen97] Add new key_idx for NR CM+IM security configuration
23 * .1. add key for no cipher 2. add log for control packet
24 *
25 * 12 10 2018 yi-chih.tsai
26 * [MOLY00366485] [MT6297][KS IODT EVB] 4G cipher of DRB problem
27 * .modify for EN-DC
28 *
29 * 11 14 2018 yi-chih.tsai
30 * [MOLY00364111] [MT6297][Apollo][Sanity Fail][20181112][NR RRC Reconfiguration] Assert fail: dpcopro_hisr.c 713 - (LISR)mml2_excep_lisr
31 * .sync cipher driver
32 *
33 * 03 30 2018 chia-chi.hsiao
34 * [MOLY00252913] MT6295 MML2 driver porting
35 * .fix chip gen compile flag
36 *
37 * 02 13 2018 chi-yen.yu
38 * [MOLY00252913] MT6295 MML2 driver porting
39 * Enhance DMA trigger flow for reduce mask interrupt duration
40 *
41 * 01 25 2018 chi-yen.yu
42 * [MOLY00299272] [MT6763][Bianco][O1][MP2][TMO][MTBF][PHONE][HQ][Lab][Ericsson][Fatal error(task)] err_code10x00000B34 err_code20x90284CA1 err_code30xCCCCCCCC CaDeFa Supported
43 * For IPCore customer release
44 *
45 * 11 13 2017 chao-hung.hsu
46 * [MOLY00252913] MT6295 MML2 driver porting
47 * . 95 DEV code merge
48 *
49 * 11 13 2017 chao-hung.hsu
50 * [MOLY00252913] MT6295 MML2 driver porting
51 * . dpcopro 95 DEV code sync back to R3/TRUNK
52 *
53 * 09 01 2017 yi-chih.tsai
54 * [MOLY00274580] [MT6293][SMO- source code release] remove unnecessary include header file
55 * .copy ctrl pkt and key API to customer header
56 *
57 * 08 09 2017 chi-yen.yu
58 * [MOLY00252913] MT6295 MML2 driver porting
59 * Add API declare for cursomer release
60 *
61 * 04 13 2017 chi-yen.yu
62 * [MOLY00240758] [Bianco][N1][Blocking]Externel (EE),0,0,99,/data/core/,1,modem,
63 * For customer release
64****************************************************************************/
65#ifndef __DPCOPRO_CUSTOM_H__
66#define __DPCOPRO_CUSTOM_H__
67
68enum{
69VRB_USER_TX_LISR, // EMAC Module
70VRB_USER_ERT_TASK, // EMAC Module
71VRB_USER_EMACDL_TASK, // EMAC/ERLCUL Module
72VRB_USER_UL2_TASK, // 3G L2 module, high priority
73VRB_RTBL_NUM,
74VRB_USER_USBCORE_TASK=VRB_RTBL_NUM, // USB Core
75VRB_USER_IPCORE_TASK, // IPCore Module
76VRB_USER_LHIF_TASK, // LHIF Core
77VRB_USER_EL2H_TASK, // EL2H Module
78VRB_USER_EL2_TASK, // EL2 Module
79VRB_USER_ERRC_TASK, // ERRC Module (for SRB)
80VRB_USER_IMC_TASK, // LTE CSR Module
81VRB_USER_UL2D_TASK, // 3G L2 module, lower priority than UL2 Task
82//VRB_USER_L1_LISR, // 3G UL module, not used by 3G user
83VRB_USER_NUM
84};
85
86void copro_vrb_release(void* addr, kal_uint16 len, kal_uint8 task_id);
87void dpcopro_phy_to_vrb_mem_cpy(kal_uint8 *des_vrb_addr, kal_uint8 *src_addr, kal_uint32 len);
88typedef struct{
89 kal_uint32 v_addr;
90 kal_uint32 p_addr[5];
91 kal_uint16 v_len;
92 kal_uint16 p_len[5];// use 3 phy len for structure align
93}v2p_addr_t;
94kal_uint16 copro_vrb_to_phy_addr(v2p_addr_t *v2p);
95void dpcopro_vrb_copy(kal_uint8 *des, kal_uint8 *src, kal_uint32 len);
96
97//---------- L2 Key setting API ------------
98//!@brief cipher and integrity algorithm list
99typedef enum{
100 L2_ALGO_NULL = 0,
101 L2_ALGO_KASUMI,
102 L2_ALGO_SNOW3G,
103 L2_ALGO_AES,
104 L2_ALGO_ZUC
105}l2_key_algo;
106
107//!@brief key type list
108typedef enum{
109 //3G, 4G key
110 L2_KEY_NULL = 0,
111 L2_KEY_NRRC_ENC_MIRROR,
112 L2_KEY_NRRC_INT_MIRROR,
113 L2_KEY_NUP_ENC_MIRROR,
114 L2_KEY_NUP_INT_MIRROR,
115 L2_KEY_ERRC_ENC,
116 L2_KEY_ERRC_INT,
117 L2_KEY_EUP_ENC,
118 L2_KEY_EUP_S_ENC,
119 L2_KEY_ENAS_ENC,
120 L2_KEY_ENAS_INT,
121 L2_KEY_UUP_ENC1,
122 L2_KEY_UUP_ENC2,
123 L2_KEY_UUP_ENC3,
124 L2_KEY_UUP_ENC4,
125 L2_KEY_UUP_ENC5,
126 //5G key type
127 L2_KEY_NR_NULL,
128 L2_KEY_NRRC_ENC,
129 L2_KEY_NRRC_INT,
130 L2_KEY_NUP_ENC,
131 L2_KEY_NUP_INT,
132 L2_KEY_ERRC_ENC_MIRROR,
133 L2_KEY_ERRC_INT_MIRROR,
134 L2_KEY_EUP_ENC_MIRROR,
135 L2_KEY_NUP_NULL_FOR_CIPHER_DISABLED,
136 L2_KEY_NUP_INT_MIRROR_FOR_CIPHER_DISABLED
137}l2_key_type;
138
139//!@brief the key configuration struct
140typedef struct l2_key_cfg_t{
141 kal_uint32 algo;
142 kal_uint8 key[16];
143} l2_key_cfg;
144
145/*!
146 * @brief get key index by key type
147 * @param type: key type
148 * @return key index
149 */
150kal_uint32 l2_key_get_index(kal_uint32 type);
151
152/*!
153 * @brief get key configuration by key index
154 * @param key_idx: the key index, which get from "l2_key_get_index" or "l2_key_set_config"
155 * @param cfg: the key configuration info
156 * @return 0: failure, 1: success
157 */
158kal_uint32 l2_key_get_config(kal_uint32 key_idx, l2_key_cfg* cfg);
159
160/*!
161 * @brief set key and algorithm by key type
162 * single key: sw need to make sure hw don't use it
163 * dual key : driver will set another key index
164 * @param type: key type
165 * @param cfg: the key configuration info
166 * @return key index for key select
167 */
168kal_uint32 l2_key_set_config(kal_uint32 type, l2_key_cfg* cfg);
169
170//------- the control packet queue API -------
171//!@brief the arguments for integrity function
172typedef struct l2_cp_eia_info_t{
173 kal_uint8 dir;
174 kal_uint8 bearer;
175 kal_uint16 length;
176 kal_uint32 count;
177 kal_uint8* src_addr;
178 kal_uint8* dst_addr;
179}l2_cp_eia_info;
180
181//!@brief the arguments for cipher function
182typedef l2_cp_eia_info l2_cp_eea_info;
183
184/*!
185 * @brief Do integrity for ENAS. (task only!!!)
186 * This function will block task until HW done.
187 * @param nas: integrity parameters info
188 */
189void l2_cp_int_enas(l2_cp_eia_info *nas);
190
191/*!
192 * @brief Do cipher for ENAS. (task only!!!)
193 * This function will block task until HW done.
194 * @param nas: cipher parameters info
195 */
196void l2_cp_cip_enas(l2_cp_eea_info *nas);
197
198/*!
199 * @brief Do integrity for ERRC.(task only!!!)
200 * This function will block task until HW done
201 * @param rrc: integrity parameters info
202 * @param gen_hdr: if gen_hdr = 1, driver will generate pdcp header by count
203 */
204void l2_cp_int_errc(l2_cp_eia_info *rrc, kal_uint32 gen_hdr);
205
206/*!
207 * @brief Generate PDCP header and do integrity for EPDCP.(task only!!!)
208 * This function DON'T block task, SW need to poll "handle id" by itself
209 * @param pdcp: integrity parameters info
210 * @return handle id
211 */
212kal_uint32 l2_cp_int_epdcp(l2_cp_eia_info *pdcp, kal_uint32 key_index);
213
214/*!
215 * @brief Check that HW is done or not
216 * @param handle: handle id which is got from "l2_cp_int_epdcp"
217 * @return 0: undone, 1: done
218 */
219kal_uint32 l2_cp_is_hid_done(kal_uint32 handle);
220
221/*!
222 * @brief Check that HW is done and get mac_i
223 * @param handle: handle id which is got from "l2_cp_int_epdcp"
224 * @return 0: undone, 1: done
225 */
226kal_uint32 l2_cp_int_pdcp_get_maci(kal_uint32 handle, kal_uint32 *p_maci);
227
228//!@brief the arguments for cipher function
229typedef struct l2_cp_uea_info_t{
230 kal_uint8 dir:1;
231 kal_uint8 key_type:7;
232 kal_uint8 bearer;
233 kal_uint16 length;
234 kal_uint32 count;
235 kal_uint8* src_addr;
236 kal_uint8* dst_addr;
237}l2_cp_uea_info;
238
239/*!
240 * @brief Do cipher for 3G Lisr.
241 * This function will block Lisr until HW done.
242 * @param uea: cipher parameters info
243 */
244void l2_cp_cip_3g_lisr(l2_cp_uea_info *uea);
245
246void dpcopro_rbuf_release(void *addr,kal_uint16 len);
247
248typedef enum{
249 UL_IPF_META_MR_HPC_MATCH=0,
250 UL_IPF_META_MR_HPC_NEW,
251 UL_IPF_META_MR_NAT_MATCH,
252 UL_IPF_META_MR_NAT_MATCH_NO_TRAN,
253 UL_IPF_META_MR_NAT_DEL_MATCH,
254 UL_IPF_META_MR_NAT_DEL_NO_MATCH,
255 UL_IPF_META_MR_NAT_ADD,
256 UL_IPF_META_MR_UNKNOWN,
257 UL_IPF_META_MR_NUM
258}UL_IPF_META_MR;
259
260typedef enum{
261 DL_IPF_META_MR_AP=0,
262 DL_IPF_META_MR_FILTER_MATCH,
263 DL_IPF_META_MR_UNKNOWN,
264 DL_IPF_META_MR_NET_INVALID,
265 DL_IPF_META_MR_PN_NO_MATCH,
266 DL_IPF_META_MR_NAT_MATCH,
267 DL_IPF_META_MR_NAT_NO_MATCH,
268 DL_IPF_META_MR_NAT_MATCH_NO_TRAN,
269 DL_IPF_META_MR_NUM
270}DL_IPF_META_MR;
271
272typedef struct ipv4_filter_rule_t{
273 kal_uint8 pdn_sim_id;
274 kal_uint8 protocol;
275 kal_uint8 valid;
276 kal_uint8 resv0:4;
277 kal_uint8 ip:4;
278 kal_uint32 f_pro_word;
279 kal_uint32 remote_addr0;
280 kal_uint32 resv1;
281}ipv4_filter_rule;
282
283typedef struct ipv6_filter_rule_t{
284 kal_uint8 pdn_sim_id;
285 kal_uint8 protocol;
286 kal_uint8 valid;
287 kal_uint8 resv0:4;
288 kal_uint8 ip:4;
289 kal_uint32 f_pro_word;
290 kal_uint32 remote_addr0;
291 kal_uint32 resv1;
292 kal_uint32 resv2:28;
293 kal_uint32 ip1:4;
294 kal_uint32 remote_addr1;
295 kal_uint32 remote_addr2;
296 kal_uint32 remote_addr3;
297}ipv6_filter_rule;
298
299typedef struct ipf_dl_meta_t{
300 kal_uint16 count;
301 kal_uint8 channel_id;
302 kal_uint8 net_type:3;
303 kal_uint8 resv:5;
304 kal_uint16 len;
305 kal_uint8 rbid;
306 kal_uint8 pdn_sim_id;
307 kal_uint32 addr;
308 kal_uint8 match_idx;
309 kal_uint8 mr:3;
310 kal_uint8 rsv0:1;
311 kal_uint8 ip:1;
312 kal_uint8 fil_tog:2;
313 kal_uint8 rsv1:1;
314 kal_uint8 tcp_flag;
315 kal_uint8 filter_idx;
316}ipf_dl_meta;
317
318#endif