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192.168.1.100 / T800_MD_V1.6 / c33b3079c38f91561c2f84f1ebed20ad8c60532a / . / mcu / service / nvram / src / nvram_tl1def.c
blob: 0d9fbd93c9ff26f24c0286630ccab264e5ccf9ec [file] [log] [blame]
yu.dongc33b3072024-08-21 23:14:49 -0700[diff] [blame^]1/*******************************************************************************
2* Copyright Statement:
3* --------------------
4* This software is protected by Copyright and the information contained
5* herein is confidential. The software may not be copied and the information
6* contained herein may not be used or disclosed except with the written
7* permission of MediaTek Inc. (C) 2001
8*
9*******************************************************************************/
10
11/*******************************************************************************
12 *
13 * Filename:
14 * ---------
15 * nvram_mml1_default.c
16 *
17 * Project:
18 * --------
19 * MT7206RF
20 *
21 * Description:
22 * ------------
23 *
24 *
25 * Author:
26 * -------
27 *
28 *
29 *******************************************************************************/
30/*===============================================================================================*/
31#ifdef __AST_TL1_TDD__
32
33#include "kal_general_types.h"
34#include "kal_public_api.h"
35#include "kal_public_defs.h"
36//#include "nvram_data_items.h"
37#include "td_nvram_def.h"
38#include "tl1d_custom_drdi.h"
39#ifdef __TAS_SUPPORT__
40#include "tl1d_custom_rf_tas_struct.h"
41#endif
42
43const tl1CustomDynamicInitMipiData *tl1_mipiData_ptr;
44kal_uint16 gSetIdx = 0xf;
45kal_uint16 gDefaultPath = 0xf;
46
47#ifdef __TAS_SUPPORT__
48
49const T_TD_CUSTOMIZATION_TAS_STRUCT_P *tl1_TasData_ptr;
50extern void tl1d_rf_tas_data_setting_customer_structure_data(T_TD_CUSTOMIZATION_TAS_STRUCT * dest_ptr,T_TD_CUSTOMIZATION_TAS_STRUCT_P* src_ptr);
51
52#if defined(__MTK_TARGET__)
53extern T_TD_CUSTOMIZATION_TAS_STRUCT g_tl1_d_tl_tas_param;
54#endif
55extern void tl1_custom_point_empty_check(void * express,kal_uint16 flag,kal_uint16 value1, kal_uint16 value2);
56
57void td_tl1_rf_tas_param_updatere(void)
58{
59#if defined(__MTK_TARGET__)
60 tl1_custom_point_empty_check((void *)tl1_mipiData_ptr,gSetIdx,gDefaultPath , 0x1 );
61 tl1_custom_point_empty_check((void *)tl1_TasData_ptr, gSetIdx,gDefaultPath , 0x2 );
62
63 tl1d_rf_tas_data_setting_customer_structure_data( &g_tl1_d_tl_tas_param,(void *)tl1_TasData_ptr);
64
65#endif
66}
67#endif
68
69//const tl1CustomDynamicInitMipiData tl1CustomMipiDataDefault[] = {{
70// &AST_TL1_RF_PARAMETER_DEFAULT_SetDefault[0],
71// &AST_TL1_RFFE_PARAMETER_DEFAULT_SetDefault[0],
72// &AST_TL1_SEQ_DEFAULT_SetDefault[0],
73// &tl1CustomDATData_SetDefault
74//}};
75
76kal_bool tl1d_DRDI_had_done = KAL_FALSE;
77
78//#ifdef __RF_DRDI_CAPABILITY_SUPPORT__
79void nvram_tl1_drdiPointerInit(kal_uint16 setIdx)
80{
81 tl1_mipiData_ptr = &(tl1CustomMipiData[setIdx]);
82#ifdef __TAS_SUPPORT__
83 tl1_TasData_ptr = tl1CustomTASData_drdi_point[setIdx];
84 tl1_custom_point_empty_check((void *)tl1_TasData_ptr, setIdx, 0, 0x2);
85#endif
86
87 tl1_custom_point_empty_check((void *)tl1_mipiData_ptr,setIdx, 0, 0x1);
88}
89//#endif
90
91//void nvram_tl1_drdiPointerInitDefault(kal_uint16 setIdx)
92//{
93// tl1_mipiData_ptr = &(tl1CustomMipiDataDefault[0]);
94//#ifdef __TAS_SUPPORT__
95// tl1_TasData_ptr = &(tl1CustomTASData_SetDefault);
96//#endif
97//}
98
99void nvram_tl1_drdi(void)
100{
101#ifdef __RF_DRDI_CAPABILITY_SUPPORT__
102 if(gTdsDrdiFlag)
103 {
104 if(!tl1d_DRDI_had_done)
105 {
106 if(MML1_RF_DRDI_CUSTOM_IsDynamicInitEnable())
107 {
108 kal_uint16 setIdx;
109 setIdx = MML1_RF_DRDI_Dynamic_GetParamAddr(MML1_RF_3G_TDD);
110 /* set the pointer to RF custom data by set index */
111 gSetIdx = setIdx;
112 nvram_tl1_drdiPointerInit(setIdx);
113 }
114 else
115 {
116 nvram_tl1_drdiPointerInit(0);
117 }
118 tl1d_DRDI_had_done = KAL_TRUE;
119 }
120 }
121 else
122#endif //#ifdef __RF_DRDI_CAPABILITY_SUPPORT__
123 {
124 nvram_tl1_drdiPointerInit(0);
125 gDefaultPath = 0xc;
126 }
127#ifdef __TAS_SUPPORT__
128 td_tl1_rf_tas_param_updatere();
129#endif
130
131//#else //#ifdef __RF_DRDI_CAPABILITY_SUPPORT__
132// nvram_tl1_drdiPointerInit(0);
133//#ifdef __TAS_SUPPORT__
134// td_tl1_rf_tas_param_updatere();
135//#endif
136// gDefaultPath = 0xb;
137//#endif //#ifdef __RF_DRDI_CAPABILITY_SUPPORT__
138}
139
140void nvram_get_tL1_default_value_to_write(nvram_lid_core_enum lid, kal_uint8 *buffer, kal_uint16 buffer_size)
141{
142 nvram_tl1_drdi();
143
144 //tl1_mipiData_ptr->rfTable_p->tReserverData.uwPadding[0] = gSetIdx;
145 //tl1_mipiData_ptr->rfTable_p->tReserverData.uwPadding[1] = gDefaultPath;
146
147 switch (lid)
148 {
149 case NVRAM_EF_AST_TL1_RF_PARAM_LID:
150 {
151 T_TD_CUSTOMIZATION_STRUCT *rf_param_ptr = (T_TD_CUSTOMIZATION_STRUCT *)buffer;
152 kal_mem_cpy(rf_param_ptr, tl1_mipiData_ptr->rfTable_p, NVRAM_EF_AST_TL1_RF_PARAM_SIZE);
153#if defined(__MD93__)||defined(__MD95__)
154 rf_param_ptr->tReserverData.uwPadding[0] = gSetIdx;
155 rf_param_ptr->tReserverData.uwPadding[1] = gDefaultPath;
156#else
157 rf_param_ptr->tFunctionData.tl1d_function15 = gSetIdx;
158 rf_param_ptr->tFunctionData.tl1d_function16 = gDefaultPath;
159
160#endif
161 }
162 break;
163 case NVRAM_EF_AST_TL1_RFFE_PARAM_LID:
164 {
165 kal_mem_cpy(buffer, tl1_mipiData_ptr->mipiTable_p, NVRAM_EF_AST_TL1_RFFE_PARAM_SIZE);
166 }
167 break;
168 case NVRAM_EF_AST_TL1_RF_TIMESEQ_LID:
169 {
170 kal_mem_cpy(buffer, tl1_mipiData_ptr->timingTable_p, NVRAM_EF_AST_TL1_RF_TIMESEQ_SIZE);
171 }
172 break;
173#ifdef __TAS_SUPPORT__
174 case NVRAM_EF_AST_TL1_TAS_CUSTOM_PARAMES_LID:
175 {
176#if defined(__MTK_TARGET__)
177 kal_mem_cpy(buffer, &g_tl1_d_tl_tas_param, NVRAM_EF_AST_TL1_TAS_CUSTOM_PARAMES_SIZE);
178#endif
179 }
180 break;
181#endif
182 case NVRAM_EF_AST_TL1_DAT_PARAM_LID:
183 {
184 T_TD_CUSTOMIZATION_DAT_STRUCT *gDatData = (T_TD_CUSTOMIZATION_DAT_STRUCT *)buffer;
185
186 kal_mem_cpy(&(gDatData->TL1D_DAT_CONFIG), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CONFIG, sizeof(T_TD_CUSTOMIZATION_DAT_CONFIG));
187#if defined(__MD93__)
188 kal_mem_cpy(&(gDatData->TL1D_DAT_CATA_BPI_TABLE), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CATA_BPI_TABLE, sizeof(TL1D_CUSTOM_DAT_FE_CAT_A_T));
189 kal_mem_cpy(&(gDatData->TL1D_DAT_CAT_A_CONFIG0_MIPIEVENT[0]), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CAT_A_MIPI_EventSet[0], TL1D_DAT_MAX_MIPI_EVNET_NUM*sizeof(TL1D_DAT_MIPI_EVENT_TABLE_T));
190 kal_mem_cpy(&(gDatData->TL1D_DAT_CAT_A_CONFIG1_MIPIEVENT[0]), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CAT_A_MIPI_EventSet[1], TL1D_DAT_MAX_MIPI_EVNET_NUM*sizeof(TL1D_DAT_MIPI_EVENT_TABLE_T));
191 kal_mem_cpy(&(gDatData->TL1D_DAT_CAT_A_CONFIG2_MIPIEVENT[0]), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CAT_A_MIPI_EventSet[2], TL1D_DAT_MAX_MIPI_EVNET_NUM*sizeof(TL1D_DAT_MIPI_EVENT_TABLE_T));
192 kal_mem_cpy(&(gDatData->TL1D_DAT_CAT_A_CONFIG3_MIPIEVENT[0]), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CAT_A_MIPI_EventSet[3], TL1D_DAT_MAX_MIPI_EVNET_NUM*sizeof(TL1D_DAT_MIPI_EVENT_TABLE_T));
193 kal_mem_cpy(&(gDatData->TL1D_DAT_CAT_A_CONFIG0_MIPIDATA[0]), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CAT_A_MIPI_DataSet[0], TL1D_DAT_MAX_MIPI_DATA_NUM*sizeof(TL1D_DAT_MIPI_DATA_TABLE_T));
194 kal_mem_cpy(&(gDatData->TL1D_DAT_CAT_A_CONFIG1_MIPIDATA[0]), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CAT_A_MIPI_DataSet[1], TL1D_DAT_MAX_MIPI_DATA_NUM*sizeof(TL1D_DAT_MIPI_DATA_TABLE_T));
195 kal_mem_cpy(&(gDatData->TL1D_DAT_CAT_A_CONFIG2_MIPIDATA[0]), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CAT_A_MIPI_DataSet[2], TL1D_DAT_MAX_MIPI_DATA_NUM*sizeof(TL1D_DAT_MIPI_DATA_TABLE_T));
196 kal_mem_cpy(&(gDatData->TL1D_DAT_CAT_A_CONFIG3_MIPIDATA[0]), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CAT_A_MIPI_DataSet[3], TL1D_DAT_MAX_MIPI_DATA_NUM*sizeof(TL1D_DAT_MIPI_DATA_TABLE_T));
197
198 kal_mem_cpy(&(gDatData->TL1D_DAT_CATB_BPI_TABLE), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CATB_BPI_TABLE, sizeof(TL1D_CUSTOM_DAT_FE_CAT_B_T));
199 kal_mem_cpy(&(gDatData->TL1D_DAT_CAT_B_CONFIG0_MIPIEVENT[0]), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CAT_B_MIPI_EventSet[0], TL1D_DAT_MAX_MIPI_EVNET_NUM*sizeof(TL1D_DAT_MIPI_EVENT_TABLE_T));
200 kal_mem_cpy(&(gDatData->TL1D_DAT_CAT_B_CONFIG1_MIPIEVENT[0]), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CAT_B_MIPI_EventSet[1], TL1D_DAT_MAX_MIPI_EVNET_NUM*sizeof(TL1D_DAT_MIPI_EVENT_TABLE_T));
201 kal_mem_cpy(&(gDatData->TL1D_DAT_CAT_B_CONFIG2_MIPIEVENT[0]), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CAT_B_MIPI_EventSet[2], TL1D_DAT_MAX_MIPI_EVNET_NUM*sizeof(TL1D_DAT_MIPI_EVENT_TABLE_T));
202 kal_mem_cpy(&(gDatData->TL1D_DAT_CAT_B_CONFIG3_MIPIEVENT[0]), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CAT_B_MIPI_EventSet[3], TL1D_DAT_MAX_MIPI_EVNET_NUM*sizeof(TL1D_DAT_MIPI_EVENT_TABLE_T));
203 kal_mem_cpy(&(gDatData->TL1D_DAT_CAT_B_CONFIG4_MIPIEVENT[0]), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CAT_B_MIPI_EventSet[4], TL1D_DAT_MAX_MIPI_EVNET_NUM*sizeof(TL1D_DAT_MIPI_EVENT_TABLE_T));
204 kal_mem_cpy(&(gDatData->TL1D_DAT_CAT_B_CONFIG5_MIPIEVENT[0]), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CAT_B_MIPI_EventSet[5], TL1D_DAT_MAX_MIPI_EVNET_NUM*sizeof(TL1D_DAT_MIPI_EVENT_TABLE_T));
205 kal_mem_cpy(&(gDatData->TL1D_DAT_CAT_B_CONFIG6_MIPIEVENT[0]), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CAT_B_MIPI_EventSet[6], TL1D_DAT_MAX_MIPI_EVNET_NUM*sizeof(TL1D_DAT_MIPI_EVENT_TABLE_T));
206 kal_mem_cpy(&(gDatData->TL1D_DAT_CAT_B_CONFIG7_MIPIEVENT[0]), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CAT_B_MIPI_EventSet[7], TL1D_DAT_MAX_MIPI_EVNET_NUM*sizeof(TL1D_DAT_MIPI_EVENT_TABLE_T));
207 kal_mem_cpy(&(gDatData->TL1D_DAT_CAT_B_CONFIG0_MIPIDATA[0]), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CAT_B_MIPI_DataSet[0], TL1D_DAT_MAX_MIPI_DATA_NUM*sizeof(TL1D_DAT_MIPI_DATA_TABLE_T));
208 kal_mem_cpy(&(gDatData->TL1D_DAT_CAT_B_CONFIG1_MIPIDATA[0]), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CAT_B_MIPI_DataSet[1], TL1D_DAT_MAX_MIPI_DATA_NUM*sizeof(TL1D_DAT_MIPI_DATA_TABLE_T));
209 kal_mem_cpy(&(gDatData->TL1D_DAT_CAT_B_CONFIG2_MIPIDATA[0]), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CAT_B_MIPI_DataSet[2], TL1D_DAT_MAX_MIPI_DATA_NUM*sizeof(TL1D_DAT_MIPI_DATA_TABLE_T));
210 kal_mem_cpy(&(gDatData->TL1D_DAT_CAT_B_CONFIG3_MIPIDATA[0]), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CAT_B_MIPI_DataSet[3], TL1D_DAT_MAX_MIPI_DATA_NUM*sizeof(TL1D_DAT_MIPI_DATA_TABLE_T));
211 kal_mem_cpy(&(gDatData->TL1D_DAT_CAT_B_CONFIG4_MIPIDATA[0]), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CAT_B_MIPI_DataSet[4], TL1D_DAT_MAX_MIPI_DATA_NUM*sizeof(TL1D_DAT_MIPI_DATA_TABLE_T));
212 kal_mem_cpy(&(gDatData->TL1D_DAT_CAT_B_CONFIG5_MIPIDATA[0]), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CAT_B_MIPI_DataSet[5], TL1D_DAT_MAX_MIPI_DATA_NUM*sizeof(TL1D_DAT_MIPI_DATA_TABLE_T));
213 kal_mem_cpy(&(gDatData->TL1D_DAT_CAT_B_CONFIG6_MIPIDATA[0]), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CAT_B_MIPI_DataSet[6], TL1D_DAT_MAX_MIPI_DATA_NUM*sizeof(TL1D_DAT_MIPI_DATA_TABLE_T));
214 kal_mem_cpy(&(gDatData->TL1D_DAT_CAT_B_CONFIG7_MIPIDATA[0]), tl1_mipiData_ptr->datTable_p->TL1D_DAT_CAT_B_MIPI_DataSet[7], TL1D_DAT_MAX_MIPI_DATA_NUM*sizeof(TL1D_DAT_MIPI_DATA_TABLE_T));
215 #endif
216 //kal_mem_cpy(buffer, &gDatData, NVRAM_EF_AST_TL1_DAT_PARAM_SIZE);
217 }
218 break;
219
220 default:
221 ASSERT(KAL_FALSE);
222 break;
223 }
224}
225
226#endif //#ifdef __AST_TL1_TDD__