mcu/interface/sap/md/tl1_msgid.h

/*****************************************************************************
*  Copyright Statement:
*  --------------------
*  This software is protected by Copyright and the information contained
*  herein is confidential. The software may not be copied and the information
*  contained herein may not be used or disclosed except with the written
*  permission of MediaTek Inc. (C) 2009
*
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*  THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
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*  AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
*  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
*  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
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*  SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
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/******************************************************************************
 * Filename:
 * --------------------------------------------------------
 *   tl1_sap.h
 *
 * Project:
 * --------------------------------------------------------
 *   
 *
 * Description:
 * --------------------------------------------------------
 *   
 *
 * Author:
 * --------------------------------------------------------
 * -------
 *
 * --------------------------------------------------------
 * $Log$
 *
 * 10 31 2018 yuhhwang.yu
 * [MOLY00361478] [Gen97] Gemini Compile Option Clean Up
 * .
 *
 * 08 14 2018 yuhhwang.yu
 * [MOLY00345860] [RSVAS] GEN97.DEV merge to VMOLY
 * .
 *
 * 06 20 2018 cruze.yu
 * [MOLY00285698] [93/95 re-arch][TL1] Modify tl1 code and folder for 93/95 co-codebase
 * 	
 * 	.
 *
 * 11 17 2017 cruze.yu
 * [MOLY00288671] [MT6295][MML1 DCLC] Dynamic cache lock central control development
 * 	
 * 	.
 *
 * 10 22 2015 yunlong.li
 * [MOLY00139750] [MT6755][TDD]
 * .add tl1_l1adt_enter_tdd_mode_ind
 *
 * 08 04 2015 yunlong.li
 * [MOLY00135310] [TK6291][E1EVB] [ADT]add adt feature
 * 	.add adt feature
 *
 * 04 29 2015 rong.yang
 * [MOLY00109047] [UMOLY][new feature] Pich false alarm Optimization
 * .
 *
 * 04 16 2015 chuansheng.zhang
 * [MOLY00097620] [TK6291][UBin] TL1 Platform Patch
 * TL1: Ubin Phase2 code merge.
 *
 * 01 07 2015 marco.zhang
 * [MOLY00086950] UMOLY TL1 MAINTAIN
 * .
 *
 * 01 05 2015 marco.zhang
 * [MOLY00086950] UMOLY TL1 MAINTAIN
 * 	.
 *
 * 01 05 2015 marco.zhang
 * [MOLY00086950] UMOLY TL1 MAINTAIN
 * 	.
 *
 * 12 29 2014 marco.zhang
 * [MOLY00086950] UMOLY TL1 MAINTAIN
 * 	msg id frefix.
 *
 * 01 21 2014 wcpuser_integrator
 * [MOLY00054475] SGLTE option rename
 * .
 *
 * 11 13 2013 shouzhu.zhang
 * [MOLY00045069] [TL1C][Volunteer Patch] Standby Measurement FSCS opt
 * Check in MMDC Band3 Band39 co-exist feature.
 *
 * 04 09 2013 ast00029
 * [MOLY00013377] [TDD128][ESL][MOLY]check-in ESL code.
 * for ESL
 *
 * 04 01 2013 shouzhu.zhang
 * [MOLY00013249] MM TL1 Code check in
 * [TL1] Merge lastes WR8 + R9 + MM code to MOLY..
 *
 * 03 01 2013 shun.liu
 * [MOLY00011182] MT6572/6582: RF TX test feature check in MOLY main
 * EM tx test tl1 part.
 * 
 * 09 24 2012 xiaoyun.mao
 * [MOLY00004069] [MOLY]TDD_R9_DEV Patch back to MOLY
 * TDD_R9_DEV patch back to MOLY
 *
 * 05 24 2012 wcpuser_integrator
 * removed!
 * Qinghua Yu check in global enum (MSG & SAP) at modem_dev.
 *
 * 05 24 2012 wcpuser_integrator
 * removed!
 * Qinghua Yu check in global enum (MSG & SAP) at modem_dev.
 *
 * 05 24 2012 wcpuser_integrator
 * removed!
 * Qinghua Yu check in global enum (MSG & SAP) at modem_dev.
 *
 * 05 03 2012 wcpuser_integrator
 * removed!
 * .
 *
 * 03 21 2012 shuyang.yin
 * removed!
 * .
 *
 * 03 02 2012 shuyang.yin
 * removed!
 * .
 * (TL1 SAP)
 *
 * 12 06 2011 shuyang.yin
 * removed!
 * .
 *
 * 11 21 2011 shuyang.yin
 * 
 * removed!
 *
 * 11 14 2011 shi.dong
 * removed!
 * TL1 code interface fta merge in MAUI.
 *
 * 09 07 2011 shuyang.yin
 * 
 * removed!
 * <saved by Perforce>
 *
 * 04 19 2011 xinqiu.wang
 * removed!
 * merge code from daily LOAD to MAUI 10A.
 *
 * 12 01 2010 popcafa.shih
 * removed!
 * .
 *
 * 11 04 2010 xinqiu.wang
 * removed!
 * 1. Add ul_mac_event to cphy_dch_setup/modify/release_req
 * 2. Add two ticks and structs for mac-tl1 interface.
 * 3. Add two simulation structs according to MAC's requeset.
 *
 * 11 03 2010 xinqiu.wang
 * removed!
 * 1.SLCE-TL1 SAP Modify for R7
 * 2. MAC-TL1 SAP Modify for UPA
 *
 * 08 24 2010 popcafa.shih
 * removed!
 * .
 *
 * removed!
 * removed!
 * 1.Add MSG_ID_PHY_END_EDCH_TX_IND
 *
 * removed!
 * removed!
 * 
 *
 * removed!
 * removed!
 * 1.Add MSG_ID_CPHY_EDCH_SETUP/MODIFY/RELEASE_REQ
 *
 * removed!
 * removed!
 * 1.Delete pre-declare check of __UMTS_TDD128_MODE__
 *
 * removed!
 * removed!
 * 1.Add pre-declare check of __UMTS_TDD128_MODE__
 *
 * removed!
 * removed!
 * 
 *
 * removed!
 * removed!
 * 
 *
 * removed!
 * removed!
 * Rename the msg code begin from UL1 to TL1
 *
 * removed!
 * removed!
 * Rename __UMTS_TDD128_RAT__ to __UMTS_TDD128_MODE__
 *
 * removed!
 * removed!
 * add log section for tl1interface header files
 *
*******************************************************************************/
#include "module_msg_range.h"

#ifndef _TL1_MSG_H
#define _TL1_MSG_H

#if defined(__UMTS_RAT__) && defined(__UMTS_TDD128_MODE__)
/* Request for CPHY */
#ifdef _Test_Hdr_On_PC
enum {
#endif

#include "em_msgid.h"

MODULE_MSG_BEGIN( MSG_ID_TL1_MSG_CODE_BEGIN )
/* RELEASE REQ should be put before SETUP/MODIFY REQ */
/* MSG_ID_TDD_CPHY_BCH_RELEASE_REQ to MSG_ID_TDD_CPHY_DCH_MODIFY_REQ must be continuous */
MSG_ID_TDD_TL1_MSG_CODE_REQ_BEGIN = MSG_ID_TL1_MSG_CODE_BEGIN,
MSG_ID_TDD_CPHY_BCH_RELEASE_REQ,
MSG_ID_TDD_CPHY_BCH_MODIFY_REQ,
MSG_ID_TDD_CPHY_BCH_SETUP_REQ,
MSG_ID_TDD_CPHY_PCH_RELEASE_REQ,
MSG_ID_TDD_CPHY_PCH_SETUP_REQ,
MSG_ID_TDD_CPHY_PCH_MODIFY_REQ,
MSG_ID_TDD_CPHY_FACH_RELEASE_REQ,
MSG_ID_TDD_CPHY_FACH_SETUP_REQ,
/*MSG_ID_CPHY_FACH_MODIFY_REQ,*/    /*MSG_ID_CPHY_FACH_MODIFY_REQ is not used in TDD128 */
MSG_ID_TDD_CPHY_RACH_RELEASE_REQ,
MSG_ID_TDD_CPHY_RACH_SETUP_REQ,
MSG_ID_TDD_CPHY_DCH_RELEASE_REQ,
MSG_ID_TDD_CPHY_DCH_SETUP_REQ,
MSG_ID_TDD_CPHY_DCH_MODIFY_REQ,
MSG_ID_TDD_CPHY_FREQUENCY_SCAN_REQ,
MSG_ID_TDD_CPHY_FREQUENCY_SCAN_CONTINUE_REQ,
MSG_ID_TDD_CPHY_FREQUENCY_SCAN_SUSPEND_REQ,
/*MSG_ID_CPHY_FREQUENCY_SCAN_STOP_REQ,*/  /*MSG_ID_CPHY_FREQUENCY_SCAN_STOP_REQ is not used in TDD128 */
MSG_ID_TDD_CPHY_RSSI_SNIFFER_START_REQ,          /*keep their space for future use */
MSG_ID_TDD_CPHY_RSSI_SNIFFER_STOP_REQ,          /*keep their space for future use */
MSG_ID_TDD_CPHY_MEASUREMENT_CONFIG_CELL_REQ,

MSG_ID_TDD_CPHY_MEASUREMENT_INTERNAL_CONFIG_REQ,
MSG_ID_TDD_CPHY_MEASUREMENT_INTERNAL_STOP_REQ,
MSG_ID_TDD_CPHY_MEASUREMENT_INTERNAL_RESULT_REQ,
MSG_ID_TDD_CPHY_SPECIFIC_CELL_SEARCH_REQ,
MSG_ID_TDD_CPHY_SPECIFIC_CELL_SEARCH_STOP_REQ,
MSG_ID_TDD_CPHY_RESET_REQ,
MSG_ID_TDD_CPHY_DUPLEX_MODE_CHANGE_REQ,
MSG_ID_TDD_CPHY_RF_ON_REQ,
MSG_ID_TDD_CPHY_RF_OFF_REQ,
MSG_ID_TDD_CPHY_SET_ACTIVE_RAT_REQ,

MSG_ID_TDD_CPHY_HSDSCH_SETUP_REQ,
MSG_ID_TDD_CPHY_HSDSCH_MODIFY_REQ,
MSG_ID_TDD_CPHY_HSDSCH_RELEASE_REQ,

#ifdef __HSUPA_SUPPORT__
MSG_ID_TDD_CPHY_EDCH_SETUP_REQ,
MSG_ID_TDD_CPHY_EDCH_MODIFY_REQ,
MSG_ID_TDD_CPHY_EDCH_RELEASE_REQ,
#ifdef __SIMULATION_PS_TL1_BOTH__
MSG_ID_TDD_CPHY_SIMULATE_DPA_ONLY_SUB_FRAME_ENTRY_REQ, /*By sub-frame. tl1data_ast_msgid.h has the same def for dsp resp logging.*/
MSG_ID_TDD_CPHY_SIMULATE_UPA_ONLY_SUB_FRAME_ENTRY_REQ, /*By sub-frame*/
#endif /*__SIMULATION_PS_TL1_BOTH__*/
#endif

//#if defined( __UMTS_R9__ ) && defined ( __AST3002__ )
MSG_ID_TDD_CPHY_MEASUREMENT_CONFIG_DMO_REQ,
//#endif
MSG_ID_TDD_CPHY_MEASUREMENT_CONFIG_IDLE_INTERVAL_REQ,	/*Interface for idle interval*/

MSG_ID_TDD_CPHY_MSG_CONTAINER_REQ,
MSG_ID_TDD_CPHY_ABORT_REQ,
MSG_ID_TDD_CPHY_ABORT_BCH_SETUP_REQ,


/* Request from PHY */
MSG_ID_TDD_PHY_RACH_DATA_REQ,

MSG_ID_TDD_RSVAS_TL1_SUSPEND_REQ,
MSG_ID_TDD_RSVAS_TL1_RESUME_REQ,

MSG_ID_TDD_PHY_ACCESS_REQ,
MSG_ID_L4CTL1_EM_TST_CONTROL_REQ,

MSG_ID_TDD_TL1_MSG_CODE_REQ_END,

/*MSG_ID_UL1C_UL1A_UREPORT,
MSG_ID_UL1D_UL1C_UREPORT,*/

/* Confirm & Indication for CPHY */
MSG_ID_TDD_CPHY_BCH_SETUP_CNF,
MSG_ID_TDD_CPHY_BCH_SETUP_IND,
MSG_ID_TDD_CPHY_BCH_MODIFY_CNF,
MSG_ID_TDD_CPHY_BCH_MODIFY_IND,
MSG_ID_TDD_CPHY_BCH_RELEASE_CNF,
MSG_ID_TDD_CPHY_BCH_RELEASE_IND,
MSG_ID_TDD_CPHY_SFN_IND,


MSG_ID_TDD_CPHY_T312_EXPIRY_IND,
MSG_ID_TDD_CPHY_DL_INIT_SYNC_IND,
MSG_ID_TDD_CPHY_RL_FAILURE_IND,

MSG_ID_TDD_CPHY_FREQUENCY_SCAN_CNF,
MSG_ID_TDD_CPHY_FREQUENCY_SCAN_IND,
MSG_ID_TDD_CPHY_FREQUENCY_SCAN_CONTINUE_CNF,
MSG_ID_TDD_CPHY_FREQUENCY_SCAN_SUSPEND_CNF,
MSG_ID_TDD_CPHY_FREQUENCY_SCAN_SUSPEND_IND,

MSG_ID_TDD_CPHY_RSSI_SNIFFER_START_CNF, 
MSG_ID_TDD_CPHY_RSSI_SNIFFER_STOP_CNF,  
MSG_ID_TDD_CPHY_RSSI_SNIFFER_SIGNAL_APPEAR_IND,  
MSG_ID_TDD_CPHY_MEASUREMENT_CONFIG_CELL_CNF,
MSG_ID_TDD_CPHY_MEASUREMENT_CELL_IND,

MSG_ID_TDD_CPHY_MEASUREMENT_INTERNAL_CONFIG_CNF,
MSG_ID_TDD_CPHY_MEASUREMENT_INTERNAL_EVENT_IND,
MSG_ID_TDD_CPHY_MEASUREMENT_INTERNAL_PERIODIC_IND,
MSG_ID_TDD_CPHY_MEASUREMENT_INTERNAL_RESULT_IND,
MSG_ID_TDD_CPHY_MEASUREMENT_INTERNAL_STOP_CNF,

MSG_ID_TDD_CPHY_SPECIFIC_CELL_SEARCH_IND,
MSG_ID_TDD_CPHY_SPECIFIC_CELL_SEARCH_STOP_IND,
MSG_ID_TDD_CPHY_RESET_CNF,
MSG_ID_TDD_CPHY_DUPLEX_MODE_CHANGE_CNF,
MSG_ID_TDD_CPHY_RF_ON_CNF,
MSG_ID_TDD_CPHY_RF_OFF_CNF,
MSG_ID_TDD_CPHY_SET_ACTIVE_RAT_CNF,

MSG_ID_TDD_CPHY_MSG_CONTAINER_CNF,
MSG_ID_TDD_CPHY_MSG_CONTAINER_IND,
MSG_ID_TDD_CPHY_ABORT_CNF,
MSG_ID_TDD_CPHY_TX_STATUS_IND,
#ifdef __TDD_DM_GAP_OPTIMIZATION__
MSG_ID_TDD_CPHY_GSM_GAP_STATUS_IND,
#endif
/* Confirm & Indication for PHY */
MSG_ID_TDD_PHY_PCH_SETUP_IND,
/*MSG_ID_PHY_PCH_MODIFY_IND,*/  /* MSG_ID_PHY_PCH_MODIFY_IND is not used in TDD128 */
MSG_ID_TDD_PHY_PCH_RELEASE_IND,
MSG_ID_TDD_PHY_FACH_SETUP_IND,
/*MSG_ID_PHY_FACH_MODIFY_IND,*/ /* MSG_ID_PHY_FACH_MODIFY_IND is not used in TDD128 */
MSG_ID_TDD_PHY_FACH_RELEASE_IND,
MSG_ID_TDD_PHY_RACH_SETUP_IND,
MSG_ID_TDD_PHY_RACH_RELEASE_IND,
MSG_ID_TDD_PHY_DCH_SETUP_IND,
MSG_ID_TDD_PHY_DCH_MODIFY_IND,
MSG_ID_TDD_PHY_DCH_RELEASE_IND,
MSG_ID_TDD_PHY_CONFIG_ABORT_IND,
MSG_ID_TDD_PHY_DL_INIT_SYNC_IND,
MSG_ID_TDD_PHY_BCH_DATA_IND,
/*specially for pch data from PHY to LUMAC*/
MSG_ID_TDD_PHY_PCH_DATA_IND, 
MSG_ID_TDD_PHY_DATA_IND,
MSG_ID_TDD_PHY_ACCESS_IND,
MSG_ID_TDD_PHY_POST_TX_IND,
MSG_ID_TDD_PHY_END_DCH_TX_IND,
MSG_ID_TDD_PHY_HSDSCH_DATA_IND,

#ifdef __HSUPA_SUPPORT__
MSG_ID_TDD_PHY_END_EDCH_TX_IND,
#endif

MSG_ID_TDD_CPHY_MEASUREMENT_CONFIG_IDLE_INTERVAL_CNF,	/*Interface for idle interval*/

/*New-Added message for HSPA+ */

/*MSG_ID_CPHY_ULSYNC_ORDER_IND,*/
MSG_ID_TDD_PHY_ERUCCH_ACCESS_IND,
MSG_ID_TDD_PHY_CEDCH_SETUP_IND,
MSG_ID_TDD_PHY_CEDCH_RELEASE_IND,
MSG_ID_TDD_PHY_CEDCH_MODIFY_IND,
MSG_ID_TDD_PHY_CEDCH_TERMINATION_IND,
MSG_ID_TDD_PHY_CEDCH_TERMINATION_REQ,

/*New-Added message for HSPA+ */

/*========== UMAC UT SIMULATE MESSAGE   ==========*/
//#ifdef  __MNT_UT_UMAC_ALONE_WITHOUT_L1__  /* UMAC UT */
MSG_ID_TDD_PHY_SIMULATE_DCH_UL_CCTRCH_TASK, 
MSG_ID_TDD_PHY_SIMULATE_DCH_UL_CCTRCH_HISR,
MSG_ID_TDD_PHY_SIMULATE_DCH_UL_CCTRCH_HISR_RSP,

MSG_ID_TDD_PHY_SIMULATE_DCH_UL_CCTRCH_LISR,
MSG_ID_TDD_PHY_SIMULATE_DCH_UL_CCTRCH_LISR_RSP,

MSG_ID_TDD_PHY_SIMULATE_DCH_UL_CALLBACK_CCTRCH, 
MSG_ID_TDD_PHY_SIMULATE_DCH_UL_CALLBACK_CCTRCH_RSP,
MSG_ID_TDD_PHY_SIMULATE_DCH_UL_CALLBACK_POWER,
MSG_ID_TDD_PHY_SIMULATE_END_DCH_TX_IND, 

MSG_ID_TDD_PHY_SIMULATE_UMAC_UL_DCH_TICK,
MSG_ID_TDD_PHY_SIMULATE_UMAC_UL_DCH_TICK_END,
#ifdef __HSUPA_SUPPORT__
MSG_ID_TDD_PHY_SIMULATE_UMAC_E_DCH_TICK_1,
MSG_ID_TDD_PHY_SIMULATE_UMAC_E_DCH_TICK_1_RSP,
MSG_ID_TDD_PHY_SIMULATE_UMAC_E_DCH_TICK_2,
MSG_ID_TDD_PHY_SIMULATE_UMAC_E_DCH_TICK_2_RSP,
MSG_ID_TDD_PHY_SIMULATE_UMAC_E_DCH_TICK_3,
MSG_ID_TDD_PHY_SIMULATE_UMAC_E_DCH_TICK_4,
MSG_ID_TDD_PHY_SIMULATE_INVOKE_UL_INFORM_EDCH_MAC,
//MSG_ID_PHY_SIMULATE_END_EDCH_TX_IND,
#endif
//#endif  /* __MNT_UT_UMAC_ALONE_WITHOUT_L1__ */
/*========== END UMAC UT SIMULATE MESSAGE   ==========*/

MSG_ID_TDD_CPHY_MSG_CONTAINER_REQ_UNPACK,
MSG_ID_TDD_CPHY_CHANNEL_QUALITY_STATUS_IND,

MSG_ID_TDD_RSVAS_TL1_SUSPEND_CNF,
MSG_ID_TDD_RSVAS_TL1_RESUME_CNF,


MSG_ID_TDD_CPHY_CHANNEL_PRIORITY_ADJUSTMENT_REQ,
MSG_ID_TDD_URR_TL1_SWITCH_GEMINI_MODE_REQ,
MSG_ID_TDD_RSVAS_TL1_VIRTUAL_RESUME_REQ,
MSG_ID_TDD_RSVAS_TL1_VIRTUAL_RESUME_CNF,
MSG_ID_TDD_PHY_CHANNEL_PRIORITY_ADJUSTMENT_REQ,


//move this meassage to L4
//#if 1//__TDD_TX_PWR_REDUCE__
//MSG_ID_TDD_TL1_UMTS_MAX_TX_PWR_RED_REQ,
//#endif

/*ADT Test start*/
#if defined (__MML1_ADT_ENABLE__)
MSG_ID_TDD_TL1_L1ADT_ENTER_CONNECTED_REQ,
MSG_ID_TDD_TL1_L1ADT_ENTER_CONNECTED_CNF,

MSG_ID_TDD_TL1_L1ADT_LEAVE_CONNECTED_REQ,
MSG_ID_TDD_TL1_L1ADT_LEAVE_CONNECTED_CNF,

MSG_ID_TDD_TL1_L1ADT_ENTER_TDD_MODE_REQ,
MSG_ID_TDD_TL1_L1ADT_ENTER_TDD_MODE_CNF,
MSG_ID_TDD_TL1_L1ADT_ENTER_TDD_MODE_IND,
#endif
/*ADT Test end*/
#if defined(__DYNAMIC_CACHE_LOCK_CENTRAL_CONTROL_SUPPORT__)
MSG_ID_TL1_DCLC_LOCK_UNLOCK_IND,
#endif

MODULE_MSG_END( MSG_ID_TL1_MSG_CODE_TAIL )

#ifdef _Test_Hdr_On_PC
};
#endif
#endif

#endif  //_TL1_MSG_H